22957 lines
1.6 MiB
22957 lines
1.6 MiB
; --------------------------------------------------------------------------------
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; @Title: TMS470MF031/TMS470MF042/TMS470MF066 On-Chip Peripherals
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; @Props: Released
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; @Author: LEM
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; @Changelog: 2011-12-09 LEM
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; @Manufacturer: TI - Texas Instruments
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; @Doc: DS_tms470mf03107.pdf (rev. 2011-01); DS_tms470mf06607.pdf (rev. 2011-02)
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; RM_spnu495a.pdf (rev. 2010-11)
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; @Core: Cortex-M3
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pertms470mf.per 17736 2024-04-08 09:26:07Z kwisniewski $
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tree.close "Core Registers (Cortex-M3)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 11.
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group 0x10--0x1b
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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;group 0x14++0x03
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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;group 0x18++0x03
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value"
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rgroup 0x1c++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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textline " "
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rgroup 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor"
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bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd04--0xd17
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set"
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bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending"
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hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field"
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;group 0xd08++0x03
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line.long 0x04 "VTOR,Vector Table Offset Register"
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bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM"
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hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field"
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;group 0xd0c++0x03
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset"
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;group 0xd10++0x03
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line.long 0x0c "SCR,System Control Register"
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bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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;group 0xd14++0x03
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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group 0xd18--0xd23
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line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x04 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x08 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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group 0xd24++0x3
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line.long 0x00 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
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textline " "
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bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group 0xd28--0xd3b
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line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
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bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error"
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bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error"
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textline " "
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bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error"
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bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error"
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;group 0xd29++0x00
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid"
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bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error"
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bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
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textline " "
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error"
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bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error"
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bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error"
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;group 0xd2a++0x01
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line.word 0x02 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error"
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bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error"
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bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error"
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textline " "
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bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
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bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error"
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;group 0xd2c++0x03
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line.long 0x04 "HFSR,Hard Fault Status Register"
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bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
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bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error"
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bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error"
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;group 0xd30++0x03
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line.long 0x08 "DFSR,Debug Fault Status Register"
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bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted"
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bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
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textline " "
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bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested"
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;group 0xd34++0x03
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line.long 0xc "MMFAR,Memory Manage Fault Address Register"
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;group 0xd38++0x03
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line.long 0x10 "BFAR,Bus Fault Address Register"
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wgroup 0xf00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Feature Registers"
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width 10.
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
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bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
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line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
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bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
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bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
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textline " "
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bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
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bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
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bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
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tree.end
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tree "CoreSight Identification Registers"
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width 6.
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "PID0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "PID1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "PID2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
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hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
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line.long 0x0c "PID3,Peripheral ID3"
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hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
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hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
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rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
|
|
group 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group 0x00--0x27
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field"
|
|
;group 0x08++0x03
|
|
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID0"
|
|
line.long 0x14 "PID1,Peripheral ID1"
|
|
line.long 0x18 "PID2,Peripheral ID2"
|
|
line.long 0x1c "PID3,Peripheral ID3"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group 0x00--0x1B
|
|
line.long 0x00 "DWT_CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
|
|
bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID1"
|
|
line.long 0x14 "PID1,Peripheral ID2"
|
|
line.long 0x18 "PID2,Peripheral ID3"
|
|
line.long 0x1c "PID3,Peripheral ID4"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree.open "Control Registers"
|
|
tree "SYS (System Control Registers)"
|
|
base ad:0xFFFFFF00
|
|
width 9.
|
|
tree "System Pin Control Registers"
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "SYSPC1,SYS Pin Control Register 1"
|
|
bitfld.long 0x00 0. " ECPCLK_FUN ,ECPCLK Function" "GIO,Output"
|
|
if (((data.long(ad:0xFFFFFF00))&0x01)==0x00)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "SYSPC2,SYS Pin Control Register 2"
|
|
bitfld.long 0x00 0. " ECPCLK_DIR ,ECPCLK Data Direction" "Input,Output"
|
|
else
|
|
hgroup.long 0x04++0x3
|
|
hide.long 0x0 "SYSPC2,SYS Pin Control Register 2"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x0 "SYSPC3,SYS Pin Control Register 3"
|
|
bitfld.long 0x00 0. " ECPCLK_DIN ,ECPCLK Data In" "Low,High"
|
|
if ((((d.l(ad:0xFFFFFF00))&0x01)==0x00)&&(((d.l((ad:0xFFFFFF00+0x04)))&0x01)==0x01))
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "SYSPC4,SYS Pin Control Register 4"
|
|
bitfld.long 0x00 0. " ECPCLK_DOUT ,ECPCLK Data Out Write" "Low,High"
|
|
else
|
|
hgroup.long 0x0C++0x3
|
|
hide.long 0x0 "SYSPC4,SYS Pin Control Register 4"
|
|
endif
|
|
if (((data.long(ad:0xFFFFFF00))&0x01)==0x00)
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "SYSPC5,SYS Pin Control Register 5"
|
|
bitfld.long 0x00 0. " ECPCLK_SET ,ECPCLK Data Out Set" "Not set,Set"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SYSPC6,SYS Pin Control Register 6"
|
|
bitfld.long 0x00 0. " ECPCLK_CLR ,ECPCLK Data Out clear" "Not cleared,Cleared"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "SYSPC7,SYS Pin Control Register 7"
|
|
bitfld.long 0x00 0. " ECPCLK_ODE ,ECPCLK Open Drain Enable" "Push/pull,Open drain"
|
|
else
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x0 "SYSPC5,SYS Pin Control Register 5"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x0 "SYSPC6,SYS Pin Control Register 6"
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x0 "SYSPC7,SYS Pin Control Register 7"
|
|
endif
|
|
if (((d.l((ad:0xFFFFFF00+0x04)))&0x01)==0x00)
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "SYSPC8,SYS Pin Control Register 8"
|
|
bitfld.long 0x00 0. " ECPCLK_PUE ,ECPCLK Pull Up Enable" "Active,Inactive"
|
|
else
|
|
hgroup.long 0x1C++0x3
|
|
hide.long 0x0 "SYSPC8,SYS Pin Control Register 8"
|
|
endif
|
|
if ((((data.long(ad:0xFFFFFF00+0x1C))&0x01)==0x00)&&(((d.l((ad:0xFFFFFF00+0x04)))&0x01)==0x00))
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "SYSPC9,SYS Pin Control Register 9"
|
|
bitfld.long 0x00 0. " ECPCLK_PS ,ECPCLK Pull Up/Pull Down Select" "Down,Up"
|
|
else
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "SYSPC9,SYS Pin Control Register 9"
|
|
endif
|
|
tree.end
|
|
width 9.
|
|
tree "System SSW PLL BIST Control Registers"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "SSWPLL1,SSW PLL BIST Control Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MOD_PH_CAP_INDEX ,Modulation Phase Capture Index"
|
|
bitfld.long 0x00 6. " COUNTER_READ_READY ,Counter Read Ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 5. " COUNTER_RESET ,Counter Reset" "No reset,Reset"
|
|
bitfld.long 0x00 4. " COUNTER_EN ,Counter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " TAP_COUNTER_DIS[3:1] ,TAP Counter Disable" "Bit 16,Bit 18,Bit 20,Bit 22,Bit 24,Bit 26,Bit 28,Bit 30"
|
|
bitfld.long 0x00 0. " EXT_COUNTER_EN ,EXT Counter Enable" "PLLCLK,Oscillator input"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "SSWPLL2,SSW PLL BIST Control Register 2"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "SSWPLL3,SSW PLL BIST Control Register 3"
|
|
tree.end
|
|
width 7.
|
|
tree "System Clock Source/Domain Disable Registers"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "CSDIS,Clock Source Disable Register"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CLKSR5_OFF_set/clr ,Clock Source 5 (LPO High Frequency Clock) Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CLKSR4_OFF_set/clr ,Clock Source 4 (LPO Low Frequency Clock) Off" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CLKSR3_OFF_set/clr ,Clock Source 3 (External Clock) Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLKSR2_OFF_set/clr ,Clock Source 2 (32 kHz Oscillator) Off" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CLKSR1_OFF_set/clr ,Clock Source 1 (PLL) Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CLKSR0_OFF_set/clr ,Clock Source 0 (Oscillator) Off" "Enabled,Disabled"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "CDDIS,Clock Domain Disable Register"
|
|
setclrfld.long 0x00 7. 0x4 7. 0x8 7. " RTICLK2OFF_set/clr ,RTICLK2 Domain Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 6. 0x4 6. 0x8 6. " RTICLK1OFF_set/clr ,RTICLK1 Domain Off" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x4 5. 0x8 5. " VCLKA2OFF_set/clr ,VCLKA2 Domain Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 4. 0x4 4. 0x8 4. " VCLKA1OFF_set/clr ,VCLKA1 Domain Off" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x4 3. 0x8 3. " VCLK2OFF_set/clr ,VCLK2 Domain Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 2. 0x4 2. 0x8 2. " VCLKPOFF_set/clr ,VCLKP Domain Off" "Enabled,Disabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x4 1. 0x8 1. " HCLKOFF_set/clr ,HCLK Domain Off" "Enabled,Disabled"
|
|
setclrfld.long 0x00 0. 0x4 0. 0x8 0. " GCLKOFF_set/clr ,GCLK Domain Off" "Enabled,Disabled"
|
|
tree.end
|
|
textline " "
|
|
width 13.
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "GHVSRC,GCLK/HCLK/VCLK and VCLK2 Source Register"
|
|
bitfld.long 0x00 24.--27. " GHVWAKE[3:0] ,GCLK/HCLK/VCLK/VCLK2 Source on Wakeup" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,?..."
|
|
bitfld.long 0x00 16.--19. " HVLPM[3:0] ,HCLK/VCLK/VCLK2 Source on Wakeup (GCLK Turned Off)" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " GHVSRC[3:0] ,GCLK/HCLK/VCLK/VCLK2 Current Source" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,?..."
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "VCLKASRC,Peripheral Asynchronous Clock Source Register"
|
|
bitfld.long 0x00 8.--11. " VCLKA2S[3:0] ,Peripheral Asynchronous Clock 2 Source" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK"
|
|
bitfld.long 0x00 0.--3. " VCLKA1S[3:0] ,Peripheral Asynchronous Clock 1 Source" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "RCLKSRC,RTI Clock Source Register"
|
|
bitfld.long 0x00 24.--25. " RTI2DIV[1:0] ,RTI Clock 2 Divider" "RTICLK2,RTICLK2/2,RTICLK2/4,RTICLK2/8"
|
|
bitfld.long 0x00 16.--19. " RTI2SRC[3:0] ,RTI Clock 2 Source" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " RTI1DIV[1:0] ,RTI Clock 1 Divider" "RTICLK1,RTICLK1/2,RTICLK1/4,RTICLK1/8"
|
|
bitfld.long 0x00 0.--3. " RTI1SRC[3:0] ,RTI Clock 1 Source" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK,VCLK"
|
|
width 13.
|
|
rgroup.long 0x54++0x3
|
|
line.long 0x0 "CSVSTAT,Clock Source Valid Status Register"
|
|
bitfld.long 0x00 7. " CLKSR7V ,Clock Source 7 Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 6. " CLKSR6V ,Clock Source 6 Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 5. " CLKSR5V ,Clock Source 5 Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CLKSR4V ,Clock Source 4 Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 3. " CLKSR3V ,Clock Source 3 Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 2. " CLKSR2V ,Clock Source 2 Valid" "Not valid,Valid"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLKSR1V ,Clock Source 1 Valid" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " CLKSR0V ,Clock Source 0 Valid" "Not valid,Valid"
|
|
width 13.
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "MSTGCR,Memory Self-Test Global Control Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MBIST_ALGSEL ,Selects Different Algorithm for MBIST"
|
|
bitfld.long 0x00 8.--9. " ROM_DIV[1:0] ,ROM Clock Source Prescaler Divider" "HCLK,HCLK/2,HCLK/4,HCLK/8"
|
|
bitfld.long 0x00 0.--3. " MSTGENA[3:0] ,Memory Self-Test Controller Global Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "MINITGCR,Memory Hardware Initialization Global Control Register"
|
|
bitfld.long 0x00 0.--3. " MINITGENA[3:0] ,Memory Hardware Initialization Global Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
width 13.
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "MSINENA,MBIST Controller/Memory Initialization Enable Register"
|
|
bitfld.long 0x00 31. " MSIENA31 ,MBIST Controller/Memory Initialization Enable 31" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " MSIENA30 ,MBIST Controller/Memory Initialization Enable 30" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " MSIENA29 ,MBIST Controller/Memory Initialization Enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " MSIENA28 ,MBIST Controller/Memory Initialization Enable 28" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " MSIENA27 ,MBIST Controller/Memory Initialization Enable 27" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " MSIENA26 ,MBIST Controller/Memory Initialization Enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " MSIENA25 ,MBIST Controller/Memory Initialization Enable 25" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " MSIENA24 ,MBIST Controller/Memory Initialization Enable 24" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " MSIENA23 ,MBIST Controller/Memory Initialization Enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " MSIENA22 ,MBIST Controller/Memory Initialization Enable 22" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " MSIENA21 ,MBIST Controller/Memory Initialization Enable 21" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " MSIENA20 ,MBIST Controller/Memory Initialization Enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " MSIENA19 ,MBIST Controller/Memory Initialization Enable 19" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " MSIENA18 ,MBIST Controller/Memory Initialization Enable 18" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " MSIENA17 ,MBIST Controller/Memory Initialization Enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " MSIENA16 ,MBIST Controller/Memory Initialization Enable 16" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " MSIENA15 ,MBIST Controller/Memory Initialization Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " MSIENA14 ,MBIST Controller/Memory Initialization Enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MSIENA13 ,MBIST Controller/Memory Initialization Enable 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " MSIENA12 ,MBIST Controller/Memory Initialization Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " MSIENA11 ,MBIST Controller/Memory Initialization Enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MSIENA10 ,MBIST Controller/Memory Initialization Enable 10" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " MSIENA9 ,MBIST Controller/Memory Initialization Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MSIENA8 ,MBIST Controller/Memory Initialization Enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MSIENA7 ,MBIST Controller/Memory Initialization Enable 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " MSIENA6 ,MBIST Controller/Memory Initialization Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " MSIENA5 ,MBIST Controller/Memory Initialization Enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MSIENA4 ,MBIST Controller/Memory Initialization Enable 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " MSIENA3 ,MBIST Controller/Memory Initialization Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " MSIENA2 ,MBIST Controller/Memory Initialization Enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " MSIENA1 ,MBIST Controller/Memory Initialization Enable 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MSIENA0 ,MBIST Controller/Memory Initialization Enable 0" "Disabled,Enabled"
|
|
width 13.
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "MSTFAIL,Memory Self-Test Fail Status Register"
|
|
eventfld.long 0x00 31. " MSTF31 ,Memory Self-Test Fail Status 31" "Not failed,Failed"
|
|
eventfld.long 0x00 30. " MSTF30 ,Memory Self-Test Fail Status 30" "Not failed,Failed"
|
|
eventfld.long 0x00 29. " MSTF29 ,Memory Self-Test Fail Status 29" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 28. " MSTF28 ,Memory Self-Test Fail Status 28" "Not failed,Failed"
|
|
eventfld.long 0x00 27. " MSTF27 ,Memory Self-Test Fail Status 27" "Not failed,Failed"
|
|
eventfld.long 0x00 26. " MSTF26 ,Memory Self-Test Fail Status 26" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 25. " MSTF25 ,Memory Self-Test Fail Status 25" "Not failed,Failed"
|
|
eventfld.long 0x00 24. " MSTF24 ,Memory Self-Test Fail Status 24" "Not failed,Failed"
|
|
eventfld.long 0x00 23. " MSTF23 ,Memory Self-Test Fail Status 23" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 22. " MSTF22 ,Memory Self-Test Fail Status 22" "Not failed,Failed"
|
|
eventfld.long 0x00 21. " MSTF21 ,Memory Self-Test Fail Status 21" "Not failed,Failed"
|
|
eventfld.long 0x00 20. " MSTF20 ,Memory Self-Test Fail Status 20" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 19. " MSTF19 ,Memory Self-Test Fail Status 19" "Not failed,Failed"
|
|
eventfld.long 0x00 18. " MSTF18 ,Memory Self-Test Fail Status 18" "Not failed,Failed"
|
|
eventfld.long 0x00 17. " MSTF17 ,Memory Self-Test Fail Status 17" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 16. " MSTF16 ,Memory Self-Test Fail Status 16" "Not failed,Failed"
|
|
eventfld.long 0x00 15. " MSTF15 ,Memory Self-Test Fail Status 15" "Not failed,Failed"
|
|
eventfld.long 0x00 14. " MSTF14 ,Memory Self-Test Fail Status 14" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 13. " MSTF13 ,Memory Self-Test Fail Status 13" "Not failed,Failed"
|
|
eventfld.long 0x00 12. " MSTF12 ,Memory Self-Test Fail Status 12" "Not failed,Failed"
|
|
eventfld.long 0x00 11. " MSTF11 ,Memory Self-Test Fail Status 11" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 10. " MSTF10 ,Memory Self-Test Fail Status 10" "Not failed,Failed"
|
|
eventfld.long 0x00 9. " MSTF9 ,Memory Self-Test Fail Status 9" "Not failed,Failed"
|
|
eventfld.long 0x00 8. " MSTF8 ,Memory Self-Test Fail Status 8" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 7. " MSTF7 ,Memory Self-Test Fail Status 7" "Not failed,Failed"
|
|
eventfld.long 0x00 6. " MSTF6 ,Memory Self-Test Fail Status 6" "Not failed,Failed"
|
|
eventfld.long 0x00 5. " MSTF5 ,Memory Self-Test Fail Status 5" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 4. " MSTF4 ,Memory Self-Test Fail Status 4" "Not failed,Failed"
|
|
eventfld.long 0x00 3. " MSTF3 ,Memory Self-Test Fail Status 3" "Not failed,Failed"
|
|
eventfld.long 0x00 2. " MSTF2 ,Memory Self-Test Fail Status 2" "Not failed,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 1. " MSTF1 ,Memory Self-Test Fail Status 1" "Not failed,Failed"
|
|
eventfld.long 0x00 0. " MSTF0 ,Memory Self-Test Fail Status 0" "Not failed,Failed"
|
|
width 13.
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "MSTCGSTAT,MSTC Global Status Register"
|
|
bitfld.long 0x00 8. " MINIDONE ,Memory Hardware Initililization Test Run Complete Status" "Not completed,Completed"
|
|
eventfld.long 0x00 0. " MSTDONE ,Memory Self-Test Run Complete Status" "Not completed,Completed"
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "MINISTAT,Memory Hardware Initialization Status Register"
|
|
eventfld.long 0x00 31. " MIDONE31 ,Memory Hardware Initialization Status 31" "Not completed,Completed"
|
|
eventfld.long 0x00 30. " MIDONE30 ,Memory Hardware Initialization Status 30" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 29. " MIDONE29 ,Memory Hardware Initialization Status 29" "Not completed,Completed"
|
|
eventfld.long 0x00 28. " MIDONE28 ,Memory Hardware Initialization Status 28" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 27. " MIDONE27 ,Memory Hardware Initialization Status 27" "Not completed,Completed"
|
|
eventfld.long 0x00 26. " MIDONE26 ,Memory Hardware Initialization Status 26" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 25. " MIDONE25 ,Memory Hardware Initialization Status 25" "Not completed,Completed"
|
|
eventfld.long 0x00 24. " MIDONE24 ,Memory Hardware Initialization Status 24" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 23. " MIDONE23 ,Memory Hardware Initialization Status 23" "Not completed,Completed"
|
|
eventfld.long 0x00 22. " MIDONE22 ,Memory Hardware Initialization Status 22" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 21. " MIDONE21 ,Memory Hardware Initialization Status 21" "Not completed,Completed"
|
|
eventfld.long 0x00 20. " MIDONE20 ,Memory Hardware Initialization Status 20" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 19. " MIDONE19 ,Memory Hardware Initialization Status 19" "Not completed,Completed"
|
|
eventfld.long 0x00 18. " MIDONE18 ,Memory Hardware Initialization Status 18" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 17. " MIDONE17 ,Memory Hardware Initialization Status 17" "Not completed,Completed"
|
|
eventfld.long 0x00 16. " MIDONE16 ,Memory Hardware Initialization Status 16" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 15. " MIDONE15 ,Memory Hardware Initialization Status 15" "Not completed,Completed"
|
|
eventfld.long 0x00 14. " MIDONE14 ,Memory Hardware Initialization Status 14" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 13. " MIDONE13 ,Memory Hardware Initialization Status 13" "Not completed,Completed"
|
|
eventfld.long 0x00 12. " MIDONE12 ,Memory Hardware Initialization Status 12" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 11. " MIDONE11 ,Memory Hardware Initialization Status 11" "Not completed,Completed"
|
|
eventfld.long 0x00 10. " MIDONE10 ,Memory Hardware Initialization Status 10" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 9. " MIDONE9 ,Memory Hardware Initialization Status 9" "Not completed,Completed"
|
|
eventfld.long 0x00 8. " MIDONE8 ,Memory Hardware Initialization Status 8" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 7. " MIDONE7 ,Memory Hardware Initialization Status 7" "Not completed,Completed"
|
|
eventfld.long 0x00 6. " MIDONE6 ,Memory Hardware Initialization Status 6" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 5. " MIDONE5 ,Memory Hardware Initialization Status 5" "Not completed,Completed"
|
|
eventfld.long 0x00 4. " MIDONE4 ,Memory Hardware Initialization Status 4" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 3. " MIDONE3 ,Memory Hardware Initialization Status 3" "Not completed,Completed"
|
|
eventfld.long 0x00 2. " MIDONE2 ,Memory Hardware Initialization Status 2" "Not completed,Completed"
|
|
textline " "
|
|
eventfld.long 0x00 1. " MIDONE1 ,Memory Hardware Initialization Status 1" "Not completed,Completed"
|
|
eventfld.long 0x00 0. " MIDONE0 ,Memory Hardware Initialization Status 0" "Not completed,Completed"
|
|
width 13.
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "PLLCTL1,PLL Control Register 1"
|
|
bitfld.long 0x00 31. " ROS ,Reset on PLL Cycle Slip" "Disabled,Enabled"
|
|
bitfld.long 0x00 29.--30. " BPOS ,Bypass on PLL Slip" "Enabled,Enabled,Disabled,Enabled"
|
|
bitfld.long 0x00 24.--28. " PLLDIV ,PLL Output Clock Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ROF ,Reset on Oscillator Fail" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--21. " REFCLKDIV ,Reference Clock Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64"
|
|
hexmask.long.word 0x00 0.--15. 1. " PLLMUL ,PLL Multiplication Factor"
|
|
group.long 0x74++0x3
|
|
line.long 0x0 "PLLCTL2,PLL Control Register 2"
|
|
bitfld.long 0x00 31. " FMENA ,Frequency Modulation Enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 22.--30. 1. " SPREADINGRATE ,Spreadingrate"
|
|
hexmask.long.word 0x00 12.--20. 1. " BWADJ ,Bandwidth Adjustment"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " ODPLL ,Internal PLL Output Divider" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
hexmask.long.word 0x00 0.--8. 1. " SPR_AMOUNT ,Spreading Amount"
|
|
rgroup.long 0x7C++0x3
|
|
line.long 0x0 "DIEIDL,Die Identification Register, Lower Word"
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x0 "DIEIDH,Die Identification Register Upper Word"
|
|
width 13.
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "VRCTL,Voltage Regulator Control Register"
|
|
bitfld.long 0x00 4.--7. " VLPMENA[3:0] ,Voltage Regulator Global Low Power Modes Enable" "Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Normal,Halt"
|
|
bitfld.long 0x00 0.--3. " VSLEEPENA[3:0] ,Voltage Regulator Sleep Mode Enable" "Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Nonsleep,Sleep"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "LPOMONCTL,LPO/Clock Monitor Control Register"
|
|
bitfld.long 0x00 24. " BIAS_ENABLE ,Bias Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " HFTRIM[3:0] ,High Frequency Oscillator Trim Value" "50 %,56.25 %,62.5 %,68.75 %,81.25 %,87.5 %,100 %,75 %,106.25 %,112.5 %,118.75 %,125 %,131.25%,137.5 %,143.75 %,150 %"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " LFTRIM[3:0] ,Low Frequency Oscillator Trim Value" "50 %,56.25 %,62.5 %,68.75 %,81.25 %,87.5 %,100 %,75 %,106.25 %,112.5 %,118.75 %,125 %,131.25%,137.5 %,143.75 %,150 %"
|
|
width 13.
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "CLKTEST,Clock Test Register"
|
|
bitfld.long 0x00 25. " RANGEDETCTRL ,Range Detection Control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " RANGEDETENSSEL ,Range Detection Enable Select" "Hardware,CLKTEST[RANGEDETCTRL]"
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " CLK_TEST_EN[3:0] ,Clock Test Enable" "Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " SEL_GIO_PIN[3:0] ,Clock Source Valid Signal/Clock Source at Functional GIO Pin Select" "Source 0,Source 1,Source 2,Source 3,Source 4,Source 5,Source 6,Source 7,Source 4/pin,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " SEL_ECP_PIN[3:0] ,Clock at ECP Pin Select" "Oscillator,PLL,32 KHz oscillator,External,LPO low,LPO high,Reserved,Reserved,GCLKMCLK,RTICLK1SRC,RTICLK2SRC,AVCLK1,AVCLK2,?..."
|
|
width 13.
|
|
group.long 0xa0++0x3
|
|
line.long 0x0 "GPREG1,General Purpose Register 1"
|
|
bitfld.long 0x00 11. " GIOA_SBEN ,GIOA port standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " DCAN2_SBEN ,DCAN2 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " DCAN1_SBEN ,DCAN1 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " ADC.ADEVT_SBEN ,ADC.ADEVT standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!="TMS470MF066")
|
|
bitfld.long 0x00 7. " SPI3_SBEN ,SPI3 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 6. " MIBSPI2_SBEN ,MibSPI2 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MIBSPI1 ,MIBSPI1 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LIN2SCI2_SBEN ,LIN/SCI2 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LIN1SCI1_SBEN ,LIN/SCI1 standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HET_SBEN ,HET standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RST_SBEN ,RST standard buffer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ECLK_SBEN ,ECLK standard buffer enable" "Disabled,Enabled"
|
|
hgroup.long 0xA8++0x3
|
|
hide.long 0x0 "IMPFASTS,Imprecise Fault Status Register"
|
|
in
|
|
rgroup.long 0xAC++0x3
|
|
line.long 0x0 "IMPFTADD,Imprecise Fault Write Address Register"
|
|
width 14.
|
|
tree "System Software Interrupt Request Registers"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "SSIR1,System Software Interrupt Request 1 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SSKEY1[7:0] ,System Software Interrupt Request Key"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSDATA1[7:0] ,System Software Interrupt Data"
|
|
group.long 0xFC++0x3
|
|
line.long 0x0 "SSIR1_Mirror,System Software Interrupt Request 1 Register (Mirror)"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SSKEY1[7:0] ,System Software Interrupt Request Key (Mirror)"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSDATA1[7:0] ,System Software Interrupt Data (Mirror)"
|
|
group.long 0xB4++0x3
|
|
line.long 0x0 "SSIR2,System Software Interrupt Request 2 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SSKEY2[7:0] ,System Software Interrupt 2 Request Key"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSDATA2[7:0] ,System Software Interrupt 2 Data"
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "SSIR3,System Software Interrupt Request 3 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SSKEY3[7:0] ,System Software Interrupt 3 Request Key"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSDATA3[7:0] ,System Software Interrupt 3 Data"
|
|
group.long 0xBC++0x3
|
|
line.long 0x0 "SSIR4,System Software Interrupt Request 4 Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SSKEY4[7:0] ,System Software Interrupt 3 Request Key"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SSDATA4[7:0] ,System Software Interrupt 4 Data"
|
|
tree.end
|
|
textline " "
|
|
width 10.
|
|
group.long 0xC0++0x3
|
|
line.long 0x0 "RAMGCR,RAM Control Register"
|
|
bitfld.long 0x00 16.--19. " RAM_DFT_EN[3:0] ,Functional Mode RAM DFT Port Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 14. " WST_AENA3 ,eSRAM3 Address Phase Wait State Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WST_DENA3 ,eSRAM3 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " WST_AENA2 ,eSRAM2 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WST_DENA2 ,eSRAM2 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WST_AENA1 ,eSRAM1 Address Phase Wait State Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " WST_DENA1 ,eSRAM1 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WST_AENA0 ,eSRAM0 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " WST_DENA0 ,eSRAM0 Data Phase Wait State Enable" "Disabled,Enabled"
|
|
group.long 0xC4++0x3
|
|
line.long 0x0 "BMMCR1,Bus Matrix Module Control Register1"
|
|
bitfld.long 0x00 0.--3. " MEMSW[3:0] ,Memory Swap Bit Key" "Reserved,Reserved,Reserved,Reserved,Reserved,Swapped,Reserved,Reserved,Reserved,Reserved,Default,?..."
|
|
width 10.
|
|
group.long 0xC8++0x3
|
|
line.long 0x0 "BMMCR2,Bus Matrix Module Control Register2"
|
|
bitfld.long 0x00 6. " PRTY_HPI ,HPI Arbitration Priority" "Fixed,Round robin"
|
|
bitfld.long 0x00 5. " PRTY_RAM3 ,eSRAM3 Arbitration Priority" "Fixed,Round robin"
|
|
bitfld.long 0x00 4. " PRTY_RAM2 ,eSRAM2 Arbitration Priority" "Fixed,Round robin"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PRTY_CRC ,CRC Arbitration Priority" "Fixed,Round robin"
|
|
bitfld.long 0x00 2. " PRTY_PRG ,Peripheral Bridge Arbitration Priority" "Fixed,Round robin"
|
|
bitfld.long 0x00 1. " PRTY_FLASH ,eSRAM1 Arbitration Priority" "Fixed,Round robin"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PRTY_RAM0 ,eSRAM0 Arbitration Priority" "Fixed,Round robin"
|
|
group.long 0xCC++0x3
|
|
line.long 0x0 "MMUGCR,MMU Global Control Register"
|
|
bitfld.long 0x00 0. " MPMENA ,Memory Protection Mode Enable" "MMU/MPU,MPU"
|
|
width 10.
|
|
group.long 0xD0++0x3
|
|
line.long 0x0 "CLKCNTL,Clock Control Register"
|
|
bitfld.long 0x00 24.--27. " VCLKR2[3:0] ,VBUS Clock 2 Ratio" "HCLK,HCLK/2,HCLK/3,HCLK/4,HCLK/5,HCLK/6,HCLK/7,HCLK/8,HCLK/9,HCLK/10,HCLK/11,HCLK/12,HCLK/13,HCLK/14,HCLK/15,HCLK/16"
|
|
bitfld.long 0x00 16.--19. " VCLKR[3:0] ,VBUS Clock Ratio" "HCLK,HCLK/2,HCLK/3,HCLK/4,HCLK/5,HCLK/6,HCLK/7,HCLK/8,HCLK/9,HCLK/10,HCLK/11,HCLK/12,HCLK/13,HCLK/14,HCLK/15,HCLK/16"
|
|
bitfld.long 0x00 8. " PENA ,Peripheral Enable" "Reset,No reset"
|
|
group.long 0xD4++0x3
|
|
line.long 0x0 "ECPCNTL,ECP Control Register"
|
|
bitfld.long 0x00 24. " ECPSSEL ,ECP Source Clock Select for ECP Module" "Oscillator,VCLK"
|
|
bitfld.long 0x00 23. " ECPCOS ,ECP Continue on Suspend" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " ECPDIV[15:0] ,ECP Divider Value"
|
|
group.long 0xDC++0x3
|
|
line.long 0x0 "DEVCR1,DEV Parity Control Register1"
|
|
bitfld.long 0x00 0.--3. " DEVPARSEL ,Device Parity Select Bit Key" "Reserved,Reserved,Reserved,Reserved,Reserved,Even,Reserved,Reserved,Reserved,Reserved,Odd,?..."
|
|
group.long 0xE0++0x3
|
|
line.long 0x0 "SYSECR,System Exception Control Register"
|
|
bitfld.long 0x00 14.--15. " RESET[1:0] ,Software Reset" "Reset,No reset,Reset,Reset"
|
|
width 10.
|
|
group.long 0xE4++0x3
|
|
line.long 0x0 "SYSESR,System Exception Status Register"
|
|
eventfld.long 0x00 15. " PORST ,Power-Up Reset" "No reset,Reset"
|
|
eventfld.long 0x00 14. " OSCRST ,Oscillator Failure/PLL Cycle Slip Reset" "No reset,Reset"
|
|
eventfld.long 0x00 13. " WDRST ,Watchdog Reset Flag" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 5. " CPURST ,CPU Reset Flag" "No reset,Reset"
|
|
eventfld.long 0x00 4. " SWRST ,Software Reset Flag" "No reset,Reset"
|
|
eventfld.long 0x00 3. " EXTRST ,External Reset Flag" "No reset,Reset"
|
|
textline " "
|
|
eventfld.long 0x00 2. " VSWRST ,Wake Up From Voltage Regulator Sleep Mode Reset Flag" "No reset,Reset"
|
|
width 10.
|
|
group.long 0xEC++0x3
|
|
line.long 0x0 "GLBSTAT,Global Status Register"
|
|
eventfld.long 0x00 9. " FBSLIP ,Over Cycle Slip Detection of PLL" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " RFSLIP ,Under Cycle Slip Detection of PLL" "Not detected,Detected"
|
|
eventfld.long 0x00 0. " OSCFAIL ,Oscillator Fail Flag" "Not failed,Failed"
|
|
rgroup.long 0xF0++0x3
|
|
line.long 0x0 "DEVID,Device Identification Register"
|
|
bitfld.long 0x00 31. " CP15 ,CP15 CPU" "CP15,No CP15"
|
|
hexmask.long.word 0x00 17.--30. 1. " ID ,Device ID"
|
|
bitfld.long 0x00 13.--16. " TECH ,Device Manufacture Process Technology" "C05,F05,C035,F035,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12. " I/O ,Input/Output Voltage" "3.3 V,5 V"
|
|
bitfld.long 0x00 11. " PPAR ,Peripheral Parity" "No parity,Parity"
|
|
bitfld.long 0x00 9.--10. " PROGRAM_PARITY ,Program Memory Parity Present" "Not protected,Single bit,ECC,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8. " RECC ,RAM ECC" "No ECC,ECC"
|
|
hexmask.long.byte 0x00 3.--7. 1. " VERSION ,Version"
|
|
hexmask.long.byte 0x00 0.--2. 1. " PLATFORM_ID ,The TMS470M Platform ID"
|
|
hgroup.long 0xF4++0x3
|
|
hide.long 0x0 "SSIVEC,Software Interrupt Vector Register"
|
|
in
|
|
width 10.
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "SSIF,System Software Interrupt Flag Register"
|
|
eventfld.long 0x00 3. " SSI_FLAG4 ,System Software Interrupt Flag 4" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " SSI_FLAG3 ,System Software Interrupt Flag 3" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " SSI_FLAG2 ,System Software Interrupt Flag 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " SSI_FLAG1 ,System Software Interrupt Flag 1" "No interrupt,Interrupt"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "PCR (Peripheral Central Resource)"
|
|
base ad:0xFFFFE000
|
|
width 12.
|
|
tree "PCR Protection Registers"
|
|
tree "PCR Memory Protection Registers"
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "PMPROTSET0,Set-only Register to Protect PCS Frames 0 to 31"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x10 31. " PCS31PROT_set/clr ,Peripheral Memory Frame Protection 31" "Not protected,Protected"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x10 30. " PCS30PROT_set/clr ,Peripheral Memory Frame Protection 30" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x10 29. " PCS29PROT_set/clr ,Peripheral Memory Frame Protection 29" "Not protected,Protected"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x10 28. " PCS28PROT_set/clr ,Peripheral Memory Frame Protection 28" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x10 27. " PCS27PROT_set/clr ,Peripheral Memory Frame Protection 27" "Not protected,Protected"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x10 26. " PCS26PROT_set/clr ,Peripheral Memory Frame Protection 26" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x10 25. " PCS25PROT_set/clr ,Peripheral Memory Frame Protection 25" "Not protected,Protected"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x10 24. " PCS24PROT_set/clr ,Peripheral Memory Frame Protection 24" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x10 23. " PCS23PROT_set/clr ,Peripheral Memory Frame Protection 23" "Not protected,Protected"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x10 22. " PCS22PROT_set/clr ,Peripheral Memory Frame Protection 22" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x10 21. " PCS21PROT_set/clr ,Peripheral Memory Frame Protection 21" "Not protected,Protected"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x10 20. " PCS20PROT_set/clr ,Peripheral Memory Frame Protection 20" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x10 19. " PCS19PROT_set/clr ,Peripheral Memory Frame Protection 19" "Not protected,Protected"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x10 18. " PCS18PROT_set/clr ,Peripheral Memory Frame Protection 18" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x10 17. " PCS17PROT_set/clr ,Peripheral Memory Frame Protection 17" "Not protected,Protected"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x10 16. " PCS16PROT_set/clr ,Peripheral Memory Frame Protection 16" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x10 15. " PCS15PROT_set/clr ,Peripheral Memory Frame Protection 15" "Not protected,Protected"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x10 14. " PCS14PROT_set/clr ,Peripheral Memory Frame Protection 14" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x10 13. " PCS13PROT_set/clr ,Peripheral Memory Frame Protection 13" "Not protected,Protected"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x10 12. " PCS12PROT_set/clr ,Peripheral Memory Frame Protection 12" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x10 11. " PCS11PROT_set/clr ,Peripheral Memory Frame Protection 11" "Not protected,Protected"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x10 10. " PCS10PROT_set/clr ,Peripheral Memory Frame Protection 10" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x10 9. " PCS9PROT_set/clr ,Peripheral Memory Frame Protection 9" "Not protected,Protected"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x10 8. " PCS8PROT_set/clr ,Peripheral Memory Frame Protection 8" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x10 7. " PCS7PROT_set/clr ,Peripheral Memory Frame Protection 7" "Not protected,Protected"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x10 6. " PCS6PROT_set/clr ,Peripheral Memory Frame Protection 6" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x10 5. " PCS5PROT_set/clr ,Peripheral Memory Frame Protection 5" "Not protected,Protected"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x10 4. " PCS4PROT_set/clr ,Peripheral Memory Frame Protection 4" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x10 3. " PCS3PROT_set/clr ,Peripheral Memory Frame Protection 3" "Not protected,Protected"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x10 2. " PCS2PROT_set/clr ,Peripheral Memory Frame Protection 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x10 1. " PCS1PROT_set/clr ,Peripheral Memory Frame Protection 1" "Not protected,Protected"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x10 0. " PCS0PROT_set/clr ,Peripheral Memory Frame Protection 0" "Not protected,Protected"
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "PMPROTSET1,Set-only Register to Protect PCS Frames 32 to 63"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x10 31. " PCS63PROT_set/clr ,Peripheral Memory Frame Protection 63" "Not protected,Protected"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x10 30. " PCS62PROT_set/clr ,Peripheral Memory Frame Protection 62" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x10 29. " PCS61PROT_set/clr ,Peripheral Memory Frame Protection 61" "Not protected,Protected"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x10 28. " PCS60PROT_set/clr ,Peripheral Memory Frame Protection 60" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x10 27. " PCS59PROT_set/clr ,Peripheral Memory Frame Protection 59" "Not protected,Protected"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x10 26. " PCS58PROT_set/clr ,Peripheral Memory Frame Protection 58" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x10 25. " PCS57PROT_set/clr ,Peripheral Memory Frame Protection 57" "Not protected,Protected"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x10 24. " PCS56PROT_set/clr ,Peripheral Memory Frame Protection 56" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x10 23. " PCS55PROT_set/clr ,Peripheral Memory Frame Protection 55" "Not protected,Protected"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x10 22. " PCS54PROT_set/clr ,Peripheral Memory Frame Protection 54" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x10 21. " PCS53PROT_set/clr ,Peripheral Memory Frame Protection 53" "Not protected,Protected"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x10 20. " PCS52PROT_set/clr ,Peripheral Memory Frame Protection 52" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x10 19. " PCS51PROT_set/clr ,Peripheral Memory Frame Protection 51" "Not protected,Protected"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x10 18. " PCS50PROT_set/clr ,Peripheral Memory Frame Protection 50" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x10 17. " PCS49PROT_set/clr ,Peripheral Memory Frame Protection 49" "Not protected,Protected"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x10 16. " PCS48PROT_set/clr ,Peripheral Memory Frame Protection 48" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x10 15. " PCS47PROT_set/clr ,Peripheral Memory Frame Protection 47" "Not protected,Protected"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x10 14. " PCS46PROT_set/clr ,Peripheral Memory Frame Protection 46" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x10 13. " PCS45PROT_set/clr ,Peripheral Memory Frame Protection 45" "Not protected,Protected"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x10 12. " PCS44PROT_set/clr ,Peripheral Memory Frame Protection 44" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x10 11. " PCS43PROT_set/clr ,Peripheral Memory Frame Protection 43" "Not protected,Protected"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x10 10. " PCS42PROT_set/clr ,Peripheral Memory Frame Protection 42" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x10 9. " PCS41PROT_set/clr ,Peripheral Memory Frame Protection 41" "Not protected,Protected"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x10 8. " PCS40PROT_set/clr ,Peripheral Memory Frame Protection 40" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x10 7. " PCS39PROT_set/clr ,Peripheral Memory Frame Protection 39" "Not protected,Protected"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x10 6. " PCS38PROT_set/clr ,Peripheral Memory Frame Protection 38" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x10 5. " PCS37PROT_set/clr ,Peripheral Memory Frame Protection 37" "Not protected,Protected"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x10 4. " PCS36PROT_set/clr ,Peripheral Memory Frame Protection 36" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x10 3. " PCS35PROT_set/clr ,Peripheral Memory Frame Protection 35" "Not protected,Protected"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x10 2. " PCS34PROT_set/clr ,Peripheral Memory Frame Protection 34" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x10 1. " PCS33PROT_set/clr ,Peripheral Memory Frame Protection 33" "Not protected,Protected"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x10 0. " PCS32PROT_set/clr ,Peripheral Memory Frame Protection 32" "Not protected,Protected"
|
|
tree.end
|
|
width 12.
|
|
textline " "
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "PPROTSET0,Set-only Register to Protect the 32 Quadrants of PS0 to PS7"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PCS7QUAD3PROT_set/clr ,Peripheral Protection 7 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PCS7QUAD2PROT_set/clr ,Peripheral Protection 7 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PCS7QUAD1PROT_set/clr ,Peripheral Protection 7 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PCS7QUAD0PROT_set/clr ,Peripheral Protection 7 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PCS6QUAD3PROT_set/clr ,Peripheral Protection 6 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PCS6QUAD2PROT_set/clr ,Peripheral Protection 6 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PCS6QUAD1PROT_set/clr ,Peripheral Protection 6 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PCS6QUAD0PROT_set/clr ,Peripheral Protection 6 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PCS5QUAD3PROT_set/clr ,Peripheral Protection 5 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PCS5QUAD2PROT_set/clr ,Peripheral Protection 5 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PCS5QUAD1PROT_set/clr ,Peripheral Protection 5 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PCS5QUAD0PROT_set/clr ,Peripheral Protection 5 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PCS4QUAD3PROT_set/clr ,Peripheral Protection 4 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PCS4QUAD2PROT_set/clr ,Peripheral Protection 4 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PCS4QUAD1PROT_set/clr ,Peripheral Protection 4 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PCS4QUAD0PROT_set/clr ,Peripheral Protection 4 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PCS3QUAD3PROT_set/clr ,Peripheral Protection 3 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PCS3QUAD2PROT_set/clr ,Peripheral Protection 3 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PCS3QUAD1PROT_set/clr ,Peripheral Protection 3 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PCS3QUAD0PROT_set/clr ,Peripheral Protection 3 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PCS2QUAD3PROT_set/clr ,Peripheral Protection 2 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PCS2QUAD2PROT_set/clr ,Peripheral Protection 2 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PCS2QUAD1PROT_set/clr ,Peripheral Protection 2 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PCS2QUAD0PROT_set/clr ,Peripheral Protection 2 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PCS1QUAD3PROT_set/clr ,Peripheral Protection 1 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PCS1QUAD2PROT_set/clr ,Peripheral Protection 1 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PCS1QUAD1PROT_set/clr ,Peripheral Protection 1 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PCS1QUAD0PROT_set/clr ,Peripheral Protection 1 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PCS0QUAD3PROT_set/clr ,Peripheral Protection 0 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PCS0QUAD2PROT_set/clr ,Peripheral Protection 0 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PCS0QUAD1PROT_set/clr ,Peripheral Protection 0 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PCS0QUAD0PROT_set/clr ,Peripheral Protection 0 0" "Not protected,Protected"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "PPROTSET1,Set-only Register to Protect the 32 Quadrants of PS8 to PS15"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PCS15QUAD3PROT_set/clr ,Peripheral Protection 15 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PCS15QUAD2PROT_set/clr ,Peripheral Protection 15 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PCS15QUAD1PROT_set/clr ,Peripheral Protection 15 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PCS15QUAD0PROT_set/clr ,Peripheral Protection 15 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PCS14QUAD3PROT_set/clr ,Peripheral Protection 14 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PCS14QUAD2PROT_set/clr ,Peripheral Protection 14 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PCS14QUAD1PROT_set/clr ,Peripheral Protection 14 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PCS14QUAD0PROT_set/clr ,Peripheral Protection 14 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PCS13QUAD3PROT_set/clr ,Peripheral Protection 13 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PCS13QUAD2PROT_set/clr ,Peripheral Protection 13 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PCS13QUAD1PROT_set/clr ,Peripheral Protection 13 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PCS13QUAD0PROT_set/clr ,Peripheral Protection 13 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PCS12QUAD3PROT_set/clr ,Peripheral Protection 12 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PCS12QUAD2PROT_set/clr ,Peripheral Protection 12 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PCS12QUAD1PROT_set/clr ,Peripheral Protection 12 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PCS12QUAD0PROT_set/clr ,Peripheral Protection 12 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PCS11QUAD3PROT_set/clr ,Peripheral Protection 11 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PCS11QUAD2PROT_set/clr ,Peripheral Protection 11 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PCS11QUAD1PROT_set/clr ,Peripheral Protection 11 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PCS11QUAD0PROT_set/clr ,Peripheral Protection 11 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PCS10QUAD3PROT_set/clr ,Peripheral Protection 10 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PCS10QUAD2PROT_set/clr ,Peripheral Protection 10 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PCS10QUAD1PROT_set/clr ,Peripheral Protection 10 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PCS10QUAD0PROT_set/clr ,Peripheral Protection 10 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PCS9QUAD3PROT_set/clr ,Peripheral Protection 9 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PCS9QUAD2PROT_set/clr ,Peripheral Protection 9 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PCS9QUAD1PROT_set/clr ,Peripheral Protection 9 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PCS9QUAD0PROT_set/clr ,Peripheral Protection 9 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PCS8QUAD3PROT_set/clr ,Peripheral Protection 8 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PCS8QUAD2PROT_set/clr ,Peripheral Protection 8 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PCS8QUAD1PROT_set/clr ,Peripheral Protection 8 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PCS8QUAD0PROT_set/clr ,Peripheral Protection 8 0" "Not protected,Protected"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "PPROTSET2,Set-only Register to Protect the 32 Quadrants of PS16 to PS23"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PCS23QUAD3PROT_set/clr ,Peripheral Protection 23 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PCS23QUAD2PROT_set/clr ,Peripheral Protection 23 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PCS23QUAD1PROT_set/clr ,Peripheral Protection 23 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PCS23QUAD0PROT_set/clr ,Peripheral Protection 23 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PCS22QUAD3PROT_set/clr ,Peripheral Protection 22 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PCS22QUAD2PROT_set/clr ,Peripheral Protection 22 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PCS22QUAD1PROT_set/clr ,Peripheral Protection 22 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PCS22QUAD0PROT_set/clr ,Peripheral Protection 22 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PCS21QUAD3PROT_set/clr ,Peripheral Protection 21 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PCS21QUAD2PROT_set/clr ,Peripheral Protection 21 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PCS21QUAD1PROT_set/clr ,Peripheral Protection 21 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PCS21QUAD0PROT_set/clr ,Peripheral Protection 21 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PCS20QUAD3PROT_set/clr ,Peripheral Protection 20 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PCS20QUAD2PROT_set/clr ,Peripheral Protection 20 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PCS20QUAD1PROT_set/clr ,Peripheral Protection 20 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PCS20QUAD0PROT_set/clr ,Peripheral Protection 20 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PCS19QUAD3PROT_set/clr ,Peripheral Protection 19 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PCS19QUAD2PROT_set/clr ,Peripheral Protection 19 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PCS19QUAD1PROT_set/clr ,Peripheral Protection 19 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PCS19QUAD0PROT_set/clr ,Peripheral Protection 19 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PCS18QUAD3PROT_set/clr ,Peripheral Protection 18 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PCS18QUAD2PROT_set/clr ,Peripheral Protection 18 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PCS18QUAD1PROT_set/clr ,Peripheral Protection 18 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PCS18QUAD0PROT_set/clr ,Peripheral Protection 18 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PCS17QUAD3PROT_set/clr ,Peripheral Protection 17 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PCS17QUAD2PROT_set/clr ,Peripheral Protection 17 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PCS17QUAD1PROT_set/clr ,Peripheral Protection 17 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PCS17QUAD0PROT_set/clr ,Peripheral Protection 17 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PCS16QUAD3PROT_set/clr ,Peripheral Protection 16 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PCS16QUAD2PROT_set/clr ,Peripheral Protection 16 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PCS16QUAD1PROT_set/clr ,Peripheral Protection 16 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PCS16QUAD0PROT_set/clr ,Peripheral Protection 16 0" "Not protected,Protected"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "PPROTSET3,Set-only Register to Protect the 32 Quadrants of PS24 to PS31"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PCS31QUAD3PROT_set/clr ,Peripheral Protection 31 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PCS31QUAD2PROT_set/clr ,Peripheral Protection 31 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PCS31QUAD1PROT_set/clr ,Peripheral Protection 31 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PCS31QUAD0PROT_set/clr ,Peripheral Protection 31 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PCS30QUAD3PROT_set/clr ,Peripheral Protection 30 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PCS30QUAD2PROT_set/clr ,Peripheral Protection 30 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PCS30QUAD1PROT_set/clr ,Peripheral Protection 30 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PCS30QUAD0PROT_set/clr ,Peripheral Protection 30 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PCS29QUAD3PROT_set/clr ,Peripheral Protection 29 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PCS29QUAD2PROT_set/clr ,Peripheral Protection 29 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PCS29QUAD1PROT_set/clr ,Peripheral Protection 29 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PCS29QUAD0PROT_set/clr ,Peripheral Protection 29 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PCS28QUAD3PROT_set/clr ,Peripheral Protection 28 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PCS28QUAD2PROT_set/clr ,Peripheral Protection 28 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PCS28QUAD1PROT_set/clr ,Peripheral Protection 28 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PCS28QUAD0PROT_set/clr ,Peripheral Protection 28 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PCS27QUAD3PROT_set/clr ,Peripheral Protection 27 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PCS27QUAD2PROT_set/clr ,Peripheral Protection 27 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PCS27QUAD1PROT_set/clr ,Peripheral Protection 27 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PCS27QUAD0PROT_set/clr ,Peripheral Protection 27 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PCS26QUAD3PROT_set/clr ,Peripheral Protection 26 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PCS26QUAD2PROT_set/clr ,Peripheral Protection 26 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PCS26QUAD1PROT_set/clr ,Peripheral Protection 26 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PCS26QUAD0PROT_set/clr ,Peripheral Protection 26 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PCS25QUAD3PROT_set/clr ,Peripheral Protection 25 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PCS25QUAD2PROT_set/clr ,Peripheral Protection 25 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PCS25QUAD1PROT_set/clr ,Peripheral Protection 25 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PCS25QUAD0PROT_set/clr ,Peripheral Protection 25 0" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PCS24QUAD3PROT_set/clr ,Peripheral Protection 24 3" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PCS24QUAD2PROT_set/clr ,Peripheral Protection 24 2" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PCS24QUAD1PROT_set/clr ,Peripheral Protection 24 1" "Not protected,Protected"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PCS24QUAD0PROT_set/clr ,Peripheral Protection 24 0" "Not protected,Protected"
|
|
tree.end
|
|
width 15.
|
|
tree "PCR Power Down Registers"
|
|
tree "PCR Memory Power Down Registers"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "PCSPWRDWNSET0,Peripheral Memory Power-Down Set Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x10 31. " PCS31PWRDWN_set/clr ,Peripheral Memory Power Down Enable 31" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x10 30. " PCS30PWRDWN_set/clr ,Peripheral Memory Power Down Enable 30" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x10 29. " PCS29PWRDWN_set/clr ,Peripheral Memory Power Down Enable 29" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x10 28. " PCS28PWRDWN_set/clr ,Peripheral Memory Power Down Enable 28" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x10 27. " PCS27PWRDWN_set/clr ,Peripheral Memory Power Down Enable 27" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x10 26. " PCS26PWRDWN_set/clr ,Peripheral Memory Power Down Enable 26" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x10 25. " PCS25PWRDWN_set/clr ,Peripheral Memory Power Down Enable 25" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x10 24. " PCS24PWRDWN_set/clr ,Peripheral Memory Power Down Enable 24" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x10 23. " PCS23PWRDWN_set/clr ,Peripheral Memory Power Down Enable 23" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x10 22. " PCS22PWRDWN_set/clr ,Peripheral Memory Power Down Enable 22" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x10 21. " PCS21PWRDWN_set/clr ,Peripheral Memory Power Down Enable 21" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x10 20. " PCS20PWRDWN_set/clr ,Peripheral Memory Power Down Enable 20" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x10 19. " PCS19PWRDWN_set/clr ,Peripheral Memory Power Down Enable 19" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x10 18. " PCS18PWRDWN_set/clr ,Peripheral Memory Power Down Enable 18" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x10 17. " PCS17PWRDWN_set/clr ,Peripheral Memory Power Down Enable 17" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x10 16. " PCS16PWRDWN_set/clr ,Peripheral Memory Power Down Enable 16" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x10 15. " PCS15PWRDWN_set/clr ,Peripheral Memory Power Down Enable 15" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x10 14. " PCS14PWRDWN_set/clr ,Peripheral Memory Power Down Enable 14" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x10 13. " PCS13PWRDWN_set/clr ,Peripheral Memory Power Down Enable 13" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x10 12. " PCS12PWRDWN_set/clr ,Peripheral Memory Power Down Enable 12" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x10 11. " PCS11PWRDWN_set/clr ,Peripheral Memory Power Down Enable 11" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x10 10. " PCS10PWRDWN_set/clr ,Peripheral Memory Power Down Enable 10" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x10 9. " PCS9PWRDWN_set/clr ,Peripheral Memory Power Down Enable 9" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x10 8. " PCS8PWRDWN_set/clr ,Peripheral Memory Power Down Enable 8" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x10 7. " PCS7PWRDWN_set/clr ,Peripheral Memory Power Down Enable 7" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x10 6. " PCS6PWRDWN_set/clr ,Peripheral Memory Power Down Enable 6" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x10 5. " PCS5PWRDWN_set/clr ,Peripheral Memory Power Down Enable 5" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x10 4. " PCS4PWRDWN_set/clr ,Peripheral Memory Power Down Enable 4" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x10 3. " PCS3PWRDWN_set/clr ,Peripheral Memory Power Down Enable 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x10 2. " PCS2PWRDWN_set/clr ,Peripheral Memory Power Down Enable 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x10 1. " PCS1PWRDWN_set/clr ,Peripheral Memory Power Down Enable 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x10 0. " PCS0PWRDWN_set/clr ,Peripheral Memory Power Down Enable 0" "No power down,Power down"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "PCSPWRDWNSET1,Peripheral Memory Power-Down Set Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x10 31. " PCS63PWRDWN_set/clr ,Peripheral Memory Power Down Enable 63" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x10 30. " PCS62PWRDWN_set/clr ,Peripheral Memory Power Down Enable 62" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x10 29. " PCS61PWRDWN_set/clr ,Peripheral Memory Power Down Enable 61" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x10 28. " PCS60PWRDWN_set/clr ,Peripheral Memory Power Down Enable 60" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x10 27. " PCS59PWRDWN_set/clr ,Peripheral Memory Power Down Enable 59" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x10 26. " PCS58PWRDWN_set/clr ,Peripheral Memory Power Down Enable 58" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x10 25. " PCS57PWRDWN_set/clr ,Peripheral Memory Power Down Enable 57" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x10 24. " PCS56PWRDWN_set/clr ,Peripheral Memory Power Down Enable 56" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x10 23. " PCS55PWRDWN_set/clr ,Peripheral Memory Power Down Enable 55" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x10 22. " PCS54PWRDWN_set/clr ,Peripheral Memory Power Down Enable 54" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x10 21. " PC531PWRDWN_set/clr ,Peripheral Memory Power Down Enable 53" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x10 20. " PCS52PWRDWN_set/clr ,Peripheral Memory Power Down Enable 52" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x10 19. " PCS51PWRDWN_set/clr ,Peripheral Memory Power Down Enable 51" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x10 18. " PCS50PWRDWN_set/clr ,Peripheral Memory Power Down Enable 50" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x10 17. " PCS49PWRDWN_set/clr ,Peripheral Memory Power Down Enable 49" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x10 16. " PCS48PWRDWN_set/clr ,Peripheral Memory Power Down Enable 48" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x10 15. " PCS47PWRDWN_set/clr ,Peripheral Memory Power Down Enable 47" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x10 14. " PCS46PWRDWN_set/clr ,Peripheral Memory Power Down Enable 46" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x10 13. " PCS45PWRDWN_set/clr ,Peripheral Memory Power Down Enable 45" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x10 12. " PCS44PWRDWN_set/clr ,Peripheral Memory Power Down Enable 44" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x10 11. " PCS43PWRDWN_set/clr ,Peripheral Memory Power Down Enable 43" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x10 10. " PCS42PWRDWN_set/clr ,Peripheral Memory Power Down Enable 42" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x10 9. " PCS41PWRDWN_set/clr ,Peripheral Memory Power Down Enable 41" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x10 8. " PCS40PWRDWN_set/clr ,Peripheral Memory Power Down Enable 40" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x10 7. " PCS39PWRDWN_set/clr ,Peripheral Memory Power Down Enable 39" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x10 6. " PCS38PWRDWN_set/clr ,Peripheral Memory Power Down Enable 38" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x10 5. " PCS37PWRDWN_set/clr ,Peripheral Memory Power Down Enable 37" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x10 4. " PCS36PWRDWN_set/clr ,Peripheral Memory Power Down Enable 36" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x10 3. " PCS35PWRDWN_set/clr ,Peripheral Memory Power Down Enable 35" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x10 2. " PCS34PWRDWN_set/clr ,Peripheral Memory Power Down Enable 34" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x10 1. " PCS33PWRDWN_set/clr ,Peripheral Memory Power Down Enable 33" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x10 0. " PCS32PWRDWN_set/clr ,Peripheral Memory Power Down Enable 32" "No power down,Power down"
|
|
tree.end
|
|
width 15.
|
|
textline " "
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PSPWRDWNSET0,Peripheral Power-Down Set Register 0"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PS7QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 7 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PS7QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 7 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PS7QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 7 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PS7QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 7 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PS6QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 6 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PS6QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 6 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PS6QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 6 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PS6QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 6 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PS5QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 5 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PS5QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 5 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PS5QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 5 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PS5QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 5 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PS4QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 4 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PS4QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 4 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PS4QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 4 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PS4QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 4 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PS3QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 3 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PS3QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 3 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PS3QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 3 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PS3QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 3 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PS2QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 2 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PS2QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 2 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PS2QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 2 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PS2QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 2 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PS1QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 1 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PS1QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 1 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PS1QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 1 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PS1QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 1 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PS0QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 0 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PS0QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 0 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PS0QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 0 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PS0QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 0 0" "No power down,Power down"
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "PSPWRDWNSET1,Peripheral Power-Down Set Register 1"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PS15QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 15 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PS15QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 15 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PS15QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 15 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PS15QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 15 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PS14QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 14 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PS14QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 14 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PS14QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 14 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PS14QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 14 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PS13QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 13 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PS13QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 13 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PS13QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 13 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PS13QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 13 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PS12QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 12 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PS12QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 12 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PS12QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 12 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PS12QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 12 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PS11QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 11 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PS11QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 11 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PS11QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 11 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PS11QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 11 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PS10QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 10 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PS10QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 10 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PS10QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 10 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PS10QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 10 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PS9QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 9 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PS9QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 9 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PS9QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 9 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PS9QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 9 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PS8QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 8 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PS8QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 8 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PS8QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 8 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PS8QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 8 0" "No power down,Power down"
|
|
group.long 0x88++0x3
|
|
line.long 0x0 "PSPWRDWNSET2,Peripheral Power-Down Set Register 2"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PS23QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 23 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PS23QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 23 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PS23QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 23 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PS23QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 23 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PS22QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 22 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PS22QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 22 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PS22QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 22 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PS22QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 22 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PS21QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 21 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PS21QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 21 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PS21QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 21 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PS21QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 21 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PS20QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 20 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PS20QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 20 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PS20QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 20 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PS20QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 20 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PS19QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 19 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PS19QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 19 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PS19QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 19 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PS19QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 19 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PS18QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 18 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PS18QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 18 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PS18QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 18 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PS18QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 18 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PS17QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 17 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PS17QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 17 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PS17QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 17 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PS17QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 17 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PS16QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 16 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PS16QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 16 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PS16QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 16 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PS16QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 16 0" "No power down,Power down"
|
|
group.long 0x8C++0x3
|
|
line.long 0x0 "PSPWRDWNSET3,Peripheral Power-Down Set Register 3"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x20 31. " PS31QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 31 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 30. 0x00 30. 0x20 30. " PS31QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 31 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x20 29. " PS31QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 31 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x20 28. " PS31QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 31 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x20 27. " PS30QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 30 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x00 26. 0x20 26. " PS30QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 30 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x20 25. " PS30QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 30 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x20 24. " PS30QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 30 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x00 23. 0x20 23. " PS29QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 29 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x20 22. " PS29QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 29 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x20 21. " PS29QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 29 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x00 20. 0x20 20. " PS29QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 29 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x20 19. " PS28QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 28 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 18. 0x00 18. 0x20 18. " PS28QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 28 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x20 17. " PS28QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 28 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x20 16. " PS28QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 28 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x00 15. 0x20 15. " PS27QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 27 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 14. 0x00 14. 0x20 14. " PS27QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 27 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x20 13. " PS27QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 27 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 12. 0x00 12. 0x20 12. " PS27QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 27 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x20 11. " PS26QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 26 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x20 10. " PS26QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 26 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x20 9. " PS26QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 26 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x20 8. " PS26QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 26 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x20 7. " PS25QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 25 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x20 6. " PS25QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 25 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x20 5. " PS25QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 25 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x20 4. " PS25QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 25 0" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x20 3. " PS24QUAD3PWRDWN_set/clr ,Peripheral Power Down Enable 24 3" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x00 2. 0x20 2. " PS24QUAD2PWRDWN_set/clr ,Peripheral Power Down Enable 24 2" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x20 1. " PS24QUAD1PWRDWN_set/clr ,Peripheral Power Down Enable 24 1" "No power down,Power down"
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x20 0. " PS24QUAD0PWRDWN_set/clr ,Peripheral Power Down Enable 24 0" "No power down,Power down"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "WCR (Wakeup Control Registers)"
|
|
base ad:0xFFFFED00
|
|
width 11.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "RSTCR,Wakeup Reset Control Register"
|
|
bitfld.long 0x00 0. " RST ,Reset" "Reset,No reset"
|
|
line.long 0x04 "EXTWAKENR,External Wakeup Enable Register"
|
|
bitfld.long 0x04 15. " WAKE_ENA15 ,Wakeup 15 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " WAKE_ENA14 ,Wakeup 14 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " WAKE_ENA13 ,Wakeup 13 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " WAKE_ENA12 ,Wakeup 12 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " WAKE_ENA11 ,Wakeup 11 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " WAKE_ENA10 ,Wakeup 10 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " WAKE_ENA9 ,Wakeup 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " WAKE_ENA8 ,Wakeup 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WAKE_ENA7 ,Wakeup 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " WAKE_ENA6 ,Wakeup 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " WAKE_ENA5 ,Wakeup 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " WAKE_ENA4 ,Wakeup 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " WAKE_ENA3 ,Wakeup 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " WAKE_ENA2 ,Wakeup 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " WAKE_ENA1 ,Wakeup 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " WAKE_ENA0 ,Wakeup 0 enable" "Disabled,Enabled"
|
|
line.long 0x08 "EXTWAKLVR,External Wakeup Level Register"
|
|
bitfld.long 0x08 15. " WAKE_LVL15 ,Wakeup 15 level" "Low,High"
|
|
bitfld.long 0x08 14. " WAKE_LVL14 ,Wakeup 14 level" "Low,High"
|
|
bitfld.long 0x08 13. " WAKE_LVL13 ,Wakeup 13 level" "Low,High"
|
|
bitfld.long 0x08 12. " WAKE_LVL12 ,Wakeup 12 level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 11. " WAKE_LVL11 ,Wakeup 11 level" "Low,High"
|
|
bitfld.long 0x08 10. " WAKE_LVL10 ,Wakeup 10 level" "Low,High"
|
|
bitfld.long 0x08 9. " WAKE_LVL9 ,Wakeup 9 level" "Low,High"
|
|
bitfld.long 0x08 8. " WAKE_LVL8 ,Wakeup 8 level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 7. " WAKE_LVL7 ,Wakeup 7 level" "Low,High"
|
|
bitfld.long 0x08 6. " WAKE_LVL6 ,Wakeup 6 level" "Low,High"
|
|
bitfld.long 0x08 5. " WAKE_LVL5 ,Wakeup 5 level" "Low,High"
|
|
bitfld.long 0x08 4. " WAKE_LVL4 ,Wakeup 4 level" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x08 3. " WAKE_LVL3 ,Wakeup 3 level" "Low,High"
|
|
bitfld.long 0x08 2. " WAKE_LVL2 ,Wakeup 2 level" "Low,High"
|
|
bitfld.long 0x08 1. " WAKE_LVL1 ,Wakeup 1 level" "Low,High"
|
|
bitfld.long 0x08 0. " WAKE_LVL0 ,Wakeup 0 level" "Low,High"
|
|
line.long 0x0C "EXTWAKESR,External Wakeup Status Register"
|
|
eventfld.long 0x0C 15. " WAKE_FLAG15 ,Wakeup 15 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 14. " WAKE_FLAG14 ,Wakeup 14 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 13. " WAKE_FLAG13 ,Wakeup 13 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 12. " WAKE_FLAG12 ,Wakeup 12 status" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x0C 11. " WAKE_FLAG11 ,Wakeup 11 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 10. " WAKE_FLAG10 ,Wakeup 10 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 9. " WAKE_FLAG9 ,Wakeup 9 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 8. " WAKE_FLAG8 ,Wakeup 8 status" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x0C 7. " WAKE_FLAG7 ,Wakeup 7 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 6. " WAKE_FLAG6 ,Wakeup 6 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 5. " WAKE_FLAG5 ,Wakeup 5 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 4. " WAKE_FLAG4 ,Wakeup 4 status" "Not generated,Generated"
|
|
textline " "
|
|
eventfld.long 0x0C 3. " WAKE_FLAG3 ,Wakeup 3 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 2. " WAKE_FLAG2 ,Wakeup 2 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 1. " WAKE_FLAG1 ,Wakeup 1 status" "Not generated,Generated"
|
|
eventfld.long 0x0C 0. " WAKE_FLAG0 ,Wakeup 0 status" "Not generated,Generated"
|
|
line.long 0x10 "HIBXSTATR,Hibernate Exit and Status Register"
|
|
eventfld.long 0x10 0. " EXITHIB ,Exit hibernate" "Not entered,Entered"
|
|
width 0xb
|
|
tree.end
|
|
tree "SYS2 (System Control Registers Secondary Frame)"
|
|
base ad:0xFFFFE100
|
|
width 10.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "STCLKDIV,CPU Logic BIST Clock Prescaler"
|
|
bitfld.long 0x00 24.--26. " CLKDIV ,Clock divider/prescaler for CPU clock during logic BIST" "/1,/2,/3,/4,/5,/6,/7,/8"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "eSRAM (Embedded SRAM)"
|
|
base ad:0xFFFFF900
|
|
width 16.
|
|
group.word 0x00++0x03
|
|
line.word 0x00 "RAMCTRL,Ram Control Register"
|
|
bitfld.word 0x00 9.--12. " RMWCBYP ,Read Modify Write Correction Bypass" "Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.word 0x00 8. " ECC_WRT_ENA ,ECC Write Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--3. " ECC_ENABLE[3:0] ,ECC Enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
group.word 0x04++0x03
|
|
line.word 0x00 "RAMTHRESHOLD,Threshold Register"
|
|
group.word 0x08++0x03
|
|
line.word 0x00 "RAMOCCUR,Occurrence Register"
|
|
group.word 0x0C++0x03
|
|
line.word 0x00 "RAMINTCTRL,Interrupt Control Register"
|
|
bitfld.word 0x00 0. " SECINTEN ,Single Error Correct Interrupt Enable" "Disabled,Enabled"
|
|
group.word 0x10++0x03
|
|
line.word 0x00 "RAMERRSTATUS,Memory Fault Detect Status Register"
|
|
bitfld.word 0x00 0. " SECINTFLAG ,Single Error Correct Interrupt Flag" "No error,Error"
|
|
rgroup.word 0x14++0x03
|
|
line.word 0x00 "RAMSERRADDR,Single Error Address Register"
|
|
hexmask.word 0x00 0.--14. 1. " SERRADDR ,Error Address"
|
|
rgroup.word 0x18++0x03
|
|
line.word 0x00 "RAMERRPOSITION,RAM Error Position Register"
|
|
bitfld.word 0x00 8. " ERRTYPE ,Error Type" "Data bit error,Check bit error"
|
|
bitfld.word 0x00 0.--5. " SERRPOSITION[5:0] ,Single Error Postion" "Bit[0],Bit[1],Bit[2],Bit[3],Bit[4],Bit[5],Bit[6],Bit[7],Bit[8],Bit[9],Bit[10],Bit[11],Bit[12],Bit[13],Bit[14],Bit[15],Bit[16],Bit[17],Bit[18],Bit[19],Bit[20],Bit[21],Bit[22],Bit[23],Bit[24],Bit[25],Bit[26],Bit[27],Bit[28],Bit[29],Bit[30],Bit[31],Bit[32],Bit[33],Bit[34],Bit[35],Bit[36],Bit[37],Bit[38],Bit[39],Bit[40],Bit[41],Bit[42],Bit[43],Bit[44],Bit[45],Bit[46],Bit[47],Bit[48],Bit[49],Bit[50],Bit[51],Bit[52],Bit[53],Bit[54],Bit[55],Bit[56],Bit[57],Bit[58],Bit[59],Bit[60],Bit[61],Bit[62],Bit[63]"
|
|
rgroup.word 0x1C++0x03
|
|
line.word 0x00 "RAMDERRADDR,Double Error Address Register"
|
|
hexmask.word 0x00 0.--14. 1. " DERRADDR ,Double Error Address"
|
|
group.word 0x20++0x03
|
|
line.word 0x00 "RAMCTRL2,RAW DATA 0 Register"
|
|
bitfld.word 0x00 8. " EMULATION_TRACE_DIS ,Emulation Trace Disable" "No,Yes"
|
|
bitfld.word 0x00 0.--3. " EDACCMODE ,Error Detection Mode" "Enabled,Enabled,Enabled,Enabled,Enabled,Detection,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "F035 Flash"
|
|
base ad:0xFFF87000
|
|
width 14.
|
|
group.long 0x00++0x13
|
|
line.long 0x0 "FRDCNTL,Read Control Register"
|
|
bitfld.long 0x00 8.--11. " RWAIT ,Random Read Wait State" "0 cycles,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles"
|
|
bitfld.long 0x00 4. " ASWSTEN ,Address Setup Wait State Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENPIPE ,Enable Pipeline Mode" "Disabled,Enabled"
|
|
line.long 0x4 "FSPRD,Special Read Control Register"
|
|
bitfld.long 0x04 1. " RM1 ,Read Margin 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " RM0 ,Read Margin 0" "Disabled,Enabled"
|
|
line.long 0x8 "FEDACCTRL1,Error Correction Control Register1"
|
|
bitfld.long 0x08 24. " SUSP_IGNR ,Suspend Ignore" "Not ignored,Ignored"
|
|
bitfld.long 0x08 16.--19. " EDACMODE ,Error Correction Mode" "Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Detection mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode,Correction mode"
|
|
textline " "
|
|
sif (cpu()=="TMS470MF031")||(cpu()=="TMS470MF042")||(cpu()=="TMS470MF066")
|
|
bitfld.long 0x08 10. " EOFEN ,Error on One Fail Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 9. " EZFEN ,Error on Zero Fail Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 8. " EPEN ,Error Profiling Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 5. " EOCV ,One Condition Valid" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " EZCV ,Zero Condition Valid" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " EDACEN ,Error Detection and Correction Enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
line.long 0xc "FEDACCTRL2,Error Correction Control Register2"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SEC_THRESHOLD ,Single Error Correction Threshold"
|
|
line.long 0x10 "FCOR_ERR_CNT,Error Correction Counter Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " COR_ERR_CNT ,Correctable Error Counter"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "FCOR_ERR_ADD,Correctable Error Address"
|
|
hexmask.long 0x00 3.--26. 0x8 " COR_ERR_ADD ,Error Address"
|
|
bitfld.long 0x00 0.--2. " WORD_OFFSET ,Last 3 digit of the correctable error address" "000,001,010,011,100,101,110,111"
|
|
sif (cpu()=="TMS470MF031")||(cpu()=="TMS470MF042")||(cpu()=="TMS470MF066")
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x0 "FCOR_ERR_POS,Correctable Error Position Register"
|
|
bitfld.long 0x00 8. " ECC_ERR ,Error Type" "Data bit error,Check bit error"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " SERR_POS ,Single Error Position"
|
|
endif
|
|
width 14.
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FEDACSTATUS,Error Status Register"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
eventfld.long 0x00 10. " ADD_PAR_ERR ,Address Parity Error" "Not detected,Detected"
|
|
eventfld.long 0x00 8. " ECC_MUL_ERR ,Multiple bit ECC or Parity Error Status Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 1. " SBE_FLG ,Single bit ECC Status Flag" "Not detected,Detected"
|
|
else
|
|
eventfld.long 0x00 8. " ECC_MUL_ERR ,Multiple bit ECC Status Flag," "Not detected,Detected"
|
|
eventfld.long 0x00 2. " ERR_ONE_FLG ,Error On One Fail Status Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 1. " ERR_ZERO_FLG ,Error On Zero Fail Status Flag" "Not detected,Detected"
|
|
endif
|
|
eventfld.long 0x00 0. " ERR_PRF_FLG ,Error Profiling Status Flag" "Not detected,Detected"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "FUNC_ERR_ADD,Un-correctable Error Address"
|
|
hexmask.long 0x00 3.--31. 0x8 " UNC_ERR_ADD ,Un-correctable Error Address"
|
|
bitfld.long 0x00 0.--2. " WORD_OFFSET ,Last 3 digit of the address" "000,001,010,011,100,101,110,111"
|
|
width 14.
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "FEDACSDIS,Error Detection Sector Disable"
|
|
bitfld.long 0x0 29.--31. " BANKID1_INVERSE[2:0] ,Inverted Bank Number 1" "Reserved,Reserved,Reserved,Reserved,Bank 3,Bank 2,Bank 1,Bank 0"
|
|
bitfld.long 0x0 24.--27. " SECTORID1_INVERSE[3:0] ,Inverted Sector Number 1" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sector 7,Sector 6,Sector 5,Sector 4,Sector 3,Sector 2,Sector 1,Sector 0"
|
|
textline " "
|
|
bitfld.long 0x0 21.--23. " BANKID1[2:0] ,Bank Number 1" "Bank 0,Bank 1,Bank 2,Bank 3,?..."
|
|
bitfld.long 0x0 16.--19. " SECTORID1[3:0] ,Sector Number 1" "Sector 0,Sector 1,Sector 2,Sector 3,Sector 4,Sector 5,Sector 6,Sector 7,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13.--15. " BANKID0_INVERSE[2:0] ,Inverted Bank Number 0" "Reserved,Reserved,Reserved,Reserved,Bank 3,Bank 2,Bank 1,Bank 0"
|
|
bitfld.long 0x0 8.--11. " SECTORID0_INVERSE[3:0] ,Inverted Sector Number 0" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sector 7,Sector 6,Sector 5,Sector 4,Sector 3,Sector 2,Sector 1,Sector 0"
|
|
textline " "
|
|
bitfld.long 0x0 5.--7. " BANKID0[2:0] ,Bank Number 0" "Bank 0,Bank 1,Bank 2,Bank 3,?..."
|
|
bitfld.long 0x0 0.--3. " SECTORID0[3:0] ,Sector Number 0" "Sector 0,Sector 1,Sector 2,Sector 3,Sector 4,Sector 5,Sector 6,Sector 7,?..."
|
|
group.long 0xc0++0x3
|
|
line.long 0x0 "FEDACSDIS2,Error Detection Sector Disable Register 2"
|
|
bitfld.long 0x0 29.--31. " BANKID3_INVERSE[2:0] ,Inverted Bank Number 3" "Reserved,Reserved,Reserved,Reserved,Bank 3,Bank 2,Bank 1,Bank 0"
|
|
bitfld.long 0x0 24.--27. " SECTORID3_INVERSE[3:0] ,Inverted Sector Number 3" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sector 7,Sector 6,Sector 5,Sector 4,Sector 3,Sector 2,Sector 1,Sector 0"
|
|
textline " "
|
|
bitfld.long 0x0 21.--23. " BANKID3[2:0] ,Bank Number 3" "Bank 0,Bank 1,Bank 2,Bank 3,?..."
|
|
bitfld.long 0x0 16.--19. " SECTORID3[3:0] ,Sector Number 3" "Sector 0,Sector 1,Sector 2,Sector 3,Sector 4,Sector 5,Sector 6,Sector 7,?..."
|
|
textline " "
|
|
bitfld.long 0x0 13.--15. " BANKID2_INVERSE[2:0] ,Inverted Bank Number 2" "Reserved,Reserved,Reserved,Reserved,Bank 3,Bank 2,Bank 1,Bank 0"
|
|
bitfld.long 0x0 8.--11. " SECTORID2_INVERSE[3:0] ,Inverted Sector Number 2" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sector 7,Sector 6,Sector 5,Sector 4,Sector 3,Sector 2,Sector 1,Sector 0"
|
|
textline " "
|
|
bitfld.long 0x0 5.--7. " BANKID2[2:0] ,Bank Number 2" "Bank 0,Bank 1,Bank 2,Bank 3,?..."
|
|
bitfld.long 0x0 0.--3. " SECTORID2[3:0] ,Sector Number 2" "Sector 0,Sector 1,Sector 2,Sector 3,Sector 4,Sector 5,Sector 6,Sector 7,?..."
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "FBPROT,Bank Protection Register"
|
|
bitfld.long 0x00 0. " PROTL1DIS ,Level 1 Protection Disabled" "Yes,No"
|
|
line.long 0x4 "FBSE,Bank Sector Enable Register"
|
|
bitfld.long 0x04 15. " BSE[15] ,Bank Sector Enable 15" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " BSE[14] ,Bank Sector Enable 14" "Disabled,Enabled"
|
|
bitfld.long 0x04 13. " BSE[13] ,Bank Sector Enable 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " BSE[12] ,Bank Sector Enable 12" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " BSE[11] ,Bank Sector Enable 11" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " BSE[10] ,Bank Sector Enable 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 9. " BSE[9] ,Bank Sector Enable 9" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " BSE[8] ,Bank Sector Enable 8" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " BSE[7] ,Bank Sector Enable 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 6. " BSE[6] ,Bank Sector Enable 6" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " BSE[5] ,Bank Sector Enable 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BSE[4] ,Bank Sector Enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " BSE[3] ,Bank Sector Enable 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " BSE[2] ,Bank Sector Enable 2" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " BSE[1] ,Bank Sector Enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " BSE[0] ,Bank Sector Enable 0" "Disabled,Enabled"
|
|
width 14.
|
|
group.long 0x3C++0x7
|
|
line.long 0x0 "FBAC,Bank Access Control Register"
|
|
bitfld.long 0x00 23. " OTPPROTDIS[7] ,OTP Sector Protection Disable 7" "No,Yes"
|
|
bitfld.long 0x00 22. " OTPPROTDIS[6] ,OTP Sector Protection Disable 6" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 21. " OTPPROTDIS[5] ,OTP Sector Protection Disable 5" "No,Yes"
|
|
bitfld.long 0x00 20. " OTPPROTDIS[4] ,OTP Sector Protection Disable 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OTPPROTDIS[3] ,OTP Sector Protection Disable 3" "No,Yes"
|
|
bitfld.long 0x00 18. " OTPPROTDIS[2] ,OTP Sector Protection Disable 2" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 17. " OTPPROTDIS[1] ,OTP Sector Protection Disable 1" "No,Yes"
|
|
bitfld.long 0x00 16. " OTPPROTDIS[0] ,OTP Sector Protection Disable 0" "No,Yes"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " BAGP[7:0] ,Bank Active Grace Period"
|
|
hexmask.long.byte 0x00 0.--7. 1. " VREADST[7:0] ,VREAD Setup"
|
|
line.long 0x4 "FBFALLBACK,Bank Fallback Power Register"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
bitfld.long 0x04 6.--7. " BANKPWR3[1:0] ,Bank 3 Fallback Power Mode" "Sleep,Standby,Reserved,Active"
|
|
bitfld.long 0x04 4.--5. " BANKPWR2[1:0] ,Bank 2 Fallback Power Mode" "Sleep,Standby,Reserved,Active"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x04 2.--3. " BANKPWR1[1:0] ,Bank 1 Fallback Power Mode" "Sleep,Standby,Reserved,Active"
|
|
bitfld.long 0x04 0.--1. " BANKPWR0[1:0] ,Bank 0 Fallback Power Mode" "Sleep,Standby,Reserved,Active"
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "FBPRDY,Bank/Pump Ready Register"
|
|
bitfld.long 0x00 15. " PUMPRDY ,Pump Ready" "Not ready,Ready"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
bitfld.long 0x00 3. " BANKRDY[3] ,Bank Ready 3" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 2. " BANKRDY[2] ,Bank Ready 2" "Not ready,Ready"
|
|
endif
|
|
bitfld.long 0x00 1. " BANKRDY[1] ,Bank Ready 1" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BANKRDY[0] ,Bank Ready 0" "Not ready,Ready"
|
|
group.long 0x48++0xb
|
|
line.long 0x0 "FPAC1,Pump Access Control Register 1"
|
|
hexmask.long.word 0x00 16.--26. 1. " PSLEEP[10:0] ,Pump Sleep"
|
|
bitfld.long 0x00 0. " PUMPPWR ,Flash Charge Pump Fallback Power Mode" "Sleep,Active"
|
|
line.long 0x4 "FPAC2,Pump Access Control Register 2"
|
|
hexmask.long.word 0x4 0.--15. 1. " PAGP[15:0] ,Pump Active Grace Period"
|
|
line.long 0x8 "FMAC,Module Access Control Register"
|
|
bitfld.long 0x8 0.--2. " BANK[2:0] ,Bank Enable" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7"
|
|
sif (cpu()=="TMS470MF031")||(cpu()=="TMS470MF042")||(cpu()=="TMS470MF066")
|
|
group.long 0x58++0x7
|
|
line.long 0x0 "FEMU_DMSW,EEPROM Emulation Data MSW Register"
|
|
line.long 0x4 "FEMU_DLSW,EEPROM Emulation Data LSW Register"
|
|
endif
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "FEMU_ECC,EEPROM Emulation ECC Register"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
hexmask.long.byte 0x00 16.--23. 1. " RD_ECC ,Special RD_ECC for CPU_TYPE=5 Configurations Only"
|
|
hexmask.long.byte 0x00 0.--7. 1. " EMU_ECC ,Emulation ECC"
|
|
else
|
|
hexmask.long.byte 0x00 0.--7. 1. " EMU_ECC ,Emulation ECC"
|
|
endif
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
group.long 0x7C++0x3
|
|
line.long 0x0 "FPAR_OVR,Parity Override"
|
|
bitfld.long 0x00 12.--15. " BUS_PAR_DIS ,Disable Bus Parity" "Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " PAR_OVR_KEY ,PAR_OVR_KEY" "DEVCR1,DEVCR1,DEVCR1,DEVCR1,DEVCR1,ADD/DAT_INV_PAR,DEVCR1,DEVCR1"
|
|
bitfld.long 0x00 8. " ADD_INV_PAR ,Address Odd Parity" "Inverted,Not inverted"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "M3VIM (Cortex-M3 Vectored Interrupt Manager)"
|
|
base ad:0xFFFFFE00
|
|
width 14.
|
|
rgroup.long 0x00++0x07
|
|
line.long 0x00 "INTISRIVEC,Index Offset Vector Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " INTISRIVEC ,INTISRIVEC [7:0]"
|
|
line.long 0x04 "INTNMIIVEC,Index Offset Vector Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " INTNMIIVEC ,INTNMIIVEC [7:0]"
|
|
group.long 0x08++0x0F
|
|
line.long 0x00 "NEST_CTRL,Program Control Register"
|
|
bitfld.long 0x00 0.--3. " NEST_ENABLE ,NEST_ENABLE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "NEST_STAT,Program Control Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " NEST_LEVEL ,Nest Level"
|
|
bitfld.long 0x04 1. " NEST_STAT ,Nest Status" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " NEST_OVRN ,Nesting Level Over-Run" "Not full,Full"
|
|
line.long 0x08 "NMIPR0,Pending Interrupt Read Location Register"
|
|
bitfld.long 0x08 31. " NMIPR0[31] ,ADC magnitude threshold interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 30. " NMIPR0[30] ,DCAN2 level 1 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 29. " NMIPR0[29] ,DCAN2 level 0 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 28. " NMIPR0[28] ,MibSPIP2 level 1 interrupt request type" "INTISR,INTNMI"
|
|
textline " "
|
|
bitfld.long 0x08 27. " NMIPR0[27] ,MibSPIP2 level 0 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 26. " NMIPR0[26] ,ADC sw group 2 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 25. " NMIPR0[25] ,ADC sw group 1 interrupt request type" "INTISR,INTNMI"
|
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bitfld.long 0x08 24. " NMIPR0[24] ,ADC event group interrupt request type" "INTISR,INTNMI"
|
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textline " "
|
|
bitfld.long 0x08 23. " NMIPR0[23] ,DCAN1 level 1 Interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 22. " NMIPR0[22] ,DCAN1 level 0 Interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 21. " NMIPR0[21] ,LIN1/SCI1 level 1 interrupt request type" "INTISR,INTNMI"
|
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bitfld.long 0x08 20. " NMIPR0[20] ,LIN1/SCI1 level 0 interrupt request type" "INTISR,INTNMI"
|
|
textline " "
|
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bitfld.long 0x08 19. " NMIPR0[19] ,LIN2/SCI2 level 1 Interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 18. " NMIPR0[18] ,LIN2/SCI2 level 0 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 16. " NMIPR0[16] ,MibSPI1 level 1 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 15. " NMIPR0[15] ,MibSPI1 level 0 interrupt request type" "INTISR,INTNMI"
|
|
textline " "
|
|
bitfld.long 0x08 14. " NMIPR0[14] ,HET level 1 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 13. " NMIPR0[13] ,HET level 0 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 12. " NMIPR0[12] ,GIO Interrupt B request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 11. " NMIPR0[11] ,GIO Interrupt A request type" "INTISR,INTNMI"
|
|
textline " "
|
|
bitfld.long 0x08 9. " NMIPR0[9] ,RTI overflow interrupt 1 request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 8. " NMIPR0[8] ,RTI overflow interrupt 0 request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 7. " NMIPR0[7] ,RTI compare interrupt 3 request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 6. " NMIPR0[6] ,RTI compare interrupt 2 request type" "INTISR,INTNMI"
|
|
textline " "
|
|
bitfld.long 0x08 5. " NMIPR0[5] ,RTI compare interrupt 1 request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 4. " NMIPR0[4] ,RTI compare interrupt 0 request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 3. " NMIPR0[3] ,Software interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x08 2. " NMIPR0[2] ,ESM Low level interrupt request type" "INTISR,INTNMI"
|
|
textline " "
|
|
bitfld.long 0x08 0. " NMIPR0[0] ,ESM High level interrupt request type" "INTISR,INTNMI"
|
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line.long 0x0c "NMIPR1,Pending Interrupt Read Location Register"
|
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bitfld.long 0x0c 3. " NMIPR0[35] ,DCAN2 IF3 interrupt request type" "INTISR,INTNMI"
|
|
bitfld.long 0x0c 2. " NMIPR0[34] ,DCAN1 IF3 interrupt request type" "INTISR,INTNMI"
|
|
rgroup.long 0x20++0x07
|
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line.long 0x00 "INTREQ0,Pending Interrupt Read Location Register"
|
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bitfld.long 0x00 31. " INTREQ[31] ,ADC magnitude threshold interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 30. " INTREQ[30] ,DCAN2 level 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 29. " INTREQ[29] ,DCAN2 level 0 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 28. " INTREQ[28] ,MibSPIP2 level 1 interrupt request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INTREQ[27] ,MibSPIP2 level 0 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 26. " INTREQ[26] ,ADC sw group 2 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " INTREQ[25] ,ADC sw group 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 24. " INTREQ[24] ,ADC event group interrupt request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INTREQ[23] ,DCAN1 level 1 Interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 22. " INTREQ[22] ,DCAN1 level 0 Interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 21. " INTREQ[21] ,LIN1/SCI1 level 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 20. " INTREQ[20] ,LIN1/SCI1 level 0 interrupt request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INTREQ[19] ,LIN2/SCI2 level 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 18. " INTREQ[18] ,LIN2/SCI2 level 0 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " INTREQ[16] ,MibSPI1 level 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 15. " INTREQ[15] ,MibSPI1 level 0 interrupt request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 14. " INTREQ[14] ,HET level 1 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 13. " INTREQ[13] ,HET level 0 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 12. " INTREQ[12] ,GIO Interrupt B request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 11. " INTREQ[11] ,GIO Interrupt A request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INTREQ[9] ,RTI overflow interrupt 1 request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 8. " INTREQ[8] ,RTI overflow interrupt 0 request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 7. " INTREQ[7] ,RTI compare interrupt 3 request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 6. " INTREQ[6] ,RTI compare interrupt 2 request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INTREQ[5] ,RTI compare interrupt 1 request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 4. " INTREQ[4] ,RTI compare interrupt 0 request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 3. " INTREQ[3] ,Software interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x00 2. " INTREQ[2] ,ESM Low level interrupt request pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INTREQ[0] ,ESM High level interrupt request pending" "Not pending,Pending"
|
|
line.long 0x04 "INTREQ1,Pending Interrupt Read Location Register"
|
|
bitfld.long 0x04 3. " INTREQ[35] ,DCAN2 IF3 interrupt request pending" "Not pending,Pending"
|
|
bitfld.long 0x04 2. " INTREQ[34] ,DCAN1 IF3 interrupt request pending" "Not pending,Pending"
|
|
group.long 0x30++0x07
|
|
line.long 0x00 "REQMASKSET0,Interrupt Mask Set Register"
|
|
bitfld.long 0x00 31. " REQMASKSET0[31] ,ADC magnitude threshold interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " REQMASKSET0[30] ,DCAN2 level 1 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " REQMASKSET0[29] ,DCAN2 level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " REQMASKSET0[28] ,MibSPI2 level 1 interrupt Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REQMASKSET0[27] ,MibSPI2 level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " REQMASKSET0[26] ,ADC sw group 2 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " REQMASKSET0[25] ,ADC sw group 1 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " REQMASKSET0[24] ,ADC event group interrupt Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REQMASKSET0[23] ,DCAN1 level 1 Interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " REQMASKSET0[22] ,DCAN1 level 0 Interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " REQMASKSET0[21] ,LIN/SCI1 level 1 Interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " REQMASKSET0[20] ,LIN/SCI1 level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REQMASKSET0[19] ,LIN/SCI2 level 1 Interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " REQMASKSET0[18] ,LIN/SCI2 level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " REQMASKSET0[16] ,MibSPI1 level 1 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " REQMASKSET0[15] ,MibSPI1 level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " REQMASKSET0[14] ,HET level 1 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REQMASKSET0[13] ,HET level 0 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " REQMASKSET0[12] ,GIO Interrupt B Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " REQMASKSET0[11] ,GIO Interrupt A Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " REQMASKSET0[9] ,RTI overflow interrupt 1 Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " REQMASKSET0[8] ,RTI overflow interrupt 0 Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " REQMASKSET0[7] ,RTI compare interrupt 3 Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " REQMASKSET0[6] ,RTI compare interrupt 2 Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " REQMASKSET0[5] ,RTI compare interrupt 1 Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " REQMASKSET0[4] ,RTI compare interrupt 0 Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " REQMASKSET0[3] ,Software interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REQMASKSET0[2] ,ESM Low level interrupt Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REQMASKSET0[0] ,ESM High level interrupt Mask Set" "Disabled,Enabled"
|
|
line.long 0x04 "REQMASKSET1,Interrupt Mask Set Register"
|
|
bitfld.long 0x04 3. " REQMASKSET1[35] ,DCAN2 IF3 interrupt Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " REQMASKSET1[34] ,DCAN1 IF3 interrupt Mask Set" "Disabled,Enabled"
|
|
group.long 0x40++0x07
|
|
line.long 0x00 "REQMASKCLR0,Interrupt Mask Clear Register"
|
|
bitfld.long 0x00 31. " REQMASKCLR0[31] ,ADC magnitude threshold interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " REQMASKCLR0[30] ,DCAN2 level 1 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " REQMASKCLR0[29] ,DCAN2 level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " REQMASKCLR0[28] ,MibSPI2 level 1 interrupt Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " REQMASKCLR0[27] ,MibSPI2 level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " REQMASKCLR0[26] ,ADC sw group 2 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " REQMASKCLR0[25] ,ADC sw group 1 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " REQMASKCLR0[24] ,ADC event group interrupt Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " REQMASKCLR0[23] ,DCAN1 level 1 Interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " REQMASKCLR0[22] ,DCAN1 level 0 Interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " REQMASKCLR0[21] ,LIN/SCI1 level 1 Interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " REQMASKCLR0[20] ,LIN/SCI1 level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " REQMASKCLR0[19] ,LIN/SCI2 level 1 Interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " REQMASKCLR0[18] ,LIN/SCI2 level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " REQMASKCLR0[16] ,MibSPI1 level 1 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " REQMASKCLR0[15] ,MibSPI1 level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " REQMASKCLR0[14] ,HET level 1 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " REQMASKCLR0[13] ,HET level 0 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " REQMASKCLR0[12] ,GIO Interrupt B Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " REQMASKCLR0[11] ,GIO Interrupt A Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " REQMASKCLR0[9] ,RTI overflow interrupt 1 Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " REQMASKCLR0[8] ,RTI overflow interrupt 0 Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " REQMASKCLR0[7] ,RTI compare interrupt 3 Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " REQMASKCLR0[6] ,RTI compare interrupt 2 Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " REQMASKCLR0[5] ,RTI compare interrupt 1 Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " REQMASKCLR0[4] ,RTI compare interrupt 0 Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " REQMASKCLR0[3] ,Software interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " REQMASKCLR0[2] ,ESM Low level interrupt Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " REQMASKCLR0[0] ,ESM High level interrupt Mask Clear" "Disabled,Enabled"
|
|
line.long 0x04 "REQMASKCLR1,Interrupt Mask Clear Register"
|
|
bitfld.long 0x04 3. " REQMASKCLR1[35] ,DCAN2 IF3 interrupt Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " REQMASKCLR1[34] ,DCAN1 IF3 interrupt Mask Clear" "Disabled,Enabled"
|
|
group.long 0x50++0x07
|
|
line.long 0x00 "WAKEMASKSET0,Wake-up Mask Set Register"
|
|
bitfld.long 0x00 31. " WAKEMASKSET0[31] ,ADC magnitude threshold interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WAKEMASKSET0[30] ,DCAN2 level 1 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " WAKEMASKSET0[29] ,DCAN2 level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " WAKEMASKSET0[28] ,MibSPI2 level 1 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " WAKEMASKSET0[27] ,MibSPI2 level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WAKEMASKSET0[26] ,ADC sw group 2 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WAKEMASKSET0[25] ,ADC sw group 1 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WAKEMASKSET0[24] ,ADC event group interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WAKEMASKSET0[23] ,DCAN1 level 1 Interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WAKEMASKSET0[22] ,DCAN1 level 0 Interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WAKEMASKSET0[21] ,LIN/SCI1 level 1 Interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WAKEMASKSET0[20] ,LIN/SCI1 level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKEMASKSET0[19] ,LIN/SCI2 level 1 Interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " WAKEMASKSET0[18] ,LIN/SCI2 level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " WAKEMASKSET0[16] ,MibSPI1 level 1 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WAKEMASKSET0[15] ,MibSPI1 level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WAKEMASKSET0[14] ,HET level 1 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " WAKEMASKSET0[13] ,HET level 0 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WAKEMASKSET0[12] ,GIO Interrupt B Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WAKEMASKSET0[11] ,GIO Interrupt A Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WAKEMASKSET0[9] ,RTI overflow interrupt 1 Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WAKEMASKSET0[8] ,RTI overflow interrupt 0 Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " WAKEMASKSET0[7] ,RTI compare interrupt 3 Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAKEMASKSET0[6] ,RTI compare interrupt 2 Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " WAKEMASKSET0[5] ,RTI compare interrupt 1 Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " WAKEMASKSET0[4] ,RTI compare interrupt 0 Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAKEMASKSET0[3] ,Software interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WAKEMASKSET0[2] ,ESM Low level interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WAKEMASKSET0[0] ,ESM High level interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
line.long 0x04 "WAKEMASKSET1,Wake-up Mask Set Register"
|
|
bitfld.long 0x04 3. " WAKEMASKSET1[35] ,DCAN2 IF3 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " WAKEMASKSET1[34] ,DCAN1 IF3 interrupt Wake-up Mask Set" "Disabled,Enabled"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "WAKEMASKCLR0,Wake-up Mask Clear Register"
|
|
bitfld.long 0x00 31. " WAKEMASKCLR0[31] ,ADC magnitude threshold interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " WAKEMASKCLR0[30] ,DCAN2 level 1 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " WAKEMASKCLR0[29] ,DCAN2 level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " WAKEMASKCLR0[28] ,MibSPI2 level 1 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " WAKEMASKCLR0[27] ,MibSPI2 level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " WAKEMASKCLR0[26] ,ADC sw group 2 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " WAKEMASKCLR0[25] ,ADC sw group 1 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " WAKEMASKCLR0[24] ,ADC event group interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " WAKEMASKCLR0[23] ,DCAN1 level 1 Interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " WAKEMASKCLR0[22] ,DCAN1 level 0 Interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " WAKEMASKCLR0[21] ,LIN/SCI1 level 1 Interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " WAKEMASKCLR0[20] ,LIN/SCI1 level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " WAKEMASKCLR0[19] ,LIN/SCI2 level 1 Interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " WAKEMASKCLR0[18] ,LIN/SCI2 level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " WAKEMASKCLR0[16] ,MibSPI1 level 1 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " WAKEMASKCLR0[15] ,MibSPI1 level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " WAKEMASKCLR0[14] ,HET level 1 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " WAKEMASKCLR0[13] ,HET level 0 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " WAKEMASKCLR0[12] ,GIO Interrupt B Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " WAKEMASKCLR0[11] ,GIO Interrupt A Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WAKEMASKCLR0[9] ,RTI overflow interrupt 1 Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " WAKEMASKCLR0[8] ,RTI overflow interrupt 0 Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " WAKEMASKCLR0[7] ,RTI compare interrupt 3 Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " WAKEMASKCLR0[6] ,RTI compare interrupt 2 Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " WAKEMASKCLR0[5] ,RTI compare interrupt 1 Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " WAKEMASKCLR0[4] ,RTI compare interrupt 0 Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " WAKEMASKCLR0[3] ,Software interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " WAKEMASKCLR0[2] ,ESM Low level interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WAKEMASKCLR0[0] ,ESM High level interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
line.long 0x04 "WAKEMASKCLR1,Wake-up Mask Clear Register"
|
|
bitfld.long 0x04 3. " WAKEMASKCLR1[35] ,DCAN2 IF3 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " WAKEMASKCLR1[34] ,DCAN1 IF3 interrupt Wake-up Mask Clear" "Disabled,Enabled"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "CAPEVT,Capture Event Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " CAPEVTSRC1[6:0] ,Capture Event Source Mapping Control 1"
|
|
hexmask.long.byte 0x00 0.--6. 1. " CAPEVTSRC0[6:0] ,Capture Event Source Mapping Control 0"
|
|
group.long 0x80++0x23
|
|
line.long 0x00 "CHANCTRL0,Channel Control Register 0"
|
|
hexmask.long.byte 0x00 24.--30. 1. " CHANMAP0[6:0] ,Interrupt CHAN0 Mapping Control for ESM High level interrupt"
|
|
hexmask.long.byte 0x00 8.--14. 1. " CHANMAP2[6:0] ,Interrupt CHAN2 Mapping Control for ESM Low level interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " CHANMAP3[6:0] ,Interrupt CHAN3 Mapping Control for Software interrupt"
|
|
line.long 0x04 "CHANCTRL1,Channel Control Register 1"
|
|
hexmask.long.byte 0x04 24.--30. 1. " CHANMAP4[6:0] ,Interrupt CHAN4 Mapping Control for RTI compare interrupt 0"
|
|
hexmask.long.byte 0x04 16.--22. 1. " CHANMAP5[6:0] ,Interrupt CHAN5 Mapping Control for RTI compare interrupt 1"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--14. 1. " CHANMAP6[6:0] ,Interrupt CHAN6 Mapping Control for RTI compare interrupt 2"
|
|
hexmask.long.byte 0x04 0.--6. 1. " CHANMAP7[6:0] ,Interrupt CHAN7 Mapping Control for RTI compare interrupt 3"
|
|
line.long 0x08 "CHANCTRL2,Channel Control Register 2"
|
|
hexmask.long.byte 0x08 24.--30. 1. " CHANMAP8[6:0] ,Interrupt CHAN8 Mapping Control for RTI overflow interrupt 0"
|
|
hexmask.long.byte 0x08 16.--22. 1. " CHANMAP9[6:0] ,Interrupt CHAN9 Mapping Control for RTI overflow interrupt 1"
|
|
textline " "
|
|
hexmask.long.byte 0x08 0.--6. 1. " CHANMAP11[6:0] ,Interrupt CHAN11 Mapping Control for GIO Interrupt A"
|
|
line.long 0x0C "CHANCTRL3,Channel Control Register 3"
|
|
hexmask.long.byte 0x0C 24.--30. 1. " CHANMAP12[6:0] ,Interrupt CHAN12 Mapping Control for GIO Interrupt B"
|
|
hexmask.long.byte 0x0C 16.--22. 1. " CHANMAP13[6:0] ,Interrupt CHAN13 Mapping Control for HET level 0 interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--14. 1. " CHANMAP14[6:0] ,Interrupt CHAN14 Mapping Control for HET level 1 interrupt"
|
|
hexmask.long.byte 0x0C 0.--6. 1. " CHANMAP15[6:0] ,Interrupt CHAN15 Mapping Control for MibSPI1 level 0 interrupt"
|
|
line.long 0x10 "CHANCTRL4,Channel Control Register 4"
|
|
hexmask.long.byte 0x10 24.--30. 1. " CHANMAP16[6:0] ,Interrupt CHAN16 Mapping Control for MibSPI1 level 1 interrupt"
|
|
hexmask.long.byte 0x10 8.--14. 1. " CHANMAP18[6:0] ,Interrupt CHAN18 Mapping Control for LIN2/SCI2 level 0 interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--6. 1. " CHANMAP19[6:0] ,Interrupt CHAN19 Mapping Control for LIN2/SCI2 level 1 Interrupt"
|
|
line.long 0x14 "CHANCTRL5,Channel Control Register 5"
|
|
hexmask.long.byte 0x14 24.--30. 1. " CHANMAP20[6:0] ,Interrupt CHAN20 Mapping Control for LIN1/SCI1 level 0 interrupt"
|
|
hexmask.long.byte 0x14 16.--22. 1. " CHANMAP21[6:0] ,Interrupt CHAN21 Mapping Control for LIN1/SCI1 level 1 Interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--14. 1. " CHANMAP22[6:0] ,Interrupt CHAN22 Mapping Control for DCAN1 level 0 Interrupt"
|
|
hexmask.long.byte 0x14 0.--6. 1. " CHANMAP23[6:0] ,Interrupt CHAN23 Mapping Control for DCAN1 level 1 Interrupt"
|
|
line.long 0x18 "CHANCTRL6,Channel Control Register 6"
|
|
hexmask.long.byte 0x18 24.--30. 1. " CHANMAP24[6:0] ,Interrupt CHAN24 Mapping Control for ADC event group interrupt"
|
|
hexmask.long.byte 0x18 16.--22. 1. " CHANMAP25[6:0] ,Interrupt CHAN25 Mapping Control for ADC sw group 1 interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x18 8.--14. 1. " CHANMAP26[6:0] ,Interrupt CHAN26 Mapping Control for ADC sw group 2 interrupt"
|
|
hexmask.long.byte 0x18 0.--6. 1. " CHANMAP27[6:0] ,Interrupt CHAN27 Mapping Control for MibSPIP2 level 0 interrupt"
|
|
line.long 0x1C "CHANCTRL7,Channel Control Register 7"
|
|
hexmask.long.byte 0x1C 24.--30. 1. " CHANMAP28[6:0] ,Interrupt CHAN28 Mapping Control for MibSPIP2 level 1 interrupt"
|
|
hexmask.long.byte 0x1C 16.--22. 1. " CHANMAP29[6:0] ,Interrupt CHAN29 Mapping Control for DCAN2 level 0 interrupt"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--14. 1. " CHANMAP30[6:0] ,Interrupt CHAN30 Mapping Control for DCAN2 level 1 interrupt"
|
|
hexmask.long.byte 0x1C 0.--6. 1. " CHANMAP31[6:0] ,Interrupt CHAN31 Mapping Control for ADC magnitude threshold interrupt"
|
|
line.long 0x20 "CHANCTRL8,Channel Control Register 8"
|
|
hexmask.long.byte 0x20 8.--14. 1. " CHANMAP34[6:0] ,Interrupt CHAN34 Mapping Control for DCAN1 IF3 interrupt"
|
|
hexmask.long.byte 0x20 0.--6. 1. " CHANMAP35[6:0] ,Interrupt CHAN35 Mapping Control for DCAN2 IF3 interrupt"
|
|
width 11.
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check Controller)"
|
|
base ad:0xFE000000
|
|
width 20.
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CRC_CTRL0,CRC Global Control Register 0"
|
|
bitfld.long 0x00 0. " CH1_PSA_SWREST ,Channel 1 PSA Software Reset" "No reset,Reset"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CRC_CTRL1,CRC Global Control Register 1"
|
|
bitfld.long 0x00 0. " PWDN ,Power Down" "No power down,Power down"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "CRC_CTRL2,CRC Global Control Register 2"
|
|
bitfld.long 0x00 4. " CH1_TRACEEN ,Channel 1 Data Trace Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--1. " CH1_MODE ,Channel 1 Mode" "Data capture,?..."
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "PSA_SIGREGL1,PSA Signature Low Register"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "PSA_SIGREGH1,PSA Signature High Register"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "PSA_SECSIGREGL1,PSA Sector Signature Low Register 1"
|
|
rgroup.long 0x74++0x3
|
|
line.long 0x0 "PSA_SECSIGREGH1,PSA Sector Signature High Register 1"
|
|
rgroup.long 0x78++0x3
|
|
line.long 0x0 "RAW_DATAREGL1,Raw Data Low Register 1"
|
|
rgroup.long 0x7C++0x3
|
|
line.long 0x0 "RAW_DATAREGH1,Raw Data High Register 1"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "DCAN (Controller Area Network)"
|
|
tree "DCAN1"
|
|
base ad:0xFFF7DC00
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "CTRL,Config Register"
|
|
bitfld.long 0x00 25. " WUBA ,Automatic Wake Up on Bus Activity When in Local Power Down Mode" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " PDR ,Request for Local Low Power Down Mode" "Not requested,Power down"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
newline
|
|
bitfld.long 0x00 20. " DE3 ,DMA Enable for IF3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " DE2 ,DMA Enable for IF2" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DE1 ,DMA Enable for IF1" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 17. " IE1 ,DCAN1INT Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " INITDBG ,Internal Init State While Debug Access Mode" "No debug,Debug"
|
|
bitfld.long 0x00 15. " SWR ,SW Reset Enable" "No reset,Reset"
|
|
bitfld.long 0x00 10.--13. " PMD ,Parity on/off" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " ABO ,Auto Bus On Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IDS ,Interruption Debug Support Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DAR ,Disable Automatic Retransmission" "No,Yes"
|
|
bitfld.long 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SIE ,Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IE ,DCAN0INT Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INIT ,Initialization" "Disabled,Enabled"
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpu()==("TMS570LS10116-ZWT")||cpu()==("TMS570LS10216-ZWT")||cpu()==("TMS570LS10106-ZWT")||cpu()==("TMS570LS10206-ZWT")||cpu()==("TMS570LS10116-PGE")||cpu()==("TMS570LS10216-PGE")||cpu()==("TMS570LS10106-PGE")||cpu()==("TMS570LS10206-PGE")||cpu()==("TMS570LC4357")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*"))
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "ES,Error and Status Register"
|
|
rbitfld.long 0x00 10. " PDA ,Local Power Down Mode Acknowledge" "Not in,Is in"
|
|
rbitfld.long 0x00 9. " WAKEUPPND ,Wake Up Pending" "No requested,Requested"
|
|
rbitfld.long 0x00 8. " PER ,Parity Error Detected" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 7. " BOFF ,Bus-Off State" "Not in,In"
|
|
rbitfld.long 0x00 6. " EWARN ,Warning state" "<96,>96"
|
|
rbitfld.long 0x00 5. " EPASS ,Error Passive State" "CAN Bus,Passive"
|
|
newline
|
|
bitfld.long 0x00 4. " RXOK ,Received a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 3. " TXOK ,Transmitted a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff,Form,Ack,Bit1,Bit0,CRC,No CAN"
|
|
elif !cpuis("TMS570LS3137-EP")
|
|
hgroup.long 0x04++0x3
|
|
hide.long 0x0 "STAT,Status Register"
|
|
in
|
|
else
|
|
if (((per.l.be(ad:0xFFF7DC00))&0x100)==0x100)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "ES,Error and Status Register"
|
|
rbitfld.long 0x00 10. " PDA ,Local Power Down Mode Acknowledge" "Not in,Is in"
|
|
rbitfld.long 0x00 9. " WAKEUPPND ,Wake Up Pending" "No requested,Requested"
|
|
rbitfld.long 0x00 8. " PER ,Parity Error Detected" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 7. " BOFF ,Bus-Off State" "Not in,In"
|
|
rbitfld.long 0x00 6. " EWARN ,Warning state" "<96,>96"
|
|
rbitfld.long 0x00 5. " EPASS ,Error Passive State" "CAN Bus,Passive"
|
|
newline
|
|
bitfld.long 0x00 4. " RXOK ,Received a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 3. " TXOK ,Transmitted a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff,Form,Ack,Bit1,Bit0,CRC,No CAN"
|
|
else
|
|
hgroup.long 0x04++0x3
|
|
hide.long 0x0 "ES,Error and Status Register"
|
|
in
|
|
endif
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x0 "ERRC,Error Counter Register"
|
|
bitfld.long 0x00 15. " RP ,Receive Error Passive" "Below,Reached"
|
|
hexmask.long.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be(ad:0xFFF7DC00))&0x41)==0x41)
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "INTR,Interrupt Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INT1ID[7-0] ,Interrupt 1 Identifier"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15-0] ,Interrupt Identifier"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be(ad:0xFFF7DC00))&0x41)==0x41)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
endif
|
|
elif !cpuis("TMS570LS3137-EP")
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpu()==("TMS570LS10116-ZWT")||cpu()==("TMS570LS10216-ZWT")||cpu()==("TMS570LS10106-ZWT")||cpu()==("TMS570LS10206-ZWT")||cpu()==("TMS570LS10116-PGE")||cpu()==("TMS570LS10216-PGE")||cpu()==("TMS570LS10106-PGE")||cpu()==("TMS570LS10206-PGE")||cpu()==("TMS570LC4357")||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS21*")||cpuis("TMS570LS31*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
else
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Reset,Sample point,Dominant,Recessive"
|
|
endif
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
if (((per.l.be(ad:0xFFF7DC00))&0x80)==0x80)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
endif
|
|
endif
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "PERR,Parity Error Code Register"
|
|
bitfld.long 0x00 8.--10. " WORD_NUMBER ,Word Number" ",1,2,3,4,5,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "REL,DCAN Core Release Register"
|
|
bitfld.long 0x00 28.--31. " REL ,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " STEP ,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SUBSTEP ,Substep of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " YEAR ,Design Time Stamp - Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " MON ,Design Time Stamp - Month"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAY ,Design Time Stamp - Day"
|
|
endif
|
|
width 19.
|
|
sif (cpu()=="TMS570LC4357")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "DCAN_ECCDIAG,ECC Diagnostic Register"
|
|
bitfld.long 0x00 0.--3. " ECCDIAG , SECDED diagnostic mode enable/disable" ",,,,,Enabled,,,,,Disabled,?..."
|
|
line.long 0x04 "DCAN_ECCDIAG_STAT, ECC Diagnostic Status Register"
|
|
eventfld.long 0x04 8. " DEFLG_DIAG , Double bit error diagnostic" "No error,Error"
|
|
eventfld.long 0x04 0. " SEFLG_DIAG , Single bit error diagnostic" "No error,Error"
|
|
line.long 0x08 "DCAN_ECC_CS, ECC Control and Status Register"
|
|
bitfld.long 0x08 24.--27. " SBE_EVT_EN , Single bit error event" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
bitfld.long 0x08 16.--19. " ECCMODE , Single bit error correction" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
eventfld.long 0x08 8. " DEFLG , Double bit error flag" "No error,Error"
|
|
eventfld.long 0x08 0. " SEFLG , Single bit error flag" "No error,Error"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DCAN_ECC_SERR, ECC Single Bit Error Code Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Message_Number , Message object number where ECC single bit error has been detected"
|
|
endif
|
|
width 12.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ABOT,Auto Bus On Time"
|
|
rgroup.long 0x84++0x4F
|
|
line.long 0x00 "TRREQ,Transmission Request X"
|
|
bitfld.long 0x00 14.--15. " TXRQSTREG8 ,Transmission Request 8" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " TXRQSTREG7 ,Transmission Request 7" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. " TXRQSTREG6 ,Transmission Request 6" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. " TXRQSTREG5 ,Transmission Request 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " TXRQSTREG4 ,Transmission Request 4" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " TXRQSTREG3 ,Transmission Request 3" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " TXRQSTREG2 ,Transmission Request 2" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXRQSTREG1 ,Transmission Request 1" "0,1,2,3"
|
|
line.long 0x04 "TRREQ12,Transmission Request 1-2"
|
|
bitfld.long 0x04 31. " TXRQST[32] ,Transmission Request Bits[32]" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " [31] ,Transmission Request Bits[31]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 29. " [30] ,Transmission Request Bits[30]" "Not requested,Requested"
|
|
bitfld.long 0x04 28. " [29] ,Transmission Request Bits[29]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 27. " [28] ,Transmission Request Bits[28]" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " [27] ,Transmission Request Bits[27]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 25. " [26] ,Transmission Request Bits[26]" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " [25] ,Transmission Request Bits[25]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 23. " [24] ,Transmission Request Bits[24]" "Not requested,Requested"
|
|
bitfld.long 0x04 22. " [23] ,Transmission Request Bits[23]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 21. " [22] ,Transmission Request Bits[22]" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " [21] ,Transmission Request Bits[21]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 19. " [20] ,Transmission Request Bits[20]" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " [19] ,Transmission Request Bits[19]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 17. " [18] ,Transmission Request Bits[18]" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " [17] ,Transmission Request Bits[17]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 15. " [16] ,Transmission Request Bits[16]" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " [15] ,Transmission Request Bits[15]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 13. " [14] ,Transmission Request Bits[14]" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " [13] ,Transmission Request Bits[13]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 11. " [12] ,Transmission Request Bits[12]" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " [11] ,Transmission Request Bits[11]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 9. " [10] ,Transmission Request Bits[10]" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " [9] ,Transmission Request Bits[9]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 7. " [8] ,Transmission Request Bits[8]" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " [7] ,Transmission Request Bits[7]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 5. " [6] ,Transmission Request Bits[6]" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " [5] ,Transmission Request Bits[5]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 3. " [4] ,Transmission Request Bits[4]" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " [3] ,Transmission Request Bits[3]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 1. " [2] ,Transmission Request Bits[2]" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " [1] ,Transmission Request Bits[1]" "Not requested,Requested"
|
|
line.long 0x08 "TRREQ34,Transmission Request 3-4"
|
|
bitfld.long 0x08 31. " TXRQST[64] ,Transmission Request Bits[64]" "Not requested,Requested"
|
|
bitfld.long 0x08 30. " [63] ,Transmission Request Bits[63]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 29. " [62] ,Transmission Request Bits[62]" "Not requested,Requested"
|
|
bitfld.long 0x08 28. " [61] ,Transmission Request Bits[61]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 27. " [60] ,Transmission Request Bits[60]" "Not requested,Requested"
|
|
bitfld.long 0x08 26. " [59] ,Transmission Request Bits[59]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 25. " [58] ,Transmission Request Bits[58]" "Not requested,Requested"
|
|
bitfld.long 0x08 24. " [57] ,Transmission Request Bits[57]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 23. " [56] ,Transmission Request Bits[56]" "Not requested,Requested"
|
|
bitfld.long 0x08 22. " [55] ,Transmission Request Bits[55]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 21. " [54] ,Transmission Request Bits[54]" "Not requested,Requested"
|
|
bitfld.long 0x08 20. " [53] ,Transmission Request Bits[53]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 19. " [52] ,Transmission Request Bits[52]" "Not requested,Requested"
|
|
bitfld.long 0x08 18. " [51] ,Transmission Request Bits[51]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 17. " [50] ,Transmission Request Bits[50]" "Not requested,Requested"
|
|
bitfld.long 0x08 16. " [49] ,Transmission Request Bits[49]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 15. " [48] ,Transmission Request Bits[48]" "Not requested,Requested"
|
|
bitfld.long 0x08 14. " [47] ,Transmission Request Bits[47]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 13. " [46] ,Transmission Request Bits[46]" "Not requested,Requested"
|
|
bitfld.long 0x08 12. " [45] ,Transmission Request Bits[45]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 11. " [44] ,Transmission Request Bits[44]" "Not requested,Requested"
|
|
bitfld.long 0x08 10. " [43] ,Transmission Request Bits[43]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 9. " [42] ,Transmission Request Bits[42]" "Not requested,Requested"
|
|
bitfld.long 0x08 8. " [41] ,Transmission Request Bits[41]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 7. " [40] ,Transmission Request Bits[40]" "Not requested,Requested"
|
|
bitfld.long 0x08 6. " [39] ,Transmission Request Bits[39]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 5. " [38] ,Transmission Request Bits[38]" "Not requested,Requested"
|
|
bitfld.long 0x08 4. " [37] ,Transmission Request Bits[37]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 3. " [36] ,Transmission Request Bits[36]" "Not requested,Requested"
|
|
bitfld.long 0x08 2. " [35] ,Transmission Request Bits[35]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 1. " [34] ,Transmission Request Bits[34]" "Not requested,Requested"
|
|
bitfld.long 0x08 0. " [33] ,Transmission Request Bits[33]" "Not requested,Requested"
|
|
line.long 0x0C "TRREQ56,Transmission Request 5-6"
|
|
bitfld.long 0x0C 31. " TXRQST[96] ,Transmission Request Bits[96]" "Not requested,Requested"
|
|
bitfld.long 0x0C 30. " [95] ,Transmission Request Bits[95]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 29. " [94] ,Transmission Request Bits[94]" "Not requested,Requested"
|
|
bitfld.long 0x0C 28. " [93] ,Transmission Request Bits[93]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 27. " [92] ,Transmission Request Bits[92]" "Not requested,Requested"
|
|
bitfld.long 0x0C 26. " [91] ,Transmission Request Bits[91]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 25. " [90] ,Transmission Request Bits[90]" "Not requested,Requested"
|
|
bitfld.long 0x0C 24. " [89] ,Transmission Request Bits[89]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 23. " [88] ,Transmission Request Bits[88]" "Not requested,Requested"
|
|
bitfld.long 0x0C 22. " [87] ,Transmission Request Bits[87]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 21. " [86] ,Transmission Request Bits[86]" "Not requested,Requested"
|
|
bitfld.long 0x0C 20. " [85] ,Transmission Request Bits[85]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 19. " [84] ,Transmission Request Bits[84]" "Not requested,Requested"
|
|
bitfld.long 0x0C 18. " [83] ,Transmission Request Bits[83]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 17. " [82] ,Transmission Request Bits[82]" "Not requested,Requested"
|
|
bitfld.long 0x0C 16. " [81] ,Transmission Request Bits[81]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 15. " [80] ,Transmission Request Bits[80]" "Not requested,Requested"
|
|
bitfld.long 0x0C 14. " [79] ,Transmission Request Bits[79]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 13. " [78] ,Transmission Request Bits[78]" "Not requested,Requested"
|
|
bitfld.long 0x0C 12. " [77] ,Transmission Request Bits[77]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 11. " [76] ,Transmission Request Bits[76]" "Not requested,Requested"
|
|
bitfld.long 0x0C 10. " [75] ,Transmission Request Bits[75]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 9. " [74] ,Transmission Request Bits[74]" "Not requested,Requested"
|
|
bitfld.long 0x0C 8. " [73] ,Transmission Request Bits[73]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 7. " [72] ,Transmission Request Bits[72]" "Not requested,Requested"
|
|
bitfld.long 0x0C 6. " [71] ,Transmission Request Bits[71]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 5. " [70] ,Transmission Request Bits[70]" "Not requested,Requested"
|
|
bitfld.long 0x0C 4. " [69] ,Transmission Request Bits[69]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 3. " [68] ,Transmission Request Bits[68]" "Not requested,Requested"
|
|
bitfld.long 0x0C 2. " [67] ,Transmission Request Bits[67]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 1. " [66] ,Transmission Request Bits[66]" "Not requested,Requested"
|
|
bitfld.long 0x0C 0. " [65] ,Transmission Request Bits[65]" "Not requested,Requested"
|
|
line.long 0x10 "TRREQ78,Transmission Request 7-8"
|
|
bitfld.long 0x10 31. " TXRQST[128] ,Transmission Request Bits[128]" "Not requested,Requested"
|
|
bitfld.long 0x10 30. " [127] ,Transmission Request Bits[127]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 29. " [126] ,Transmission Request Bits[126]" "Not requested,Requested"
|
|
bitfld.long 0x10 28. " [125] ,Transmission Request Bits[125]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 27. " [124] ,Transmission Request Bits[124]" "Not requested,Requested"
|
|
bitfld.long 0x10 26. " [123] ,Transmission Request Bits[123]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 25. " [122] ,Transmission Request Bits[122]" "Not requested,Requested"
|
|
bitfld.long 0x10 24. " [121] ,Transmission Request Bits[121]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 23. " [120] ,Transmission Request Bits[120]" "Not requested,Requested"
|
|
bitfld.long 0x10 22. " [119] ,Transmission Request Bits[119]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 21. " [118] ,Transmission Request Bits[118]" "Not requested,Requested"
|
|
bitfld.long 0x10 20. " [117] ,Transmission Request Bits[117]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 19. " [116] ,Transmission Request Bits[116]" "Not requested,Requested"
|
|
bitfld.long 0x10 18. " [115] ,Transmission Request Bits[115]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 17. " [114] ,Transmission Request Bits[114]" "Not requested,Requested"
|
|
bitfld.long 0x10 16. " [113] ,Transmission Request Bits[113]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 15. " [112] ,Transmission Request Bits[112]" "Not requested,Requested"
|
|
bitfld.long 0x10 14. " [111] ,Transmission Request Bits[111]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 13. " [110] ,Transmission Request Bits[110]" "Not requested,Requested"
|
|
bitfld.long 0x10 12. " [109] ,Transmission Request Bits[109]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 11. " [108] ,Transmission Request Bits[108]" "Not requested,Requested"
|
|
bitfld.long 0x10 10. " [107] ,Transmission Request Bits[107]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 9. " [106] ,Transmission Request Bits[106]" "Not requested,Requested"
|
|
bitfld.long 0x10 8. " [105] ,Transmission Request Bits[105]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 7. " [104] ,Transmission Request Bits[104]" "Not requested,Requested"
|
|
bitfld.long 0x10 6. " [103] ,Transmission Request Bits[103]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 5. " [102] ,Transmission Request Bits[102]" "Not requested,Requested"
|
|
bitfld.long 0x10 4. " [101] ,Transmission Request Bits[101]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 3. " [100] ,Transmission Request Bits[100]" "Not requested,Requested"
|
|
bitfld.long 0x10 2. " [99] ,Transmission Request Bits[99]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 1. " [98] ,Transmission Request Bits[98]" "Not requested,Requested"
|
|
bitfld.long 0x10 0. " [97] ,Transmission Request Bits[97]" "Not requested,Requested"
|
|
line.long 0x14 "NEWDAT,New Data X"
|
|
bitfld.long 0x14 14.--15. " NEWDATREG8 ,New Data 8" "0,1,2,3"
|
|
bitfld.long 0x14 12.--13. " NEWDATREG7 ,New Data 7" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. " NEWDATREG6 ,New Data 6" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. " NEWDATREG5 ,New Data 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 6.--7. " NEWDATREG4 ,NEW DATA 4" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. " NEWDATREG3 ,New Data 3" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. " NEWDATREG2 ,New Data 2" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. " NEWDATREG1 ,New Data 1" "0,1,2,3"
|
|
line.long 0x18 "NEWDAT12,New Data 1-2"
|
|
bitfld.long 0x18 31. " NEWDAT[32] ,New Data Bit[32]" "Not requested,Requested"
|
|
bitfld.long 0x18 30. " [31] ,New Data Bit[31]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 29. " [30] ,New Data Bit[30]" "Not requested,Requested"
|
|
bitfld.long 0x18 28. " [29] ,New Data Bit[29]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 27. " [28] ,New Data Bit[28]" "Not requested,Requested"
|
|
bitfld.long 0x18 26. " [27] ,New Data Bit[27]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 25. " [26] ,New Data Bit[26]" "Not requested,Requested"
|
|
bitfld.long 0x18 24. " [25] ,New Data Bit[25]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 23. " [24] ,New Data Bit[24]" "Not requested,Requested"
|
|
bitfld.long 0x18 22. " [23] ,New Data Bit[23]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 21. " [22] ,New Data Bit[22]" "Not requested,Requested"
|
|
bitfld.long 0x18 20. " [21] ,New Data Bit[21]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 19. " [20] ,New Data Bit[20]" "Not requested,Requested"
|
|
bitfld.long 0x18 18. " [19] ,New Data Bit[19]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 17. " [18] ,New Data Bit[18]" "Not requested,Requested"
|
|
bitfld.long 0x18 16. " [17] ,New Data Bit[17]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 15. " [16] ,New Data Bit[16]" "Not requested,Requested"
|
|
bitfld.long 0x18 14. " [15] ,New Data Bit[15]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 13. " [14] ,New Data Bit[14]" "Not requested,Requested"
|
|
bitfld.long 0x18 12. " [13] ,New Data Bit[13]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 11. " [12] ,New Data Bit[12]" "Not requested,Requested"
|
|
bitfld.long 0x18 10. " [11] ,New Data Bit[11]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 9. " [10] ,New Data Bit[10]" "Not requested,Requested"
|
|
bitfld.long 0x18 8. " [9] ,New Data Bit[9]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 7. " [8] ,New Data Bit[8]" "Not requested,Requested"
|
|
bitfld.long 0x18 6. " [7] ,New Data Bit[7]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 5. " [6] ,New Data Bit[6]" "Not requested,Requested"
|
|
bitfld.long 0x18 4. " [5] ,New Data Bit[5]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 3. " [4] ,New Data Bit[4]" "Not requested,Requested"
|
|
bitfld.long 0x18 2. " [3] ,New Data Bit[3]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 1. " [2] ,New Data Bit[2]" "Not requested,Requested"
|
|
bitfld.long 0x18 0. " [1] ,New Data Bit[1]" "Not requested,Requested"
|
|
line.long 0x1C "NEWDAT34,New Data 3-4"
|
|
bitfld.long 0x1C 31. " NEWDAT[64] ,New Data Bit[64]" "Not requested,Requested"
|
|
bitfld.long 0x1C 30. " [63] ,New Data Bit[63]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 29. " [62] ,New Data Bit[62]" "Not requested,Requested"
|
|
bitfld.long 0x1C 28. " [61] ,New Data Bit[61]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 27. " [60] ,New Data Bit[60]" "Not requested,Requested"
|
|
bitfld.long 0x1C 26. " [59] ,New Data Bit[59]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 25. " [58] ,New Data Bit[58]" "Not requested,Requested"
|
|
bitfld.long 0x1C 24. " [57] ,New Data Bit[57]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 23. " [56] ,New Data Bit[56]" "Not requested,Requested"
|
|
bitfld.long 0x1C 22. " [55] ,New Data Bit[55]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 21. " [54] ,New Data Bit[54]" "Not requested,Requested"
|
|
bitfld.long 0x1C 20. " [53] ,New Data Bit[53]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 19. " [52] ,New Data Bit[52]" "Not requested,Requested"
|
|
bitfld.long 0x1C 18. " [51] ,New Data Bit[51]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 17. " [50] ,New Data Bit[50]" "Not requested,Requested"
|
|
bitfld.long 0x1C 16. " [49] ,New Data Bit[49]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 15. " [48] ,New Data Bit[48]" "Not requested,Requested"
|
|
bitfld.long 0x1C 14. " [47] ,New Data Bit[47]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 13. " [46] ,New Data Bit[46]" "Not requested,Requested"
|
|
bitfld.long 0x1C 12. " [45] ,New Data Bit[45]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 11. " [44] ,New Data Bit[44]" "Not requested,Requested"
|
|
bitfld.long 0x1C 10. " [43] ,New Data Bit[43]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 9. " [42] ,New Data Bit[42]" "Not requested,Requested"
|
|
bitfld.long 0x1C 8. " [41] ,New Data Bit[41]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 7. " [40] ,New Data Bit[40]" "Not requested,Requested"
|
|
bitfld.long 0x1C 6. " [39] ,New Data Bit[39]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 5. " [38] ,New Data Bit[38]" "Not requested,Requested"
|
|
bitfld.long 0x1C 4. " [37] ,New Data Bit[37]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 3. " [36] ,New Data Bit[36]" "Not requested,Requested"
|
|
bitfld.long 0x1C 2. " [35] ,New Data Bit[35]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 1. " [34] ,New Data Bit[34]" "Not requested,Requested"
|
|
bitfld.long 0x1C 0. " [33] ,New Data Bit[33]" "Not requested,Requested"
|
|
line.long 0x20 "NEWDAT56,New Data 5-6"
|
|
bitfld.long 0x20 31. " NEWDAT[96] ,New Data Bit[96]" "Not requested,Requested"
|
|
bitfld.long 0x20 30. " [95] ,New Data Bit[95]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 29. " [94] ,New Data Bit[94]" "Not requested,Requested"
|
|
bitfld.long 0x20 28. " [93] ,New Data Bit[93]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 27. " [92] ,New Data Bit[92]" "Not requested,Requested"
|
|
bitfld.long 0x20 26. " [91] ,New Data Bit[91]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 25. " [90] ,New Data Bit[90]" "Not requested,Requested"
|
|
bitfld.long 0x20 24. " [89] ,New Data Bit[89]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 23. " [88] ,New Data Bit[88]" "Not requested,Requested"
|
|
bitfld.long 0x20 22. " [87] ,New Data Bit[87]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 21. " [86] ,New Data Bit[86]" "Not requested,Requested"
|
|
bitfld.long 0x20 20. " [85] ,New Data Bit[85]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 19. " [84] ,New Data Bit[84]" "Not requested,Requested"
|
|
bitfld.long 0x20 18. " [83] ,New Data Bit[83]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 17. " [82] ,New Data Bit[82]" "Not requested,Requested"
|
|
bitfld.long 0x20 16. " [81] ,New Data Bit[81]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 15. " [80] ,New Data Bit[80]" "Not requested,Requested"
|
|
bitfld.long 0x20 14. " [79] ,New Data Bit[79]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 13. " [78] ,New Data Bit[78]" "Not requested,Requested"
|
|
bitfld.long 0x20 12. " [77] ,New Data Bit[77]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 11. " [76] ,New Data Bit[76]" "Not requested,Requested"
|
|
bitfld.long 0x20 10. " [75] ,New Data Bit[75]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 9. " [74] ,New Data Bit[74]" "Not requested,Requested"
|
|
bitfld.long 0x20 8. " [73] ,New Data Bit[73]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 7. " [72] ,New Data Bit[72]" "Not requested,Requested"
|
|
bitfld.long 0x20 6. " [71] ,New Data Bit[71]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 5. " [70] ,New Data Bit[70]" "Not requested,Requested"
|
|
bitfld.long 0x20 4. " [69] ,New Data Bit[69]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 3. " [68] ,New Data Bit[68]" "Not requested,Requested"
|
|
bitfld.long 0x20 2. " [67] ,New Data Bit[67]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 1. " [66] ,New Data Bit[66]" "Not requested,Requested"
|
|
bitfld.long 0x20 0. " [65] ,New Data Bit[65]" "Not requested,Requested"
|
|
line.long 0x24 "NEWDAT78,New Data 7-8"
|
|
bitfld.long 0x24 31. " NEWDAT[128] ,New Data Bit[128]" "Not requested,Requested"
|
|
bitfld.long 0x24 30. " [127] ,New Data Bit[127]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 29. " [126] ,New Data Bit[126]" "Not requested,Requested"
|
|
bitfld.long 0x24 28. " [125] ,New Data Bit[125]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 27. " [124] ,New Data Bit[124]" "Not requested,Requested"
|
|
bitfld.long 0x24 26. " [123] ,New Data Bit[123]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 25. " [122] ,New Data Bit[122]" "Not requested,Requested"
|
|
bitfld.long 0x24 24. " [121] ,New Data Bit[121]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 23. " [120] ,New Data Bit[120]" "Not requested,Requested"
|
|
bitfld.long 0x24 22. " [119] ,New Data Bit[119]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 21. " [118] ,New Data Bit[118]" "Not requested,Requested"
|
|
bitfld.long 0x24 20. " [117] ,New Data Bit[117]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 19. " [116] ,New Data Bit[116]" "Not requested,Requested"
|
|
bitfld.long 0x24 18. " [115] ,New Data Bit[115]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 17. " [114] ,New Data Bit[114]" "Not requested,Requested"
|
|
bitfld.long 0x24 16. " [113] ,New Data Bit[113]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 15. " [112] ,New Data Bit[112]" "Not requested,Requested"
|
|
bitfld.long 0x24 14. " [111] ,New Data Bit[111]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 13. " [110] ,New Data Bit[110]" "Not requested,Requested"
|
|
bitfld.long 0x24 12. " [109] ,New Data Bit[109]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 11. " [108] ,New Data Bit[108]" "Not requested,Requested"
|
|
bitfld.long 0x24 10. " [107] ,New Data Bit[107]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 9. " [106] ,New Data Bit[106]" "Not requested,Requested"
|
|
bitfld.long 0x24 8. " [105] ,New Data Bit[105]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 7. " [104] ,New Data Bit[104]" "Not requested,Requested"
|
|
bitfld.long 0x24 6. " [103] ,New Data Bit[103]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 5. " [102] ,New Data Bit[102]" "Not requested,Requested"
|
|
bitfld.long 0x24 4. " [101] ,New Data Bit[101]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 3. " [100] ,New Data Bit[100]" "Not requested,Requested"
|
|
bitfld.long 0x24 2. " [99] ,New Data Bit[99]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 1. " [98] ,New Data Bit[98]" "Not requested,Requested"
|
|
bitfld.long 0x24 0. " [97] ,New Data Bit[97]" "Not requested,Requested"
|
|
line.long 0x28 "INTPEN,Interrupt Pending X"
|
|
bitfld.long 0x28 14.--15. " INTPENDREG[8] ,Interrupt Pending 8" "0,1,2,3"
|
|
bitfld.long 0x28 12.--13. " [7] ,Interrupt Pending 7" "0,1,2,3"
|
|
bitfld.long 0x28 10.--11. " [6] ,Interrupt Pending 6" "0,1,2,3"
|
|
bitfld.long 0x28 8.--9. " [5] ,Interrupt Pending 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 6.--7. " [4] ,Interrupt Pending 4" "0,1,2,3"
|
|
bitfld.long 0x28 4.--5. " [3] ,Interrupt Pending 3" "0,1,2,3"
|
|
bitfld.long 0x28 2.--3. " [2] ,Interrupt Pending 2" "0,1,2,3"
|
|
bitfld.long 0x28 0.--1. " [1] ,Interrupt Pending 1" "0,1,2,3"
|
|
line.long 0x2C "INTPEN12,Interrupt Pending 1-2"
|
|
bitfld.long 0x2C 31. " IntPnd[32] ,Interrupt Pending Bit[32]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 30. " [31] ,Interrupt Pending Bit[31]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 29. " [30] ,Interrupt Pending Bit[30]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 28. " [29] ,Interrupt Pending Bit[29]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 27. " [28] ,Interrupt Pending Bit[28]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 26. " [27] ,Interrupt Pending Bit[27]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 25. " [26] ,Interrupt Pending Bit[26]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 24. " [25] ,Interrupt Pending Bit[25]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 23. " [24] ,Interrupt Pending Bit[24]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 22. " [23] ,Interrupt Pending Bit[23]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 21. " [22] ,Interrupt Pending Bit[22]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 20. " [21] ,Interrupt Pending Bit[21]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 19. " [20] ,Interrupt Pending Bit[20]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 18. " [19] ,Interrupt Pending Bit[19]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 17. " [18] ,Interrupt Pending Bit[18]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 16. " [17] ,Interrupt Pending Bit[17]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 15. " [16] ,Interrupt Pending Bit[16]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 14. " [15] ,Interrupt Pending Bit[15]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 13. " [14] ,Interrupt Pending Bit[14]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 12. " [13] ,Interrupt Pending Bit[13]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 11. " [12] ,Interrupt Pending Bit[12]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 10. " [11] ,Interrupt Pending Bit[11]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 9. " [10] ,Interrupt Pending Bit[10]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 8. " [9] ,Interrupt Pending Bit[9]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 7. " [8] ,Interrupt Pending Bit[8]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 6. " [7] ,Interrupt Pending Bit[7]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 5. " [6] ,Interrupt Pending Bit[6]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 4. " [5] ,Interrupt Pending Bit[5]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 3. " [4] ,Interrupt Pending Bit[4]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 2. " [3] ,Interrupt Pending Bit[3]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 1. " [2] ,Interrupt Pending Bit[2]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 0. " [1] ,Interrupt Pending Bit[1]" "No interrupt,Interrupt"
|
|
line.long 0x30 "INTPEN34,Interrupt Pending 3-4"
|
|
bitfld.long 0x30 31. " INTPND[64] ,Interrupt Pending Bit[64]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 30. " [63] ,Interrupt Pending Bit[63]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 29. " [62] ,Interrupt Pending Bit[62]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 28. " [61] ,Interrupt Pending Bit[61]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 27. " [60] ,Interrupt Pending Bit[60]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 26. " [59] ,Interrupt Pending Bit[59]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 25. " [58] ,Interrupt Pending Bit[58]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 24. " [57] ,Interrupt Pending Bit[57]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 23. " [56] ,Interrupt Pending Bit[56]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 22. " [55] ,Interrupt Pending Bit[55]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 21. " [54] ,Interrupt Pending Bit[54]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 20. " [53] ,Interrupt Pending Bit[53]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 19. " [52] ,Interrupt Pending Bit[52]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 18. " [51] ,Interrupt Pending Bit[51]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 17. " [50] ,Interrupt Pending Bit[50]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 16. " [49] ,Interrupt Pending Bit[49]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 15. " [48] ,Interrupt Pending Bit[48]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 14. " [47] ,Interrupt Pending Bit[47]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 13. " [46] ,Interrupt Pending Bit[46]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 12. " [45] ,Interrupt Pending Bit[45]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 11. " [44] ,Interrupt Pending Bit[44]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 10. " [43] ,Interrupt Pending Bit[43]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 9. " [42] ,Interrupt Pending Bit[42]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 8. " [41] ,Interrupt Pending Bit[41]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 7. " [40] ,Interrupt Pending Bit[40]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 6. " [39] ,Interrupt Pending Bit[39]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 5. " [38] ,Interrupt Pending Bit[38]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 4. " [37] ,Interrupt Pending Bit[37]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 3. " [36] ,Interrupt Pending Bit[36]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 2. " [35] ,Interrupt Pending Bit[35]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 1. " [34] ,Interrupt Pending Bit[34]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 0. " [33] ,Interrupt Pending Bit[33]" "No interrupt,Interrupt"
|
|
line.long 0x34 "INTPEN56,Interrupt Pending 5-6"
|
|
bitfld.long 0x34 31. " INTPND[96] ,Interrupt Pending Bit[96]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 30. " [95] ,Interrupt Pending Bit[95]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 29. " [94] ,Interrupt Pending Bit[94]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 28. " [93] ,Interrupt Pending Bit[93]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 27. " [92] ,Interrupt Pending Bit[92]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 26. " [91] ,Interrupt Pending Bit[91]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 25. " [90] ,Interrupt Pending Bit[90]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 24. " [89] ,Interrupt Pending Bit[89]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 23. " [88] ,Interrupt Pending Bit[88]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 22. " [87] ,Interrupt Pending Bit[87]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 21. " [86] ,Interrupt Pending Bit[86]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 20. " [85] ,Interrupt Pending Bit[85]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 19. " [84] ,Interrupt Pending Bit[84]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 18. " [83] ,Interrupt Pending Bit[83]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 17. " [82] ,Interrupt Pending Bit[82]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 16. " [81] ,Interrupt Pending Bit[81]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 15. " [80] ,Interrupt Pending Bit[80]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 14. " [79] ,Interrupt Pending Bit[79]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 13. " [78] ,Interrupt Pending Bit[78]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 12. " [77] ,Interrupt Pending Bit[77]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 11. " [76] ,Interrupt Pending Bit[76]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 10. " [75] ,Interrupt Pending Bit[75]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 9. " [74] ,Interrupt Pending Bit[74]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 8. " [73] ,Interrupt Pending Bit[73]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 7. " [72] ,Interrupt Pending Bit[72]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 6. " [71] ,Interrupt Pending Bit[71]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 5. " [70] ,Interrupt Pending Bit[70]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 4. " [69] ,Interrupt Pending Bit[69]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 3. " [68] ,Interrupt Pending Bit[68]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 2. " [67] ,Interrupt Pending Bit[67]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 1. " [66] ,Interrupt Pending Bit[66]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 0. " [65] ,Interrupt Pending Bit[65]" "No interrupt,Interrupt"
|
|
line.long 0x38 "INTPEN78,Interrupt Pending 7-8"
|
|
bitfld.long 0x38 31. " INTPND[128] ,Interrupt Pending Bit[128]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 30. " [127] ,Interrupt Pending Bit[127]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 29. " [126] ,Interrupt Pending Bit[126]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 28. " [125] ,Interrupt Pending Bit[125]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 27. " [124] ,Interrupt Pending Bit[124]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 26. " [123] ,Interrupt Pending Bit[123]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 25. " [122] ,Interrupt Pending Bit[122]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 24. " [121] ,Interrupt Pending Bit[121]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 23. " [120] ,Interrupt Pending Bit[120]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 22. " [119] ,Interrupt Pending Bit[119]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 21. " [118] ,Interrupt Pending Bit[118]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 20. " [117] ,Interrupt Pending Bit[117]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 19. " [116] ,Interrupt Pending Bit[116]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 18. " [115] ,Interrupt Pending Bit[115]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 17. " [114] ,Interrupt Pending Bit[114]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 16. " [113] ,Interrupt Pending Bit[113]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 15. " [112] ,Interrupt Pending Bit[112]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 14. " [111] ,Interrupt Pending Bit[111]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 13. " [110] ,Interrupt Pending Bit[110]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 12. " [109] ,Interrupt Pending Bit[109]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 11. " [108] ,Interrupt Pending Bit[108]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 10. " [107] ,Interrupt Pending Bit[107]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 9. " [106] ,Interrupt Pending Bit[106]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 8. " [105] ,Interrupt Pending Bit[105]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 7. " [104] ,Interrupt Pending Bit[104]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 6. " [103] ,Interrupt Pending Bit[103]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 5. " [102] ,Interrupt Pending Bit[102]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 4. " [101] ,Interrupt Pending Bit[101]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 3. " [100] ,Interrupt Pending Bit[100]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 2. " [99] ,Interrupt Pending Bit[99]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 1. " [98] ,Interrupt Pending Bit[98]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 0. " [97] ,Interrupt Pending Bit[97]" "No interrupt,Interrupt"
|
|
line.long 0x3C "MVAL,Message Valid X"
|
|
bitfld.long 0x3C 14.--15. " MSGVALREG8 ,Message Valid Register 8" "0,1,2,3"
|
|
bitfld.long 0x3C 12.--13. " [7] ,Message Valid Register 7" "0,1,2,3"
|
|
bitfld.long 0x3C 10.--11. " [6] ,Message Valid Register 6" "0,1,2,3"
|
|
bitfld.long 0x3C 8.--9. " [5] ,Message Valid Register 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x3C 6.--7. " [4] ,Message Valid Register 4" "0,1,2,3"
|
|
bitfld.long 0x3C 4.--5. " [3] ,Message Valid Register 3" "0,1,2,3"
|
|
bitfld.long 0x3C 2.--3. " [2] ,Message Valid Register 2" "0,1,2,3"
|
|
bitfld.long 0x3C 0.--1. " [1] ,Message Valid Register 1" "0,1,2,3"
|
|
line.long 0x40 "MVAL12,Message Valid 1-2"
|
|
bitfld.long 0x40 31. " MSGVAL[32] ,Message Valid Bit[32]" "Ignored,Configured"
|
|
bitfld.long 0x40 30. " [31] ,Message Valid Bit[31]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 29. " [30] ,Message Valid Bit[30]" "Ignored,Configured"
|
|
bitfld.long 0x40 28. " [29] ,Message Valid Bit[29]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 27. " [28] ,Message Valid Bit[28]" "Ignored,Configured"
|
|
bitfld.long 0x40 26. " [27] ,Message Valid Bit[27]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 25. " [26] ,Message Valid Bit[26]" "Ignored,Configured"
|
|
bitfld.long 0x40 24. " [25] ,Message Valid Bit[25]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 23. " [24] ,Message Valid Bit[24]" "Ignored,Configured"
|
|
bitfld.long 0x40 22. " [23] ,Message Valid Bit[23]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 21. " [22] ,Message Valid Bit[22]" "Ignored,Configured"
|
|
bitfld.long 0x40 20. " [21] ,Message Valid Bit[21]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 19. " [20] ,Message Valid Bit[20]" "Ignored,Configured"
|
|
bitfld.long 0x40 18. " [19] ,Message Valid Bit[19]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 17. " [18] ,Message Valid Bit[18]" "Ignored,Configured"
|
|
bitfld.long 0x40 16. " [17] ,Message Valid Bit[17]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 15. " [16] ,Message Valid Bit[16]" "Ignored,Configured"
|
|
bitfld.long 0x40 14. " [15] ,Message Valid Bit[15]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 13. " [14] ,Message Valid Bit[14]" "Ignored,Configured"
|
|
bitfld.long 0x40 12. " [13] ,Message Valid Bit[13]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 11. " [12] ,Message Valid Bit[12]" "Ignored,Configured"
|
|
bitfld.long 0x40 10. " [11] ,Message Valid Bit[11]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 9. " [10] ,Message Valid Bit[10]" "Ignored,Configured"
|
|
bitfld.long 0x40 8. " [9] ,Message Valid Bit[9]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 7. " [8] ,Message Valid Bit[8]" "Ignored,Configured"
|
|
bitfld.long 0x40 6. " [7] ,Message Valid Bit[7]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 5. " [6] ,Message Valid Bit[6]" "Ignored,Configured"
|
|
bitfld.long 0x40 4. " [5] ,Message Valid Bit[5]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 3. " [4] ,Message Valid Bit[4]" "Ignored,Configured"
|
|
bitfld.long 0x40 2. " [3] ,Message Valid Bit[3]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 1. " [2] ,Message Valid Bit[2]" "Ignored,Configured"
|
|
bitfld.long 0x40 0. " [1] ,Message Valid Bit[1]" "Ignored,Configured"
|
|
line.long 0x44 "MVAL34,Message Valid 3-4"
|
|
bitfld.long 0x44 31. " MSGVAl[64] ,Message Valid Bit[64]" "Ignored,Configured"
|
|
bitfld.long 0x44 30. " [63] ,Message Valid Bit[63]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 29. " [62] ,Message Valid Bit[62]" "Ignored,Configured"
|
|
bitfld.long 0x44 28. " [61] ,Message Valid Bit[61]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 27. " [60] ,Message Valid Bit[60]" "Ignored,Configured"
|
|
bitfld.long 0x44 26. " [59] ,Message Valid Bit[59]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 25. " [58] ,Message Valid Bit[58]" "Ignored,Configured"
|
|
bitfld.long 0x44 24. " [57] ,Message Valid Bit[57]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 23. " [56] ,Message Valid Bit[56]" "Ignored,Configured"
|
|
bitfld.long 0x44 22. " [55] ,Message Valid Bit[55]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 21. " [54] ,Message Valid Bit[54]" "Ignored,Configured"
|
|
bitfld.long 0x44 20. " [53] ,Message Valid Bit[53]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 19. " [52] ,Message Valid Bit[52]" "Ignored,Configured"
|
|
bitfld.long 0x44 18. " [51] ,Message Valid Bit[51]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 17. " [50] ,Message Valid Bit[50]" "Ignored,Configured"
|
|
bitfld.long 0x44 16. " [49] ,Message Valid Bit[49]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 15. " [48] ,Message Valid Bit[48]" "Ignored,Configured"
|
|
bitfld.long 0x44 14. " [47] ,Message Valid Bit[47]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 13. " [46] ,Message Valid Bit[46]" "Ignored,Configured"
|
|
bitfld.long 0x44 12. " [45] ,Message Valid Bit[45]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 11. " [44] ,Message Valid Bit[44]" "Ignored,Configured"
|
|
bitfld.long 0x44 10. " [43] ,Message Valid Bit[43]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 9. " [42] ,Message Valid Bit[42]" "Ignored,Configured"
|
|
bitfld.long 0x44 8. " [41] ,Message Valid Bit[41]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 7. " [40] ,Message Valid Bit[40]" "Ignored,Configured"
|
|
bitfld.long 0x44 6. " [39] ,Message Valid Bit[39]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 5. " [38] ,Message Valid Bit[38]" "Ignored,Configured"
|
|
bitfld.long 0x44 4. " [37] ,Message Valid Bit[37]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 3. " [36] ,Message Valid Bit[36]" "Ignored,Configured"
|
|
bitfld.long 0x44 2. " [35] ,Message Valid Bit[35]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 1. " [34] ,Message Valid Bit[34]" "Ignored,Configured"
|
|
bitfld.long 0x44 0. " [33] ,Message Valid Bit[33]" "Ignored,Configured"
|
|
line.long 0x48 "MVAL56,Message Valid 5-6"
|
|
bitfld.long 0x48 31. " MSGVAl[96] ,Message Valid Bit[96]" "Ignored,Configured"
|
|
bitfld.long 0x48 30. " [95] ,Message Valid Bit[95]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 29. " [94] ,Message Valid Bit[94]" "Ignored,Configured"
|
|
bitfld.long 0x48 28. " [93] ,Message Valid Bit[93]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 27. " [92] ,Message Valid Bit[92]" "Ignored,Configured"
|
|
bitfld.long 0x48 26. " [91] ,Message Valid Bit[91]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 25. " [90] ,Message Valid Bit[90]" "Ignored,Configured"
|
|
bitfld.long 0x48 24. " [89] ,Message Valid Bit[89]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 23. " [88] ,Message Valid Bit[88]" "Ignored,Configured"
|
|
bitfld.long 0x48 22. " [87] ,Message Valid Bit[87]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 21. " [86] ,Message Valid Bit[86]" "Ignored,Configured"
|
|
bitfld.long 0x48 20. " [85] ,Message Valid Bit[85]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 19. " [84] ,Message Valid Bit[84]" "Ignored,Configured"
|
|
bitfld.long 0x48 18. " [83] ,Message Valid Bit[83]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 17. " [82] ,Message Valid Bit[82]" "Ignored,Configured"
|
|
bitfld.long 0x48 16. " [81] ,Message Valid Bit[81]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 15. " [80] ,Message Valid Bit[80]" "Ignored,Configured"
|
|
bitfld.long 0x48 14. " [79] ,Message Valid Bit[79]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 13. " [78] ,Message Valid Bit[78]" "Ignored,Configured"
|
|
bitfld.long 0x48 12. " [77] ,Message Valid Bit[77]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 11. " [76] ,Message Valid Bit[76]" "Ignored,Configured"
|
|
bitfld.long 0x48 10. " [75] ,Message Valid Bit[75]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 9. " [74] ,Message Valid Bit[74]" "Ignored,Configured"
|
|
bitfld.long 0x48 8. " [73] ,Message Valid Bit[73]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 7. " [72] ,Message Valid Bit[72]" "Ignored,Configured"
|
|
bitfld.long 0x48 6. " [71] ,Message Valid Bit[71]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 5. " [70] ,Message Valid Bit[70]" "Ignored,Configured"
|
|
bitfld.long 0x48 4. " [69] ,Message Valid Bit[69]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 3. " [68] ,Message Valid Bit[68]" "Ignored,Configured"
|
|
bitfld.long 0x48 2. " [67] ,Message Valid Bit[67]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 1. " [66] ,Message Valid Bit[66]" "Ignored,Configured"
|
|
bitfld.long 0x48 0. " [65] ,Message Valid Bit[65]" "Ignored,Configured"
|
|
line.long 0x4C "MVAL78,Message Valid 7-8"
|
|
bitfld.long 0x4C 31. " MSGVAl[128] ,Message Valid Bit[128]" "Ignored,Configured"
|
|
bitfld.long 0x4C 30. " [127] ,Message Valid Bit[127]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 29. " [126] ,Message Valid Bit[126]" "Ignored,Configured"
|
|
bitfld.long 0x4C 28. " [125] ,Message Valid Bit[125]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 27. " [124] ,Message Valid Bit[124]" "Ignored,Configured"
|
|
bitfld.long 0x4C 26. " [123] ,Message Valid Bit[123]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 25. " [122] ,Message Valid Bit[122]" "Ignored,Configured"
|
|
bitfld.long 0x4C 24. " [121] ,Message Valid Bit[121]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 23. " [120] ,Message Valid Bit[120]" "Ignored,Configured"
|
|
bitfld.long 0x4C 22. " [119] ,Message Valid Bit[119]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 21. " [118] ,Message Valid Bit[118]" "Ignored,Configured"
|
|
bitfld.long 0x4C 20. " [117] ,Message Valid Bit[117]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 19. " [116] ,Message Valid Bit[116]" "Ignored,Configured"
|
|
bitfld.long 0x4C 18. " [115] ,Message Valid Bit[115]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 17. " [114] ,Message Valid Bit[114]" "Ignored,Configured"
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bitfld.long 0x4C 16. " [113] ,Message Valid Bit[113]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 15. " [112] ,Message Valid Bit[112]" "Ignored,Configured"
|
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bitfld.long 0x4C 14. " [111] ,Message Valid Bit[111]" "Ignored,Configured"
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|
newline
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bitfld.long 0x4C 13. " [110] ,Message Valid Bit[110]" "Ignored,Configured"
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bitfld.long 0x4C 12. " [109] ,Message Valid Bit[109]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 11. " [108] ,Message Valid Bit[108]" "Ignored,Configured"
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bitfld.long 0x4C 10. " [107] ,Message Valid Bit[107]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 9. " [106] ,Message Valid Bit[106]" "Ignored,Configured"
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bitfld.long 0x4C 8. " [105] ,Message Valid Bit[105]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 7. " [104] ,Message Valid Bit[104]" "Ignored,Configured"
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bitfld.long 0x4C 6. " [103] ,Message Valid Bit[103]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 5. " [102] ,Message Valid Bit[102]" "Ignored,Configured"
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bitfld.long 0x4C 4. " [101] ,Message Valid Bit[101]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 3. " [100] ,Message Valid Bit[100]" "Ignored,Configured"
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bitfld.long 0x4C 2. " [99] ,Message Valid Bit[99]" "Ignored,Configured"
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newline
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bitfld.long 0x4C 1. " [98] ,Message Valid Bit[98]" "Ignored,Configured"
|
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bitfld.long 0x4C 0. " [97] ,Message Valid Bit[97]" "Ignored,Configured"
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group.long 0xD8++0x0F
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line.long 0x00 "INTPMX12,Interrupt Multiplexer 1-2"
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bitfld.long 0x00 31. " INTPNDMUX[32] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[32]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 30. " [31] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[31]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 29. " [30] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[30]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 28. " [29] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[29]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 27. " [28] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[28]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 26. " [27] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[27]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 25. " [26] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[26]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 24. " [25] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[25]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 23. " [24] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[24]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 22. " [23] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[23]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 21. " [22] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[22]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 20. " [21] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[21]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 19. " [20] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[20]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 18. " [19] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[19]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 17. " [18] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[18]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 16. " [17] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[17]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 15. " [16] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[16]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x00 14. " [15] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[15]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 13. " [14] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[14]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 12. " [13] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[13]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 11. " [12] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[12]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 10. " [11] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[11]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 9. " [10] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[10]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 8. " [9] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[9]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 7. " [8] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[8]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 6. " [7] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[7]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 5. " [6] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[6]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 4. " [5] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[5]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 3. " [4] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[4]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x00 2. " [3] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[3]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x00 1. " [2] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[2]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x00 0. " [1] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[1]" "DCAN0INT,DCAN1INT"
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line.long 0x04 "INTPMX34,Interrupt Multiplexer 3-4"
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bitfld.long 0x04 31. " INTPNDMUX[64] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[64]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x04 30. " [63] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[63]" "DCAN0INT,DCAN1INT"
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newline
|
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bitfld.long 0x04 29. " [62] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[62]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x04 28. " [61] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[61]" "DCAN0INT,DCAN1INT"
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newline
|
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bitfld.long 0x04 27. " [60] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[60]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 26. " [59] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[59]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x04 25. " [58] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[58]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x04 24. " [57] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[57]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x04 23. " [56] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[56]" "DCAN0INT,DCAN1INT"
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bitfld.long 0x04 22. " [55] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[55]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x04 21. " [54] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[54]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x04 20. " [53] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[53]" "DCAN0INT,DCAN1INT"
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newline
|
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bitfld.long 0x04 19. " [52] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[52]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x04 18. " [51] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[51]" "DCAN0INT,DCAN1INT"
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newline
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bitfld.long 0x04 17. " [50] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[50]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x04 16. " [49] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[49]" "DCAN0INT,DCAN1INT"
|
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newline
|
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bitfld.long 0x04 15. " [48] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[48]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 14. " [47] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[47]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x04 13. " [46] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[46]" "DCAN0INT,DCAN1INT"
|
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bitfld.long 0x04 12. " [45] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[45]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x04 11. " [44] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[44]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 10. " [43] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[43]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x04 9. " [42] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[42]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 8. " [41] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[41]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x04 7. " [40] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[40]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 6. " [39] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[39]" "DCAN0INT,DCAN1INT"
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newline
|
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bitfld.long 0x04 5. " [38] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[38]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 4. " [37] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[37]" "DCAN0INT,DCAN1INT"
|
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newline
|
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bitfld.long 0x04 3. " [36] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[36]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 2. " [35] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[35]" "DCAN0INT,DCAN1INT"
|
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newline
|
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bitfld.long 0x04 1. " [34] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[34]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 0. " [33] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[33]" "DCAN0INT,DCAN1INT"
|
|
line.long 0x08 "INTPMX56,Interrupt Multiplexer 5-6"
|
|
bitfld.long 0x08 31. " INTPNDMUX[96] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[96]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 30. " [95] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[95]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 29. " [94] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[94]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 28. " [93] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[93]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 27. " [92] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[92]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 26. " [91] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[91]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 25. " [90] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[90]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 24. " [89] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[89]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 23. " [88] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[88]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 22. " [87] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[87]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 21. " [86] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[86]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 20. " [85] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[85]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 19. " [84] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[84]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 18. " [83] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[83]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 17. " [82] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[82]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 16. " [81] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[81]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 15. " [80] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[80]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 14. " [79] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[79]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 13. " [78] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[78]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 12. " [77] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[77]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 11. " [76] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[76]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 10. " [75] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[75]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 9. " [74] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[74]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 8. " [73] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[73]" "DCAN0INT,DCAN1INT"
|
|
newline
|
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bitfld.long 0x08 7. " [72] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[72]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 6. " [71] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[71]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 5. " [70] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[70]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 4. " [69] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[69]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 3. " [68] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[68]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 2. " [67] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[67]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 1. " [66] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[66]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 0. " [65] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[65]" "DCAN0INT,DCAN1INT"
|
|
line.long 0x0C "INTPMX78,Interrupt Multiplexer 7-8"
|
|
bitfld.long 0x0C 31. " INTPNDMUX[128] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[128]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 30. " [127] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[127]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 29. " [126] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[126]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 28. " [125] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[125]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 27. " [124] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[124]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 26. " [123] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[123]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 25. " [122] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[122]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 24. " [121] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[121]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 23. " [120] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[120]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 22. " [119] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[119]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 21. " [118] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[118]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 20. " [117] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[117]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 19. " [116] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[116]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 18. " [115] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[115]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 17. " [114] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[114]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 16. " [113] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[113]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 15. " [112] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[112]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 14. " [111] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[111]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 13. " [110] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[110]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 12. " [109] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[109]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 11. " [108] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[108]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 10. " [107] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[107]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 9. " [106] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[106]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 8. " [105] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[105]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 7. " [104] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[104]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 6. " [103] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[103]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 5. " [102] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[102]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 4. " [101] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[101]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 3. " [100] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[100]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 2. " [99] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[99]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 1. " [98] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[98]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 0. " [97] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[97]" "DCAN0INT,DCAN1INT"
|
|
group.long 0x100++0x3 "IF1"
|
|
line.long 0x00 "IF1COM,IF1 Command Mask / Command Request Register"
|
|
bitfld.long 0x00 23. " WR/RD ,Write / Read direction" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 22. " MASK ,Access Mask Bits" "Unchanged,Identifier Mask+MDir+MXtd"
|
|
newline
|
|
bitfld.long 0x00 21. " ARB ,Access Arbitration Bits" "Unchanged,Identifier+Dir+Xtd+MSGVAl"
|
|
newline
|
|
bitfld.long 0x00 20. " CONTROL ,Access Control Bits" "Unchanged,Control bits"
|
|
bitfld.long 0x00 19. " CLRINTPND ,Clear Interrupt Pending Bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " TXRQST/NEWDAT ,Access Transmission Request Bit" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " DATA_A ,Access Data Bytes 0-3" "Unchanged,Data bytes 0-3"
|
|
newline
|
|
bitfld.long 0x00 16. " DATA_B ,Access Data Bytes 4-7" "Unchanged,Data bytes 4-7"
|
|
bitfld.long 0x00 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
newline
|
|
sif (!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432"))
|
|
bitfld.long 0x00 14. " DMAACTIVE ,Activation of DMA Feature for Subsequent Internal IF1 Update" "No active,Active"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS3137-EP")
|
|
if (((per.l.be(((ad:0xFFF7DC00+0x100+0x08))))&0x40000000)==0x0)
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitration Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x00 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l(((ad:0xFFF7DC00+0x100+0x08))))&0x40000000)==0x0)
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long (0x100+0x0C)++0x0B
|
|
line.long 0x00 "IF1MCTRL,IF1 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Set"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Single/Last,Not last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF1DATA,IF1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF1DATB,IF1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x120++0x3 "IF2"
|
|
line.long 0x00 "IF2COM,IF2 Command Mask / Command Request Register"
|
|
bitfld.long 0x00 23. " WR/RD ,Write / Read direction" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 22. " MASK ,Access Mask Bits" "Unchanged,Identifier Mask+MDir+MXtd"
|
|
newline
|
|
bitfld.long 0x00 21. " ARB ,Access Arbitration Bits" "Unchanged,Identifier+Dir+Xtd+MSGVAl"
|
|
newline
|
|
bitfld.long 0x00 20. " CONTROL ,Access Control Bits" "Unchanged,Control bits"
|
|
bitfld.long 0x00 19. " CLRINTPND ,Clear Interrupt Pending Bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " TXRQST/NEWDAT ,Access Transmission Request Bit" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " DATA_A ,Access Data Bytes 0-3" "Unchanged,Data bytes 0-3"
|
|
newline
|
|
bitfld.long 0x00 16. " DATA_B ,Access Data Bytes 4-7" "Unchanged,Data bytes 4-7"
|
|
bitfld.long 0x00 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
newline
|
|
sif (!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432"))
|
|
bitfld.long 0x00 14. " DMAACTIVE ,Activation of DMA Feature for Subsequent Internal IF1 Update" "No active,Active"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS3137-EP")
|
|
if (((per.l.be(((ad:0xFFF7DC00+0x120+0x08))))&0x40000000)==0x0)
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitration Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x00 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l(((ad:0xFFF7DC00+0x120+0x08))))&0x40000000)==0x0)
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long (0x120+0x0C)++0x0B
|
|
line.long 0x00 "IF2MCTRL,IF2 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Set"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Single/Last,Not last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF2DATA,IF2 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF2DATB,IF2 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x140++0x3 "IF3"
|
|
line.long 0x00 "IF3OB,IF3 Observation Register"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS21*")||cpuis("TMS570LS31*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
rbitfld.long 0x00 15. " IF3UPD ,IF3 Updata Data" "Not loaded,Loaded"
|
|
rbitfld.long 0x00 12. " IF3SDB ,IF3 Status of Data B Read Access" "Low,High"
|
|
rbitfld.long 0x00 11. " IF3SDA ,IF3 Status of Data A Read Access" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 10. " IF3SC ,IF3 Status of Control Bits Read Access" "Low,High"
|
|
rbitfld.long 0x00 9. " IF3SA ,IF3 Status of Arbitration Data Read Access" "Low,High"
|
|
rbitfld.long 0x00 8. " IF3SM ,IF3 Status of Mask Data Read Access" "Low,High"
|
|
else
|
|
bitfld.long 0x00 15. " IF3UPD ,IF3 Updata Data" "Not loaded,Loaded"
|
|
bitfld.long 0x00 12. " IF3SDB ,IF3 Status of Data B Read Access" "Low,High"
|
|
bitfld.long 0x00 11. " IF3SDA ,IF3 Status of Data A Read Access" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 10. " IF3SC ,IF3 Status of Control Bits Read Access" "Low,High"
|
|
bitfld.long 0x00 9. " IF3SA ,IF3 Status of Arbitration Data Read Access" "Low,High"
|
|
bitfld.long 0x00 8. " IF3SM ,IF3 Status of Mask Data Read Access" "Low,High"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4. " DATA_B ,Data B Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 3. " DATA_A ,Data A Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 2. " CTRL ,Ctrl Read Observation" "Not read,Read"
|
|
newline
|
|
bitfld.long 0x00 1. " ARB ,Arbitration Data Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 0. " MASK ,Mask Data Read Observation" "Not read,Read"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be((ad:0xFFF7DC00+0x148)))&0x40000000)==0x0)
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x00 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXtd ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDir ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l((ad:0xFFF7DC00+0x148)))&0x40000000)==0x0)
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXtd ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDir ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long 0x14C++0x0B
|
|
line.long 0x00 "IF3MCTRL,IF3 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Enabled"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Not last,Single/Last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF3DATA,IF3 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF3DATB,IF3 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x160++0x0F
|
|
line.long 0x0 "IF3UENA2_1,Update Enable 2_1 Register"
|
|
bitfld.long 0x00 31. " IF3UPDATEEN[32] ,IF3 Update Enabled Bit[32]" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [31] ,IF3 Update Enabled Bit[31]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 29. " [30] ,IF3 Update Enabled Bit[30]" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [29] ,IF3 Update Enabled Bit[29]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " [28] ,IF3 Update Enabled Bit[28]" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [27] ,IF3 Update Enabled Bit[27]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " [26] ,IF3 Update Enabled Bit[26]" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [25] ,IF3 Update Enabled Bit[25]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " [24] ,IF3 Update Enabled Bit[24]" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [23] ,IF3 Update Enabled Bit[23]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " [22] ,IF3 Update Enabled Bit[22]" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [21] ,IF3 Update Enabled Bit[21]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [20] ,IF3 Update Enabled Bit[20]" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [19] ,IF3 Update Enabled Bit[19]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 17. " [18] ,IF3 Update Enabled Bit[18]" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [17] ,IF3 Update Enabled Bit[17]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. " [16] ,IF3 Update Enabled Bit[16]" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [15] ,IF3 Update Enabled Bit[15]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " [14] ,IF3 Update Enabled Bit[14]" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [13] ,IF3 Update Enabled Bit[13]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " [12] ,IF3 Update Enabled Bit[12]" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [11] ,IF3 Update Enabled Bit[11]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " [10] ,IF3 Update Enabled Bit[10]" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [9] ,IF3 Update Enabled Bit[9]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " [8] ,IF3 Update Enabled Bit[8]" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [7] ,IF3 Update Enabled Bit[7]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " [6] ,IF3 Update Enabled Bit[6]" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [5] ,IF3 Update Enabled Bit[5]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [4] ,IF3 Update Enabled Bit[4]" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [3] ,IF3 Update Enabled Bit[3]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " [2] ,IF3 Update Enabled Bit[2]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [1] ,IF3 Update Enabled Bit[1]" "Disabled,Enabled"
|
|
line.long 0x04 "IF3UENA4_3,Update Enable 4_3 Register"
|
|
bitfld.long 0x04 31. " IF3UPDATEEN[64] ,IF3 Update Enabled Bit[64]" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " [63] ,IF3 Update Enabled Bit[63]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 29. " [62] ,IF3 Update Enabled Bit[62]" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " [61] ,IF3 Update Enabled Bit[61]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 27. " [60] ,IF3 Update Enabled Bit[60]" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " [59] ,IF3 Update Enabled Bit[59]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 25. " [58] ,IF3 Update Enabled Bit[58]" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " [57] ,IF3 Update Enabled Bit[57]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 23. " [56] ,IF3 Update Enabled Bit[56]" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " [55] ,IF3 Update Enabled Bit[55]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 21. " [54] ,IF3 Update Enabled Bit[54]" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " [53] ,IF3 Update Enabled Bit[53]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " [52] ,IF3 Update Enabled Bit[52]" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " [51] ,IF3 Update Enabled Bit[51]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 17. " [50] ,IF3 Update Enabled Bit[50]" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " [49] ,IF3 Update Enabled Bit[49]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 15. " [48] ,IF3 Update Enabled Bit[48]" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " [47] ,IF3 Update Enabled Bit[47]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 13. " [46] ,IF3 Update Enabled Bit[46]" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " [45] ,IF3 Update Enabled Bit[45]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 11. " [44] ,IF3 Update Enabled Bit[44]" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " [43] ,IF3 Update Enabled Bit[43]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " [42] ,IF3 Update Enabled Bit[42]" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " [41] ,IF3 Update Enabled Bit[41]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 7. " [40] ,IF3 Update Enabled Bit[40]" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [39] ,IF3 Update Enabled Bit[39]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 5. " [38] ,IF3 Update Enabled Bit[38]" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [37] ,IF3 Update Enabled Bit[37]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " [36] ,IF3 Update Enabled Bit[36]" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [35] ,IF3 Update Enabled Bit[35]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 1. " [34] ,IF3 Update Enabled Bit[34]" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [33] ,IF3 Update Enabled Bit[33]" "Disabled,Enabled"
|
|
line.long 0x08 "IF3UENA6_5,Update Enable 6_5 Register"
|
|
bitfld.long 0x08 31. " IF3UPDATEEN[96] ,IF3 Update Enabled Bit[96]" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " [95] ,IF3 Update Enabled Bit[95]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 29. " [94] ,IF3 Update Enabled Bit[94]" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " [93] ,IF3 Update Enabled Bit[93]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 27. " [92] ,IF3 Update Enabled Bit[92]" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " [91] ,IF3 Update Enabled Bit[91]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 25. " [90] ,IF3 Update Enabled Bit[90]" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " [89] ,IF3 Update Enabled Bit[89]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 23. " [88] ,IF3 Update Enabled Bit[88]" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " [87] ,IF3 Update Enabled Bit[87]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 21. " [86] ,IF3 Update Enabled Bit[86]" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " [85] ,IF3 Update Enabled Bit[85]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 19. " [84] ,IF3 Update Enabled Bit[84]" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " [83] ,IF3 Update Enabled Bit[83]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 17. " [82] ,IF3 Update Enabled Bit[82]" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " [81] ,IF3 Update Enabled Bit[81]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 15. " [80] ,IF3 Update Enabled Bit[80]" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " [79] ,IF3 Update Enabled Bit[79]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 13. " [78] ,IF3 Update Enabled Bit[78]" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " [77] ,IF3 Update Enabled Bit[77]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 11. " [76] ,IF3 Update Enabled Bit[76]" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " [75] ,IF3 Update Enabled Bit[75]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 9. " [74] ,IF3 Update Enabled Bit[74]" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " [73] ,IF3 Update Enabled Bit[73]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 7. " [72] ,IF3 Update Enabled Bit[72]" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " [71] ,IF3 Update Enabled Bit[71]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 5. " [70] ,IF3 Update Enabled Bit[70]" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " [69] ,IF3 Update Enabled Bit[69]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 3. " [68] ,IF3 Update Enabled Bit[68]" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " [67] ,IF3 Update Enabled Bit[67]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 1. " [66] ,IF3 Update Enabled Bit[66]" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " [65] ,IF3 Update Enabled Bit[65]" "Disabled,Enabled"
|
|
line.long 0x0C "IF3UENA8_7,Update Enable 8_7 Register"
|
|
bitfld.long 0x0C 31. " IF3UPDATEEN[128] ,IF3 Update Enabled Bit[128]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " [127] ,IF3 Update Enabled Bit[127]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 29. " [126] ,IF3 Update Enabled Bit[126]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " [125] ,IF3 Update Enabled Bit[125]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 27. " [124] ,IF3 Update Enabled Bit[124]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " [123] ,IF3 Update Enabled Bit[123]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 25. " [122] ,IF3 Update Enabled Bit[122]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " [121] ,IF3 Update Enabled Bit[121]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 23. " [120] ,IF3 Update Enabled Bit[120]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " [119] ,IF3 Update Enabled Bit[119]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 21. " [118] ,IF3 Update Enabled Bit[118]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " [117] ,IF3 Update Enabled Bit[117]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 19. " [116] ,IF3 Update Enabled Bit[116]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " [115] ,IF3 Update Enabled Bit[115]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 17. " [114] ,IF3 Update Enabled Bit[114]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " [113] ,IF3 Update Enabled Bit[113]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 15. " [112] ,IF3 Update Enabled Bit[112]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " [111] ,IF3 Update Enabled Bit[111]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 13. " [110] ,IF3 Update Enabled Bit[110]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " [109] ,IF3 Update Enabled Bit[109]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 11. " [108] ,IF3 Update Enabled Bit[108]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10. " [107] ,IF3 Update Enabled Bit[107]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 9. " [106] ,IF3 Update Enabled Bit[106]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " [105] ,IF3 Update Enabled Bit[105]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 7. " [104] ,IF3 Update Enabled Bit[104]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " [103] ,IF3 Update Enabled Bit[103]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 5. " [102] ,IF3 Update Enabled Bit[102]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " [101] ,IF3 Update Enabled Bit[101]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 3. " [100] ,IF3 Update Enabled Bit[100]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " [99] ,IF3 Update Enabled Bit[99]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 1. " [98] ,IF3 Update Enabled Bit[98]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " [97] ,IF3 Update Enabled Bit[97]" "Disabled,Enabled"
|
|
newline
|
|
group.long 0x1E0++0x03
|
|
line.long 0x0 "IOCTRLTX,TX IO Control Register"
|
|
sif (cpu()!="TMS470MF031"&&cpu()!="TMS470MF042"&&cpu()!="TMS470MF066"&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")&&!cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 19. " SR ,Slew Rate Selection of Output Driver" "Normal,Slow"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 18. " PU ,Selection of Pull Direction" "Pull down,Pull up"
|
|
bitfld.long 0x00 17. " PD ,Pull Functionality Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " OD ,Open Drain Mode" "Push pull,Open Drain"
|
|
bitfld.long 0x00 3. " FUNC ,Functionality of Pin" "General,CAN"
|
|
newline
|
|
bitfld.long 0x00 2. " DIR ,Direction of Pin" "Input,Output"
|
|
bitfld.long 0x00 1. " OUT ,Value to Drive to Pin if Configured for I/O" "Low,High"
|
|
bitfld.long 0x00 0. " IN ,Value of Pin" "Low,High"
|
|
group.long 0x1E4++0x03
|
|
line.long 0x0 "IOCTRLRX,RX IO Control Register"
|
|
sif (cpu()!="TMS470MF031"&&cpu()!="TMS470MF042"&&cpu()!="TMS470MF066"&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")&&!cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 19. " SR ,Slew Rate Selection of Output Driver" "Normal,Slow"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 18. " PU ,Selection of Pull Direction" "Pull down,Pull up"
|
|
bitfld.long 0x00 17. " PD ,Pull Functionality Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " OD ,Open Drain Mode" "Push pull,Open Drain"
|
|
bitfld.long 0x00 3. " FUNC ,Functionality of Pin" "General,CAN"
|
|
newline
|
|
bitfld.long 0x00 2. " DIR ,Direction of Pin" "Input,Output"
|
|
bitfld.long 0x00 1. " OUT ,Value to Drive to Pin if Configured for I/O" "Low,High"
|
|
bitfld.long 0x00 0. " IN ,Value of Pin" "Low,High"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.le
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "DCAN2"
|
|
base ad:0xFFF7DE00
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "CTRL,Config Register"
|
|
bitfld.long 0x00 25. " WUBA ,Automatic Wake Up on Bus Activity When in Local Power Down Mode" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " PDR ,Request for Local Low Power Down Mode" "Not requested,Power down"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
newline
|
|
bitfld.long 0x00 20. " DE3 ,DMA Enable for IF3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " DE2 ,DMA Enable for IF2" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " DE1 ,DMA Enable for IF1" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 17. " IE1 ,DCAN1INT Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " INITDBG ,Internal Init State While Debug Access Mode" "No debug,Debug"
|
|
bitfld.long 0x00 15. " SWR ,SW Reset Enable" "No reset,Reset"
|
|
bitfld.long 0x00 10.--13. " PMD ,Parity on/off" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " ABO ,Auto Bus On Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " IDS ,Interruption Debug Support Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " TEST ,Test Mode Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " CCE ,Configuration Change Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " DAR ,Disable Automatic Retransmission" "No,Yes"
|
|
bitfld.long 0x00 3. " EIE ,Error Interrupt Enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 2. " SIE ,Status Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " IE ,DCAN0INT Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INIT ,Initialization" "Disabled,Enabled"
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpu()==("TMS570LS10116-ZWT")||cpu()==("TMS570LS10216-ZWT")||cpu()==("TMS570LS10106-ZWT")||cpu()==("TMS570LS10206-ZWT")||cpu()==("TMS570LS10116-PGE")||cpu()==("TMS570LS10216-PGE")||cpu()==("TMS570LS10106-PGE")||cpu()==("TMS570LS10206-PGE")||cpu()==("TMS570LC4357")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*"))
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "ES,Error and Status Register"
|
|
rbitfld.long 0x00 10. " PDA ,Local Power Down Mode Acknowledge" "Not in,Is in"
|
|
rbitfld.long 0x00 9. " WAKEUPPND ,Wake Up Pending" "No requested,Requested"
|
|
rbitfld.long 0x00 8. " PER ,Parity Error Detected" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 7. " BOFF ,Bus-Off State" "Not in,In"
|
|
rbitfld.long 0x00 6. " EWARN ,Warning state" "<96,>96"
|
|
rbitfld.long 0x00 5. " EPASS ,Error Passive State" "CAN Bus,Passive"
|
|
newline
|
|
bitfld.long 0x00 4. " RXOK ,Received a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 3. " TXOK ,Transmitted a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff,Form,Ack,Bit1,Bit0,CRC,No CAN"
|
|
elif !cpuis("TMS570LS3137-EP")
|
|
hgroup.long 0x04++0x3
|
|
hide.long 0x0 "STAT,Status Register"
|
|
in
|
|
else
|
|
if (((per.l.be(ad:0xFFF7DE00))&0x100)==0x100)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "ES,Error and Status Register"
|
|
rbitfld.long 0x00 10. " PDA ,Local Power Down Mode Acknowledge" "Not in,Is in"
|
|
rbitfld.long 0x00 9. " WAKEUPPND ,Wake Up Pending" "No requested,Requested"
|
|
rbitfld.long 0x00 8. " PER ,Parity Error Detected" "No error,Error"
|
|
newline
|
|
rbitfld.long 0x00 7. " BOFF ,Bus-Off State" "Not in,In"
|
|
rbitfld.long 0x00 6. " EWARN ,Warning state" "<96,>96"
|
|
rbitfld.long 0x00 5. " EPASS ,Error Passive State" "CAN Bus,Passive"
|
|
newline
|
|
bitfld.long 0x00 4. " RXOK ,Received a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 3. " TXOK ,Transmitted a Message successfully" "No,Yes"
|
|
bitfld.long 0x00 0.--2. " LEC ,Last Error Code" "No error,Stuff,Form,Ack,Bit1,Bit0,CRC,No CAN"
|
|
else
|
|
hgroup.long 0x04++0x3
|
|
hide.long 0x0 "ES,Error and Status Register"
|
|
in
|
|
endif
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x0 "ERRC,Error Counter Register"
|
|
bitfld.long 0x00 15. " RP ,Receive Error Passive" "Below,Reached"
|
|
hexmask.long.byte 0x00 8.--14. 1. " REC ,Receive Error Counter"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TEC ,Transmit Error Counter"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be(ad:0xFFF7DE00))&0x41)==0x41)
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "BTBRP,Bit Timing_BRP Extension Register"
|
|
bitfld.long 0x00 16.--19. " BRPE ,Baud Rate Prescaler Extension" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--14. " TSEG2 ,The Time Segment After the Sample Point" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--11. " TSEG1 ,The Time Segment Before the Sample Point" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " SJW ,Synchronization Jump Width" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " BRP ,Baud Rate Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "INTR,Interrupt Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " INT1ID[7-0] ,Interrupt 1 Identifier"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15-0] ,Interrupt Identifier"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be(ad:0xFFF7DE00))&0x41)==0x41)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
endif
|
|
elif !cpuis("TMS570LS3137-EP")
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpu()==("TMS570LS10116-ZWT")||cpu()==("TMS570LS10216-ZWT")||cpu()==("TMS570LS10106-ZWT")||cpu()==("TMS570LS10206-ZWT")||cpu()==("TMS570LS10116-PGE")||cpu()==("TMS570LS10216-PGE")||cpu()==("TMS570LS10106-PGE")||cpu()==("TMS570LS10206-PGE")||cpu()==("TMS570LC4357")||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS21*")||cpuis("TMS570LS31*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
else
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Reset,Sample point,Dominant,Recessive"
|
|
endif
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
if (((per.l.be(ad:0xFFF7DE00))&0x80)==0x80)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
else
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "TEST,Test Register"
|
|
bitfld.long 0x00 9. " RDA ,RAM Direct Access Enable" "Normal,Enabled"
|
|
bitfld.long 0x00 8. " EXL ,External Loop Back Mode" "Normal,Enabled"
|
|
bitfld.long 0x00 7. " RX ,Receive Pin" "Dominant,Recessive"
|
|
newline
|
|
bitfld.long 0x00 5.--6. " TX1-0 ,Control of CAN_TX pin" "Normal,Sample point,Dominant,Recessive"
|
|
bitfld.long 0x00 4. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SILENT ,Silent Mode" "Normal,Enabled"
|
|
endif
|
|
endif
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "PERR,Parity Error Code Register"
|
|
bitfld.long 0x00 8.--10. " WORD_NUMBER ,Word Number" ",1,2,3,4,5,?..."
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif (cpu()=="TMS470MF031"||cpu()=="TMS470MF042"||cpu()=="TMS470MF066"||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "REL,DCAN Core Release Register"
|
|
bitfld.long 0x00 28.--31. " REL ,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 24.--27. " STEP ,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " SUBSTEP ,Substep of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 16.--19. " YEAR ,Design Time Stamp - Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
hexmask.long.byte 0x00 8.--15. 1. " MON ,Design Time Stamp - Month"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAY ,Design Time Stamp - Day"
|
|
endif
|
|
width 19.
|
|
sif (cpu()=="TMS570LC4357")
|
|
group.long 0x24++0x0B
|
|
line.long 0x00 "DCAN_ECCDIAG,ECC Diagnostic Register"
|
|
bitfld.long 0x00 0.--3. " ECCDIAG , SECDED diagnostic mode enable/disable" ",,,,,Enabled,,,,,Disabled,?..."
|
|
line.long 0x04 "DCAN_ECCDIAG_STAT, ECC Diagnostic Status Register"
|
|
eventfld.long 0x04 8. " DEFLG_DIAG , Double bit error diagnostic" "No error,Error"
|
|
eventfld.long 0x04 0. " SEFLG_DIAG , Single bit error diagnostic" "No error,Error"
|
|
line.long 0x08 "DCAN_ECC_CS, ECC Control and Status Register"
|
|
bitfld.long 0x08 24.--27. " SBE_EVT_EN , Single bit error event" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
bitfld.long 0x08 16.--19. " ECCMODE , Single bit error correction" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
eventfld.long 0x08 8. " DEFLG , Double bit error flag" "No error,Error"
|
|
eventfld.long 0x08 0. " SEFLG , Single bit error flag" "No error,Error"
|
|
rgroup.long 0x30++0x03
|
|
line.long 0x00 "DCAN_ECC_SERR, ECC Single Bit Error Code Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Message_Number , Message object number where ECC single bit error has been detected"
|
|
endif
|
|
width 12.
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "ABOT,Auto Bus On Time"
|
|
rgroup.long 0x84++0x4F
|
|
line.long 0x00 "TRREQ,Transmission Request X"
|
|
bitfld.long 0x00 14.--15. " TXRQSTREG8 ,Transmission Request 8" "0,1,2,3"
|
|
bitfld.long 0x00 12.--13. " TXRQSTREG7 ,Transmission Request 7" "0,1,2,3"
|
|
bitfld.long 0x00 10.--11. " TXRQSTREG6 ,Transmission Request 6" "0,1,2,3"
|
|
bitfld.long 0x00 8.--9. " TXRQSTREG5 ,Transmission Request 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x00 6.--7. " TXRQSTREG4 ,Transmission Request 4" "0,1,2,3"
|
|
bitfld.long 0x00 4.--5. " TXRQSTREG3 ,Transmission Request 3" "0,1,2,3"
|
|
bitfld.long 0x00 2.--3. " TXRQSTREG2 ,Transmission Request 2" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " TXRQSTREG1 ,Transmission Request 1" "0,1,2,3"
|
|
line.long 0x04 "TRREQ12,Transmission Request 1-2"
|
|
bitfld.long 0x04 31. " TXRQST[32] ,Transmission Request Bits[32]" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " [31] ,Transmission Request Bits[31]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 29. " [30] ,Transmission Request Bits[30]" "Not requested,Requested"
|
|
bitfld.long 0x04 28. " [29] ,Transmission Request Bits[29]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 27. " [28] ,Transmission Request Bits[28]" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " [27] ,Transmission Request Bits[27]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 25. " [26] ,Transmission Request Bits[26]" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " [25] ,Transmission Request Bits[25]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 23. " [24] ,Transmission Request Bits[24]" "Not requested,Requested"
|
|
bitfld.long 0x04 22. " [23] ,Transmission Request Bits[23]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 21. " [22] ,Transmission Request Bits[22]" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " [21] ,Transmission Request Bits[21]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 19. " [20] ,Transmission Request Bits[20]" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " [19] ,Transmission Request Bits[19]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 17. " [18] ,Transmission Request Bits[18]" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " [17] ,Transmission Request Bits[17]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 15. " [16] ,Transmission Request Bits[16]" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " [15] ,Transmission Request Bits[15]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 13. " [14] ,Transmission Request Bits[14]" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " [13] ,Transmission Request Bits[13]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 11. " [12] ,Transmission Request Bits[12]" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " [11] ,Transmission Request Bits[11]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 9. " [10] ,Transmission Request Bits[10]" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " [9] ,Transmission Request Bits[9]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 7. " [8] ,Transmission Request Bits[8]" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " [7] ,Transmission Request Bits[7]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 5. " [6] ,Transmission Request Bits[6]" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " [5] ,Transmission Request Bits[5]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 3. " [4] ,Transmission Request Bits[4]" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " [3] ,Transmission Request Bits[3]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x04 1. " [2] ,Transmission Request Bits[2]" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " [1] ,Transmission Request Bits[1]" "Not requested,Requested"
|
|
line.long 0x08 "TRREQ34,Transmission Request 3-4"
|
|
bitfld.long 0x08 31. " TXRQST[64] ,Transmission Request Bits[64]" "Not requested,Requested"
|
|
bitfld.long 0x08 30. " [63] ,Transmission Request Bits[63]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 29. " [62] ,Transmission Request Bits[62]" "Not requested,Requested"
|
|
bitfld.long 0x08 28. " [61] ,Transmission Request Bits[61]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 27. " [60] ,Transmission Request Bits[60]" "Not requested,Requested"
|
|
bitfld.long 0x08 26. " [59] ,Transmission Request Bits[59]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 25. " [58] ,Transmission Request Bits[58]" "Not requested,Requested"
|
|
bitfld.long 0x08 24. " [57] ,Transmission Request Bits[57]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 23. " [56] ,Transmission Request Bits[56]" "Not requested,Requested"
|
|
bitfld.long 0x08 22. " [55] ,Transmission Request Bits[55]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 21. " [54] ,Transmission Request Bits[54]" "Not requested,Requested"
|
|
bitfld.long 0x08 20. " [53] ,Transmission Request Bits[53]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 19. " [52] ,Transmission Request Bits[52]" "Not requested,Requested"
|
|
bitfld.long 0x08 18. " [51] ,Transmission Request Bits[51]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 17. " [50] ,Transmission Request Bits[50]" "Not requested,Requested"
|
|
bitfld.long 0x08 16. " [49] ,Transmission Request Bits[49]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 15. " [48] ,Transmission Request Bits[48]" "Not requested,Requested"
|
|
bitfld.long 0x08 14. " [47] ,Transmission Request Bits[47]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 13. " [46] ,Transmission Request Bits[46]" "Not requested,Requested"
|
|
bitfld.long 0x08 12. " [45] ,Transmission Request Bits[45]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 11. " [44] ,Transmission Request Bits[44]" "Not requested,Requested"
|
|
bitfld.long 0x08 10. " [43] ,Transmission Request Bits[43]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 9. " [42] ,Transmission Request Bits[42]" "Not requested,Requested"
|
|
bitfld.long 0x08 8. " [41] ,Transmission Request Bits[41]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 7. " [40] ,Transmission Request Bits[40]" "Not requested,Requested"
|
|
bitfld.long 0x08 6. " [39] ,Transmission Request Bits[39]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 5. " [38] ,Transmission Request Bits[38]" "Not requested,Requested"
|
|
bitfld.long 0x08 4. " [37] ,Transmission Request Bits[37]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 3. " [36] ,Transmission Request Bits[36]" "Not requested,Requested"
|
|
bitfld.long 0x08 2. " [35] ,Transmission Request Bits[35]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x08 1. " [34] ,Transmission Request Bits[34]" "Not requested,Requested"
|
|
bitfld.long 0x08 0. " [33] ,Transmission Request Bits[33]" "Not requested,Requested"
|
|
line.long 0x0C "TRREQ56,Transmission Request 5-6"
|
|
bitfld.long 0x0C 31. " TXRQST[96] ,Transmission Request Bits[96]" "Not requested,Requested"
|
|
bitfld.long 0x0C 30. " [95] ,Transmission Request Bits[95]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 29. " [94] ,Transmission Request Bits[94]" "Not requested,Requested"
|
|
bitfld.long 0x0C 28. " [93] ,Transmission Request Bits[93]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 27. " [92] ,Transmission Request Bits[92]" "Not requested,Requested"
|
|
bitfld.long 0x0C 26. " [91] ,Transmission Request Bits[91]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 25. " [90] ,Transmission Request Bits[90]" "Not requested,Requested"
|
|
bitfld.long 0x0C 24. " [89] ,Transmission Request Bits[89]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 23. " [88] ,Transmission Request Bits[88]" "Not requested,Requested"
|
|
bitfld.long 0x0C 22. " [87] ,Transmission Request Bits[87]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 21. " [86] ,Transmission Request Bits[86]" "Not requested,Requested"
|
|
bitfld.long 0x0C 20. " [85] ,Transmission Request Bits[85]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 19. " [84] ,Transmission Request Bits[84]" "Not requested,Requested"
|
|
bitfld.long 0x0C 18. " [83] ,Transmission Request Bits[83]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 17. " [82] ,Transmission Request Bits[82]" "Not requested,Requested"
|
|
bitfld.long 0x0C 16. " [81] ,Transmission Request Bits[81]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 15. " [80] ,Transmission Request Bits[80]" "Not requested,Requested"
|
|
bitfld.long 0x0C 14. " [79] ,Transmission Request Bits[79]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 13. " [78] ,Transmission Request Bits[78]" "Not requested,Requested"
|
|
bitfld.long 0x0C 12. " [77] ,Transmission Request Bits[77]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 11. " [76] ,Transmission Request Bits[76]" "Not requested,Requested"
|
|
bitfld.long 0x0C 10. " [75] ,Transmission Request Bits[75]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 9. " [74] ,Transmission Request Bits[74]" "Not requested,Requested"
|
|
bitfld.long 0x0C 8. " [73] ,Transmission Request Bits[73]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 7. " [72] ,Transmission Request Bits[72]" "Not requested,Requested"
|
|
bitfld.long 0x0C 6. " [71] ,Transmission Request Bits[71]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 5. " [70] ,Transmission Request Bits[70]" "Not requested,Requested"
|
|
bitfld.long 0x0C 4. " [69] ,Transmission Request Bits[69]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 3. " [68] ,Transmission Request Bits[68]" "Not requested,Requested"
|
|
bitfld.long 0x0C 2. " [67] ,Transmission Request Bits[67]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x0C 1. " [66] ,Transmission Request Bits[66]" "Not requested,Requested"
|
|
bitfld.long 0x0C 0. " [65] ,Transmission Request Bits[65]" "Not requested,Requested"
|
|
line.long 0x10 "TRREQ78,Transmission Request 7-8"
|
|
bitfld.long 0x10 31. " TXRQST[128] ,Transmission Request Bits[128]" "Not requested,Requested"
|
|
bitfld.long 0x10 30. " [127] ,Transmission Request Bits[127]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 29. " [126] ,Transmission Request Bits[126]" "Not requested,Requested"
|
|
bitfld.long 0x10 28. " [125] ,Transmission Request Bits[125]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 27. " [124] ,Transmission Request Bits[124]" "Not requested,Requested"
|
|
bitfld.long 0x10 26. " [123] ,Transmission Request Bits[123]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 25. " [122] ,Transmission Request Bits[122]" "Not requested,Requested"
|
|
bitfld.long 0x10 24. " [121] ,Transmission Request Bits[121]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 23. " [120] ,Transmission Request Bits[120]" "Not requested,Requested"
|
|
bitfld.long 0x10 22. " [119] ,Transmission Request Bits[119]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 21. " [118] ,Transmission Request Bits[118]" "Not requested,Requested"
|
|
bitfld.long 0x10 20. " [117] ,Transmission Request Bits[117]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 19. " [116] ,Transmission Request Bits[116]" "Not requested,Requested"
|
|
bitfld.long 0x10 18. " [115] ,Transmission Request Bits[115]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 17. " [114] ,Transmission Request Bits[114]" "Not requested,Requested"
|
|
bitfld.long 0x10 16. " [113] ,Transmission Request Bits[113]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 15. " [112] ,Transmission Request Bits[112]" "Not requested,Requested"
|
|
bitfld.long 0x10 14. " [111] ,Transmission Request Bits[111]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 13. " [110] ,Transmission Request Bits[110]" "Not requested,Requested"
|
|
bitfld.long 0x10 12. " [109] ,Transmission Request Bits[109]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 11. " [108] ,Transmission Request Bits[108]" "Not requested,Requested"
|
|
bitfld.long 0x10 10. " [107] ,Transmission Request Bits[107]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 9. " [106] ,Transmission Request Bits[106]" "Not requested,Requested"
|
|
bitfld.long 0x10 8. " [105] ,Transmission Request Bits[105]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 7. " [104] ,Transmission Request Bits[104]" "Not requested,Requested"
|
|
bitfld.long 0x10 6. " [103] ,Transmission Request Bits[103]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 5. " [102] ,Transmission Request Bits[102]" "Not requested,Requested"
|
|
bitfld.long 0x10 4. " [101] ,Transmission Request Bits[101]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 3. " [100] ,Transmission Request Bits[100]" "Not requested,Requested"
|
|
bitfld.long 0x10 2. " [99] ,Transmission Request Bits[99]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x10 1. " [98] ,Transmission Request Bits[98]" "Not requested,Requested"
|
|
bitfld.long 0x10 0. " [97] ,Transmission Request Bits[97]" "Not requested,Requested"
|
|
line.long 0x14 "NEWDAT,New Data X"
|
|
bitfld.long 0x14 14.--15. " NEWDATREG8 ,New Data 8" "0,1,2,3"
|
|
bitfld.long 0x14 12.--13. " NEWDATREG7 ,New Data 7" "0,1,2,3"
|
|
bitfld.long 0x14 10.--11. " NEWDATREG6 ,New Data 6" "0,1,2,3"
|
|
bitfld.long 0x14 8.--9. " NEWDATREG5 ,New Data 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x14 6.--7. " NEWDATREG4 ,NEW DATA 4" "0,1,2,3"
|
|
bitfld.long 0x14 4.--5. " NEWDATREG3 ,New Data 3" "0,1,2,3"
|
|
bitfld.long 0x14 2.--3. " NEWDATREG2 ,New Data 2" "0,1,2,3"
|
|
bitfld.long 0x14 0.--1. " NEWDATREG1 ,New Data 1" "0,1,2,3"
|
|
line.long 0x18 "NEWDAT12,New Data 1-2"
|
|
bitfld.long 0x18 31. " NEWDAT[32] ,New Data Bit[32]" "Not requested,Requested"
|
|
bitfld.long 0x18 30. " [31] ,New Data Bit[31]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 29. " [30] ,New Data Bit[30]" "Not requested,Requested"
|
|
bitfld.long 0x18 28. " [29] ,New Data Bit[29]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 27. " [28] ,New Data Bit[28]" "Not requested,Requested"
|
|
bitfld.long 0x18 26. " [27] ,New Data Bit[27]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 25. " [26] ,New Data Bit[26]" "Not requested,Requested"
|
|
bitfld.long 0x18 24. " [25] ,New Data Bit[25]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 23. " [24] ,New Data Bit[24]" "Not requested,Requested"
|
|
bitfld.long 0x18 22. " [23] ,New Data Bit[23]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 21. " [22] ,New Data Bit[22]" "Not requested,Requested"
|
|
bitfld.long 0x18 20. " [21] ,New Data Bit[21]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 19. " [20] ,New Data Bit[20]" "Not requested,Requested"
|
|
bitfld.long 0x18 18. " [19] ,New Data Bit[19]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 17. " [18] ,New Data Bit[18]" "Not requested,Requested"
|
|
bitfld.long 0x18 16. " [17] ,New Data Bit[17]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 15. " [16] ,New Data Bit[16]" "Not requested,Requested"
|
|
bitfld.long 0x18 14. " [15] ,New Data Bit[15]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 13. " [14] ,New Data Bit[14]" "Not requested,Requested"
|
|
bitfld.long 0x18 12. " [13] ,New Data Bit[13]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 11. " [12] ,New Data Bit[12]" "Not requested,Requested"
|
|
bitfld.long 0x18 10. " [11] ,New Data Bit[11]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 9. " [10] ,New Data Bit[10]" "Not requested,Requested"
|
|
bitfld.long 0x18 8. " [9] ,New Data Bit[9]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 7. " [8] ,New Data Bit[8]" "Not requested,Requested"
|
|
bitfld.long 0x18 6. " [7] ,New Data Bit[7]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 5. " [6] ,New Data Bit[6]" "Not requested,Requested"
|
|
bitfld.long 0x18 4. " [5] ,New Data Bit[5]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 3. " [4] ,New Data Bit[4]" "Not requested,Requested"
|
|
bitfld.long 0x18 2. " [3] ,New Data Bit[3]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x18 1. " [2] ,New Data Bit[2]" "Not requested,Requested"
|
|
bitfld.long 0x18 0. " [1] ,New Data Bit[1]" "Not requested,Requested"
|
|
line.long 0x1C "NEWDAT34,New Data 3-4"
|
|
bitfld.long 0x1C 31. " NEWDAT[64] ,New Data Bit[64]" "Not requested,Requested"
|
|
bitfld.long 0x1C 30. " [63] ,New Data Bit[63]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 29. " [62] ,New Data Bit[62]" "Not requested,Requested"
|
|
bitfld.long 0x1C 28. " [61] ,New Data Bit[61]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 27. " [60] ,New Data Bit[60]" "Not requested,Requested"
|
|
bitfld.long 0x1C 26. " [59] ,New Data Bit[59]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 25. " [58] ,New Data Bit[58]" "Not requested,Requested"
|
|
bitfld.long 0x1C 24. " [57] ,New Data Bit[57]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 23. " [56] ,New Data Bit[56]" "Not requested,Requested"
|
|
bitfld.long 0x1C 22. " [55] ,New Data Bit[55]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 21. " [54] ,New Data Bit[54]" "Not requested,Requested"
|
|
bitfld.long 0x1C 20. " [53] ,New Data Bit[53]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 19. " [52] ,New Data Bit[52]" "Not requested,Requested"
|
|
bitfld.long 0x1C 18. " [51] ,New Data Bit[51]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 17. " [50] ,New Data Bit[50]" "Not requested,Requested"
|
|
bitfld.long 0x1C 16. " [49] ,New Data Bit[49]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 15. " [48] ,New Data Bit[48]" "Not requested,Requested"
|
|
bitfld.long 0x1C 14. " [47] ,New Data Bit[47]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 13. " [46] ,New Data Bit[46]" "Not requested,Requested"
|
|
bitfld.long 0x1C 12. " [45] ,New Data Bit[45]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 11. " [44] ,New Data Bit[44]" "Not requested,Requested"
|
|
bitfld.long 0x1C 10. " [43] ,New Data Bit[43]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 9. " [42] ,New Data Bit[42]" "Not requested,Requested"
|
|
bitfld.long 0x1C 8. " [41] ,New Data Bit[41]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 7. " [40] ,New Data Bit[40]" "Not requested,Requested"
|
|
bitfld.long 0x1C 6. " [39] ,New Data Bit[39]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 5. " [38] ,New Data Bit[38]" "Not requested,Requested"
|
|
bitfld.long 0x1C 4. " [37] ,New Data Bit[37]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 3. " [36] ,New Data Bit[36]" "Not requested,Requested"
|
|
bitfld.long 0x1C 2. " [35] ,New Data Bit[35]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x1C 1. " [34] ,New Data Bit[34]" "Not requested,Requested"
|
|
bitfld.long 0x1C 0. " [33] ,New Data Bit[33]" "Not requested,Requested"
|
|
line.long 0x20 "NEWDAT56,New Data 5-6"
|
|
bitfld.long 0x20 31. " NEWDAT[96] ,New Data Bit[96]" "Not requested,Requested"
|
|
bitfld.long 0x20 30. " [95] ,New Data Bit[95]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 29. " [94] ,New Data Bit[94]" "Not requested,Requested"
|
|
bitfld.long 0x20 28. " [93] ,New Data Bit[93]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 27. " [92] ,New Data Bit[92]" "Not requested,Requested"
|
|
bitfld.long 0x20 26. " [91] ,New Data Bit[91]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 25. " [90] ,New Data Bit[90]" "Not requested,Requested"
|
|
bitfld.long 0x20 24. " [89] ,New Data Bit[89]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 23. " [88] ,New Data Bit[88]" "Not requested,Requested"
|
|
bitfld.long 0x20 22. " [87] ,New Data Bit[87]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 21. " [86] ,New Data Bit[86]" "Not requested,Requested"
|
|
bitfld.long 0x20 20. " [85] ,New Data Bit[85]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 19. " [84] ,New Data Bit[84]" "Not requested,Requested"
|
|
bitfld.long 0x20 18. " [83] ,New Data Bit[83]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 17. " [82] ,New Data Bit[82]" "Not requested,Requested"
|
|
bitfld.long 0x20 16. " [81] ,New Data Bit[81]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 15. " [80] ,New Data Bit[80]" "Not requested,Requested"
|
|
bitfld.long 0x20 14. " [79] ,New Data Bit[79]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 13. " [78] ,New Data Bit[78]" "Not requested,Requested"
|
|
bitfld.long 0x20 12. " [77] ,New Data Bit[77]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 11. " [76] ,New Data Bit[76]" "Not requested,Requested"
|
|
bitfld.long 0x20 10. " [75] ,New Data Bit[75]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 9. " [74] ,New Data Bit[74]" "Not requested,Requested"
|
|
bitfld.long 0x20 8. " [73] ,New Data Bit[73]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 7. " [72] ,New Data Bit[72]" "Not requested,Requested"
|
|
bitfld.long 0x20 6. " [71] ,New Data Bit[71]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 5. " [70] ,New Data Bit[70]" "Not requested,Requested"
|
|
bitfld.long 0x20 4. " [69] ,New Data Bit[69]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 3. " [68] ,New Data Bit[68]" "Not requested,Requested"
|
|
bitfld.long 0x20 2. " [67] ,New Data Bit[67]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x20 1. " [66] ,New Data Bit[66]" "Not requested,Requested"
|
|
bitfld.long 0x20 0. " [65] ,New Data Bit[65]" "Not requested,Requested"
|
|
line.long 0x24 "NEWDAT78,New Data 7-8"
|
|
bitfld.long 0x24 31. " NEWDAT[128] ,New Data Bit[128]" "Not requested,Requested"
|
|
bitfld.long 0x24 30. " [127] ,New Data Bit[127]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 29. " [126] ,New Data Bit[126]" "Not requested,Requested"
|
|
bitfld.long 0x24 28. " [125] ,New Data Bit[125]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 27. " [124] ,New Data Bit[124]" "Not requested,Requested"
|
|
bitfld.long 0x24 26. " [123] ,New Data Bit[123]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 25. " [122] ,New Data Bit[122]" "Not requested,Requested"
|
|
bitfld.long 0x24 24. " [121] ,New Data Bit[121]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 23. " [120] ,New Data Bit[120]" "Not requested,Requested"
|
|
bitfld.long 0x24 22. " [119] ,New Data Bit[119]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 21. " [118] ,New Data Bit[118]" "Not requested,Requested"
|
|
bitfld.long 0x24 20. " [117] ,New Data Bit[117]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 19. " [116] ,New Data Bit[116]" "Not requested,Requested"
|
|
bitfld.long 0x24 18. " [115] ,New Data Bit[115]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 17. " [114] ,New Data Bit[114]" "Not requested,Requested"
|
|
bitfld.long 0x24 16. " [113] ,New Data Bit[113]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 15. " [112] ,New Data Bit[112]" "Not requested,Requested"
|
|
bitfld.long 0x24 14. " [111] ,New Data Bit[111]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 13. " [110] ,New Data Bit[110]" "Not requested,Requested"
|
|
bitfld.long 0x24 12. " [109] ,New Data Bit[109]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 11. " [108] ,New Data Bit[108]" "Not requested,Requested"
|
|
bitfld.long 0x24 10. " [107] ,New Data Bit[107]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 9. " [106] ,New Data Bit[106]" "Not requested,Requested"
|
|
bitfld.long 0x24 8. " [105] ,New Data Bit[105]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 7. " [104] ,New Data Bit[104]" "Not requested,Requested"
|
|
bitfld.long 0x24 6. " [103] ,New Data Bit[103]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 5. " [102] ,New Data Bit[102]" "Not requested,Requested"
|
|
bitfld.long 0x24 4. " [101] ,New Data Bit[101]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 3. " [100] ,New Data Bit[100]" "Not requested,Requested"
|
|
bitfld.long 0x24 2. " [99] ,New Data Bit[99]" "Not requested,Requested"
|
|
newline
|
|
bitfld.long 0x24 1. " [98] ,New Data Bit[98]" "Not requested,Requested"
|
|
bitfld.long 0x24 0. " [97] ,New Data Bit[97]" "Not requested,Requested"
|
|
line.long 0x28 "INTPEN,Interrupt Pending X"
|
|
bitfld.long 0x28 14.--15. " INTPENDREG[8] ,Interrupt Pending 8" "0,1,2,3"
|
|
bitfld.long 0x28 12.--13. " [7] ,Interrupt Pending 7" "0,1,2,3"
|
|
bitfld.long 0x28 10.--11. " [6] ,Interrupt Pending 6" "0,1,2,3"
|
|
bitfld.long 0x28 8.--9. " [5] ,Interrupt Pending 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x28 6.--7. " [4] ,Interrupt Pending 4" "0,1,2,3"
|
|
bitfld.long 0x28 4.--5. " [3] ,Interrupt Pending 3" "0,1,2,3"
|
|
bitfld.long 0x28 2.--3. " [2] ,Interrupt Pending 2" "0,1,2,3"
|
|
bitfld.long 0x28 0.--1. " [1] ,Interrupt Pending 1" "0,1,2,3"
|
|
line.long 0x2C "INTPEN12,Interrupt Pending 1-2"
|
|
bitfld.long 0x2C 31. " IntPnd[32] ,Interrupt Pending Bit[32]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 30. " [31] ,Interrupt Pending Bit[31]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 29. " [30] ,Interrupt Pending Bit[30]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 28. " [29] ,Interrupt Pending Bit[29]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 27. " [28] ,Interrupt Pending Bit[28]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 26. " [27] ,Interrupt Pending Bit[27]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 25. " [26] ,Interrupt Pending Bit[26]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 24. " [25] ,Interrupt Pending Bit[25]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 23. " [24] ,Interrupt Pending Bit[24]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 22. " [23] ,Interrupt Pending Bit[23]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 21. " [22] ,Interrupt Pending Bit[22]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 20. " [21] ,Interrupt Pending Bit[21]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 19. " [20] ,Interrupt Pending Bit[20]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 18. " [19] ,Interrupt Pending Bit[19]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 17. " [18] ,Interrupt Pending Bit[18]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 16. " [17] ,Interrupt Pending Bit[17]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 15. " [16] ,Interrupt Pending Bit[16]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 14. " [15] ,Interrupt Pending Bit[15]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 13. " [14] ,Interrupt Pending Bit[14]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 12. " [13] ,Interrupt Pending Bit[13]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 11. " [12] ,Interrupt Pending Bit[12]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 10. " [11] ,Interrupt Pending Bit[11]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 9. " [10] ,Interrupt Pending Bit[10]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 8. " [9] ,Interrupt Pending Bit[9]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 7. " [8] ,Interrupt Pending Bit[8]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 6. " [7] ,Interrupt Pending Bit[7]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 5. " [6] ,Interrupt Pending Bit[6]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 4. " [5] ,Interrupt Pending Bit[5]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 3. " [4] ,Interrupt Pending Bit[4]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 2. " [3] ,Interrupt Pending Bit[3]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x2C 1. " [2] ,Interrupt Pending Bit[2]" "No interrupt,Interrupt"
|
|
bitfld.long 0x2C 0. " [1] ,Interrupt Pending Bit[1]" "No interrupt,Interrupt"
|
|
line.long 0x30 "INTPEN34,Interrupt Pending 3-4"
|
|
bitfld.long 0x30 31. " INTPND[64] ,Interrupt Pending Bit[64]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 30. " [63] ,Interrupt Pending Bit[63]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 29. " [62] ,Interrupt Pending Bit[62]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 28. " [61] ,Interrupt Pending Bit[61]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 27. " [60] ,Interrupt Pending Bit[60]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 26. " [59] ,Interrupt Pending Bit[59]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 25. " [58] ,Interrupt Pending Bit[58]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 24. " [57] ,Interrupt Pending Bit[57]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 23. " [56] ,Interrupt Pending Bit[56]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 22. " [55] ,Interrupt Pending Bit[55]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 21. " [54] ,Interrupt Pending Bit[54]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 20. " [53] ,Interrupt Pending Bit[53]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 19. " [52] ,Interrupt Pending Bit[52]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 18. " [51] ,Interrupt Pending Bit[51]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 17. " [50] ,Interrupt Pending Bit[50]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 16. " [49] ,Interrupt Pending Bit[49]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 15. " [48] ,Interrupt Pending Bit[48]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 14. " [47] ,Interrupt Pending Bit[47]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 13. " [46] ,Interrupt Pending Bit[46]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 12. " [45] ,Interrupt Pending Bit[45]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 11. " [44] ,Interrupt Pending Bit[44]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 10. " [43] ,Interrupt Pending Bit[43]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 9. " [42] ,Interrupt Pending Bit[42]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 8. " [41] ,Interrupt Pending Bit[41]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 7. " [40] ,Interrupt Pending Bit[40]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 6. " [39] ,Interrupt Pending Bit[39]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 5. " [38] ,Interrupt Pending Bit[38]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 4. " [37] ,Interrupt Pending Bit[37]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 3. " [36] ,Interrupt Pending Bit[36]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 2. " [35] ,Interrupt Pending Bit[35]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x30 1. " [34] ,Interrupt Pending Bit[34]" "No interrupt,Interrupt"
|
|
bitfld.long 0x30 0. " [33] ,Interrupt Pending Bit[33]" "No interrupt,Interrupt"
|
|
line.long 0x34 "INTPEN56,Interrupt Pending 5-6"
|
|
bitfld.long 0x34 31. " INTPND[96] ,Interrupt Pending Bit[96]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 30. " [95] ,Interrupt Pending Bit[95]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 29. " [94] ,Interrupt Pending Bit[94]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 28. " [93] ,Interrupt Pending Bit[93]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 27. " [92] ,Interrupt Pending Bit[92]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 26. " [91] ,Interrupt Pending Bit[91]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 25. " [90] ,Interrupt Pending Bit[90]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 24. " [89] ,Interrupt Pending Bit[89]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 23. " [88] ,Interrupt Pending Bit[88]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 22. " [87] ,Interrupt Pending Bit[87]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 21. " [86] ,Interrupt Pending Bit[86]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 20. " [85] ,Interrupt Pending Bit[85]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 19. " [84] ,Interrupt Pending Bit[84]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 18. " [83] ,Interrupt Pending Bit[83]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 17. " [82] ,Interrupt Pending Bit[82]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 16. " [81] ,Interrupt Pending Bit[81]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 15. " [80] ,Interrupt Pending Bit[80]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 14. " [79] ,Interrupt Pending Bit[79]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 13. " [78] ,Interrupt Pending Bit[78]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 12. " [77] ,Interrupt Pending Bit[77]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 11. " [76] ,Interrupt Pending Bit[76]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 10. " [75] ,Interrupt Pending Bit[75]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 9. " [74] ,Interrupt Pending Bit[74]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 8. " [73] ,Interrupt Pending Bit[73]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 7. " [72] ,Interrupt Pending Bit[72]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 6. " [71] ,Interrupt Pending Bit[71]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 5. " [70] ,Interrupt Pending Bit[70]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 4. " [69] ,Interrupt Pending Bit[69]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 3. " [68] ,Interrupt Pending Bit[68]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 2. " [67] ,Interrupt Pending Bit[67]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x34 1. " [66] ,Interrupt Pending Bit[66]" "No interrupt,Interrupt"
|
|
bitfld.long 0x34 0. " [65] ,Interrupt Pending Bit[65]" "No interrupt,Interrupt"
|
|
line.long 0x38 "INTPEN78,Interrupt Pending 7-8"
|
|
bitfld.long 0x38 31. " INTPND[128] ,Interrupt Pending Bit[128]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 30. " [127] ,Interrupt Pending Bit[127]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 29. " [126] ,Interrupt Pending Bit[126]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 28. " [125] ,Interrupt Pending Bit[125]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 27. " [124] ,Interrupt Pending Bit[124]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 26. " [123] ,Interrupt Pending Bit[123]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 25. " [122] ,Interrupt Pending Bit[122]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 24. " [121] ,Interrupt Pending Bit[121]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 23. " [120] ,Interrupt Pending Bit[120]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 22. " [119] ,Interrupt Pending Bit[119]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 21. " [118] ,Interrupt Pending Bit[118]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 20. " [117] ,Interrupt Pending Bit[117]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 19. " [116] ,Interrupt Pending Bit[116]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 18. " [115] ,Interrupt Pending Bit[115]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 17. " [114] ,Interrupt Pending Bit[114]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 16. " [113] ,Interrupt Pending Bit[113]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 15. " [112] ,Interrupt Pending Bit[112]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 14. " [111] ,Interrupt Pending Bit[111]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 13. " [110] ,Interrupt Pending Bit[110]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 12. " [109] ,Interrupt Pending Bit[109]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 11. " [108] ,Interrupt Pending Bit[108]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 10. " [107] ,Interrupt Pending Bit[107]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 9. " [106] ,Interrupt Pending Bit[106]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 8. " [105] ,Interrupt Pending Bit[105]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 7. " [104] ,Interrupt Pending Bit[104]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 6. " [103] ,Interrupt Pending Bit[103]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 5. " [102] ,Interrupt Pending Bit[102]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 4. " [101] ,Interrupt Pending Bit[101]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 3. " [100] ,Interrupt Pending Bit[100]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 2. " [99] ,Interrupt Pending Bit[99]" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x38 1. " [98] ,Interrupt Pending Bit[98]" "No interrupt,Interrupt"
|
|
bitfld.long 0x38 0. " [97] ,Interrupt Pending Bit[97]" "No interrupt,Interrupt"
|
|
line.long 0x3C "MVAL,Message Valid X"
|
|
bitfld.long 0x3C 14.--15. " MSGVALREG8 ,Message Valid Register 8" "0,1,2,3"
|
|
bitfld.long 0x3C 12.--13. " [7] ,Message Valid Register 7" "0,1,2,3"
|
|
bitfld.long 0x3C 10.--11. " [6] ,Message Valid Register 6" "0,1,2,3"
|
|
bitfld.long 0x3C 8.--9. " [5] ,Message Valid Register 5" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x3C 6.--7. " [4] ,Message Valid Register 4" "0,1,2,3"
|
|
bitfld.long 0x3C 4.--5. " [3] ,Message Valid Register 3" "0,1,2,3"
|
|
bitfld.long 0x3C 2.--3. " [2] ,Message Valid Register 2" "0,1,2,3"
|
|
bitfld.long 0x3C 0.--1. " [1] ,Message Valid Register 1" "0,1,2,3"
|
|
line.long 0x40 "MVAL12,Message Valid 1-2"
|
|
bitfld.long 0x40 31. " MSGVAL[32] ,Message Valid Bit[32]" "Ignored,Configured"
|
|
bitfld.long 0x40 30. " [31] ,Message Valid Bit[31]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 29. " [30] ,Message Valid Bit[30]" "Ignored,Configured"
|
|
bitfld.long 0x40 28. " [29] ,Message Valid Bit[29]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 27. " [28] ,Message Valid Bit[28]" "Ignored,Configured"
|
|
bitfld.long 0x40 26. " [27] ,Message Valid Bit[27]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 25. " [26] ,Message Valid Bit[26]" "Ignored,Configured"
|
|
bitfld.long 0x40 24. " [25] ,Message Valid Bit[25]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 23. " [24] ,Message Valid Bit[24]" "Ignored,Configured"
|
|
bitfld.long 0x40 22. " [23] ,Message Valid Bit[23]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 21. " [22] ,Message Valid Bit[22]" "Ignored,Configured"
|
|
bitfld.long 0x40 20. " [21] ,Message Valid Bit[21]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 19. " [20] ,Message Valid Bit[20]" "Ignored,Configured"
|
|
bitfld.long 0x40 18. " [19] ,Message Valid Bit[19]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 17. " [18] ,Message Valid Bit[18]" "Ignored,Configured"
|
|
bitfld.long 0x40 16. " [17] ,Message Valid Bit[17]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 15. " [16] ,Message Valid Bit[16]" "Ignored,Configured"
|
|
bitfld.long 0x40 14. " [15] ,Message Valid Bit[15]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 13. " [14] ,Message Valid Bit[14]" "Ignored,Configured"
|
|
bitfld.long 0x40 12. " [13] ,Message Valid Bit[13]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 11. " [12] ,Message Valid Bit[12]" "Ignored,Configured"
|
|
bitfld.long 0x40 10. " [11] ,Message Valid Bit[11]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 9. " [10] ,Message Valid Bit[10]" "Ignored,Configured"
|
|
bitfld.long 0x40 8. " [9] ,Message Valid Bit[9]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 7. " [8] ,Message Valid Bit[8]" "Ignored,Configured"
|
|
bitfld.long 0x40 6. " [7] ,Message Valid Bit[7]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 5. " [6] ,Message Valid Bit[6]" "Ignored,Configured"
|
|
bitfld.long 0x40 4. " [5] ,Message Valid Bit[5]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 3. " [4] ,Message Valid Bit[4]" "Ignored,Configured"
|
|
bitfld.long 0x40 2. " [3] ,Message Valid Bit[3]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x40 1. " [2] ,Message Valid Bit[2]" "Ignored,Configured"
|
|
bitfld.long 0x40 0. " [1] ,Message Valid Bit[1]" "Ignored,Configured"
|
|
line.long 0x44 "MVAL34,Message Valid 3-4"
|
|
bitfld.long 0x44 31. " MSGVAl[64] ,Message Valid Bit[64]" "Ignored,Configured"
|
|
bitfld.long 0x44 30. " [63] ,Message Valid Bit[63]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 29. " [62] ,Message Valid Bit[62]" "Ignored,Configured"
|
|
bitfld.long 0x44 28. " [61] ,Message Valid Bit[61]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 27. " [60] ,Message Valid Bit[60]" "Ignored,Configured"
|
|
bitfld.long 0x44 26. " [59] ,Message Valid Bit[59]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 25. " [58] ,Message Valid Bit[58]" "Ignored,Configured"
|
|
bitfld.long 0x44 24. " [57] ,Message Valid Bit[57]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 23. " [56] ,Message Valid Bit[56]" "Ignored,Configured"
|
|
bitfld.long 0x44 22. " [55] ,Message Valid Bit[55]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 21. " [54] ,Message Valid Bit[54]" "Ignored,Configured"
|
|
bitfld.long 0x44 20. " [53] ,Message Valid Bit[53]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 19. " [52] ,Message Valid Bit[52]" "Ignored,Configured"
|
|
bitfld.long 0x44 18. " [51] ,Message Valid Bit[51]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 17. " [50] ,Message Valid Bit[50]" "Ignored,Configured"
|
|
bitfld.long 0x44 16. " [49] ,Message Valid Bit[49]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 15. " [48] ,Message Valid Bit[48]" "Ignored,Configured"
|
|
bitfld.long 0x44 14. " [47] ,Message Valid Bit[47]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 13. " [46] ,Message Valid Bit[46]" "Ignored,Configured"
|
|
bitfld.long 0x44 12. " [45] ,Message Valid Bit[45]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 11. " [44] ,Message Valid Bit[44]" "Ignored,Configured"
|
|
bitfld.long 0x44 10. " [43] ,Message Valid Bit[43]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 9. " [42] ,Message Valid Bit[42]" "Ignored,Configured"
|
|
bitfld.long 0x44 8. " [41] ,Message Valid Bit[41]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 7. " [40] ,Message Valid Bit[40]" "Ignored,Configured"
|
|
bitfld.long 0x44 6. " [39] ,Message Valid Bit[39]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 5. " [38] ,Message Valid Bit[38]" "Ignored,Configured"
|
|
bitfld.long 0x44 4. " [37] ,Message Valid Bit[37]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 3. " [36] ,Message Valid Bit[36]" "Ignored,Configured"
|
|
bitfld.long 0x44 2. " [35] ,Message Valid Bit[35]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x44 1. " [34] ,Message Valid Bit[34]" "Ignored,Configured"
|
|
bitfld.long 0x44 0. " [33] ,Message Valid Bit[33]" "Ignored,Configured"
|
|
line.long 0x48 "MVAL56,Message Valid 5-6"
|
|
bitfld.long 0x48 31. " MSGVAl[96] ,Message Valid Bit[96]" "Ignored,Configured"
|
|
bitfld.long 0x48 30. " [95] ,Message Valid Bit[95]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 29. " [94] ,Message Valid Bit[94]" "Ignored,Configured"
|
|
bitfld.long 0x48 28. " [93] ,Message Valid Bit[93]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 27. " [92] ,Message Valid Bit[92]" "Ignored,Configured"
|
|
bitfld.long 0x48 26. " [91] ,Message Valid Bit[91]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 25. " [90] ,Message Valid Bit[90]" "Ignored,Configured"
|
|
bitfld.long 0x48 24. " [89] ,Message Valid Bit[89]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 23. " [88] ,Message Valid Bit[88]" "Ignored,Configured"
|
|
bitfld.long 0x48 22. " [87] ,Message Valid Bit[87]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 21. " [86] ,Message Valid Bit[86]" "Ignored,Configured"
|
|
bitfld.long 0x48 20. " [85] ,Message Valid Bit[85]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 19. " [84] ,Message Valid Bit[84]" "Ignored,Configured"
|
|
bitfld.long 0x48 18. " [83] ,Message Valid Bit[83]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 17. " [82] ,Message Valid Bit[82]" "Ignored,Configured"
|
|
bitfld.long 0x48 16. " [81] ,Message Valid Bit[81]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 15. " [80] ,Message Valid Bit[80]" "Ignored,Configured"
|
|
bitfld.long 0x48 14. " [79] ,Message Valid Bit[79]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 13. " [78] ,Message Valid Bit[78]" "Ignored,Configured"
|
|
bitfld.long 0x48 12. " [77] ,Message Valid Bit[77]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 11. " [76] ,Message Valid Bit[76]" "Ignored,Configured"
|
|
bitfld.long 0x48 10. " [75] ,Message Valid Bit[75]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 9. " [74] ,Message Valid Bit[74]" "Ignored,Configured"
|
|
bitfld.long 0x48 8. " [73] ,Message Valid Bit[73]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 7. " [72] ,Message Valid Bit[72]" "Ignored,Configured"
|
|
bitfld.long 0x48 6. " [71] ,Message Valid Bit[71]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 5. " [70] ,Message Valid Bit[70]" "Ignored,Configured"
|
|
bitfld.long 0x48 4. " [69] ,Message Valid Bit[69]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 3. " [68] ,Message Valid Bit[68]" "Ignored,Configured"
|
|
bitfld.long 0x48 2. " [67] ,Message Valid Bit[67]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x48 1. " [66] ,Message Valid Bit[66]" "Ignored,Configured"
|
|
bitfld.long 0x48 0. " [65] ,Message Valid Bit[65]" "Ignored,Configured"
|
|
line.long 0x4C "MVAL78,Message Valid 7-8"
|
|
bitfld.long 0x4C 31. " MSGVAl[128] ,Message Valid Bit[128]" "Ignored,Configured"
|
|
bitfld.long 0x4C 30. " [127] ,Message Valid Bit[127]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 29. " [126] ,Message Valid Bit[126]" "Ignored,Configured"
|
|
bitfld.long 0x4C 28. " [125] ,Message Valid Bit[125]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 27. " [124] ,Message Valid Bit[124]" "Ignored,Configured"
|
|
bitfld.long 0x4C 26. " [123] ,Message Valid Bit[123]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 25. " [122] ,Message Valid Bit[122]" "Ignored,Configured"
|
|
bitfld.long 0x4C 24. " [121] ,Message Valid Bit[121]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 23. " [120] ,Message Valid Bit[120]" "Ignored,Configured"
|
|
bitfld.long 0x4C 22. " [119] ,Message Valid Bit[119]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 21. " [118] ,Message Valid Bit[118]" "Ignored,Configured"
|
|
bitfld.long 0x4C 20. " [117] ,Message Valid Bit[117]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 19. " [116] ,Message Valid Bit[116]" "Ignored,Configured"
|
|
bitfld.long 0x4C 18. " [115] ,Message Valid Bit[115]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 17. " [114] ,Message Valid Bit[114]" "Ignored,Configured"
|
|
bitfld.long 0x4C 16. " [113] ,Message Valid Bit[113]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 15. " [112] ,Message Valid Bit[112]" "Ignored,Configured"
|
|
bitfld.long 0x4C 14. " [111] ,Message Valid Bit[111]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 13. " [110] ,Message Valid Bit[110]" "Ignored,Configured"
|
|
bitfld.long 0x4C 12. " [109] ,Message Valid Bit[109]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 11. " [108] ,Message Valid Bit[108]" "Ignored,Configured"
|
|
bitfld.long 0x4C 10. " [107] ,Message Valid Bit[107]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 9. " [106] ,Message Valid Bit[106]" "Ignored,Configured"
|
|
bitfld.long 0x4C 8. " [105] ,Message Valid Bit[105]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 7. " [104] ,Message Valid Bit[104]" "Ignored,Configured"
|
|
bitfld.long 0x4C 6. " [103] ,Message Valid Bit[103]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 5. " [102] ,Message Valid Bit[102]" "Ignored,Configured"
|
|
bitfld.long 0x4C 4. " [101] ,Message Valid Bit[101]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 3. " [100] ,Message Valid Bit[100]" "Ignored,Configured"
|
|
bitfld.long 0x4C 2. " [99] ,Message Valid Bit[99]" "Ignored,Configured"
|
|
newline
|
|
bitfld.long 0x4C 1. " [98] ,Message Valid Bit[98]" "Ignored,Configured"
|
|
bitfld.long 0x4C 0. " [97] ,Message Valid Bit[97]" "Ignored,Configured"
|
|
group.long 0xD8++0x0F
|
|
line.long 0x00 "INTPMX12,Interrupt Multiplexer 1-2"
|
|
bitfld.long 0x00 31. " INTPNDMUX[32] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[32]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 30. " [31] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[31]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 29. " [30] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[30]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 28. " [29] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[29]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 27. " [28] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[28]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 26. " [27] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[27]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 25. " [26] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[26]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 24. " [25] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[25]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 23. " [24] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[24]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 22. " [23] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[23]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 21. " [22] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[22]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 20. " [21] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[21]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 19. " [20] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[20]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 18. " [19] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[19]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 17. " [18] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[18]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 16. " [17] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[17]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 15. " [16] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[16]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 14. " [15] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[15]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 13. " [14] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[14]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 12. " [13] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[13]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 11. " [12] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[12]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 10. " [11] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[11]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 9. " [10] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[10]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 8. " [9] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[9]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 7. " [8] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[8]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 6. " [7] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[7]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 5. " [6] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[6]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 4. " [5] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[5]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 3. " [4] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[4]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 2. " [3] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[3]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x00 1. " [2] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[2]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x00 0. " [1] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[1]" "DCAN0INT,DCAN1INT"
|
|
line.long 0x04 "INTPMX34,Interrupt Multiplexer 3-4"
|
|
bitfld.long 0x04 31. " INTPNDMUX[64] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[64]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 30. " [63] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[63]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 29. " [62] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[62]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 28. " [61] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[61]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 27. " [60] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[60]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 26. " [59] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[59]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 25. " [58] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[58]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 24. " [57] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[57]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 23. " [56] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[56]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 22. " [55] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[55]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 21. " [54] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[54]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 20. " [53] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[53]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 19. " [52] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[52]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 18. " [51] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[51]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 17. " [50] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[50]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 16. " [49] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[49]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 15. " [48] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[48]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 14. " [47] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[47]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 13. " [46] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[46]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 12. " [45] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[45]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 11. " [44] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[44]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 10. " [43] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[43]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 9. " [42] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[42]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 8. " [41] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[41]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 7. " [40] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[40]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 6. " [39] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[39]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 5. " [38] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[38]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 4. " [37] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[37]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 3. " [36] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[36]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 2. " [35] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[35]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x04 1. " [34] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[34]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x04 0. " [33] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[33]" "DCAN0INT,DCAN1INT"
|
|
line.long 0x08 "INTPMX56,Interrupt Multiplexer 5-6"
|
|
bitfld.long 0x08 31. " INTPNDMUX[96] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[96]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 30. " [95] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[95]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 29. " [94] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[94]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 28. " [93] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[93]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 27. " [92] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[92]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 26. " [91] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[91]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 25. " [90] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[90]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 24. " [89] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[89]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 23. " [88] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[88]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 22. " [87] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[87]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 21. " [86] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[86]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 20. " [85] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[85]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 19. " [84] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[84]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 18. " [83] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[83]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 17. " [82] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[82]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 16. " [81] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[81]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 15. " [80] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[80]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 14. " [79] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[79]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 13. " [78] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[78]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 12. " [77] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[77]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 11. " [76] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[76]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 10. " [75] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[75]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 9. " [74] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[74]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 8. " [73] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[73]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 7. " [72] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[72]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 6. " [71] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[71]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 5. " [70] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[70]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 4. " [69] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[69]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 3. " [68] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[68]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 2. " [67] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[67]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x08 1. " [66] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[66]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x08 0. " [65] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[65]" "DCAN0INT,DCAN1INT"
|
|
line.long 0x0C "INTPMX78,Interrupt Multiplexer 7-8"
|
|
bitfld.long 0x0C 31. " INTPNDMUX[128] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[128]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 30. " [127] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[127]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 29. " [126] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[126]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 28. " [125] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[125]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 27. " [124] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[124]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 26. " [123] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[123]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 25. " [122] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[122]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 24. " [121] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[121]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 23. " [120] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[120]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 22. " [119] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[119]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 21. " [118] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[118]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 20. " [117] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[117]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 19. " [116] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[116]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 18. " [115] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[115]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 17. " [114] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[114]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 16. " [113] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[113]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 15. " [112] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[112]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 14. " [111] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[111]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 13. " [110] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[110]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 12. " [109] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[109]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 11. " [108] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[108]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 10. " [107] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[107]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 9. " [106] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[106]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 8. " [105] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[105]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 7. " [104] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[104]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 6. " [103] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[103]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 5. " [102] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[102]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 4. " [101] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[101]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 3. " [100] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[100]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 2. " [99] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[99]" "DCAN0INT,DCAN1INT"
|
|
newline
|
|
bitfld.long 0x0C 1. " [98] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[98]" "DCAN0INT,DCAN1INT"
|
|
bitfld.long 0x0C 0. " [97] ,Multiplexes IntPnd Value to One of Two Interrupt Lines Bit[97]" "DCAN0INT,DCAN1INT"
|
|
group.long 0x100++0x3 "IF1"
|
|
line.long 0x00 "IF1COM,IF1 Command Mask / Command Request Register"
|
|
bitfld.long 0x00 23. " WR/RD ,Write / Read direction" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 22. " MASK ,Access Mask Bits" "Unchanged,Identifier Mask+MDir+MXtd"
|
|
newline
|
|
bitfld.long 0x00 21. " ARB ,Access Arbitration Bits" "Unchanged,Identifier+Dir+Xtd+MSGVAl"
|
|
newline
|
|
bitfld.long 0x00 20. " CONTROL ,Access Control Bits" "Unchanged,Control bits"
|
|
bitfld.long 0x00 19. " CLRINTPND ,Clear Interrupt Pending Bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " TXRQST/NEWDAT ,Access Transmission Request Bit" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " DATA_A ,Access Data Bytes 0-3" "Unchanged,Data bytes 0-3"
|
|
newline
|
|
bitfld.long 0x00 16. " DATA_B ,Access Data Bytes 4-7" "Unchanged,Data bytes 4-7"
|
|
bitfld.long 0x00 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
newline
|
|
sif (!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432"))
|
|
bitfld.long 0x00 14. " DMAACTIVE ,Activation of DMA Feature for Subsequent Internal IF1 Update" "No active,Active"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS3137-EP")
|
|
if (((per.l.be(((ad:0xFFF7DE00+0x100+0x08))))&0x40000000)==0x0)
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitration Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x00 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l(((ad:0xFFF7DE00+0x100+0x08))))&0x40000000)==0x0)
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x100+0x04)++0x07
|
|
line.long 0x0 "IF1MASK,IF1 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF1ARB,IF1 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long (0x100+0x0C)++0x0B
|
|
line.long 0x00 "IF1MCTRL,IF1 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Set"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Single/Last,Not last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF1DATA,IF1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF1DATB,IF1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x120++0x3 "IF2"
|
|
line.long 0x00 "IF2COM,IF2 Command Mask / Command Request Register"
|
|
bitfld.long 0x00 23. " WR/RD ,Write / Read direction" "Read,Write"
|
|
newline
|
|
bitfld.long 0x00 22. " MASK ,Access Mask Bits" "Unchanged,Identifier Mask+MDir+MXtd"
|
|
newline
|
|
bitfld.long 0x00 21. " ARB ,Access Arbitration Bits" "Unchanged,Identifier+Dir+Xtd+MSGVAl"
|
|
newline
|
|
bitfld.long 0x00 20. " CONTROL ,Access Control Bits" "Unchanged,Control bits"
|
|
bitfld.long 0x00 19. " CLRINTPND ,Clear Interrupt Pending Bit" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 18. " TXRQST/NEWDAT ,Access Transmission Request Bit" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " DATA_A ,Access Data Bytes 0-3" "Unchanged,Data bytes 0-3"
|
|
newline
|
|
bitfld.long 0x00 16. " DATA_B ,Access Data Bytes 4-7" "Unchanged,Data bytes 4-7"
|
|
bitfld.long 0x00 15. " BUSY ,Busy Flag" "Not busy,Busy"
|
|
newline
|
|
sif (!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432"))
|
|
bitfld.long 0x00 14. " DMAACTIVE ,Activation of DMA Feature for Subsequent Internal IF1 Update" "No active,Active"
|
|
newline
|
|
endif
|
|
hexmask.long.byte 0x00 0.--7. 1. " MESSAGE_NUMBER ,Message Number"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS3137-EP")
|
|
if (((per.l.be(((ad:0xFFF7DE00+0x120+0x08))))&0x40000000)==0x0)
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitration Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x00 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l(((ad:0xFFF7DE00+0x120+0x08))))&0x40000000)==0x0)
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
group.long (0x120+0x04)++0x07
|
|
line.long 0x0 "IF2MASK,IF2 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF2ARB,IF2 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAL ,Message Valid" "Ignore,Configure"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long (0x120+0x0C)++0x0B
|
|
line.long 0x00 "IF2MCTRL,IF2 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Set"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Set"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Single/Last,Not last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 bytes,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF2DATA,IF2 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF2DATB,IF2 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x140++0x3 "IF3"
|
|
line.long 0x00 "IF3OB,IF3 Observation Register"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS21*")||cpuis("TMS570LS31*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
rbitfld.long 0x00 15. " IF3UPD ,IF3 Updata Data" "Not loaded,Loaded"
|
|
rbitfld.long 0x00 12. " IF3SDB ,IF3 Status of Data B Read Access" "Low,High"
|
|
rbitfld.long 0x00 11. " IF3SDA ,IF3 Status of Data A Read Access" "Low,High"
|
|
newline
|
|
rbitfld.long 0x00 10. " IF3SC ,IF3 Status of Control Bits Read Access" "Low,High"
|
|
rbitfld.long 0x00 9. " IF3SA ,IF3 Status of Arbitration Data Read Access" "Low,High"
|
|
rbitfld.long 0x00 8. " IF3SM ,IF3 Status of Mask Data Read Access" "Low,High"
|
|
else
|
|
bitfld.long 0x00 15. " IF3UPD ,IF3 Updata Data" "Not loaded,Loaded"
|
|
bitfld.long 0x00 12. " IF3SDB ,IF3 Status of Data B Read Access" "Low,High"
|
|
bitfld.long 0x00 11. " IF3SDA ,IF3 Status of Data A Read Access" "Low,High"
|
|
newline
|
|
bitfld.long 0x00 10. " IF3SC ,IF3 Status of Control Bits Read Access" "Low,High"
|
|
bitfld.long 0x00 9. " IF3SA ,IF3 Status of Arbitration Data Read Access" "Low,High"
|
|
bitfld.long 0x00 8. " IF3SM ,IF3 Status of Mask Data Read Access" "Low,High"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 4. " DATA_B ,Data B Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 3. " DATA_A ,Data A Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 2. " CTRL ,Ctrl Read Observation" "Not read,Read"
|
|
newline
|
|
bitfld.long 0x00 1. " ARB ,Arbitration Data Read Observation" "Not read,Read"
|
|
bitfld.long 0x00 0. " MASK ,Mask Data Read Observation" "Not read,Read"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
if (((per.l.be((ad:0xFFF7DE00+0x148)))&0x40000000)==0x0)
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x00 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXtd ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDir ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
else
|
|
if (((per.l((ad:0xFFF7DE00+0x148)))&0x40000000)==0x0)
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXtd ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDir ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long.word 0x04 18.--28. 1. " ID ,Message Identifier"
|
|
else
|
|
rgroup.long 0x144++0x07
|
|
line.long 0x0 "IF3MASK,IF3 Mask Register"
|
|
bitfld.long 0x00 31. " MXTD ,Mask Extended Identifier" "No effect,Filtering"
|
|
bitfld.long 0x00 30. " MDIR ,Mask Message Direction" "No effect,Filtering"
|
|
newline
|
|
bitfld.long 0x00 28. " ID ,Message Identifier bit[28]" "0,1"
|
|
bitfld.long 0x00 27. ",Message Identifier bit[27]" "0,1"
|
|
bitfld.long 0x00 26. ",Message Identifier bit[26]" "0,1"
|
|
bitfld.long 0x00 25. ",Message Identifier bit[25]" "0,1"
|
|
bitfld.long 0x00 24. ",Message Identifier bit[24]" "0,1"
|
|
bitfld.long 0x00 23. ",Message Identifier bit[23]" "0,1"
|
|
bitfld.long 0x00 22. ",Message Identifier bit[22]" "0,1"
|
|
bitfld.long 0x00 21. ",Message Identifier bit[21]" "0,1"
|
|
bitfld.long 0x00 20. ",Message Identifier bit[20]" "0,1"
|
|
bitfld.long 0x00 19. ",Message Identifier bit[19]" "0,1"
|
|
bitfld.long 0x00 18. ",Message Identifier bit[18]" "0,1"
|
|
bitfld.long 0x00 17. ",Message Identifier bit[17]" "0,1"
|
|
bitfld.long 0x00 16. ",Message Identifier bit[16]" "0,1"
|
|
bitfld.long 0x00 15. ",Message Identifier bit[15]" "0,1"
|
|
bitfld.long 0x00 14. ",Message Identifier bit[14]" "0,1"
|
|
bitfld.long 0x00 13. ",Message Identifier bit[13]" "0,1"
|
|
bitfld.long 0x00 12. ",Message Identifier bit[12]" "0,1"
|
|
bitfld.long 0x00 11. ",Message Identifier bit[11]" "0,1"
|
|
bitfld.long 0x00 10. ",Message Identifier bit[10]" "0,1"
|
|
bitfld.long 0x00 9. ",Message Identifier bit[9]" "0,1"
|
|
bitfld.long 0x00 8. ",Message Identifier bit[8]" "0,1"
|
|
bitfld.long 0x00 7. ",Message Identifier bit[7]" "0,1"
|
|
bitfld.long 0x00 6. ",Message Identifier bit[6]" "0,1"
|
|
bitfld.long 0x00 5. ",Message Identifier bit[5]" "0,1"
|
|
bitfld.long 0x00 4. ",Message Identifier bit[4]" "0,1"
|
|
bitfld.long 0x00 3. ",Message Identifier bit[3]" "0,1"
|
|
bitfld.long 0x00 2. ",Message Identifier bit[2]" "0,1"
|
|
bitfld.long 0x00 1. ",Message Identifier bit[1]" "0,1"
|
|
bitfld.long 0x00 0. ",Message Identifier bit[0]" "0,1"
|
|
line.long 0x04 "IF3ARB,IF3 Arbitation Register"
|
|
bitfld.long 0x04 31. " MSGVAl ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x04 30. " XTD ,Extended Identifier" "11-bit,29-bit"
|
|
bitfld.long 0x04 29. " DIR ,Message Direction" "Receive,Transmit"
|
|
newline
|
|
hexmask.long 0x04 0.--28. 1. " ID ,Message Identifier"
|
|
endif
|
|
endif
|
|
group.long 0x14C++0x0B
|
|
line.long 0x00 "IF3MCTRL,IF3 Message Control Register"
|
|
bitfld.long 0x00 15. " NEWDAT ,New Data" "No new data,New data"
|
|
bitfld.long 0x00 14. " MSGLST ,Message Lost" "Not lost,Lost"
|
|
bitfld.long 0x00 13. " INTPND ,Interrupt Pending" "No interrupt,Interrupt"
|
|
newline
|
|
bitfld.long 0x00 12. " UMASK ,Use Acceptance Mask" "Ignored,Masked"
|
|
bitfld.long 0x00 11. " TXIE ,Transmit Interrupt Enable" "Unchanged,Enabled"
|
|
bitfld.long 0x00 10. " RXIE ,Receive Interrupt Enable" "Unchanged,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " RMTEN ,Remote Enable" "Unchanged,Enabled"
|
|
bitfld.long 0x00 8. " TXRQST ,Transmit Request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EOB ,End of Block" "Not last,Single/Last"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " DLC[3-0] ,Data Length Code" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes"
|
|
line.long 0x04 "IF3DATA,IF3 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA[3] ,4th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 16.--23. 1. " [2] ,3rd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 8.--15. 1. " [1] ,2nd data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x04 0.--7. 1. " [0] ,1st data byte of a CAN Data Frame"
|
|
line.long 0x08 "IF3DATB,IF3 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA[7] ,8th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 16.--23. 1. " [6] ,7th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 8.--15. 1. " [5] ,6th data byte of a CAN Data Frame"
|
|
hexmask.long.byte 0x08 0.--7. 1. " [4] ,5th data byte of a CAN Data Frame"
|
|
group.long 0x160++0x0F
|
|
line.long 0x0 "IF3UENA2_1,Update Enable 2_1 Register"
|
|
bitfld.long 0x00 31. " IF3UPDATEEN[32] ,IF3 Update Enabled Bit[32]" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " [31] ,IF3 Update Enabled Bit[31]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 29. " [30] ,IF3 Update Enabled Bit[30]" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " [29] ,IF3 Update Enabled Bit[29]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " [28] ,IF3 Update Enabled Bit[28]" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " [27] ,IF3 Update Enabled Bit[27]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " [26] ,IF3 Update Enabled Bit[26]" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " [25] ,IF3 Update Enabled Bit[25]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " [24] ,IF3 Update Enabled Bit[24]" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " [23] ,IF3 Update Enabled Bit[23]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " [22] ,IF3 Update Enabled Bit[22]" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " [21] ,IF3 Update Enabled Bit[21]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " [20] ,IF3 Update Enabled Bit[20]" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " [19] ,IF3 Update Enabled Bit[19]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 17. " [18] ,IF3 Update Enabled Bit[18]" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " [17] ,IF3 Update Enabled Bit[17]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 15. " [16] ,IF3 Update Enabled Bit[16]" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " [15] ,IF3 Update Enabled Bit[15]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " [14] ,IF3 Update Enabled Bit[14]" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " [13] ,IF3 Update Enabled Bit[13]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " [12] ,IF3 Update Enabled Bit[12]" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " [11] ,IF3 Update Enabled Bit[11]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " [10] ,IF3 Update Enabled Bit[10]" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " [9] ,IF3 Update Enabled Bit[9]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " [8] ,IF3 Update Enabled Bit[8]" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " [7] ,IF3 Update Enabled Bit[7]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " [6] ,IF3 Update Enabled Bit[6]" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " [5] ,IF3 Update Enabled Bit[5]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " [4] ,IF3 Update Enabled Bit[4]" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " [3] ,IF3 Update Enabled Bit[3]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " [2] ,IF3 Update Enabled Bit[2]" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " [1] ,IF3 Update Enabled Bit[1]" "Disabled,Enabled"
|
|
line.long 0x04 "IF3UENA4_3,Update Enable 4_3 Register"
|
|
bitfld.long 0x04 31. " IF3UPDATEEN[64] ,IF3 Update Enabled Bit[64]" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " [63] ,IF3 Update Enabled Bit[63]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 29. " [62] ,IF3 Update Enabled Bit[62]" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " [61] ,IF3 Update Enabled Bit[61]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 27. " [60] ,IF3 Update Enabled Bit[60]" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " [59] ,IF3 Update Enabled Bit[59]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 25. " [58] ,IF3 Update Enabled Bit[58]" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " [57] ,IF3 Update Enabled Bit[57]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 23. " [56] ,IF3 Update Enabled Bit[56]" "Disabled,Enabled"
|
|
bitfld.long 0x04 22. " [55] ,IF3 Update Enabled Bit[55]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 21. " [54] ,IF3 Update Enabled Bit[54]" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " [53] ,IF3 Update Enabled Bit[53]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " [52] ,IF3 Update Enabled Bit[52]" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " [51] ,IF3 Update Enabled Bit[51]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 17. " [50] ,IF3 Update Enabled Bit[50]" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " [49] ,IF3 Update Enabled Bit[49]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 15. " [48] ,IF3 Update Enabled Bit[48]" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " [47] ,IF3 Update Enabled Bit[47]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 13. " [46] ,IF3 Update Enabled Bit[46]" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " [45] ,IF3 Update Enabled Bit[45]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 11. " [44] ,IF3 Update Enabled Bit[44]" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " [43] ,IF3 Update Enabled Bit[43]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 9. " [42] ,IF3 Update Enabled Bit[42]" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " [41] ,IF3 Update Enabled Bit[41]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 7. " [40] ,IF3 Update Enabled Bit[40]" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " [39] ,IF3 Update Enabled Bit[39]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 5. " [38] ,IF3 Update Enabled Bit[38]" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " [37] ,IF3 Update Enabled Bit[37]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " [36] ,IF3 Update Enabled Bit[36]" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " [35] ,IF3 Update Enabled Bit[35]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 1. " [34] ,IF3 Update Enabled Bit[34]" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " [33] ,IF3 Update Enabled Bit[33]" "Disabled,Enabled"
|
|
line.long 0x08 "IF3UENA6_5,Update Enable 6_5 Register"
|
|
bitfld.long 0x08 31. " IF3UPDATEEN[96] ,IF3 Update Enabled Bit[96]" "Disabled,Enabled"
|
|
bitfld.long 0x08 30. " [95] ,IF3 Update Enabled Bit[95]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 29. " [94] ,IF3 Update Enabled Bit[94]" "Disabled,Enabled"
|
|
bitfld.long 0x08 28. " [93] ,IF3 Update Enabled Bit[93]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 27. " [92] ,IF3 Update Enabled Bit[92]" "Disabled,Enabled"
|
|
bitfld.long 0x08 26. " [91] ,IF3 Update Enabled Bit[91]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 25. " [90] ,IF3 Update Enabled Bit[90]" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " [89] ,IF3 Update Enabled Bit[89]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 23. " [88] ,IF3 Update Enabled Bit[88]" "Disabled,Enabled"
|
|
bitfld.long 0x08 22. " [87] ,IF3 Update Enabled Bit[87]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 21. " [86] ,IF3 Update Enabled Bit[86]" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " [85] ,IF3 Update Enabled Bit[85]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 19. " [84] ,IF3 Update Enabled Bit[84]" "Disabled,Enabled"
|
|
bitfld.long 0x08 18. " [83] ,IF3 Update Enabled Bit[83]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 17. " [82] ,IF3 Update Enabled Bit[82]" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " [81] ,IF3 Update Enabled Bit[81]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 15. " [80] ,IF3 Update Enabled Bit[80]" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " [79] ,IF3 Update Enabled Bit[79]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 13. " [78] ,IF3 Update Enabled Bit[78]" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " [77] ,IF3 Update Enabled Bit[77]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 11. " [76] ,IF3 Update Enabled Bit[76]" "Disabled,Enabled"
|
|
bitfld.long 0x08 10. " [75] ,IF3 Update Enabled Bit[75]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 9. " [74] ,IF3 Update Enabled Bit[74]" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " [73] ,IF3 Update Enabled Bit[73]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 7. " [72] ,IF3 Update Enabled Bit[72]" "Disabled,Enabled"
|
|
bitfld.long 0x08 6. " [71] ,IF3 Update Enabled Bit[71]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 5. " [70] ,IF3 Update Enabled Bit[70]" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " [69] ,IF3 Update Enabled Bit[69]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 3. " [68] ,IF3 Update Enabled Bit[68]" "Disabled,Enabled"
|
|
bitfld.long 0x08 2. " [67] ,IF3 Update Enabled Bit[67]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x08 1. " [66] ,IF3 Update Enabled Bit[66]" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " [65] ,IF3 Update Enabled Bit[65]" "Disabled,Enabled"
|
|
line.long 0x0C "IF3UENA8_7,Update Enable 8_7 Register"
|
|
bitfld.long 0x0C 31. " IF3UPDATEEN[128] ,IF3 Update Enabled Bit[128]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 30. " [127] ,IF3 Update Enabled Bit[127]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 29. " [126] ,IF3 Update Enabled Bit[126]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " [125] ,IF3 Update Enabled Bit[125]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 27. " [124] ,IF3 Update Enabled Bit[124]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " [123] ,IF3 Update Enabled Bit[123]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 25. " [122] ,IF3 Update Enabled Bit[122]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " [121] ,IF3 Update Enabled Bit[121]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 23. " [120] ,IF3 Update Enabled Bit[120]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 22. " [119] ,IF3 Update Enabled Bit[119]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 21. " [118] ,IF3 Update Enabled Bit[118]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " [117] ,IF3 Update Enabled Bit[117]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 19. " [116] ,IF3 Update Enabled Bit[116]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " [115] ,IF3 Update Enabled Bit[115]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 17. " [114] ,IF3 Update Enabled Bit[114]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " [113] ,IF3 Update Enabled Bit[113]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 15. " [112] ,IF3 Update Enabled Bit[112]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 14. " [111] ,IF3 Update Enabled Bit[111]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 13. " [110] ,IF3 Update Enabled Bit[110]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " [109] ,IF3 Update Enabled Bit[109]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 11. " [108] ,IF3 Update Enabled Bit[108]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10. " [107] ,IF3 Update Enabled Bit[107]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 9. " [106] ,IF3 Update Enabled Bit[106]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " [105] ,IF3 Update Enabled Bit[105]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 7. " [104] ,IF3 Update Enabled Bit[104]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 6. " [103] ,IF3 Update Enabled Bit[103]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 5. " [102] ,IF3 Update Enabled Bit[102]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " [101] ,IF3 Update Enabled Bit[101]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 3. " [100] ,IF3 Update Enabled Bit[100]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " [99] ,IF3 Update Enabled Bit[99]" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0C 1. " [98] ,IF3 Update Enabled Bit[98]" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " [97] ,IF3 Update Enabled Bit[97]" "Disabled,Enabled"
|
|
newline
|
|
group.long 0x1E0++0x03
|
|
line.long 0x0 "IOCTRLTX,TX IO Control Register"
|
|
sif (cpu()!="TMS470MF031"&&cpu()!="TMS470MF042"&&cpu()!="TMS470MF066"&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")&&!cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 19. " SR ,Slew Rate Selection of Output Driver" "Normal,Slow"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 18. " PU ,Selection of Pull Direction" "Pull down,Pull up"
|
|
bitfld.long 0x00 17. " PD ,Pull Functionality Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " OD ,Open Drain Mode" "Push pull,Open Drain"
|
|
bitfld.long 0x00 3. " FUNC ,Functionality of Pin" "General,CAN"
|
|
newline
|
|
bitfld.long 0x00 2. " DIR ,Direction of Pin" "Input,Output"
|
|
bitfld.long 0x00 1. " OUT ,Value to Drive to Pin if Configured for I/O" "Low,High"
|
|
bitfld.long 0x00 0. " IN ,Value of Pin" "Low,High"
|
|
group.long 0x1E4++0x03
|
|
line.long 0x0 "IOCTRLRX,RX IO Control Register"
|
|
sif (cpu()!="TMS470MF031"&&cpu()!="TMS470MF042"&&cpu()!="TMS470MF066"&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")&&!cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 19. " SR ,Slew Rate Selection of Output Driver" "Normal,Slow"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 18. " PU ,Selection of Pull Direction" "Pull down,Pull up"
|
|
bitfld.long 0x00 17. " PD ,Pull Functionality Disable" "No,Yes"
|
|
bitfld.long 0x00 16. " OD ,Open Drain Mode" "Push pull,Open Drain"
|
|
bitfld.long 0x00 3. " FUNC ,Functionality of Pin" "General,CAN"
|
|
newline
|
|
bitfld.long 0x00 2. " DIR ,Direction of Pin" "Input,Output"
|
|
bitfld.long 0x00 1. " OUT ,Value to Drive to Pin if Configured for I/O" "Low,High"
|
|
bitfld.long 0x00 0. " IN ,Value of Pin" "Low,High"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.le
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "MibSPI/MibSPIP (Multi-Buffered Serial Peripheral Interface with Parallel Pin Option)"
|
|
tree "MibSPI1"
|
|
base ad:0xFFF7F400
|
|
width 17.
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SPIGCR0,SPI Global Control Register 0"
|
|
bitfld.long 0x00 0. " NRESET ,Reset bit for the module" "No reset,Reset"
|
|
group.long 0x04++0x0F
|
|
line.long 0x00 "SPIGCR1,SPI Global Control Register 1"
|
|
bitfld.long 0x00 24. " SPIEN ,SPI enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " POWERDOWN ,SPI state machine enters a power-down state" "No power-down,Power-down"
|
|
newline
|
|
bitfld.long 0x00 1. " CLKMOD ,Clock mode" "External,Internally"
|
|
bitfld.long 0x00 0. " MASTER ,SPISIMO/SPISOMI pin direction determination" "Input/output,Output/input"
|
|
line.long 0x04 "SPIINT0,SPI Interrupt Register"
|
|
bitfld.long 0x04 24. " ENABLEHIGHZ ,SPIENA pin high-impedance enable" "Inactive,Active"
|
|
bitfld.long 0x04 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TXINTENA ,TX interrupt flag enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " RXINTENA ,RX interrupt flag enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RXOVRNINTENA ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BITERRENA ,Enables interrupt on bit error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " DESYNCENA ,Enables interrupt on desynchronized slave" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PARERRENA ,Enables interrupt-on-parity-error" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TIMEOUTENA ,Enables interrupt on ENA signal time-out" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 0. " DLENERRENA ,Data length error interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SPILVL,SPI Interrupt Level Register"
|
|
bitfld.long 0x08 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1"
|
|
sif !cpuis("TMS570LS0232")
|
|
bitfld.long 0x08 6. " RXOVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1"
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 3. " DESYNCLVL ,Desynchronized slave interrupt level (master mode only)" "INT0,INT1"
|
|
bitfld.long 0x08 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 1. " TIMEOUTLVL ,SPIENA pin time-out interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 0. " DLENERRLVL ,Data length error interrupt level (line) select" "INT0,INT1"
|
|
line.long 0x0C "SPIFLG,SPI Flag Register"
|
|
bitfld.long 0x0C 24. " BUFINITACTIVE ,Indicates the status of multi-buffer initialization process" "Completed,Not completed"
|
|
bitfld.long 0x0C 9. " TXINTFLG ,Transmitter-empty interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 8. " RXINTFLG ,Receiver-full interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x0C 6. " RXOVRNINTFLG ,Overrun interrupt enable" "Disabled,Enabled"
|
|
eventfld.long 0x0C 4. " BITERRFLG ,Enables interrupt on bit error" "Disabled,Enabled"
|
|
eventfld.long 0x0C 3. " DESYNCFLG ,Enables interrupt on desynchronized slave" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x0C 2. " PARITYERRFLG ,Enables interrupt-on-parity-error" "No error,Error"
|
|
eventfld.long 0x0C 1. " TIMEOUTFLG ,Enables interrupt on ENA signal time-out" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 0. " DLENERRFLG ,Data length error interrupt enable" "No interrupt,Interrupt"
|
|
group.long 0x14++0x23
|
|
line.long 0x00 "SPIPC0,SPI Pin Control Register 0"
|
|
sif !cpuis("TMS570LS0232")&&!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432")
|
|
bitfld.long 0x00 31. " SOMIFUN7 ,SPISOMI[7] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 30. " SOMIFUN6 ,SPISOMI[6] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 29. " SOMIFUN5 ,SPISOMI[5] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 28. " SOMIFUN4 ,SPISOMI[4] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 27. " SOMIFUN3 ,SPISOMI[3] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 26. " SOMIFUN2 ,SPISOMI[2] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 25. " SOMIFUN1 ,SPISOMI[1] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 24. " SOMIFUN0 ,SPISOMI[0] pin function (mirror of bit 11)" "GIO,SPI"
|
|
bitfld.long 0x00 23. " SIMOFUN7 ,SPISIMO[7] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 22. " SIMOFUN6 ,SPISIMO[6] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 21. " SIMOFUN5 ,SPISIMO[5] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 20. " SIMOFUN4 ,SPISIMO[4] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 19. " SIMOFUN3 ,SPISIMO[3] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 18. " SIMOFUN2 ,SPISIMO[2] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 17. " SIMOFUN1 ,SPISIMO[1] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 16. " SIMOFUN0 ,SPISIMO[0] pin function (mirror of bit 10)" "GIO,SPI"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 11. " SOMIFUN0 ,SPISOMI[0] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 10. " SIMOFUN0 ,SPISIMO[0] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 9. " CLKFUN ,SPI clock function" "GIO,SPI"
|
|
bitfld.long 0x00 8. " ENAFUN ,SPIENA function" "GIO,SPI"
|
|
bitfld.long 0x00 7. " SCSFUN7 ,SPISCS7 function 7" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 6. " SCSFUN6 ,SPISCS6 function 6" "GIO,SPI"
|
|
bitfld.long 0x00 5. " SCSFUN5 ,SPISCS5 function 5" "GIO,SPI"
|
|
bitfld.long 0x00 4. " SCSFUN4 ,SPISCS4 function 4" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 3. " SCSFUN3 ,SPISCS3 function 3" "GIO,SPI"
|
|
bitfld.long 0x00 2. " SCSFUN2 ,SPISCS2 function 2" "GIO,SPI"
|
|
bitfld.long 0x00 1. " SCSFUN1 ,SPISCS1 function 1" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 0. " SCSFUN0 ,SPISCS0 function 0" "GIO,SPI"
|
|
line.long 0x04 "SPIPC1,SPI Pin Control Register 1"
|
|
bitfld.long 0x04 31. " SOMIDIR7 ,SPISOMI[7] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 30. " SOMIDIR6 ,SPISOMI[6] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 29. " SOMIDIR5 ,SPISOMI[5] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 28. " SOMIDIR4 ,SPISOMI[4] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 27. " SOMIDIR3 ,SPISOMI[3] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 26. " SOMIDIR2 ,SPISOMI[2] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 25. " SOMIDIR1 ,SPISOMI[1] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 24. " SOMIDIR0 ,SPISOMI[0] pin direction (mirror of bit 11)" "GIO,SPI"
|
|
bitfld.long 0x04 23. " SIMODIR7 ,SPISIMO[7] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 22. " SIMODIR6 ,SPISIMO[6] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 21. " SIMODIR5 ,SPISIMO[5] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 20. " SIMODIR4 ,SPISIMO[4] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 19. " SIMODIR3 ,SPISIMO[3] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 18. " SIMODIR2 ,SPISIMO[2] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 17. " SIMODIR1 ,SPISIMO[1] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 16. " SIMODIR0 ,SPISIMO[0] pin direction (mirror of bit 10)" "GIO,SPI"
|
|
bitfld.long 0x04 11. " SOMIDIR0 ,SPISOMI[0] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 10. " SIMODIR0 ,SPISIMO[0] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 9. " CLKDIR ,SPI clock direction" "GIO,SPI"
|
|
bitfld.long 0x04 8. " ENADIR ,SPIENA direction" "GIO,SPI"
|
|
bitfld.long 0x04 7. " SCSDIR7 ,SPISCS7 direction 7" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 6. " SCSDIR6 ,SPISCS6 direction 6" "GIO,SPI"
|
|
bitfld.long 0x04 5. " SCSDIR5 ,SPISCS5 direction 5" "GIO,SPI"
|
|
bitfld.long 0x04 4. " SCSDIR4 ,SPISCS4 direction 4" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 3. " SCSDIR3 ,SPISCS3 direction 3" "GIO,SPI"
|
|
bitfld.long 0x04 2. " SCSDIR2 ,SPISCS2 direction 2" "GIO,SPI"
|
|
bitfld.long 0x04 1. " SCSDIR1 ,SPISCS1 direction 1" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 0. " SCSDIR0 ,SPISCS0 direction 0" "GIO,SPI"
|
|
line.long 0x08 "SPIPC2,SPI Pin Control Register 2"
|
|
bitfld.long 0x08 31. " SOMIDIN7 ,SPISOMI[7] data in" "0,1"
|
|
bitfld.long 0x08 30. " SOMIDIN6 ,SPISOMI[6] data in" "0,1"
|
|
bitfld.long 0x08 29. " SOMIDIN5 ,SPISOMI[5] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 28. " SOMIDIN4 ,SPISOMI[4] data in" "0,1"
|
|
bitfld.long 0x08 27. " SOMIDIN3 ,SPISOMI[3] data in" "0,1"
|
|
bitfld.long 0x08 26. " SOMIDIN2 ,SPISOMI[2] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 25. " SOMIDIN1 ,SPISOMI[1] data in" "0,1"
|
|
bitfld.long 0x08 24. " SOMIDIN0 ,SPISOMI[0] data in (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x08 23. " SIMODIN7 ,SPISIMO[7] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 22. " SIMODIN6 ,SPISIMO[6] data in" "0,1"
|
|
bitfld.long 0x08 21. " SIMODIN5 ,SPISIMO[5] data in" "0,1"
|
|
bitfld.long 0x08 20. " SIMODIN4 ,SPISIMO[4] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 19. " SIMODIN3 ,SPISIMO[3] data in" "0,1"
|
|
bitfld.long 0x08 18. " SIMODIN2 ,SPISIMO[2] data in" "0,1"
|
|
bitfld.long 0x08 17. " SIMODIN1 ,SPISIMO[1] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 16. " SIMODIN0 ,SPISIMO[0] data in (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x08 11. " SOMIDIN0 ,SPISOMI[0] data in" "0,1"
|
|
bitfld.long 0x08 10. " SIMODIN0 ,SPISIMO[0] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 9. " CLKDIN ,SPI clock data in" "0,1"
|
|
bitfld.long 0x08 8. " ENADIN ,SPIENA data in" "0,1"
|
|
bitfld.long 0x08 7. " SCSDIN7 ,SPISCS7 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 6. " SCSDIN6 ,SPISCS6 data in" "0,1"
|
|
bitfld.long 0x08 5. " SCSDIN5 ,SPISCS5 data in" "0,1"
|
|
bitfld.long 0x08 4. " SCSDIN4 ,SPISCS4 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 3. " SCSDIN3 ,SPISCS3 data in" "0,1"
|
|
bitfld.long 0x08 2. " SCSDIN2 ,SPISCS2 data in" "0,1"
|
|
bitfld.long 0x08 1. " SCSDIN1 ,SPISCS1 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 0. " SCSDIN0 ,SPISCS0 direction 0" "0,1"
|
|
line.long 0x0C "SPIPC3,SPI Pin Control Register 3"
|
|
bitfld.long 0x0C 31. " SOMIDOUT7 ,SPISOMI[7] data out write" "0,1"
|
|
bitfld.long 0x0C 30. " SOMIDOUT6 ,SPISOMI[6] data out write" "0,1"
|
|
bitfld.long 0x0C 29. " SOMIDOUT5 ,SPISOMI[5] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 28. " SOMIDOUT4 ,SPISOMI[4] data out write" "0,1"
|
|
bitfld.long 0x0C 27. " SOMIDOUT3 ,SPISOMI[3] data out write" "0,1"
|
|
bitfld.long 0x0C 26. " SOMIDOUT2 ,SPISOMI[2] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 25. " SOMIDOUT1 ,SPISOMI[1] data out write" "0,1"
|
|
bitfld.long 0x0C 24. " SOMIDOUT0 ,SPISOMI[0] data out write (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x0C 23. " SIMODOUT7 ,SPISIMO[7] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 22. " SIMODOUT6 ,SPISIMO[6] data out write" "0,1"
|
|
bitfld.long 0x0C 21. " SIMODOUT5 ,SPISIMO[5] data out write" "0,1"
|
|
bitfld.long 0x0C 20. " SIMODOUT4 ,SPISIMO[4] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 19. " SIMODOUT3 ,SPISIMO[3] data out write" "0,1"
|
|
bitfld.long 0x0C 18. " SIMODOUT2 ,SPISIMO[2] data out write" "0,1"
|
|
bitfld.long 0x0C 17. " SIMODOUT1 ,SPISIMO[1] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 16. " SIMODOUT0 ,SPISIMO[0] data out write (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x0C 11. " SOMIDOUT0 ,SPISOMI[0] data out write" "0,1"
|
|
bitfld.long 0x0C 10. " SIMODOUT0 ,SPISIMO[0] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 9. " CLKDOUT ,SPI clock data out write" "0,1"
|
|
bitfld.long 0x0C 8. " ENADOUT ,SPIENA data out write" "0,1"
|
|
bitfld.long 0x0C 7. " SCSDOUT7 ,SPISCS7 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 6. " SCSDOUT6 ,SPISCS6 data out write" "0,1"
|
|
bitfld.long 0x0C 5. " SCSDOUT5 ,SPISCS5 data out write" "0,1"
|
|
bitfld.long 0x0C 4. " SCSDOUT4 ,SPISCS4 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 3. " SCSDOUT3 ,SPISCS3 data out write" "0,1"
|
|
bitfld.long 0x0C 2. " SCSDOUT2 ,SPISCS2 data out write" "0,1"
|
|
bitfld.long 0x0C 1. " SCSDOUT1 ,SPISCS1 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 0. " SCSDOUT0 ,SPISCS0 data out write" "0,1"
|
|
line.long 0x10 "SPIPC4,SPI Pin Control Register 4"
|
|
bitfld.long 0x10 31. " SOMISET7 ,SPISOMI[7] data out set" "0,1"
|
|
bitfld.long 0x10 30. " SOMISET6 ,SPISOMI[6] data out set" "0,1"
|
|
bitfld.long 0x10 29. " SOMISET5 ,SPISOMI[5] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 28. " SOMISET4 ,SPISOMI[4] data out set" "0,1"
|
|
bitfld.long 0x10 27. " SOMISET3 ,SPISOMI[3] data out set" "0,1"
|
|
bitfld.long 0x10 26. " SOMISET2 ,SPISOMI[2] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. " SOMISET1 ,SPISOMI[1] data out set" "0,1"
|
|
bitfld.long 0x10 24. " SOMISET0 ,SPISOMI[0] data out set (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x10 23. " SIMOSET7 ,SPISIMO[7] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 22. " SIMOSET6 ,SPISIMO[6] data out set" "0,1"
|
|
bitfld.long 0x10 21. " SIMOSET5 ,SPISIMO[5] data out set" "0,1"
|
|
bitfld.long 0x10 20. " SIMOSET4 ,SPISIMO[4] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. " SIMOSET3 ,SPISIMO[3] data out set" "0,1"
|
|
bitfld.long 0x10 18. " SIMOSET2 ,SPISIMO[2] data out set" "0,1"
|
|
bitfld.long 0x10 17. " SIMOSET1 ,SPISIMO[1] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. " SIMOSET0 ,SPISIMO[0] data out set (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x10 11. " SOMISET0 ,SPISOMI[0] data out set" "0,1"
|
|
bitfld.long 0x10 10. " SIMOSET0 ,SPISIMO[0] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. " CLKSET ,SPI clock data out set" "0,1"
|
|
bitfld.long 0x10 8. " ENASET ,SPIENA data out set" "0,1"
|
|
bitfld.long 0x10 7. " SCSSET7 ,SPISCS7 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. " SCSSET6 ,SPISCS6 data out set" "0,1"
|
|
bitfld.long 0x10 5. " SCSSET5 ,SPISCS5 data out set" "0,1"
|
|
bitfld.long 0x10 4. " SCSSET4 ,SPISCS4 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. " SCSSET3 ,SPISCS3 data out set" "0,1"
|
|
bitfld.long 0x10 2. " SCSSET2 ,SPISCS2 data out set" "0,1"
|
|
bitfld.long 0x10 1. " SCSSET1 ,SPISCS1 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. " SCSSET0 ,SPISCS0 data out set" "0,1"
|
|
line.long 0x14 "SPIPC5,SPI Pin Control Register 5"
|
|
bitfld.long 0x14 31. " SOMICLR7 ,SPISOMI[7] data out clear" "0,1"
|
|
bitfld.long 0x14 30. " SOMICLR6 ,SPISOMI[6] data out clear" "0,1"
|
|
bitfld.long 0x14 29. " SOMICLR5 ,SPISOMI[5] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 28. " SOMICLR4 ,SPISOMI[4] data out clear" "0,1"
|
|
bitfld.long 0x14 27. " SOMICLR3 ,SPISOMI[3] data out clear" "0,1"
|
|
bitfld.long 0x14 26. " SOMICLR2 ,SPISOMI[2] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 25. " SOMICLR1 ,SPISOMI[1] data out clear" "0,1"
|
|
bitfld.long 0x14 24. " SOMICLR0 ,SPISOMI[0] data out clear (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x14 23. " SIMOCLR7 ,SPISIMO[7] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 22. " SIMOCLR6 ,SPISIMO[6] data out clear" "0,1"
|
|
bitfld.long 0x14 21. " SIMOCLR5 ,SPISIMO[5] data out clear" "0,1"
|
|
bitfld.long 0x14 20. " SIMOCLR4 ,SPISIMO[4] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 19. " SIMOCLR3 ,SPISIMO[3] data out clear" "0,1"
|
|
bitfld.long 0x14 18. " SIMOCLR2 ,SPISIMO[2] data out clear" "0,1"
|
|
bitfld.long 0x14 17. " SIMOCLR1 ,SPISIMO[1] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. " SIMOCLR0 ,SPISIMO[0] data out clear (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x14 11. " SOMICLR0 ,SPISOMI[0] data out clear" "0,1"
|
|
bitfld.long 0x14 10. " SIMOCLR0 ,SPISIMO[0] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. " CLKCLR ,SPI clock data out clear" "0,1"
|
|
bitfld.long 0x14 8. " ENACLR ,SPIENA data out clear" "0,1"
|
|
bitfld.long 0x14 7. " SCSCLR7 ,SPISCS7 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. " SCSCLR6 ,SPISCS6 data out clear" "0,1"
|
|
bitfld.long 0x14 5. " SCSCLR5 ,SPISCS5 data out clear" "0,1"
|
|
bitfld.long 0x14 4. " SCSCLR4 ,SPISCS4 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. " SCSCLR3 ,SPISCS3 data out clear" "0,1"
|
|
bitfld.long 0x14 2. " SCSCLR2 ,SPISCS2 data out clear" "0,1"
|
|
bitfld.long 0x14 1. " SCSCLR1 ,SPISCS1 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. " SCSCLR0 ,SPISCS0 data out clear" "0,1"
|
|
line.long 0x18 "SPIPC6,SPI Pin Control Register 6"
|
|
bitfld.long 0x18 31. " SOMIPDR7 ,SPISOMI[7] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " SOMIPDR6 ,SPISOMI[6] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " SOMIPDR5 ,SPISOMI[5] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 28. " SOMIPDR4 ,SPISOMI[4] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " SOMIPDR3 ,SPISOMI[3] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 26. " SOMIPDR2 ,SPISOMI[2] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 25. " SOMIPDR1 ,SPISOMI[1] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " SOMIPDR0 ,SPISOMI[0] open drain enable (mirror of bit 11)" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " SIMOPDR7 ,SPISIMO[7] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 22. " SIMOPDR6 ,SPISIMO[6] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " SIMOPDR5 ,SPISIMO[5] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " SIMOPDR4 ,SPISIMO[4] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 19. " SIMOPDR3 ,SPISIMO[3] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 18. " SIMOPDR2 ,SPISIMO[2] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 17. " SIMOPDR1 ,SPISIMO[1] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 16. " SIMOPDR0 ,SPISIMO[0] open drain enable (mirror of bit 10)" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " SOMIPDR0 ,SPISOMI[0] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 10. " SIMOPDR0 ,SPISIMO[0] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 9. " CLKPDR ,SPI clock open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " ENAPDR ,SPIENA open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " SCSPDR7 ,SPISCS7 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 6. " SCSPDR6 ,SPISCS6 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " SCSPDR5 ,SPISCS5 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " SCSPDR4 ,SPISCS4 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 3. " SCSPDR3 ,SPISCS3 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " SCSPDR2 ,SPISCS2 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " SCSPDR1 ,SPISCS1 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 0. " SCSPDR0 ,SPISCS0 open drain enable" "Disabled,Enabled"
|
|
line.long 0x1C "SPIPC7,SPI Pin Control Register 7"
|
|
bitfld.long 0x1C 31. " SOMIPDIS7 ,SPISOMI[7] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 30. " SOMIPDIS6 ,SPISOMI[6] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 29. " SOMIPDIS5 ,SPISOMI[5] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 28. " SOMIPDIS4 ,SPISOMI[4] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 27. " SOMIPDIS3 ,SPISOMI[3] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 26. " SOMIPDIS2 ,SPISOMI[2] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 25. " SOMIPDIS1 ,SPISOMI[1] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 24. " SOMIPDIS0 ,SPISOMI[0] pull control enable/disable (mirror of bit 11)" "No,Yes"
|
|
bitfld.long 0x1C 23. " SIMOPDIS7 ,SPISIMO[7] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 22. " SIMOPDIS6 ,SPISIMO[6] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 21. " SIMOPDIS5 ,SPISIMO[5] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 20. " SIMOPDIS4 ,SPISIMO[4] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 19. " SIMOPDIS3 ,SPISIMO[3] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 18. " SIMOPDIS2 ,SPISIMO[2] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 17. " SIMOPDIS1 ,SPISIMO[1] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 16. " SIMOPDIS0 ,SPISIMO[0] pull control enable/disable (mirror of bit 10)" "No,Yes"
|
|
bitfld.long 0x1C 11. " SOMIPDIS0 ,SPISOMI[0] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 10. " SIMOPDIS0 ,SPISIMO[0] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 9. " CLKPDIS ,SPI clock pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 8. " ENAPDIS ,SPIENA pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 7. " SCSPDIS7 ,SPISCS7 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 6. " SCSPDIS6 ,SPISCS6 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 5. " SCSPDIS5 ,SPISCS5 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 4. " SCSPDIS4 ,SPISCS4 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 3. " SCSPDIS3 ,SPISCS3 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 2. " SCSPDIS2 ,SPISCS2 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 1. " SCSPDIS1 ,SPISCS1 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 0. " SCSPDIS0 ,SPISCS0 pull control enable/disable" "No,Yes"
|
|
line.long 0x20 "SPIPC8,SPI Pin Control Register 8"
|
|
bitfld.long 0x20 31. " SOMIPSEL7 ,SPISOMI[7] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 30. " SOMIPSEL6 ,SPISOMI[6] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 29. " SOMIPSEL5 ,SPISOMI[5] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 28. " SOMIPSEL4 ,SPISOMI[4] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 27. " SOMIPSEL3 ,SPISOMI[3] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 26. " SOMIPSEL2 ,SPISOMI[2] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 25. " SOMIPSEL1 ,SPISOMI[1] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 24. " SOMIPSEL0 ,SPISOMI[0] pull select (mirror of bit 11)" "Pull down,Pull up"
|
|
bitfld.long 0x20 23. " SIMOPSEL7 ,SPISIMO[7] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 22. " SIMOPSEL6 ,SPISIMO[6] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 21. " SIMOPSEL5 ,SPISIMO[5] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 20. " SIMOPSEL4 ,SPISIMO[4] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 19. " SIMOPSEL3 ,SPISIMO[3] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 18. " SIMOPSEL2 ,SPISIMO[2] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 17. " SIMOPSEL1 ,SPISIMO[1] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 16. " SIMOPSEL0 ,SPISIMO[0] pull select (mirror of bit 10)" "Pull down,Pull up"
|
|
bitfld.long 0x20 11. " SOMIPSEL0 ,SPISOMI[0] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 10. " SIMOPSEL0 ,SPISIMO[0] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 9. " CLKPSEL ,SPI clock pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 8. " ENAPSEL ,SPIENA pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 7. " SCSPSEL7 ,SPISCS7 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 6. " SCSPSEL6 ,SPISCS6 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 5. " SCSPSEL5 ,SPISCS5 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 4. " SCSPSEL4 ,SPISCS4 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 3. " SCSPSEL3 ,SPISCS3 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 2. " SCSPSEL2 ,SPISCS2 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 1. " SCSPSEL1 ,SPISCS1 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 0. " SCSPSEL0 ,SPISCS0 pull select" "Pull down,Pull up"
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "SPIDAT0,SPI Transmit Data Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,SPI transmit data"
|
|
line.long 0x04 "SPIDAT1,Transmit Data Register 1"
|
|
bitfld.long 0x04 28. " CSHOLD ,Chip select hold mode" "Inactive,Active"
|
|
bitfld.long 0x04 26. " WDEL ,Enable the delay counter at the end of the current transaction" "No delay,After transaction"
|
|
bitfld.long 0x04 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x04 16.--23. 1. " CSNR ,Chip select number"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXDATA ,Transfer data"
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "SPIBUF,SPI Receive Buffer Register"
|
|
in
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SPIEMU,SPI Emulation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " EMU_RXDATA ,SPI receive data"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " C2TDELAY ,Chip-select-active to transmit-start delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " T2EDELAY ,Transmit-data-finished to ENA-pin-inactive time-out"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " C2EDELAY ,Chip-select-active to ENA-signal-active time-out"
|
|
else
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " C2TDELAY ,Chip-select-active to transmit-start delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " T2EDELAY ,Transmit-data-finished to ENA-pin-inactive time-out"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " C2EDELAY ,Chip-select-active to ENA-signal-active time-out"
|
|
endif
|
|
group.long 0x4C++0x13
|
|
line.long 0x00 "SPIDEF,SPI Default Chip Select Register"
|
|
bitfld.long 0x00 7. " CSDEF7 ,Chip select default pattern 7" "0,1"
|
|
bitfld.long 0x00 6. " CSDEF6 ,Chip select default pattern 6" "0,1"
|
|
bitfld.long 0x00 5. " CSDEF5 ,Chip select default pattern 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. " CSDEF4 ,Chip select default pattern 4" "0,1"
|
|
bitfld.long 0x00 3. " CSDEF3 ,Chip select default pattern 3" "0,1"
|
|
bitfld.long 0x00 2. " CSDEF2 ,Chip select default pattern 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. " CSDEF1 ,Chip select default pattern 1" "0,1"
|
|
bitfld.long 0x00 0. " CSDEF0 ,Chip select default pattern 0" "0,1"
|
|
line.long 0x4 "SPIFMT0,SPI Data Format Register 0"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x4 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 0"
|
|
else
|
|
bitfld.long 0x4 24.--29. " WDELAY ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x4 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x4 22. " PARITYENA ,Parity enable for data format 0" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " WAITENA ,The master waits for the ENA signal from slave for data format 0" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x4 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x4 19. " HDUPLEX_ENA0 ,Half Duplex transfer mode enable for Data Format 0" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x4 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x4 17. " POLARITY ,SPI data format 0 clock polarity" "Low,High"
|
|
bitfld.long 0x4 16. " PHASE ,SPI data format 0 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRESCALE ,SPI data format 0 prescaler"
|
|
bitfld.long 0x4 0.--4. " CHARLEN ,SPI data format 0 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x8 "SPIFMT1,SPI Data Format Register 1"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x8 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 1"
|
|
else
|
|
bitfld.long 0x8 24.--29. " WDELAY ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x8 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x8 22. " PARITYENA ,Parity enable for data format 1" "Disabled,Enabled"
|
|
bitfld.long 0x8 21. " WAITENA ,The master waits for the ENA signal from slave for data format 1" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x8 19. " HDUPLEX_ENA1 ,Half Duplex transfer mode enable for Data Format 1" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x8 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x8 17. " POLARITY ,SPI data format 1 clock polarity" "Low,High"
|
|
bitfld.long 0x8 16. " PHASE ,SPI data format 1 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRESCALE ,SPI data format 1 prescaler"
|
|
bitfld.long 0x8 0.--4. " CHARLEN ,SPI data format 1 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0xC "SPIFMT2,SPI Data Format Register 2"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0xC 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 2"
|
|
else
|
|
bitfld.long 0xC 24.--29. " WDELAY ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0xC 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0xC 22. " PARITYENA ,Parity enable for data format 2" "Disabled,Enabled"
|
|
bitfld.long 0xC 21. " WAITENA ,The master waits for the ENA signal from slave for data format 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0xC 19. " HDUPLEX_ENA2 ,Half Duplex transfer mode enable for Data Format 2" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0xC 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0xC 17. " POLARITY ,SPI data format 2 clock polarity" "Low,High"
|
|
bitfld.long 0xC 16. " PHASE ,SPI data format 2 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRESCALE ,SPI data format 2 prescaler"
|
|
bitfld.long 0xC 0.--4. " CHARLEN ,SPI data format 2 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x10 "SPIFMT3,SPI Data Format Register 3"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x10 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 3"
|
|
else
|
|
bitfld.long 0x10 24.--29. " WDELAY ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x10 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x10 22. " PARITYENA ,Parity enable for data format 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WAITENA ,The master waits for the ENA signal from slave for data format 3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x10 19. " HDUPLEX_ENA3 ,Half Duplex transfer mode enable for Data Format 3" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x10 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x10 17. " POLARITY ,SPI data format 3 clock polarity" "Low,High"
|
|
bitfld.long 0x10 16. " PHASE ,SPI data format 3 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRESCALE ,SPI data format 3 prescaler"
|
|
bitfld.long 0x10 0.--4. " CHARLEN ,SPI data format 3 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
hgroup.long 0x60++0x03
|
|
hide.long 0x00 "TGINTVECT0,SPI Interrupt Vector Register 0 / MibSPI Transfer Group Interrupt Vector Register 0"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "TGINTVECT1,SPI Interrupt Vector Register 1 / MibSPI Transfer Group Interrupt Vector Register 1"
|
|
in
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
group.long 0x6C++0x07
|
|
line.long 0x00 "SPIPMCTRL,SPI Parallel/Modulo Mode Control Register"
|
|
bitfld.long 0x00 29. " MODCLKPOL3 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 26.--28. " MMODE3 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 24.--25. " PMODE3 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 21. " MODCLKPOL2 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 18.--20. " MMODE2 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 16.--17. " PMODE2 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 13. " MODCLKPOL1 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 10.--12. " MMODE1 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 8.--9. " PMODE1 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 5. " MODCLKPOL0 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 2.--4. " MMODE0 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 0.--1. " PMODE0 ,Parallel mode data lines" "1,2,4,8"
|
|
line.long 0x04 "MIBSPIE,MibSPI Enable Register"
|
|
bitfld.long 0x04 16. " RXRAMACCESS ,Receive-RAM access control" "Not writable,Accessible"
|
|
bitfld.long 0x04 0. " MIBSPIENA ,Multi-buffer mode enable" "Disabled,Enabled"
|
|
elif cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS0232")
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MIBSPIE,MibSPI Enable Register"
|
|
bitfld.long 0x00 16. " RXRAMACCESS ,Receive-RAM access control" "Not writable,Accessible"
|
|
bitfld.long 0x00 0. " MIBSPIENA ,Multi-buffer mode enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x74++0x0F
|
|
line.long 0x00 "TGITENST,MibSPI Transfer Group Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " SETINTENRDY15 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SETINTENRDY14 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SETINTENRDY13 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 28. " SETINTENRDY12 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SETINTENRDY11 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SETINTENRDY10 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " SETINTENRDY9 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SETINTENRDY8 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SETINTENRDY7 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " SETINTENRDY6 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SETINTENRDY5 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SETINTENRDY4 ,SETTG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " SETINTENRDY3 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SETINTENRDY2 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SETINTENRDY1 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " SETINTENRDY0 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SETINTENSUS15 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SETINTENSUS14 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " SETINTENSUS13 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SETINTENSUS12 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SETINTENSUS11 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " SETINTENSUS10 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SETINTENSUS9 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SETINTENSUS8 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " SETINTENSUS7 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SETINTENSUS6 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SETINTENSUS5 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. " SETINTENSUS4 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SETINTENSUS3 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SETINTENSUS2 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SETINTENSUS1 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SETINTENSUS0 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
line.long 0x04 "TGITENCR,MibSPI Transfer Group Interrupt Enable Clear Register"
|
|
bitfld.long 0x04 31. " CLRINTENRDY15 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CLRINTENRDY14 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " CLRINTENRDY13 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 28. " CLRINTENRDY12 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " CLRINTENRDY11 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " CLRINTENRDY10 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 25. " CLRINTENRDY9 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " CLRINTENRDY8 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " CLRINTENRDY7 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 22. " CLRINTENRDY6 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " CLRINTENRDY5 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " CLRINTENRDY4 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " CLRINTENRDY3 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " CLRINTENRDY2 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " CLRINTENRDY1 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 16. " CLRINTENRDY0 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " CLRINTENSUS15 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " CLRINTENSUS14 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 13. " CLRINTENSUS13 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " CLRINTENSUS12 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " CLRINTENSUS11 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 10. " CLRINTENSUS10 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " CLRINTENSUS9 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " CLRINTENSUS8 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 7. " CLRINTENSUS7 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CLRINTENSUS6 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CLRINTENSUS5 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 4. " CLRINTENSUS4 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " CLRINTENSUS3 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CLRINTENSUS2 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 1. " CLRINTENSUS1 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLRINTENSUS0 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
line.long 0x08 "TGITLVST,MibSPI Transfer Group Interrupt Level Set Register"
|
|
bitfld.long 0x08 31. " SETINTLVLRDY15 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 30. " SETINTLVLRDY14 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 29. " SETINTLVLRDY13 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 28. " SETINTLVLRDY12 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 27. " SETINTLVLRDY11 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 26. " SETINTLVLRDY10 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 25. " SETINTLVLRDY9 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 24. " SETINTLVLRDY8 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 23. " SETINTLVLRDY7 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 22. " SETINTLVLRDY6 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 21. " SETINTLVLRDY5 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 20. " SETINTLVLRDY4 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 19. " SETINTLVLRDY3 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 18. " SETINTLVLRDY2 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 17. " SETINTLVLRDY1 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 16. " SETINTLVLRDY0 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 15. " SETINTLVLSUS15 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 14. " SETINTLVLSUS14 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 13. " SETINTLVLSUS13 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 12. " SETINTLVLSUS12 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 11. " SETINTLVLSUS11 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 10. " SETINTLVLSUS10 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 9. " SETINTLVLSUS9 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 8. " SETINTLVLSUS8 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 7. " SETINTLVLSUS7 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 6. " SETINTLVLSUS6 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 5. " SETINTLVLSUS5 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 4. " SETINTLVLSUS4 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 3. " SETINTLVLSUS3 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 2. " SETINTLVLSUS2 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 1. " SETINTLVLSUS1 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 0. " SETINTLVLSUS0 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
line.long 0x0C "TGITLVCR,MibSPI Transfer Group Interrupt Level Clear Register"
|
|
bitfld.long 0x0C 31. " CLRINTLVLRDY15 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 30. " CLRINTLVLRDY14 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 29. " CLRINTLVLRDY13 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 28. " CLRINTLVLRDY12 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 27. " CLRINTLVLRDY11 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 26. " CLRINTLVLRDY10 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 25. " CLRINTLVLRDY9 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 24. " CLRINTLVLRDY8 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 23. " CLRINTLVLRDY7 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 22. " CLRINTLVLRDY6 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 21. " CLRINTLVLRDY5 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 20. " CLRINTLVLRDY4 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 19. " CLRINTLVLRDY3 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 18. " CLRINTLVLRDY2 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 17. " CLRINTLVLRDY1 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 16. " CLRINTLVLRDY0 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 15. " CLRINTLVLSUS15 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 14. " CLRINTLVLSUS14 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 13. " CLRINTLVLSUS13 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 12. " CLRINTLVLSUS12 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 11. " CLRINTLVLSUS11 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 10. " CLRINTLVLSUS10 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 9. " CLRINTLVLSUS9 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 8. " CLRINTLVLSUS8 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 7. " CLRINTLVLSUS7 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 6. " CLRINTLVLSUS6 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 5. " CLRINTLVLSUS5 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 4. " CLRINTLVLSUS4 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 3. " CLRINTLVLSUS3 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 2. " CLRINTLVLSUS2 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 1. " CLRINTLVLSUS1 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 0. " CLRINTLVLSUS0 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TGITFLG,Transfer Group Interrupt Flag Register"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 31. " INTFLGRDY[15] ,Transfer-group interrupt flag for a transfer-completed interrupt 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INTFLGRDY[14] ,Transfer-group interrupt flag for a transfer-completed interrupt 14" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 29. " INTFLGRDY[13] ,Transfer-group interrupt flag for a transfer-completed interrupt 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " INTFLGRDY[12] ,Transfer-group interrupt flag for a transfer-completed interrupt 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " INTFLGRDY[11] ,Transfer-group interrupt flag for a transfer-completed interrupt 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " INTFLGRDY[10] ,Transfer-group interrupt flag for a transfer-completed interrupt 10" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " INTFLGRDY[9] ,Transfer-group interrupt flag for a transfer-completed interrupt 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " INTFLGRDY[8] ,Transfer-group interrupt flag for a transfer-completed interrupt 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " INTFLGRDY[7] ,Transfer-group interrupt flag for a transfer-completed interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INTFLGRDY[6] ,Transfer-group interrupt flag for a transfer-completed interrupt 6" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " INTFLGRDY[5] ,Transfer-group interrupt flag for a transfer-completed interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INTFLGRDY[4] ,Transfer-group interrupt flag for a transfer-completed interrupt 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " INTFLGRDY[3] ,Transfer-group interrupt flag for a transfer-completed interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " INTFLGRDY[2] ,Transfer-group interrupt flag for a transfer-completed interrupt 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 17. " INTFLGRDY[1] ,Transfer-group interrupt flag for a transfer-completed interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " INTFLGRDY[0] ,Transfer-group interrupt flag for a transfer-completed interrupt 0" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " INTFLGSUS[15] ,Transfer-group interrupt flag for a transfer-suspend interrupt 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INTFLGSUS[14] ,Transfer-group interrupt flag for a transfer-suspend interrupt 14" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " INTFLGSUS[13] ,Transfer-group interrupt flag for a transfer-suspend interrupt 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " INTFLGSUS[12] ,Transfer-group interrupt flag for a transfer-suspend interrupt 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " INTFLGSUS[11] ,Transfer-group interrupt flag for a transfer-suspend interrupt 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " INTFLGSUS[10] ,Transfer-group interrupt flag for a transfer-suspend interrupt 10" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " INTFLGSUS[9] ,Transfer-group interrupt flag for a transfer-suspend interrupt 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " INTFLGSUS[8] ,Transfer-group interrupt flag for a transfer-suspend interrupt 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " INTFLGSUS[7] ,Transfer-group interrupt flag for a transfer-suspend interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INTFLGSUS[6] ,Transfer-group interrupt flag for a transfer-suspend interrupt 6" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " INTFLGSUS[5] ,Transfer-group interrupt flag for a transfer-suspend interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INTFLGSUS[4] ,Transfer-group interrupt flag for a transfer-suspend interrupt 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " INTFLGSUS[3] ,Transfer-group interrupt flag for a transfer-suspend interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INTFLGSUS[2] ,Transfer-group interrupt flag for a transfer-suspend interrupt 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " INTFLGSUS[1] ,Transfer-group interrupt flag for a transfer-suspend interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTFLGSUS[0] ,Transfer-group interrupt flag for a transfer-suspend interrupt 0" "Disabled,Enabled"
|
|
group.long 0x90++0x47
|
|
line.long 0x00 "TICKCNT,Tick Count Register"
|
|
bitfld.long 0x00 31. " TICKENA ,Tick counter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RELOAD ,Pre-load the tick counter" "No effect,Reload"
|
|
bitfld.long 0x00 28.--29. " CLKCTRL ,Tick counter clock source control" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TICKVALUE ,Initial value for the tick counter"
|
|
line.long 0x04 "LTGPEND,Last Transfer Group End Pointer Register"
|
|
bitfld.long 0x04 24.--28. " TGINSERVICE ,The TG number currently being serviced by the sequencer" "No TG,TG0,TG1,TG2,TG3,TG4,TG5,TG6,TG7,TG8,TG9,TG10,TG11,TG12,TG13,TG14,TG15,?..."
|
|
hexmask.long.byte 0x04 8.--14. 1. " LPEND ,Last TG end pointer"
|
|
line.long 0x8 "TG0CTRL,MibSPI Transfer Group Control Register 0"
|
|
bitfld.long 0x8 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x8 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x8 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x8 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x8 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x8 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0xC "TG1CTRL,MibSPI Transfer Group Control Register 1"
|
|
bitfld.long 0xC 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0xC 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0xC 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0xC 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0xC 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0xC 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x10 "TG2CTRL,MibSPI Transfer Group Control Register 2"
|
|
bitfld.long 0x10 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x10 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x10 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x10 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x10 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x14 "TG3CTRL,MibSPI Transfer Group Control Register 3"
|
|
bitfld.long 0x14 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x14 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x14 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x14 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x14 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x14 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x14 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x14 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x18 "TG4CTRL,MibSPI Transfer Group Control Register 4"
|
|
bitfld.long 0x18 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x18 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x18 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x18 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x18 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x18 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x1C "TG5CTRL,MibSPI Transfer Group Control Register 5"
|
|
bitfld.long 0x1C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x1C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x1C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x1C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x1C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x1C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x1C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x20 "TG6CTRL,MibSPI Transfer Group Control Register 6"
|
|
bitfld.long 0x20 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x20 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x20 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x20 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x20 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x20 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x20 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x20 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x24 "TG7CTRL,MibSPI Transfer Group Control Register 7"
|
|
bitfld.long 0x24 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x24 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x24 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x24 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x24 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x24 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x24 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x24 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x28 "TG8CTRL,MibSPI Transfer Group Control Register 8"
|
|
bitfld.long 0x28 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x28 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x28 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x28 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x28 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x28 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x28 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x28 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x2C "TG9CTRL,MibSPI Transfer Group Control Register 9"
|
|
bitfld.long 0x2C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x2C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x2C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x2C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x2C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x2C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x2C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x30 "TG10CTRL,MibSPI Transfer Group Control Register 10"
|
|
bitfld.long 0x30 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x30 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x30 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x30 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x30 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x30 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x30 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x30 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x34 "TG11CTRL,MibSPI Transfer Group Control Register 11"
|
|
bitfld.long 0x34 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x34 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x34 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x34 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x34 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x34 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x34 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x34 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x38 "TG12CTRL,MibSPI Transfer Group Control Register 12"
|
|
bitfld.long 0x38 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x38 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x38 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x38 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x38 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x38 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x38 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x38 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x3C "TG13CTRL,MibSPI Transfer Group Control Register 13"
|
|
bitfld.long 0x3C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x3C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x3C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x3C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x3C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x3C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x3C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x40 "TG14CTRL,MibSPI Transfer Group Control Register 14"
|
|
bitfld.long 0x40 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x40 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x40 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x40 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x40 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x40 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x40 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x40 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x44 "TG15CTRL,MibSPI Transfer Group Control Register 15"
|
|
bitfld.long 0x44 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x44 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x44 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x44 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x44 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x44 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x44 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x44 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
group.long 0xD8++0x1F
|
|
line.long 0x0 "DMA0CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x0 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x0 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x0 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x0 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x0 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x4 "DMA1CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x4 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x4 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x4 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x4 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x4 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x4 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x4 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x8 "DMA2CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x8 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x8 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x8 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x8 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x8 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x8 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0xC "DMA3CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0xC 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0xC 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0xC 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0xC 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0xC 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0xC 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0xC 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "DMA4CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x10 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x10 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x10 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x10 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x10 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x10 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x14 "DMA5CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x14 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x14 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x14 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x14 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x14 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x14 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x14 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x18 "DMA6CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x18 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x18 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x18 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x18 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x18 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x18 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x1C "DMA7CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x1C 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x1C 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x1C 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x1C 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x1C 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x1C 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x1C 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xF8++0x1F
|
|
line.long 0x0 "DMA0 COUNT,MibSPI DMA0 COUNT Register"
|
|
hexmask.long.word 0x0 16.--31. 1. " ICOUNT0 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x0 0.--15. 1. " COUNT0 ,The actual number of remaining DMA transfers"
|
|
line.long 0x4 "DMA1 COUNT,MibSPI DMA1 COUNT Register"
|
|
hexmask.long.word 0x4 16.--31. 1. " ICOUNT1 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x4 0.--15. 1. " COUNT1 ,The actual number of remaining DMA transfers"
|
|
line.long 0x8 "DMA2 COUNT,MibSPI DMA2 COUNT Register"
|
|
hexmask.long.word 0x8 16.--31. 1. " ICOUNT2 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x8 0.--15. 1. " COUNT2 ,The actual number of remaining DMA transfers"
|
|
line.long 0xC "DMA3 COUNT,MibSPI DMA3 COUNT Register"
|
|
hexmask.long.word 0xC 16.--31. 1. " ICOUNT3 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0xC 0.--15. 1. " COUNT3 ,The actual number of remaining DMA transfers"
|
|
line.long 0x10 "DMA4 COUNT,MibSPI DMA4 COUNT Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " ICOUNT4 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT4 ,The actual number of remaining DMA transfers"
|
|
line.long 0x14 "DMA5 COUNT,MibSPI DMA5 COUNT Register"
|
|
hexmask.long.word 0x14 16.--31. 1. " ICOUNT5 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT5 ,The actual number of remaining DMA transfers"
|
|
line.long 0x18 "DMA6 COUNT,MibSPI DMA6 COUNT Register"
|
|
hexmask.long.word 0x18 16.--31. 1. " ICOUNT6 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT6 ,The actual number of remaining DMA transfers"
|
|
line.long 0x1C "DMA7 COUNT,MibSPI DMA7 COUNT Register"
|
|
hexmask.long.word 0x1C 16.--31. 1. " ICOUNT7 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT7 ,The actual number of remaining DMA transfers"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "DMACNTLEN,MibSPI DMACNTLEN Register"
|
|
bitfld.long 0x00 0. " LARGECOUNT ,Counters select" "DMAxCTRL,DMAxCOUNT"
|
|
endif
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "UERRCTRL,Uncorrectable Parity Error Control Register"
|
|
bitfld.long 0x00 8. " PTESTEN ,Parity memory test enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " EDEN ,Error detection enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "UERRSTAT,Uncorrectable Parity Error Status Register"
|
|
eventfld.long 0x00 1. " EDFLG1 ,Uncorrectable parity error detection flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " EDFLG0 ,Uncorrectable parity error detection flag" "Not occurred,Occurred"
|
|
hgroup.long 0x128++0x03
|
|
hide.long 0x00 "UERRADDR1,Uncorrectable Parity Error Address Register"
|
|
in
|
|
hgroup.long 0x12C++0x03
|
|
hide.long 0x00 "UERRADDR0,Uncorrectable Parity Error Address Register"
|
|
in
|
|
hgroup.long 0x130++0x03
|
|
hide.long 0x00 "RXOVRN_BUF_ADDR,Receive RAM Overrun Buffer Address Register"
|
|
in
|
|
sif cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS0232")
|
|
if (((per.l.be(ad:0xFFF7F400+0x134))&0x2)==0x2)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
sif cpuis("TMS570LS0232")
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],?..."
|
|
else
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
endif
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
bitfld.long 0x00 0. " RXP_ENA ,Enable analog loopback through the receive pin" "Transmit,Receive"
|
|
else
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
sif cpuis("TMS570LS0232")
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],?..."
|
|
else
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
endif
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0xFFF7F400+0x134))&0x2)==0x2)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
bitfld.long 0x00 0. " RXP_ENA ,Enable analog loopback through the receive pin" "Transmit,Receive"
|
|
else
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
endif
|
|
endif
|
|
sif (cpu()=="TMS570LC4357"||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
width 21.
|
|
newline
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "EXTENDED_PRESCALE_1, SPI Extended Prescale Register 1"
|
|
hexmask.long.word 0x00 16.--26. 1. " EPRESCALE_FMT1 , Extended Prescale value for SPIFMT1"
|
|
hexmask.long.word 0x00 0.--10. 1. " EPRESCALE_FMT0 , Extended Prescale value for SPIFMT0"
|
|
line.long 0x04 "EXTENDED_PRESCALE_2, SPI Extended Prescale Register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " EPRESCALE_FMT3 , Extended Prescale value for SPIFMT3"
|
|
hexmask.long.word 0x04 0.--10. 1. " EPRESCALE_FMT2 , Extended Prescale value for SPIFMT2"
|
|
endif
|
|
sif !cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*")
|
|
sif (cpu()=="TMS570LC4357"||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*"))
|
|
sif cpuis("TMS570LC4357")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "ECCDIAG_CTRL, ECC Diagnostic Control register"
|
|
bitfld.long 0x00 0.--3. " ECCDIAG_EN , ECC Diagnostic mode Enable Key bits" "Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
endif
|
|
if ((per.l(ad:0xFFF7F400+0x140)&0x5)==0x5)
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "ECCDIAG_STAT, ECC Diagnostic Status register"
|
|
eventfld.long 0x00 17. " DEFLG[1] , Double bit Error is detected for RXRAM" "No error,Error"
|
|
eventfld.long 0x00 16. " DEFLG[0] , Double bit Error is detected for TXRAM" "No error,Error"
|
|
eventfld.long 0x00 1. " SEFLG[1] , Single bit Error is detected for RXRAM" "No error,Error"
|
|
eventfld.long 0x00 0. " SEFLG[0] , Single bit Error is detected for TXRAM" "No error,Error"
|
|
else
|
|
hgroup.long 0x144++0x03
|
|
hide.long 0x00 "ECCDIAG_STAT, ECC Diagnostic Status register"
|
|
in
|
|
endif
|
|
hgroup.long 0x148++0x03
|
|
hide.long 0x00 "SBERRADDR1, Single Bit Error Address Register - RXRAM"
|
|
in
|
|
hgroup.long 0x14C++0x03
|
|
hide.long 0x00 "SBERRADDR0, Single Bit Error Address Register - TXRAM"
|
|
in
|
|
endif
|
|
endif
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "MibSPI2"
|
|
base ad:0xFFF7F600
|
|
width 17.
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SPIGCR0,SPI Global Control Register 0"
|
|
bitfld.long 0x00 0. " NRESET ,Reset bit for the module" "No reset,Reset"
|
|
group.long 0x04++0x0F
|
|
line.long 0x00 "SPIGCR1,SPI Global Control Register 1"
|
|
bitfld.long 0x00 24. " SPIEN ,SPI enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " POWERDOWN ,SPI state machine enters a power-down state" "No power-down,Power-down"
|
|
newline
|
|
bitfld.long 0x00 1. " CLKMOD ,Clock mode" "External,Internally"
|
|
bitfld.long 0x00 0. " MASTER ,SPISIMO/SPISOMI pin direction determination" "Input/output,Output/input"
|
|
line.long 0x04 "SPIINT0,SPI Interrupt Register"
|
|
bitfld.long 0x04 24. " ENABLEHIGHZ ,SPIENA pin high-impedance enable" "Inactive,Active"
|
|
bitfld.long 0x04 16. " DMAREQEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " TXINTENA ,TX interrupt flag enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 8. " RXINTENA ,RX interrupt flag enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " RXOVRNINTENA ,Overrun interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " BITERRENA ,Enables interrupt on bit error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 3. " DESYNCENA ,Enables interrupt on desynchronized slave" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " PARERRENA ,Enables interrupt-on-parity-error" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " TIMEOUTENA ,Enables interrupt on ENA signal time-out" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 0. " DLENERRENA ,Data length error interrupt enable" "Disabled,Enabled"
|
|
line.long 0x08 "SPILVL,SPI Interrupt Level Register"
|
|
bitfld.long 0x08 9. " TXINTLVL ,Transmit interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1"
|
|
sif !cpuis("TMS570LS0232")
|
|
bitfld.long 0x08 6. " RXOVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1"
|
|
endif
|
|
newline
|
|
bitfld.long 0x08 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 3. " DESYNCLVL ,Desynchronized slave interrupt level (master mode only)" "INT0,INT1"
|
|
bitfld.long 0x08 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 1. " TIMEOUTLVL ,SPIENA pin time-out interrupt level" "INT0,INT1"
|
|
bitfld.long 0x08 0. " DLENERRLVL ,Data length error interrupt level (line) select" "INT0,INT1"
|
|
line.long 0x0C "SPIFLG,SPI Flag Register"
|
|
bitfld.long 0x0C 24. " BUFINITACTIVE ,Indicates the status of multi-buffer initialization process" "Completed,Not completed"
|
|
bitfld.long 0x0C 9. " TXINTFLG ,Transmitter-empty interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 8. " RXINTFLG ,Receiver-full interrupt flag" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x0C 6. " RXOVRNINTFLG ,Overrun interrupt enable" "Disabled,Enabled"
|
|
eventfld.long 0x0C 4. " BITERRFLG ,Enables interrupt on bit error" "Disabled,Enabled"
|
|
eventfld.long 0x0C 3. " DESYNCFLG ,Enables interrupt on desynchronized slave" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x0C 2. " PARITYERRFLG ,Enables interrupt-on-parity-error" "No error,Error"
|
|
eventfld.long 0x0C 1. " TIMEOUTFLG ,Enables interrupt on ENA signal time-out" "No interrupt,Interrupt"
|
|
eventfld.long 0x0C 0. " DLENERRFLG ,Data length error interrupt enable" "No interrupt,Interrupt"
|
|
group.long 0x14++0x23
|
|
line.long 0x00 "SPIPC0,SPI Pin Control Register 0"
|
|
sif !cpuis("TMS570LS0232")&&!cpuis("TMS570LS0332")&&!cpuis("TMS570LS0432")
|
|
bitfld.long 0x00 31. " SOMIFUN7 ,SPISOMI[7] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 30. " SOMIFUN6 ,SPISOMI[6] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 29. " SOMIFUN5 ,SPISOMI[5] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 28. " SOMIFUN4 ,SPISOMI[4] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 27. " SOMIFUN3 ,SPISOMI[3] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 26. " SOMIFUN2 ,SPISOMI[2] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 25. " SOMIFUN1 ,SPISOMI[1] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 24. " SOMIFUN0 ,SPISOMI[0] pin function (mirror of bit 11)" "GIO,SPI"
|
|
bitfld.long 0x00 23. " SIMOFUN7 ,SPISIMO[7] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 22. " SIMOFUN6 ,SPISIMO[6] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 21. " SIMOFUN5 ,SPISIMO[5] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 20. " SIMOFUN4 ,SPISIMO[4] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 19. " SIMOFUN3 ,SPISIMO[3] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 18. " SIMOFUN2 ,SPISIMO[2] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 17. " SIMOFUN1 ,SPISIMO[1] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 16. " SIMOFUN0 ,SPISIMO[0] pin function (mirror of bit 10)" "GIO,SPI"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 11. " SOMIFUN0 ,SPISOMI[0] pin function" "GIO,SPI"
|
|
bitfld.long 0x00 10. " SIMOFUN0 ,SPISIMO[0] pin function" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 9. " CLKFUN ,SPI clock function" "GIO,SPI"
|
|
bitfld.long 0x00 8. " ENAFUN ,SPIENA function" "GIO,SPI"
|
|
bitfld.long 0x00 7. " SCSFUN7 ,SPISCS7 function 7" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 6. " SCSFUN6 ,SPISCS6 function 6" "GIO,SPI"
|
|
bitfld.long 0x00 5. " SCSFUN5 ,SPISCS5 function 5" "GIO,SPI"
|
|
bitfld.long 0x00 4. " SCSFUN4 ,SPISCS4 function 4" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 3. " SCSFUN3 ,SPISCS3 function 3" "GIO,SPI"
|
|
bitfld.long 0x00 2. " SCSFUN2 ,SPISCS2 function 2" "GIO,SPI"
|
|
bitfld.long 0x00 1. " SCSFUN1 ,SPISCS1 function 1" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x00 0. " SCSFUN0 ,SPISCS0 function 0" "GIO,SPI"
|
|
line.long 0x04 "SPIPC1,SPI Pin Control Register 1"
|
|
bitfld.long 0x04 31. " SOMIDIR7 ,SPISOMI[7] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 30. " SOMIDIR6 ,SPISOMI[6] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 29. " SOMIDIR5 ,SPISOMI[5] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 28. " SOMIDIR4 ,SPISOMI[4] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 27. " SOMIDIR3 ,SPISOMI[3] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 26. " SOMIDIR2 ,SPISOMI[2] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 25. " SOMIDIR1 ,SPISOMI[1] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 24. " SOMIDIR0 ,SPISOMI[0] pin direction (mirror of bit 11)" "GIO,SPI"
|
|
bitfld.long 0x04 23. " SIMODIR7 ,SPISIMO[7] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 22. " SIMODIR6 ,SPISIMO[6] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 21. " SIMODIR5 ,SPISIMO[5] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 20. " SIMODIR4 ,SPISIMO[4] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 19. " SIMODIR3 ,SPISIMO[3] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 18. " SIMODIR2 ,SPISIMO[2] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 17. " SIMODIR1 ,SPISIMO[1] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 16. " SIMODIR0 ,SPISIMO[0] pin direction (mirror of bit 10)" "GIO,SPI"
|
|
bitfld.long 0x04 11. " SOMIDIR0 ,SPISOMI[0] pin direction" "GIO,SPI"
|
|
bitfld.long 0x04 10. " SIMODIR0 ,SPISIMO[0] pin direction" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 9. " CLKDIR ,SPI clock direction" "GIO,SPI"
|
|
bitfld.long 0x04 8. " ENADIR ,SPIENA direction" "GIO,SPI"
|
|
bitfld.long 0x04 7. " SCSDIR7 ,SPISCS7 direction 7" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 6. " SCSDIR6 ,SPISCS6 direction 6" "GIO,SPI"
|
|
bitfld.long 0x04 5. " SCSDIR5 ,SPISCS5 direction 5" "GIO,SPI"
|
|
bitfld.long 0x04 4. " SCSDIR4 ,SPISCS4 direction 4" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 3. " SCSDIR3 ,SPISCS3 direction 3" "GIO,SPI"
|
|
bitfld.long 0x04 2. " SCSDIR2 ,SPISCS2 direction 2" "GIO,SPI"
|
|
bitfld.long 0x04 1. " SCSDIR1 ,SPISCS1 direction 1" "GIO,SPI"
|
|
newline
|
|
bitfld.long 0x04 0. " SCSDIR0 ,SPISCS0 direction 0" "GIO,SPI"
|
|
line.long 0x08 "SPIPC2,SPI Pin Control Register 2"
|
|
bitfld.long 0x08 31. " SOMIDIN7 ,SPISOMI[7] data in" "0,1"
|
|
bitfld.long 0x08 30. " SOMIDIN6 ,SPISOMI[6] data in" "0,1"
|
|
bitfld.long 0x08 29. " SOMIDIN5 ,SPISOMI[5] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 28. " SOMIDIN4 ,SPISOMI[4] data in" "0,1"
|
|
bitfld.long 0x08 27. " SOMIDIN3 ,SPISOMI[3] data in" "0,1"
|
|
bitfld.long 0x08 26. " SOMIDIN2 ,SPISOMI[2] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 25. " SOMIDIN1 ,SPISOMI[1] data in" "0,1"
|
|
bitfld.long 0x08 24. " SOMIDIN0 ,SPISOMI[0] data in (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x08 23. " SIMODIN7 ,SPISIMO[7] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 22. " SIMODIN6 ,SPISIMO[6] data in" "0,1"
|
|
bitfld.long 0x08 21. " SIMODIN5 ,SPISIMO[5] data in" "0,1"
|
|
bitfld.long 0x08 20. " SIMODIN4 ,SPISIMO[4] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 19. " SIMODIN3 ,SPISIMO[3] data in" "0,1"
|
|
bitfld.long 0x08 18. " SIMODIN2 ,SPISIMO[2] data in" "0,1"
|
|
bitfld.long 0x08 17. " SIMODIN1 ,SPISIMO[1] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 16. " SIMODIN0 ,SPISIMO[0] data in (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x08 11. " SOMIDIN0 ,SPISOMI[0] data in" "0,1"
|
|
bitfld.long 0x08 10. " SIMODIN0 ,SPISIMO[0] data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 9. " CLKDIN ,SPI clock data in" "0,1"
|
|
bitfld.long 0x08 8. " ENADIN ,SPIENA data in" "0,1"
|
|
bitfld.long 0x08 7. " SCSDIN7 ,SPISCS7 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 6. " SCSDIN6 ,SPISCS6 data in" "0,1"
|
|
bitfld.long 0x08 5. " SCSDIN5 ,SPISCS5 data in" "0,1"
|
|
bitfld.long 0x08 4. " SCSDIN4 ,SPISCS4 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 3. " SCSDIN3 ,SPISCS3 data in" "0,1"
|
|
bitfld.long 0x08 2. " SCSDIN2 ,SPISCS2 data in" "0,1"
|
|
bitfld.long 0x08 1. " SCSDIN1 ,SPISCS1 data in" "0,1"
|
|
newline
|
|
bitfld.long 0x08 0. " SCSDIN0 ,SPISCS0 direction 0" "0,1"
|
|
line.long 0x0C "SPIPC3,SPI Pin Control Register 3"
|
|
bitfld.long 0x0C 31. " SOMIDOUT7 ,SPISOMI[7] data out write" "0,1"
|
|
bitfld.long 0x0C 30. " SOMIDOUT6 ,SPISOMI[6] data out write" "0,1"
|
|
bitfld.long 0x0C 29. " SOMIDOUT5 ,SPISOMI[5] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 28. " SOMIDOUT4 ,SPISOMI[4] data out write" "0,1"
|
|
bitfld.long 0x0C 27. " SOMIDOUT3 ,SPISOMI[3] data out write" "0,1"
|
|
bitfld.long 0x0C 26. " SOMIDOUT2 ,SPISOMI[2] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 25. " SOMIDOUT1 ,SPISOMI[1] data out write" "0,1"
|
|
bitfld.long 0x0C 24. " SOMIDOUT0 ,SPISOMI[0] data out write (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x0C 23. " SIMODOUT7 ,SPISIMO[7] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 22. " SIMODOUT6 ,SPISIMO[6] data out write" "0,1"
|
|
bitfld.long 0x0C 21. " SIMODOUT5 ,SPISIMO[5] data out write" "0,1"
|
|
bitfld.long 0x0C 20. " SIMODOUT4 ,SPISIMO[4] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 19. " SIMODOUT3 ,SPISIMO[3] data out write" "0,1"
|
|
bitfld.long 0x0C 18. " SIMODOUT2 ,SPISIMO[2] data out write" "0,1"
|
|
bitfld.long 0x0C 17. " SIMODOUT1 ,SPISIMO[1] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 16. " SIMODOUT0 ,SPISIMO[0] data out write (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x0C 11. " SOMIDOUT0 ,SPISOMI[0] data out write" "0,1"
|
|
bitfld.long 0x0C 10. " SIMODOUT0 ,SPISIMO[0] data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 9. " CLKDOUT ,SPI clock data out write" "0,1"
|
|
bitfld.long 0x0C 8. " ENADOUT ,SPIENA data out write" "0,1"
|
|
bitfld.long 0x0C 7. " SCSDOUT7 ,SPISCS7 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 6. " SCSDOUT6 ,SPISCS6 data out write" "0,1"
|
|
bitfld.long 0x0C 5. " SCSDOUT5 ,SPISCS5 data out write" "0,1"
|
|
bitfld.long 0x0C 4. " SCSDOUT4 ,SPISCS4 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 3. " SCSDOUT3 ,SPISCS3 data out write" "0,1"
|
|
bitfld.long 0x0C 2. " SCSDOUT2 ,SPISCS2 data out write" "0,1"
|
|
bitfld.long 0x0C 1. " SCSDOUT1 ,SPISCS1 data out write" "0,1"
|
|
newline
|
|
bitfld.long 0x0C 0. " SCSDOUT0 ,SPISCS0 data out write" "0,1"
|
|
line.long 0x10 "SPIPC4,SPI Pin Control Register 4"
|
|
bitfld.long 0x10 31. " SOMISET7 ,SPISOMI[7] data out set" "0,1"
|
|
bitfld.long 0x10 30. " SOMISET6 ,SPISOMI[6] data out set" "0,1"
|
|
bitfld.long 0x10 29. " SOMISET5 ,SPISOMI[5] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 28. " SOMISET4 ,SPISOMI[4] data out set" "0,1"
|
|
bitfld.long 0x10 27. " SOMISET3 ,SPISOMI[3] data out set" "0,1"
|
|
bitfld.long 0x10 26. " SOMISET2 ,SPISOMI[2] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 25. " SOMISET1 ,SPISOMI[1] data out set" "0,1"
|
|
bitfld.long 0x10 24. " SOMISET0 ,SPISOMI[0] data out set (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x10 23. " SIMOSET7 ,SPISIMO[7] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 22. " SIMOSET6 ,SPISIMO[6] data out set" "0,1"
|
|
bitfld.long 0x10 21. " SIMOSET5 ,SPISIMO[5] data out set" "0,1"
|
|
bitfld.long 0x10 20. " SIMOSET4 ,SPISIMO[4] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 19. " SIMOSET3 ,SPISIMO[3] data out set" "0,1"
|
|
bitfld.long 0x10 18. " SIMOSET2 ,SPISIMO[2] data out set" "0,1"
|
|
bitfld.long 0x10 17. " SIMOSET1 ,SPISIMO[1] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 16. " SIMOSET0 ,SPISIMO[0] data out set (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x10 11. " SOMISET0 ,SPISOMI[0] data out set" "0,1"
|
|
bitfld.long 0x10 10. " SIMOSET0 ,SPISIMO[0] data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. " CLKSET ,SPI clock data out set" "0,1"
|
|
bitfld.long 0x10 8. " ENASET ,SPIENA data out set" "0,1"
|
|
bitfld.long 0x10 7. " SCSSET7 ,SPISCS7 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. " SCSSET6 ,SPISCS6 data out set" "0,1"
|
|
bitfld.long 0x10 5. " SCSSET5 ,SPISCS5 data out set" "0,1"
|
|
bitfld.long 0x10 4. " SCSSET4 ,SPISCS4 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. " SCSSET3 ,SPISCS3 data out set" "0,1"
|
|
bitfld.long 0x10 2. " SCSSET2 ,SPISCS2 data out set" "0,1"
|
|
bitfld.long 0x10 1. " SCSSET1 ,SPISCS1 data out set" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. " SCSSET0 ,SPISCS0 data out set" "0,1"
|
|
line.long 0x14 "SPIPC5,SPI Pin Control Register 5"
|
|
bitfld.long 0x14 31. " SOMICLR7 ,SPISOMI[7] data out clear" "0,1"
|
|
bitfld.long 0x14 30. " SOMICLR6 ,SPISOMI[6] data out clear" "0,1"
|
|
bitfld.long 0x14 29. " SOMICLR5 ,SPISOMI[5] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 28. " SOMICLR4 ,SPISOMI[4] data out clear" "0,1"
|
|
bitfld.long 0x14 27. " SOMICLR3 ,SPISOMI[3] data out clear" "0,1"
|
|
bitfld.long 0x14 26. " SOMICLR2 ,SPISOMI[2] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 25. " SOMICLR1 ,SPISOMI[1] data out clear" "0,1"
|
|
bitfld.long 0x14 24. " SOMICLR0 ,SPISOMI[0] data out clear (mirror of bit 11)" "0,1"
|
|
bitfld.long 0x14 23. " SIMOCLR7 ,SPISIMO[7] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 22. " SIMOCLR6 ,SPISIMO[6] data out clear" "0,1"
|
|
bitfld.long 0x14 21. " SIMOCLR5 ,SPISIMO[5] data out clear" "0,1"
|
|
bitfld.long 0x14 20. " SIMOCLR4 ,SPISIMO[4] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 19. " SIMOCLR3 ,SPISIMO[3] data out clear" "0,1"
|
|
bitfld.long 0x14 18. " SIMOCLR2 ,SPISIMO[2] data out clear" "0,1"
|
|
bitfld.long 0x14 17. " SIMOCLR1 ,SPISIMO[1] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 16. " SIMOCLR0 ,SPISIMO[0] data out clear (mirror of bit 10)" "0,1"
|
|
bitfld.long 0x14 11. " SOMICLR0 ,SPISOMI[0] data out clear" "0,1"
|
|
bitfld.long 0x14 10. " SIMOCLR0 ,SPISIMO[0] data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 9. " CLKCLR ,SPI clock data out clear" "0,1"
|
|
bitfld.long 0x14 8. " ENACLR ,SPIENA data out clear" "0,1"
|
|
bitfld.long 0x14 7. " SCSCLR7 ,SPISCS7 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. " SCSCLR6 ,SPISCS6 data out clear" "0,1"
|
|
bitfld.long 0x14 5. " SCSCLR5 ,SPISCS5 data out clear" "0,1"
|
|
bitfld.long 0x14 4. " SCSCLR4 ,SPISCS4 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. " SCSCLR3 ,SPISCS3 data out clear" "0,1"
|
|
bitfld.long 0x14 2. " SCSCLR2 ,SPISCS2 data out clear" "0,1"
|
|
bitfld.long 0x14 1. " SCSCLR1 ,SPISCS1 data out clear" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. " SCSCLR0 ,SPISCS0 data out clear" "0,1"
|
|
line.long 0x18 "SPIPC6,SPI Pin Control Register 6"
|
|
bitfld.long 0x18 31. " SOMIPDR7 ,SPISOMI[7] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " SOMIPDR6 ,SPISOMI[6] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " SOMIPDR5 ,SPISOMI[5] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 28. " SOMIPDR4 ,SPISOMI[4] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " SOMIPDR3 ,SPISOMI[3] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 26. " SOMIPDR2 ,SPISOMI[2] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 25. " SOMIPDR1 ,SPISOMI[1] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 24. " SOMIPDR0 ,SPISOMI[0] open drain enable (mirror of bit 11)" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " SIMOPDR7 ,SPISIMO[7] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 22. " SIMOPDR6 ,SPISIMO[6] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 21. " SIMOPDR5 ,SPISIMO[5] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 20. " SIMOPDR4 ,SPISIMO[4] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 19. " SIMOPDR3 ,SPISIMO[3] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 18. " SIMOPDR2 ,SPISIMO[2] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 17. " SIMOPDR1 ,SPISIMO[1] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 16. " SIMOPDR0 ,SPISIMO[0] open drain enable (mirror of bit 10)" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " SOMIPDR0 ,SPISOMI[0] open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 10. " SIMOPDR0 ,SPISIMO[0] open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 9. " CLKPDR ,SPI clock open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 8. " ENAPDR ,SPIENA open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " SCSPDR7 ,SPISCS7 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 6. " SCSPDR6 ,SPISCS6 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 5. " SCSPDR5 ,SPISCS5 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 4. " SCSPDR4 ,SPISCS4 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 3. " SCSPDR3 ,SPISCS3 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " SCSPDR2 ,SPISCS2 open drain enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 1. " SCSPDR1 ,SPISCS1 open drain enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 0. " SCSPDR0 ,SPISCS0 open drain enable" "Disabled,Enabled"
|
|
line.long 0x1C "SPIPC7,SPI Pin Control Register 7"
|
|
bitfld.long 0x1C 31. " SOMIPDIS7 ,SPISOMI[7] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 30. " SOMIPDIS6 ,SPISOMI[6] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 29. " SOMIPDIS5 ,SPISOMI[5] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 28. " SOMIPDIS4 ,SPISOMI[4] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 27. " SOMIPDIS3 ,SPISOMI[3] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 26. " SOMIPDIS2 ,SPISOMI[2] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 25. " SOMIPDIS1 ,SPISOMI[1] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 24. " SOMIPDIS0 ,SPISOMI[0] pull control enable/disable (mirror of bit 11)" "No,Yes"
|
|
bitfld.long 0x1C 23. " SIMOPDIS7 ,SPISIMO[7] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 22. " SIMOPDIS6 ,SPISIMO[6] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 21. " SIMOPDIS5 ,SPISIMO[5] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 20. " SIMOPDIS4 ,SPISIMO[4] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 19. " SIMOPDIS3 ,SPISIMO[3] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 18. " SIMOPDIS2 ,SPISIMO[2] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 17. " SIMOPDIS1 ,SPISIMO[1] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 16. " SIMOPDIS0 ,SPISIMO[0] pull control enable/disable (mirror of bit 10)" "No,Yes"
|
|
bitfld.long 0x1C 11. " SOMIPDIS0 ,SPISOMI[0] pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 10. " SIMOPDIS0 ,SPISIMO[0] pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 9. " CLKPDIS ,SPI clock pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 8. " ENAPDIS ,SPIENA pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 7. " SCSPDIS7 ,SPISCS7 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 6. " SCSPDIS6 ,SPISCS6 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 5. " SCSPDIS5 ,SPISCS5 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 4. " SCSPDIS4 ,SPISCS4 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 3. " SCSPDIS3 ,SPISCS3 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 2. " SCSPDIS2 ,SPISCS2 pull control enable/disable" "No,Yes"
|
|
bitfld.long 0x1C 1. " SCSPDIS1 ,SPISCS1 pull control enable/disable" "No,Yes"
|
|
newline
|
|
bitfld.long 0x1C 0. " SCSPDIS0 ,SPISCS0 pull control enable/disable" "No,Yes"
|
|
line.long 0x20 "SPIPC8,SPI Pin Control Register 8"
|
|
bitfld.long 0x20 31. " SOMIPSEL7 ,SPISOMI[7] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 30. " SOMIPSEL6 ,SPISOMI[6] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 29. " SOMIPSEL5 ,SPISOMI[5] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 28. " SOMIPSEL4 ,SPISOMI[4] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 27. " SOMIPSEL3 ,SPISOMI[3] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 26. " SOMIPSEL2 ,SPISOMI[2] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 25. " SOMIPSEL1 ,SPISOMI[1] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 24. " SOMIPSEL0 ,SPISOMI[0] pull select (mirror of bit 11)" "Pull down,Pull up"
|
|
bitfld.long 0x20 23. " SIMOPSEL7 ,SPISIMO[7] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 22. " SIMOPSEL6 ,SPISIMO[6] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 21. " SIMOPSEL5 ,SPISIMO[5] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 20. " SIMOPSEL4 ,SPISIMO[4] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 19. " SIMOPSEL3 ,SPISIMO[3] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 18. " SIMOPSEL2 ,SPISIMO[2] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 17. " SIMOPSEL1 ,SPISIMO[1] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 16. " SIMOPSEL0 ,SPISIMO[0] pull select (mirror of bit 10)" "Pull down,Pull up"
|
|
bitfld.long 0x20 11. " SOMIPSEL0 ,SPISOMI[0] pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 10. " SIMOPSEL0 ,SPISIMO[0] pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 9. " CLKPSEL ,SPI clock pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 8. " ENAPSEL ,SPIENA pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 7. " SCSPSEL7 ,SPISCS7 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 6. " SCSPSEL6 ,SPISCS6 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 5. " SCSPSEL5 ,SPISCS5 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 4. " SCSPSEL4 ,SPISCS4 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 3. " SCSPSEL3 ,SPISCS3 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 2. " SCSPSEL2 ,SPISCS2 pull select" "Pull down,Pull up"
|
|
bitfld.long 0x20 1. " SCSPSEL1 ,SPISCS1 pull select" "Pull down,Pull up"
|
|
newline
|
|
bitfld.long 0x20 0. " SCSPSEL0 ,SPISCS0 pull select" "Pull down,Pull up"
|
|
group.long 0x38++0x07
|
|
line.long 0x00 "SPIDAT0,SPI Transmit Data Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,SPI transmit data"
|
|
line.long 0x04 "SPIDAT1,Transmit Data Register 1"
|
|
bitfld.long 0x04 28. " CSHOLD ,Chip select hold mode" "Inactive,Active"
|
|
bitfld.long 0x04 26. " WDEL ,Enable the delay counter at the end of the current transaction" "No delay,After transaction"
|
|
bitfld.long 0x04 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x04 16.--23. 1. " CSNR ,Chip select number"
|
|
hexmask.long.word 0x04 0.--15. 1. " TXDATA ,Transfer data"
|
|
hgroup.long 0x40++0x03
|
|
hide.long 0x00 "SPIBUF,SPI Receive Buffer Register"
|
|
in
|
|
rgroup.long 0x44++0x03
|
|
line.long 0x00 "SPIEMU,SPI Emulation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " EMU_RXDATA ,SPI receive data"
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " C2TDELAY ,Chip-select-active to transmit-start delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " T2EDELAY ,Transmit-data-finished to ENA-pin-inactive time-out"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " C2EDELAY ,Chip-select-active to ENA-signal-active time-out"
|
|
else
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " C2TDELAY ,Chip-select-active to transmit-start delay"
|
|
hexmask.long.byte 0x00 16.--23. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
hexmask.long.byte 0x00 8.--15. 1. " T2EDELAY ,Transmit-data-finished to ENA-pin-inactive time-out"
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " C2EDELAY ,Chip-select-active to ENA-signal-active time-out"
|
|
endif
|
|
group.long 0x4C++0x13
|
|
line.long 0x00 "SPIDEF,SPI Default Chip Select Register"
|
|
bitfld.long 0x00 7. " CSDEF7 ,Chip select default pattern 7" "0,1"
|
|
bitfld.long 0x00 6. " CSDEF6 ,Chip select default pattern 6" "0,1"
|
|
bitfld.long 0x00 5. " CSDEF5 ,Chip select default pattern 5" "0,1"
|
|
newline
|
|
bitfld.long 0x00 4. " CSDEF4 ,Chip select default pattern 4" "0,1"
|
|
bitfld.long 0x00 3. " CSDEF3 ,Chip select default pattern 3" "0,1"
|
|
bitfld.long 0x00 2. " CSDEF2 ,Chip select default pattern 2" "0,1"
|
|
newline
|
|
bitfld.long 0x00 1. " CSDEF1 ,Chip select default pattern 1" "0,1"
|
|
bitfld.long 0x00 0. " CSDEF0 ,Chip select default pattern 0" "0,1"
|
|
line.long 0x4 "SPIFMT0,SPI Data Format Register 0"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x4 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 0"
|
|
else
|
|
bitfld.long 0x4 24.--29. " WDELAY ,Delay in between transmissions for data format 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x4 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x4 22. " PARITYENA ,Parity enable for data format 0" "Disabled,Enabled"
|
|
bitfld.long 0x4 21. " WAITENA ,The master waits for the ENA signal from slave for data format 0" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x4 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x4 19. " HDUPLEX_ENA0 ,Half Duplex transfer mode enable for Data Format 0" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x4 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x4 17. " POLARITY ,SPI data format 0 clock polarity" "Low,High"
|
|
bitfld.long 0x4 16. " PHASE ,SPI data format 0 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRESCALE ,SPI data format 0 prescaler"
|
|
bitfld.long 0x4 0.--4. " CHARLEN ,SPI data format 0 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x8 "SPIFMT1,SPI Data Format Register 1"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x8 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 1"
|
|
else
|
|
bitfld.long 0x8 24.--29. " WDELAY ,Delay in between transmissions for data format 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x8 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x8 22. " PARITYENA ,Parity enable for data format 1" "Disabled,Enabled"
|
|
bitfld.long 0x8 21. " WAITENA ,The master waits for the ENA signal from slave for data format 1" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x8 19. " HDUPLEX_ENA1 ,Half Duplex transfer mode enable for Data Format 1" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x8 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x8 17. " POLARITY ,SPI data format 1 clock polarity" "Low,High"
|
|
bitfld.long 0x8 16. " PHASE ,SPI data format 1 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRESCALE ,SPI data format 1 prescaler"
|
|
bitfld.long 0x8 0.--4. " CHARLEN ,SPI data format 1 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0xC "SPIFMT2,SPI Data Format Register 2"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0xC 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 2"
|
|
else
|
|
bitfld.long 0xC 24.--29. " WDELAY ,Delay in between transmissions for data format 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0xC 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0xC 22. " PARITYENA ,Parity enable for data format 2" "Disabled,Enabled"
|
|
bitfld.long 0xC 21. " WAITENA ,The master waits for the ENA signal from slave for data format 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0xC 19. " HDUPLEX_ENA2 ,Half Duplex transfer mode enable for Data Format 2" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0xC 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0xC 17. " POLARITY ,SPI data format 2 clock polarity" "Low,High"
|
|
bitfld.long 0xC 16. " PHASE ,SPI data format 2 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRESCALE ,SPI data format 2 prescaler"
|
|
bitfld.long 0xC 0.--4. " CHARLEN ,SPI data format 2 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
line.long 0x10 "SPIFMT3,SPI Data Format Register 3"
|
|
sif (cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
hexmask.long.byte 0x10 24.--31. 1. " WDELAY ,Delay in between transmissions for data format 3"
|
|
else
|
|
bitfld.long 0x10 24.--29. " WDELAY ,Delay in between transmissions for data format 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
bitfld.long 0x10 23. " PARPOL ,Parity polarity: even or odd" "Even,Odd"
|
|
newline
|
|
bitfld.long 0x10 22. " PARITYENA ,Parity enable for data format 3" "Disabled,Enabled"
|
|
bitfld.long 0x10 21. " WAITENA ,The master waits for the ENA signal from slave for data format 3" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 20. " SHIFTDIR ,Shift direction for data format $" "MSB,LSB"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x10 19. " HDUPLEX_ENA3 ,Half Duplex transfer mode enable for Data Format 3" "Normal,RX/TX"
|
|
endif
|
|
newline
|
|
bitfld.long 0x10 18. " DISCSTIMERS ,Disable chip-select timers for this format" "No,Yes"
|
|
newline
|
|
bitfld.long 0x10 17. " POLARITY ,SPI data format 3 clock polarity" "Low,High"
|
|
bitfld.long 0x10 16. " PHASE ,SPI data format 3 clock delay" "Disabled,Enabled"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRESCALE ,SPI data format 3 prescaler"
|
|
bitfld.long 0x10 0.--4. " CHARLEN ,SPI data format 3 data-word length" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
hgroup.long 0x60++0x03
|
|
hide.long 0x00 "TGINTVECT0,SPI Interrupt Vector Register 0 / MibSPI Transfer Group Interrupt Vector Register 0"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "TGINTVECT1,SPI Interrupt Vector Register 1 / MibSPI Transfer Group Interrupt Vector Register 1"
|
|
in
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
group.long 0x6C++0x07
|
|
line.long 0x00 "SPIPMCTRL,SPI Parallel/Modulo Mode Control Register"
|
|
bitfld.long 0x00 29. " MODCLKPOL3 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 26.--28. " MMODE3 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 24.--25. " PMODE3 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 21. " MODCLKPOL2 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 18.--20. " MMODE2 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 16.--17. " PMODE2 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 13. " MODCLKPOL1 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 10.--12. " MMODE1 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 8.--9. " PMODE1 ,Parallel mode data lines" "1,2,4,8"
|
|
newline
|
|
bitfld.long 0x00 5. " MODCLKPOL0 ,Modulo mode SPICLK polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 2.--4. " MMODE0 ,SPI/MibSPI data lines " "1,2,3,4,5,6,?..."
|
|
bitfld.long 0x00 0.--1. " PMODE0 ,Parallel mode data lines" "1,2,4,8"
|
|
line.long 0x04 "MIBSPIE,MibSPI Enable Register"
|
|
bitfld.long 0x04 16. " RXRAMACCESS ,Receive-RAM access control" "Not writable,Accessible"
|
|
bitfld.long 0x04 0. " MIBSPIENA ,Multi-buffer mode enable" "Disabled,Enabled"
|
|
elif cpuis("TMS570LS0332")||cpuis("TMS570LS0432")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS0232")
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "MIBSPIE,MibSPI Enable Register"
|
|
bitfld.long 0x00 16. " RXRAMACCESS ,Receive-RAM access control" "Not writable,Accessible"
|
|
bitfld.long 0x00 0. " MIBSPIENA ,Multi-buffer mode enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x74++0x0F
|
|
line.long 0x00 "TGITENST,MibSPI Transfer Group Interrupt Enable Set Register"
|
|
bitfld.long 0x00 31. " SETINTENRDY15 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SETINTENRDY14 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " SETINTENRDY13 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 28. " SETINTENRDY12 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " SETINTENRDY11 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SETINTENRDY10 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " SETINTENRDY9 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SETINTENRDY8 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " SETINTENRDY7 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 22. " SETINTENRDY6 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " SETINTENRDY5 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SETINTENRDY4 ,SETTG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " SETINTENRDY3 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SETINTENRDY2 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " SETINTENRDY1 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 16. " SETINTENRDY0 ,TG interrupt set (enable) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " SETINTENSUS15 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SETINTENSUS14 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " SETINTENSUS13 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SETINTENSUS12 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " SETINTENSUS11 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 10. " SETINTENSUS10 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " SETINTENSUS9 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SETINTENSUS8 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " SETINTENSUS7 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SETINTENSUS6 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SETINTENSUS5 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 4. " SETINTENSUS4 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " SETINTENSUS3 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SETINTENSUS2 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " SETINTENSUS1 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SETINTENSUS0 ,TG interrupt set (enabled) when transfer suspended" "Disabled,Enabled"
|
|
line.long 0x04 "TGITENCR,MibSPI Transfer Group Interrupt Enable Clear Register"
|
|
bitfld.long 0x04 31. " CLRINTENRDY15 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " CLRINTENRDY14 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " CLRINTENRDY13 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 28. " CLRINTENRDY12 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " CLRINTENRDY11 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " CLRINTENRDY10 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 25. " CLRINTENRDY9 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " CLRINTENRDY8 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " CLRINTENRDY7 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 22. " CLRINTENRDY6 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " CLRINTENRDY5 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " CLRINTENRDY4 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 19. " CLRINTENRDY3 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " CLRINTENRDY2 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " CLRINTENRDY1 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 16. " CLRINTENRDY0 ,TG interrupt clear (disabled) when transfer finished" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " CLRINTENSUS15 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " CLRINTENSUS14 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 13. " CLRINTENSUS13 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " CLRINTENSUS12 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " CLRINTENSUS11 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 10. " CLRINTENSUS10 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " CLRINTENSUS9 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " CLRINTENSUS8 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 7. " CLRINTENSUS7 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " CLRINTENSUS6 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " CLRINTENSUS5 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 4. " CLRINTENSUS4 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " CLRINTENSUS3 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CLRINTENSUS2 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x04 1. " CLRINTENSUS1 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CLRINTENSUS0 ,TG interrupt clear (disabled) when transfer suspended" "Disabled,Enabled"
|
|
line.long 0x08 "TGITLVST,MibSPI Transfer Group Interrupt Level Set Register"
|
|
bitfld.long 0x08 31. " SETINTLVLRDY15 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 30. " SETINTLVLRDY14 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 29. " SETINTLVLRDY13 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 28. " SETINTLVLRDY12 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 27. " SETINTLVLRDY11 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 26. " SETINTLVLRDY10 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 25. " SETINTLVLRDY9 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 24. " SETINTLVLRDY8 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 23. " SETINTLVLRDY7 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 22. " SETINTLVLRDY6 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 21. " SETINTLVLRDY5 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 20. " SETINTLVLRDY4 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 19. " SETINTLVLRDY3 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 18. " SETINTLVLRDY2 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 17. " SETINTLVLRDY1 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 16. " SETINTLVLRDY0 ,Transfer-group completed interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 15. " SETINTLVLSUS15 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 14. " SETINTLVLSUS14 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 13. " SETINTLVLSUS13 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 12. " SETINTLVLSUS12 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 11. " SETINTLVLSUS11 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 10. " SETINTLVLSUS10 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 9. " SETINTLVLSUS9 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 8. " SETINTLVLSUS8 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 7. " SETINTLVLSUS7 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 6. " SETINTLVLSUS6 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 5. " SETINTLVLSUS5 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 4. " SETINTLVLSUS4 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 3. " SETINTLVLSUS3 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 2. " SETINTLVLSUS2 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x08 1. " SETINTLVLSUS1 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
bitfld.long 0x08 0. " SETINTLVLSUS0 ,Transfer-group suspended interrupt level set" "INT0,INT1"
|
|
line.long 0x0C "TGITLVCR,MibSPI Transfer Group Interrupt Level Clear Register"
|
|
bitfld.long 0x0C 31. " CLRINTLVLRDY15 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 30. " CLRINTLVLRDY14 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 29. " CLRINTLVLRDY13 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 28. " CLRINTLVLRDY12 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 27. " CLRINTLVLRDY11 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 26. " CLRINTLVLRDY10 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 25. " CLRINTLVLRDY9 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 24. " CLRINTLVLRDY8 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 23. " CLRINTLVLRDY7 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 22. " CLRINTLVLRDY6 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 21. " CLRINTLVLRDY5 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 20. " CLRINTLVLRDY4 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 19. " CLRINTLVLRDY3 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 18. " CLRINTLVLRDY2 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 17. " CLRINTLVLRDY1 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 16. " CLRINTLVLRDY0 ,Transfer-group completed interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 15. " CLRINTLVLSUS15 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 14. " CLRINTLVLSUS14 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 13. " CLRINTLVLSUS13 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 12. " CLRINTLVLSUS12 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 11. " CLRINTLVLSUS11 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 10. " CLRINTLVLSUS10 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 9. " CLRINTLVLSUS9 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 8. " CLRINTLVLSUS8 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 7. " CLRINTLVLSUS7 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 6. " CLRINTLVLSUS6 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 5. " CLRINTLVLSUS5 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 4. " CLRINTLVLSUS4 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 3. " CLRINTLVLSUS3 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 2. " CLRINTLVLSUS2 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
newline
|
|
bitfld.long 0x0C 1. " CLRINTLVLSUS1 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
bitfld.long 0x0C 0. " CLRINTLVLSUS0 ,Transfer group suspended interrupt level clear" "INT0,INT1"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TGITFLG,Transfer Group Interrupt Flag Register"
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
bitfld.long 0x00 31. " INTFLGRDY[15] ,Transfer-group interrupt flag for a transfer-completed interrupt 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " INTFLGRDY[14] ,Transfer-group interrupt flag for a transfer-completed interrupt 14" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 29. " INTFLGRDY[13] ,Transfer-group interrupt flag for a transfer-completed interrupt 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " INTFLGRDY[12] ,Transfer-group interrupt flag for a transfer-completed interrupt 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 27. " INTFLGRDY[11] ,Transfer-group interrupt flag for a transfer-completed interrupt 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " INTFLGRDY[10] ,Transfer-group interrupt flag for a transfer-completed interrupt 10" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 25. " INTFLGRDY[9] ,Transfer-group interrupt flag for a transfer-completed interrupt 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " INTFLGRDY[8] ,Transfer-group interrupt flag for a transfer-completed interrupt 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 23. " INTFLGRDY[7] ,Transfer-group interrupt flag for a transfer-completed interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " INTFLGRDY[6] ,Transfer-group interrupt flag for a transfer-completed interrupt 6" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " INTFLGRDY[5] ,Transfer-group interrupt flag for a transfer-completed interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " INTFLGRDY[4] ,Transfer-group interrupt flag for a transfer-completed interrupt 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 19. " INTFLGRDY[3] ,Transfer-group interrupt flag for a transfer-completed interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " INTFLGRDY[2] ,Transfer-group interrupt flag for a transfer-completed interrupt 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 17. " INTFLGRDY[1] ,Transfer-group interrupt flag for a transfer-completed interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " INTFLGRDY[0] ,Transfer-group interrupt flag for a transfer-completed interrupt 0" "Disabled,Enabled"
|
|
newline
|
|
endif
|
|
bitfld.long 0x00 15. " INTFLGSUS[15] ,Transfer-group interrupt flag for a transfer-suspend interrupt 15" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " INTFLGSUS[14] ,Transfer-group interrupt flag for a transfer-suspend interrupt 14" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 13. " INTFLGSUS[13] ,Transfer-group interrupt flag for a transfer-suspend interrupt 13" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " INTFLGSUS[12] ,Transfer-group interrupt flag for a transfer-suspend interrupt 12" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 11. " INTFLGSUS[11] ,Transfer-group interrupt flag for a transfer-suspend interrupt 11" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " INTFLGSUS[10] ,Transfer-group interrupt flag for a transfer-suspend interrupt 10" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " INTFLGSUS[9] ,Transfer-group interrupt flag for a transfer-suspend interrupt 9" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " INTFLGSUS[8] ,Transfer-group interrupt flag for a transfer-suspend interrupt 8" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " INTFLGSUS[7] ,Transfer-group interrupt flag for a transfer-suspend interrupt 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " INTFLGSUS[6] ,Transfer-group interrupt flag for a transfer-suspend interrupt 6" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 5. " INTFLGSUS[5] ,Transfer-group interrupt flag for a transfer-suspend interrupt 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " INTFLGSUS[4] ,Transfer-group interrupt flag for a transfer-suspend interrupt 4" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " INTFLGSUS[3] ,Transfer-group interrupt flag for a transfer-suspend interrupt 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " INTFLGSUS[2] ,Transfer-group interrupt flag for a transfer-suspend interrupt 2" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " INTFLGSUS[1] ,Transfer-group interrupt flag for a transfer-suspend interrupt 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " INTFLGSUS[0] ,Transfer-group interrupt flag for a transfer-suspend interrupt 0" "Disabled,Enabled"
|
|
group.long 0x90++0x47
|
|
line.long 0x00 "TICKCNT,Tick Count Register"
|
|
bitfld.long 0x00 31. " TICKENA ,Tick counter enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " RELOAD ,Pre-load the tick counter" "No effect,Reload"
|
|
bitfld.long 0x00 28.--29. " CLKCTRL ,Tick counter clock source control" "0,1,2,3"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TICKVALUE ,Initial value for the tick counter"
|
|
line.long 0x04 "LTGPEND,Last Transfer Group End Pointer Register"
|
|
bitfld.long 0x04 24.--28. " TGINSERVICE ,The TG number currently being serviced by the sequencer" "No TG,TG0,TG1,TG2,TG3,TG4,TG5,TG6,TG7,TG8,TG9,TG10,TG11,TG12,TG13,TG14,TG15,?..."
|
|
hexmask.long.byte 0x04 8.--14. 1. " LPEND ,Last TG end pointer"
|
|
line.long 0x8 "TG0CTRL,MibSPI Transfer Group Control Register 0"
|
|
bitfld.long 0x8 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x8 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x8 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x8 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x8 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x8 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x8 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0xC "TG1CTRL,MibSPI Transfer Group Control Register 1"
|
|
bitfld.long 0xC 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0xC 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0xC 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0xC 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0xC 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0xC 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0xC 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x10 "TG2CTRL,MibSPI Transfer Group Control Register 2"
|
|
bitfld.long 0x10 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x10 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x10 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x10 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x10 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x10 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x10 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x14 "TG3CTRL,MibSPI Transfer Group Control Register 3"
|
|
bitfld.long 0x14 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x14 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x14 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x14 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x14 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x14 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x14 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x14 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x18 "TG4CTRL,MibSPI Transfer Group Control Register 4"
|
|
bitfld.long 0x18 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x18 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x18 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x18 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x18 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x18 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x18 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x1C "TG5CTRL,MibSPI Transfer Group Control Register 5"
|
|
bitfld.long 0x1C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x1C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x1C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x1C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x1C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x1C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x1C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x20 "TG6CTRL,MibSPI Transfer Group Control Register 6"
|
|
bitfld.long 0x20 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x20 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x20 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x20 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x20 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x20 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x20 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x20 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x20 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x24 "TG7CTRL,MibSPI Transfer Group Control Register 7"
|
|
bitfld.long 0x24 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x24 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x24 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x24 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x24 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x24 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x24 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x24 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x24 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x28 "TG8CTRL,MibSPI Transfer Group Control Register 8"
|
|
bitfld.long 0x28 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x28 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x28 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x28 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x28 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x28 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x28 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x28 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x28 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x2C "TG9CTRL,MibSPI Transfer Group Control Register 9"
|
|
bitfld.long 0x2C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x2C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x2C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x2C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x2C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x2C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x2C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x2C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x2C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x30 "TG10CTRL,MibSPI Transfer Group Control Register 10"
|
|
bitfld.long 0x30 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x30 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x30 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x30 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x30 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x30 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x30 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x30 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x30 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x34 "TG11CTRL,MibSPI Transfer Group Control Register 11"
|
|
bitfld.long 0x34 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x34 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x34 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x34 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x34 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x34 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x34 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x34 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x34 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x38 "TG12CTRL,MibSPI Transfer Group Control Register 12"
|
|
bitfld.long 0x38 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x38 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x38 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x38 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x38 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x38 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x38 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x38 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x38 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x3C "TG13CTRL,MibSPI Transfer Group Control Register 13"
|
|
bitfld.long 0x3C 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x3C 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x3C 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x3C 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x3C 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x3C 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x3C 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x3C 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x3C 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x40 "TG14CTRL,MibSPI Transfer Group Control Register 14"
|
|
bitfld.long 0x40 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x40 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x40 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x40 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x40 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x40 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x40 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x40 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x40 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
line.long 0x44 "TG15CTRL,MibSPI Transfer Group Control Register 15"
|
|
bitfld.long 0x44 31. " TGENA ,TG enable" "Disabled,Enabled"
|
|
bitfld.long 0x44 30. " ONESHOT ,Single transfer for TG" "Disabled,Enabled"
|
|
bitfld.long 0x44 29. " PRST ,TG pointer reset mode" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x44 28. " TGTD ,TG triggered" "Not triggered,Triggered"
|
|
bitfld.long 0x44 20.--23. " TRGEVT ,Type of trigger event" "Never,Rising edge,Falling edge,Both edges,,High active,Low-active,Always,?..."
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
bitfld.long 0x44 16.--19. " TRIGSRC ,Trigger source" "Disabled,EXT0,EXT1,EXT2,EXT3,EXT4,EXT5,EXT6,EXT7,EXT8,EXT9,EXT10,EXT11,EXT12,EXT13,TICK"
|
|
else
|
|
bitfld.long 0x44 16.--19. " TRIGSRC ,Trigger source" "Disabled,GIOA[0],GIOA[1],GIOA[2],GIOA[3],GIOA[4],GIOA[5],GIOA[6],GIOA[7],N2HET1[8],N2HET1[10],N2HET1[12],N2HET1[14],N2HET1[16],N2HET1[18],TICK"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x44 8.--14. 0x01 " PSTART ,TG start address"
|
|
hexmask.long.byte 0x44 0.--6. 0x01 " PCURRENT ,Pointer to current buffer"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS0232"))
|
|
group.long 0xD8++0x1F
|
|
line.long 0x0 "DMA0CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x0 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x0 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x0 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x0 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x0 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x0 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x0 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x4 "DMA1CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x4 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x4 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x4 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x4 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x4 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x4 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x4 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x4 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x4 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x8 "DMA2CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x8 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x8 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x8 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x8 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x8 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x8 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x8 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x8 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x8 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0xC "DMA3CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0xC 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0xC 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0xC 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0xC 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0xC 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0xC 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0xC 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0xC 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0xC 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x10 "DMA4CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x10 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x10 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x10 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x10 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x10 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x10 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x10 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x10 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x14 "DMA5CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x14 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x14 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x14 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x14 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x14 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x14 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x14 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x14 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x18 "DMA6CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x18 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x18 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x18 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x18 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x18 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x18 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x18 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x18 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x1C "DMA7CTRL,MibSPI DMA Channel Control Register 1"
|
|
bitfld.long 0x1C 31. " ONESHOT ,Auto-disable of DMA channel after ICOUNT+1 transfers" "0,1"
|
|
hexmask.long.byte 0x1C 24.--30. 1. " BUFID ,Buffer utilized for DMA transfer"
|
|
bitfld.long 0x1C 20.--23. " RXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x1C 16.--19. " TXDMA_MAP ,Each MibSPI DMA channel can be linked to two physical DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x1C 15. " RXDMAENA ,Receive data DMA channel enable" "Disabled,Enabled"
|
|
bitfld.long 0x1C 14. " TXDMAENA ,Transmit data DMA channel enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x1C 13. " NOBRK ,Non-interleaved DMA block transfer" "Not performed,Performed"
|
|
bitfld.long 0x1C 8.--12. " ICOUNT ,Initial count of DMA transfers" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
bitfld.long 0x1C 6. " COUNTBIT17 ,17th bit of the COUNT field of DMAxCOUNT register" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0.--5. " COUNT ,Actual number of remaining DMA transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0xF8++0x1F
|
|
line.long 0x0 "DMA0 COUNT,MibSPI DMA0 COUNT Register"
|
|
hexmask.long.word 0x0 16.--31. 1. " ICOUNT0 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x0 0.--15. 1. " COUNT0 ,The actual number of remaining DMA transfers"
|
|
line.long 0x4 "DMA1 COUNT,MibSPI DMA1 COUNT Register"
|
|
hexmask.long.word 0x4 16.--31. 1. " ICOUNT1 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x4 0.--15. 1. " COUNT1 ,The actual number of remaining DMA transfers"
|
|
line.long 0x8 "DMA2 COUNT,MibSPI DMA2 COUNT Register"
|
|
hexmask.long.word 0x8 16.--31. 1. " ICOUNT2 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x8 0.--15. 1. " COUNT2 ,The actual number of remaining DMA transfers"
|
|
line.long 0xC "DMA3 COUNT,MibSPI DMA3 COUNT Register"
|
|
hexmask.long.word 0xC 16.--31. 1. " ICOUNT3 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0xC 0.--15. 1. " COUNT3 ,The actual number of remaining DMA transfers"
|
|
line.long 0x10 "DMA4 COUNT,MibSPI DMA4 COUNT Register"
|
|
hexmask.long.word 0x10 16.--31. 1. " ICOUNT4 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x10 0.--15. 1. " COUNT4 ,The actual number of remaining DMA transfers"
|
|
line.long 0x14 "DMA5 COUNT,MibSPI DMA5 COUNT Register"
|
|
hexmask.long.word 0x14 16.--31. 1. " ICOUNT5 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x14 0.--15. 1. " COUNT5 ,The actual number of remaining DMA transfers"
|
|
line.long 0x18 "DMA6 COUNT,MibSPI DMA6 COUNT Register"
|
|
hexmask.long.word 0x18 16.--31. 1. " ICOUNT6 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x18 0.--15. 1. " COUNT6 ,The actual number of remaining DMA transfers"
|
|
line.long 0x1C "DMA7 COUNT,MibSPI DMA7 COUNT Register"
|
|
hexmask.long.word 0x1C 16.--31. 1. " ICOUNT7 ,Initial number of DMA transfers"
|
|
hexmask.long.word 0x1C 0.--15. 1. " COUNT7 ,The actual number of remaining DMA transfers"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "DMACNTLEN,MibSPI DMACNTLEN Register"
|
|
bitfld.long 0x00 0. " LARGECOUNT ,Counters select" "DMAxCTRL,DMAxCOUNT"
|
|
endif
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "UERRCTRL,Uncorrectable Parity Error Control Register"
|
|
bitfld.long 0x00 8. " PTESTEN ,Parity memory test enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " EDEN ,Error detection enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "UERRSTAT,Uncorrectable Parity Error Status Register"
|
|
eventfld.long 0x00 1. " EDFLG1 ,Uncorrectable parity error detection flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " EDFLG0 ,Uncorrectable parity error detection flag" "Not occurred,Occurred"
|
|
hgroup.long 0x128++0x03
|
|
hide.long 0x00 "UERRADDR1,Uncorrectable Parity Error Address Register"
|
|
in
|
|
hgroup.long 0x12C++0x03
|
|
hide.long 0x00 "UERRADDR0,Uncorrectable Parity Error Address Register"
|
|
in
|
|
hgroup.long 0x130++0x03
|
|
hide.long 0x00 "RXOVRN_BUF_ADDR,Receive RAM Overrun Buffer Address Register"
|
|
in
|
|
sif cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")||cpuis("TMS570LS0232")
|
|
if (((per.l.be(ad:0xFFF7F600+0x134))&0x2)==0x2)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
sif cpuis("TMS570LS0232")
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],?..."
|
|
else
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
endif
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
bitfld.long 0x00 0. " RXP_ENA ,Enable analog loopback through the receive pin" "Transmit,Receive"
|
|
else
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
sif cpuis("TMS570LS0232")
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],?..."
|
|
else
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
endif
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
endif
|
|
else
|
|
if (((per.l(ad:0xFFF7F600+0x134))&0x2)==0x2)
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
bitfld.long 0x00 0. " RXP_ENA ,Enable analog loopback through the receive pin" "Transmit,Receive"
|
|
else
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "IOLPBKTSTCR,SPI IO Loopback Test Control Register"
|
|
bitfld.long 0x00 24. " SCSFAILFLG ,Failure on SPISCS pin compare during analog loopback" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CTRL_BITERR ,Controls inducing of BITERR during I/O loopback test mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " CTRL_DESYNC ,Controls inducing of the desync error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 18. " CTRL_PARERR ,Controls inducing of parity errors during I/O loopback test mode" "No error,Error"
|
|
bitfld.long 0x00 17. " CTRL_TIMEOUT ,Controls inducing of the timeout error during I/O loopbacK test mode" "No error,Error"
|
|
bitfld.long 0x00 16. " CTRL_DLENERR ,Controls inducing of the data length error during I/O loopback test mode" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 8.--11. " IOLPBKTSTENA ,Module I/O loopback test enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
bitfld.long 0x00 3.--5. " ERRSCSPIN ,Inject error on chip-select pin number" "/SPISCS[0],/SPISCS[1],/SPISCS[2],/SPISCS[3],/SPISCS[4],/SPISCS[5],/SPISCS[6],/SPISCS[7]"
|
|
bitfld.long 0x00 2. " CTRLSCSPINERR ,Enable/disable the injection of an error on the SPISCS[3:0] pins" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 1. " LPBK_TYPE ,Module I/O loopback type (analog/digital)" "Digital,Analog"
|
|
endif
|
|
endif
|
|
sif (cpu()=="TMS570LC4357"||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*"))
|
|
width 21.
|
|
newline
|
|
group.long 0x138++0x07
|
|
line.long 0x00 "EXTENDED_PRESCALE_1, SPI Extended Prescale Register 1"
|
|
hexmask.long.word 0x00 16.--26. 1. " EPRESCALE_FMT1 , Extended Prescale value for SPIFMT1"
|
|
hexmask.long.word 0x00 0.--10. 1. " EPRESCALE_FMT0 , Extended Prescale value for SPIFMT0"
|
|
line.long 0x04 "EXTENDED_PRESCALE_2, SPI Extended Prescale Register 2"
|
|
hexmask.long.word 0x04 16.--26. 1. " EPRESCALE_FMT3 , Extended Prescale value for SPIFMT3"
|
|
hexmask.long.word 0x04 0.--10. 1. " EPRESCALE_FMT2 , Extended Prescale value for SPIFMT2"
|
|
endif
|
|
sif !cpuis("TMS570LS0232")&&!cpuis("TMS570LS0714*")&&!cpuis("TMS570LS0914*")
|
|
sif (cpu()=="TMS570LC4357"||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*"))
|
|
sif cpuis("TMS570LC4357")
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "ECCDIAG_CTRL, ECC Diagnostic Control register"
|
|
bitfld.long 0x00 0.--3. " ECCDIAG_EN , ECC Diagnostic mode Enable Key bits" "Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
endif
|
|
if ((per.l(ad:0xFFF7F600+0x140)&0x5)==0x5)
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "ECCDIAG_STAT, ECC Diagnostic Status register"
|
|
eventfld.long 0x00 17. " DEFLG[1] , Double bit Error is detected for RXRAM" "No error,Error"
|
|
eventfld.long 0x00 16. " DEFLG[0] , Double bit Error is detected for TXRAM" "No error,Error"
|
|
eventfld.long 0x00 1. " SEFLG[1] , Single bit Error is detected for RXRAM" "No error,Error"
|
|
eventfld.long 0x00 0. " SEFLG[0] , Single bit Error is detected for TXRAM" "No error,Error"
|
|
else
|
|
hgroup.long 0x144++0x03
|
|
hide.long 0x00 "ECCDIAG_STAT, ECC Diagnostic Status register"
|
|
in
|
|
endif
|
|
hgroup.long 0x148++0x03
|
|
hide.long 0x00 "SBERRADDR1, Single Bit Error Address Register - RXRAM"
|
|
in
|
|
hgroup.long 0x14C++0x03
|
|
hide.long 0x00 "SBERRADDR0, Single Bit Error Address Register - TXRAM"
|
|
in
|
|
endif
|
|
endif
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree "Multi-buffer RAM Registers"
|
|
base ad:0xFF0F0000
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.be
|
|
endif
|
|
width 11.
|
|
sif (cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*"))
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 0"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 1"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 2"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 3"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 4"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 5"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 6"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 7"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 8"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 9"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 10"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 11"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 12"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 13"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 14"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 15"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 16"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 17"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 18"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 19"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 20"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 21"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 22"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 23"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 24"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 25"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 26"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 27"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 28"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 29"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 30"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 31"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 32"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 33"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 34"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 35"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 36"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 37"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 38"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 39"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 40"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 41"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 42"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 43"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 44"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 45"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 46"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 47"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 48"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 49"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 50"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 51"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 52"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 53"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 54"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 55"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 56"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 57"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 58"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 59"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 60"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 61"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 62"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 63"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 64"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 65"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 66"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 67"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 68"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 69"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 70"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 71"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 72"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 73"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 74"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 75"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 76"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 77"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 78"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "TXRAM, Multi-buffer RAM Transmit Data Register 79"
|
|
bitfld.long 0x00 29.--31. " BUFMODE , Specify conditions that are recognized by the sequencer to initiate transfers of each buffer word" "Disabled,Skip Single Transfer,Skip Overwrite,Skip ST-Overwrite,Continuous,Suspend Single Transfer,Suspend Overwrite,Suspend ST-Overwrite"
|
|
bitfld.long 0x00 28. " CSHOLD , Chip select hold mode" "Deactivated,Activated"
|
|
newline
|
|
bitfld.long 0x00 27. " LOCK , Lock two consecutive buffer words" "0,1"
|
|
bitfld.long 0x00 26. " WDEL , Enable the delay counter at the end of the current transaction" "Disable,Enable"
|
|
newline
|
|
bitfld.long 0x00 24.--25. " DFSEL , Data word format select" "Format 0,Format 1,Format 2,Format 3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR , Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA , Transfer data"
|
|
rgroup.long (0x0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 0"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 1"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 2"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 3"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x10+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 4"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x14+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 5"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x18+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 6"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x1C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 7"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x20+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 8"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x24+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 9"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x28+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 10"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x2C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 11"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x30+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 12"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x34+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 13"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x38+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 14"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x3C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 15"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x40+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 16"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x44+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 17"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x48+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 18"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x4C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 19"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x50+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 20"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x54+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 21"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x58+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 22"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x5C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 23"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x60+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 24"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x64+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 25"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x68+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 26"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x6C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 27"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x70+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 28"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x74+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 29"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x78+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 30"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x7C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 31"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x80+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 32"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x84+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 33"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x88+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 34"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x8C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 35"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x90+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 36"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x94+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 37"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x98+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 38"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x9C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 39"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xA0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 40"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xA4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 41"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xA8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 42"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xAC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 43"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xB0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 44"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xB4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 45"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xB8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 46"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xBC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 47"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xC0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 48"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xC4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 49"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xC8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 50"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xCC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 51"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xD0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 52"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xD4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 53"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xD8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 54"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xDC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 55"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xE0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 56"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xE4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 57"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xE8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 58"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xEC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 59"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xF0+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 60"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xF4+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 61"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xF8+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 62"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0xFC+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 63"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x100+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 64"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x104+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 65"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x108+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 66"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x10C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 67"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x110+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 68"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x114+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 69"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x118+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 70"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x11C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 71"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x120+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 72"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x124+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 73"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x128+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 74"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x12C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 75"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x130+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 76"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x134+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 77"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x138+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 78"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
rgroup.long (0x13C+0x200)++0x03
|
|
line.long 0x00 "RXRAM, Multi-buffer RAM Receive Buffer Register 79"
|
|
bitfld.long 0x00 31. " RXEMPTY , Receive data buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 30. " RXOVR , Receive data buffer overrun" "No overrun,Overrun"
|
|
newline
|
|
bitfld.long 0x00 29. " TXFULL , Transmit data buffer full" "Not full,Full"
|
|
bitfld.long 0x00 28. " BITERR , Bit error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 27. " DESYNC , Desynchronization of slave device" "No,Yes"
|
|
bitfld.long 0x00 26. " PARITYERR , Parity error" "No error,Error"
|
|
newline
|
|
bitfld.long 0x00 25. " TIMEOUT , Time-out because of non-activation of ENA pin" "No timeout,Timeout"
|
|
bitfld.long 0x00 24. " DLENERR , Data length error flag" "No,Yes"
|
|
newline
|
|
hexmask.long.byte 0x00 16.--23. 1. " LCSNR , Last chip select number"
|
|
hexmask.long.word 0x00 0.--15. 1. " RXDATA , SPI receive data"
|
|
else
|
|
tree "Transmit Buffers"
|
|
group.long 0x0++0x03
|
|
line.long 0x00 "BUFFER0,Buffer 0 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x4++0x03
|
|
line.long 0x00 "BUFFER1,Buffer 1 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "BUFFER2,Buffer 2 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "BUFFER3,Buffer 3 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "BUFFER4,Buffer 4 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "BUFFER5,Buffer 5 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "BUFFER6,Buffer 6 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "BUFFER7,Buffer 7 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "BUFFER8,Buffer 8 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "BUFFER9,Buffer 9 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "BUFFER10,Buffer 10 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x2C++0x03
|
|
line.long 0x00 "BUFFER11,Buffer 11 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "BUFFER12,Buffer 12 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "BUFFER13,Buffer 13 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "BUFFER14,Buffer 14 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "BUFFER15,Buffer 15 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "BUFFER16,Buffer 16 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "BUFFER17,Buffer 17 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "BUFFER18,Buffer 18 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "BUFFER19,Buffer 19 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "BUFFER20,Buffer 20 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "BUFFER21,Buffer 21 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "BUFFER22,Buffer 22 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "BUFFER23,Buffer 23 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "BUFFER24,Buffer 24 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "BUFFER25,Buffer 25 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "BUFFER26,Buffer 26 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "BUFFER27,Buffer 27 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "BUFFER28,Buffer 28 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "BUFFER29,Buffer 29 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "BUFFER30,Buffer 30 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "BUFFER31,Buffer 31 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "BUFFER32,Buffer 32 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x84++0x03
|
|
line.long 0x00 "BUFFER33,Buffer 33 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "BUFFER34,Buffer 34 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "BUFFER35,Buffer 35 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "BUFFER36,Buffer 36 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "BUFFER37,Buffer 37 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "BUFFER38,Buffer 38 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "BUFFER39,Buffer 39 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xA0++0x03
|
|
line.long 0x00 "BUFFER40,Buffer 40 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xA4++0x03
|
|
line.long 0x00 "BUFFER41,Buffer 41 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "BUFFER42,Buffer 42 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "BUFFER43,Buffer 43 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "BUFFER44,Buffer 44 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "BUFFER45,Buffer 45 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "BUFFER46,Buffer 46 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "BUFFER47,Buffer 47 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xC0++0x03
|
|
line.long 0x00 "BUFFER48,Buffer 48 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xC4++0x03
|
|
line.long 0x00 "BUFFER49,Buffer 49 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "BUFFER50,Buffer 50 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "BUFFER51,Buffer 51 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "BUFFER52,Buffer 52 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "BUFFER53,Buffer 53 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "BUFFER54,Buffer 54 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "BUFFER55,Buffer 55 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xE0++0x03
|
|
line.long 0x00 "BUFFER56,Buffer 56 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xE4++0x03
|
|
line.long 0x00 "BUFFER57,Buffer 57 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "BUFFER58,Buffer 58 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "BUFFER59,Buffer 59 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "BUFFER60,Buffer 60 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "BUFFER61,Buffer 61 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "BUFFER62,Buffer 62 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "BUFFER63,Buffer 63 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "BUFFER64,Buffer 64 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x104++0x03
|
|
line.long 0x00 "BUFFER65,Buffer 65 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "BUFFER66,Buffer 66 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "BUFFER67,Buffer 67 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "BUFFER68,Buffer 68 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "BUFFER69,Buffer 69 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "BUFFER70,Buffer 70 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "BUFFER71,Buffer 71 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x120++0x03
|
|
line.long 0x00 "BUFFER72,Buffer 72 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "BUFFER73,Buffer 73 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "BUFFER74,Buffer 74 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "BUFFER75,Buffer 75 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "BUFFER76,Buffer 76 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x134++0x03
|
|
line.long 0x00 "BUFFER77,Buffer 77 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x138++0x03
|
|
line.long 0x00 "BUFFER78,Buffer 78 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x13C++0x03
|
|
line.long 0x00 "BUFFER79,Buffer 79 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x140++0x03
|
|
line.long 0x00 "BUFFER80,Buffer 80 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x144++0x03
|
|
line.long 0x00 "BUFFER81,Buffer 81 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x148++0x03
|
|
line.long 0x00 "BUFFER82,Buffer 82 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "BUFFER83,Buffer 83 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x150++0x03
|
|
line.long 0x00 "BUFFER84,Buffer 84 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x154++0x03
|
|
line.long 0x00 "BUFFER85,Buffer 85 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x158++0x03
|
|
line.long 0x00 "BUFFER86,Buffer 86 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x15C++0x03
|
|
line.long 0x00 "BUFFER87,Buffer 87 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x160++0x03
|
|
line.long 0x00 "BUFFER88,Buffer 88 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x164++0x03
|
|
line.long 0x00 "BUFFER89,Buffer 89 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x168++0x03
|
|
line.long 0x00 "BUFFER90,Buffer 90 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x16C++0x03
|
|
line.long 0x00 "BUFFER91,Buffer 91 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x170++0x03
|
|
line.long 0x00 "BUFFER92,Buffer 92 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x174++0x03
|
|
line.long 0x00 "BUFFER93,Buffer 93 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x178++0x03
|
|
line.long 0x00 "BUFFER94,Buffer 94 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x17C++0x03
|
|
line.long 0x00 "BUFFER95,Buffer 95 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x180++0x03
|
|
line.long 0x00 "BUFFER96,Buffer 96 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x184++0x03
|
|
line.long 0x00 "BUFFER97,Buffer 97 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x188++0x03
|
|
line.long 0x00 "BUFFER98,Buffer 98 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x18C++0x03
|
|
line.long 0x00 "BUFFER99,Buffer 99 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x190++0x03
|
|
line.long 0x00 "BUFFER100,Buffer 100 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x194++0x03
|
|
line.long 0x00 "BUFFER101,Buffer 101 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x198++0x03
|
|
line.long 0x00 "BUFFER102,Buffer 102 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x19C++0x03
|
|
line.long 0x00 "BUFFER103,Buffer 103 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1A0++0x03
|
|
line.long 0x00 "BUFFER104,Buffer 104 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1A4++0x03
|
|
line.long 0x00 "BUFFER105,Buffer 105 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1A8++0x03
|
|
line.long 0x00 "BUFFER106,Buffer 106 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1AC++0x03
|
|
line.long 0x00 "BUFFER107,Buffer 107 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1B0++0x03
|
|
line.long 0x00 "BUFFER108,Buffer 108 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1B4++0x03
|
|
line.long 0x00 "BUFFER109,Buffer 109 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1B8++0x03
|
|
line.long 0x00 "BUFFER110,Buffer 110 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1BC++0x03
|
|
line.long 0x00 "BUFFER111,Buffer 111 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1C0++0x03
|
|
line.long 0x00 "BUFFER112,Buffer 112 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1C4++0x03
|
|
line.long 0x00 "BUFFER113,Buffer 113 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1C8++0x03
|
|
line.long 0x00 "BUFFER114,Buffer 114 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1CC++0x03
|
|
line.long 0x00 "BUFFER115,Buffer 115 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1D0++0x03
|
|
line.long 0x00 "BUFFER116,Buffer 116 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1D4++0x03
|
|
line.long 0x00 "BUFFER117,Buffer 117 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1D8++0x03
|
|
line.long 0x00 "BUFFER118,Buffer 118 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1DC++0x03
|
|
line.long 0x00 "BUFFER119,Buffer 119 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1E0++0x03
|
|
line.long 0x00 "BUFFER120,Buffer 120 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1E4++0x03
|
|
line.long 0x00 "BUFFER121,Buffer 121 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1E8++0x03
|
|
line.long 0x00 "BUFFER122,Buffer 122 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1EC++0x03
|
|
line.long 0x00 "BUFFER123,Buffer 123 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1F0++0x03
|
|
line.long 0x00 "BUFFER124,Buffer 124 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1F4++0x03
|
|
line.long 0x00 "BUFFER125,Buffer 125 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1F8++0x03
|
|
line.long 0x00 "BUFFER126,Buffer 126 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
group.long 0x1FC++0x03
|
|
line.long 0x00 "BUFFER127,Buffer 127 Register"
|
|
bitfld.long 0x00 29.--31. " BUFMODE ,Buff Mode" "Disabled,Skip single-transfer,Skip overwrite-protect,Skip single-transfer overwrite-protect,Continuous,Suspend single-transfer,Suspend overwrite-protect,Suspend single-transfer overwrite-protect"
|
|
newline
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " LOCK ,Lock two consecutive buffer words" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 26. " WDEL ,Enable the delay counter at the end of the current transaction" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
hexmask.long.byte 0x00 16.--23. 1. " CSNR ,Chip select number"
|
|
newline
|
|
hexmask.long.word 0x00 0.--15. 1. " TXDATA ,Transfer data"
|
|
tree.end
|
|
tree "Receive Buffers"
|
|
hgroup.long (0x0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER0,Buffer 0 Register"
|
|
in
|
|
hgroup.long (0x4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER1,Buffer 1 Register"
|
|
in
|
|
hgroup.long (0x8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER2,Buffer 2 Register"
|
|
in
|
|
hgroup.long (0xC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER3,Buffer 3 Register"
|
|
in
|
|
hgroup.long (0x10+0x200)++0x03
|
|
hide.long 0x00 "BUFFER4,Buffer 4 Register"
|
|
in
|
|
hgroup.long (0x14+0x200)++0x03
|
|
hide.long 0x00 "BUFFER5,Buffer 5 Register"
|
|
in
|
|
hgroup.long (0x18+0x200)++0x03
|
|
hide.long 0x00 "BUFFER6,Buffer 6 Register"
|
|
in
|
|
hgroup.long (0x1C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER7,Buffer 7 Register"
|
|
in
|
|
hgroup.long (0x20+0x200)++0x03
|
|
hide.long 0x00 "BUFFER8,Buffer 8 Register"
|
|
in
|
|
hgroup.long (0x24+0x200)++0x03
|
|
hide.long 0x00 "BUFFER9,Buffer 9 Register"
|
|
in
|
|
hgroup.long (0x28+0x200)++0x03
|
|
hide.long 0x00 "BUFFER10,Buffer 10 Register"
|
|
in
|
|
hgroup.long (0x2C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER11,Buffer 11 Register"
|
|
in
|
|
hgroup.long (0x30+0x200)++0x03
|
|
hide.long 0x00 "BUFFER12,Buffer 12 Register"
|
|
in
|
|
hgroup.long (0x34+0x200)++0x03
|
|
hide.long 0x00 "BUFFER13,Buffer 13 Register"
|
|
in
|
|
hgroup.long (0x38+0x200)++0x03
|
|
hide.long 0x00 "BUFFER14,Buffer 14 Register"
|
|
in
|
|
hgroup.long (0x3C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER15,Buffer 15 Register"
|
|
in
|
|
hgroup.long (0x40+0x200)++0x03
|
|
hide.long 0x00 "BUFFER16,Buffer 16 Register"
|
|
in
|
|
hgroup.long (0x44+0x200)++0x03
|
|
hide.long 0x00 "BUFFER17,Buffer 17 Register"
|
|
in
|
|
hgroup.long (0x48+0x200)++0x03
|
|
hide.long 0x00 "BUFFER18,Buffer 18 Register"
|
|
in
|
|
hgroup.long (0x4C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER19,Buffer 19 Register"
|
|
in
|
|
hgroup.long (0x50+0x200)++0x03
|
|
hide.long 0x00 "BUFFER20,Buffer 20 Register"
|
|
in
|
|
hgroup.long (0x54+0x200)++0x03
|
|
hide.long 0x00 "BUFFER21,Buffer 21 Register"
|
|
in
|
|
hgroup.long (0x58+0x200)++0x03
|
|
hide.long 0x00 "BUFFER22,Buffer 22 Register"
|
|
in
|
|
hgroup.long (0x5C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER23,Buffer 23 Register"
|
|
in
|
|
hgroup.long (0x60+0x200)++0x03
|
|
hide.long 0x00 "BUFFER24,Buffer 24 Register"
|
|
in
|
|
hgroup.long (0x64+0x200)++0x03
|
|
hide.long 0x00 "BUFFER25,Buffer 25 Register"
|
|
in
|
|
hgroup.long (0x68+0x200)++0x03
|
|
hide.long 0x00 "BUFFER26,Buffer 26 Register"
|
|
in
|
|
hgroup.long (0x6C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER27,Buffer 27 Register"
|
|
in
|
|
hgroup.long (0x70+0x200)++0x03
|
|
hide.long 0x00 "BUFFER28,Buffer 28 Register"
|
|
in
|
|
hgroup.long (0x74+0x200)++0x03
|
|
hide.long 0x00 "BUFFER29,Buffer 29 Register"
|
|
in
|
|
hgroup.long (0x78+0x200)++0x03
|
|
hide.long 0x00 "BUFFER30,Buffer 30 Register"
|
|
in
|
|
hgroup.long (0x7C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER31,Buffer 31 Register"
|
|
in
|
|
hgroup.long (0x80+0x200)++0x03
|
|
hide.long 0x00 "BUFFER32,Buffer 32 Register"
|
|
in
|
|
hgroup.long (0x84+0x200)++0x03
|
|
hide.long 0x00 "BUFFER33,Buffer 33 Register"
|
|
in
|
|
hgroup.long (0x88+0x200)++0x03
|
|
hide.long 0x00 "BUFFER34,Buffer 34 Register"
|
|
in
|
|
hgroup.long (0x8C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER35,Buffer 35 Register"
|
|
in
|
|
hgroup.long (0x90+0x200)++0x03
|
|
hide.long 0x00 "BUFFER36,Buffer 36 Register"
|
|
in
|
|
hgroup.long (0x94+0x200)++0x03
|
|
hide.long 0x00 "BUFFER37,Buffer 37 Register"
|
|
in
|
|
hgroup.long (0x98+0x200)++0x03
|
|
hide.long 0x00 "BUFFER38,Buffer 38 Register"
|
|
in
|
|
hgroup.long (0x9C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER39,Buffer 39 Register"
|
|
in
|
|
hgroup.long (0xA0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER40,Buffer 40 Register"
|
|
in
|
|
hgroup.long (0xA4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER41,Buffer 41 Register"
|
|
in
|
|
hgroup.long (0xA8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER42,Buffer 42 Register"
|
|
in
|
|
hgroup.long (0xAC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER43,Buffer 43 Register"
|
|
in
|
|
hgroup.long (0xB0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER44,Buffer 44 Register"
|
|
in
|
|
hgroup.long (0xB4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER45,Buffer 45 Register"
|
|
in
|
|
hgroup.long (0xB8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER46,Buffer 46 Register"
|
|
in
|
|
hgroup.long (0xBC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER47,Buffer 47 Register"
|
|
in
|
|
hgroup.long (0xC0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER48,Buffer 48 Register"
|
|
in
|
|
hgroup.long (0xC4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER49,Buffer 49 Register"
|
|
in
|
|
hgroup.long (0xC8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER50,Buffer 50 Register"
|
|
in
|
|
hgroup.long (0xCC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER51,Buffer 51 Register"
|
|
in
|
|
hgroup.long (0xD0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER52,Buffer 52 Register"
|
|
in
|
|
hgroup.long (0xD4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER53,Buffer 53 Register"
|
|
in
|
|
hgroup.long (0xD8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER54,Buffer 54 Register"
|
|
in
|
|
hgroup.long (0xDC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER55,Buffer 55 Register"
|
|
in
|
|
hgroup.long (0xE0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER56,Buffer 56 Register"
|
|
in
|
|
hgroup.long (0xE4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER57,Buffer 57 Register"
|
|
in
|
|
hgroup.long (0xE8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER58,Buffer 58 Register"
|
|
in
|
|
hgroup.long (0xEC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER59,Buffer 59 Register"
|
|
in
|
|
hgroup.long (0xF0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER60,Buffer 60 Register"
|
|
in
|
|
hgroup.long (0xF4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER61,Buffer 61 Register"
|
|
in
|
|
hgroup.long (0xF8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER62,Buffer 62 Register"
|
|
in
|
|
hgroup.long (0xFC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER63,Buffer 63 Register"
|
|
in
|
|
hgroup.long (0x100+0x200)++0x03
|
|
hide.long 0x00 "BUFFER64,Buffer 64 Register"
|
|
in
|
|
hgroup.long (0x104+0x200)++0x03
|
|
hide.long 0x00 "BUFFER65,Buffer 65 Register"
|
|
in
|
|
hgroup.long (0x108+0x200)++0x03
|
|
hide.long 0x00 "BUFFER66,Buffer 66 Register"
|
|
in
|
|
hgroup.long (0x10C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER67,Buffer 67 Register"
|
|
in
|
|
hgroup.long (0x110+0x200)++0x03
|
|
hide.long 0x00 "BUFFER68,Buffer 68 Register"
|
|
in
|
|
hgroup.long (0x114+0x200)++0x03
|
|
hide.long 0x00 "BUFFER69,Buffer 69 Register"
|
|
in
|
|
hgroup.long (0x118+0x200)++0x03
|
|
hide.long 0x00 "BUFFER70,Buffer 70 Register"
|
|
in
|
|
hgroup.long (0x11C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER71,Buffer 71 Register"
|
|
in
|
|
hgroup.long (0x120+0x200)++0x03
|
|
hide.long 0x00 "BUFFER72,Buffer 72 Register"
|
|
in
|
|
hgroup.long (0x124+0x200)++0x03
|
|
hide.long 0x00 "BUFFER73,Buffer 73 Register"
|
|
in
|
|
hgroup.long (0x128+0x200)++0x03
|
|
hide.long 0x00 "BUFFER74,Buffer 74 Register"
|
|
in
|
|
hgroup.long (0x12C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER75,Buffer 75 Register"
|
|
in
|
|
hgroup.long (0x130+0x200)++0x03
|
|
hide.long 0x00 "BUFFER76,Buffer 76 Register"
|
|
in
|
|
hgroup.long (0x134+0x200)++0x03
|
|
hide.long 0x00 "BUFFER77,Buffer 77 Register"
|
|
in
|
|
hgroup.long (0x138+0x200)++0x03
|
|
hide.long 0x00 "BUFFER78,Buffer 78 Register"
|
|
in
|
|
hgroup.long (0x13C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER79,Buffer 79 Register"
|
|
in
|
|
hgroup.long (0x140+0x200)++0x03
|
|
hide.long 0x00 "BUFFER80,Buffer 80 Register"
|
|
in
|
|
hgroup.long (0x144+0x200)++0x03
|
|
hide.long 0x00 "BUFFER81,Buffer 81 Register"
|
|
in
|
|
hgroup.long (0x148+0x200)++0x03
|
|
hide.long 0x00 "BUFFER82,Buffer 82 Register"
|
|
in
|
|
hgroup.long (0x14C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER83,Buffer 83 Register"
|
|
in
|
|
hgroup.long (0x150+0x200)++0x03
|
|
hide.long 0x00 "BUFFER84,Buffer 84 Register"
|
|
in
|
|
hgroup.long (0x154+0x200)++0x03
|
|
hide.long 0x00 "BUFFER85,Buffer 85 Register"
|
|
in
|
|
hgroup.long (0x158+0x200)++0x03
|
|
hide.long 0x00 "BUFFER86,Buffer 86 Register"
|
|
in
|
|
hgroup.long (0x15C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER87,Buffer 87 Register"
|
|
in
|
|
hgroup.long (0x160+0x200)++0x03
|
|
hide.long 0x00 "BUFFER88,Buffer 88 Register"
|
|
in
|
|
hgroup.long (0x164+0x200)++0x03
|
|
hide.long 0x00 "BUFFER89,Buffer 89 Register"
|
|
in
|
|
hgroup.long (0x168+0x200)++0x03
|
|
hide.long 0x00 "BUFFER90,Buffer 90 Register"
|
|
in
|
|
hgroup.long (0x16C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER91,Buffer 91 Register"
|
|
in
|
|
hgroup.long (0x170+0x200)++0x03
|
|
hide.long 0x00 "BUFFER92,Buffer 92 Register"
|
|
in
|
|
hgroup.long (0x174+0x200)++0x03
|
|
hide.long 0x00 "BUFFER93,Buffer 93 Register"
|
|
in
|
|
hgroup.long (0x178+0x200)++0x03
|
|
hide.long 0x00 "BUFFER94,Buffer 94 Register"
|
|
in
|
|
hgroup.long (0x17C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER95,Buffer 95 Register"
|
|
in
|
|
hgroup.long (0x180+0x200)++0x03
|
|
hide.long 0x00 "BUFFER96,Buffer 96 Register"
|
|
in
|
|
hgroup.long (0x184+0x200)++0x03
|
|
hide.long 0x00 "BUFFER97,Buffer 97 Register"
|
|
in
|
|
hgroup.long (0x188+0x200)++0x03
|
|
hide.long 0x00 "BUFFER98,Buffer 98 Register"
|
|
in
|
|
hgroup.long (0x18C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER99,Buffer 99 Register"
|
|
in
|
|
hgroup.long (0x190+0x200)++0x03
|
|
hide.long 0x00 "BUFFER100,Buffer 100 Register"
|
|
in
|
|
hgroup.long (0x194+0x200)++0x03
|
|
hide.long 0x00 "BUFFER101,Buffer 101 Register"
|
|
in
|
|
hgroup.long (0x198+0x200)++0x03
|
|
hide.long 0x00 "BUFFER102,Buffer 102 Register"
|
|
in
|
|
hgroup.long (0x19C+0x200)++0x03
|
|
hide.long 0x00 "BUFFER103,Buffer 103 Register"
|
|
in
|
|
hgroup.long (0x1A0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER104,Buffer 104 Register"
|
|
in
|
|
hgroup.long (0x1A4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER105,Buffer 105 Register"
|
|
in
|
|
hgroup.long (0x1A8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER106,Buffer 106 Register"
|
|
in
|
|
hgroup.long (0x1AC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER107,Buffer 107 Register"
|
|
in
|
|
hgroup.long (0x1B0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER108,Buffer 108 Register"
|
|
in
|
|
hgroup.long (0x1B4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER109,Buffer 109 Register"
|
|
in
|
|
hgroup.long (0x1B8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER110,Buffer 110 Register"
|
|
in
|
|
hgroup.long (0x1BC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER111,Buffer 111 Register"
|
|
in
|
|
hgroup.long (0x1C0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER112,Buffer 112 Register"
|
|
in
|
|
hgroup.long (0x1C4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER113,Buffer 113 Register"
|
|
in
|
|
hgroup.long (0x1C8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER114,Buffer 114 Register"
|
|
in
|
|
hgroup.long (0x1CC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER115,Buffer 115 Register"
|
|
in
|
|
hgroup.long (0x1D0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER116,Buffer 116 Register"
|
|
in
|
|
hgroup.long (0x1D4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER117,Buffer 117 Register"
|
|
in
|
|
hgroup.long (0x1D8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER118,Buffer 118 Register"
|
|
in
|
|
hgroup.long (0x1DC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER119,Buffer 119 Register"
|
|
in
|
|
hgroup.long (0x1E0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER120,Buffer 120 Register"
|
|
in
|
|
hgroup.long (0x1E4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER121,Buffer 121 Register"
|
|
in
|
|
hgroup.long (0x1E8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER122,Buffer 122 Register"
|
|
in
|
|
hgroup.long (0x1EC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER123,Buffer 123 Register"
|
|
in
|
|
hgroup.long (0x1F0+0x200)++0x03
|
|
hide.long 0x00 "BUFFER124,Buffer 124 Register"
|
|
in
|
|
hgroup.long (0x1F4+0x200)++0x03
|
|
hide.long 0x00 "BUFFER125,Buffer 125 Register"
|
|
in
|
|
hgroup.long (0x1F8+0x200)++0x03
|
|
hide.long 0x00 "BUFFER126,Buffer 126 Register"
|
|
in
|
|
hgroup.long (0x1FC+0x200)++0x03
|
|
hide.long 0x00 "BUFFER127,Buffer 127 Register"
|
|
in
|
|
tree.end
|
|
endif
|
|
sif cpuis("TMS570LS0232")||cpuis("TMS570LS0714*")||cpuis("TMS570LS0914*")
|
|
endian.le
|
|
endif
|
|
width 0xB
|
|
tree.end
|
|
tree.end
|
|
tree "HET (High End Timer w/Parity)"
|
|
base ad:0xFFF7B800
|
|
width 9.
|
|
group.long 0x00++0x07
|
|
line.long 0x0 "HETGCR,Global Configuration Register"
|
|
bitfld.long 0x00 24. " POWER_DOWN ,HET power-down mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CMS ,Clk_master/Slave" "Slave,Master"
|
|
bitfld.long 0x00 8. " 64_BIT_ACCESS ,64-bit Access" "32-bit,64-bit"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DSF ,Debug Status Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " IS ,Software breakpoints ignore" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " TO ,Turn On/Off" "Off,On"
|
|
line.long 0x4 "HETPFR,Prescaler Factor Register"
|
|
bitfld.long 0x04 8.--10. " LRPFC ,Loop Resolution Pre-scale Factor Code" "1,2,4,8,16,32,?..."
|
|
bitfld.long 0x04 0.--5. " HRPFC ,HR Prescale Factor Code" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
rgroup.long 0x08++0xB
|
|
line.long 0x00 "HETADDR,HET Current Address Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HETADDR[7:0] ,HET Current Address"
|
|
line.long 0x04 "HETOFF1,Offset Index Priority Level 1 Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " Offset1[7:0] ,Indexes the Currently Pending High-Priority Interrupt"
|
|
line.long 0x08 "HETOFF2,Offset Index Priority Level 2 Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " Offset2[7:0] ,Indexes the Currently Pending High-Priority Interrupt"
|
|
group.long 0x14++0x0B
|
|
line.long 0x00 "HETEXC1,Exception Control Register 1"
|
|
bitfld.long 0x00 24. " APCNT_OVRFL_ENA ,APCNT overflow enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " APCNT_UNDRFL_ENA ,APCNT underflow enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PRGM_OVRFL_ENA ,Program overflow enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EPL[2] ,Exception Priority Level bit 2" "2,1"
|
|
bitfld.long 0x00 1. " EPL[1] ,Exception Priority Level bit 1" "2,1"
|
|
bitfld.long 0x00 0. " EPL[0] ,Exception Priority Level bit 0" "2,1"
|
|
line.long 0x04 "HETEXC2,Exception Control Register 2"
|
|
eventfld.long 0x04 2. " APCNT_OVRFL_FLG ,APCNT overflow flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 1. " APCNT_UNDRFL_FLG ,APCNT underflow flag" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " PRGRM_OVERFL_FLG ,Program overflow flag" "Not occurred,Occurred"
|
|
line.long 0x08 "HETPRY,Interrupt Priority Register"
|
|
bitfld.long 0x08 31. " HETPRY[31] ,HET Priority Level Bit[31]" "Level 2,Level 1"
|
|
bitfld.long 0x08 30. " HETPRY[30] ,HET Priority Level Bit[30]" "Level 2,Level 1"
|
|
bitfld.long 0x08 29. " HETPRY[29] ,HET Priority Level Bit[29]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 28. " HETPRY[28] ,HET Priority Level Bit[28]" "Level 2,Level 1"
|
|
bitfld.long 0x08 27. " HETPRY[27] ,HET Priority Level Bit[27]" "Level 2,Level 1"
|
|
bitfld.long 0x08 26. " HETPRY[26] ,HET Priority Level Bit[26]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 25. " HETPRY[25] ,HET Priority Level Bit[25]" "Level 2,Level 1"
|
|
bitfld.long 0x08 24. " HETPRY[24] ,HET Priority Level Bit[24]" "Level 2,Level 1"
|
|
bitfld.long 0x08 23. " HETPRY[23] ,HET Priority Level Bit[23]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 22. " HETPRY[22] ,HET Priority Level Bit[22]" "Level 2,Level 1"
|
|
bitfld.long 0x08 21. " HETPRY[21] ,HET Priority Level Bit[21]" "Level 2,Level 1"
|
|
bitfld.long 0x08 20. " HETPRY[20] ,HET Priority Level Bit[20]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 19. " HETPRY[19] ,HET Priority Level Bit[19]" "Level 2,Level 1"
|
|
bitfld.long 0x08 18. " HETPRY[18] ,HET Priority Level Bit[18]" "Level 2,Level 1"
|
|
bitfld.long 0x08 17. " HETPRY[17] ,HET Priority Level Bit[17]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 16. " HETPRY[16] ,HET Priority Level Bit[16]" "Level 2,Level 1"
|
|
bitfld.long 0x08 15. " HETPRY[15] ,HET Priority Level Bit[15]" "Level 2,Level 1"
|
|
bitfld.long 0x08 14. " HETPRY[14] ,HET Priority Level Bit[14]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 13. " HETPRY[13] ,HET Priority Level Bit[13]" "Level 2,Level 1"
|
|
bitfld.long 0x08 12. " HETPRY[12] ,HET Priority Level Bit[12]" "Level 2,Level 1"
|
|
bitfld.long 0x08 11. " HETPRY[11] ,HET Priority Level Bit[11]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 10. " HETPRY[10] ,HET Priority Level Bit[10]" "Level 2,Level 1"
|
|
bitfld.long 0x08 9. " HETPRY[9] ,HET Priority Level Bit[9]" "Level 2,Level 1"
|
|
bitfld.long 0x08 8. " HETPRY[8] ,HET Priority Level Bit[8]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HETPRY[7] ,HET Priority Level Bit[7]" "Level 2,Level 1"
|
|
bitfld.long 0x08 6. " HETPRY[6] ,HET Priority Level Bit[6]" "Level 2,Level 1"
|
|
bitfld.long 0x08 5. " HETPRY[5] ,HET Priority Level Bit[5]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 4. " HETPRY[4] ,HET Priority Level Bit[4]" "Level 2,Level 1"
|
|
bitfld.long 0x08 3. " HETPRY[3] ,HET Priority Level Bit[3]" "Level 2,Level 1"
|
|
bitfld.long 0x08 2. " HETPRY[2] ,HET Priority Level Bit[2]" "Level 2,Level 1"
|
|
textline " "
|
|
bitfld.long 0x08 1. " HETPRY[1] ,HET Priority Level Bit[1]" "Level 2,Level 1"
|
|
bitfld.long 0x08 0. " HETPRY[0] ,HET Priority Level Bit[0]" "Level 2,Level 1"
|
|
width 9.
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "HETFLG,Interrupt Flag Register"
|
|
eventfld.long 0x00 31. " HETFLAG[31] ,Interrupt Flag Register Bit[31]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 30. " HETFLAG[30] ,Interrupt Flag Register Bit[30]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 29. " HETFLAG[29] ,Interrupt Flag Register Bit[29]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 28. " HETFLAG[28] ,Interrupt Flag Register Bit[28]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 27. " HETFLAG[27] ,Interrupt Flag Register Bit[27]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 26. " HETFLAG[26] ,Interrupt Flag Register Bit[26]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 25. " HETFLAG[25] ,Interrupt Flag Register Bit[25]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 24. " HETFLAG[24] ,Interrupt Flag Register Bit[24]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 23. " HETFLAG[23] ,Interrupt Flag Register Bit[23]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 22. " HETFLAG[22] ,Interrupt Flag Register Bit[22]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 21. " HETFLAG[21] ,Interrupt Flag Register Bit[21]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 20. " HETFLAG[20] ,Interrupt Flag Register Bit[20]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 19. " HETFLAG[19] ,Interrupt Flag Register Bit[19]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 18. " HETFLAG[18] ,Interrupt Flag Register Bit[18]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 17. " HETFLAG[17] ,Interrupt Flag Register Bit[17]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 16. " HETFLAG[16] ,Interrupt Flag Register Bit[16]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 15. " HETFLAG[15] ,Interrupt Flag Register Bit[15]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 14. " HETFLAG[14] ,Interrupt Flag Register Bit[14]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 13. " HETFLAG[13] ,Interrupt Flag Register Bit[13]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 12. " HETFLAG[12] ,Interrupt Flag Register Bit[12]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 11. " HETFLAG[11] ,Interrupt Flag Register Bit[11]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 10. " HETFLAG[10] ,Interrupt Flag Register Bit[10]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 9. " HETFLAG[9] ,Interrupt Flag Register Bit[9]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 8. " HETFLAG[8] ,Interrupt Flag Register Bit[8]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 7. " HETFLAG[7] ,Interrupt Flag Register Bit[7]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 6. " HETFLAG[6] ,Interrupt Flag Register Bit[6]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 5. " HETFLAG[5] ,Interrupt Flag Register Bit[5]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 4. " HETFLAG[4] ,Interrupt Flag Register Bit[4]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 3. " HETFLAG[3] ,Interrupt Flag Register Bit[3]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " HETFLAG[2] ,Interrupt Flag Register Bit[2]" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 1. " HETFLAG[1] ,Interrupt Flag Register Bit[1]" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 0. " HETFLAG[0] ,Interrupt Flag Register Bit[0]" "No interrupt,Interrupt"
|
|
group.long 0x2C++0x0b
|
|
line.long 0x0 "HETHRSH,HR Share Control Register"
|
|
bitfld.long 0x00 11. " HR_SHARE[23/22] ,HR Share 23/22" "Not shared,Shared"
|
|
bitfld.long 0x00 10. " HR_SHARE[21/20] ,HR Share 21/20" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HR_SHARE[19/18] ,HR Share 19/18" "Not shared,Shared"
|
|
bitfld.long 0x00 8. " HR_SHARE[17/16] ,HR Share 17/16" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HR_SHARE[15/14] ,HR Share 15/14" "Not shared,Shared"
|
|
bitfld.long 0x00 6. " HR_SHARE[13/12] ,HR Share 13/12" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 5. " HR_SHARE[11/10] ,HR Share 11/10" "Not shared,Shared"
|
|
bitfld.long 0x00 4. " HR_SHARE[9/8] ,HR Share 9/8" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HR_SHARE[7/6] ,HR Share 7/6" "Not shared,Shared"
|
|
bitfld.long 0x00 2. " HR_SHARE[5/4] ,HR Share 5/4" "Not shared,Shared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HR_SHARE[3/2] ,HR Share 3/2" "Not shared,Shared"
|
|
bitfld.long 0x00 0. " HR_SHARE[1/0] ,HR Share 1/0" "Not shared,Shared"
|
|
line.long 0x04 "HETXOR,HR XOR Control Register"
|
|
bitfld.long 0x04 11. " HR_XOR_SHARE[23/22] ,HR XOR-Share 23/22" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 10. " HR_XOR_SHARE[21/20] ,HR XOR-Share 21/20" "Not XOR-shared,XOR-shared"
|
|
textline " "
|
|
bitfld.long 0x04 9. " HR_XOR_SHARE[19/18] ,HR XOR-Share 19/18" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 8. " HR_XOR_SHARE[17/16] ,HR XOR-Share 17/16" "Not XOR-shared,XOR-shared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HR_XOR_SHARE[15/14] ,HR XOR-Share 15/14" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 6. " HR_XOR_SHARE[13/12] ,HR XOR-Share 13/12" "Not XOR-shared,XOR-shared"
|
|
textline " "
|
|
bitfld.long 0x04 5. " HR_XOR_SHARE[11/10] ,HR XOR-Share 11/10" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 4. " HR_XOR_SHARE[9/8] ,HR XOR-Share 9/8" "Not XOR-shared,XOR-shared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " HR_XOR_SHARE[7/6] ,HR XOR-Share 7/6" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 2. " HR_XOR_SHARE[5/4] ,HR XOR-Share 5/4" "Not XOR-shared,XOR-shared"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HR_XOR_SHARE[3/2] ,HR XOR-Share 3/2" "Not XOR-shared,XOR-shared"
|
|
bitfld.long 0x04 0. " HR_XOR_SHARE[1/0] ,HR XOR-Share 1/0" "Not XOR-shared,XOR-shared"
|
|
line.long 0x08 "HETDIR,HET Direction Register"
|
|
bitfld.long 0x08 31. " HETDIR[31] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 30. " HETDIR[30] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 29. " HETDIR[29] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 28. " HETDIR[28] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 27. " HETDIR[27] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 26. " HETDIR[26] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 25. " HETDIR[25] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 24. " HETDIR[24] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 23. " HETDIR[23] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 22. " HETDIR[22] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 21. " HETDIR[21] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 20. " HETDIR[20] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 19. " HETDIR[19] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 18. " HETDIR[18] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 17. " HETDIR[17] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 16. " HETDIR[16] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 15. " HETDIR[15] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 14. " HETDIR[14] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 13. " HETDIR[13] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 12. " HETDIR[12] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 11. " HETDIR[11] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 10. " HETDIR[10] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 9. " HETDIR[9] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 8. " HETDIR[8] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HETDIR[7] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 6. " HETDIR[6] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 5. " HETDIR[5] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 4. " HETDIR[4] ,Input/output direction" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x08 3. " HETDIR[3] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 2. " HETDIR[2] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 1. " HETDIR[1] ,Input/output direction" "Input,Output"
|
|
bitfld.long 0x08 0. " HETDIR[0] ,Input/output direction" "Input,Output"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "HETDIN,HET Input Data Register"
|
|
bitfld.long 0x00 31. " HETDIN[31] ,HET Data Input Register Pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " HETDIN[30] ,HET Data Input Register Pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " HETDIN[29] ,HET Data Input Register Pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " HETDIN[28] ,HET Data Input Register Pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " HETDIN[27] ,HET Data Input Register Pin 27" "Low,High"
|
|
bitfld.long 0x00 26. " HETDIN[26] ,HET Data Input Register Pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " HETDIN[25] ,HET Data Input Register Pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " HETDIN[24] ,HET Data Input Register Pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HETDIN[23] ,HET Data Input Register Pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " HETDIN[22] ,HET Data Input Register Pin 22" "Low,High"
|
|
bitfld.long 0x00 21. " HETDIN[21] ,HET Data Input Register Pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " HETDIN[20] ,HET Data Input Register Pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HETDIN[19] ,HET Data Input Register Pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " HETDIN[18] ,HET Data Input Register Pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " HETDIN[17] ,HET Data Input Register Pin 17" "Low,High"
|
|
bitfld.long 0x00 16. " HETDIN[16] ,HET Data Input Register Pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HETDIN[15] ,HET Data Input Register Pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " HETDIN[14] ,HET Data Input Register Pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " HETDIN[13] ,HET Data Input Register Pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " HETDIN[12] ,HET Data Input Register Pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " HETDIN[11] ,HET Data Input Register Pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " HETDIN[10] ,HET Data Input Register Pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " HETDIN[9] ,HET Data Input Register Pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " HETDIN[8] ,HET Data Input Register Pin 8" "Low,High"
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textline " "
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bitfld.long 0x00 7. " HETDIN[7] ,HET Data Input Register Pin 7" "Low,High"
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bitfld.long 0x00 6. " HETDIN[6] ,HET Data Input Register Pin 6" "Low,High"
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bitfld.long 0x00 5. " HETDIN[5] ,HET Data Input Register Pin 5" "Low,High"
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bitfld.long 0x00 4. " HETDIN[4] ,HET Data Input Register Pin 4" "Low,High"
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textline " "
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bitfld.long 0x00 3. " HETDIN[3] ,HET Data Input Register Pin 3" "Low,High"
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bitfld.long 0x00 2. " HETDIN[2] ,HET Data Input Register Pin 2" "Low,High"
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bitfld.long 0x00 1. " HETDIN[1] ,HET Data Input Register Pin 1" "Low,High"
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bitfld.long 0x00 0. " HETDIN[0] ,HET Data Input Register Pin 0" "Low,High"
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group.long 0x3C++0x3
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line.long 0x0 "HETDOUT,HET Data Output Register"
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setclrfld.long 0x00 31. 0x04 31. 0x08 31. " HETDOUT[31]_set/clr ,HET Data Output Register Bit[31]" "Low,High"
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setclrfld.long 0x00 30. 0x04 30. 0x08 30. " HETDOUT[30]_set/clr ,HET Data Output Register Bit[30]" "Low,High"
|
|
textline " "
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setclrfld.long 0x00 29. 0x04 29. 0x08 29. " HETDOUT[29]_set/clr ,HET Data Output Register Bit[29]" "Low,High"
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setclrfld.long 0x00 28. 0x04 28. 0x08 28. " HETDOUT[28]_set/clr ,HET Data Output Register Bit[28]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 27. 0x04 27. 0x08 27. " HETDOUT[27]_set/clr ,HET Data Output Register Bit[27]" "Low,High"
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setclrfld.long 0x00 26. 0x04 26. 0x08 26. " HETDOUT[26]_set/clr ,HET Data Output Register Bit[26]" "Low,High"
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textline " "
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setclrfld.long 0x00 25. 0x04 25. 0x08 25. " HETDOUT[25]_set/clr ,HET Data Output Register Bit[25]" "Low,High"
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setclrfld.long 0x00 24. 0x04 24. 0x08 24. " HETDOUT[24]_set/clr ,HET Data Output Register Bit[24]" "Low,High"
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textline " "
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setclrfld.long 0x00 23. 0x04 23. 0x08 23. " HETDOUT[23]_set/clr ,HET Data Output Register Bit[23]" "Low,High"
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setclrfld.long 0x00 22. 0x04 22. 0x08 22. " HETDOUT[22]_set/clr ,HET Data Output Register Bit[22]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 21. 0x04 21. 0x08 21. " HETDOUT[21]_set/clr ,HET Data Output Register Bit[21]" "Low,High"
|
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setclrfld.long 0x00 20. 0x04 20. 0x08 20. " HETDOUT[20]_set/clr ,HET Data Output Register Bit[20]" "Low,High"
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textline " "
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setclrfld.long 0x00 19. 0x04 19. 0x08 19. " HETDOUT[19]_set/clr ,HET Data Output Register Bit[19]" "Low,High"
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setclrfld.long 0x00 18. 0x04 18. 0x08 18. " HETDOUT[18]_set/clr ,HET Data Output Register Bit[18]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 17. 0x04 17. 0x08 17. " HETDOUT[17]_set/clr ,HET Data Output Register Bit[17]" "Low,High"
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setclrfld.long 0x00 16. 0x04 16. 0x08 16. " HETDOUT[16]_set/clr ,HET Data Output Register Bit[16]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 15. 0x04 15. 0x08 15. " HETDOUT[15]_set/clr ,HET Data Output Register Bit[15]" "Low,High"
|
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setclrfld.long 0x00 14. 0x04 14. 0x08 14. " HETDOUT[14]_set/clr ,HET Data Output Register Bit[14]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 13. 0x04 13. 0x08 13. " HETDOUT[13]_set/clr ,HET Data Output Register Bit[13]" "Low,High"
|
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setclrfld.long 0x00 12. 0x04 12. 0x08 12. " HETDOUT[12]_set/clr ,HET Data Output Register Bit[12]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 11. 0x04 11. 0x08 11. " HETDOUT[11]_set/clr ,HET Data Output Register Bit[11]" "Low,High"
|
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setclrfld.long 0x00 10. 0x04 10. 0x08 10. " HETDOUT[10]_set/clr ,HET Data Output Register Bit[10]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 9. 0x04 9. 0x08 9. " HETDOUT[9]_set/clr ,HET Data Output Register Bit[9]" "Low,High"
|
|
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " HETDOUT[8]_set/clr ,HET Data Output Register Bit[8]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 7. 0x04 7. 0x08 7. " HETDOUT[7]_set/clr ,HET Data Output Register Bit[7]" "Low,High"
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setclrfld.long 0x00 6. 0x04 6. 0x08 6. " HETDOUT[6]_set/clr ,HET Data Output Register Bit[6]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 5. 0x04 5. 0x08 5. " HETDOUT[5]_set/clr ,HET Data Output Register Bit[5]" "Low,High"
|
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setclrfld.long 0x00 4. 0x04 4. 0x08 4. " HETDOUT[4]_set/clr ,HET Data Output Register Bit[4]" "Low,High"
|
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textline " "
|
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setclrfld.long 0x00 3. 0x04 3. 0x08 3. " HETDOUT[3]_set/clr ,HET Data Output Register Bit[3]" "Low,High"
|
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setclrfld.long 0x00 2. 0x04 2. 0x08 2. " HETDOUT[2]_set/clr ,HET Data Output Register Bit[2]" "Low,High"
|
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textline " "
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setclrfld.long 0x00 1. 0x04 1. 0x08 1. " HETDOUT[1]_set/clr ,HET Data Output Register Bit[1]" "Low,High"
|
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setclrfld.long 0x00 0. 0x04 0. 0x08 0. " HETDOUT[0]_set/clr ,HET Data Output Register Bit[0]" "Low,High"
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group.long 0x48++0x0B
|
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line.long 0x00 "HETPDR,HET Open Drain Register"
|
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bitfld.long 0x00 31. " HETPDR[31] ,HET Open Drain Bit[31]" "Disabled,Enabled"
|
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bitfld.long 0x00 30. " HETPDR[30] ,HET Open Drain Bit[30]" "Disabled,Enabled"
|
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bitfld.long 0x00 29. " HETPDR[29] ,HET Open Drain Bit[29]" "Disabled,Enabled"
|
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textline " "
|
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bitfld.long 0x00 28. " HETPDR[28] ,HET Open Drain Bit[28]" "Disabled,Enabled"
|
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bitfld.long 0x00 27. " HETPDR[27] ,HET Open Drain Bit[27]" "Disabled,Enabled"
|
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bitfld.long 0x00 26. " HETPDR[26] ,HET Open Drain Bit[26]" "Disabled,Enabled"
|
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textline " "
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bitfld.long 0x00 25. " HETPDR[25] ,HET Open Drain Bit[25]" "Disabled,Enabled"
|
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bitfld.long 0x00 24. " HETPDR[24] ,HET Open Drain Bit[24]" "Disabled,Enabled"
|
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bitfld.long 0x00 23. " HETPDR[23] ,HET Open Drain Bit[23]" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 22. " HETPDR[22] ,HET Open Drain Bit[22]" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " HETPDR[21] ,HET Open Drain Bit[21]" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " HETPDR[20] ,HET Open Drain Bit[20]" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HETPDR[19] ,HET Open Drain Bit[19]" "Disabled,Enabled"
|
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bitfld.long 0x00 18. " HETPDR[18] ,HET Open Drain Bit[18]" "Disabled,Enabled"
|
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bitfld.long 0x00 17. " HETPDR[17] ,HET Open Drain Bit[17]" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HETPDR[16] ,HET Open Drain Bit[16]" "Disabled,Enabled"
|
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bitfld.long 0x00 15. " HETPDR[15] ,HET Open Drain Bit[15]" "Disabled,Enabled"
|
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bitfld.long 0x00 14. " HETPDR[14] ,HET Open Drain Bit[14]" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 13. " HETPDR[13] ,HET Open Drain Bit[13]" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " HETPDR[12] ,HET Open Drain Bit[12]" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " HETPDR[11] ,HET Open Drain Bit[11]" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HETPDR[10] ,HET Open Drain Bit[10]" "Disabled,Enabled"
|
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bitfld.long 0x00 9. " HETPDR[9] ,HET Open Drain Bit[9]" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " HETPDR[8] ,HET Open Drain Bit[8]" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 7. " HETPDR[7] ,HET Open Drain Bit[7]" "Disabled,Enabled"
|
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bitfld.long 0x00 6. " HETPDR[6] ,HET Open Drain Bit[6]" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " HETPDR[5] ,HET Open Drain Bit[5]" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 4. " HETPDR[4] ,HET Open Drain Bit[4]" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HETPDR[3] ,HET Open Drain Bit[3]" "Disabled,Enabled"
|
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bitfld.long 0x00 2. " HETPDR[2] ,HET Open Drain Bit[2]" "Disabled,Enabled"
|
|
textline " "
|
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bitfld.long 0x00 1. " HETPDR[1] ,HET Open Drain Bit[1]" "Disabled,Enabled"
|
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bitfld.long 0x00 0. " HETPDR[0] ,HET Open Drain Bit[0]" "Disabled,Enabled"
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line.long 0x04 "HETPULDIS,HET Pull Disable Register"
|
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bitfld.long 0x04 31. " HETPULDIS[31] ,HET Pull Disable Bit[31]" "No,Yes"
|
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bitfld.long 0x04 30. " HETPULDIS[30] ,HET Pull Disable Bit[30]" "No,Yes"
|
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bitfld.long 0x04 29. " HETPULDIS[29] ,HET Pull Disable Bit[29]" "No,Yes"
|
|
textline " "
|
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bitfld.long 0x04 28. " HETPULDIS[28] ,HET Pull Disable Bit[28]" "No,Yes"
|
|
bitfld.long 0x04 27. " HETPULDIS[27] ,HET Pull Disable Bit[27]" "No,Yes"
|
|
bitfld.long 0x04 26. " HETPULDIS[26] ,HET Pull Disable Bit[26]" "No,Yes"
|
|
textline " "
|
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bitfld.long 0x04 25. " HETPULDIS[25] ,HET Pull Disable Bit[25]" "No,Yes"
|
|
bitfld.long 0x04 24. " HETPULDIS[24] ,HET Pull Disable Bit[24]" "No,Yes"
|
|
bitfld.long 0x04 23. " HETPULDIS[23] ,HET Pull Disable Bit[23]" "No,Yes"
|
|
textline " "
|
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bitfld.long 0x04 22. " HETPULDIS[22] ,HET Pull Disable Bit[22]" "No,Yes"
|
|
bitfld.long 0x04 21. " HETPULDIS[21] ,HET Pull Disable Bit[21]" "No,Yes"
|
|
bitfld.long 0x04 20. " HETPULDIS[20] ,HET Pull Disable Bit[20]" "No,Yes"
|
|
textline " "
|
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bitfld.long 0x04 19. " HETPULDIS[19] ,HET Pull Disable Bit[19]" "No,Yes"
|
|
bitfld.long 0x04 18. " HETPULDIS[18] ,HET Pull Disable Bit[18]" "No,Yes"
|
|
bitfld.long 0x04 17. " HETPULDIS[17] ,HET Pull Disable Bit[17]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 16. " HETPULDIS[16] ,HET Pull Disable Bit[16]" "No,Yes"
|
|
bitfld.long 0x04 15. " HETPULDIS[15] ,HET Pull Disable Bit[15]" "No,Yes"
|
|
bitfld.long 0x04 14. " HETPULDIS[14] ,HET Pull Disable Bit[14]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 13. " HETPULDIS[13] ,HET Pull Disable Bit[13]" "No,Yes"
|
|
bitfld.long 0x04 12. " HETPULDIS[12] ,HET Pull Disable Bit[12]" "No,Yes"
|
|
bitfld.long 0x04 11. " HETPULDIS[11] ,HET Pull Disable Bit[11]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 10. " HETPULDIS[10] ,HET Pull Disable Bit[10]" "No,Yes"
|
|
bitfld.long 0x04 9. " HETPULDIS[9] ,HET Pull Disable Bit[9]" "No,Yes"
|
|
bitfld.long 0x04 8. " HETPULDIS[8] ,HET Pull Disable Bit[8]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HETPULDIS[7] ,HET Pull Disable Bit[7]" "No,Yes"
|
|
bitfld.long 0x04 6. " HETPULDIS[6] ,HET Pull Disable Bit[6]" "No,Yes"
|
|
bitfld.long 0x04 5. " HETPULDIS[5] ,HET Pull Disable Bit[5]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 4. " HETPULDIS[4] ,HET Pull Disable Bit[4]" "No,Yes"
|
|
bitfld.long 0x04 3. " HETPULDIS[3] ,HET Pull Disable Bit[3]" "No,Yes"
|
|
bitfld.long 0x04 2. " HETPULDIS[2] ,HET Pull Disable Bit[2]" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HETPULDIS[1] ,HET Pull Disable Bit[1]" "No,Yes"
|
|
bitfld.long 0x04 0. " HETPULDIS[0] ,HET Pull Disable Bit[0]" "No,Yes"
|
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line.long 0x08 "HETPSL,HET Pull Select Register"
|
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bitfld.long 0x08 31. " HETPSL[31] ,HET Pull Select Bit[31]" "Pull down,Pull up"
|
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bitfld.long 0x08 30. " HETPSL[30] ,HET Pull Select Bit[30]" "Pull down,Pull up"
|
|
bitfld.long 0x08 29. " HETPSL[29] ,HET Pull Select Bit[29]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 28. " HETPSL[28] ,HET Pull Select Bit[28]" "Pull down,Pull up"
|
|
bitfld.long 0x08 27. " HETPSL[27] ,HET Pull Select Bit[27]" "Pull down,Pull up"
|
|
bitfld.long 0x08 26. " HETPSL[26] ,HET Pull Select Bit[26]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 25. " HETPSL[25] ,HET Pull Select Bit[25]" "Pull down,Pull up"
|
|
bitfld.long 0x08 24. " HETPSL[24] ,HET Pull Select Bit[24]" "Pull down,Pull up"
|
|
bitfld.long 0x08 23. " HETPSL[23] ,HET Pull Select Bit[23]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 22. " HETPSL[22] ,HET Pull Select Bit[22]" "Pull down,Pull up"
|
|
bitfld.long 0x08 21. " HETPSL[21] ,HET Pull Select Bit[21]" "Pull down,Pull up"
|
|
bitfld.long 0x08 20. " HETPSL[20] ,HET Pull Select Bit[20]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 19. " HETPSL[19] ,HET Pull Select Bit[19]" "Pull down,Pull up"
|
|
bitfld.long 0x08 18. " HETPSL[18] ,HET Pull Select Bit[18]" "Pull down,Pull up"
|
|
bitfld.long 0x08 17. " HETPSL[17] ,HET Pull Select Bit[17]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 16. " HETPSL[16] ,HET Pull Select Bit[16]" "Pull down,Pull up"
|
|
bitfld.long 0x08 15. " HETPSL[15] ,HET Pull Select Bit[15]" "Pull down,Pull up"
|
|
bitfld.long 0x08 14. " HETPSL[14] ,HET Pull Select Bit[14]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 13. " HETPSL[13] ,HET Pull Select Bit[13]" "Pull down,Pull up"
|
|
bitfld.long 0x08 12. " HETPSL[12] ,HET Pull Select Bit[12]" "Pull down,Pull up"
|
|
bitfld.long 0x08 11. " HETPSL[11] ,HET Pull Select Bit[11]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 10. " HETPSL[10] ,HET Pull Select Bit[10]" "Pull down,Pull up"
|
|
bitfld.long 0x08 9. " HETPSL[9] ,HET Pull Select Bit[9]" "Pull down,Pull up"
|
|
bitfld.long 0x08 8. " HETPSL[8] ,HET Pull Select Bit[8]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 7. " HETPSL[7] ,HET Pull Select Bit[7]" "Pull down,Pull up"
|
|
bitfld.long 0x08 6. " HETPSL[6] ,HET Pull Select Bit[6]" "Pull down,Pull up"
|
|
bitfld.long 0x08 5. " HETPSL[5] ,HET Pull Select Bit[5]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 4. " HETPSL[4] ,HET Pull Select Bit[4]" "Pull down,Pull up"
|
|
bitfld.long 0x08 3. " HETPSL[3] ,HET Pull Select Bit[3]" "Pull down,Pull up"
|
|
bitfld.long 0x08 2. " HETPSL[2] ,HET Pull Select Bit[2]" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x08 1. " HETPSL[1] ,HET Pull Select Bit[1]" "Pull down,Pull up"
|
|
bitfld.long 0x08 0. " HETPSL[0] ,HET Pull Select Bit[0]" "Pull down,Pull up"
|
|
group.long 0x60++0x0F
|
|
line.long 0x0 "HETLPBDIR,HET Loopback Pair Direction Register"
|
|
bitfld.long 0x00 31. " HETLBPTYPE[15] ,Loopback Pair Type Select Bit[15]" "Digital,Analog"
|
|
bitfld.long 0x00 30. " HETLBPTYPE[14] ,Loopback Pair Type Select Bit[14]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 29. " HETLBPTYPE[13] ,Loopback Pair Type Select Bit[13]" "Digital,Analog"
|
|
bitfld.long 0x00 28. " HETLBPTYPE[12] ,Loopback Pair Type Select Bit[12]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 27. " HETLBPTYPE[11] ,Loopback Pair Type Select Bit[11]" "Digital,Analog"
|
|
bitfld.long 0x00 26. " HETLBPTYPE[10] ,Loopback Pair Type Select Bit[10]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HETLBPTYPE[9] ,Loopback Pair Type Select Bit[9]" "Digital,Analog"
|
|
bitfld.long 0x00 24. " HETLBPTYPE[8] ,Loopback Pair Type Select Bit[8]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HETLBPTYPE[7] ,Loopback Pair Type Select Bit[7]" "Digital,Analog"
|
|
bitfld.long 0x00 22. " HETLBPTYPE[6] ,Loopback Pair Type Select Bit[6]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 21. " HETLBPTYPE[5] ,Loopback Pair Type Select Bit[5]" "Digital,Analog"
|
|
bitfld.long 0x00 20. " HETLBPTYPE[4] ,Loopback Pair Type Select Bit[4]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HETLBPTYPE[3] ,Loopback Pair Type Select Bit[3]" "Digital,Analog"
|
|
bitfld.long 0x00 18. " HETLBPTYPE[2] ,Loopback Pair Type Select Bit[2]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HETLBPTYPE[1] ,Loopback Pair Type Select Bit[1]" "Digital,Analog"
|
|
bitfld.long 0x00 16. " HETLBPTYPE[0] ,Loopback Pair Type Select Bit[0]" "Digital,Analog"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HETLBPSEL[15] ,Loopback Pair Select Bit[15]" "Not selected,Selected"
|
|
bitfld.long 0x00 14. " HETLBPSEL[14] ,Loopback Pair Select Bit[14]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HETLBPSEL[13] ,Loopback Pair Select Bit[13]" "Not selected,Selected"
|
|
bitfld.long 0x00 12. " HETLBPSEL[12] ,Loopback Pair Select Bit[12]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " HETLBPSEL[11] ,Loopback Pair Select Bit[11]" "Not selected,Selected"
|
|
bitfld.long 0x00 10. " HETLBPSEL[10] ,Loopback Pair Select Bit[10]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HETLBPSEL[9] ,Loopback Pair Select Bit[9]" "Not selected,Selected"
|
|
bitfld.long 0x00 8. " HETLBPSEL[8] ,Loopback Pair Select Bit[8]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " HETLBPSEL[7] ,Loopback Pair Select Bit[7]" "Not selected,Selected"
|
|
bitfld.long 0x00 6. " HETLBPSEL[6] ,Loopback Pair Select Bit[6]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " HETLBPSEL[5] ,Loopback Pair Select Bit[5]" "Not selected,Selected"
|
|
bitfld.long 0x00 4. " HETLBPSEL[4] ,Loopback Pair Select Bit[4]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HETLBPSEL[3] ,Loopback Pair Select Bit[3]" "Not selected,Selected"
|
|
bitfld.long 0x00 2. " HETLBPSEL[2] ,Loopback Pair Select Bit[2]" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " HETLBPSEL[1] ,Loopback Pair Select Bit[1]" "Not selected,Selected"
|
|
bitfld.long 0x00 0. " HETLBPSEL[0] ,Loopback Pair Select Bit[0]" "Not selected,Selected"
|
|
line.long 0x04 "HETLBPDIR,Loopback Pair Direction Register"
|
|
bitfld.long 0x04 15. " HETLBPDIR[15] ,Loopback Pair Direction Bit[15]" "Input,Output"
|
|
bitfld.long 0x04 14. " HETLBPDIR[14] ,Loopback Pair Direction Bit[14]" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 13. " HETLBPDIR[13] ,Loopback Pair Direction Bit[13]" "Input,Output"
|
|
bitfld.long 0x04 12. " HETLBPDIR[12] ,Loopback Pair Direction Bit[12]" "Input,Output"
|
|
bitfld.long 0x04 11. " HETLBPDIR[11] ,Loopback Pair Direction Bit[11]" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 10. " HETLBPDIR[10] ,Loopback Pair Direction Bit[10]" "Input,Output"
|
|
bitfld.long 0x04 9. " HETLBPDIR[9] ,Loopback Pair Direction Bit[9]" "Input,Output"
|
|
bitfld.long 0x04 8. " HETLBPDIR[8] ,Loopback Pair Direction Bit[8]" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 7. " HETLBPDIR[7] ,Loopback Pair Direction Bit[7]" "Input,Output"
|
|
bitfld.long 0x04 6. " HETLBPDIR[6] ,Loopback Pair Direction Bit[6]" "Input,Output"
|
|
bitfld.long 0x04 5. " HETLBPDIR[5] ,Loopback Pair Direction Bit[5]" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 4. " HETLBPDIR[4] ,Loopback Pair Direction Bit[4]" "Input,Output"
|
|
bitfld.long 0x04 3. " HETLBPDIR[3] ,Loopback Pair Direction Bit[3]" "Input,Output"
|
|
bitfld.long 0x04 2. " HETLBPDIR[2] ,Loopback Pair Direction Bit[2]" "Input,Output"
|
|
textline " "
|
|
bitfld.long 0x04 1. " HETLBPDIR[1] ,Loopback Pair Direction Bit[1]" "Input,Output"
|
|
bitfld.long 0x04 0. " HETLBPDIR[0] ,Loopback Pair Direction Bit[0]" "Input,Output"
|
|
line.long 0x08 "HETPCR,HET Parity Control Register"
|
|
bitfld.long 0x08 16. " HET_STOP ,HET stop execution when a parity error is detected" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " TEST ,TEST" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " PARITY_ENA ,Enable / Disable Parity Checking" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
line.long 0x0C "HETPIEN,HET Parity Interrupt Enable Register"
|
|
bitfld.long 0x0C 0. " INTEN ,Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "HETPIFLG,HET Parity Interrupt Flag Register"
|
|
eventfld.long 0x00 0. " INTFLG ,Interrupt Flag" "Not occurred,Occurred"
|
|
hgroup.long 0x74++0x03
|
|
hide.long 0x00 "HETPAR,HET Parity Address Register"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "LBIST (CPU Self Test Controller)"
|
|
base ad:0xFFFFF800
|
|
width 15.
|
|
group.long 0x00++0x0B
|
|
line.long 0x00 "STCGCR0,STC global control register0"
|
|
hexmask.long.word 0x00 16.--31. 1. " INTCOUNT ,Number of intervals of selftest run"
|
|
bitfld.long 0x00 0. " RS_CNT ,Restart or Continue" "Continue,Restart"
|
|
line.long 0x04 "STCGCR1,STC global control register1"
|
|
bitfld.long 0x04 0.--3. " STC_ENA ,Self test run enable key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
line.long 0x08 "STCTPR,Self Test Run Timeout Counter Preload Register"
|
|
rgroup.long 0x0C++0x0B
|
|
line.long 0x00 "STC_CADDR,STC Current ROM Address Register"
|
|
line.long 0x04 "STCCICR,STC Current Interval Count Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " N ,Interval Number"
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "STCGSTAT,SelfTest Global Status Register"
|
|
eventfld.long 0x00 0. " TEST_DONE ,Test Done" "Not done,Done"
|
|
line.long 0x04 "STCFSTAT,SelfTest Fail Status Register"
|
|
eventfld.long 0x04 2. " TO_ERR ,Timeout Error" "No error,Error"
|
|
eventfld.long 0x04 0. " CPU1_FAIL ,CPU1 failure info" "Not failed,Failed"
|
|
rgroup.long 0x2C++0x0F
|
|
line.long 0x0 "CPU1_CURMISR3,CPU1 Current MISR Register"
|
|
line.long 0x4 "CPU1_CURMISR2,CPU1 Current MISR Register"
|
|
line.long 0x8 "CPU1_CURMISR1,CPU1 Current MISR Register"
|
|
line.long 0xC "CPU1_CURMISR0,CPU1 Current MISR Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "ADC (Analog to Digital Converter)"
|
|
base ad:0xFFF7C000
|
|
width 13.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "ADRSTCR,ADC Reset Control Register"
|
|
bitfld.long 0x00 0. " RESET ,ADC Reset" "No reset,Reset"
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "ADOPMODECR,ADC Operating Mode Control Register"
|
|
bitfld.long 0x00 24. " COS ,Continue on Suspend Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " RAM_TEST_EN ,ADC RAM Test Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ADC_EN ,ADC Enable" "Disabled,Enabled"
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "ADCLOCKCR,ADC Clock Control Register"
|
|
bitfld.long 0x00 0.--4. " PS[4:0] ,ADC Clock Prescaler" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles"
|
|
;section
|
|
if (((d.l((ad:0xFFF7C000+0x0c)))&0x01000201)==0x00000001)
|
|
group.long (0x0c)++0x03
|
|
line.long 0x00 "ADCALCR,ADC Calibration Mode Control Register"
|
|
bitfld.long 0x00 24. " SELF_TEST ,Self-Test Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAL_ST ,Calibration Conversion Start" "No effect/completed,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRIDGE_EN ,Bridge Enable" "Midpoint,Full"
|
|
bitfld.long 0x00 0. " CAL_EN ,Calibration Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HILO ,Test and Reference Source Selection" "(AD_REFHI*R1+AD_REFLO*R2)/(R1+R2),(AD_REFLO*R1+AD_REFHI*R2)/(R1+R2)"
|
|
elif (((d.l((ad:0xFFF7C000+0x0c)))&0x01000201)==0x01000000)
|
|
group.long (0x0c)++0x03
|
|
line.long 0x00 "ADCALCR,ADC Calibration Mode Control Register"
|
|
bitfld.long 0x00 24. " SELF_TEST ,Self-Test Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAL_ST ,Calibration Conversion Start" "No effect/completed,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRIDGE_EN ,Bridge Enable" "Midpoint,Full"
|
|
bitfld.long 0x00 0. " CAL_EN ,Calibration Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HILO ,Test and Reference Source Selection" "(AD_REFLO via R1)||(R2 to Vin),(AD_REFHI via R1)||(R2 to Vin)"
|
|
elif (((d.l((ad:0xFFF7C000+0x0c)))&0x01000201)==0x00000201)
|
|
group.long (0x0c)++0x03
|
|
line.long 0x00 "ADCALCR,ADC Calibration Mode Control Register"
|
|
bitfld.long 0x00 24. " SELF_TEST ,Self-Test Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAL_ST ,Calibration Conversion Start" "No effect/completed,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRIDGE_EN ,Bridge Enable" "Midpoint,Full"
|
|
bitfld.long 0x00 0. " CAL_EN ,Calibration Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HILO ,Test and Reference Source Selection" "AD_REFLO,AD_REFHI"
|
|
elif (((d.l((ad:0xFFF7C000+0x0c)))&0x01000201)==0x01000200)
|
|
group.long (0x0c)++0x03
|
|
line.long 0x00 "ADCALCR,ADC Calibration Mode Control Register"
|
|
bitfld.long 0x00 24. " SELF_TEST ,Self-Test Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAL_ST ,Calibration Conversion Start" "No effect/completed,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRIDGE_EN ,Bridge Enable" "Midpoint,Full"
|
|
bitfld.long 0x00 0. " CAL_EN ,Calibration Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HILO ,Test and Reference Source Selection" "(AD_REFLO via R1)||(R2 to Vin),(AD_REFHI via R1)||(R2 to Vin)"
|
|
else
|
|
group.long (0x0c)++0x03
|
|
line.long 0x00 "ADCALCR,ADC Calibration Mode Control Register"
|
|
bitfld.long 0x00 24. " SELF_TEST ,Self-Test Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " CAL_ST ,Calibration Conversion Start" "No effect/completed,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BRIDGE_EN ,Bridge Enable" "Midpoint,Full"
|
|
bitfld.long 0x00 0. " CAL_EN ,Calibration Enable" "Disabled,Enabled"
|
|
endif
|
|
;section
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "ADEVMODECR,ADC Event Group Operating Mode Control Register"
|
|
bitfld.long 0x00 5. " EV_CHID ,Channel ID Mode for the Event Group" "Forced to 0,ID of A/D channel"
|
|
bitfld.long 0x00 4. " OVR_EV_RAM_IGN ,Overrun Event Group RAM Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EV_8BIT ,Event Group 8-bit result mode" "10-bit,8-bit"
|
|
bitfld.long 0x00 1. " EV_MODE ,Event mode" "Single,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FRZ_EV ,Freeze conversion event group" "Completed,Frozen"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ADG1MODECR,ADC Group1 Operating Mode Control Register"
|
|
bitfld.long 0x00 5. " G1_CHID ,Channel ID Mode for the Group 1" "Forced to 0,ID of A/D channel"
|
|
bitfld.long 0x00 4. " OVR_G1_RAM_IGN ,Overrun Group 1 RAM Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1_HW_TRIG ,Group 1 Hardware Triggered" "Software,Event"
|
|
bitfld.long 0x00 2. " G1_8BIT ,Group1 8-bit result mode" "10-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G1_MODE ,Group 1 mode" "Single,Continuous"
|
|
bitfld.long 0x00 0. " FRZ_G1 ,Freeze Conversion group 1" "Completed,Frozen"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "ADG2MODECR,ADC Group2 Operating Mode Control Register"
|
|
bitfld.long 0x00 5. " G2_CHID ,Channel ID Mode for the Group 2" "Forced to 0,ID of A/D channel"
|
|
bitfld.long 0x00 4. " OVR_G2_RAM_IGN ,Overrun Group 2 RAM Ignore" "Not ignored,Ignored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G2_HW_TRIG ,Group 2 Hardware Triggered" "Software,Event"
|
|
bitfld.long 0x00 2. " G2_8BIT ,Group2 8-bit result mode" "10-bit,8-bit"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G2_MODE ,Group 2 Mode" "Single,Continuous"
|
|
bitfld.long 0x00 0. " FRZ_G2 ,Freeze Conversion Group 2" "Completed,Frozen"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "ADEVSRC,ADC Event Group Trigger Source Select Register"
|
|
bitfld.long 0x00 3. " EV_EDG_SEL ,ADC Event Group Trigger Edge Select" "High/low,Low/high"
|
|
bitfld.long 0x00 0.--2. " EVSRC[2:0] ,Event Group Trigger Source Select" "ADEVT,HET[1],HET[3],HET[16],HET[18],HET[24],HET[26],HET[28]"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "ADG1SRC,ADC Group1 Trigger Source Select Register"
|
|
bitfld.long 0x00 3. " G1_EDG_SEL ,ADC Group 1 Trigger Edge Select" "High/low,Low/high"
|
|
bitfld.long 0x00 0.--2. " G1SRC[2:0] ,Group 1 Trigger Source Select" "ADEVT,HET[1],HET[3],HET[16],HET[18],HET[24],HET[26],HET[28]"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "ADG2SRC,ADC Group2 Trigger Source Select Register"
|
|
bitfld.long 0x00 3. " G2_EDG_SEL ,ADC Group 2 Trigger Edge Select" "High/low,Low/high"
|
|
bitfld.long 0x00 0.--2. " G2SRC[2:0] ,Group 2 Trigger Source Select" "ADEVT,HET[1],HET[3],HET[16],HET[18],HET[24],HET[26],HET[28]"
|
|
;section
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "ADEVINTENA,ADC Event Group Interrupt Enable Control Register"
|
|
bitfld.long 0x00 3. " EV_END_INT_EN ,Event Group Conversion End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EV_OVR_INT_EN ,Event Group Memory Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EV_THR_INT_EN ,Event Group Memory Threshold Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ADG1INTENA,ADC Group1 Interrupt Enable Control Register"
|
|
bitfld.long 0x00 3. " G1_END_INT_EN ,Event Group Conversion End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " G1_OVR_INT_EN ,Group 1 Memory Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " G1_THR_INT_EN ,Group 1 Memory Threshold Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "ADG2INTENA,ADC Group2 Interrupt Enable Control Register"
|
|
bitfld.long 0x00 3. " G2_END_INT_EN ,Event Group Conversion End Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " G2_OVR_INT_EN ,Group 2 Memory Overrun Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " G2_THR_INT_EN ,Group 2 Memory Threshold Interrupt Enable" "Disabled,Enabled"
|
|
;section
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "ADEVINTFLG,ADC Event Group Interrupt Flag Register"
|
|
eventfld.long 0x00 3. " EV_END ,Event Group Conversion End" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " EV_MEM_EMPTY ,Event Group FIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EV_MEM_OVERFLOW ,Event Group Memory Overrun Flag" "No overrun,Overrun"
|
|
eventfld.long 0x00 0. " EV_THR_INT_FLAG ,Event Group Threshold Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ADG1INTFLG,ADC Group1 Interrupt Flag Register"
|
|
eventfld.long 0x00 3. " G1_END ,Group 1 Conversion End" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " AD_G1_MEM_EMPTY ,Group1 FIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G1_MEM_OVERFLOW ,Event Group Memory Overrun Flag" "No overrun,Overrun"
|
|
eventfld.long 0x00 0. " G1_THR_INT_FLAG ,Group 1 Threshold Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "ADG2INTFLG,ADC Group2 Interrupt Flag Register"
|
|
eventfld.long 0x00 3. " G2_END ,Group 2 Conversion End" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " AD_G1_MEM_EMPTY ,Group2 FIFO Empty Status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G2_MEM_OVERFLOW ,Group 2 Memory Overrun Flag" "No overrun,Overrun"
|
|
eventfld.long 0x00 0. " G2_THR_INT_FLAG ,Group 2 Threshold Interrupt Flag" "No interrupt,Interrupt"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "ADEVTHRINTCR,ADC Event Group Threshold Interrupt Control Register"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SIGN_EXTENSION ,Sign Extension"
|
|
hexmask.long.word 0x00 0.--8. 1. " EVTHR[8:0] ,Event Group Interrupt Threshold Counter"
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "ADG1THRINTCR,ADC Group1 Threshold Interrupt Control Register"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SIGN_EXTENSION ,Sign Extension"
|
|
hexmask.long.word 0x00 0.--8. 1. " G1THR[8:0] ,Group 1 Interrupt Threshold Counter"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "ADG2THRINTCR,ADC Group2 Threshold Interrupt Control Register"
|
|
hexmask.long.byte 0x00 9.--15. 1. " SIGN_EXTENSION ,Sign Extension"
|
|
hexmask.long.word 0x00 0.--8. 1. " G2THR[8:0] ,Group 2 Interrupt Threshold Counter"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "ADBNDCR,ADC Results Memory Configuration Register"
|
|
hexmask.long.word 0x00 16.--24. 1. " BNDA[8:0] ,Buffer Boundary A"
|
|
hexmask.long.word 0x00 0.--8. 1. " BNDB[8:0] ,Buffer Boundary B"
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "ADBNDEND,ADC Results Memory Size Configuration Register"
|
|
bitfld.long 0x00 16. " BUF_INIT_ACTIVE ,Indicates the Status of the ADC RAM Intialization Process" "Not initialized,Initialized"
|
|
bitfld.long 0x00 0.--2. " BNDEND[2:0] ,Buffer End Boundary" "16 words,32 words,64 words,128 words,192 words,256 words,512 words,1024 words"
|
|
;section
|
|
width 8.
|
|
tree "ADC Sample Control Registers"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "ADEVSAMP,ADC Event Group Sampling Time Configuration Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " EVACQ[11:0] ,Event Group Acquisition Prescale Bits"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "ADG1SAMP,ADC Group1 Sampling Time Configuration Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " G1ACQ[11:0] ,Group 1 Acquisition Prescale Bits"
|
|
group.long 0x68++0x3
|
|
line.long 0x0 "ADG2SAMP,ADC Group2 Sampling Time Configuration Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " G2ACQ[11:0] ,Group 2 Acquisition Prescale Bits"
|
|
tree.end
|
|
;section
|
|
tree "ADC Status Registers"
|
|
width 9.
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "ADEVSR,ADC Event Group Status Register"
|
|
bitfld.long 0x00 3. " EV_MEM_EMPTY ,Event Group Memory Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " EV_BUSY ,Event Group Conversion-Busy Flag" "Not active,Busy"
|
|
bitfld.long 0x00 1. " EV_STOP ,Event Group Conversion Stopped Flag" "Not frozen,Frozen"
|
|
textline " "
|
|
eventfld.long 0x00 0. " EV_END ,Event Conversion-Ended Flag R/W" "Not completed,Completed"
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "ADG1SR,ADC Group1 Status Register"
|
|
bitfld.long 0x00 3. " G1_MEM_EMPTY ,Group 1 Memory Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " G1_BUSY ,Group 1 Conversion-Busy Flag" "Not active,Busy"
|
|
bitfld.long 0x00 1. " G1_STOP ,Group 1 Conversion Stopped Flag" "Not frozen,Frozen"
|
|
textline " "
|
|
eventfld.long 0x00 0. " G1_END ,Group 1 Conversion-Ended Flag" "Not completed,Completed"
|
|
group.long 0x74++0x3
|
|
line.long 0x0 "ADG2SR,ADC Group2 Status Register"
|
|
bitfld.long 0x00 3. " G2_MEM_EMPTY ,Group 2 Memory Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 2. " G2_BUSY ,Group 2 Conversion-Busy Flag" "Not active,Busy"
|
|
bitfld.long 0x00 1. " G2_STOP ,Group 2 Conversion Stopped Flag" "Not frozen,Frozen"
|
|
textline " "
|
|
eventfld.long 0x00 0. " G2_END ,Group 2 conversion-ended flag" "Not completed,Completed"
|
|
tree.end
|
|
;section
|
|
tree "ADC Selection Control Registers"
|
|
width 12.
|
|
group.long 0x78++0x3
|
|
line.long 0x0 "ADEVSEL,ADC Event Group Channel Select Register"
|
|
bitfld.long 0x00 15. " EVCHNSEL[15] ,A/D Event Channel 15 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 14. " EVCHNSEL[14] ,A/D Event Channel 14 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EVCHNSEL[13] ,A/D Event Channel 13 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 12. " EVCHNSEL[12] ,A/D Event Channel 12 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EVCHNSEL[11] ,A/D Event Channel 11 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 10. " EVCHNSEL[10] ,A/D Event Channel 10 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EVCHNSEL[9] ,A/D Event Channel 9 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 8. " EVCHNSEL[8] ,A/D Event Channel 8 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EVCHNSEL[7] ,A/D Event Channel 7 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 6. " EVCHNSEL[6] ,A/D Event Channel 6 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EVCHNSEL[5] ,A/D Event Channel 5 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 4. " EVCHNSEL[4] ,A/D Event Channel 4 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EVCHNSEL[3] ,A/D Event Channel 3 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " EVCHNSEL[2] ,A/D Event Channel 2 Selection Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EVCHNSEL[1] ,A/D Event Channel 1 Selection Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 0. " EVCHNSEL[0] ,A/D Event Channel 0 Selection Bit" "Not converted,Converted"
|
|
group.long 0x7C++0x3
|
|
line.long 0x0 "ADG1SEL,ADC Group1 Channel Select Register"
|
|
bitfld.long 0x00 15. " G1CHNSEL[15] ,A/D Channel 15 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 14. " G1CHNSEL[14] ,A/D Channel 14 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " G1CHNSEL[13] ,A/D Channel 13 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 12. " G1CHNSEL[12] ,A/D Channel 12 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " G1CHNSEL[11] ,A/D Channel 11 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 10. " G1CHNSEL[10] ,A/D Channel 10 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " G1CHNSEL[9] ,A/D Channel 9 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 8. " G1CHNSEL[8] ,A/D Channel 8 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " G1CHNSEL[7] ,A/D Channel 7 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 6. " G1CHNSEL[6] ,A/D Channel 6 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " G1CHNSEL[5] ,A/D Channel 5 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 4. " G1CHNSEL[4] ,A/D Channel 4 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G1CHNSEL[3] ,A/D Channel 3 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " G1CHNSEL[2] ,A/D Channel 2 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G1CHNSEL[1] ,A/D Channel 1 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 0. " G1CHNSEL[0] ,A/D Channel 0 Enable Bit" "Not converted,Converted"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "ADG2SEL,ADC Group2 Channel Select Register"
|
|
bitfld.long 0x00 15. " G2CHNSEL[15] ,A/D Channel 15 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 14. " G2CHNSEL[14] ,A/D Channel 14 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 13. " G2CHNSEL[13] ,A/D Channel 13 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 12. " G2CHNSEL[12] ,A/D Channel 12 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 11. " G2CHNSEL[11] ,A/D Channel 11 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 10. " G2CHNSEL[10] ,A/D Channel 10 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 9. " G2CHNSEL[9] ,A/D Channel 9 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 8. " G2CHNSEL[8] ,A/D Channel 8 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 7. " G2CHNSEL[7] ,A/D Channel 7 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 6. " G2CHNSEL[6] ,A/D Channel 6 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " G2CHNSEL[5] ,A/D Channel 5 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 4. " G2CHNSEL[4] ,A/D Channel 4 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " G2CHNSEL[3] ,A/D Channel 3 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 2. " G2CHNSEL[2] ,A/D Channel 2 Enable Bit" "Not converted,Converted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " G2CHNSEL[1] ,A/D Channel 1 Enable Bit" "Not converted,Converted"
|
|
bitfld.long 0x00 0. " G2CHNSEL[0] ,A/D Channel 0 Enable Bit" "Not converted,Converted"
|
|
tree.end
|
|
;section
|
|
textline " "
|
|
group.long 0x84++0x3
|
|
line.long 0x0 "ADCALR,ADC Calibration and Error Offset Correction Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " CALR[11:0] ,Calibration Bits"
|
|
rgroup.long 0x8C++0x3
|
|
line.long 0x0 "ADLASTCONV,ADC Channel Last Conversion Value Register"
|
|
bitfld.long 0x00 31. " IN[31] ,Digital input pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " IN[30] ,Digital input pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " IN[29] ,Digital input pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " IN[28] ,Digital input pin 28" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " IN[27] ,Digital input pin 27" "Low,High"
|
|
bitfld.long 0x00 26. " IN[26] ,Digital input pin 26" "Low,High"
|
|
bitfld.long 0x00 25. " IN[25] ,Digital input pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " IN[24] ,Digital input pin 24" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " IN[23] ,Digital input pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " IN[22] ,Digital input pin 22" "Low,High"
|
|
bitfld.long 0x00 21. " IN[21] ,Digital input pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " IN[20] ,Digital input pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IN[19] ,Digital input pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " IN[18] ,Digital input pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " IN[17] ,Digital input pin 17" "Low,High"
|
|
bitfld.long 0x00 16. " IN[16] ,Digital input pin 16" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " IN[15] ,Digital input pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " IN[14] ,Digital input pin 14" "Low,High"
|
|
bitfld.long 0x00 13. " IN[13] ,Digital input pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " IN[12] ,Digital input pin 12" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IN[11] ,Digital input pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " IN[10] ,Digital input pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " IN[9] ,Digital input pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " IN[8] ,Digital input pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IN[7] ,Digital input pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " IN[6] ,Digital input pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " IN[5] ,Digital input pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " IN[4] ,Digital input pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " IN[3] ,Digital input pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " IN[2] ,Digital input pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " IN[1] ,Digital input pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " IN[0] ,Digital input pin 0" "Low,High"
|
|
;section
|
|
tree "ADC Buffer Control Registers"
|
|
width 16.
|
|
hgroup.long 0x90++0x3
|
|
hide.long 0x0 "ADEVBUFFER0,ADC Event Group Results FIFO 0"
|
|
in
|
|
hgroup.long 0x94++0x3
|
|
hide.long 0x0 "ADEVBUFFER1,ADC Event Group Results FIFO 1"
|
|
in
|
|
hgroup.long 0x98++0x3
|
|
hide.long 0x0 "ADEVBUFFER2,ADC Event Group Results FIFO 2"
|
|
in
|
|
hgroup.long 0x9C++0x3
|
|
hide.long 0x0 "ADEVBUFFER3,ADC Event Group Results FIFO 3"
|
|
in
|
|
hgroup.long 0xA0++0x3
|
|
hide.long 0x0 "ADEVBUFFER4,ADC Event Group Results FIFO 4"
|
|
in
|
|
hgroup.long 0xA4++0x3
|
|
hide.long 0x0 "ADEVBUFFER5,ADC Event Group Results FIFO 5"
|
|
in
|
|
hgroup.long 0xA8++0x3
|
|
hide.long 0x0 "ADEVBUFFER6,ADC Event Group Results FIFO 6"
|
|
in
|
|
hgroup.long 0xAC++0x3
|
|
hide.long 0x0 "ADEVBUFFER7,ADC Event Group Results FIFO 7"
|
|
in
|
|
hgroup.long 0xB0++0x3
|
|
hide.long 0x0 "ADG1BUFFER0,ADC Group1 Results FIFO 0"
|
|
in
|
|
hgroup.long 0xB4++0x3
|
|
hide.long 0x0 "ADG1BUFFER1,ADC Group1 Results FIFO 1"
|
|
in
|
|
hgroup.long 0xB8++0x3
|
|
hide.long 0x0 "ADG1BUFFER2,ADC Group1 Results FIFO 2"
|
|
in
|
|
hgroup.long 0xBC++0x3
|
|
hide.long 0x0 "ADG1BUFFER3,ADC Group1 Results FIFO 3"
|
|
in
|
|
hgroup.long 0xC0++0x3
|
|
hide.long 0x0 "ADG1BUFFER4,ADC Group1 Results FIFO 4"
|
|
in
|
|
hgroup.long 0xC4++0x3
|
|
hide.long 0x0 "ADG1BUFFER5,ADC Group1 Results FIFO 5"
|
|
in
|
|
hgroup.long 0xC8++0x3
|
|
hide.long 0x0 "ADG1BUFFER6,ADC Group1 Results FIFO 6"
|
|
in
|
|
hgroup.long 0xCC++0x3
|
|
hide.long 0x0 "ADG1BUFFER7,ADC Group1 Results FIFO 7"
|
|
in
|
|
hgroup.long 0xD0++0x3
|
|
hide.long 0x0 "ADG2BUFFER0,ADC Group2 Results FIFO 0"
|
|
in
|
|
hgroup.long 0xD4++0x3
|
|
hide.long 0x0 "ADG2BUFFER1,ADC Group2 Results FIFO 1"
|
|
in
|
|
hgroup.long 0xD8++0x3
|
|
hide.long 0x0 "ADG2BUFFER2,ADC Group2 Results FIFO 2"
|
|
in
|
|
hgroup.long 0xDC++0x3
|
|
hide.long 0x0 "ADG2BUFFER3,ADC Group2 Results FIFO 3"
|
|
in
|
|
hgroup.long 0xE0++0x3
|
|
hide.long 0x0 "ADG2BUFFER4,ADC Group2 Results FIFO 4"
|
|
in
|
|
hgroup.long 0xE4++0x3
|
|
hide.long 0x0 "ADG2BUFFER5,ADC Group2 Results FIFO 5"
|
|
in
|
|
hgroup.long 0xE8++0x3
|
|
hide.long 0x0 "ADG2BUFFER6,ADC Group2 Results FIFO 6"
|
|
in
|
|
hgroup.long 0xEC++0x3
|
|
hide.long 0x0 "ADG2BUFFER7,ADC Group2 Results FIFO 7"
|
|
in
|
|
group.long 0xF0++0x3
|
|
line.long 0x0 "ADEVEMUBUFFER,ADC Event Group Results Emulation FIFO"
|
|
bitfld.long 0x00 15. " EV_EMPTY ,Event Group FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 10.--14. " EVCHID[4:0] ,EVCHID" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,Channel 9,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,Channel 16,Channel 17,Channel 18,Channel 19,Channel 20,Channel 21,Channel 22,Channel 23,Channel 24,Channel 25,Channel 26,Channel 27,Channel 28,Channel 29,Channel 30,Channel 31"
|
|
hexmask.long.word 0x00 0.--9. 1. " EVDR[9:0] ,Event Group Digital Result"
|
|
group.long 0xF4++0x3
|
|
line.long 0x0 "ADG1EMUBUFFER,ADC Group1 Results Emulation FIFO"
|
|
bitfld.long 0x00 15. " G1_EMPTY ,Group 1 FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 10.--14. " G1CHID[4:0] ,G1CHID" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,Channel 9,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,Channel 16,Channel 17,Channel 18,Channel 19,Channel 20,Channel 21,Channel 22,Channel 23,Channel 24,Channel 25,Channel 26,Channel 27,Channel 28,Channel 29,Channel 30,Channel 31"
|
|
hexmask.long.word 0x00 0.--9. 1. " G1DR[9:0] ,Group 1 Digital Result"
|
|
group.long 0xF8++0x3
|
|
line.long 0x0 "ADG2EMUBUFFER,ADC Group2 Results Emulation FIFO"
|
|
bitfld.long 0x00 15. " G2_EMPTY ,Group 2 FIFO Empty" "Not empty,Empty"
|
|
bitfld.long 0x00 10.--14. " G2CHID[4:0] ,G2CHID" "Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Channel 8,Channel 9,Channel 10,Channel 11,Channel 12,Channel 13,Channel 14,Channel 15,Channel 16,Channel 17,Channel 18,Channel 19,Channel 20,Channel 21,Channel 22,Channel 23,Channel 24,Channel 25,Channel 26,Channel 27,Channel 28,Channel 29,Channel 30,Channel 31"
|
|
hexmask.long.word 0x00 0.--9. 1. " G2DR[9:0] ,Group 2 Digital Result"
|
|
tree.end
|
|
;section
|
|
width 12.
|
|
tree "ADC ADEVT Pin Control Registers"
|
|
group.long 0xFC++0x3
|
|
line.long 0x0 "ADEVTDIR,ADC ADEVT Pin Direction Control Register"
|
|
bitfld.long 0x00 0. " ADEVT_DIR ,ADEVT Pin Direction Selection" "Output disabled,Output enabled"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "ADEVTOUT,ADC ADEVT Pin Output Value Control Register"
|
|
bitfld.long 0x00 0. " ADEVT_OUT ,ADEVT Pin Data Output" "Low,High"
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "ADEVTIN,ADC ADEVT Pin Input Value Register"
|
|
bitfld.long 0x00 0. " ADEVT_IN ,ADEVT Pin Input Value" "Low,High"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "ADEVTSET,ADC ADEVT Pin Set Register"
|
|
bitfld.long 0x00 0. " ADEVT_SET ,ADEVT Pin Set" "Low/No effect,High/Set"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "ADEVTCLR,ADC ADEVT Pin Clear Register"
|
|
eventfld.long 0x00 0. " ADEVT_CLR ,ADEVT Pin Clear" "Low/No effect,High/CLear"
|
|
group.long 0x110++0x3
|
|
line.long 0x0 "ADEVTPDR,ADC ADEVT Pin Open Drain Enable Register"
|
|
bitfld.long 0x00 0. " ADEVT_PDR ,ADEVT Pin Open-Drain Enable" "Disabled,Enabled"
|
|
if (((d.l((ad:0xFFF7C000+0xfc)))&0x01)==0x00)
|
|
group.long 0x114++0x3
|
|
line.long 0x0 "ADEVTPDIS,ADC ADEVT Pin Pull Control Disable Register"
|
|
bitfld.long 0x00 0. " ADEVT_PDIS ,ADEVT Pin Pull Control Enable" "Enabled,Disabled"
|
|
else
|
|
hgroup.long 0x114++0x3
|
|
hide.long 0x0 "ADEVTPDIS,ADC ADEVT Pin Pull Control Disable Register"
|
|
endif
|
|
group.long 0x118++0x3
|
|
line.long 0x0 "ADEVTPSEL,ADC ADEVT Pin Pull Control Select Register"
|
|
bitfld.long 0x00 0. " ADEVT_PSEL ,ADEVT Pull Select" "Pull-down,Pull-up"
|
|
tree.end
|
|
;section
|
|
width 15.
|
|
tree "ADC Sampling Capacitor Discharge Mode Control Registers"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "ADEVSAMPDISEN,ADC Event Group Sample Cap Discharge Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " EV_SAMP_DIS_CYC[7:0] ,ADC Sampling Capacitor is Dicharged Cycles"
|
|
bitfld.long 0x00 0. " EV_SAMP_DIS_EN ,Sampling Capacitor Discharge Mode" "Disabled,Enabled"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "ADG1SAMPDISEN,ADC Group1 Sample Cap Discharge Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " G1_SAMP_DIS_CYC[7:0] ,ADC Sampling Capacitor is Dicharged Cycles"
|
|
bitfld.long 0x00 0. " G1_SAMP_DIS_EN ,Sampling Capacitor Discharge Mode" "Disabled,Enabled"
|
|
group.long 0x124++0x3
|
|
line.long 0x0 "ADG2SAMPDISEN,ADC Group2 Sample Cap Discharge Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " G2_SAMP_DIS_CYC[7:0] ,ADC Sampling Capacitor is Dicharged Cycles"
|
|
bitfld.long 0x00 0. " G2_SAMP_DIS_EN ,Sampling Capacitor Discharge Mode" "Disabled,Enabled"
|
|
tree.end
|
|
;section
|
|
tree "ADC Interrupt Control Registers"
|
|
width 14.
|
|
group.long 0x128++0x7
|
|
line.long 0x0 "ADMAGINT1,ADC Magnitude Compare Interrupt Control Registers 1"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID1 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR1 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID1 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP1 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT1 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG1MASK,ADC Magnitude Compare Mask 1"
|
|
bitfld.long 0x04 9. " MAG1_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 1 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG1_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 1 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG1_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 1 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG1_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 1 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG1_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 1 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG1_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 1 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG1_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 1 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG1_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 1 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG1_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 1 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG1_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 1 Mask 0" "Not masked,Masked"
|
|
group.long 0x130++0x7
|
|
line.long 0x0 "ADMAGINT2,ADC Magnitude Compare Interrupt Control Registers 2"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID2 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR2 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID2 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP2 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT2 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG2MASK,ADC Magnitude Compare Mask 2"
|
|
bitfld.long 0x04 9. " MAG2_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 2 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG2_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 2 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG2_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 2 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG2_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 2 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG2_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 2 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG2_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 2 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG2_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 2 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG2_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 2 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG2_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 2 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG2_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 2 Mask 0" "Not masked,Masked"
|
|
group.long 0x138++0x7
|
|
line.long 0x0 "ADMAGINT3,ADC Magnitude Compare Interrupt Control Registers 3"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID3 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR3 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID3 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP3 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT3 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG3MASK,ADC Magnitude Compare Mask 3"
|
|
bitfld.long 0x04 9. " MAG3_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 3 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG3_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 3 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG3_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 3 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG3_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 3 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG3_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 3 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG3_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 3 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG3_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 3 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG3_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 3 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG3_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 3 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG3_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 3 Mask 0" "Not masked,Masked"
|
|
group.long 0x140++0x7
|
|
line.long 0x0 "ADMAGINT4,ADC Magnitude Compare Interrupt Control Registers 4"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID4 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR4 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID4 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP4 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT4 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG4MASK,ADC Magnitude Compare Mask 4"
|
|
bitfld.long 0x04 9. " MAG4_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 4 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG4_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 4 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG4_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 4 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG4_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 4 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG4_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 4 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG4_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 4 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG4_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 4 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG4_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 4 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG4_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 4 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG4_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 4 Mask 0" "Not masked,Masked"
|
|
group.long 0x148++0x7
|
|
line.long 0x0 "ADMAGINT5,ADC Magnitude Compare Interrupt Control Registers 5"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID5 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR5 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID5 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP5 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT5 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG5MASK,ADC Magnitude Compare Mask 5"
|
|
bitfld.long 0x04 9. " MAG5_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 5 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG5_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 5 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG5_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 5 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG5_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 5 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG5_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 5 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG5_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 5 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG5_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 5 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG5_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 5 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG5_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 5 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG5_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 5 Mask 0" "Not masked,Masked"
|
|
group.long 0x150++0x7
|
|
line.long 0x0 "ADMAGINT6,ADC Magnitude Compare Interrupt Control Registers 6"
|
|
bitfld.long 0x00 26.--30. " MAG_CHID6 ,Channel number for which the conversion result needs to be monitored by the ADC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x00 16.--25. 1. " MAG_THR6 ,Compare value which the ADC will use for the comparison with the MAG_CHIDx channels conversion result"
|
|
bitfld.long 0x00 8.--12. " COMP_CHID6 ,Channel number whose last conversion result is compared with the MAG_CHIDx channels conversion result" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHN/THR_COMP6 ,Channel OR Threshold comparison" "Fixed,Last"
|
|
bitfld.long 0x00 0. " CMP_GE/LT6 ,Greater than or equal to OR Less than" "Lower,Greater"
|
|
line.long 0x04 "ADMAG6MASK,ADC Magnitude Compare Mask 6"
|
|
bitfld.long 0x04 9. " MAG6_INT_MASK[9] ,Comparison for the Magnitude Compare Interrupt 6 Mask 9" "Not masked,Masked"
|
|
bitfld.long 0x04 8. " MAG6_INT_MASK[8] ,Comparison for the Magnitude Compare Interrupt 6 Mask 8" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 7. " MAG6_INT_MASK[7] ,Comparison for the Magnitude Compare Interrupt 6 Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x04 6. " MAG6_INT_MASK[6] ,Comparison for the Magnitude Compare Interrupt 6 Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 5. " MAG6_INT_MASK[5] ,Comparison for the Magnitude Compare Interrupt 6 Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x04 4. " MAG6_INT_MASK[4] ,Comparison for the Magnitude Compare Interrupt 6 Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 3. " MAG6_INT_MASK[3] ,Comparison for the Magnitude Compare Interrupt 6 Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x04 2. " MAG6_INT_MASK[2] ,Comparison for the Magnitude Compare Interrupt 6 Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x04 1. " MAG6_INT_MASK[1] ,Comparison for the Magnitude Compare Interrupt 6 Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x04 0. " MAG6_INT_MASK[0] ,Comparison for the Magnitude Compare Interrupt 6 Mask 0" "Not masked,Masked"
|
|
group.long 0x160++0x3
|
|
line.long 0x0 "ADMAGINTFLG,ADC Magnitude Compare Interrupt Flag"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " MAG_INT_INT6_set/clr ,Magnitude Compare Interrupt Flag 6" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " MAG_INT_INT5_set/clr ,Magnitude Compare Interrupt Flag 5" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " MAG_INT_INT4_set/clr ,Magnitude Compare Interrupt Flag 4" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MAG_INT_INT3_set/clr ,Magnitude Compare Interrupt Flag 3" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " MAG_INT_INT2_set/clr ,Magnitude Compare Interrupt Flag 2" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " MAG_INT_INT1_set/clr ,Magnitude Compare Interrupt Flag 1" "No interrupt,Interrupt"
|
|
hgroup.long 0x164++0x3
|
|
hide.long 0x0 "ADMAGINTOFF,ADC Magnitude Compare Interrupt Offset"
|
|
in
|
|
tree.end
|
|
;section
|
|
width 15.
|
|
tree "ADC RAM Control Registers"
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "ADEVFIFORESETCR,ADC Event Group FIFO Reset Control Register"
|
|
bitfld.long 0x00 0. " EV_FIFO_RESET ,Reset the ADC Event Group FIFO" "No reset,Reset"
|
|
group.long 0x16C++0x3
|
|
line.long 0x0 "ADG1FIFORESETCR,ADC Group1 FIFO Reset Control Register"
|
|
bitfld.long 0x00 0. " G1_FIFO_RESET ,Reset the ADC Group 1 FIFO" "No reset,Reset"
|
|
group.long 0x170++0x3
|
|
line.long 0x0 "ADG2FIFORESETCR,ADC Group2 FIFO Reset Control Register"
|
|
bitfld.long 0x00 0. " G2_FIFO_RESET ,Reset the ADC Group 2 FIFO" "No reset,Reset"
|
|
rgroup.long 0x174++0x3
|
|
line.long 0x0 "ADEVRAMWRADDR,ADC Event Group RAM Write Address"
|
|
hexmask.long.word 0x00 0.--8. 1. " EV_RAM_ADDR ,Event Group ADC RAM Pointer"
|
|
rgroup.long 0x178++0x3
|
|
line.long 0x0 "ADG1RAMWRADDR,ADC Group1 RAM Write Address"
|
|
hexmask.long.word 0x00 0.--8. 1. " G1_RAM_ADDR ,Group 1 ADC RAM Pointer"
|
|
rgroup.long 0x17C++0x3
|
|
line.long 0x0 "ADG2RAMWRADDR,ADC Group2 RAM Write Address"
|
|
hexmask.long.word 0x00 0.--8. 1. " G2_RAM_ADDR ,Group 2 ADC RAM Pointer"
|
|
tree.end
|
|
;section
|
|
tree "ADC Parity Control Registers"
|
|
width 11.
|
|
group.long 0x180++0x3
|
|
line.long 0x0 "ADPARCR,ADC Parity Control Register"
|
|
bitfld.long 0x00 8. " TEST ,Parity Bits Map" "Not mapped,Mapped"
|
|
bitfld.long 0x00 0.--3. " PARITY_ENA[3:0] ,Enable/Disable Parity Checking" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
rgroup.long 0x184++0x3
|
|
line.long 0x0 "ADPARADDR,ADC Parity Error Address"
|
|
hexmask.long.word 0x00 2.--11. 0x4 " ERROR_ADDRESS ,Error address"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "RTI (Real Time Interrupt)"
|
|
base ad:0xFFFFFC00
|
|
sif cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232")
|
|
endian.be
|
|
endif
|
|
width 16.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "GCTRL,Global Control Register"
|
|
sif (cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS3137-EP"))
|
|
bitfld.long 0x00 16.--19. " NTUSEL ,Select NTU signal" "NTU0,,,,,NTU1,,,,,NTU2,,,,,NTU3"
|
|
bitfld.long 0x00 15. " COS ,Continue on suspend" "Stopped,Running"
|
|
newline
|
|
else
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))&&!cpuis("TMS570LS09*")&&!cpuis("TMS570LS07*")&&!cpuis("TMS570LS0232")
|
|
bitfld.long 0x00 16.--17. " NTUSEL ,Select NTU signal" "NTU0,NTU1,?..."
|
|
bitfld.long 0x00 15. " COS ,Continue on suspend" "Stopped,Running"
|
|
newline
|
|
else
|
|
bitfld.long 0x00 15. " COS ,Continue on suspend" "Stopped,Running"
|
|
newline
|
|
endif
|
|
endif
|
|
bitfld.long 0x00 1. " CNT1EN ,Counter 1 enable" "Stopped,Started"
|
|
bitfld.long 0x00 0. " CNT0EN ,Counter 0 enable" "Stopped,Started"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))&&!cpuis("TMS570LS0232")
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "TBCTRL,Timebase Control Register"
|
|
bitfld.long 0x00 1. " INC ,Increment free running counter" "Not incremented,Incremented"
|
|
sif cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS3137-EP")
|
|
newline
|
|
bitfld.long 0x00 0. " TBEXT ,Time base external" "Clocks FRC0,Not clocks FRC0"
|
|
else
|
|
newline
|
|
bitfld.long 0x00 0. " TBEXT ,Time base external" "UC0,NTU"
|
|
endif
|
|
endif
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "CAPCTRL,Capture Control Register"
|
|
bitfld.long 0x00 1. " CAPCNTR1 ,Capture counter 1" "CES 0,CES 1"
|
|
bitfld.long 0x00 0. " CAPCNTR0 ,Capture counter 0" "CES 0,CES 1"
|
|
line.long 0x04 "COMPCTRL,Compare Control Register"
|
|
bitfld.long 0x04 12. " COMPSEL3 ,Compare select 3" "FRC0,FRC1"
|
|
bitfld.long 0x04 8. " COMPSEL2 ,Compare select 2" "FRC0,FRC1"
|
|
bitfld.long 0x04 4. " COMPSEL1 ,Compare select 1" "FRC0,FRC1"
|
|
newline
|
|
bitfld.long 0x04 0. " COMPSEL0 ,Compare select 0" "FRC0,FRC1"
|
|
sif cpuis("TMS570LS3137-EP")
|
|
hgroup.long 0x10++0x03
|
|
hide.long 0x00 "FRC0,Free Running Counter 0 Register"
|
|
in
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FRC0,Free Running Counter 0 Register"
|
|
endif
|
|
group.long 0x14++0x07
|
|
line.long 0x00 "UC0,Up Counter 0 Register"
|
|
line.long 0x04 "CPUC0,Compare Up Counter 0 Register"
|
|
rgroup.long 0x20++0x07
|
|
line.long 0x00 "CAFRC0,Capture Free Running Counter 0 Register"
|
|
line.long 0x04 "CAUC0,Capture Up Counter 0 Register"
|
|
sif cpuis("TMS570LS3137-EP")
|
|
hgroup.long 0x30++0x03
|
|
hide.long 0x00 "FRC1,Free Running Counter 1 Register"
|
|
in
|
|
else
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "FRC1,Free Running Counter 1 Register"
|
|
endif
|
|
group.long 0x34++0x07
|
|
line.long 0x00 "UC1,Up Counter 1 Register"
|
|
line.long 0x04 "CPUC1,Compare Up Counter 1 Register"
|
|
rgroup.long 0x40++0x07
|
|
line.long 0x00 "CAFRC1,Capture Free Running Counter 1 Register"
|
|
line.long 0x04 "CAUC1,Capture Up Counter 1 Register"
|
|
group.long 0x50++0x1F
|
|
line.long 0x00 "COMP0,Compare 0 Register"
|
|
line.long 0x04 "UDCP0,Update Compare 0 Register"
|
|
line.long 0x08 "COMP1,Compare 1 Register"
|
|
line.long 0x0C "UDCP1,Update Compare 1 Register"
|
|
line.long 0x10 "COMP2,Compare 2 Register"
|
|
line.long 0x14 "UDCP2,Update Compare 2 Register"
|
|
line.long 0x18 "COMP3,Compare 3 Register"
|
|
line.long 0x1C "UDCP3,Update Compare 3 Register"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))&&!cpuis("TMS570LS09*")&&!cpuis("TMS570LS07*")&&!cpuis("TMS570LS0232")
|
|
group.long 0x70++0x07
|
|
line.long 0x00 "TBLCOMP,External Clock Timebase Low Compare Register"
|
|
line.long 0x04 "TBHCOMP,External Clock Timebase High Compare Register"
|
|
endif
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "SETINT_SET/CLR,Set/Clear Interrupt Register"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " SETOVL1IN_SET/CLR ,Free running counter 1 overflow interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " SETOVL0INT_SET/CLR ,Free running counter 0 overflow interrupt" "Disabled,Enabled"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
newline
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " SETTBINT_SET/CLR ,Timebase interrupt" "Disabled,Enabled"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))&&!cpuis("TMS570LS0232")
|
|
newline
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " SETDMA3_SET/CLR ,Compare DMA request 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " SETDMA2_SET/CLR ,Compare DMA request 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " SETDMA1_SET/CLR ,Compare DMA request 1" "Disabled,Enabled"
|
|
newline
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " SETDMA0_SET/CLR ,Compare DMA request 0" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " SETINT3_SET/CLR ,Compare interrupt 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " SETINT3_SET/CLR ,Compare interrupt 3" "Disabled,Enabled"
|
|
endif
|
|
newline
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " SETINT2_SET/CLR ,Compare interrupt 2" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " SETINT1_SET/CLR ,Compare interrupt 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " SETINT0_SET/CLR ,Compare interrupt 0" "Disabled,Enabled"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "INTFLAG,Interrupt Flag Register"
|
|
eventfld.long 0x00 18. " OVL1INT ,Free running counter 1 overflow interrupt flag" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 17. " OVL0INT ,Free running counter 0 overflow interrupt flag" "No interrupt,Interrupt"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
newline
|
|
eventfld.long 0x00 16. " TBINT ,Timebase interrupt flag" "No interrupt,Interrupt"
|
|
endif
|
|
newline
|
|
eventfld.long 0x00 3. " INT3 ,Interrupt flag 3" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 2. " INT2 ,Interrupt flag 2" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " INT1 ,Interrupt flag 1" "No interrupt,Interrupt"
|
|
newline
|
|
eventfld.long 0x00 0. " INT0 ,Interrupt flag 0" "No interrupt,Interrupt"
|
|
sif (cpu()!="TMS570PSFC61")
|
|
group.long 0x90++0x0F
|
|
line.long 0x00 "DWDCTRL,Digital Watchdog Control Register"
|
|
line.long 0x04 "DWDPRLD,Digital Watchdog Preload Register"
|
|
hexmask.long.word 0x04 0.--11. 1. " DWDPRLD ,Digital watchdog preload value"
|
|
line.long 0x08 "WDSTATUS,Watchdog Status Register"
|
|
sif (cpu()==("TMS570LC4357")||cpu()==("TMS570LS2126")||cpu()==("TMS570LS2127")||cpu()==("TMS570LS2136")||cpu()==("TMS570LS2137")||cpu()==("TMS570LS2125-PGE")||cpu()==("TMS570LS2125-ZWT")||cpu()==("TMS570LS2135-PGE")||cpu()==("TMS570LS2135-ZWT")||cpu()==("TMS570LS2124-PGE")||cpu()==("TMS570LS2124-ZWT")||cpu()==("TMS570LS2134-PGE")||cpu()==("TMS570LS2134-ZWT")||cpu()==("TMS570LS3134-PGE")||cpu()==("TMS570LS3134-ZWT")||cpu()==("TMS570LS3135-PGE")||cpu()==("TMS570LS3135-ZWT")||cpu()==("TMS570LS3136")||cpu()==("TMS570LS3137-PGE")||cpu()==("TMS570LS3137-ZWT")||cpu()==("TMS570LS30336")||cpuis("RM48L950*")||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS3137-EP")||cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232"))
|
|
eventfld.long 0x08 5. " DWWD_ST ,Windowed watchdog status" "Not occurred,Occurred"
|
|
eventfld.long 0x08 4. " END_TIME_VIOL ,Windowed watchdog end time violation status" "Not occurred,Occurred"
|
|
eventfld.long 0x08 3. " START_TIME_VIOL ,Windowed watchdog start time violation status" "Not occurred,Occurred"
|
|
newline
|
|
eventfld.long 0x08 2. " KEYST ,Watchdog key status" "Not occurred,Occurred"
|
|
eventfld.long 0x08 1. " DWDST ,Digital watchdog status" "Not occurred,Occurred"
|
|
else
|
|
eventfld.long 0x08 2. " KEYST ,Watchdog key status" "Not occurred,Occurred"
|
|
eventfld.long 0x08 1. " DWDST ,Digital watchdog status" "Not occurred,Occurred"
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")
|
|
eventfld.long 0x08 0. " AWDST ,Analog watchdog status" "Not occurred,Occurred"
|
|
endif
|
|
endif
|
|
line.long 0x0C "WDKEY,Watchdog Key Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " WDKEY ,Watchdog key"
|
|
rgroup.long 0xA0++0x03
|
|
line.long 0x00 "WDCNTR,Digital Watchdog Down Counter"
|
|
hexmask.long 0x00 0.--24. 1. " DWDCNTR ,Digital watchdog down counter"
|
|
endif
|
|
sif (cpu()==("TMS570LC4357")||cpu()==("TMS570LS2126")||cpu()==("TMS570LS2127")||cpu()==("TMS570LS2136")||cpu()==("TMS570LS2137")||cpu()==("TMS570LS2125-PGE")||cpu()==("TMS570LS2125-ZWT")||cpu()==("TMS570LS2135-PGE")||cpu()==("TMS570LS2135-ZWT")||cpu()==("TMS570LS2124-PGE")||cpu()==("TMS570LS2124-ZWT")||cpu()==("TMS570LS2134-PGE")||cpu()==("TMS570LS2134-ZWT")||cpu()==("TMS570LS3134-PGE")||cpu()==("TMS570LS3134-ZWT")||cpu()==("TMS570LS3135-PGE")||cpu()==("TMS570LS3135-ZWT")||cpu()==("TMS570LS3136")||cpu()==("TMS570LS3137-PGE")||cpu()==("TMS570LS3137-ZWT")||cpu()==("TMS570LS30336")||cpuis("RM48L950*")||cpu()==("TMS570LS0332")||cpu()==("TMS570LS0432")||cpuis("TMS570LS1114*")||cpuis("TMS570LS1115*")||cpuis("TMS570LS1224*")||cpuis("TMS570LS1225*")||cpuis("TMS570LS1227*")||cpuis("TMS570LS3137-EP")||cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232"))
|
|
group.long 0xA4++0x07
|
|
line.long 0x00 "WWDRXNCTRL,Digital Windowed Watchdog Reaction Control"
|
|
sif (cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232")||cpuis("TMS570LS3137-EP"))
|
|
bitfld.long 0x00 0.--3. " WWDRXN ,The DWWD reaction" "Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Interrupt,Reset,Reset,Reset,Reset,Reset"
|
|
else
|
|
bitfld.long 0x00 0.--3. " DWDST ,The DWWD reaction" "Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Reset,Interrupt,Reset,Reset,Reset,Reset,Reset"
|
|
endif
|
|
line.long 0x04 "WWDSIZECTRL,Digital Windowed Watchdog Window Size Control"
|
|
endif
|
|
sif cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232")||cpuis("TMS570LS3137-EP")
|
|
group.long 0xAC++0x13
|
|
line.long 0x00 "INTCLRENABLE,Compare Interrupt Clear Enable Register"
|
|
bitfld.long 0x00 24.--27. " INTCLRENABLE3 ,Auto-clear functionality on the compare 3 interrupt enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
bitfld.long 0x00 16.--19. " INTCLRENABLE2 ,Auto-clear functionality on the compare 2 interrupt enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " INTCLRENABLE1 ,Auto-clear functionality on the compare 1 interrupt enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0.--3. " INTCLRENABLE0 ,Auto-clear functionality on the compare 0 interrupt enable" "Enabled,Enabled,Enabled,Enabled,Enabled,Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
line.long 0x04 "CMP0CLR,Compare 0 Clear Register"
|
|
line.long 0x08 "CMP1CLR,Compare 1 Clear Register"
|
|
line.long 0x0C "CMP2CLR,Compare 2 Clear Register"
|
|
line.long 0x10 "CMP3CLR,Compare 3 Clear Register"
|
|
endif
|
|
sif cpuis("TMS570LS09*")||cpuis("TMS570LS07*")||cpuis("TMS570LS0232")
|
|
endian.le
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "ESM (Error Signaling Module)"
|
|
base ad:0xFFFFF500
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "ESMIEPSR1,ESM Influence Error Pin Set/Status Register 1"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " IEPSET[27]_set/clr ,Set/Clear Influence on Error Pin 27 - CPU LBIST - selftest error" "No influence,Influence"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " IEPSET[26]_set/clr ,Set/Clear Influence on Error Pin 26 - SRAM - single bit" "No influence,Influence"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " IEPSET[23]_set/clr ,Set/Clear Influence on Error Pin 23 - DCAN2 memory parity error" "No influence,Influence"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " IEPSET[21]_set/clr ,Set/Clear Influence on Error Pin 21 - DCAN1 memory parity error" "No influence,Influence"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " IEPSET[19]_set/clr ,Set/Clear Influence on Error Pin 19 - MibADC memory parity error" "No influence,Influence"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " IEPSET[18]_set/clr ,Set/Clear Influence on Error Pin 18 - MibSPI2 memory parity error" "No influence,Influence"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " IEPSET[17]_set/clr ,Set/Clear Influence on Error Pin 17 - MibSPI1 memory parity error" "No influence,Influence"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " IEPSET[11]_set/clr ,Set/Clear Influence on Error Pin 11 - Clock Monitor interrupt" "No influence,Influence"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " IEPSET[10]_set/clr ,Set/Clear Influence on Error Pin 10 - PLL Slip Error" "No influence,Influence"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " IEPSET[7]_set/clr ,Set/Clear Influence on Error Pin 7 - HET memory parity error" "No influence,Influence"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " IEPSET[6]_set/clr ,Set/Clear Influence on Error Pin 6 - Flash - ECC Single Bit" "No influence,Influence"
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "ESMIESR1,ESM Interrupt Enable Set/Status Register 1"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " INTENSET[27]_set/clr ,Set/Clear Interrupt Enable 27 - CPU LBIST - selftest error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " INTENSET[26]_set/clr ,Set/Clear Interrupt Enable 26 - SRAM - single bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " INTENSET[23]_set/clr ,Set/Clear Interrupt Enable 23 - DCAN2 memory parity error" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " INTENSET[21]_set/clr ,Set/Clear Interrupt Enable 21 - DCAN1 memory parity error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " INTENSET[19]_set/clr ,Set/Clear Interrupt Enable 19 - MibADC memory parity error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " INTENSET[18]_set/clr ,Set/Clear Interrupt Enable 18 - MibSPI2 memory parity error" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " INTENSET[17]_set/clr ,Set/Clear Interrupt Enable 17 - MibSPI1 memory parity error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " INTENSET[11]_set/clr ,Set/Clear Interrupt Enable 11 - Clock Monitor interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " INTENSET[10]_set/clr ,Set/Clear Interrupt Enable 10 - PLL Slip Error" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " INTENSET[7]_set/clr ,Set/Clear Interrupt Enable 7 - HET memory parity error" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " INTENSET[6]_set/clr ,Set/Clear Interrupt Enable 6 - Flash - ECC Single Bit" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "ESMILSR1,ESM Interrupt Level Set/Status Register 1"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " INTLVLSET_set/clr[27] ,Set/Clear Interrupt Level 27 - CPU LBIST - selftest error" "Low,High"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " INTLVLSET_set/clr[26] ,Set/Clear Interrupt Level 26 - SRAM - single bit" "Low,High"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x04 23. " INTLVLSET_set/clr[23] ,Set/Clear Interrupt Level 23 - DCAN2 memory parity error" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x00 21. 0x04 21. " INTLVLSET_set/clr[21] ,Set/Clear Interrupt Level 21 - DCAN1 memory parity error" "Low,High"
|
|
setclrfld.long 0x00 19. 0x00 19. 0x04 19. " INTLVLSET_set/clr[19] ,Set/Clear Interrupt Level 19 - MibADC memory parity error" "Low,High"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " INTLVLSET_set/clr[18] ,Set/Clear Interrupt Level 18 - MibSPI2 memory parity error" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " INTLVLSET_set/clr[17] ,Set/Clear Interrupt Level 17 - MibSPI1 memory parity error" "Low,High"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " INTLVLSET_set/clr[11] ,Set/Clear Interrupt Level 11 - Clock Monitor interrupt" "Low,High"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " INTLVLSET_set/clr[10] ,Set/Clear Interrupt Level 10 - PLL Slip Error" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " INTLVLSET_set/clr[7] ,Set/Clear Interrupt Level 7 - HET memory parity error" "Low,High"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " INTLVLSET_set/clr[6] ,Set/Clear Interrupt Level 6 - Flash - ECC Single Bit" "Low,High"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "ESMSR1,ESM Status Register 1"
|
|
eventfld.long 0x00 27. " ESF[27] ,Error Status Flag 27 - CPU LBIST - selftest error" "No error,Error"
|
|
eventfld.long 0x00 26. " ESF[26] ,Error Status Flag 26 - SRAM - single bit" "No error,Error"
|
|
eventfld.long 0x00 23. " ESF[23] ,Error Status Flag 23 - DCAN2 memory parity error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 21. " ESF[21] ,Error Status Flag 21 - DCAN1 memory parity error" "No error,Error"
|
|
eventfld.long 0x00 19. " ESF[19] ,Error Status Flag 19 - MibADC memory parity error" "No error,Error"
|
|
eventfld.long 0x00 18. " ESF[18] ,Error Status Flag 18 - MibSPI2 memory parity error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 17. " ESF[17] ,Error Status Flag 17 - MibSPI1 memory parity error" "No error,Error"
|
|
eventfld.long 0x00 11. " ESF[11] ,Error Status Flag 11 - Clock Monitor interrupt" "No error,Error"
|
|
eventfld.long 0x00 10. " ESF[10] ,Error Status Flag 10 - PLL Slip Error" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 7. " ESF[7] ,Error Status Flag 7 - HET memory parity error" "No error,Error"
|
|
eventfld.long 0x00 6. " ESF[6] ,Error Status Flag 6 - Flash - ECC Single Bit" "No error,Error"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "ESMSR2,ESM Status Register 2"
|
|
eventfld.long 0x00 17. " ESF[17] ,Error Status Flag 17 - M3 External Imprecise Abort" "No error,Error"
|
|
eventfld.long 0x00 16. " ESF[16] ,Error Status Flag 16 - M3 Lockup" "No error,Error"
|
|
eventfld.long 0x00 6. " ESF[6] ,Error Status Flag 6 - SRAM - Double-Bit Error (uncorrectable)" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 4. " ESF[4] ,Error Status Flag 4 - Flash - Double-Bit Error (uncorrectable)" "No error,Error"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "ESMEPSR,ESM Error Pin Status Register"
|
|
bitfld.long 0x00 0. " EPSF ,Error Pin Status Flag" "Active,Not active"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x0 "ESMIOFFHR,ESM Interrupt Offset High Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " INTOFFH ,Offset High Level Interrupt"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "ESMIOFFLR,ESM Interrupt Offset Low Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " INTOFFL ,Offset Low Level Interrupt"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "ESMLTCR,ESM Low-Time Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " LTC ,Error Pin Low-Time Counter"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "ESMLTCPR,ESM Low-Time Counter Preload Register"
|
|
bitfld.long 0x00 14.--15. " LTCP[15:14] ,Low-Time Counter Pre-load Value [15:14]" "0,1,2,3"
|
|
hexmask.long.word 0x00 0.--13. 1. " LTCP[13:0] ,Low-Time Counter Pre-load Value [13:0]"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "ESMEKR,ESM Error Key Register"
|
|
bitfld.long 0x00 0.--3. " EKEY ,Error Key" "Normal,Normal,Normal,Normal,Normal,LTC,Normal,Normal,Normal,Normal,Forced,Normal,Normal,Normal,Normal,Normal"
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "ESMSSR2,ESM Status Shadow Register"
|
|
eventfld.long 0x00 31. " ESF[31] ,Error Status Flag 31" "No error,Error"
|
|
eventfld.long 0x00 30. " ESF[30] ,Error Status Flag 30" "No error,Error"
|
|
eventfld.long 0x00 29. " ESF[29] ,Error Status Flag 29" "No error,Error"
|
|
eventfld.long 0x00 28. " ESF[28] ,Error Status Flag 28" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 27. " ESF[27] ,Error Status Flag 27" "No error,Error"
|
|
eventfld.long 0x00 26. " ESF[26] ,Error Status Flag 26" "No error,Error"
|
|
eventfld.long 0x00 25. " ESF[25] ,Error Status Flag 25" "No error,Error"
|
|
eventfld.long 0x00 24. " ESF[24] ,Error Status Flag 24" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 23. " ESF[23] ,Error Status Flag 23" "No error,Error"
|
|
eventfld.long 0x00 22. " ESF[22] ,Error Status Flag 22" "No error,Error"
|
|
eventfld.long 0x00 21. " ESF[21] ,Error Status Flag 21" "No error,Error"
|
|
eventfld.long 0x00 20. " ESF[20] ,Error Status Flag 20" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 19. " ESF[19] ,Error Status Flag 19" "No error,Error"
|
|
eventfld.long 0x00 18. " ESF[18] ,Error Status Flag 18" "No error,Error"
|
|
eventfld.long 0x00 17. " ESF[17] ,Error Status Flag 17" "No error,Error"
|
|
eventfld.long 0x00 16. " ESF[16] ,Error Status Flag 16" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 15. " ESF[15] ,Error Status Flag 15" "No error,Error"
|
|
eventfld.long 0x00 14. " ESF[14] ,Error Status Flag 14" "No error,Error"
|
|
eventfld.long 0x00 13. " ESF[13] ,Error Status Flag 13" "No error,Error"
|
|
eventfld.long 0x00 12. " ESF[12] ,Error Status Flag 12" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 11. " ESF[11] ,Error Status Flag 11" "No error,Error"
|
|
eventfld.long 0x00 10. " ESF[10] ,Error Status Flag 10" "No error,Error"
|
|
eventfld.long 0x00 9. " ESF[9] ,Error Status Flag 9" "No error,Error"
|
|
eventfld.long 0x00 8. " ESF[8] ,Error Status Flag 8" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 7. " ESF[7] ,Error Status Flag 7" "No error,Error"
|
|
eventfld.long 0x00 6. " ESF[6] ,Error Status Flag 6" "No error,Error"
|
|
eventfld.long 0x00 5. " ESF[5] ,Error Status Flag 5" "No error,Error"
|
|
eventfld.long 0x00 4. " ESF[4] ,Error Status Flag 4" "No error,Error"
|
|
textline " "
|
|
eventfld.long 0x00 3. " ESF[3] ,Error Status Flag 3" "No error,Error"
|
|
eventfld.long 0x00 2. " ESF[2] ,Error Status Flag 2" "No error,Error"
|
|
eventfld.long 0x00 1. " ESF[1] ,Error Status Flag 1" "No error,Error"
|
|
eventfld.long 0x00 0. " ESF[0] ,Error Status Flag 0" "No error,Error"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "SCI/LIN (Serial Communication Interface/Local Interconnect Network)"
|
|
tree "SCI/LIN1"
|
|
base ad:0xFFF7E500
|
|
width 8.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "GCR0,Global Control Register"
|
|
bitfld.long 0x00 0. " RESET ,SCI Module Reset" "Under reset,Out of reset"
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x44)==0x44)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_EXT_FRAME ,Stop Extended Frame Communication" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12. " HGEN_CTRL ,LIN Mode Bit (Type of Mask Filtering Comparison)" "ID-Byte,ID-Slave task byte"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTYPE ,LIN Mode Bit (Classic/Enhanced)" "Classic,Enhanced"
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADAPT ,LIN Mode Bit (Automatic Baudrate Adjustment)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "Slave,Master"
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PARITY ,SCI Parity Odd/Even Selection" "Odd,Even"
|
|
endif
|
|
bitfld.long 0x00 2. " PARITY_ENA ,ID-Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
endif
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit ID4 and ID5 Use" "Not used,Used"
|
|
elif ((d.l(ad:0xFFF7E500+0x4)&0x44)==0x40)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_EXT_FRAME ,Stop Extended Frame Communication" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12. " HGEN_CTRL ,LIN Mode Bit (Type of Mask Filtering Comparison)" "ID-Byte,ID-SlaveTask"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTYPE ,LIN Mode Bit (Classic/Enhanced)" "Classic,Enhanced"
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADAPT ,LIN Mode Bit (Automatic Baudrate Adjustment)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "Slave,Master"
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " PARITY_ENA ,ID-Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
endif
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit ID4 and ID5 Use" "Not used,Used"
|
|
elif (((d.l((ad:0xFFF7E500+0x4)))&0x44)==0x04)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "External,Internal"
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PARITY ,SCI Parity Odd/Even Selection" "Odd,Even"
|
|
bitfld.long 0x00 2. " PARITY_ENA ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit" "Idle-line,Address-bit"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "External,Internal"
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PARITY_ENA ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit" "Idle-line,Address-bit"
|
|
endif
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "GCR2,Global Control Register"
|
|
bitfld.long 0x00 17. " CC ,Compare Checksum" "No effect,Compared"
|
|
bitfld.long 0x00 16. " SC ,Send Checksum" "No effect,Compared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GEN_WU ,Generate Wakeup Signal" "No effect,Generated"
|
|
bitfld.long 0x00 0. " POWERDOWN ,POWERDOWN" "Normal,Local low-power"
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "GCR2,Global Control Register"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
bitfld.long 0x00 8. " GEN_WU ,Generate Wakeup Signal" "No effect,Generated"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " POWERDOWN ,POWERDOWN" "Normal,Local low-power"
|
|
endif
|
|
width 11.
|
|
tree "SCI Interrupt Registers"
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "SETINT,Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " BE_INT_set/clr ,Bit Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " PBE_INT_set/clr ,Physical Bus Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " CE_INT_set/clr ,Checksum-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " ISFE_INT_set/clr ,Inconsistent-Synch-Field-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " NRE_INT_set/clr ,No-Reponse-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_set/clr ,Framing-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_set/clr ,Overrun-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_set/clr ,Parity Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RX_DMA_set/clr ,Receive DMA" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " TX_DMA_set/clr ,Transmit DMA" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " ID_INT_set/clr ,ID Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_set/clr ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_set/clr ,Transmitter Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TOA3WUS_INT_set/clr ,Timeout After 3 Wakeup Signals Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " TOAWUS_INT_set/clr ,Timeout After Wakeup Signal Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMEOUT_INT_set/clr ,Timeout Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_set/clr ,Wake-up Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "SETINT,Interrupt Register"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_set/clr ,Framing-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_set/clr ,Overrun-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_set/clr ,Parity Interrupt" "Disabled,Enabled"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " RX_DMA_ALL_set/clr ,Receive DMA All" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RX_DMA_set/clr ,Receive DMA" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " TX_DMA_set/clr ,Transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_set/clr ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_set/clr ,Transmitter Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_set/clr ,Wake-up Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " BRKDT_INT_set/clr ,Break-detect Interrupt" "Disabled,Enabled"
|
|
endif
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SETINTLVL,Interrupt Level Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " BE_INT_LVL_set/clr ,Bit Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " PBE_INT_LVL_set/clr ,Physical Bus Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " CE_INT_LVL_set/clr ,Checksum-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " ISFE_INT_LVL_set/clr ,Inconsistent-Synch-Field-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " NRE_INT_LVL_set/clr ,No-Reponse-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_LVL_set/clr ,Framing-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_LVL_set/clr ,Overrun-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_LVL_set/clr ,Parity Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " ID_INT_LVL_set/clr ,ID Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_LVL_set/clr ,Receiver Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_LVL_set/clr ,Transmitter Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TOA3WUS_INT_LVL_set/clr ,Timeout After 3 Wakeup Signals Interrupt" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " TOAWUS_INT_LVL_set/clr ,Timeout After Wakeup Signal Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMEOUT_INT_LVL_set/clr ,Timeout Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_LVL_set/clr ,Wake-up Interrupt Level" "INT0,INT1"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SETINTLVL,Interrupt Level Register"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_LVL_set/clr ,Framing-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_LVL_set/clr ,Overrun-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_LVL_set/clr ,Parity Error Interrupt Level" "INT0,INT1"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " RX_DMA_ALL_INT_LVL_set/clr ,Receive DMA All Interrupt Level" "INT0,INT1"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_LVL_set/clr ,Receiver Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_LVL_set/clr ,Transmitter Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_LVL_set/clr ,Wake-up Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " BRKDT_INT_set/clr ,Break-Detect Interrupt Level" "INT0,INT1"
|
|
endif
|
|
tree.end
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FLR,Flags Register"
|
|
eventfld.long 0x00 31. " BE ,Bit Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 30. " PBE ,Physiscal Bus Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 29. " CE ,Checksum Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 28. " ISFE ,Inconsistent Synch Field Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 27. " NRE ,No-Response Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 26. " FE ,Framing Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 25. " OE ,Overrun Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 24. " PE ,Parity Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 14. " ID_RX_FLAG ,Identifier On Receive Flag" "Not received,Received"
|
|
eventfld.long 0x00 13. " ID_TX_FLAG ,Identifier On Transmit Flag" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_EMPTY ,Transmitter Empty Flag" "Not empty,Empty"
|
|
eventfld.long 0x00 9. " RXRDY ,Receiver Ready Flag" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXRDY ,Transmitter Buffer Register Ready Flag" "Full,Ready"
|
|
eventfld.long 0x00 7. " TOA3WUS ,Timeout After 3 Wakeup Signals Flag" "No timeout,Timeout"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TOAWUS ,Timeout After Wakeup Signal Flag" "No timeout,Timeout"
|
|
eventfld.long 0x00 4. " TIMEOUT ,LIN Bus IDLE Timeout Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY_FLAG ,BUSY Flag" "Not busy,Busy"
|
|
eventfld.long 0x00 1. " WAKEUP ,Wake-up Flag" "No wake up,Wake up"
|
|
else
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FLR,Flags Register"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
eventfld.long 0x00 31. " BE ,Bit Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 26. " FE ,Framing Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 25. " OE ,Overrun Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 24. " PE ,Parity Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RXWAKE ,Receiver Wakeup Detect Flag" "Not address,Address"
|
|
bitfld.long 0x00 11. " TX_EMPTY ,Transmitter Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TXWAKE ,SCI Transmitter Wakeup Method Select" "Data,Address"
|
|
eventfld.long 0x00 9. " RXRDY ,Receiver Ready Flag" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXRDY ,Transmitter Buffer Register Ready Flag (SCITD)" "Full,Ready"
|
|
bitfld.long 0x00 3. " BUSY_FLAG ,BUSY Flag" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IDLE ,SCI Receiver in Idle State" "Not detected,Detected"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&!cpuis("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
eventfld.long 0x00 1. " WAKEUP ,Wake-up Flag" "No wake up,Wake up"
|
|
endif
|
|
textline " "
|
|
eventfld.long 0x00 0. " BRKDT ,SCI Break-Detect Flag" "Not detected,Detected"
|
|
endif
|
|
width 9.
|
|
tree "SCI Interrupt Vector Offset Registers"
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "INVECT0,Interrupt Vector Offset 0"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "INVECT1,Interrupt Vector Offset 1"
|
|
in
|
|
tree.end
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 16.--18. " LENGTH ,Frame Length Control Bits" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
|
|
elif (((d.l(ad:0xFFF7E500+0x4)&0x40)==0x0)&&(((d.l((ad:0xFFF7E500+0x04)))&0x0400)==0x0400))
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 16.--18. " LENGTH ,Frame Length Control Bits" "1 character,2 characters,3 characters,4 characters,5 characters,6 characters,7 characters,8 characters"
|
|
bitfld.long 0x00 0.--2. " CHAR ,Character Length Control Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 0.--2. " CHAR ,Character Length Control Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "BRSR,Baud Rate Selection Register"
|
|
hexmask.long.byte 0x00 28.--30. 1. " U ,SCI/BLIN Super Fractional Divider Selection"
|
|
hexmask.long.byte 0x00 24.--27. 1. " M ,SCI/BLIN 4-bit Fractional Divider Selection"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " PRESCALER_P ,SCI/BLIN 24-bit Integer Prescaler Selection"
|
|
width 4.
|
|
tree "SCI Data Buffer Registers"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "ED,SCI Data Buffer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ED ,Emulation Data"
|
|
hgroup.long 0x34++0x3
|
|
hide.long 0x0 "RD,SCI Data Buffer"
|
|
in
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "TD,SCI Data Buffer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD ,Transmit Data"
|
|
tree.end
|
|
tree "SCI Pin I/O Control Registers"
|
|
width 6.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "PIO0,Pin I/O Control Register 0"
|
|
bitfld.long 0x00 2. " TX_FUNC ,Defines the Function of Pin SCITX" "GPIO,SCITX"
|
|
bitfld.long 0x00 1. " RX_FUNC ,Defines the Function of Pin SCIRX" "GPIO,SCIRX"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_FUNC ,Clock Function" "GPIO,?..."
|
|
endif
|
|
else
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "PIO0,Pin I/O Control Register 0"
|
|
bitfld.long 0x00 2. " TX_FUNC ,Defines the Function of Pin SCITX" "GPIO,SCITX"
|
|
bitfld.long 0x00 1. " RX_FUNC ,Defines the Function of Pin SCIRX" "GPIO,SCIRX"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_FUNC ,Clock Function" "GPIO,SCICLK"
|
|
endif
|
|
endif
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357")
|
|
if ((d.l(ad:0xFFF7E500+0x3c)&0x1)==0x0)
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Output"
|
|
endif
|
|
elif (((d.l(ad:0xFFF7E500+0x3c)&0x1)==0x1)&&((d.l(ad:0xFFF7E500+0x4)&0x60)==0x20))
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Not output,Output"
|
|
endif
|
|
elif (((d.l(ad:0xFFF7E500+0x3c)&0x1)==0x1)&&((d.l(ad:0xFFF7E500+0x4)&0x60)==0x0))
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Not input"
|
|
endif
|
|
else
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Output"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
endif
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "PIO2,Pin I/O Control Register 2"
|
|
bitfld.long 0x00 2. " TX_IN ,Contains Current Value on the SCITX Pin" "Low,High"
|
|
bitfld.long 0x00 1. " RX_IN ,Contains Current Value on the SCIRX Pin" "Low,High"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_IN ,Contains the Current Value on Pin SCICLK" "Low,High"
|
|
endif
|
|
width 6.
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "PIO3,Pin I/O Control Register 3"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TX_OUT_set/clr ,SCITX Pin Data Output" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " RX_OUT_set/clr ,SCIRX Pin Data Output" "Low,High"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " CLK_OUT_set/clr ,SCICLK Pin Data Output" "Low,High"
|
|
endif
|
|
sif cpuis("TMS570LS21*")||cpuis("TMS570LS31*")
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "PIO4,Pin I/O Control Register 4"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PIO5,Pin I/O Control Register 5"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
endif
|
|
width 6.
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "PIO6,Pin I/O Control Register 6"
|
|
bitfld.long 0x00 2. " TX_ODR ,TX Open Drain Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RX_ODR ,RX Open Drain Enable" "Disabled,Enabled"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_ODR ,CLK Open Drain Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "PIO7,Pin I/O Control Register 7"
|
|
bitfld.long 0x00 2. " TX_PD ,TX Pin Pull Control Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " RX_PD ,RX Pin Pull Control Disable" "No,Yes"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&cpu()!=("TMS570LS1114*")&&cpu()!=("TMS570LS1115*")&&cpu()!=("TMS570LS1224*")&&cpu()!=("TMS570LS1225*")&&cpu()!=("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_PD ,CLK Pin Pull Control Disable" "No,Yes"
|
|
endif
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "PIO8,Pin I/O Control Register 8"
|
|
bitfld.long 0x00 2. " TX_PSL ,TX Pin Pull Select" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " RX_PSL ,RX Pin Pull Select" "Pull down,Pull up"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_PSL ,CLK Pin Pull Select" "Pull down,Pull up"
|
|
endif
|
|
tree.end
|
|
tree "BLIN Registers"
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "LINCOMP,BLINCOMPARE Register"
|
|
bitfld.long 0x00 8.--9. " SDEL ,2-bit Synch Delimiter Compare" "1 bit,2 bits,3 bits,4 bits"
|
|
bitfld.long 0x00 0.--2. " SBREAK ,3-bit Synch Break Extend" "Not extended,1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits"
|
|
else
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x0 "LINCOMP,BLINCOMPARE Register"
|
|
endif
|
|
sif (cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
hgroup.long 0x64++0x3
|
|
hide.long 0x0 "LINRD0,LINRD0 Register"
|
|
in
|
|
hgroup.long 0x68++0x3
|
|
hide.long 0x0 "LINRD1,LINRD1 Register"
|
|
in
|
|
else
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x0 "LINRD0,LINRD0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 0x1 " RD0 ,Receive Buffer 0"
|
|
hexmask.long.byte 0x00 16.--23. 0x1 " RD1 ,Receive Buffer 1"
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " RD2 ,Receive Buffer 2"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " RD3 ,Receive Buffer 3"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "LINRD1,LINRD1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 0x1 " RD4 ,Receive Buffer 4"
|
|
hexmask.long.byte 0x00 16.--23. 0x1 " RD5 , Receive Buffer 5"
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " RD6 ,Receive Buffer 6"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " RD7 ,Receive Buffer 7"
|
|
endif
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "LINMASK,LINMASK Register"
|
|
bitfld.long 0x00 23. " RX_ID_MASK7 ,RX ID Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " RX_ID_MASK6 ,RX ID Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RX_ID_MASK5 ,RX ID Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " RX_ID_MASK4 ,RX ID Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RX_ID_MASK3 ,RX ID Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " RX_ID_MASK2 ,RX ID Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RX_ID_MASK1 ,RX ID Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " RX_ID_MASK0 ,RX ID Mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TX_ID_MASK7 ,TX ID Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " TX_ID_MASK6 ,TX ID Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TX_ID_MASK5 ,TX ID Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " TX_ID_MASK4 ,TX ID Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_ID_MASK3 ,TX ID Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TX_ID_MASK2 ,TX ID Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_ID_MASK1 ,TX ID Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " TX_ID_MASK0 ,TX ID Mask 0" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x6C++0x3
|
|
hide.long 0x0 "LINMASK,LINMASK Register"
|
|
endif
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "LINID,LINID Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RECEIVED_ID ,Received Identifier"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ID_SLAVETASK_BYTE ,Identifier Slave Task Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ID_BYTE ,Identifier Byte"
|
|
else
|
|
hgroup.long 0x70++0x3
|
|
hide.long 0x0 "LINID,LINID Register"
|
|
endif
|
|
width 9.
|
|
group.long 0x74++0x3
|
|
line.long 0x0 "LINTD0,LINTD0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TD0 ,8-bit Transmit Buffer 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TD1 ,8-bit Transmit Buffer 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TD2 ,8-bit Transmit Buffer 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD3 ,8-bit Transmit Buffer 3"
|
|
group.long 0x78++0x3
|
|
line.long 0x0 "LINTD1,LINTD1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TD4 ,8-bit Transmit Buffer 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TD5 ,8-bit Transmit Buffer 5"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TD6 ,8-bit Transmit Buffer 6"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD7 ,8-bit Transmit Buffer 7"
|
|
tree.end
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x7C++0x3
|
|
line.long 0x0 "MBRSR,Maximum Baud Rate Selection Register"
|
|
hexmask.long.word 0x00 0.--12. 1. " MBR ,Maximum Baud Rate Prescaler"
|
|
else
|
|
hgroup.long 0x7C++0x3
|
|
hide.long 0x0 "MBRSR,Maximum Baud Rate Selection Register"
|
|
endif
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&(cpu()!="TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PIO9,Pin I/O Control Register 9"
|
|
bitfld.long 0x00 2. " TX_SL ,This Bit Controls the Slew Rate for the SCITX Pin" "Normal,Slew"
|
|
bitfld.long 0x00 1. " RX_SL ,This Bit Controls the Slew Rate for the SCIRX Pin" "Normal,Slew"
|
|
sif (cpu()!="TMS570PSFC61")
|
|
bitfld.long 0x00 0. " CLK_SL ,This Bit Controls the Slew Rate for the SCICLK Pin" "Normal,Slew"
|
|
endif
|
|
endif
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E500+0x4)&0x40)==0x40)
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "IODFTCTRL,IODFT for BLIN Moduler"
|
|
bitfld.long 0x00 31. " BEEN ,Bit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PBEEN ,Physical Bus Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CEEN ,Checksum Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ISFEEN ,Inconsistent Synch Field Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " FEEN ,Frame Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " PSM ,PIN SAMPLE MASK" "No mask,TBIT_CENTER,TBIT_CENTER + SCLK,TBIT_CENTER + 2 SCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TX_SHIFT ,Transmit Shift" "No delay,1 SCLK,2 SCLKs,3 SCLKs,4 SCLKs,5 SCLKs,6 SCLKs,7 SCLKs"
|
|
bitfld.long 0x00 8.--11. " IODFTENA ,IO DFT Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LPBENA ,Module Loopback Enable" "Analog,Digital"
|
|
bitfld.long 0x00 0. " RXPENA ,Module Analog Loopback Through Receive/Transmit Pin Enable" "Transmit,Receive"
|
|
else
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "IODFTCTRL,IODFT for BLIN Moduler"
|
|
bitfld.long 0x00 26. " FEEN ,Frame Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PEEN ,Parity Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BDEEN ,Break Detect Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " PSM ,PIN SAMPLE MASK" "No mask,TBIT_CENTER,TBIT_CENTER + SCLK,TBIT_CENTER + 2 SCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TX_SHIFT ,Transmit Shift" "No delay,1 SCLK,2 SCLKs,3 SCLKs,4 SCLKs,5 SCLKs,6 SCLKs,7 SCLKs"
|
|
bitfld.long 0x00 8.--11. " IODFTENA ,IO DFT Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LPBENA ,Module Loopback Enable" "Analog,Digital"
|
|
bitfld.long 0x00 0. " RXPENA ,Module Analog Loopback Through Receive/Transmit Pin Enable" "Transmit,Receive"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "SCI/LIN2"
|
|
base ad:0xFFF7E400
|
|
width 8.
|
|
group.long 0x00++0x3
|
|
line.long 0x0 "GCR0,Global Control Register"
|
|
bitfld.long 0x00 0. " RESET ,SCI Module Reset" "Under reset,Out of reset"
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x44)==0x44)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_EXT_FRAME ,Stop Extended Frame Communication" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12. " HGEN_CTRL ,LIN Mode Bit (Type of Mask Filtering Comparison)" "ID-Byte,ID-Slave task byte"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTYPE ,LIN Mode Bit (Classic/Enhanced)" "Classic,Enhanced"
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADAPT ,LIN Mode Bit (Automatic Baudrate Adjustment)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "Slave,Master"
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PARITY ,SCI Parity Odd/Even Selection" "Odd,Even"
|
|
endif
|
|
bitfld.long 0x00 2. " PARITY_ENA ,ID-Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
endif
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit ID4 and ID5 Use" "Not used,Used"
|
|
elif ((d.l(ad:0xFFF7E400+0x4)&0x44)==0x40)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " STOP_EXT_FRAME ,Stop Extended Frame Communication" "Not stopped,Stopped"
|
|
bitfld.long 0x00 12. " HGEN_CTRL ,LIN Mode Bit (Type of Mask Filtering Comparison)" "ID-Byte,ID-SlaveTask"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CTYPE ,LIN Mode Bit (Classic/Enhanced)" "Classic,Enhanced"
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " ADAPT ,LIN Mode Bit (Automatic Baudrate Adjustment)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "Slave,Master"
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " PARITY_ENA ,ID-Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
endif
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit ID4 and ID5 Use" "Not used,Used"
|
|
elif (((d.l((ad:0xFFF7E400+0x4)))&0x44)==0x04)
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "External,Internal"
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PARITY ,SCI Parity Odd/Even Selection" "Odd,Even"
|
|
bitfld.long 0x00 2. " PARITY_ENA ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit" "Idle-line,Address-bit"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x0 "GCR1,Global Control Register"
|
|
bitfld.long 0x00 25. " TXENA ,SCI Transmitter Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " RXENA ,SCI Receiver Enable" "Prevented,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CONT ,Continue on Suspend" "Frozen,Continue"
|
|
bitfld.long 0x00 16. " LOOP_BACK ,LOOP BACK Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MBUF_MODE ,Receive/Transmit Buffer Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SLEEP ,SCI Sleep Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SW_nRESET ,Software Reset" "Reset,Ready"
|
|
bitfld.long 0x00 6. " LIN_MODE ,LIN MODE Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CLOCK ,SCI Internal Clock Enable" "External,Internal"
|
|
bitfld.long 0x00 4. " STOP ,SCI Number of Stop Bits" "1 bit,2 bits"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PARITY_ENA ,Parity Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TIMING_MODE ,SCI Timing Mode Bit" "Synchronous,Asynchronous"
|
|
bitfld.long 0x00 0. " COMM_MODE ,SCI/BLIN Communication Mode Bit" "Idle-line,Address-bit"
|
|
endif
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "GCR2,Global Control Register"
|
|
bitfld.long 0x00 17. " CC ,Compare Checksum" "No effect,Compared"
|
|
bitfld.long 0x00 16. " SC ,Send Checksum" "No effect,Compared"
|
|
textline " "
|
|
bitfld.long 0x00 8. " GEN_WU ,Generate Wakeup Signal" "No effect,Generated"
|
|
bitfld.long 0x00 0. " POWERDOWN ,POWERDOWN" "Normal,Local low-power"
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x0 "GCR2,Global Control Register"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
bitfld.long 0x00 8. " GEN_WU ,Generate Wakeup Signal" "No effect,Generated"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0. " POWERDOWN ,POWERDOWN" "Normal,Local low-power"
|
|
endif
|
|
width 11.
|
|
tree "SCI Interrupt Registers"
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "SETINT,Interrupt Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " BE_INT_set/clr ,Bit Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " PBE_INT_set/clr ,Physical Bus Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " CE_INT_set/clr ,Checksum-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " ISFE_INT_set/clr ,Inconsistent-Synch-Field-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " NRE_INT_set/clr ,No-Reponse-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_set/clr ,Framing-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_set/clr ,Overrun-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_set/clr ,Parity Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RX_DMA_set/clr ,Receive DMA" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " TX_DMA_set/clr ,Transmit DMA" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " ID_INT_set/clr ,ID Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_set/clr ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_set/clr ,Transmitter Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TOA3WUS_INT_set/clr ,Timeout After 3 Wakeup Signals Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " TOAWUS_INT_set/clr ,Timeout After Wakeup Signal Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMEOUT_INT_set/clr ,Timeout Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_set/clr ,Wake-up Interrupt" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0C++0x3
|
|
line.long 0x0 "SETINT,Interrupt Register"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_set/clr ,Framing-Error Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_set/clr ,Overrun-Error Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_set/clr ,Parity Interrupt" "Disabled,Enabled"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " RX_DMA_ALL_set/clr ,Receive DMA All" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x00 17. 0x04 17. " RX_DMA_set/clr ,Receive DMA" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x04 16. " TX_DMA_set/clr ,Transmit DMA" "Disabled,Enabled"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_set/clr ,Receiver Interrupt Enable" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_set/clr ,Transmitter Interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_set/clr ,Wake-up Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " BRKDT_INT_set/clr ,Break-detect Interrupt" "Disabled,Enabled"
|
|
endif
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SETINTLVL,Interrupt Level Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x04 31. " BE_INT_LVL_set/clr ,Bit Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x04 30. " PBE_INT_LVL_set/clr ,Physical Bus Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x00 29. 0x04 29. " CE_INT_LVL_set/clr ,Checksum-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x04 28. " ISFE_INT_LVL_set/clr ,Inconsistent-Synch-Field-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x00 27. 0x04 27. " NRE_INT_LVL_set/clr ,No-Reponse-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_LVL_set/clr ,Framing-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_LVL_set/clr ,Overrun-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_LVL_set/clr ,Parity Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " ID_INT_LVL_set/clr ,ID Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_LVL_set/clr ,Receiver Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_LVL_set/clr ,Transmitter Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " TOA3WUS_INT_LVL_set/clr ,Timeout After 3 Wakeup Signals Interrupt" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " TOAWUS_INT_LVL_set/clr ,Timeout After Wakeup Signal Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " TIMEOUT_INT_LVL_set/clr ,Timeout Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_LVL_set/clr ,Wake-up Interrupt Level" "INT0,INT1"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "SETINTLVL,Interrupt Level Register"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x04 26. " FE_INT_LVL_set/clr ,Framing-Error Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 25. 0x00 25. 0x04 25. " OE_INT_LVL_set/clr ,Overrun-Error Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 24. 0x00 24. 0x04 24. " PE_INT_LVL_set/clr ,Parity Error Interrupt Level" "INT0,INT1"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
setclrfld.long 0x00 18. 0x00 18. 0x04 18. " RX_DMA_ALL_INT_LVL_set/clr ,Receive DMA All Interrupt Level" "INT0,INT1"
|
|
endif
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " RX_INT_LVL_set/clr ,Receiver Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " TX_INT_LVL_set/clr ,Transmitter Interrupt Level" "INT0,INT1"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " WAKEUP_INT_LVL_set/clr ,Wake-up Interrupt Level" "INT0,INT1"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " BRKDT_INT_set/clr ,Break-Detect Interrupt Level" "INT0,INT1"
|
|
endif
|
|
tree.end
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FLR,Flags Register"
|
|
eventfld.long 0x00 31. " BE ,Bit Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 30. " PBE ,Physiscal Bus Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 29. " CE ,Checksum Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 28. " ISFE ,Inconsistent Synch Field Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 27. " NRE ,No-Response Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 26. " FE ,Framing Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 25. " OE ,Overrun Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 24. " PE ,Parity Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 14. " ID_RX_FLAG ,Identifier On Receive Flag" "Not received,Received"
|
|
eventfld.long 0x00 13. " ID_TX_FLAG ,Identifier On Transmit Flag" "Not received,Received"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TX_EMPTY ,Transmitter Empty Flag" "Not empty,Empty"
|
|
eventfld.long 0x00 9. " RXRDY ,Receiver Ready Flag" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXRDY ,Transmitter Buffer Register Ready Flag" "Full,Ready"
|
|
eventfld.long 0x00 7. " TOA3WUS ,Timeout After 3 Wakeup Signals Flag" "No timeout,Timeout"
|
|
textline " "
|
|
eventfld.long 0x00 6. " TOAWUS ,Timeout After Wakeup Signal Flag" "No timeout,Timeout"
|
|
eventfld.long 0x00 4. " TIMEOUT ,LIN Bus IDLE Timeout Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BUSY_FLAG ,BUSY Flag" "Not busy,Busy"
|
|
eventfld.long 0x00 1. " WAKEUP ,Wake-up Flag" "No wake up,Wake up"
|
|
else
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "FLR,Flags Register"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
eventfld.long 0x00 31. " BE ,Bit Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
endif
|
|
eventfld.long 0x00 26. " FE ,Framing Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 25. " OE ,Overrun Error Flag" "Not detected,Detected"
|
|
eventfld.long 0x00 24. " PE ,Parity Error Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 12. " RXWAKE ,Receiver Wakeup Detect Flag" "Not address,Address"
|
|
bitfld.long 0x00 11. " TX_EMPTY ,Transmitter Empty Flag" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 10. " TXWAKE ,SCI Transmitter Wakeup Method Select" "Data,Address"
|
|
eventfld.long 0x00 9. " RXRDY ,Receiver Ready Flag" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 8. " TXRDY ,Transmitter Buffer Register Ready Flag (SCITD)" "Full,Ready"
|
|
bitfld.long 0x00 3. " BUSY_FLAG ,BUSY Flag" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IDLE ,SCI Receiver in Idle State" "Not detected,Detected"
|
|
sif (cpu()!="TMS570PSFC61")&&(cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&cpu()!=("TMS570LS0332")&&!cpuis("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")
|
|
eventfld.long 0x00 1. " WAKEUP ,Wake-up Flag" "No wake up,Wake up"
|
|
endif
|
|
textline " "
|
|
eventfld.long 0x00 0. " BRKDT ,SCI Break-Detect Flag" "Not detected,Detected"
|
|
endif
|
|
width 9.
|
|
tree "SCI Interrupt Vector Offset Registers"
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x0 "INVECT0,Interrupt Vector Offset 0"
|
|
in
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "INVECT1,Interrupt Vector Offset 1"
|
|
in
|
|
tree.end
|
|
width 8.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 16.--18. " LENGTH ,Frame Length Control Bits" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes"
|
|
elif (((d.l(ad:0xFFF7E400+0x4)&0x40)==0x0)&&(((d.l((ad:0xFFF7E400+0x04)))&0x0400)==0x0400))
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 16.--18. " LENGTH ,Frame Length Control Bits" "1 character,2 characters,3 characters,4 characters,5 characters,6 characters,7 characters,8 characters"
|
|
bitfld.long 0x00 0.--2. " CHAR ,Character Length Control Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "FORMAT,Format Control Register"
|
|
bitfld.long 0x00 0.--2. " CHAR ,Character Length Control Bits" "1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "BRSR,Baud Rate Selection Register"
|
|
hexmask.long.byte 0x00 28.--30. 1. " U ,SCI/BLIN Super Fractional Divider Selection"
|
|
hexmask.long.byte 0x00 24.--27. 1. " M ,SCI/BLIN 4-bit Fractional Divider Selection"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " PRESCALER_P ,SCI/BLIN 24-bit Integer Prescaler Selection"
|
|
width 4.
|
|
tree "SCI Data Buffer Registers"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "ED,SCI Data Buffer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ED ,Emulation Data"
|
|
hgroup.long 0x34++0x3
|
|
hide.long 0x0 "RD,SCI Data Buffer"
|
|
in
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "TD,SCI Data Buffer"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD ,Transmit Data"
|
|
tree.end
|
|
tree "SCI Pin I/O Control Registers"
|
|
width 6.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "PIO0,Pin I/O Control Register 0"
|
|
bitfld.long 0x00 2. " TX_FUNC ,Defines the Function of Pin SCITX" "GPIO,SCITX"
|
|
bitfld.long 0x00 1. " RX_FUNC ,Defines the Function of Pin SCIRX" "GPIO,SCIRX"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_FUNC ,Clock Function" "GPIO,?..."
|
|
endif
|
|
else
|
|
group.long 0x3C++0x3
|
|
line.long 0x0 "PIO0,Pin I/O Control Register 0"
|
|
bitfld.long 0x00 2. " TX_FUNC ,Defines the Function of Pin SCITX" "GPIO,SCITX"
|
|
bitfld.long 0x00 1. " RX_FUNC ,Defines the Function of Pin SCIRX" "GPIO,SCIRX"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_FUNC ,Clock Function" "GPIO,SCICLK"
|
|
endif
|
|
endif
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357")
|
|
if ((d.l(ad:0xFFF7E400+0x3c)&0x1)==0x0)
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Output"
|
|
endif
|
|
elif (((d.l(ad:0xFFF7E400+0x3c)&0x1)==0x1)&&((d.l(ad:0xFFF7E400+0x4)&0x60)==0x20))
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Not output,Output"
|
|
endif
|
|
elif (((d.l(ad:0xFFF7E400+0x3c)&0x1)==0x1)&&((d.l(ad:0xFFF7E400+0x4)&0x60)==0x0))
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Not input"
|
|
endif
|
|
else
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
sif (cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_DIR ,Clock Data Direction" "Input,Output"
|
|
endif
|
|
endif
|
|
else
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PIO1,Pin I/O Control Register 1"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
endif
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "PIO2,Pin I/O Control Register 2"
|
|
bitfld.long 0x00 2. " TX_IN ,Contains Current Value on the SCITX Pin" "Low,High"
|
|
bitfld.long 0x00 1. " RX_IN ,Contains Current Value on the SCIRX Pin" "Low,High"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_IN ,Contains the Current Value on Pin SCICLK" "Low,High"
|
|
endif
|
|
width 6.
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "PIO3,Pin I/O Control Register 3"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " TX_OUT_set/clr ,SCITX Pin Data Output" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " RX_OUT_set/clr ,SCIRX Pin Data Output" "Low,High"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
setclrfld.long 0x00 0. 0x00 0. 0x08 0. " CLK_OUT_set/clr ,SCICLK Pin Data Output" "Low,High"
|
|
endif
|
|
sif cpuis("TMS570LS21*")||cpuis("TMS570LS31*")
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "PIO4,Pin I/O Control Register 4"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "PIO5,Pin I/O Control Register 5"
|
|
bitfld.long 0x00 2. " TX_DIR ,Transmit Direction" "Input,Output"
|
|
bitfld.long 0x00 1. " RX_DIR ,Receive Direction" "Input,Output"
|
|
endif
|
|
width 6.
|
|
group.long 0x54++0x3
|
|
line.long 0x0 "PIO6,Pin I/O Control Register 6"
|
|
bitfld.long 0x00 2. " TX_ODR ,TX Open Drain Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RX_ODR ,RX Open Drain Enable" "Disabled,Enabled"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_ODR ,CLK Open Drain Enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "PIO7,Pin I/O Control Register 7"
|
|
bitfld.long 0x00 2. " TX_PD ,TX Pin Pull Control Disable" "No,Yes"
|
|
bitfld.long 0x00 1. " RX_PD ,RX Pin Pull Control Disable" "No,Yes"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&cpu()!=("TMS570LS1114*")&&cpu()!=("TMS570LS1115*")&&cpu()!=("TMS570LS1224*")&&cpu()!=("TMS570LS1225*")&&cpu()!=("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_PD ,CLK Pin Pull Control Disable" "No,Yes"
|
|
endif
|
|
group.long 0x5C++0x3
|
|
line.long 0x0 "PIO8,Pin I/O Control Register 8"
|
|
bitfld.long 0x00 2. " TX_PSL ,TX Pin Pull Select" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " RX_PSL ,RX Pin Pull Select" "Pull down,Pull up"
|
|
sif (cpu()!="TMS570PSFC61"&&cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*"))
|
|
textline " "
|
|
bitfld.long 0x00 0. " CLK_PSL ,CLK Pin Pull Select" "Pull down,Pull up"
|
|
endif
|
|
tree.end
|
|
tree "BLIN Registers"
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "LINCOMP,BLINCOMPARE Register"
|
|
bitfld.long 0x00 8.--9. " SDEL ,2-bit Synch Delimiter Compare" "1 bit,2 bits,3 bits,4 bits"
|
|
bitfld.long 0x00 0.--2. " SBREAK ,3-bit Synch Break Extend" "Not extended,1 bit,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits"
|
|
else
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x0 "LINCOMP,BLINCOMPARE Register"
|
|
endif
|
|
sif (cpu()!="TMS570LC4357"&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432"))
|
|
hgroup.long 0x64++0x3
|
|
hide.long 0x0 "LINRD0,LINRD0 Register"
|
|
in
|
|
hgroup.long 0x68++0x3
|
|
hide.long 0x0 "LINRD1,LINRD1 Register"
|
|
in
|
|
else
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x0 "LINRD0,LINRD0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 0x1 " RD0 ,Receive Buffer 0"
|
|
hexmask.long.byte 0x00 16.--23. 0x1 " RD1 ,Receive Buffer 1"
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " RD2 ,Receive Buffer 2"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " RD3 ,Receive Buffer 3"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x0 "LINRD1,LINRD1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 0x1 " RD4 ,Receive Buffer 4"
|
|
hexmask.long.byte 0x00 16.--23. 0x1 " RD5 , Receive Buffer 5"
|
|
hexmask.long.byte 0x00 8.--15. 0x1 " RD6 ,Receive Buffer 6"
|
|
hexmask.long.byte 0x00 0.--7. 0x1 " RD7 ,Receive Buffer 7"
|
|
endif
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x6C++0x3
|
|
line.long 0x0 "LINMASK,LINMASK Register"
|
|
bitfld.long 0x00 23. " RX_ID_MASK7 ,RX ID Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " RX_ID_MASK6 ,RX ID Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " RX_ID_MASK5 ,RX ID Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " RX_ID_MASK4 ,RX ID Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RX_ID_MASK3 ,RX ID Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " RX_ID_MASK2 ,RX ID Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " RX_ID_MASK1 ,RX ID Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " RX_ID_MASK0 ,RX ID Mask 0" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " TX_ID_MASK7 ,TX ID Mask 7" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " TX_ID_MASK6 ,TX ID Mask 6" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " TX_ID_MASK5 ,TX ID Mask 5" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " TX_ID_MASK4 ,TX ID Mask 4" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TX_ID_MASK3 ,TX ID Mask 3" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " TX_ID_MASK2 ,TX ID Mask 2" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TX_ID_MASK1 ,TX ID Mask 1" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " TX_ID_MASK0 ,TX ID Mask 0" "Not masked,Masked"
|
|
else
|
|
hgroup.long 0x6C++0x3
|
|
hide.long 0x0 "LINMASK,LINMASK Register"
|
|
endif
|
|
width 9.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x70++0x3
|
|
line.long 0x0 "LINID,LINID Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " RECEIVED_ID ,Received Identifier"
|
|
hexmask.long.byte 0x00 8.--15. 1. " ID_SLAVETASK_BYTE ,Identifier Slave Task Byte"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ID_BYTE ,Identifier Byte"
|
|
else
|
|
hgroup.long 0x70++0x3
|
|
hide.long 0x0 "LINID,LINID Register"
|
|
endif
|
|
width 9.
|
|
group.long 0x74++0x3
|
|
line.long 0x0 "LINTD0,LINTD0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TD0 ,8-bit Transmit Buffer 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TD1 ,8-bit Transmit Buffer 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TD2 ,8-bit Transmit Buffer 2"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD3 ,8-bit Transmit Buffer 3"
|
|
group.long 0x78++0x3
|
|
line.long 0x0 "LINTD1,LINTD1 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TD4 ,8-bit Transmit Buffer 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TD5 ,8-bit Transmit Buffer 5"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TD6 ,8-bit Transmit Buffer 6"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD7 ,8-bit Transmit Buffer 7"
|
|
tree.end
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x7C++0x3
|
|
line.long 0x0 "MBRSR,Maximum Baud Rate Selection Register"
|
|
hexmask.long.word 0x00 0.--12. 1. " MBR ,Maximum Baud Rate Prescaler"
|
|
else
|
|
hgroup.long 0x7C++0x3
|
|
hide.long 0x0 "MBRSR,Maximum Baud Rate Selection Register"
|
|
endif
|
|
sif (cpu()!="TMS470MF031")&&(cpu()!="TMS470MF042")&&(cpu()!="TMS470MF066")&&cpu()!=("TMS570LS10116-ZWT")&&cpu()!=("TMS570LS10216-ZWT")&&cpu()!=("TMS570LS10106-ZWT")&&cpu()!=("TMS570LS10206-ZWT")&&cpu()!=("TMS570LS10116-PGE")&&cpu()!=("TMS570LS10216-PGE")&&cpu()!=("TMS570LS10106-PGE")&&cpu()!=("TMS570LS10206-PGE")&&(cpu()!="TMS570LC4357")&&cpu()!=("TMS570LS0332")&&cpu()!=("TMS570LS0432")&&!cpuis("TMS570LS1114*")&&!cpuis("TMS570LS1115*")&&!cpuis("TMS570LS1224*")&&!cpuis("TMS570LS1225*")&&!cpuis("TMS570LS1227*")&&!cpuis("TMS570LS21*")&&!cpuis("TMS570LS31*")
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "PIO9,Pin I/O Control Register 9"
|
|
bitfld.long 0x00 2. " TX_SL ,This Bit Controls the Slew Rate for the SCITX Pin" "Normal,Slew"
|
|
bitfld.long 0x00 1. " RX_SL ,This Bit Controls the Slew Rate for the SCIRX Pin" "Normal,Slew"
|
|
sif (cpu()!="TMS570PSFC61")
|
|
bitfld.long 0x00 0. " CLK_SL ,This Bit Controls the Slew Rate for the SCICLK Pin" "Normal,Slew"
|
|
endif
|
|
endif
|
|
width 11.
|
|
if ((d.l(ad:0xFFF7E400+0x4)&0x40)==0x40)
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "IODFTCTRL,IODFT for BLIN Moduler"
|
|
bitfld.long 0x00 31. " BEEN ,Bit Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " PBEEN ,Physical Bus Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " CEEN ,Checksum Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " ISFEEN ,Inconsistent Synch Field Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " FEEN ,Frame Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " PSM ,PIN SAMPLE MASK" "No mask,TBIT_CENTER,TBIT_CENTER + SCLK,TBIT_CENTER + 2 SCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TX_SHIFT ,Transmit Shift" "No delay,1 SCLK,2 SCLKs,3 SCLKs,4 SCLKs,5 SCLKs,6 SCLKs,7 SCLKs"
|
|
bitfld.long 0x00 8.--11. " IODFTENA ,IO DFT Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LPBENA ,Module Loopback Enable" "Analog,Digital"
|
|
bitfld.long 0x00 0. " RXPENA ,Module Analog Loopback Through Receive/Transmit Pin Enable" "Transmit,Receive"
|
|
else
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "IODFTCTRL,IODFT for BLIN Moduler"
|
|
bitfld.long 0x00 26. " FEEN ,Frame Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 25. " PEEN ,Parity Error Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " BDEEN ,Break Detect Error Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19.--20. " PSM ,PIN SAMPLE MASK" "No mask,TBIT_CENTER,TBIT_CENTER + SCLK,TBIT_CENTER + 2 SCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " TX_SHIFT ,Transmit Shift" "No delay,1 SCLK,2 SCLKs,3 SCLKs,4 SCLKs,5 SCLKs,6 SCLKs,7 SCLKs"
|
|
bitfld.long 0x00 8.--11. " IODFTENA ,IO DFT Enable Key" "Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Disabled,Enabled,Disabled,Disabled,Disabled,Disabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LPBENA ,Module Loopback Enable" "Analog,Digital"
|
|
bitfld.long 0x00 0. " RXPENA ,Module Analog Loopback Through Receive/Transmit Pin Enable" "Transmit,Receive"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "GIO (General-Purpose Input/Output)"
|
|
base ad:0xFFF7BC00
|
|
width 6.
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "GCR0,Global Control Register"
|
|
bitfld.long 0x00 0. " RESET ,GIO Global Control" "Reset,Normal"
|
|
width 8.
|
|
tree "GIO Interrupt Registers"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "INTDET,Interrupt Detect"
|
|
bitfld.long 0x00 7. " INTDET_0_7 ,GIOA7 Interrupt Detection Select" "Falling/rising,Both"
|
|
bitfld.long 0x00 6. " INTDET_0_6 ,GIOA6 Interrupt Detection Select" "Falling/rising,Both"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INTDET_0_5 ,GIOA5 Interrupt Detection Select" "Falling/rising,Both"
|
|
bitfld.long 0x00 4. " INTDET_0_4 ,GIOA4 Interrupt Detection Select" "Falling/rising,Both"
|
|
width 8.
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "POL,Interrupt Polarity"
|
|
bitfld.long 0x00 7. " GIOPOL_0_7 ,GIOA7 Polarity Select (User-priviledge/Low power mode)" "Falling/Low,Rising/High"
|
|
bitfld.long 0x00 6. " GIOPOL_0_6 ,GIOA6 Polarity Select (User-priviledge/Low power mode)" "Falling/Low,Rising/High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIOPOL_0_5 ,GIOA5 Polarity Select (User-priviledge/Low power mode)" "Falling/Low,Rising/High"
|
|
bitfld.long 0x00 4. " GIOPOL_0_4 ,GIOA4 Polarity Select (User-priviledge/Low power mode)" "Falling/Low,Rising/High"
|
|
width 8.
|
|
tree "GIO Interrupt Enable Registers"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "ENASET,Interrupt Enable Set"
|
|
bitfld.long 0x00 7. " GIOENASET_0_7 ,GIOA7 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOENASET_0_6 ,GIOA6 Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIOENASET_0_5 ,GIOA5 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOENASET_0_4 ,GIOA4 Interrupt Enable" "Disabled,Enabled"
|
|
width 8.
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "ENACLR,Interrupt Enable Clear"
|
|
bitfld.long 0x00 7. " GIOENACLR_0_7 ,GIOA7 Interrupt Disable" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOENACLR_0_6 ,GIOA6 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIOENACLR_0_5 ,GIOA5 Interrupt Disable" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOENACLR_0_4 ,GIOA4 Interrupt Disable" "No,Yes"
|
|
tree.end
|
|
width 8.
|
|
tree "GIO Interrupt Priority Registers"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "LVLSET,Interrupt Priority Set"
|
|
bitfld.long 0x00 7. " GIOLVLSET_0_7 ,GIOA7 High Priority Interrupt" "No effect,High priority"
|
|
bitfld.long 0x00 6. " GIOLVLSET_0_6 ,GIOA6 High Priority Interrupt" "No effect,High priority"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIOLVLSET_0_5 ,GIOA5 High Priority Interrupt" "No effect,High priority"
|
|
bitfld.long 0x00 4. " GIOLVLSET_0_4 ,GIOA4 High Priority Interrupt" "No effect,High priority"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "LVLCLR,Interrupt Priority Clear"
|
|
bitfld.long 0x00 7. " GIOLVLCLR_0_7 ,GIOA7 Low Priority Interrupt" "No effect,Low priority"
|
|
bitfld.long 0x00 6. " GIOLVLCLR_0_6 ,GIOA6 Low Priority Interrupt" "No effect,Low priority"
|
|
textline " "
|
|
bitfld.long 0x00 5. " GIOLVLCLR_0_5 ,GIOA5 Low Priority Interrupt" "No effect,Low priority"
|
|
bitfld.long 0x00 4. " GIOLVLCLR_0_4 ,GIOA4 Low Priority Interrupt" "No effect,Low priority"
|
|
tree.end
|
|
width 8.
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "FLG,Interrupt Flag"
|
|
eventfld.long 0x00 7. " GIOFLG_0_7 ,GIOA7 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 6. " GIOFLG_0_6 ,GIOA6 Flag" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 5. " GIOFLG_0_5 ,GIOA5 Flag" "Not occurred,Occurred"
|
|
eventfld.long 0x00 4. " GIOFLG_0_4 ,GIOA4 Flag" "Not occurred,Occurred"
|
|
width 6.
|
|
tree "GIO Interrupt Offset Registers"
|
|
hgroup.long 0x24++0x3
|
|
hide.long 0x0 "OFFA,Offset A"
|
|
in
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "EMUA,Emulation A"
|
|
bitfld.long 0x00 0.--5. " GIOEMUA ,GIO Offset A" "No interrupt,Interrupt 0,Interrupt 1,Interrupt 2,Interrupt 3,Interrupt 4,Interrupt 5,Interrupt 6,Interrupt 7,Interrupt 8,Interrupt 9,Interrupt 10,Interrupt 11,Interrupt 12,Interrupt 13,Interrupt 14,Interrupt 15,Interrupt 16,Interrupt 17,Interrupt 18,Interrupt 19,Interrupt 20,Interrupt 21,Interrupt 22,Interrupt 23,Interrupt 24,Interrupt 25,Interrupt 26,Interrupt 27,Interrupt 28,Interrupt 29,Interrupt 30,Interrupt 31,?..."
|
|
hgroup.long 0x28++0x3
|
|
hide.long 0x0 "OFFB,Offset B"
|
|
in
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "EMUB,Emulation B"
|
|
bitfld.long 0x00 0.--5. " GIOEMUB ,GIO Offset B" "No interrupt,Interrupt 0,Interrupt 1,Interrupt 2,Interrupt 3,Interrupt 4,Interrupt 5,Interrupt 6,Interrupt 7,Interrupt 8,Interrupt 9,Interrupt 10,Interrupt 11,Interrupt 12,Interrupt 13,Interrupt 14,Interrupt 15,Interrupt 16,Interrupt 17,Interrupt 18,Interrupt 19,Interrupt 20,Interrupt 21,Interrupt 22,Interrupt 23,Interrupt 24,Interrupt 25,Interrupt 26,Interrupt 27,Interrupt 28,Interrupt 29,Interrupt 30,Interrupt 31,?..."
|
|
tree.end
|
|
width 12.
|
|
tree "GIO Data Registers"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "GIODIRA,GIO Data Direction Register 0x34"
|
|
bitfld.long 0x00 7. " GIODIRA[7] ,GIO data direction of port A pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRA[6] ,GIO data direction of port A pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRA[5] ,GIO data direction of port A pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRA[4] ,GIO data direction of port A pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRA[3] ,GIO data direction of port A pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRA[2] ,GIO data direction of port A pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRA[1] ,GIO data direction of port A pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRA[0] ,GIO data direction of port A pin 0" "Disabled,Enabled"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "GIODIRB,GIO Data Direction Register 0x54"
|
|
bitfld.long 0x00 7. " GIODIRB[7] ,GIO data direction of port B pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRB[6] ,GIO data direction of port B pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRB[5] ,GIO data direction of port B pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRB[4] ,GIO data direction of port B pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRB[3] ,GIO data direction of port B pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRB[2] ,GIO data direction of port B pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRB[1] ,GIO data direction of port B pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRB[0] ,GIO data direction of port B pin 0" "Disabled,Enabled"
|
|
group.long 0x74++0x03
|
|
line.long 0x00 "GIODIRC,GIO Data Direction Register 0x74"
|
|
bitfld.long 0x00 7. " GIODIRC[7] ,GIO data direction of port C pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRC[6] ,GIO data direction of port C pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRC[5] ,GIO data direction of port C pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRC[4] ,GIO data direction of port C pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRC[3] ,GIO data direction of port C pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRC[2] ,GIO data direction of port C pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRC[1] ,GIO data direction of port C pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRC[0] ,GIO data direction of port C pin 0" "Disabled,Enabled"
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "GIODIRD,GIO Data Direction Register 0x94"
|
|
bitfld.long 0x00 7. " GIODIRD[7] ,GIO data direction of port D pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRD[6] ,GIO data direction of port D pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRD[5] ,GIO data direction of port D pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRD[4] ,GIO data direction of port D pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRD[3] ,GIO data direction of port D pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRD[2] ,GIO data direction of port D pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRD[1] ,GIO data direction of port D pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRD[0] ,GIO data direction of port D pin 0" "Disabled,Enabled"
|
|
group.long 0xB4++0x03
|
|
line.long 0x00 "GIODIRE,GIO Data Direction Register 0xB4"
|
|
bitfld.long 0x00 7. " GIODIRE[7] ,GIO data direction of port E pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRE[6] ,GIO data direction of port E pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRE[5] ,GIO data direction of port E pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRE[4] ,GIO data direction of port E pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRE[3] ,GIO data direction of port E pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRE[2] ,GIO data direction of port E pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRE[1] ,GIO data direction of port E pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRE[0] ,GIO data direction of port E pin 0" "Disabled,Enabled"
|
|
group.long 0xD4++0x03
|
|
line.long 0x00 "GIODIRF,GIO Data Direction Register 0xD4"
|
|
bitfld.long 0x00 7. " GIODIRF[7] ,GIO data direction of port F pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRF[6] ,GIO data direction of port F pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRF[5] ,GIO data direction of port F pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRF[4] ,GIO data direction of port F pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRF[3] ,GIO data direction of port F pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRF[2] ,GIO data direction of port F pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRF[1] ,GIO data direction of port F pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRF[0] ,GIO data direction of port F pin 0" "Disabled,Enabled"
|
|
group.long 0xF4++0x03
|
|
line.long 0x00 "GIODIRG,GIO Data Direction Register 0xF4"
|
|
bitfld.long 0x00 7. " GIODIRG[7] ,GIO data direction of port G pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRG[6] ,GIO data direction of port G pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRG[5] ,GIO data direction of port G pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRG[4] ,GIO data direction of port G pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRG[3] ,GIO data direction of port G pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRG[2] ,GIO data direction of port G pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRG[1] ,GIO data direction of port G pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRG[0] ,GIO data direction of port G pin 0" "Disabled,Enabled"
|
|
group.long 0x114++0x03
|
|
line.long 0x00 "GIODIRH,GIO Data Direction Register 0x114"
|
|
bitfld.long 0x00 7. " GIODIRH[7] ,GIO data direction of port H pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIODIRH[6] ,GIO data direction of port H pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIODIRH[5] ,GIO data direction of port H pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIODIRH[4] ,GIO data direction of port H pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIRH[3] ,GIO data direction of port H pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIODIRH[2] ,GIO data direction of port H pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIODIRH[1] ,GIO data direction of port H pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIODIRH[0] ,GIO data direction of port H pin 0" "Disabled,Enabled"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "GIODINA,GIO Data Input Register 0x38"
|
|
bitfld.long 0x00 7. " GIODINA[7] ,GIO data input of port A pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINA[6] ,GIO data input of port A pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINA[5] ,GIO data input of port A pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINA[4] ,GIO data input of port A pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINA[3] ,GIO data input of port A pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINA[2] ,GIO data input of port A pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINA[1] ,GIO data input of port A pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINA[0] ,GIO data input of port A pin 0" "Low,High"
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GIODINB,GIO Data Input Register 0x58"
|
|
bitfld.long 0x00 7. " GIODINB[7] ,GIO data input of port B pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINB[6] ,GIO data input of port B pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINB[5] ,GIO data input of port B pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINB[4] ,GIO data input of port B pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINB[3] ,GIO data input of port B pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINB[2] ,GIO data input of port B pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINB[1] ,GIO data input of port B pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINB[0] ,GIO data input of port B pin 0" "Low,High"
|
|
group.long 0x78++0x03
|
|
line.long 0x00 "GIODINC,GIO Data Input Register 0x78"
|
|
bitfld.long 0x00 7. " GIODINC[7] ,GIO data input of port C pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINC[6] ,GIO data input of port C pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINC[5] ,GIO data input of port C pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINC[4] ,GIO data input of port C pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINC[3] ,GIO data input of port C pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINC[2] ,GIO data input of port C pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINC[1] ,GIO data input of port C pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINC[0] ,GIO data input of port C pin 0" "Low,High"
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "GIODIND,GIO Data Input Register 0x98"
|
|
bitfld.long 0x00 7. " GIODIND[7] ,GIO data input of port D pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODIND[6] ,GIO data input of port D pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODIND[5] ,GIO data input of port D pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODIND[4] ,GIO data input of port D pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODIND[3] ,GIO data input of port D pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODIND[2] ,GIO data input of port D pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODIND[1] ,GIO data input of port D pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODIND[0] ,GIO data input of port D pin 0" "Low,High"
|
|
group.long 0xB8++0x03
|
|
line.long 0x00 "GIODINE,GIO Data Input Register 0xB8"
|
|
bitfld.long 0x00 7. " GIODINE[7] ,GIO data input of port E pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINE[6] ,GIO data input of port E pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINE[5] ,GIO data input of port E pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINE[4] ,GIO data input of port E pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINE[3] ,GIO data input of port E pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINE[2] ,GIO data input of port E pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINE[1] ,GIO data input of port E pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINE[0] ,GIO data input of port E pin 0" "Low,High"
|
|
group.long 0xD8++0x03
|
|
line.long 0x00 "GIODINF,GIO Data Input Register 0xD8"
|
|
bitfld.long 0x00 7. " GIODINF[7] ,GIO data input of port F pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINF[6] ,GIO data input of port F pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINF[5] ,GIO data input of port F pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINF[4] ,GIO data input of port F pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINF[3] ,GIO data input of port F pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINF[2] ,GIO data input of port F pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINF[1] ,GIO data input of port F pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINF[0] ,GIO data input of port F pin 0" "Low,High"
|
|
group.long 0xF8++0x03
|
|
line.long 0x00 "GIODING,GIO Data Input Register 0xF8"
|
|
bitfld.long 0x00 7. " GIODING[7] ,GIO data input of port G pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODING[6] ,GIO data input of port G pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODING[5] ,GIO data input of port G pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODING[4] ,GIO data input of port G pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODING[3] ,GIO data input of port G pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODING[2] ,GIO data input of port G pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODING[1] ,GIO data input of port G pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODING[0] ,GIO data input of port G pin 0" "Low,High"
|
|
group.long 0x118++0x03
|
|
line.long 0x00 "GIODINH,GIO Data Input Register 0x118"
|
|
bitfld.long 0x00 7. " GIODINH[7] ,GIO data input of port H pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " GIODINH[6] ,GIO data input of port H pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " GIODINH[5] ,GIO data input of port H pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " GIODINH[4] ,GIO data input of port H pin 4" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIODINH[3] ,GIO data input of port H pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " GIODINH[2] ,GIO data input of port H pin 2" "Low,High"
|
|
bitfld.long 0x00 1. " GIODINH[1] ,GIO data input of port H pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " GIODINH[0] ,GIO data input of port H pin 0" "Low,High"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "GIODOUTA,GIO Data Output Register 0x3C set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTA[7]_set/clr ,GIO data output of port A pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTA[6]_set/clr ,GIO data output of port A pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTA[5]_set/clr ,GIO data output of port A pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTA[4]_set/clr ,GIO data output of port A pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTA[3]_set/clr ,GIO data output of port A pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTA[2]_set/clr ,GIO data output of port A pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTA[1]_set/clr ,GIO data output of port A pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTA[0]_set/clr ,GIO data output of port A pin 0" "Low,High"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "GIODOUTB,GIO Data Output Register 0x5C set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTB[7]_set/clr ,GIO data output of port B pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTB[6]_set/clr ,GIO data output of port B pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTB[5]_set/clr ,GIO data output of port B pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTB[4]_set/clr ,GIO data output of port B pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTB[3]_set/clr ,GIO data output of port B pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTB[2]_set/clr ,GIO data output of port B pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTB[1]_set/clr ,GIO data output of port B pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTB[0]_set/clr ,GIO data output of port B pin 0" "Low,High"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "GIODOUTC,GIO Data Output Register 0x7C set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTC[7]_set/clr ,GIO data output of port C pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTC[6]_set/clr ,GIO data output of port C pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTC[5]_set/clr ,GIO data output of port C pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTC[4]_set/clr ,GIO data output of port C pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTC[3]_set/clr ,GIO data output of port C pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTC[2]_set/clr ,GIO data output of port C pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTC[1]_set/clr ,GIO data output of port C pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTC[0]_set/clr ,GIO data output of port C pin 0" "Low,High"
|
|
group.long 0x9C++0x03
|
|
line.long 0x00 "GIODOUTD,GIO Data Output Register 0x9C set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTD[7]_set/clr ,GIO data output of port D pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTD[6]_set/clr ,GIO data output of port D pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTD[5]_set/clr ,GIO data output of port D pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTD[4]_set/clr ,GIO data output of port D pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTD[3]_set/clr ,GIO data output of port D pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTD[2]_set/clr ,GIO data output of port D pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTD[1]_set/clr ,GIO data output of port D pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTD[0]_set/clr ,GIO data output of port D pin 0" "Low,High"
|
|
group.long 0xBC++0x03
|
|
line.long 0x00 "GIODOUTE,GIO Data Output Register 0xBC set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTE[7]_set/clr ,GIO data output of port E pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTE[6]_set/clr ,GIO data output of port E pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTE[5]_set/clr ,GIO data output of port E pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTE[4]_set/clr ,GIO data output of port E pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTE[3]_set/clr ,GIO data output of port E pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTE[2]_set/clr ,GIO data output of port E pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTE[1]_set/clr ,GIO data output of port E pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTE[0]_set/clr ,GIO data output of port E pin 0" "Low,High"
|
|
group.long 0xDC++0x03
|
|
line.long 0x00 "GIODOUTF,GIO Data Output Register 0xDC set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTF[7]_set/clr ,GIO data output of port F pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTF[6]_set/clr ,GIO data output of port F pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTF[5]_set/clr ,GIO data output of port F pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTF[4]_set/clr ,GIO data output of port F pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTF[3]_set/clr ,GIO data output of port F pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTF[2]_set/clr ,GIO data output of port F pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTF[1]_set/clr ,GIO data output of port F pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTF[0]_set/clr ,GIO data output of port F pin 0" "Low,High"
|
|
group.long 0xFC++0x03
|
|
line.long 0x00 "GIODOUTG,GIO Data Output Register 0xFC set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTG[7]_set/clr ,GIO data output of port G pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTG[6]_set/clr ,GIO data output of port G pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTG[5]_set/clr ,GIO data output of port G pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTG[4]_set/clr ,GIO data output of port G pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTG[3]_set/clr ,GIO data output of port G pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTG[2]_set/clr ,GIO data output of port G pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTG[1]_set/clr ,GIO data output of port G pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTG[0]_set/clr ,GIO data output of port G pin 0" "Low,High"
|
|
group.long 0x11C++0x03
|
|
line.long 0x00 "GIODOUTH,GIO Data Output Register 0x11C set/clear"
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " GIODOUTH[7]_set/clr ,GIO data output of port H pin 7" "Low,High"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " GIODOUTH[6]_set/clr ,GIO data output of port H pin 6" "Low,High"
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " GIODOUTH[5]_set/clr ,GIO data output of port H pin 5" "Low,High"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " GIODOUTH[4]_set/clr ,GIO data output of port H pin 4" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " GIODOUTH[3]_set/clr ,GIO data output of port H pin 3" "Low,High"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " GIODOUTH[2]_set/clr ,GIO data output of port H pin 2" "Low,High"
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " GIODOUTH[1]_set/clr ,GIO data output of port H pin 1" "Low,High"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " GIODOUTH[0]_set/clr ,GIO data output of port H pin 0" "Low,High"
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "GIOPDRA,GIO Open Drain Register 0x48"
|
|
bitfld.long 0x00 7. " GIOPDRA[7] ,GIO open drain for port A pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRA[6] ,GIO open drain for port A pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRA[5] ,GIO open drain for port A pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRA[4] ,GIO open drain for port A pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRA[3] ,GIO open drain for port A pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRA[2] ,GIO open drain for port A pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRA[1] ,GIO open drain for port A pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRA[0] ,GIO open drain for port A pin 0" "Disabled,Enabled"
|
|
group.long 0x68++0x03
|
|
line.long 0x00 "GIOPDRB,GIO Open Drain Register 0x68"
|
|
bitfld.long 0x00 7. " GIOPDRB[7] ,GIO open drain for port B pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRB[6] ,GIO open drain for port B pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRB[5] ,GIO open drain for port B pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRB[4] ,GIO open drain for port B pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRB[3] ,GIO open drain for port B pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRB[2] ,GIO open drain for port B pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRB[1] ,GIO open drain for port B pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRB[0] ,GIO open drain for port B pin 0" "Disabled,Enabled"
|
|
group.long 0x88++0x03
|
|
line.long 0x00 "GIOPDRC,GIO Open Drain Register 0x88"
|
|
bitfld.long 0x00 7. " GIOPDRC[7] ,GIO open drain for port C pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRC[6] ,GIO open drain for port C pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRC[5] ,GIO open drain for port C pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRC[4] ,GIO open drain for port C pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRC[3] ,GIO open drain for port C pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRC[2] ,GIO open drain for port C pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRC[1] ,GIO open drain for port C pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRC[0] ,GIO open drain for port C pin 0" "Disabled,Enabled"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "GIOPDRD,GIO Open Drain Register 0xA8"
|
|
bitfld.long 0x00 7. " GIOPDRD[7] ,GIO open drain for port D pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRD[6] ,GIO open drain for port D pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRD[5] ,GIO open drain for port D pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRD[4] ,GIO open drain for port D pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRD[3] ,GIO open drain for port D pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRD[2] ,GIO open drain for port D pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRD[1] ,GIO open drain for port D pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRD[0] ,GIO open drain for port D pin 0" "Disabled,Enabled"
|
|
group.long 0xC8++0x03
|
|
line.long 0x00 "GIOPDRE,GIO Open Drain Register 0xC8"
|
|
bitfld.long 0x00 7. " GIOPDRE[7] ,GIO open drain for port E pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRE[6] ,GIO open drain for port E pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRE[5] ,GIO open drain for port E pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRE[4] ,GIO open drain for port E pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRE[3] ,GIO open drain for port E pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRE[2] ,GIO open drain for port E pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRE[1] ,GIO open drain for port E pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRE[0] ,GIO open drain for port E pin 0" "Disabled,Enabled"
|
|
group.long 0xE8++0x03
|
|
line.long 0x00 "GIOPDRF,GIO Open Drain Register 0xE8"
|
|
bitfld.long 0x00 7. " GIOPDRF[7] ,GIO open drain for port F pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRF[6] ,GIO open drain for port F pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRF[5] ,GIO open drain for port F pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRF[4] ,GIO open drain for port F pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRF[3] ,GIO open drain for port F pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRF[2] ,GIO open drain for port F pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRF[1] ,GIO open drain for port F pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRF[0] ,GIO open drain for port F pin 0" "Disabled,Enabled"
|
|
group.long 0x108++0x03
|
|
line.long 0x00 "GIOPDRG,GIO Open Drain Register 0x108"
|
|
bitfld.long 0x00 7. " GIOPDRG[7] ,GIO open drain for port G pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRG[6] ,GIO open drain for port G pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRG[5] ,GIO open drain for port G pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRG[4] ,GIO open drain for port G pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRG[3] ,GIO open drain for port G pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRG[2] ,GIO open drain for port G pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRG[1] ,GIO open drain for port G pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRG[0] ,GIO open drain for port G pin 0" "Disabled,Enabled"
|
|
group.long 0x128++0x03
|
|
line.long 0x00 "GIOPDRH,GIO Open Drain Register 0x128"
|
|
bitfld.long 0x00 7. " GIOPDRH[7] ,GIO open drain for port H pin 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " GIOPDRH[6] ,GIO open drain for port H pin 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " GIOPDRH[5] ,GIO open drain for port H pin 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " GIOPDRH[4] ,GIO open drain for port H pin 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPDRH[3] ,GIO open drain for port H pin 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " GIOPDRH[2] ,GIO open drain for port H pin 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " GIOPDRH[1] ,GIO open drain for port H pin 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " GIOPDRH[0] ,GIO open drain for port H pin 0" "Disabled,Enabled"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "GIOPULDISA,GIO Pull Disable Register 0x4C"
|
|
bitfld.long 0x00 7. " GIOPULDISA[7] ,GIO pull disable for port A pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISA[6] ,GIO pull disable for port A pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISA[5] ,GIO pull disable for port A pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISA[4] ,GIO pull disable for port A pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISA[3] ,GIO pull disable for port A pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISA[2] ,GIO pull disable for port A pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISA[1] ,GIO pull disable for port A pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISA[0] ,GIO pull disable for port A pin 0" "No,Yes"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "GIOPULDISB,GIO Pull Disable Register 0x6C"
|
|
bitfld.long 0x00 7. " GIOPULDISB[7] ,GIO pull disable for port B pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISB[6] ,GIO pull disable for port B pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISB[5] ,GIO pull disable for port B pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISB[4] ,GIO pull disable for port B pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISB[3] ,GIO pull disable for port B pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISB[2] ,GIO pull disable for port B pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISB[1] ,GIO pull disable for port B pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISB[0] ,GIO pull disable for port B pin 0" "No,Yes"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GIOPULDISC,GIO Pull Disable Register 0x8C"
|
|
bitfld.long 0x00 7. " GIOPULDISC[7] ,GIO pull disable for port C pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISC[6] ,GIO pull disable for port C pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISC[5] ,GIO pull disable for port C pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISC[4] ,GIO pull disable for port C pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISC[3] ,GIO pull disable for port C pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISC[2] ,GIO pull disable for port C pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISC[1] ,GIO pull disable for port C pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISC[0] ,GIO pull disable for port C pin 0" "No,Yes"
|
|
group.long 0xAC++0x03
|
|
line.long 0x00 "GIOPULDISD,GIO Pull Disable Register 0xAC"
|
|
bitfld.long 0x00 7. " GIOPULDISD[7] ,GIO pull disable for port D pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISD[6] ,GIO pull disable for port D pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISD[5] ,GIO pull disable for port D pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISD[4] ,GIO pull disable for port D pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISD[3] ,GIO pull disable for port D pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISD[2] ,GIO pull disable for port D pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISD[1] ,GIO pull disable for port D pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISD[0] ,GIO pull disable for port D pin 0" "No,Yes"
|
|
group.long 0xCC++0x03
|
|
line.long 0x00 "GIOPULDISE,GIO Pull Disable Register 0xCC"
|
|
bitfld.long 0x00 7. " GIOPULDISE[7] ,GIO pull disable for port E pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISE[6] ,GIO pull disable for port E pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISE[5] ,GIO pull disable for port E pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISE[4] ,GIO pull disable for port E pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISE[3] ,GIO pull disable for port E pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISE[2] ,GIO pull disable for port E pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISE[1] ,GIO pull disable for port E pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISE[0] ,GIO pull disable for port E pin 0" "No,Yes"
|
|
group.long 0xEC++0x03
|
|
line.long 0x00 "GIOPULDISF,GIO Pull Disable Register 0xEC"
|
|
bitfld.long 0x00 7. " GIOPULDISF[7] ,GIO pull disable for port F pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISF[6] ,GIO pull disable for port F pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISF[5] ,GIO pull disable for port F pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISF[4] ,GIO pull disable for port F pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISF[3] ,GIO pull disable for port F pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISF[2] ,GIO pull disable for port F pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISF[1] ,GIO pull disable for port F pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISF[0] ,GIO pull disable for port F pin 0" "No,Yes"
|
|
group.long 0x10C++0x03
|
|
line.long 0x00 "GIOPULDISG,GIO Pull Disable Register 0x10C"
|
|
bitfld.long 0x00 7. " GIOPULDISG[7] ,GIO pull disable for port G pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISG[6] ,GIO pull disable for port G pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISG[5] ,GIO pull disable for port G pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISG[4] ,GIO pull disable for port G pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISG[3] ,GIO pull disable for port G pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISG[2] ,GIO pull disable for port G pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISG[1] ,GIO pull disable for port G pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISG[0] ,GIO pull disable for port G pin 0" "No,Yes"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "GIOPULDISH,GIO Pull Disable Register 0x12C"
|
|
bitfld.long 0x00 7. " GIOPULDISH[7] ,GIO pull disable for port H pin 7" "No,Yes"
|
|
bitfld.long 0x00 6. " GIOPULDISH[6] ,GIO pull disable for port H pin 6" "No,Yes"
|
|
bitfld.long 0x00 5. " GIOPULDISH[5] ,GIO pull disable for port H pin 5" "No,Yes"
|
|
bitfld.long 0x00 4. " GIOPULDISH[4] ,GIO pull disable for port H pin 4" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPULDISH[3] ,GIO pull disable for port H pin 3" "No,Yes"
|
|
bitfld.long 0x00 2. " GIOPULDISH[2] ,GIO pull disable for port H pin 2" "No,Yes"
|
|
bitfld.long 0x00 1. " GIOPULDISH[1] ,GIO pull disable for port H pin 1" "No,Yes"
|
|
bitfld.long 0x00 0. " GIOPULDISH[0] ,GIO pull disable for port H pin 0" "No,Yes"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "GIOPSLA,GIO Pull Select Register 0x50"
|
|
bitfld.long 0x00 7. " GIOPSLA[7] ,GIO pull select for port A pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLA[6] ,GIO pull select for port A pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLA[5] ,GIO pull select for port A pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLA[4] ,GIO pull select for port A pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLA[3] ,GIO pull select for port A pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLA[2] ,GIO pull select for port A pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLA[1] ,GIO pull select for port A pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLA[0] ,GIO pull select for port A pin 0" "Pull down,Pull up"
|
|
group.long 0x70++0x03
|
|
line.long 0x00 "GIOPSLB,GIO Pull Select Register 0x70"
|
|
bitfld.long 0x00 7. " GIOPSLB[7] ,GIO pull select for port B pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLB[6] ,GIO pull select for port B pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLB[5] ,GIO pull select for port B pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLB[4] ,GIO pull select for port B pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLB[3] ,GIO pull select for port B pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLB[2] ,GIO pull select for port B pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLB[1] ,GIO pull select for port B pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLB[0] ,GIO pull select for port B pin 0" "Pull down,Pull up"
|
|
group.long 0x90++0x03
|
|
line.long 0x00 "GIOPSLC,GIO Pull Select Register 0x90"
|
|
bitfld.long 0x00 7. " GIOPSLC[7] ,GIO pull select for port C pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLC[6] ,GIO pull select for port C pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLC[5] ,GIO pull select for port C pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLC[4] ,GIO pull select for port C pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLC[3] ,GIO pull select for port C pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLC[2] ,GIO pull select for port C pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLC[1] ,GIO pull select for port C pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLC[0] ,GIO pull select for port C pin 0" "Pull down,Pull up"
|
|
group.long 0xB0++0x03
|
|
line.long 0x00 "GIOPSLD,GIO Pull Select Register 0xB0"
|
|
bitfld.long 0x00 7. " GIOPSLD[7] ,GIO pull select for port D pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLD[6] ,GIO pull select for port D pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLD[5] ,GIO pull select for port D pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLD[4] ,GIO pull select for port D pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLD[3] ,GIO pull select for port D pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLD[2] ,GIO pull select for port D pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLD[1] ,GIO pull select for port D pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLD[0] ,GIO pull select for port D pin 0" "Pull down,Pull up"
|
|
group.long 0xD0++0x03
|
|
line.long 0x00 "GIOPSLE,GIO Pull Select Register 0xD0"
|
|
bitfld.long 0x00 7. " GIOPSLE[7] ,GIO pull select for port E pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLE[6] ,GIO pull select for port E pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLE[5] ,GIO pull select for port E pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLE[4] ,GIO pull select for port E pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLE[3] ,GIO pull select for port E pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLE[2] ,GIO pull select for port E pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLE[1] ,GIO pull select for port E pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLE[0] ,GIO pull select for port E pin 0" "Pull down,Pull up"
|
|
group.long 0xF0++0x03
|
|
line.long 0x00 "GIOPSLF,GIO Pull Select Register 0xF0"
|
|
bitfld.long 0x00 7. " GIOPSLF[7] ,GIO pull select for port F pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLF[6] ,GIO pull select for port F pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLF[5] ,GIO pull select for port F pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLF[4] ,GIO pull select for port F pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLF[3] ,GIO pull select for port F pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLF[2] ,GIO pull select for port F pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLF[1] ,GIO pull select for port F pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLF[0] ,GIO pull select for port F pin 0" "Pull down,Pull up"
|
|
group.long 0x110++0x03
|
|
line.long 0x00 "GIOPSLG,GIO Pull Select Register 0x110"
|
|
bitfld.long 0x00 7. " GIOPSLG[7] ,GIO pull select for port G pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLG[6] ,GIO pull select for port G pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLG[5] ,GIO pull select for port G pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLG[4] ,GIO pull select for port G pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLG[3] ,GIO pull select for port G pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLG[2] ,GIO pull select for port G pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLG[1] ,GIO pull select for port G pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLG[0] ,GIO pull select for port G pin 0" "Pull down,Pull up"
|
|
group.long 0x130++0x03
|
|
line.long 0x00 "GIOPSLH,GIO Pull Select Register 0x130"
|
|
bitfld.long 0x00 7. " GIOPSLH[7] ,GIO pull select for port H pin 7" "Pull down,Pull up"
|
|
bitfld.long 0x00 6. " GIOPSLH[6] ,GIO pull select for port H pin 6" "Pull down,Pull up"
|
|
bitfld.long 0x00 5. " GIOPSLH[5] ,GIO pull select for port H pin 5" "Pull down,Pull up"
|
|
bitfld.long 0x00 4. " GIOPSLH[4] ,GIO pull select for port H pin 4" "Pull down,Pull up"
|
|
textline " "
|
|
bitfld.long 0x00 3. " GIOPSLH[3] ,GIO pull select for port H pin 3" "Pull down,Pull up"
|
|
bitfld.long 0x00 2. " GIOPSLH[2] ,GIO pull select for port H pin 2" "Pull down,Pull up"
|
|
bitfld.long 0x00 1. " GIOPSLH[1] ,GIO pull select for port H pin 1" "Pull down,Pull up"
|
|
bitfld.long 0x00 0. " GIOPSLH[0] ,GIO pull select for port H pin 0" "Pull down,Pull up"
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
textline " "
|