20668 lines
1.3 MiB
20668 lines
1.3 MiB
; --------------------------------------------------------------------------------
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; @Title: TMS320DM355 On-Chip Peripherals
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; @Props: Released
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; @Author: ADI
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; @Changelog: 2008-08-13 ADI
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; @Manufacturer: TI - Texas Instruments
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; @Doc: tms320dm355.pdf; spruf74.pdf; sprued3c.pdf; spruee0a.pdf; sprued9b.pdf
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; spruee5a.pdf; spruee7a.pdf; sprufb3.pdf; sprued4b.pdf; sprued1b.pdf
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; spruee4a.pdf; sprueh7d.pdf; spruee2c.pdf; sprufc8a.pdf; sprued2c.pdf
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; spruee6b.pdf; spruf72b.pdf; spruf71a.pdf
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; @Core: ARM926EJ-S
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; @Chip: TMS320DM355
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pertms320dm355.per 7592 2017-02-18 13:54:14Z askoncej $
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config 16. 8.
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width 0xb
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tree.open "ARM Core Registers"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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width 8.
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tree "ID Registers"
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group c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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group c15:0x0100--0x0100
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line.long 0x0 "CTR,Cache Type"
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bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x0200--0x0200
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line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
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bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
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bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
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tree.end
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tree "MMU Control and Configuration"
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width 8.
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group c15:0x0001--0x0001
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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textline " "
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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textline " "
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group c15:0x0002--0x0002
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line.long 0x0 "TTBR,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x0005--0x0005
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0105--0x0105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0006--0x0006
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line.long 0x0 "DFAR,Data Fault Address Register"
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textline " "
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group c15:0x000a--0x000a
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line.long 0x0 "TLBR,TLB Lockdown Register"
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bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
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bitfld.long 0x0 0. " P ,P bit" "0,1"
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textline " "
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group c15:0x000d--0x000d
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line.long 0x0 "FCSEPID,FCSE Process ID"
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group c15:0x010d--0x010d
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line.long 0x0 "CONTEXT,Context ID"
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tree.end
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tree "Cache Control and Configuration"
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group c15:0x0009--0x0009
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line.long 0x0 "DCACHE,Data Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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group c15:0x0109--0x0109
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line.long 0x0 "ICACHE,Instruction Cache Lockdown"
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bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
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bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
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bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
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bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
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tree.end
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tree "TCM Control and Configuration"
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group c15:0x0019--0x0019
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line.long 0x0 "DTCM,Data TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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group c15:0x0119--0x0119
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line.long 0x0 "ITCM,Instruction TCM Region Register"
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hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
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bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
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bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
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tree.end
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tree "Test and Debug"
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group c15:0x000f--0x000f
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line.long 0x0 "DOVRR,Debug Override Register"
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bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
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bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
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bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
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textline " "
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bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
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bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
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bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
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bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
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group c15:0x001f--0x001f
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line.long 0x0 "ADDRESS,Debug/Test Address"
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;wgroup c15:0x402f--0x402f
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; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
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;wgroup c15:0x403f--0x403f
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; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
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;wgroup c15:0x404f--0x404f
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; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
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;wgroup c15:0x405f--0x405f
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; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
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;wgroup c15:0x407f--0x407f
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; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
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;wgroup c15:0x412f--0x412f
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; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
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;wgroup c15:0x413f--0x413f
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; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
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;wgroup c15:0x414f--0x414f
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; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
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;wgroup c15:0x415f--0x415f
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; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
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;wgroup c15:0x417f--0x417f
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; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
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group c15:0x101f--0x101f
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line.long 0x0 "TRACE,Trace Control"
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bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
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bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
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group c15:0x700f--0x700f
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line.long 0x0 "CACHE,Cache Debug Control"
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bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
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bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
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bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
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group c15:0x701f--0x701f
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line.long 0x0 "MMU,MMU Debug Control"
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bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
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textline " "
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bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
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bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
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bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
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bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
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group c15:0x002f--0x002f
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line.long 0x0 "REMAP,Memory Region Remap"
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bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
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textline " "
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bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
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bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
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tree.end
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tree "ICEbreaker"
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width 8.
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group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x4 "DBGSTAT,Debug Status Register"
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bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
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bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
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bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
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bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
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line.long 0x14 "COMDATA,Debug Communication Data Register"
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
tree "EMIF (Asynchronous External Memory Interface)"
|
|
base asd:0x01e10000
|
|
width 17.
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "AWCCR,Asynchronous Wait Cycle Configuration Register"
|
|
bitfld.long 0x00 28. " WP0 ,WAIT polarity" "Low,High"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MEWC ,Maximum extended wait cycles"
|
|
sif (cpu()=="DM357")
|
|
group.long 0x10++0xf
|
|
line.long 0x0 "A1CR,Asynchronous 1 Configuration Register"
|
|
bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
line.long 0x4 "A2CR,Asynchronous 2 Configuration Register"
|
|
bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
line.long 0x8 "A3CR,Asynchronous 3 Configuration Register"
|
|
bitfld.long 0x8 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0x8 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0x8 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x8 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x8 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0x8 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x8 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x8 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0x8 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x8 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
line.long 0xC "A4CR,Asynchronous 4 Configuration Register"
|
|
bitfld.long 0xC 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0xC 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0xC 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0xC 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0xC 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0xC 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0xC 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0xC 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0xC 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0xC 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
else
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "A1CR,Asynchronous 1 Configuration Register"
|
|
bitfld.long 0x0 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0x0 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0x0 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x0 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x0 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x0 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0x0 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
line.long 0x4 "A2CR,Asynchronous 2 Configuration Register"
|
|
bitfld.long 0x4 31. " SS ,Select Strobe" "Disabled,Enabled"
|
|
bitfld.long 0x4 30. " EW ,Extend Wait" "Disabled,Enabled"
|
|
hexmask.long.byte 0x4 26.--29. 1. " W_SETUP ,Write setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x4 20.--25. 1. " W_STROBE ,Write strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 17.--19. 1. " W_HOLD ,Write hold width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 13.--16. 1. " R_SETUP ,Read setup width in EM_CLK cycles"
|
|
textline " "
|
|
hexmask.long.byte 0x4 7.--12. 1. " R_STROBE ,Read strobe width in EM_CLK cycles"
|
|
hexmask.long.byte 0x4 4.--6. 1. " R_HOLD ,Read hold width in EM_CLK cycles"
|
|
bitfld.long 0x4 2.--3. " TA ,Minimum Turn-Around time" "0,1,2,3"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " ASIZE ,Asynchronous Data Bus Width" "8-bit,16-bit,?..."
|
|
endif
|
|
group.long 0x40++0x7
|
|
line.long 0x00 "EIRR,EMIF Interrupt Raw Register"
|
|
eventfld.long 0x00 2. " WR ,Wait Rise" "Not occurred,Occurred"
|
|
eventfld.long 0x00 0. " AT ,Asynchronous Timeout" "Not occurred,Occurred"
|
|
line.long 0x04 "EIMR,EMIF Interrupt Mask Register"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " WRM_set/clr ,Wait Rise Masked" "No interrupt,Interrupt"
|
|
textline " "
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " ATM_set/clr ,Asynchronous Timeout Masked" "No interrupt,Interrupt"
|
|
sif (cpu()=="DM357")
|
|
group.long 0x60++0x03
|
|
line.long 0x00 "NANDFCR,NAND Flash Control Register"
|
|
bitfld.long 0x00 11. " CS5ECC ,NAND Flash ECC start for chip select 5" "Not started,Started"
|
|
bitfld.long 0x00 10. " CS4ECC ,NAND Flash ECC start for chip select 4" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started"
|
|
bitfld.long 0x00 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CS5NAND ,NAND Flash mode for chip select 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CS4NAND ,NAND Flash mode for chip select 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled"
|
|
else
|
|
group.long 0x5c++0x7
|
|
line.long 0x00 "ONENANDCTL,OneNAND Flash Control Register"
|
|
bitfld.long 0x00 8.--10. " RD_LATENCY ,Synchronous Mode Read Latency" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 5. " CS3ONENANDRDMOD ,CS3 One NAND Read Mode" "Async,Sync"
|
|
textline " "
|
|
bitfld.long 0x00 4. " CS2ONENANDRDMOD ,CS2 One NAND Read Mode" "Async,Sync"
|
|
bitfld.long 0x00 1. " CS3ONENANDSEL ,CS3 used for ONENAND mode operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " CS2ONENANDSEL ,CS2 used for ONENAND mode operation" "Disabled,Enabled"
|
|
line.long 0x04 "NANDFCR,NAND Flash Control Register"
|
|
bitfld.long 0x04 13. " 4BITECC_ADD_CALC_START ,NAND Flash 4-bit ECC address and error value calculation Start" "Not started,Started"
|
|
bitfld.long 0x04 12. " 4BITECC_START ,Nand Flash 4-bit ECC start for the selected chip select" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x04 9. " CS3ECC ,NAND Flash ECC start for chip select 3" "Not started,Started"
|
|
bitfld.long 0x04 8. " CS2ECC ,NAND Flash ECC start for chip select 2" "Not started,Started"
|
|
textline " "
|
|
bitfld.long 0x04 4.--5. " 4BITECCSEL ,4Bit ECC CS selection" "CS2,CS3,?..."
|
|
bitfld.long 0x04 1. " CS3NAND ,NAND Flash mode for chip select 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CS2NAND ,NAND Flash mode for chip select 2" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x00 "NANDFSR,NAND Flash Status Register"
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x00 16.--17. " ECC_ERRNUM ,Number of Errors found after the 4-Bit ECC Error Address and Error Value Calculation is done" "1 error,2 errors,3 errors,4 errors"
|
|
bitfld.long 0x00 8.--11. " ECC_STATE ,ECC correction state while performing 4-bit ECC Address and Error Value Calculation" "No errors,Not corrected(>=5),Completed,Completed,Reserved,Calculating number of errors,Preparing for error search,Preparing for error search,Searching for errors,Reserved,Reserved,Reserved,Calculating error value,Calculating error value,Calculating error value,Calculating error value"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 0.--3. " WAITST ,Raw status of EM_WAIT input pin" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
sif (cpu()=="DM357")
|
|
rgroup.long 0x70++0x13
|
|
line.long 0x0 "NANDF1ECC,NAND Flash 1 ECC Register"
|
|
bitfld.long 0x0 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x0 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
line.long 0x4 "NANDF2ECC,NAND Flash 2 ECC Register"
|
|
bitfld.long 0x4 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x4 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
line.long 0x8 "NANDF3ECC,NAND Flash 3 ECC Register"
|
|
bitfld.long 0x8 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0x8 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0x8 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
line.long 0xC "NANDF4ECC,NAND Flash 4 ECC Register"
|
|
bitfld.long 0xC 27. " P2048O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 26. " P1024O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 25. " P512O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 24. " P256O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 23. " P128O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 22. " P64O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 21. " P32O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 20. " P16O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 19. " P8O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 18. " P4O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 17. " P2O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 16. " P1O ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 11. " P2048E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 10. " P1024E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 9. " P512E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 8. " P256E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 7. " P128E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 6. " P64E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 5. " P32E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 4. " P16E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
textline " "
|
|
bitfld.long 0xC 3. " P8E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 2. " P4E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 1. " P2E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
bitfld.long 0xC 0. " P1E ,ECC code calculated while reading/writing NAND Flash" "0,1"
|
|
else
|
|
hgroup.long 0x70++0x3
|
|
hide.long 0x00 "NANDF1ECC,NAND Flash 1 ECC Register"
|
|
in
|
|
hgroup.long 0x74++0x3
|
|
hide.long 0x00 "NANDF2ECC,NAND Flash 2 ECC Register"
|
|
in
|
|
endif
|
|
sif (cpu()!="DM357")
|
|
group.long 0xbc++0x03
|
|
line.long 0x00 "NAND4BITECCLOAD,NAND Flash 4-bit ECC LOAD Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " 4BITECCLOAD ,4-bit ECC load"
|
|
hgroup.long 0xC0++0x03
|
|
hide.long 0x00 "NAND4BITECC1,NAND Flash 4-bit ECC Register 1"
|
|
in
|
|
hgroup.long 0xC4++0x03
|
|
hide.long 0x00 "NAND4BITECC2,NAND Flash 4-bit ECC Register 2"
|
|
in
|
|
hgroup.long 0xC8++0x03
|
|
hide.long 0x00 "NAND4BITECC3,NAND Flash 4-bit ECC Register 3"
|
|
in
|
|
hgroup.long 0xCC++0x03
|
|
hide.long 0x00 "NAND4BITECC4,NAND Flash 4-bit ECC Register 4"
|
|
in
|
|
hgroup.long 0xd0++0x3
|
|
hide.long 0x00 "NANDERRADD1,NAND Flash 4-bit ECC Error Address Register 1"
|
|
in
|
|
hgroup.long 0xd4++0x3
|
|
hide.long 0x00 "NANDERRADD2,NAND Flash 4-bit ECC Error Address Register 2"
|
|
in
|
|
hgroup.long 0xd8++0x3
|
|
hide.long 0x00 "NANDERRVAL1,NAND Flash 4-bit ECC Error Value Register 1"
|
|
in
|
|
hgroup.long 0xdc++0x3
|
|
hide.long 0x00 "NANDERRVAL2,NAND Flash 4-bit ECC Error Value Register 2"
|
|
in
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.open "ASP (Audio Serial Port)"
|
|
tree "ASP 0"
|
|
base asd:0x01e02000
|
|
width 6.
|
|
rgroup.long 0x00++0x7
|
|
line.long 0x00 "DRR,Data Receive Register"
|
|
hexmask.long 0x00 0.--31. 1. " DR ,Data receive"
|
|
line.long 0x04 "DXR,Data Transmit Ragister"
|
|
hexmask.long 0x04 0.--31. 1. " DX ,Data transmit"
|
|
if (((d.l(asd:0x01e02000+0x24))&0x02)==0x0)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SPCR,Serial Port Control Register"
|
|
bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset"
|
|
bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR"
|
|
bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty"
|
|
bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..."
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Rising edge without delay,Rising edge with delay"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR"
|
|
bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full"
|
|
bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SPCR,Serial Port Control Register"
|
|
bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset"
|
|
bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR"
|
|
bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty"
|
|
bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..."
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Falling edge without delay,Falling edge with delay"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR"
|
|
bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full"
|
|
bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled"
|
|
endif
|
|
width 6.
|
|
group.long 0x0c++0x7
|
|
line.long 0x00 "RCR,Receive Control Register"
|
|
bitfld.long 0x00 31. " RPHASE ,Receive phases" "Single,Dual"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RFRLEN2 ,Receive frame length (number of words) in phase 2"
|
|
bitfld.long 0x00 21.--23. " RWDLEN2 ,Receive word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RCOMPAND ,Receive companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law"
|
|
bitfld.long 0x00 18. " RFIG ,Receive frame ignore" "Not ignored,Ignored"
|
|
bitfld.long 0x00 16.--17. " RDATDLY ,Receive data delay" "0-bit,1-bit,2-bit,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " RFRLEN1 ,Receive frame length (number of words) in phase 1"
|
|
bitfld.long 0x00 5.--7. " RWDLEN1 ,Receive word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
bitfld.long 0x00 4. " RWDREVRS ,Receive 32-bit reversal enable" "Disabled,Enabled"
|
|
line.long 0x04 "XCR,Transmit Control Register"
|
|
bitfld.long 0x04 31. " XPHASE ,Transmit phases" "Single,Dual"
|
|
hexmask.long.byte 0x04 24.--30. 1. " XFRLEN2 ,Transmit frame length (number of words) in phase 2"
|
|
bitfld.long 0x04 21.--23. " XWDLEN2 ,Transmit word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x04 19.--20. " XCOMPAND ,Transmit companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law"
|
|
bitfld.long 0x04 18. " XFIG ,Transmit frame ignore" "Not ignored,Ignored"
|
|
bitfld.long 0x04 16.--17. " XDATDLY ,Transmit data delay" "0-bit,1-bit,2-bit,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--14. 1. " XFRLEN1 ,Transmit frame length (number of word) in phase 1"
|
|
bitfld.long 0x04 5.--7. " XWDLEN1 ,Transmit word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
bitfld.long 0x04 4. " XWDREVRS ,Transmit 32-bit reversal feature enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x01e02000+0x24))&0x80)==0x80)
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SRGR,Sample Rate Generator Register"
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 29. " CLKSM ,Sample rate generator input clock mode" "CLKR pin,CLKX pin"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
else
|
|
bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKR pin,CLKX pin"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
endif
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SRGR,Sample Rate Generator Register"
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "Reserved,ASP internal"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
else
|
|
bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKS pin,ASP internal"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
endif
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock"
|
|
endif
|
|
if ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x8000))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
elif ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x8000))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
else
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
elif ((((d.l(asd:0x01e02000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e02000+0x8))&0x8000)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
else
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
else
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "ASP 1"
|
|
base asd:0x01e04000
|
|
width 6.
|
|
rgroup.long 0x00++0x7
|
|
line.long 0x00 "DRR,Data Receive Register"
|
|
hexmask.long 0x00 0.--31. 1. " DR ,Data receive"
|
|
line.long 0x04 "DXR,Data Transmit Ragister"
|
|
hexmask.long 0x04 0.--31. 1. " DX ,Data transmit"
|
|
if (((d.l(asd:0x01e04000+0x24))&0x02)==0x0)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SPCR,Serial Port Control Register"
|
|
bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset"
|
|
bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR"
|
|
bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty"
|
|
bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..."
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Rising edge without delay,Rising edge with delay"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR"
|
|
bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full"
|
|
bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled"
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SPCR,Serial Port Control Register"
|
|
bitfld.long 0x00 25. " FREE ,Free-running enable mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SOFT ,Soft bit enable mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FRST ,Frame-sync generator reset" "Reset,No reset"
|
|
bitfld.long 0x00 22. " GRST ,Sample-rate generator reset" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " XINTM ,Transmit interrupt (XINT) mode" "XRDY,Reserved,New SF,XSYNCERR"
|
|
bitfld.long 0x00 19. " XSYNCERR ,Transmit synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 18. " XEMPTY ,Transmit shift register empty" "Empty,Not empty"
|
|
bitfld.long 0x00 17. " XRDY ,Transmitter ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 16. " XRST ,Transmitter reset bit resets or enables the transmitter" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DLB ,Digital loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " RJUST ,Receive sign-extension and justification mode" "Right/zero-fill MSBs,Right/sign-extend MSBs,Left/zero-fill LSBs,?..."
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x00 11.--12. " CLKSTP ,Clock stop mode" "Disabled,Reserved,Falling edge without delay,Falling edge with delay"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " RINTM ,Receive interrupt (RINT) mode" "RRDY,Reserved,New SF,RSYNCERR"
|
|
bitfld.long 0x00 3. " RSYNCERR ,Receive synchronization error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 2. " RFULL ,Receive shift register full" "Not full,Full"
|
|
bitfld.long 0x00 1. " RRDY ,Receiver ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RRST ,Receiver reset bit resets or enables the receiver" "Disabled,Enabled"
|
|
endif
|
|
width 6.
|
|
group.long 0x0c++0x7
|
|
line.long 0x00 "RCR,Receive Control Register"
|
|
bitfld.long 0x00 31. " RPHASE ,Receive phases" "Single,Dual"
|
|
hexmask.long.byte 0x00 24.--30. 1. " RFRLEN2 ,Receive frame length (number of words) in phase 2"
|
|
bitfld.long 0x00 21.--23. " RWDLEN2 ,Receive word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x00 19.--20. " RCOMPAND ,Receive companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law"
|
|
bitfld.long 0x00 18. " RFIG ,Receive frame ignore" "Not ignored,Ignored"
|
|
bitfld.long 0x00 16.--17. " RDATDLY ,Receive data delay" "0-bit,1-bit,2-bit,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--14. 1. " RFRLEN1 ,Receive frame length (number of words) in phase 1"
|
|
bitfld.long 0x00 5.--7. " RWDLEN1 ,Receive word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
bitfld.long 0x00 4. " RWDREVRS ,Receive 32-bit reversal enable" "Disabled,Enabled"
|
|
line.long 0x04 "XCR,Transmit Control Register"
|
|
bitfld.long 0x04 31. " XPHASE ,Transmit phases" "Single,Dual"
|
|
hexmask.long.byte 0x04 24.--30. 1. " XFRLEN2 ,Transmit frame length (number of words) in phase 2"
|
|
bitfld.long 0x04 21.--23. " XWDLEN2 ,Transmit word length (number of bits) in phase 2" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
textline " "
|
|
bitfld.long 0x04 19.--20. " XCOMPAND ,Transmit companding mode" "No/MSB first,No/LSB first,Yes/u-law,Yes/A-law"
|
|
bitfld.long 0x04 18. " XFIG ,Transmit frame ignore" "Not ignored,Ignored"
|
|
bitfld.long 0x04 16.--17. " XDATDLY ,Transmit data delay" "0-bit,1-bit,2-bit,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--14. 1. " XFRLEN1 ,Transmit frame length (number of word) in phase 1"
|
|
bitfld.long 0x04 5.--7. " XWDLEN1 ,Transmit word length (number of bits) in phase 1" "8 bits,12 bits,16 bits,20 bits,24 bits,32 bits,?..."
|
|
bitfld.long 0x04 4. " XWDREVRS ,Transmit 32-bit reversal feature enable" "Disabled,Enabled"
|
|
if (((d.l(asd:0x01e04000+0x24))&0x80)==0x80)
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SRGR,Sample Rate Generator Register"
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 29. " CLKSM ,Sample rate generator input clock mode" "CLKR pin,CLKX pin"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
else
|
|
bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKR pin,CLKX pin"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
endif
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SRGR,Sample Rate Generator Register"
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "Reserved,ASP internal"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
else
|
|
bitfld.long 0x00 30. " CLKSP ,CLKS Pin Polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 29. " CLKSM ,McBSP sample-rate generator clock mode" "CLKS pin,ASP internal"
|
|
bitfld.long 0x00 28. " FSGM ,Sample-rate generator transmit frame-synchronization mode" "DXR-to-XSR copy,FSG"
|
|
endif
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--27. 1. " FPER ,Frame period value plus 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " FWID ,Frame width value plus 1"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CLKGDV ,Sample-rate generator clock"
|
|
endif
|
|
if ((((d.l(asd:0x01e04000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e04000+0x8))&0x8000)==0x8000))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
elif ((((d.l(asd:0x01e04000+0x14))&0x20000000)==0x0)&&(((d.l(asd:0x01e04000+0x8))&0x8000)==0x8000))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
else
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Tri-state,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
elif ((((d.l(asd:0x01e04000+0x14))&0x20000000)==0x20000000)&&(((d.l(asd:0x01e04000+0x8))&0x8000)==0x0))
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "ASP internal,CLKX pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
else
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PCR,Pin Control Register"
|
|
bitfld.long 0x00 11. " FSXM ,Transmit frame-synchronization mode" "External,FSGM"
|
|
bitfld.long 0x00 10. " FSRM ,Receive frame-synchronization mode" "External,Internal"
|
|
bitfld.long 0x00 9. " CLKXM ,Transmitter clock mode" "External,Internal"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "Reserved,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
else
|
|
bitfld.long 0x00 8. " CLKRM ,Receiver clock mode" "Input,Output"
|
|
bitfld.long 0x00 7. " SCLKME ,Sample rate generator input clock mode" "CLKS pin,CLKR pin"
|
|
bitfld.long 0x00 3. " FSXP ,Transmit frame-synchronization polarity" "Active high,Active low"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " FSRP ,Receive frame-synchronization polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " CLKXP ,Transmit clock polarity" "Rising edge,Falling edge"
|
|
bitfld.long 0x00 0. " CLKRP ,Receive clock polarity" "Falling edge,Rising edge"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "DDR2/mDDR Memory Controller Registers"
|
|
base asd:0x20000000
|
|
width 10.
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "SDRSTAT,SDRAM Status Register"
|
|
bitfld.long 0x00 2. " PHYRDY ,DDR2 memory controller DLL ready" "Not ready,Ready"
|
|
if (((data.long(asd:0x20000000+0x08))&0x2130000)==0x0130000)
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,SDRAM drive strength" "Normal,Weak,?..."
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,DDR2 SDRAM drive strength" "Normal,Weak,?..."
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
endif
|
|
elif (((data.long(asd:0x20000000+0x08))&0x2130000)==0x2030000)
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,SDRAM drive strength" "Full,1/2,1/4,1/8"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. 24. " DDRDRIVE[1:0] ,Mobile DDR drive strength" "Full,1/2,1/4,1/8"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
endif
|
|
else
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DDR_DDQS ,DDR2 SDRAM differential DQS enable" "Single-ended,Differential"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,SDRAM data bus width" "Reserved,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,SDRAM CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal SDRAM bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDCR,SDRAM Configuration Register"
|
|
bitfld.long 0x00 26. " IBANKPOS ,Internal Bank position adressing" "Normal,Special"
|
|
bitfld.long 0x00 25. " MSDRAMEN ,Mobile SDRAM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " BOOTUNLOCK ,Boot unlock" "Locked,Unlocked"
|
|
bitfld.long 0x00 20. " DDR2EN ,DDR2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " DDREN ,DDR enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SDRAMEN ,SDRAM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " TIMUNLOCK ,Timing unlock" "Locked,Unlocked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " NM ,DDR2 data bus width" "32-bit,16-bit"
|
|
bitfld.long 0x00 9.--11. " CL ,CAS latency" "Reserved,Reserved,2,3,4,5,?..."
|
|
bitfld.long 0x00 4.--6. " IBANK ,Internal DDR2 bank setup" "1 bank,2 banks,4 banks,8 banks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " PAGESIZE ,DDR2 page size" "256-word,512-word,1024-word,2048-word,?..."
|
|
endif
|
|
endif
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "SDRCR,SDRAM Refresh Control Register"
|
|
bitfld.long 0x00 31. " LPMODEN ,Low-power mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " MCLKSTOPEN ,MCLK stop enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SR_PD ,Self-refresh/power-down mode" "Self-refresh,Power-down"
|
|
hexmask.long.word 0x00 0.--15. 1. " RR ,Refresh rate"
|
|
width 10.
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "SDTIMR,SDRAM Timing Register"
|
|
hexmask.long.byte 0x00 25.--31. 1. " T_RFC ,Minimum number of DDR_CLK cycles from a refresh or load mode command"
|
|
bitfld.long 0x00 22.--24. " T_RP ,Minimum number of DDR_CLK cycles from a precharge command to refresh command" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 19.--21. " T_RCD ,Minimum number of DDR_CLK cycles from an activate command to read or write command" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " T_WR ,Minimum number of DDR_CLK cycles from the last write transfer to precharge command" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 11.--15. 1. " T_RAS ,Minimum number of DDR_CLK cycles from activate command to precharge command"
|
|
hexmask.long.byte 0x00 6.--10. 1. " T_RC ,Minimum number of DDR_CLK cycles from an activate command to activate command"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " T_RRD ,Minimum number of DDR_CLK cycles from an activate command to activate in different bank" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--1. " T_WTR ,Minimum number of DDR_CLK cycles from the last write to a read commande" "0,1,2,3"
|
|
line.long 0x04 "SDTIMR2,SDRAM Timing 2 Register"
|
|
hexmask.long.byte 0x04 27.--30. 1. " T_RASMAX ,Maximum number of refresh rate intervals from Activate to Precharge command"
|
|
bitfld.long 0x04 25.--26. " T_XP ,Minimum number of DDR_CLK cycles from Power Down exit to any other command except a read command" "0,1,2,3"
|
|
hexmask.long.byte 0x04 16.--22. 1. " T_XSNR ,Minimum number of DDR_CLK cycles from a self_refresh exit to any other command except a read command"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " T_XSRD ,Minimum number of DDR_CLK cycles from a self_refresh exit to read command"
|
|
bitfld.long 0x04 5.--7. " T_RTP ,Minimum number of DDR_CLK cycles from a last read command to precharge command" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x04 0.--4. 1. " T_CKE ,Minimum number of DDR_CLK cycles between transitions on the DDR_CKE pin"
|
|
group.long 0x1c++0x7
|
|
line.long 0x00 "SDCR2,SDRAM Configuration Register 2"
|
|
bitfld.long 0x00 16.--18. " PASR ,Partial array self refresh" "4 banks,2 banks,1 bank,Reserved,Reserved,0.5 bank,0.25 bank,?..."
|
|
bitfld.long 0x00 0.--2. " ROWSIZE ,Row size" "9,10,11,12,13,14,15,16"
|
|
line.long 0x04 "PBBPR,Peripheral Bus Burst Priority Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " PR_OLD_COUNT ,Priority raise old counter"
|
|
width 10.
|
|
group.long 0xc0++0xf
|
|
line.long 0x00 "IRR,Interrupt Raw Register"
|
|
eventfld.long 0x00 2. " LT ,Line trap" "Not occurred,Occurred"
|
|
line.long 0x04 "IMR,Interrupt Masked Register"
|
|
eventfld.long 0x04 2. " LTM ,Line trap masked" "Not occurred,Occurred"
|
|
line.long 0x08 "IMSR,Interrupt Mask Set Register"
|
|
bitfld.long 0x08 2. " LTMSET ,Line trap interrupt set" "Disabled,Enabled"
|
|
line.long 0x0c "IMCR,Interrupt Mask Clear Register"
|
|
eventfld.long 0x0c 2. " LTMCLR ,Line trap interrupt clear" "Disabled,Enabled"
|
|
group.long 0xe4++0x3
|
|
line.long 0x00 "DDRPHYCR1,DDR PHY Control Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 7. " CONFIG_EXT_STRBEN ,Internal/External strobe gating select" "Internal,External"
|
|
bitfld.long 0x00 6. " CONFIG_PWRDNEN ,Power down receivers" "Power up,Power down"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " READ_LATENCY ,Read latency" "Reserved,Reserved,Reserved,3,4,5,6,7,?..."
|
|
base asd:0x01C40070
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "VTPIOCR,VTP IO Control Register"
|
|
bitfld.long 0x00 20. " DLLRSTZ ,Active low reset DLL" "Reset,No reset"
|
|
bitfld.long 0x00 19. " CLKRSTZ ,Active low reset clock divider of DDR address/data macro" "Reset,No reset"
|
|
bitfld.long 0x00 18. " VREFEN ,Internal DDR IO Vref enable" "Pad/external,Internal"
|
|
textline " "
|
|
bitfld.long 0x00 16.--17. " VREFTAP ,Selection for internal reference voltage level" "50.0%,47.5%,52.5%,50.0%"
|
|
bitfld.long 0x00 15. " READY ,VTP Ready status" "Not ready,Ready"
|
|
bitfld.long 0x00 14. " IOPWRDN ,Power down enable for DDR input buffer" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " CLRZ ,VTP clear" "Cleared,Not cleared"
|
|
bitfld.long 0x00 12. " FORCEDNP ,Force decrease PFET drive" "Not forced,Forced"
|
|
bitfld.long 0x00 11. " FORCEDNN ,Force decrease NFET drive" "Not forced,Forced"
|
|
textline " "
|
|
bitfld.long 0x00 10. " FORCEUPP ,Force increase PFET drive" "Not forced,Forced"
|
|
bitfld.long 0x00 9. " FORCEUPN ,Force increase PFET drive" "Not forced,Forced"
|
|
bitfld.long 0x00 8. " PWRSAVE ,VTP power save mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LOCK ,VTP impedance lock" "Not locked,Locked"
|
|
bitfld.long 0x00 6. " PWRDN ,VTP power down" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " D0 ,Drive strength control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " D1 ,Drive strength control" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " D2 ,Drive strength control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " F0 ,Digital filter control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " F1 ,Digital filter control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " F2 ,Digital filter control" "Disabled,Enabled"
|
|
else
|
|
hexmask.long.word 0x00 17.--31. 1. " DLLPWRUPCNT ,DLL power up count"
|
|
hexmask.long.word 0x00 8.--16. 1. " DLLRESETCNT ,DLL reset count"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STROBEGATING ,Internal/External strobe gating select" "Internal,External"
|
|
bitfld.long 0x00 6. " RECPWRDN ,Power down receivers" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 5. " DLLRESET ,Reset DLL" "No reset,Reset"
|
|
bitfld.long 0x00 4. " DLLRWEDN ,Power down DLL" "Powered up,Powered down"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " READLAT ,Read latency" "Reserved,Reserved,Reserved,3,4,5,6,7,8,?..."
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.open "EDMA3 (Enhanced Direct Memory Access Controller)"
|
|
tree "Parameter RAM"
|
|
base asd:0x01c04000
|
|
width 14.
|
|
tree "Parameter set 0"
|
|
group.long 0x0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 1"
|
|
group.long 0x20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 2"
|
|
group.long 0x40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 3"
|
|
group.long 0x60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 4"
|
|
group.long 0x80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 5"
|
|
group.long 0xA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 6"
|
|
group.long 0xC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 7"
|
|
group.long 0xE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 8"
|
|
group.long 0x100++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 9"
|
|
group.long 0x120++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 10"
|
|
group.long 0x140++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 11"
|
|
group.long 0x160++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 12"
|
|
group.long 0x180++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 13"
|
|
group.long 0x1A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 14"
|
|
group.long 0x1C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 15"
|
|
group.long 0x1E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 16"
|
|
group.long 0x200++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 17"
|
|
group.long 0x220++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 18"
|
|
group.long 0x240++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 19"
|
|
group.long 0x260++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 20"
|
|
group.long 0x280++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 21"
|
|
group.long 0x2A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 22"
|
|
group.long 0x2C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 23"
|
|
group.long 0x2E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 24"
|
|
group.long 0x300++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 25"
|
|
group.long 0x320++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 26"
|
|
group.long 0x340++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 27"
|
|
group.long 0x360++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 28"
|
|
group.long 0x380++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 29"
|
|
group.long 0x3A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 30"
|
|
group.long 0x3C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 31"
|
|
group.long 0x3E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 32"
|
|
group.long 0x400++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 33"
|
|
group.long 0x420++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 34"
|
|
group.long 0x440++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 35"
|
|
group.long 0x460++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 36"
|
|
group.long 0x480++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 37"
|
|
group.long 0x4A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 38"
|
|
group.long 0x4C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 39"
|
|
group.long 0x4E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 40"
|
|
group.long 0x500++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 41"
|
|
group.long 0x520++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 42"
|
|
group.long 0x540++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 43"
|
|
group.long 0x560++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 44"
|
|
group.long 0x580++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 45"
|
|
group.long 0x5A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 46"
|
|
group.long 0x5C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 47"
|
|
group.long 0x5E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 48"
|
|
group.long 0x600++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 49"
|
|
group.long 0x620++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 50"
|
|
group.long 0x640++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 51"
|
|
group.long 0x660++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 52"
|
|
group.long 0x680++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 53"
|
|
group.long 0x6A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 54"
|
|
group.long 0x6C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 55"
|
|
group.long 0x6E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 56"
|
|
group.long 0x700++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 57"
|
|
group.long 0x720++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 58"
|
|
group.long 0x740++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 59"
|
|
group.long 0x760++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 60"
|
|
group.long 0x780++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 61"
|
|
group.long 0x7A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 62"
|
|
group.long 0x7C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 63"
|
|
group.long 0x7E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 64"
|
|
group.long 0x800++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 65"
|
|
group.long 0x820++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 66"
|
|
group.long 0x840++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 67"
|
|
group.long 0x860++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 68"
|
|
group.long 0x880++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 69"
|
|
group.long 0x8A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 70"
|
|
group.long 0x8C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 71"
|
|
group.long 0x8E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 72"
|
|
group.long 0x900++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 73"
|
|
group.long 0x920++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 74"
|
|
group.long 0x940++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 75"
|
|
group.long 0x960++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 76"
|
|
group.long 0x980++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 77"
|
|
group.long 0x9A0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 78"
|
|
group.long 0x9C0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 79"
|
|
group.long 0x9E0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 80"
|
|
group.long 0xA00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 81"
|
|
group.long 0xA20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 82"
|
|
group.long 0xA40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 83"
|
|
group.long 0xA60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 84"
|
|
group.long 0xA80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 85"
|
|
group.long 0xAA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 86"
|
|
group.long 0xAC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 87"
|
|
group.long 0xAE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 88"
|
|
group.long 0xB00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 89"
|
|
group.long 0xB20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 90"
|
|
group.long 0xB40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 91"
|
|
group.long 0xB60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 92"
|
|
group.long 0xB80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 93"
|
|
group.long 0xBA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 94"
|
|
group.long 0xBC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 95"
|
|
group.long 0xBE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 96"
|
|
group.long 0xC00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 97"
|
|
group.long 0xC20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 98"
|
|
group.long 0xC40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 99"
|
|
group.long 0xC60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 100"
|
|
group.long 0xC80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 101"
|
|
group.long 0xCA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 102"
|
|
group.long 0xCC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 103"
|
|
group.long 0xCE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 104"
|
|
group.long 0xD00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 105"
|
|
group.long 0xD20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 106"
|
|
group.long 0xD40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 107"
|
|
group.long 0xD60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 108"
|
|
group.long 0xD80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 109"
|
|
group.long 0xDA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 110"
|
|
group.long 0xDC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 111"
|
|
group.long 0xDE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 112"
|
|
group.long 0xE00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 113"
|
|
group.long 0xE20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 114"
|
|
group.long 0xE40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 115"
|
|
group.long 0xE60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 116"
|
|
group.long 0xE80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 117"
|
|
group.long 0xEA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 118"
|
|
group.long 0xEC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 119"
|
|
group.long 0xEE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 120"
|
|
group.long 0xF00++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 121"
|
|
group.long 0xF20++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 122"
|
|
group.long 0xF40++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 123"
|
|
group.long 0xF60++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 124"
|
|
group.long 0xF80++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 125"
|
|
group.long 0xFA0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 126"
|
|
group.long 0xFC0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
tree "Parameter set 127"
|
|
group.long 0xFE0++0x1f
|
|
line.long 0x00 "OPT,Channel Options Parameter"
|
|
hexmask.long.byte 0x00 24.--27. 1. " PRIVID ,Privilege identification"
|
|
bitfld.long 0x00 23. " ITCCHEN ,Intermediate transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ITCINTEN ,Intermediate transfer completion interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TCCMODE ,Transfer complete code mode" "Normal,Early"
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO Width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 3. " STATIC ,Static PaRAM set" "Not static,Static"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYNCDIM ,Transfer synchronization dimension" "A-synchronized,AB-synchronized"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode" "INCR,CONST"
|
|
bitfld.long 0x00 0. " SAM ,Source address mode" "INCR,CONST"
|
|
line.long 0x04 "SRC,Source Address"
|
|
line.long 0x08 "A_B_CNT,A Count/B Count Parameter"
|
|
sif (cpu()=="DM357"||cpu()=="DM365"||cpu()=="DM368"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="OMAP-L137"||cpu()=="AM1707"||cpu()=="DA828"||cpu()=="DA830"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802")
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,B count"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,A count for 1st Dimension"
|
|
else
|
|
hexmask.long.word 0x08 16.--31. 1. " BCNT ,Number of arrays of length"
|
|
hexmask.long.word 0x08 0.--15. 1. " ACNT ,Number of bytes within the 1st dimension of a transfer"
|
|
endif
|
|
line.long 0x0c "DST,Destination Address"
|
|
line.long 0x10 "SRC_DST_BIDX,Source B Index/Destination B Index Parameter"
|
|
hexmask.long.word 0x10 16.--31. 1. " DSTBIDX ,Destination B index"
|
|
hexmask.long.word 0x10 0.--15. 1. " SRCBIDX ,Source B index"
|
|
line.long 0x14 "LINK_BCNTRLD,Link Address/B Count Reload Parameter"
|
|
hexmask.long.word 0x14 16.--31. 1. " BCNTRLD ,B count reload"
|
|
hexmask.long.word 0x14 0.--15. 1. " LINK ,Link address"
|
|
line.long 0x18 "SRC_DST_CIDX,Source C Index/Destination C Index Parameter"
|
|
hexmask.long.word 0x18 16.--31. 1. " DSTCIDX ,Destination C index"
|
|
hexmask.long.word 0x18 0.--15. 1. " SRCCIDX ,Source C index"
|
|
line.long 0x1c "CCNT,C Count Parameter"
|
|
hexmask.long.word 0x1c 0.--15. 1. " CCNT ,Number of frames in a block"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "EDMA3 Channel Controller Registers"
|
|
base asd:0x01c00000
|
|
tree "Global Registers"
|
|
width 10.
|
|
rgroup.long 0x00++0x7
|
|
line.long 0x00 "PID,Peripheral ID Register"
|
|
line.long 0x04 "CCCFG,EDMA3CC Configuration Register"
|
|
bitfld.long 0x04 25. " MP_EXIST ,Memory protection existence" "Not supported,?..."
|
|
bitfld.long 0x04 24. " CHMAP_EXIST ,Channel mapping existence" "Not supported,?..."
|
|
bitfld.long 0x04 20.--21. " NUM_REGN ,Number of MP and shadow regions" "Reserved,Reserved,4 regions,?..."
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " NUM_EVQUE ,Number of queues / number of TCs" "Reserved,Reserved,2,?..."
|
|
bitfld.long 0x04 12.--14. " NUM_PAENTRY ,Number of PaRAM sets" "Reserved,Reserved,Reserved,128 sets,?..."
|
|
bitfld.long 0x04 8.--10. " NUM_INTCH ,Number of interrupt channels" "Reserved,Reserved,Reserved,Reserved,64 channels,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " NUM_QDMACH ,Number of QDMA channels" "Reserved,Reserved,Reserved,Reserved,8 channels,?..."
|
|
bitfld.long 0x04 0.--2. " NUM_DMACH ,Number of DMA channels" "Reserved,Reserved,Reserved,Reserved,Reserved,64 channels,?..."
|
|
tree "QDMA Channels Mapping Registers"
|
|
group.long 0x200++0x1f
|
|
line.long 0x0 "QCHMAP0,QDMA Channel 0 Mapping Register"
|
|
hexmask.long.word 0x0 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 0"
|
|
hexmask.long.byte 0x0 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x4 "QCHMAP1,QDMA Channel 1 Mapping Register"
|
|
hexmask.long.word 0x4 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 1"
|
|
hexmask.long.byte 0x4 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x8 "QCHMAP2,QDMA Channel 2 Mapping Register"
|
|
hexmask.long.word 0x8 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 2"
|
|
hexmask.long.byte 0x8 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0xC "QCHMAP3,QDMA Channel 3 Mapping Register"
|
|
hexmask.long.word 0xC 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 3"
|
|
hexmask.long.byte 0xC 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x10 "QCHMAP4,QDMA Channel 4 Mapping Register"
|
|
hexmask.long.word 0x10 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 4"
|
|
hexmask.long.byte 0x10 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x14 "QCHMAP5,QDMA Channel 5 Mapping Register"
|
|
hexmask.long.word 0x14 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 5"
|
|
hexmask.long.byte 0x14 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x18 "QCHMAP6,QDMA Channel 6 Mapping Register"
|
|
hexmask.long.word 0x18 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 6"
|
|
hexmask.long.byte 0x18 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
line.long 0x1C "QCHMAP7,QDMA Channel 7 Mapping Register"
|
|
hexmask.long.word 0x1C 5.--13. 1. " PAENTRY ,PaRAM set number for DMA channel 7"
|
|
hexmask.long.byte 0x1C 2.--4. 1. " TRWORD ,Specific trigger word of the PaRAM set defined by PAENTRY"
|
|
textline ""
|
|
tree.end
|
|
textline ""
|
|
group.long 0x240++0x1f
|
|
line.long 0x00 "DMAQNUM0,DMA Queue Number Register 0"
|
|
bitfld.long 0x00 28.--30. " E7 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 24.--26. " E6 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 20.--22. " E5 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 16.--18. " E4 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " E3 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 8.--10. " E2 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 4.--6. " E1 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 0.--2. " E0 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x04 "DMAQNUM1,DMA Queue Number Register 1"
|
|
bitfld.long 0x04 28.--30. " E15 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 24.--26. " E14 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 20.--22. " E13 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 16.--18. " E12 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--14. " E11 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 8.--10. " E10 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 4.--6. " E9 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x04 0.--2. " E8 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x08 "DMAQNUM2,DMA Queue Number Register 2"
|
|
bitfld.long 0x08 28.--30. " E23 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 24.--26. " E22 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 20.--22. " E21 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 16.--18. " E20 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--14. " E19 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 8.--10. " E18 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 4.--6. " E17 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x08 0.--2. " E16 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x0c "DMAQNUM3,DMA Queue Number Register 3"
|
|
bitfld.long 0x0c 28.--30. " E31 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 24.--26. " E30 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 20.--22. " E29 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 16.--18. " E28 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x0c 12.--14. " E27 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 8.--10. " E26 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 4.--6. " E25 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x0c 0.--2. " E24 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x10 "DMAQNUM4,DMA Queue Number Register 4"
|
|
bitfld.long 0x10 28.--30. " E39 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 24.--26. " E38 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 20.--22. " E37 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 16.--18. " E36 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x10 12.--14. " E35 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 8.--10. " E34 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 4.--6. " E33 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x10 0.--2. " E32 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x14 "DMAQNUM5,DMA Queue Number Register 5"
|
|
bitfld.long 0x14 28.--30. " E47 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 24.--26. " E46 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 20.--22. " E45 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 16.--18. " E44 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x14 12.--14. " E43 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 8.--10. " E42 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 4.--6. " E41 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x14 0.--2. " E40 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x18 "DMAQNUM6,DMA Queue Number Register 6"
|
|
bitfld.long 0x18 28.--30. " E55 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 24.--26. " E54 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 20.--22. " E53 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 16.--18. " E52 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x18 12.--14. " E51 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 8.--10. " E50 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 4.--6. " E49 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x18 0.--2. " E48 ,DMA queue number" "Q0,Q1,?..."
|
|
line.long 0x1c "DMAQNUM7,DMA Queue Number Register 7"
|
|
bitfld.long 0x1c 28.--30. " E63 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 24.--26. " E62 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 20.--22. " E61 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 16.--18. " E60 ,DMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x1c 12.--14. " E59 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 8.--10. " E58 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 4.--6. " E57 ,DMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x1c 0.--2. " E56 ,DMA queue number" "Q0,Q1,?..."
|
|
group.long 0x260++0x3
|
|
line.long 0x00 "QDMAQNUM,QDMA Channel Queue Number Register"
|
|
bitfld.long 0x00 28.--30. " E7 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 24.--26. " E6 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 20.--22. " E5 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 16.--18. " E4 ,QDMA queue number" "Q0,Q1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--14. " E3 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 8.--10. " E2 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 4.--6. " E1 ,QDMA queue number" "Q0,Q1,?..."
|
|
bitfld.long 0x00 0.--2. " E0 ,QDMA queue number" "Q0,Q1,?..."
|
|
group.long 0x284++0x3
|
|
line.long 0x00 "QUEPRI,Queue Priority Register"
|
|
bitfld.long 0x00 4.--6. " PRIQ1 ,Priority level for queue 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " PRIQ0 ,Priority level for queue 0" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Error Registers"
|
|
width 10.
|
|
rgroup.long 0x300++0x7
|
|
line.long 0x00 "EMR,Event Missed Register"
|
|
bitfld.long 0x00 31. " E31 ,Channel 31 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 30. " E30 ,Channel 30 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 29. " E29 ,Channel 29 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,Channel 28 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 27. " E27 ,Channel 27 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 26. " E26 ,Channel 26 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,Channel 25 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 24. " E24 ,Channel 24 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 23. " E23 ,Channel 23 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,Channel 22 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 21. " E21 ,Channel 21 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 20. " E20 ,Channel 20 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Channel 19 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 18. " E18 ,Channel 18 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 17. " E17 ,Channel 17 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,Channel 16 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 15. " E15 ,Channel 15 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 14. " E14 ,Channel 14 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,Channel 13 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 12. " E12 ,Channel 12 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 11. " E11 ,Channel 11 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,Channel 10 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 9. " E9 ,Channel 9 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 8. " E8 ,Channel 8 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Channel 7 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 6. " E6 ,Channel 6 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 5. " E5 ,Channel 5 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,Channel 4 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 3. " E3 ,Channel 3 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 2. " E2 ,Channel 2 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,Channel 1 event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 0. " E0 ,Channel 0 event missed" "Not missed,Missed"
|
|
line.long 0x04 "EMRH,Event Missed Register High"
|
|
bitfld.long 0x04 31. " E63 ,Channel 63 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 30. " E62 ,Channel 62 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 29. " E61 ,Channel 61 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,Channel 60 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 27. " E59 ,Channel 59 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 26. " E58 ,Channel 58 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,Channel 57 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 24. " E56 ,Channel 56 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 23. " E55 ,Channel 55 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,Channel 54 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 21. " E53 ,Channel 53 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 20. " E52 ,Channel 52 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Channel 51 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 18. " E50 ,Channel 50 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 17. " E49 ,Channel 49 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,Channel 48 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 15. " E47 ,Channel 47 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 14. " E46 ,Channel 46 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,Channel 45 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 12. " E44 ,Channel 44 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 11. " E43 ,Channel 43 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,Channel 42 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 9. " E41 ,Channel 41 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 8. " E40 ,Channel 40 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Channel 39 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 6. " E38 ,Channel 38 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 5. " E37 ,Channel 37 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,Channel 36 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 3. " E35 ,Channel 35 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 2. " E34 ,Channel 34 event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,Channel 33 event missed" "Not missed,Missed"
|
|
bitfld.long 0x04 0. " E32 ,Channel 32 event missed" "Not missed,Missed"
|
|
wgroup.long 0x308++0x7
|
|
line.long 0x00 "EMCR,Event Missed Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Event missed 31 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Event missed 30 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Event missed 29 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,Event missed 28 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 27. " E27 ,Event missed 27 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Event missed 26 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,Event missed 25 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Event missed 24 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 23. " E23 ,Event missed 23 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,Event missed 22 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Event missed 21 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Event missed 20 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Event missed 19 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Event missed 18 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Event missed 17 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,Event missed 16 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 15. " E15 ,Event missed 15 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Event missed 14 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,Event missed 13 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Event missed 12 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 11. " E11 ,Event missed 11 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,Event missed 10 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Event missed 9 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Event missed 8 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Event missed 7 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Event missed 6 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Event missed 5 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,Event missed 4 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " E3 ,Event missed 3 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Event missed 2 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,Event missed 1 clear" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Event missed 0 clear" "No effect,Cleared"
|
|
line.long 0x04 "EMCRH,Event Missed Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Event missed 63 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Event missed 62 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Event missed 61 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,Event missed 60 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 27. " E59 ,Event missed 59 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Event missed 58 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,Event missed 57 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Event missed 56 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 23. " E55 ,Event missed 55 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,Event missed 54 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Event missed 53 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Event missed 52 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Event missed 51 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Event missed 50 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Event missed 49 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,Event missed 48 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 15. " E47 ,Event missed 47 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Event missed 46 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,Event missed 45 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Event missed 44 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 11. " E43 ,Event missed 43 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,Event missed 42 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Event missed 41 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Event missed 40 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Event missed 39 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Event missed 38 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Event missed 37 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,Event missed 36 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 3. " E35 ,Event missed 35 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Event missed 34 clear" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,Event missed 33 clear" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Event missed 32 clear" "No effect,Cleared"
|
|
rgroup.long 0x310++0x3
|
|
line.long 0x00 "QEMR,QDMA Event Missed Register"
|
|
bitfld.long 0x00 7. " E7 ,Channel 7 QDMA event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 6. " E6 ,Channel 6 QDMA event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 5. " E5 ,Channel 5 QDMA event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,Channel 4 QDMA event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 3. " E3 ,Channel 3 QDMA event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 2. " E2 ,Channel 2 QDMA event missed" "Not missed,Missed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,Channel 1 QDMA event missed" "Not missed,Missed"
|
|
bitfld.long 0x00 0. " E0 ,Channel 0 QDMA event missed" "Not missed,Missed"
|
|
wgroup.long 0x314++0x3
|
|
line.long 0x00 "QEMCR,QDMA Event Missed Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event 7 cleared" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event 6 cleared" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event 5 cleared" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,QDMA event 4 cleared" "No effect,Cleared"
|
|
bitfld.long 0x00 3. " E3 ,QDMA event 3 cleared" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event 2 cleared" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,QDMA event 1 cleared" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event 0 cleared" "No effect,Cleared"
|
|
textline " "
|
|
rgroup.long 0x318++0x3
|
|
line.long 0x00 "CCERR,EDMA3CC Error Register"
|
|
bitfld.long 0x00 16. " TCCERR ,Total number of allowed TCCs outstanding reached" "Not reached,Reached"
|
|
textline " "
|
|
sif (cpu()=="DM6467")
|
|
bitfld.long 0x00 3. " QTHRXCD3 ,Queue threshold error for queue 3" "Not exceeded,Exceeded"
|
|
bitfld.long 0x00 2. " QTHRXCD2 ,Queue threshold error for queue 2" "Not exceeded,Exceeded"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error for queue 1" "Not exceeded,Exceeded"
|
|
bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error for queue 0" "Not exceeded,Exceeded"
|
|
wgroup.long 0x31c++0x3
|
|
line.long 0x00 "CCERRCLR,EDMA3CC Error Clear Register"
|
|
bitfld.long 0x00 16. " TCCERR ,Transfer completion code error clear" "No effect,Cleared"
|
|
textline " "
|
|
sif (cpu()=="DM6467")
|
|
bitfld.long 0x00 2. " QTHRXCD3 ,Queue threshold error clear for queue 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " QTHRXCD2 ,Queue threshold error clear for queue 2" "No effect,Cleared"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x00 1. " QTHRXCD1 ,Queue threshold error clear for queue 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " QTHRXCD0 ,Queue threshold error clear for queue 0" "No effect,Cleared"
|
|
wgroup.long 0x320++0x3
|
|
line.long 0x00 "EEVAL,Error Evaluation Register"
|
|
bitfld.long 0x00 0. " EVAL ,Error interrupt evaluate" "No effect,Interrupt"
|
|
tree.end
|
|
tree "Region Access Enable Registers"
|
|
width 8.
|
|
group.long 0x340++0x7
|
|
line.long 0x00 "DRAE0,DMA Region Access Enable Register for Region 0"
|
|
bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed"
|
|
line.long 0x04 "DRAEH0,DMA Region Access Enabled Register High for Region 0"
|
|
bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 0" "Not allowed,Allowed"
|
|
group.long 0x348++0x7
|
|
line.long 0x00 "DRAE1,DMA Region Access Enable Register for Region 1"
|
|
bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed"
|
|
line.long 0x04 "DRAEH1,DMA Region Access Enabled Register High for Region 1"
|
|
bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 1" "Not allowed,Allowed"
|
|
group.long 0x350++0x7
|
|
line.long 0x00 "DRAE2,DMA Region Access Enable Register for Region 2"
|
|
bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed"
|
|
line.long 0x04 "DRAEH2,DMA Region Access Enabled Register High for Region 2"
|
|
bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 2" "Not allowed,Allowed"
|
|
group.long 0x358++0x7
|
|
line.long 0x00 "DRAE3,DMA Region Access Enable Register for Region 3"
|
|
bitfld.long 0x00 31. " E31 ,DMA region access enable for bit channel 31 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 30. " E30 ,DMA region access enable for bit channel 30 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 29. " E29 ,DMA region access enable for bit channel 29 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 28. " E28 ,DMA region access enable for bit channel 28 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 27. " E27 ,DMA region access enable for bit channel 27 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 26. " E26 ,DMA region access enable for bit channel 26 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 25. " E25 ,DMA region access enable for bit channel 25 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 24. " E24 ,DMA region access enable for bit channel 24 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 23. " E23 ,DMA region access enable for bit channel 23 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " E22 ,DMA region access enable for bit channel 22 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 21. " E21 ,DMA region access enable for bit channel 21 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 20. " E20 ,DMA region access enable for bit channel 20 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,DMA region access enable for bit channel 19 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 18. " E18 ,DMA region access enable for bit channel 18 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 17. " E17 ,DMA region access enable for bit channel 17 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 16. " E16 ,DMA region access enable for bit channel 16 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 15. " E15 ,DMA region access enable for bit channel 15 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 14. " E14 ,DMA region access enable for bit channel 14 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " E13 ,DMA region access enable for bit channel 13 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 12. " E12 ,DMA region access enable for bit channel 12 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 11. " E11 ,DMA region access enable for bit channel 11 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 10. " E10 ,DMA region access enable for bit channel 10 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 9. " E9 ,DMA region access enable for bit channel 9 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 8. " E8 ,DMA region access enable for bit channel 8 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,DMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,DMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,DMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,DMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,DMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,DMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,DMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,DMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed"
|
|
line.long 0x04 "DRAEH3,DMA Region Access Enabled Register High for Region 3"
|
|
bitfld.long 0x04 31. " E63 ,DMA region access enable for bit channel 63 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 30. " E62 ,DMA region access enable for bit channel 62 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 29. " E61 ,DMA region access enable for bit channel 61 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 28. " E60 ,DMA region access enable for bit channel 60 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 27. " E59 ,DMA region access enable for bit channel 59 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 26. " E58 ,DMA region access enable for bit channel 58 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 25. " E57 ,DMA region access enable for bit channel 57 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 24. " E56 ,DMA region access enable for bit channel 56 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 23. " E55 ,DMA region access enable for bit channel 55 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 22. " E54 ,DMA region access enable for bit channel 54 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 21. " E53 ,DMA region access enable for bit channel 53 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 20. " E52 ,DMA region access enable for bit channel 52 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,DMA region access enable for bit channel 51 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 18. " E50 ,DMA region access enable for bit channel 50 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 17. " E49 ,DMA region access enable for bit channel 49 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 16. " E48 ,DMA region access enable for bit channel 48 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 15. " E47 ,DMA region access enable for bit channel 47 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 14. " E46 ,DMA region access enable for bit channel 46 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 13. " E45 ,DMA region access enable for bit channel 45 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 12. " E44 ,DMA region access enable for bit channel 44 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 11. " E43 ,DMA region access enable for bit channel 43 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 10. " E42 ,DMA region access enable for bit channel 42 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 9. " E41 ,DMA region access enable for bit channel 41 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 8. " E40 ,DMA region access enable for bit channel 40 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,DMA region access enable for bit channel 39 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 6. " E38 ,DMA region access enable for bit channel 38 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 5. " E37 ,DMA region access enable for bit channel 37 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 4. " E36 ,DMA region access enable for bit channel 36 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 3. " E35 ,DMA region access enable for bit channel 35 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 2. " E34 ,DMA region access enable for bit channel 34 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x04 1. " E33 ,DMA region access enable for bit channel 33 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x04 0. " E32 ,DMA region access enable for bit channel 32 in region 3" "Not allowed,Allowed"
|
|
group.long 0x380++0x7
|
|
line.long 0x00 "QRAE0,QDMA Region Access Enable Register for Region 0"
|
|
bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 0" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 0" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 0" "Not allowed,Allowed"
|
|
group.long 0x384++0x7
|
|
line.long 0x00 "QRAE1,QDMA Region Access Enable Register for Region 1"
|
|
bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 1" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 1" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 1" "Not allowed,Allowed"
|
|
group.long 0x388++0x7
|
|
line.long 0x00 "QRAE2,QDMA Region Access Enable Register for Region 2"
|
|
bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 2" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 2" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 2" "Not allowed,Allowed"
|
|
group.long 0x38C++0x7
|
|
line.long 0x00 "QRAE3,QDMA Region Access Enable Register for Region 3"
|
|
bitfld.long 0x00 7. " E7 ,QDMA region access enable for bit channel 7 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 6. " E6 ,QDMA region access enable for bit channel 6 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 5. " E5 ,QDMA region access enable for bit channel 5 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " E4 ,QDMA region access enable for bit channel 4 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 3. " E3 ,QDMA region access enable for bit channel 3 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 2. " E2 ,QDMA region access enable for bit channel 2 in region 3" "Not allowed,Allowed"
|
|
textline " "
|
|
bitfld.long 0x00 1. " E1 ,QDMA region access enable for bit channel 1 in region 3" "Not allowed,Allowed"
|
|
bitfld.long 0x00 0. " E0 ,QDMA region access enable for bit channel 0 in region 3" "Not allowed,Allowed"
|
|
tree.end
|
|
tree "Status/Debug Visibility Registers"
|
|
rgroup.long 0x400++0x3f "Event Queue 0 Registers"
|
|
line.long 0x0 "Q0E0 ,Event Queue Entry 0 Register"
|
|
bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x0 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x4 "Q0E1 ,Event Queue Entry 1 Register"
|
|
bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x4 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x8 "Q0E2 ,Event Queue Entry 2 Register"
|
|
bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x8 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0xC "Q0E3 ,Event Queue Entry 3 Register"
|
|
bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0xC 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x10 "Q0E4 ,Event Queue Entry 4 Register"
|
|
bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x10 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x14 "Q0E5 ,Event Queue Entry 5 Register"
|
|
bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x14 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x18 "Q0E6 ,Event Queue Entry 6 Register"
|
|
bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x18 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x1C "Q0E7 ,Event Queue Entry 7 Register"
|
|
bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x1C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x20 "Q0E8 ,Event Queue Entry 8 Register"
|
|
bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x20 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x24 "Q0E9 ,Event Queue Entry 9 Register"
|
|
bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x24 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x28 "Q0E10,Event Queue Entry 10 Register"
|
|
bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x28 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x2C "Q0E11,Event Queue Entry 11 Register"
|
|
bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x2C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x30 "Q0E12,Event Queue Entry 12 Register"
|
|
bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x30 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x34 "Q0E13,Event Queue Entry 13 Register"
|
|
bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x34 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x38 "Q0E14,Event Queue Entry 14 Register"
|
|
bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x38 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x3C "Q0E15,Event Queue Entry 15 Register"
|
|
bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 0" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x3C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
rgroup.long 0x440++0x3f "Event Queue 1 Registers"
|
|
line.long 0x0 "Q1E0 ,Event Queue Entry 0 Register"
|
|
bitfld.long 0x0 6.--7. " ETYPE ,Event trigger type for entry 0 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x0 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x0 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x4 "Q1E1 ,Event Queue Entry 1 Register"
|
|
bitfld.long 0x4 6.--7. " ETYPE ,Event trigger type for entry 1 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x4 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x4 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x8 "Q1E2 ,Event Queue Entry 2 Register"
|
|
bitfld.long 0x8 6.--7. " ETYPE ,Event trigger type for entry 2 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x8 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x8 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0xC "Q1E3 ,Event Queue Entry 3 Register"
|
|
bitfld.long 0xC 6.--7. " ETYPE ,Event trigger type for entry 3 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0xC 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0xC 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x10 "Q1E4 ,Event Queue Entry 4 Register"
|
|
bitfld.long 0x10 6.--7. " ETYPE ,Event trigger type for entry 4 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x10 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x10 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x14 "Q1E5 ,Event Queue Entry 5 Register"
|
|
bitfld.long 0x14 6.--7. " ETYPE ,Event trigger type for entry 5 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x14 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x14 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x18 "Q1E6 ,Event Queue Entry 6 Register"
|
|
bitfld.long 0x18 6.--7. " ETYPE ,Event trigger type for entry 6 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x18 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x18 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x1C "Q1E7 ,Event Queue Entry 7 Register"
|
|
bitfld.long 0x1C 6.--7. " ETYPE ,Event trigger type for entry 7 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x1C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x1C 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x20 "Q1E8 ,Event Queue Entry 8 Register"
|
|
bitfld.long 0x20 6.--7. " ETYPE ,Event trigger type for entry 8 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x20 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x20 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x24 "Q1E9 ,Event Queue Entry 9 Register"
|
|
bitfld.long 0x24 6.--7. " ETYPE ,Event trigger type for entry 9 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x24 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x24 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x28 "Q1E10,Event Queue Entry 10 Register"
|
|
bitfld.long 0x28 6.--7. " ETYPE ,Event trigger type for entry 10 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x28 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x28 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x2C "Q1E11,Event Queue Entry 11 Register"
|
|
bitfld.long 0x2C 6.--7. " ETYPE ,Event trigger type for entry 11 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x2C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x2C 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x30 "Q1E12,Event Queue Entry 12 Register"
|
|
bitfld.long 0x30 6.--7. " ETYPE ,Event trigger type for entry 12 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x30 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x30 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x34 "Q1E13,Event Queue Entry 13 Register"
|
|
bitfld.long 0x34 6.--7. " ETYPE ,Event trigger type for entry 13 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x34 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x34 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x38 "Q1E14,Event Queue Entry 14 Register"
|
|
bitfld.long 0x38 6.--7. " ETYPE ,Event trigger type for entry 14 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x38 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x38 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
line.long 0x3C "Q1E15,Event Queue Entry 15 Register"
|
|
bitfld.long 0x3C 6.--7. " ETYPE ,Event trigger type for entry 15 in the event queue 1" "Event via ER,Manual via ESR,Chain via CER,Auto via QER"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x3C 0.--4. " ENUM ,Event number" "DMA/QDMA 0,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA/QDMA 4,DMA/QDMA 5,DMA/QDMA 6,DMA/QDMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31"
|
|
else
|
|
bitfld.long 0x3C 0.--5. " ENUM ,Event number" "DMA/QDMA 0 ,DMA/QDMA 1,DMA/QDMQ 2,DMA/QDMA 3,DMA 4,DMA 5,DMA 6,DMA 7,DMA 8,DMA 9,DMA 10,DMA 11,DMA 12,DMA 13,DMA 14,DMA 15,DMA 16,DMA 17,DMA 18,DMA 19,DMA 20,DMA 21,DMA 22,DMA 23,DMA 24,DMA 25,DMA 26,DMA 27,DMA 28,DMA 29,DMA 30,DMA 31,DMA 32,DMA 33,DMA 34,DMA 35,DMA 36,DMA 37,DMA 38,DMA 39,DMA 40,DMA 41,DMA 42,DMA 43,DMA 44,DMA 45,DMA 46,DMA 47,DMA 48,DMA 49,DMA 50,DMA 51,DMA 52,DMA 53,DMA 54,DMA 55,DMA 56,DMA 57,DMA 58,DMA 59,DMA 60,DMA 61,DMA 62,DMA 63"
|
|
endif
|
|
rgroup.long 0x600++0x7 "Queue Status Registers"
|
|
line.long 0x0 "QSTAT0,Queue 0 Status Register"
|
|
bitfld.long 0x0 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1707"||cpu()=="AM1705"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..."
|
|
bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..."
|
|
elif (CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="AM1808")
|
|
bitfld.long 0x0 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10(full),?..."
|
|
bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0(empty),1,2,3,4,5,6,7,8,9,10(full),?..."
|
|
else
|
|
bitfld.long 0x0 16.--20. " WM ,Watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0 8.--12. " NUMVAL ,Number of valid entrier in queue 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
bitfld.long 0x0 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x4 "QSTAT1,Queue 1 Status Register"
|
|
bitfld.long 0x4 24. " THRXCD ,Threshold exceeded" "Not exceeded,Exceeded"
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1707"||cpu()=="AM1705"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..."
|
|
bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16(full),?..."
|
|
elif (CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="AM1808")
|
|
bitfld.long 0x4 16.--20. " WM ,Watermark" "0(empty),1,2,3,4,5,6,7,8,9,10(full),?..."
|
|
bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0(empty),1,2,3,4,5,6,7,8,9,10(full),?..."
|
|
else
|
|
bitfld.long 0x4 16.--20. " WM ,Watermark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x4 8.--12. " NUMVAL ,Number of valid entrier in queue 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
bitfld.long 0x4 0.--3. " STRTPTR ,Start pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline ""
|
|
textline ""
|
|
group.long 0x620++0x3
|
|
line.long 0x00 "QWMTHRA,Queue Watermark Threshold A Register"
|
|
bitfld.long 0x00 8.--12. " Q1 ,Queue threshold for queue 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..."
|
|
bitfld.long 0x00 0.--4. " Q0 ,Queue threshold for queue 0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,Disabled,?..."
|
|
rgroup.long 0x640++0x3
|
|
line.long 0x00 "CCSTAT,EDMA3CC Status Register"
|
|
bitfld.long 0x00 17. " QUEACTV1 ,Queue 1 active" "Not active,Active"
|
|
bitfld.long 0x00 16. " QUEACTV0 ,Queue 0 active" "Not active,Active"
|
|
textline " "
|
|
sif (cpu()=="OMAP-L137"||cpu()=="OMAP-L138"||cpu()=="AM1808"||cpu()=="AM1707"||cpu()=="AM1705"||CPU()=="AM1806"||CPU()=="AM1810"||CPU()=="AM1802"||cpu()=="DA828"||cpu()=="DA830")
|
|
bitfld.long 0x00 8.--13. " COMPACTV ,Completion request active" "No requests,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 4. " ACTV ,Channel controller active" "Not active,Active"
|
|
else
|
|
hexmask.long.byte 0x00 8.--13. 1. " COMPACTV ,Completion request active"
|
|
bitfld.long 0x00 4. " ACTV ,Channel controller active" "Not active,Active"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 3. " WSTATACTV ,Write status interface active" "Idle,Busy"
|
|
bitfld.long 0x00 2. " TRACTV ,Transfer request active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " QEVTACTV ,QDMA event active" "Not active,Active"
|
|
bitfld.long 0x00 0. " EVTACTV ,DMA event active" "Not active,Active"
|
|
tree.end
|
|
;tree "Memory Protection Address Space"
|
|
; %include tms320dm644x/edma3_dmcc_mpas.ph
|
|
;tree.end
|
|
base asd:0x01c01000
|
|
tree "DMA Channel Registers"
|
|
width 13.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ER,Event Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event 24" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event 9" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event 8" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event 1" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event 0" "Not asserted,Asserted"
|
|
line.long 0x04 "ERH,Event Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event 56" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32" "Not asserted,Asserted"
|
|
width 13.
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x00 "CER,Chained Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Chained event for event 31" "No effect,Prioritized"
|
|
bitfld.long 0x00 30. " E30 ,Chained event for event 30" "No effect,Prioritized"
|
|
bitfld.long 0x00 29. " E29 ,Chained event for event 29" "No effect,Prioritized"
|
|
bitfld.long 0x00 28. " E28 ,Chained event for event 28" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Chained event for event 27" "No effect,Prioritized"
|
|
bitfld.long 0x00 26. " E26 ,Chained event for event 26" "No effect,Prioritized"
|
|
bitfld.long 0x00 25. " E25 ,Chained event for event 25" "No effect,Prioritized"
|
|
bitfld.long 0x00 24. " E24 ,Chained event for event 24" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Chained event for event 23" "No effect,Prioritized"
|
|
bitfld.long 0x00 22. " E22 ,Chained event for event 22" "No effect,Prioritized"
|
|
bitfld.long 0x00 21. " E21 ,Chained event for event 21" "No effect,Prioritized"
|
|
bitfld.long 0x00 20. " E20 ,Chained event for event 20" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Chained event for event 19" "No effect,Prioritized"
|
|
bitfld.long 0x00 18. " E18 ,Chained event for event 18" "No effect,Prioritized"
|
|
bitfld.long 0x00 17. " E17 ,Chained event for event 17" "No effect,Prioritized"
|
|
bitfld.long 0x00 16. " E16 ,Chained event for event 16" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Chained event for event 15" "No effect,Prioritized"
|
|
bitfld.long 0x00 14. " E14 ,Chained event for event 14" "No effect,Prioritized"
|
|
bitfld.long 0x00 13. " E13 ,Chained event for event 13" "No effect,Prioritized"
|
|
bitfld.long 0x00 12. " E12 ,Chained event for event 12" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Chained event for event 11" "No effect,Prioritized"
|
|
bitfld.long 0x00 10. " E10 ,Chained event for event 10" "No effect,Prioritized"
|
|
bitfld.long 0x00 9. " E9 ,Chained event for event 9" "No effect,Prioritized"
|
|
bitfld.long 0x00 8. " E8 ,Chained event for event 8" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Chained event for event 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,Chained event for event 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,Chained event for event 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,Chained event for event 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Chained event for event 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,Chained event for event 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,Chained event for event 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,Chained event for event 0" "No effect,Prioritized"
|
|
line.long 0x04 "CERH,Chained Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Chained event for event 63" "No effect,Prioritized"
|
|
bitfld.long 0x04 30. " E62 ,Chained event for event 62" "No effect,Prioritized"
|
|
bitfld.long 0x04 29. " E61 ,Chained event for event 61" "No effect,Prioritized"
|
|
bitfld.long 0x04 28. " E60 ,Chained event for event 60" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Chained event for event 59" "No effect,Prioritized"
|
|
bitfld.long 0x04 26. " E58 ,Chained event for event 58" "No effect,Prioritized"
|
|
bitfld.long 0x04 25. " E57 ,Chained event for event 57" "No effect,Prioritized"
|
|
bitfld.long 0x04 24. " E56 ,Chained event for event 56" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Chained event for event 55" "No effect,Prioritized"
|
|
bitfld.long 0x04 22. " E54 ,Chained event for event 54" "No effect,Prioritized"
|
|
bitfld.long 0x04 21. " E53 ,Chained event for event 53" "No effect,Prioritized"
|
|
bitfld.long 0x04 20. " E52 ,Chained event for event 52" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Chained event for event 51" "No effect,Prioritized"
|
|
bitfld.long 0x04 18. " E50 ,Chained event for event 50" "No effect,Prioritized"
|
|
bitfld.long 0x04 17. " E49 ,Chained event for event 49" "No effect,Prioritized"
|
|
bitfld.long 0x04 16. " E48 ,Chained event for event 48" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Chained event for event 47" "No effect,Prioritized"
|
|
bitfld.long 0x04 14. " E46 ,Chained event for event 46" "No effect,Prioritized"
|
|
bitfld.long 0x04 13. " E45 ,Chained event for event 45" "No effect,Prioritized"
|
|
bitfld.long 0x04 12. " E44 ,Chained event for event 44" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Chained event for event 43" "No effect,Prioritized"
|
|
bitfld.long 0x04 10. " E42 ,Chained event for event 42" "No effect,Prioritized"
|
|
bitfld.long 0x04 9. " E41 ,Chained event for event 41" "No effect,Prioritized"
|
|
bitfld.long 0x04 8. " E40 ,Chained event for event 40" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Chained event for event 39" "No effect,Prioritized"
|
|
bitfld.long 0x04 6. " E38 ,Chained event for event 38" "No effect,Prioritized"
|
|
bitfld.long 0x04 5. " E37 ,Chained event for event 37" "No effect,Prioritized"
|
|
bitfld.long 0x04 4. " E36 ,Chained event for event 36" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Chained event for event 35" "No effect,Prioritized"
|
|
bitfld.long 0x04 2. " E34 ,Chained event for event 34" "No effect,Prioritized"
|
|
bitfld.long 0x04 1. " E33 ,Chained event for event 33" "No effect,Prioritized"
|
|
bitfld.long 0x04 0. " E32 ,Chained event for event 32" "No effect,Prioritized"
|
|
width 13.
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EER,Event Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event enable 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event enable 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event enable 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "EERH,Event Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable 62" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable 60" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event enable 56" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable 54" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable 50" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable 48" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable 44" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable 42" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable 38" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable 36" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable 32" "Disabled,Enabled"
|
|
width 13.
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x00 "SER,Secondary Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "Not stored,Stored"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "Not stored,Stored"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "Not stored,Stored"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "Not stored,Stored"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "Not stored,Stored"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "Not stored,Stored"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "Not stored,Stored"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "Not stored,Stored"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "Not stored,Stored"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "Not stored,Stored"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "Not stored,Stored"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "Not stored,Stored"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "Not stored,Stored"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "Not stored,Stored"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "Not stored,Stored"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "Not stored,Stored"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "Not stored,Stored"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "Not stored,Stored"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "Not stored,Stored"
|
|
line.long 0x04 "SERH,Secondary Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "Not stored,Stored"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "Not stored,Stored"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "Not stored,Stored"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "Not stored,Stored"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "Not stored,Stored"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "Not stored,Stored"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "Not stored,Stored"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "Not stored,Stored"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "Not stored,Stored"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "Not stored,Stored"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "Not stored,Stored"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "Not stored,Stored"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "Not stored,Stored"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "Not stored,Stored"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "Not stored,Stored"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "Not stored,Stored"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "Not stored,Stored"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "Not stored,Stored"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "Not stored,Stored"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "Not stored,Stored"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "Not stored,Stored"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "Not stored,Stored"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "Not stored,Stored"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "Not stored,Stored"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "Not stored,Stored"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x00 "SECR,Secondary Event Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "No effect,Cleared"
|
|
line.long 0x04 "SECRH,Secondary Event Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
width 7.
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled"
|
|
line.long 0x04 "IERH,Interrupt Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x00 "IPR,Interrupt Pending Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected"
|
|
line.long 0x04 "IPRH,Interrupt Pending Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected"
|
|
wgroup.long 0x70++0x7
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear"
|
|
line.long 0x04 "ICRH,Interrupt Clear Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "IEVAL,Interrupt Evaluate Register"
|
|
bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "QDMA Registers"
|
|
width 7.
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x00 "QER,QDMA Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized"
|
|
width 7.
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "QEER,QDMA Event Enable Register"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled"
|
|
width 7.
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "QSER,QDMA Secondary Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "QSECR,QDMA Secondary Event Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree "Shadow Region Channel Registers"
|
|
tree "Shadow Region 0 Channel Registers"
|
|
base asd:0x01c02000
|
|
tree "DMA Channel Registers"
|
|
width 13.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ER,Event Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event 24" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event 9" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event 8" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event 1" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event 0" "Not asserted,Asserted"
|
|
line.long 0x04 "ERH,Event Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event 56" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32" "Not asserted,Asserted"
|
|
width 13.
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x00 "CER,Chained Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Chained event for event 31" "No effect,Prioritized"
|
|
bitfld.long 0x00 30. " E30 ,Chained event for event 30" "No effect,Prioritized"
|
|
bitfld.long 0x00 29. " E29 ,Chained event for event 29" "No effect,Prioritized"
|
|
bitfld.long 0x00 28. " E28 ,Chained event for event 28" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Chained event for event 27" "No effect,Prioritized"
|
|
bitfld.long 0x00 26. " E26 ,Chained event for event 26" "No effect,Prioritized"
|
|
bitfld.long 0x00 25. " E25 ,Chained event for event 25" "No effect,Prioritized"
|
|
bitfld.long 0x00 24. " E24 ,Chained event for event 24" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Chained event for event 23" "No effect,Prioritized"
|
|
bitfld.long 0x00 22. " E22 ,Chained event for event 22" "No effect,Prioritized"
|
|
bitfld.long 0x00 21. " E21 ,Chained event for event 21" "No effect,Prioritized"
|
|
bitfld.long 0x00 20. " E20 ,Chained event for event 20" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Chained event for event 19" "No effect,Prioritized"
|
|
bitfld.long 0x00 18. " E18 ,Chained event for event 18" "No effect,Prioritized"
|
|
bitfld.long 0x00 17. " E17 ,Chained event for event 17" "No effect,Prioritized"
|
|
bitfld.long 0x00 16. " E16 ,Chained event for event 16" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Chained event for event 15" "No effect,Prioritized"
|
|
bitfld.long 0x00 14. " E14 ,Chained event for event 14" "No effect,Prioritized"
|
|
bitfld.long 0x00 13. " E13 ,Chained event for event 13" "No effect,Prioritized"
|
|
bitfld.long 0x00 12. " E12 ,Chained event for event 12" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Chained event for event 11" "No effect,Prioritized"
|
|
bitfld.long 0x00 10. " E10 ,Chained event for event 10" "No effect,Prioritized"
|
|
bitfld.long 0x00 9. " E9 ,Chained event for event 9" "No effect,Prioritized"
|
|
bitfld.long 0x00 8. " E8 ,Chained event for event 8" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Chained event for event 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,Chained event for event 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,Chained event for event 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,Chained event for event 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Chained event for event 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,Chained event for event 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,Chained event for event 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,Chained event for event 0" "No effect,Prioritized"
|
|
line.long 0x04 "CERH,Chained Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Chained event for event 63" "No effect,Prioritized"
|
|
bitfld.long 0x04 30. " E62 ,Chained event for event 62" "No effect,Prioritized"
|
|
bitfld.long 0x04 29. " E61 ,Chained event for event 61" "No effect,Prioritized"
|
|
bitfld.long 0x04 28. " E60 ,Chained event for event 60" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Chained event for event 59" "No effect,Prioritized"
|
|
bitfld.long 0x04 26. " E58 ,Chained event for event 58" "No effect,Prioritized"
|
|
bitfld.long 0x04 25. " E57 ,Chained event for event 57" "No effect,Prioritized"
|
|
bitfld.long 0x04 24. " E56 ,Chained event for event 56" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Chained event for event 55" "No effect,Prioritized"
|
|
bitfld.long 0x04 22. " E54 ,Chained event for event 54" "No effect,Prioritized"
|
|
bitfld.long 0x04 21. " E53 ,Chained event for event 53" "No effect,Prioritized"
|
|
bitfld.long 0x04 20. " E52 ,Chained event for event 52" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Chained event for event 51" "No effect,Prioritized"
|
|
bitfld.long 0x04 18. " E50 ,Chained event for event 50" "No effect,Prioritized"
|
|
bitfld.long 0x04 17. " E49 ,Chained event for event 49" "No effect,Prioritized"
|
|
bitfld.long 0x04 16. " E48 ,Chained event for event 48" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Chained event for event 47" "No effect,Prioritized"
|
|
bitfld.long 0x04 14. " E46 ,Chained event for event 46" "No effect,Prioritized"
|
|
bitfld.long 0x04 13. " E45 ,Chained event for event 45" "No effect,Prioritized"
|
|
bitfld.long 0x04 12. " E44 ,Chained event for event 44" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Chained event for event 43" "No effect,Prioritized"
|
|
bitfld.long 0x04 10. " E42 ,Chained event for event 42" "No effect,Prioritized"
|
|
bitfld.long 0x04 9. " E41 ,Chained event for event 41" "No effect,Prioritized"
|
|
bitfld.long 0x04 8. " E40 ,Chained event for event 40" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Chained event for event 39" "No effect,Prioritized"
|
|
bitfld.long 0x04 6. " E38 ,Chained event for event 38" "No effect,Prioritized"
|
|
bitfld.long 0x04 5. " E37 ,Chained event for event 37" "No effect,Prioritized"
|
|
bitfld.long 0x04 4. " E36 ,Chained event for event 36" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Chained event for event 35" "No effect,Prioritized"
|
|
bitfld.long 0x04 2. " E34 ,Chained event for event 34" "No effect,Prioritized"
|
|
bitfld.long 0x04 1. " E33 ,Chained event for event 33" "No effect,Prioritized"
|
|
bitfld.long 0x04 0. " E32 ,Chained event for event 32" "No effect,Prioritized"
|
|
width 13.
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EER,Event Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event enable 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event enable 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event enable 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "EERH,Event Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable 62" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable 60" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event enable 56" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable 54" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable 50" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable 48" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable 44" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable 42" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable 38" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable 36" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable 32" "Disabled,Enabled"
|
|
width 13.
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x00 "SER,Secondary Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "Not stored,Stored"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "Not stored,Stored"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "Not stored,Stored"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "Not stored,Stored"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "Not stored,Stored"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "Not stored,Stored"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "Not stored,Stored"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "Not stored,Stored"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "Not stored,Stored"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "Not stored,Stored"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "Not stored,Stored"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "Not stored,Stored"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "Not stored,Stored"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "Not stored,Stored"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "Not stored,Stored"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "Not stored,Stored"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "Not stored,Stored"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "Not stored,Stored"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "Not stored,Stored"
|
|
line.long 0x04 "SERH,Secondary Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "Not stored,Stored"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "Not stored,Stored"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "Not stored,Stored"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "Not stored,Stored"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "Not stored,Stored"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "Not stored,Stored"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "Not stored,Stored"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "Not stored,Stored"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "Not stored,Stored"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "Not stored,Stored"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "Not stored,Stored"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "Not stored,Stored"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "Not stored,Stored"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "Not stored,Stored"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "Not stored,Stored"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "Not stored,Stored"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "Not stored,Stored"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "Not stored,Stored"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "Not stored,Stored"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "Not stored,Stored"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "Not stored,Stored"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "Not stored,Stored"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "Not stored,Stored"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "Not stored,Stored"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "Not stored,Stored"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x00 "SECR,Secondary Event Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "No effect,Cleared"
|
|
line.long 0x04 "SECRH,Secondary Event Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
width 7.
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled"
|
|
line.long 0x04 "IERH,Interrupt Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x00 "IPR,Interrupt Pending Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected"
|
|
line.long 0x04 "IPRH,Interrupt Pending Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected"
|
|
wgroup.long 0x70++0x7
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear"
|
|
line.long 0x04 "ICRH,Interrupt Clear Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "IEVAL,Interrupt Evaluate Register"
|
|
bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "QDMA Registers"
|
|
width 7.
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x00 "QER,QDMA Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized"
|
|
width 7.
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "QEER,QDMA Event Enable Register"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled"
|
|
width 7.
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "QSER,QDMA Secondary Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "QSECR,QDMA Secondary Event Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Shadow Region 1 Channel Registers"
|
|
base asd:0x01c02200
|
|
tree "DMA Channel Registers"
|
|
width 13.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ER,Event Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event 24" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event 9" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event 8" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event 1" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event 0" "Not asserted,Asserted"
|
|
line.long 0x04 "ERH,Event Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event 56" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32" "Not asserted,Asserted"
|
|
width 13.
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x00 "CER,Chained Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Chained event for event 31" "No effect,Prioritized"
|
|
bitfld.long 0x00 30. " E30 ,Chained event for event 30" "No effect,Prioritized"
|
|
bitfld.long 0x00 29. " E29 ,Chained event for event 29" "No effect,Prioritized"
|
|
bitfld.long 0x00 28. " E28 ,Chained event for event 28" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Chained event for event 27" "No effect,Prioritized"
|
|
bitfld.long 0x00 26. " E26 ,Chained event for event 26" "No effect,Prioritized"
|
|
bitfld.long 0x00 25. " E25 ,Chained event for event 25" "No effect,Prioritized"
|
|
bitfld.long 0x00 24. " E24 ,Chained event for event 24" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Chained event for event 23" "No effect,Prioritized"
|
|
bitfld.long 0x00 22. " E22 ,Chained event for event 22" "No effect,Prioritized"
|
|
bitfld.long 0x00 21. " E21 ,Chained event for event 21" "No effect,Prioritized"
|
|
bitfld.long 0x00 20. " E20 ,Chained event for event 20" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Chained event for event 19" "No effect,Prioritized"
|
|
bitfld.long 0x00 18. " E18 ,Chained event for event 18" "No effect,Prioritized"
|
|
bitfld.long 0x00 17. " E17 ,Chained event for event 17" "No effect,Prioritized"
|
|
bitfld.long 0x00 16. " E16 ,Chained event for event 16" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Chained event for event 15" "No effect,Prioritized"
|
|
bitfld.long 0x00 14. " E14 ,Chained event for event 14" "No effect,Prioritized"
|
|
bitfld.long 0x00 13. " E13 ,Chained event for event 13" "No effect,Prioritized"
|
|
bitfld.long 0x00 12. " E12 ,Chained event for event 12" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Chained event for event 11" "No effect,Prioritized"
|
|
bitfld.long 0x00 10. " E10 ,Chained event for event 10" "No effect,Prioritized"
|
|
bitfld.long 0x00 9. " E9 ,Chained event for event 9" "No effect,Prioritized"
|
|
bitfld.long 0x00 8. " E8 ,Chained event for event 8" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Chained event for event 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,Chained event for event 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,Chained event for event 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,Chained event for event 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Chained event for event 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,Chained event for event 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,Chained event for event 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,Chained event for event 0" "No effect,Prioritized"
|
|
line.long 0x04 "CERH,Chained Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Chained event for event 63" "No effect,Prioritized"
|
|
bitfld.long 0x04 30. " E62 ,Chained event for event 62" "No effect,Prioritized"
|
|
bitfld.long 0x04 29. " E61 ,Chained event for event 61" "No effect,Prioritized"
|
|
bitfld.long 0x04 28. " E60 ,Chained event for event 60" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Chained event for event 59" "No effect,Prioritized"
|
|
bitfld.long 0x04 26. " E58 ,Chained event for event 58" "No effect,Prioritized"
|
|
bitfld.long 0x04 25. " E57 ,Chained event for event 57" "No effect,Prioritized"
|
|
bitfld.long 0x04 24. " E56 ,Chained event for event 56" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Chained event for event 55" "No effect,Prioritized"
|
|
bitfld.long 0x04 22. " E54 ,Chained event for event 54" "No effect,Prioritized"
|
|
bitfld.long 0x04 21. " E53 ,Chained event for event 53" "No effect,Prioritized"
|
|
bitfld.long 0x04 20. " E52 ,Chained event for event 52" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Chained event for event 51" "No effect,Prioritized"
|
|
bitfld.long 0x04 18. " E50 ,Chained event for event 50" "No effect,Prioritized"
|
|
bitfld.long 0x04 17. " E49 ,Chained event for event 49" "No effect,Prioritized"
|
|
bitfld.long 0x04 16. " E48 ,Chained event for event 48" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Chained event for event 47" "No effect,Prioritized"
|
|
bitfld.long 0x04 14. " E46 ,Chained event for event 46" "No effect,Prioritized"
|
|
bitfld.long 0x04 13. " E45 ,Chained event for event 45" "No effect,Prioritized"
|
|
bitfld.long 0x04 12. " E44 ,Chained event for event 44" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Chained event for event 43" "No effect,Prioritized"
|
|
bitfld.long 0x04 10. " E42 ,Chained event for event 42" "No effect,Prioritized"
|
|
bitfld.long 0x04 9. " E41 ,Chained event for event 41" "No effect,Prioritized"
|
|
bitfld.long 0x04 8. " E40 ,Chained event for event 40" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Chained event for event 39" "No effect,Prioritized"
|
|
bitfld.long 0x04 6. " E38 ,Chained event for event 38" "No effect,Prioritized"
|
|
bitfld.long 0x04 5. " E37 ,Chained event for event 37" "No effect,Prioritized"
|
|
bitfld.long 0x04 4. " E36 ,Chained event for event 36" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Chained event for event 35" "No effect,Prioritized"
|
|
bitfld.long 0x04 2. " E34 ,Chained event for event 34" "No effect,Prioritized"
|
|
bitfld.long 0x04 1. " E33 ,Chained event for event 33" "No effect,Prioritized"
|
|
bitfld.long 0x04 0. " E32 ,Chained event for event 32" "No effect,Prioritized"
|
|
width 13.
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EER,Event Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event enable 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event enable 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event enable 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "EERH,Event Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable 62" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable 60" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event enable 56" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable 54" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable 50" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable 48" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable 44" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable 42" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable 38" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable 36" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable 32" "Disabled,Enabled"
|
|
width 13.
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x00 "SER,Secondary Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "Not stored,Stored"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "Not stored,Stored"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "Not stored,Stored"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "Not stored,Stored"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "Not stored,Stored"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "Not stored,Stored"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "Not stored,Stored"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "Not stored,Stored"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "Not stored,Stored"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "Not stored,Stored"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "Not stored,Stored"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "Not stored,Stored"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "Not stored,Stored"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "Not stored,Stored"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "Not stored,Stored"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "Not stored,Stored"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "Not stored,Stored"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "Not stored,Stored"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "Not stored,Stored"
|
|
line.long 0x04 "SERH,Secondary Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "Not stored,Stored"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "Not stored,Stored"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "Not stored,Stored"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "Not stored,Stored"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "Not stored,Stored"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "Not stored,Stored"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "Not stored,Stored"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "Not stored,Stored"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "Not stored,Stored"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "Not stored,Stored"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "Not stored,Stored"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "Not stored,Stored"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "Not stored,Stored"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "Not stored,Stored"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "Not stored,Stored"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "Not stored,Stored"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "Not stored,Stored"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "Not stored,Stored"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "Not stored,Stored"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "Not stored,Stored"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "Not stored,Stored"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "Not stored,Stored"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "Not stored,Stored"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "Not stored,Stored"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "Not stored,Stored"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x00 "SECR,Secondary Event Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "No effect,Cleared"
|
|
line.long 0x04 "SECRH,Secondary Event Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
width 7.
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled"
|
|
line.long 0x04 "IERH,Interrupt Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x00 "IPR,Interrupt Pending Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected"
|
|
line.long 0x04 "IPRH,Interrupt Pending Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected"
|
|
wgroup.long 0x70++0x7
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear"
|
|
line.long 0x04 "ICRH,Interrupt Clear Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "IEVAL,Interrupt Evaluate Register"
|
|
bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "QDMA Registers"
|
|
width 7.
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x00 "QER,QDMA Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized"
|
|
width 7.
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "QEER,QDMA Event Enable Register"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled"
|
|
width 7.
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "QSER,QDMA Secondary Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "QSECR,QDMA Secondary Event Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Shadow Region 2 Channel Registers"
|
|
base asd:0x01c02400
|
|
tree "DMA Channel Registers"
|
|
width 13.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ER,Event Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event 24" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event 9" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event 8" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event 1" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event 0" "Not asserted,Asserted"
|
|
line.long 0x04 "ERH,Event Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event 56" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32" "Not asserted,Asserted"
|
|
width 13.
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x00 "CER,Chained Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Chained event for event 31" "No effect,Prioritized"
|
|
bitfld.long 0x00 30. " E30 ,Chained event for event 30" "No effect,Prioritized"
|
|
bitfld.long 0x00 29. " E29 ,Chained event for event 29" "No effect,Prioritized"
|
|
bitfld.long 0x00 28. " E28 ,Chained event for event 28" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Chained event for event 27" "No effect,Prioritized"
|
|
bitfld.long 0x00 26. " E26 ,Chained event for event 26" "No effect,Prioritized"
|
|
bitfld.long 0x00 25. " E25 ,Chained event for event 25" "No effect,Prioritized"
|
|
bitfld.long 0x00 24. " E24 ,Chained event for event 24" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Chained event for event 23" "No effect,Prioritized"
|
|
bitfld.long 0x00 22. " E22 ,Chained event for event 22" "No effect,Prioritized"
|
|
bitfld.long 0x00 21. " E21 ,Chained event for event 21" "No effect,Prioritized"
|
|
bitfld.long 0x00 20. " E20 ,Chained event for event 20" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Chained event for event 19" "No effect,Prioritized"
|
|
bitfld.long 0x00 18. " E18 ,Chained event for event 18" "No effect,Prioritized"
|
|
bitfld.long 0x00 17. " E17 ,Chained event for event 17" "No effect,Prioritized"
|
|
bitfld.long 0x00 16. " E16 ,Chained event for event 16" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Chained event for event 15" "No effect,Prioritized"
|
|
bitfld.long 0x00 14. " E14 ,Chained event for event 14" "No effect,Prioritized"
|
|
bitfld.long 0x00 13. " E13 ,Chained event for event 13" "No effect,Prioritized"
|
|
bitfld.long 0x00 12. " E12 ,Chained event for event 12" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Chained event for event 11" "No effect,Prioritized"
|
|
bitfld.long 0x00 10. " E10 ,Chained event for event 10" "No effect,Prioritized"
|
|
bitfld.long 0x00 9. " E9 ,Chained event for event 9" "No effect,Prioritized"
|
|
bitfld.long 0x00 8. " E8 ,Chained event for event 8" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Chained event for event 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,Chained event for event 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,Chained event for event 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,Chained event for event 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Chained event for event 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,Chained event for event 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,Chained event for event 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,Chained event for event 0" "No effect,Prioritized"
|
|
line.long 0x04 "CERH,Chained Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Chained event for event 63" "No effect,Prioritized"
|
|
bitfld.long 0x04 30. " E62 ,Chained event for event 62" "No effect,Prioritized"
|
|
bitfld.long 0x04 29. " E61 ,Chained event for event 61" "No effect,Prioritized"
|
|
bitfld.long 0x04 28. " E60 ,Chained event for event 60" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Chained event for event 59" "No effect,Prioritized"
|
|
bitfld.long 0x04 26. " E58 ,Chained event for event 58" "No effect,Prioritized"
|
|
bitfld.long 0x04 25. " E57 ,Chained event for event 57" "No effect,Prioritized"
|
|
bitfld.long 0x04 24. " E56 ,Chained event for event 56" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Chained event for event 55" "No effect,Prioritized"
|
|
bitfld.long 0x04 22. " E54 ,Chained event for event 54" "No effect,Prioritized"
|
|
bitfld.long 0x04 21. " E53 ,Chained event for event 53" "No effect,Prioritized"
|
|
bitfld.long 0x04 20. " E52 ,Chained event for event 52" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Chained event for event 51" "No effect,Prioritized"
|
|
bitfld.long 0x04 18. " E50 ,Chained event for event 50" "No effect,Prioritized"
|
|
bitfld.long 0x04 17. " E49 ,Chained event for event 49" "No effect,Prioritized"
|
|
bitfld.long 0x04 16. " E48 ,Chained event for event 48" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Chained event for event 47" "No effect,Prioritized"
|
|
bitfld.long 0x04 14. " E46 ,Chained event for event 46" "No effect,Prioritized"
|
|
bitfld.long 0x04 13. " E45 ,Chained event for event 45" "No effect,Prioritized"
|
|
bitfld.long 0x04 12. " E44 ,Chained event for event 44" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Chained event for event 43" "No effect,Prioritized"
|
|
bitfld.long 0x04 10. " E42 ,Chained event for event 42" "No effect,Prioritized"
|
|
bitfld.long 0x04 9. " E41 ,Chained event for event 41" "No effect,Prioritized"
|
|
bitfld.long 0x04 8. " E40 ,Chained event for event 40" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Chained event for event 39" "No effect,Prioritized"
|
|
bitfld.long 0x04 6. " E38 ,Chained event for event 38" "No effect,Prioritized"
|
|
bitfld.long 0x04 5. " E37 ,Chained event for event 37" "No effect,Prioritized"
|
|
bitfld.long 0x04 4. " E36 ,Chained event for event 36" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Chained event for event 35" "No effect,Prioritized"
|
|
bitfld.long 0x04 2. " E34 ,Chained event for event 34" "No effect,Prioritized"
|
|
bitfld.long 0x04 1. " E33 ,Chained event for event 33" "No effect,Prioritized"
|
|
bitfld.long 0x04 0. " E32 ,Chained event for event 32" "No effect,Prioritized"
|
|
width 13.
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EER,Event Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event enable 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event enable 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event enable 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "EERH,Event Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable 62" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable 60" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event enable 56" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable 54" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable 50" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable 48" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable 44" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable 42" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable 38" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable 36" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable 32" "Disabled,Enabled"
|
|
width 13.
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x00 "SER,Secondary Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "Not stored,Stored"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "Not stored,Stored"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "Not stored,Stored"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "Not stored,Stored"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "Not stored,Stored"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "Not stored,Stored"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "Not stored,Stored"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "Not stored,Stored"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "Not stored,Stored"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "Not stored,Stored"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "Not stored,Stored"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "Not stored,Stored"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "Not stored,Stored"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "Not stored,Stored"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "Not stored,Stored"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "Not stored,Stored"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "Not stored,Stored"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "Not stored,Stored"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "Not stored,Stored"
|
|
line.long 0x04 "SERH,Secondary Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "Not stored,Stored"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "Not stored,Stored"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "Not stored,Stored"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "Not stored,Stored"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "Not stored,Stored"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "Not stored,Stored"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "Not stored,Stored"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "Not stored,Stored"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "Not stored,Stored"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "Not stored,Stored"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "Not stored,Stored"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "Not stored,Stored"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "Not stored,Stored"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "Not stored,Stored"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "Not stored,Stored"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "Not stored,Stored"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "Not stored,Stored"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "Not stored,Stored"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "Not stored,Stored"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "Not stored,Stored"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "Not stored,Stored"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "Not stored,Stored"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "Not stored,Stored"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "Not stored,Stored"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "Not stored,Stored"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x00 "SECR,Secondary Event Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "No effect,Cleared"
|
|
line.long 0x04 "SECRH,Secondary Event Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
width 7.
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled"
|
|
line.long 0x04 "IERH,Interrupt Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x00 "IPR,Interrupt Pending Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected"
|
|
line.long 0x04 "IPRH,Interrupt Pending Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected"
|
|
wgroup.long 0x70++0x7
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear"
|
|
line.long 0x04 "ICRH,Interrupt Clear Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "IEVAL,Interrupt Evaluate Register"
|
|
bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "QDMA Registers"
|
|
width 7.
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x00 "QER,QDMA Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized"
|
|
width 7.
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "QEER,QDMA Event Enable Register"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled"
|
|
width 7.
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "QSER,QDMA Secondary Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "QSECR,QDMA Secondary Event Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "Shadow Region 3 Channel Registers"
|
|
base asd:0x01c02600
|
|
tree "DMA Channel Registers"
|
|
width 13.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "ER,Event Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event 31" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event 30" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event 29" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event 28" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event 27" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event 26" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event 25" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event 24" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event 23" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event 22" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event 21" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event 20" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event 19" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event 18" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event 17" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event 16" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event 15" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event 14" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event 13" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event 12" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event 11" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event 10" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event 9" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event 8" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event 7" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event 6" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event 5" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event 4" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event 3" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event 2" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event 1" "Not asserted,Asserted"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event 0" "Not asserted,Asserted"
|
|
line.long 0x04 "ERH,Event Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event 63" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event 62" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event 61" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event 60" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event 59" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event 58" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event 57" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event 56" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event 55" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event 54" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event 53" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event 52" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event 51" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event 50" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event 49" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event 48" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event 47" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event 46" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event 45" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event 44" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event 43" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event 42" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event 41" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event 40" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event 39" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event 38" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event 37" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event 36" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event 35" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event 34" "Not asserted,Asserted"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event 33" "Not asserted,Asserted"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event 32" "Not asserted,Asserted"
|
|
width 13.
|
|
rgroup.long 0x18++0x7
|
|
line.long 0x00 "CER,Chained Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Chained event for event 31" "No effect,Prioritized"
|
|
bitfld.long 0x00 30. " E30 ,Chained event for event 30" "No effect,Prioritized"
|
|
bitfld.long 0x00 29. " E29 ,Chained event for event 29" "No effect,Prioritized"
|
|
bitfld.long 0x00 28. " E28 ,Chained event for event 28" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Chained event for event 27" "No effect,Prioritized"
|
|
bitfld.long 0x00 26. " E26 ,Chained event for event 26" "No effect,Prioritized"
|
|
bitfld.long 0x00 25. " E25 ,Chained event for event 25" "No effect,Prioritized"
|
|
bitfld.long 0x00 24. " E24 ,Chained event for event 24" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Chained event for event 23" "No effect,Prioritized"
|
|
bitfld.long 0x00 22. " E22 ,Chained event for event 22" "No effect,Prioritized"
|
|
bitfld.long 0x00 21. " E21 ,Chained event for event 21" "No effect,Prioritized"
|
|
bitfld.long 0x00 20. " E20 ,Chained event for event 20" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Chained event for event 19" "No effect,Prioritized"
|
|
bitfld.long 0x00 18. " E18 ,Chained event for event 18" "No effect,Prioritized"
|
|
bitfld.long 0x00 17. " E17 ,Chained event for event 17" "No effect,Prioritized"
|
|
bitfld.long 0x00 16. " E16 ,Chained event for event 16" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Chained event for event 15" "No effect,Prioritized"
|
|
bitfld.long 0x00 14. " E14 ,Chained event for event 14" "No effect,Prioritized"
|
|
bitfld.long 0x00 13. " E13 ,Chained event for event 13" "No effect,Prioritized"
|
|
bitfld.long 0x00 12. " E12 ,Chained event for event 12" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Chained event for event 11" "No effect,Prioritized"
|
|
bitfld.long 0x00 10. " E10 ,Chained event for event 10" "No effect,Prioritized"
|
|
bitfld.long 0x00 9. " E9 ,Chained event for event 9" "No effect,Prioritized"
|
|
bitfld.long 0x00 8. " E8 ,Chained event for event 8" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Chained event for event 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,Chained event for event 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,Chained event for event 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,Chained event for event 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Chained event for event 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,Chained event for event 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,Chained event for event 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,Chained event for event 0" "No effect,Prioritized"
|
|
line.long 0x04 "CERH,Chained Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Chained event for event 63" "No effect,Prioritized"
|
|
bitfld.long 0x04 30. " E62 ,Chained event for event 62" "No effect,Prioritized"
|
|
bitfld.long 0x04 29. " E61 ,Chained event for event 61" "No effect,Prioritized"
|
|
bitfld.long 0x04 28. " E60 ,Chained event for event 60" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Chained event for event 59" "No effect,Prioritized"
|
|
bitfld.long 0x04 26. " E58 ,Chained event for event 58" "No effect,Prioritized"
|
|
bitfld.long 0x04 25. " E57 ,Chained event for event 57" "No effect,Prioritized"
|
|
bitfld.long 0x04 24. " E56 ,Chained event for event 56" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Chained event for event 55" "No effect,Prioritized"
|
|
bitfld.long 0x04 22. " E54 ,Chained event for event 54" "No effect,Prioritized"
|
|
bitfld.long 0x04 21. " E53 ,Chained event for event 53" "No effect,Prioritized"
|
|
bitfld.long 0x04 20. " E52 ,Chained event for event 52" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Chained event for event 51" "No effect,Prioritized"
|
|
bitfld.long 0x04 18. " E50 ,Chained event for event 50" "No effect,Prioritized"
|
|
bitfld.long 0x04 17. " E49 ,Chained event for event 49" "No effect,Prioritized"
|
|
bitfld.long 0x04 16. " E48 ,Chained event for event 48" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Chained event for event 47" "No effect,Prioritized"
|
|
bitfld.long 0x04 14. " E46 ,Chained event for event 46" "No effect,Prioritized"
|
|
bitfld.long 0x04 13. " E45 ,Chained event for event 45" "No effect,Prioritized"
|
|
bitfld.long 0x04 12. " E44 ,Chained event for event 44" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Chained event for event 43" "No effect,Prioritized"
|
|
bitfld.long 0x04 10. " E42 ,Chained event for event 42" "No effect,Prioritized"
|
|
bitfld.long 0x04 9. " E41 ,Chained event for event 41" "No effect,Prioritized"
|
|
bitfld.long 0x04 8. " E40 ,Chained event for event 40" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Chained event for event 39" "No effect,Prioritized"
|
|
bitfld.long 0x04 6. " E38 ,Chained event for event 38" "No effect,Prioritized"
|
|
bitfld.long 0x04 5. " E37 ,Chained event for event 37" "No effect,Prioritized"
|
|
bitfld.long 0x04 4. " E36 ,Chained event for event 36" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Chained event for event 35" "No effect,Prioritized"
|
|
bitfld.long 0x04 2. " E34 ,Chained event for event 34" "No effect,Prioritized"
|
|
bitfld.long 0x04 1. " E33 ,Chained event for event 33" "No effect,Prioritized"
|
|
bitfld.long 0x04 0. " E32 ,Chained event for event 32" "No effect,Prioritized"
|
|
width 13.
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "EER,Event Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " E31_set/clr ,Event enable 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " E30_set/clr ,Event enable 30" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " E29_set/clr ,Event enable 29" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " E28_set/clr ,Event enable 28" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " E27_set/clr ,Event enable 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " E26_set/clr ,Event enable 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " E25_set/clr ,Event enable 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " E24_set/clr ,Event enable 24" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " E23_set/clr ,Event enable 23" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " E22_set/clr ,Event enable 22" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " E21_set/clr ,Event enable 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " E20_set/clr ,Event enable 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " E19_set/clr ,Event enable 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " E18_set/clr ,Event enable 18" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " E17_set/clr ,Event enable 17" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " E16_set/clr ,Event enable 16" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " E15_set/clr ,Event enable 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " E14_set/clr ,Event enable 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " E13_set/clr ,Event enable 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " E12_set/clr ,Event enable 12" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " E11_set/clr ,Event enable 11" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " E10_set/clr ,Event enable 10" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " E9_set/clr ,Event enable 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " E8_set/clr ,Event enable 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " E7_set/clr ,Event enable 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " E6_set/clr ,Event enable 6" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " E5_set/clr ,Event enable 5" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " E4_set/clr ,Event enable 4" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " E3_set/clr ,Event enable 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " E2_set/clr ,Event enable 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " E1_set/clr ,Event enable 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " E0_set/clr ,Event enable 0" "Disabled,Enabled"
|
|
line.long 0x04 "EERH,Event Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " E63_set/clr ,Event enable 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " E62_set/clr ,Event enable 62" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " E61_set/clr ,Event enable 61" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " E60_set/clr ,Event enable 60" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " E59_set/clr ,Event enable 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " E58_set/clr ,Event enable 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " E57_set/clr ,Event enable 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " E56_set/clr ,Event enable 56" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " E55_set/clr ,Event enable 55" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " E54_set/clr ,Event enable 54" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " E53_set/clr ,Event enable 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " E52_set/clr ,Event enable 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " E51_set/clr ,Event enable 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " E50_set/clr ,Event enable 50" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " E49_set/clr ,Event enable 49" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " E48_set/clr ,Event enable 48" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " E47_set/clr ,Event enable 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " E46_set/clr ,Event enable 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " E45_set/clr ,Event enable 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " E44_set/clr ,Event enable 44" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " E43_set/clr ,Event enable 43" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " E42_set/clr ,Event enable 42" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " E41_set/clr ,Event enable 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " E40_set/clr ,Event enable 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " E39_set/clr ,Event enable 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " E38_set/clr ,Event enable 38" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " E37_set/clr ,Event enable 37" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " E36_set/clr ,Event enable 36" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " E35_set/clr ,Event enable 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " E34_set/clr ,Event enable 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " E33_set/clr ,Event enable 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " E32_set/clr ,Event enable 32" "Disabled,Enabled"
|
|
width 13.
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x00 "SER,Secondary Event Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "Not stored,Stored"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "Not stored,Stored"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "Not stored,Stored"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "Not stored,Stored"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "Not stored,Stored"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "Not stored,Stored"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "Not stored,Stored"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "Not stored,Stored"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "Not stored,Stored"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "Not stored,Stored"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "Not stored,Stored"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "Not stored,Stored"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "Not stored,Stored"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "Not stored,Stored"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "Not stored,Stored"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "Not stored,Stored"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "Not stored,Stored"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "Not stored,Stored"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "Not stored,Stored"
|
|
line.long 0x04 "SERH,Secondary Event Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "Not stored,Stored"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "Not stored,Stored"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "Not stored,Stored"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "Not stored,Stored"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "Not stored,Stored"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "Not stored,Stored"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "Not stored,Stored"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "Not stored,Stored"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "Not stored,Stored"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "Not stored,Stored"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "Not stored,Stored"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "Not stored,Stored"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "Not stored,Stored"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "Not stored,Stored"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "Not stored,Stored"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "Not stored,Stored"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "Not stored,Stored"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "Not stored,Stored"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "Not stored,Stored"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "Not stored,Stored"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "Not stored,Stored"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "Not stored,Stored"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "Not stored,Stored"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "Not stored,Stored"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "Not stored,Stored"
|
|
wgroup.long 0x40++0x7
|
|
line.long 0x00 "SECR,Secondary Event Clear Register"
|
|
bitfld.long 0x00 31. " E31 ,Secondary event 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " E30 ,Secondary event 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " E29 ,Secondary event 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " E28 ,Secondary event 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " E27 ,Secondary event 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " E26 ,Secondary event 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " E25 ,Secondary event 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " E24 ,Secondary event 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " E23 ,Secondary event 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " E22 ,Secondary event 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " E21 ,Secondary event 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " E20 ,Secondary event 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " E19 ,Secondary event 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " E18 ,Secondary event 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " E17 ,Secondary event 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " E16 ,Secondary event 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " E15 ,Secondary event 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " E14 ,Secondary event 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " E13 ,Secondary event 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " E12 ,Secondary event 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " E11 ,Secondary event 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " E10 ,Secondary event 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " E9 ,Secondary event 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " E8 ,Secondary event 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " E7 ,Secondary event 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " E6 ,Secondary event 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " E5 ,Secondary event 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " E4 ,Secondary event 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,Secondary event 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " E2 ,Secondary event 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " E1 ,Secondary event 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " E0 ,Secondary event 0" "No effect,Cleared"
|
|
line.long 0x04 "SECRH,Secondary Event Clear Register High"
|
|
bitfld.long 0x04 31. " E63 ,Secondary event 63" "No effect,Cleared"
|
|
bitfld.long 0x04 30. " E62 ,Secondary event 62" "No effect,Cleared"
|
|
bitfld.long 0x04 29. " E61 ,Secondary event 61" "No effect,Cleared"
|
|
bitfld.long 0x04 28. " E60 ,Secondary event 60" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 27. " E59 ,Secondary event 59" "No effect,Cleared"
|
|
bitfld.long 0x04 26. " E58 ,Secondary event 58" "No effect,Cleared"
|
|
bitfld.long 0x04 25. " E57 ,Secondary event 57" "No effect,Cleared"
|
|
bitfld.long 0x04 24. " E56 ,Secondary event 56" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 23. " E55 ,Secondary event 55" "No effect,Cleared"
|
|
bitfld.long 0x04 22. " E54 ,Secondary event 54" "No effect,Cleared"
|
|
bitfld.long 0x04 21. " E53 ,Secondary event 53" "No effect,Cleared"
|
|
bitfld.long 0x04 20. " E52 ,Secondary event 52" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 19. " E51 ,Secondary event 51" "No effect,Cleared"
|
|
bitfld.long 0x04 18. " E50 ,Secondary event 50" "No effect,Cleared"
|
|
bitfld.long 0x04 17. " E49 ,Secondary event 49" "No effect,Cleared"
|
|
bitfld.long 0x04 16. " E48 ,Secondary event 48" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 15. " E47 ,Secondary event 47" "No effect,Cleared"
|
|
bitfld.long 0x04 14. " E46 ,Secondary event 46" "No effect,Cleared"
|
|
bitfld.long 0x04 13. " E45 ,Secondary event 45" "No effect,Cleared"
|
|
bitfld.long 0x04 12. " E44 ,Secondary event 44" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 11. " E43 ,Secondary event 43" "No effect,Cleared"
|
|
bitfld.long 0x04 10. " E42 ,Secondary event 42" "No effect,Cleared"
|
|
bitfld.long 0x04 9. " E41 ,Secondary event 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " E40 ,Secondary event 40" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 7. " E39 ,Secondary event 39" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " E38 ,Secondary event 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " E37 ,Secondary event 37" "No effect,Cleared"
|
|
bitfld.long 0x04 4. " E36 ,Secondary event 36" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 3. " E35 ,Secondary event 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " E34 ,Secondary event 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " E33 ,Secondary event 33" "No effect,Cleared"
|
|
bitfld.long 0x04 0. " E32 ,Secondary event 32" "No effect,Cleared"
|
|
width 0xb
|
|
tree.end
|
|
tree "Interrupt Registers"
|
|
width 7.
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "IER,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x10 31. 0x08 31. " I31_set/clr ,Interrupt Enable for channel 31" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x10 30. 0x08 30. " I30_set/clr ,Interrupt Enable for channel 30" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 29. 0x10 29. 0x08 29. " I29_set/clr ,Interrupt Enable for channel 29" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x10 28. 0x08 28. " I28_set/clr ,Interrupt Enable for channel 28" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x10 27. 0x08 27. " I27_set/clr ,Interrupt Enable for channel 27" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x10 26. 0x08 26. " I26_set/clr ,Interrupt Enable for channel 26" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x10 25. 0x08 25. " I25_set/clr ,Interrupt Enable for channel 25" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x10 24. 0x08 24. " I24_set/clr ,Interrupt Enable for channel 24" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x10 23. 0x08 23. " I23_set/clr ,Interrupt Enable for channel 23" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x10 22. 0x08 22. " I22_set/clr ,Interrupt Enable for channel 22" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 21. 0x10 21. 0x08 21. " I21_set/clr ,Interrupt Enable for channel 21" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x10 20. 0x08 20. " I20_set/clr ,Interrupt Enable for channel 20" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x10 19. 0x08 19. " I19_set/clr ,Interrupt Enable for channel 19" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x10 18. 0x08 18. " I18_set/clr ,Interrupt Enable for channel 18" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 17. 0x10 17. 0x08 17. " I17_set/clr ,Interrupt Enable for channel 17" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x10 16. 0x08 16. " I16_set/clr ,Interrupt Enable for channel 16" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x10 15. 0x08 15. " I15_set/clr ,Interrupt Enable for channel 15" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x10 14. 0x08 14. " I14_set/clr ,Interrupt Enable for channel 14" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x10 13. 0x08 13. " I13_set/clr ,Interrupt Enable for channel 13" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x10 12. 0x08 12. " I12_set/clr ,Interrupt Enable for channel 12" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x10 11. 0x08 11. " I11_set/clr ,Interrupt Enable for channel 11" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x10 10. 0x08 10. " I10_set/clr ,Interrupt Enable for channel 10" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x10 9. 0x08 9. " I9_set/clr ,Interrupt Enable for channel 9" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x10 8. 0x08 8. " I8_set/clr ,Interrupt Enable for channel 8" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x10 7. 0x08 7. " I7_set/clr ,Interrupt Enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x10 6. 0x08 6. " I6_set/clr ,Interrupt Enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x10 5. 0x08 5. " I5_set/clr ,Interrupt Enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x10 4. 0x08 4. " I4_set/clr ,Interrupt Enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x10 3. 0x08 3. " I3_set/clr ,Interrupt Enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x10 2. 0x08 2. " I2_set/clr ,Interrupt Enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x10 1. 0x08 1. " I1_set/clr ,Interrupt Enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x10 0. 0x08 0. " I0_set/clr ,Interrupt Enable for channel 0" "Disabled,Enabled"
|
|
line.long 0x04 "IERH,Interrupt Enable Register High"
|
|
setclrfld.long 0x04 31. 0x14 31. 0x0c 31. " I63_set/clr ,Interrupt Enable for channel 63" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x14 30. 0x0c 30. " I62_set/clr ,Interrupt Enable for channel 62" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 29. 0x14 29. 0x0c 29. " I61_set/clr ,Interrupt Enable for channel 61" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x14 28. 0x0c 28. " I60_set/clr ,Interrupt Enable for channel 60" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x14 27. 0x0c 27. " I59_set/clr ,Interrupt Enable for channel 59" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x14 26. 0x0c 26. " I58_set/clr ,Interrupt Enable for channel 58" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x14 25. 0x0c 25. " I57_set/clr ,Interrupt Enable for channel 57" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x14 24. 0x0c 24. " I56_set/clr ,Interrupt Enable for channel 56" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x14 23. 0x0c 23. " I55_set/clr ,Interrupt Enable for channel 55" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x14 22. 0x0c 22. " I54_set/clr ,Interrupt Enable for channel 54" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 21. 0x14 21. 0x0c 21. " I53_set/clr ,Interrupt Enable for channel 53" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x14 20. 0x0c 20. " I52_set/clr ,Interrupt Enable for channel 52" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x14 19. 0x0c 19. " I51_set/clr ,Interrupt Enable for channel 51" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x14 18. 0x0c 18. " I50_set/clr ,Interrupt Enable for channel 50" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 17. 0x14 17. 0x0c 17. " I49_set/clr ,Interrupt Enable for channel 49" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x14 16. 0x0c 16. " I48_set/clr ,Interrupt Enable for channel 48" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x14 15. 0x0c 15. " I47_set/clr ,Interrupt Enable for channel 47" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x14 14. 0x0c 14. " I46_set/clr ,Interrupt Enable for channel 46" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x14 13. 0x0c 13. " I45_set/clr ,Interrupt Enable for channel 45" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x14 12. 0x0c 12. " I44_set/clr ,Interrupt Enable for channel 44" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x14 11. 0x0c 11. " I43_set/clr ,Interrupt Enable for channel 43" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x14 10. 0x0c 10. " I42_set/clr ,Interrupt Enable for channel 42" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 9. 0x14 9. 0x0c 9. " I41_set/clr ,Interrupt Enable for channel 41" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x14 8. 0x0c 8. " I40_set/clr ,Interrupt Enable for channel 40" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x14 7. 0x0c 7. " I39_set/clr ,Interrupt Enable for channel 39" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x14 6. 0x0c 6. " I38_set/clr ,Interrupt Enable for channel 38" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 5. 0x14 5. 0x0c 5. " I37_set/clr ,Interrupt Enable for channel 37" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x14 4. 0x0c 4. " I36_set/clr ,Interrupt Enable for channel 36" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x14 3. 0x0c 3. " I35_set/clr ,Interrupt Enable for channel 35" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x14 2. 0x0c 2. " I34_set/clr ,Interrupt Enable for channel 34" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x14 1. 0x0c 1. " I33_set/clr ,Interrupt Enable for channel 33" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x14 0. 0x0c 0. " I32_set/clr ,Interrupt Enable for channel 32" "Disabled,Enabled"
|
|
rgroup.long 0x68++0x7
|
|
line.long 0x00 "IPR,Interrupt Pending Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt transfer completion code 31 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt transfer completion code 30 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt transfer completion code 29 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt transfer completion code 28 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt transfer completion code 27 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt transfer completion code 26 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt transfer completion code 25 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt transfer completion code 24 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt transfer completion code 23 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt transfer completion code 22 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt transfer completion code 21 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt transfer completion code 20 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt transfer completion code 19 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt transfer completion code 18 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt transfer completion code 17 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt transfer completion code 16 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt transfer completion code 15 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt transfer completion code 14 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt transfer completion code 13 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt transfer completion code 12 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt transfer completion code 11 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt transfer completion code 10 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt transfer completion code 9 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt transfer completion code 8 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt transfer completion code 7 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt transfer completion code 6 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt transfer completion code 5 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt transfer completion code 4 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt transfer completion code 3 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt transfer completion code 2 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt transfer completion code 1 detected" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt transfer completion code 0 detected" "Not detected,Detected"
|
|
line.long 0x04 "IPRH,Interrupt Pending Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt transfer completion code 63 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt transfer completion code 62 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt transfer completion code 61 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt transfer completion code 60 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt transfer completion code 59 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt transfer completion code 58 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt transfer completion code 57 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt transfer completion code 56 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt transfer completion code 55 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt transfer completion code 54 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt transfer completion code 53 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt transfer completion code 52 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt transfer completion code 51 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt transfer completion code 50 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt transfer completion code 49 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt transfer completion code 48 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt transfer completion code 47 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt transfer completion code 46 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt transfer completion code 45 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt transfer completion code 44 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt transfer completion code 43 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt transfer completion code 42 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt transfer completion code 41 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt transfer completion code 40 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt transfer completion code 39 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt transfer completion code 38 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt transfer completion code 37 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt transfer completion code 36 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt transfer completion code 35 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt transfer completion code 34 detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt transfer completion code 33 detected" "Not detected,Detected"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt transfer completion code 32 detected" "Not detected,Detected"
|
|
wgroup.long 0x70++0x7
|
|
line.long 0x00 "ICR,Interrupt Clear Register"
|
|
bitfld.long 0x00 31. " I31 ,Interrupt clear for TCC = 31" "No effect,Clear"
|
|
bitfld.long 0x00 30. " I30 ,Interrupt clear for TCC = 30" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 29. " I29 ,Interrupt clear for TCC = 29" "No effect,Clear"
|
|
bitfld.long 0x00 28. " I28 ,Interrupt clear for TCC = 28" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " I27 ,Interrupt clear for TCC = 27" "No effect,Clear"
|
|
bitfld.long 0x00 26. " I26 ,Interrupt clear for TCC = 26" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I25 ,Interrupt clear for TCC = 25" "No effect,Clear"
|
|
bitfld.long 0x00 24. " I24 ,Interrupt clear for TCC = 24" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " I23 ,Interrupt clear for TCC = 23" "No effect,Clear"
|
|
bitfld.long 0x00 22. " I22 ,Interrupt clear for TCC = 22" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " I21 ,Interrupt clear for TCC = 21" "No effect,Clear"
|
|
bitfld.long 0x00 20. " I20 ,Interrupt clear for TCC = 20" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " I19 ,Interrupt clear for TCC = 19" "No effect,Clear"
|
|
bitfld.long 0x00 18. " I18 ,Interrupt clear for TCC = 18" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " I17 ,Interrupt clear for TCC = 17" "No effect,Clear"
|
|
bitfld.long 0x00 16. " I16 ,Interrupt clear for TCC = 16" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " I15 ,Interrupt clear for TCC = 15" "No effect,Clear"
|
|
bitfld.long 0x00 14. " I14 ,Interrupt clear for TCC = 14" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I13 ,Interrupt clear for TCC = 13" "No effect,Clear"
|
|
bitfld.long 0x00 12. " I12 ,Interrupt clear for TCC = 12" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " I11 ,Interrupt clear for TCC = 11" "No effect,Clear"
|
|
bitfld.long 0x00 10. " I10 ,Interrupt clear for TCC = 10" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " I9 ,Interrupt clear for TCC = 9" "No effect,Clear"
|
|
bitfld.long 0x00 8. " I8 ,Interrupt clear for TCC = 8" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " I7 ,Interrupt clear for TCC = 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " I6 ,Interrupt clear for TCC = 6" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " I5 ,Interrupt clear for TCC = 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " I4 ,Interrupt clear for TCC = 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " I3 ,Interrupt clear for TCC = 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " I2 ,Interrupt clear for TCC = 2" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " I1 ,Interrupt clear for TCC = 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " I0 ,Interrupt clear for TCC = 0" "No effect,Clear"
|
|
line.long 0x04 "ICRH,Interrupt Clear Register High"
|
|
bitfld.long 0x04 31. " I63 ,Interrupt clear for TCC = 63" "No effect,Clear"
|
|
bitfld.long 0x04 30. " I62 ,Interrupt clear for TCC = 62" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 29. " I61 ,Interrupt clear for TCC = 61" "No effect,Clear"
|
|
bitfld.long 0x04 28. " I60 ,Interrupt clear for TCC = 60" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 27. " I59 ,Interrupt clear for TCC = 59" "No effect,Clear"
|
|
bitfld.long 0x04 26. " I58 ,Interrupt clear for TCC = 58" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 25. " I57 ,Interrupt clear for TCC = 57" "No effect,Clear"
|
|
bitfld.long 0x04 24. " I56 ,Interrupt clear for TCC = 56" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 23. " I55 ,Interrupt clear for TCC = 55" "No effect,Clear"
|
|
bitfld.long 0x04 22. " I54 ,Interrupt clear for TCC = 54" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 21. " I53 ,Interrupt clear for TCC = 53" "No effect,Clear"
|
|
bitfld.long 0x04 20. " I52 ,Interrupt clear for TCC = 52" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 19. " I51 ,Interrupt clear for TCC = 51" "No effect,Clear"
|
|
bitfld.long 0x04 18. " I50 ,Interrupt clear for TCC = 50" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 17. " I49 ,Interrupt clear for TCC = 49" "No effect,Clear"
|
|
bitfld.long 0x04 16. " I48 ,Interrupt clear for TCC = 48" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 15. " I47 ,Interrupt clear for TCC = 47" "No effect,Clear"
|
|
bitfld.long 0x04 14. " I46 ,Interrupt clear for TCC = 46" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 13. " I45 ,Interrupt clear for TCC = 45" "No effect,Clear"
|
|
bitfld.long 0x04 12. " I44 ,Interrupt clear for TCC = 44" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 11. " I43 ,Interrupt clear for TCC = 43" "No effect,Clear"
|
|
bitfld.long 0x04 10. " I42 ,Interrupt clear for TCC = 42" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 9. " I41 ,Interrupt clear for TCC = 41" "No effect,Clear"
|
|
bitfld.long 0x04 8. " I40 ,Interrupt clear for TCC = 40" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 7. " I39 ,Interrupt clear for TCC = 39" "No effect,Clear"
|
|
bitfld.long 0x04 6. " I38 ,Interrupt clear for TCC = 38" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 5. " I37 ,Interrupt clear for TCC = 37" "No effect,Clear"
|
|
bitfld.long 0x04 4. " I36 ,Interrupt clear for TCC = 36" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 3. " I35 ,Interrupt clear for TCC = 35" "No effect,Clear"
|
|
bitfld.long 0x04 2. " I34 ,Interrupt clear for TCC = 34" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x04 1. " I33 ,Interrupt clear for TCC = 33" "No effect,Clear"
|
|
bitfld.long 0x04 0. " I32 ,Interrupt clear for TCC = 32" "No effect,Clear"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "IEVAL,Interrupt Evaluate Register"
|
|
bitfld.long 0x00 0. " EVAL ,Interrupt evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "QDMA Registers"
|
|
width 7.
|
|
rgroup.long 0x80++0x3
|
|
line.long 0x00 "QER,QDMA Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA event for channel 7" "No effect,Prioritized"
|
|
bitfld.long 0x00 6. " E6 ,QDMA event for channel 6" "No effect,Prioritized"
|
|
bitfld.long 0x00 5. " E5 ,QDMA event for channel 5" "No effect,Prioritized"
|
|
bitfld.long 0x00 4. " E4 ,QDMA event for channel 4" "No effect,Prioritized"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA event for channel 3" "No effect,Prioritized"
|
|
bitfld.long 0x00 2. " E2 ,QDMA event for channel 2" "No effect,Prioritized"
|
|
bitfld.long 0x00 1. " E1 ,QDMA event for channel 1" "No effect,Prioritized"
|
|
bitfld.long 0x00 0. " E0 ,QDMA event for channel 0" "No effect,Prioritized"
|
|
width 7.
|
|
group.long 0x84++0x3
|
|
line.long 0x00 "QEER,QDMA Event Enable Register"
|
|
setclrfld.long 0x00 7. 0x08 7. 0x04 7. " E7_set/clr ,QDMA event enable for channel 7" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x08 6. 0x04 6. " E6_set/clr ,QDMA event enable for channel 6" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x08 5. 0x04 5. " E5_set/clr ,QDMA event enable for channel 5" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x08 4. 0x04 4. " E4_set/clr ,QDMA event enable for channel 4" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x08 3. 0x04 3. " E3_set/clr ,QDMA event enable for channel 3" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x08 2. 0x04 2. " E2_set/clr ,QDMA event enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x08 1. 0x04 1. " E1_set/clr ,QDMA event enable for channel 1" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x08 0. 0x04 0. " E0_set/clr ,QDMA event enable for channel 0" "Disabled,Enabled"
|
|
width 7.
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "QSER,QDMA Secondary Event Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event for channel 7" "Not stored,Stored"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event for channel 6" "Not stored,Stored"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event for channel 5" "Not stored,Stored"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event for channel 4" "Not stored,Stored"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event for channel 3" "Not stored,Stored"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event for channel 2" "Not stored,Stored"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event for channel 1" "Not stored,Stored"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event for channel 0" "Not stored,Stored"
|
|
wgroup.long 0x94++0x3
|
|
line.long 0x00 "QSECR,QDMA Secondary Event Clear Register"
|
|
bitfld.long 0x00 7. " E7 ,QDMA secondary event clear for channel 7" "No effect,Clear"
|
|
bitfld.long 0x00 6. " E6 ,QDMA secondary event clear for channel 6" "No effect,Clear"
|
|
bitfld.long 0x00 5. " E5 ,QDMA secondary event clear for channel 5" "No effect,Clear"
|
|
bitfld.long 0x00 4. " E4 ,QDMA secondary event clear for channel 4" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " E3 ,QDMA secondary event clear for channel 3" "No effect,Clear"
|
|
bitfld.long 0x00 2. " E2 ,QDMA secondary event clear for channel 2" "No effect,Clear"
|
|
bitfld.long 0x00 1. " E1 ,QDMA secondary event clear for channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 0. " E0 ,QDMA secondary event clear for channel 0" "No effect,Clear"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "EDMA3 Transfer Controller Registers"
|
|
tree "TC 0"
|
|
base asd:0x01c10000
|
|
width 7.
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "TCCFG,EDMA3TC Configuration Register"
|
|
bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..."
|
|
bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..."
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..."
|
|
endif
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register"
|
|
bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..."
|
|
bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy"
|
|
bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "RDRATE,Read Rate Register"
|
|
bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..."
|
|
tree "Error Registers"
|
|
width 9.
|
|
rgroup.long 0x120++0x7
|
|
line.long 0x00 "ERRSTAT,Error Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERREN,Error Enable Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled"
|
|
wgroup.long 0x128++0x3
|
|
line.long 0x00 "ERRCLR,Error Clear Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear"
|
|
rgroup.long 0x12c++0x3
|
|
line.long 0x00 "ERRDET,Error Details Register"
|
|
bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error"
|
|
wgroup.long 0x130++0x3
|
|
line.long 0x00 "ERRCMD,Error Interrupt Command Register"
|
|
bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "EDMA3TC Channel Registers"
|
|
width 11.
|
|
group.long 0x240++0x3 "Source Active Registers"
|
|
line.long 0x00 "SAOPT,Source Active Options Register"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long 0x244++0x1f
|
|
line.long 0x00 "SASRC,Source Active Source Address Register"
|
|
line.long 0x04 "SACNT,Source Active Count Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "SADST,Source Active Destination Address Register"
|
|
line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
line.long 0x14 "SACNTRLD,Source Active Count Reload Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value"
|
|
line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register"
|
|
line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register"
|
|
rgroup.long 0x280++0xb
|
|
line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value"
|
|
line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register"
|
|
line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register"
|
|
group.long 0x300++0x3 "Destination FIFO Registers"
|
|
line.long 0x00 "DFOPT0,Destination FIFO Options Register 0"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x300+0x4)++0x13
|
|
line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0"
|
|
line.long 0x04 "DFCNT0,Destination FIFO Count Register 0"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0"
|
|
line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x340++0x3
|
|
line.long 0x00 "DFOPT1,Destination FIFO Options Register 1"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x340+0x4)++0x13
|
|
line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1"
|
|
line.long 0x04 "DFCNT1,Destination FIFO Count Register 1"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1"
|
|
line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x380++0x3
|
|
line.long 0x00 "DFOPT2,Destination FIFO Options Register 2"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x380+0x4)++0x13
|
|
line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2"
|
|
line.long 0x04 "DFCNT2,Destination FIFO Count Register 2"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2"
|
|
line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x3C0++0x3
|
|
line.long 0x00 "DFOPT3,Destination FIFO Options Register 3"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x3C0+0x4)++0x13
|
|
line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3"
|
|
line.long 0x04 "DFCNT3,Destination FIFO Count Register 3"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3"
|
|
line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
width 0xb
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "TC 1"
|
|
base asd:0x01c10400
|
|
width 7.
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
endif
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "TCCFG,EDMA3TC Configuration Register"
|
|
bitfld.long 0x00 8.--9. " DREGDEPTH ,Destination register FIFO depth" "Reserved,Reserved,4 entry,?..."
|
|
bitfld.long 0x00 4.--5. " BUSWIDTH ,Bus width" "Reserved,64-bit,?..."
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..."
|
|
else
|
|
bitfld.long 0x00 0.--2. " FIFOSIZE ,FIFO size" "Reserved,Reserved,Reserved,256 byte,?..."
|
|
endif
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x00 "TCSTAT,EDMA3TC Channel Status Register"
|
|
bitfld.long 0x00 11.--12. " DFSTRTPTR ,Destination FIFO start pointer" "0,1,2,3"
|
|
bitfld.long 0x00 4.--6. " DSTACTV ,Destination active state" "Empty,1 TR,2 TRs,3 TRs,4 TRs,?..."
|
|
bitfld.long 0x00 2. " WSACTV ,Write status active" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SRCACTV ,Source active state" "Idle,Busy"
|
|
bitfld.long 0x00 0. " PROGBUSY ,Program register set busy" "Idle,Busy"
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "RDRATE,Read Rate Register"
|
|
bitfld.long 0x00 0.--2. " RDRATE ,Read rate - number of cycles between read commands" "0 cycles,4 cycles,8 cycles,16 cycles,32 cycles,?..."
|
|
tree "Error Registers"
|
|
width 9.
|
|
rgroup.long 0x120++0x7
|
|
line.long 0x00 "ERRSTAT,Error Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error" "Not detected,Detected"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error event" "Not detected,Detected"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error event" "Not detected,Detected"
|
|
group.long 0x124++0x03
|
|
line.long 0x00 "ERREN,Error Enable Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable" "Disabled,Enabled"
|
|
wgroup.long 0x128++0x3
|
|
line.long 0x00 "ERRCLR,Error Clear Register"
|
|
bitfld.long 0x00 3. " MMRAERR ,MMR address error interrupt enable clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " TRERR ,Transfer request error interrupt enable clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " BUSERR ,Bus error interrupt enable clear" "No effect,Clear"
|
|
rgroup.long 0x12c++0x3
|
|
line.long 0x00 "ERRDET,Error Details Register"
|
|
bitfld.long 0x00 17. " TCCHEN ,Transfer completion chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " TCINTEN ,Transfer completion interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " STAT ,Transaction status" "No error,Read error,Read error,Read error,Read error,Read error,Read error,Read error,Write error,Write error,Write error,Write error,Write error,Write error,Write error,Write error"
|
|
wgroup.long 0x130++0x3
|
|
line.long 0x00 "ERRCMD,Error Interrupt Command Register"
|
|
bitfld.long 0x00 0. " EVAL ,Error evaluate" "No effect,Pulse"
|
|
width 0xb
|
|
tree.end
|
|
tree "EDMA3TC Channel Registers"
|
|
width 11.
|
|
group.long 0x240++0x3 "Source Active Registers"
|
|
line.long 0x00 "SAOPT,Source Active Options Register"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long 0x244++0x1f
|
|
line.long 0x00 "SASRC,Source Active Source Address Register"
|
|
line.long 0x04 "SACNT,Source Active Count Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "SADST,Source Active Destination Address Register"
|
|
line.long 0x0c "SABIDX,Source Active Source B-Dimension Index Register"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "SAMPPRXY,Source Active Memory Protection Proxy Register"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
line.long 0x14 "SACNTRLD,Source Active Count Reload Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " ACNTRLD ,A-count reload value"
|
|
line.long 0x18 "SASRCBREF,Source Active Source Address B-Reference Register"
|
|
line.long 0x1c "SADSTBREF,Source Active Destination Address B-Reference Register"
|
|
rgroup.long 0x280++0xb
|
|
line.long 0x00 "DFCNTRLD,Destination FIFO Set Count Reload Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " ACNTRLD ,A-count reload value"
|
|
line.long 0x04 "DFSRCBREF,Destination FIFO Set Source Address B-Reference Register"
|
|
line.long 0x08 "DFDSTBREF,Destination FIFO Set Destination Address B-Reference Register"
|
|
group.long 0x300++0x3 "Destination FIFO Registers"
|
|
line.long 0x00 "DFOPT0,Destination FIFO Options Register 0"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x300+0x4)++0x13
|
|
line.long 0x00 "DFSRC0,Destination FIFO Source Address Register 0"
|
|
line.long 0x04 "DFCNT0,Destination FIFO Count Register 0"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST0,Destination FIFO Destination Address Register 0"
|
|
line.long 0x0c "DFBIDX0,Destination FIFO B-Dimension Index Register 0"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY0,Destination FIFO Memory Protection Proxy Register 0"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x340++0x3
|
|
line.long 0x00 "DFOPT1,Destination FIFO Options Register 1"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x340+0x4)++0x13
|
|
line.long 0x00 "DFSRC1,Destination FIFO Source Address Register 1"
|
|
line.long 0x04 "DFCNT1,Destination FIFO Count Register 1"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST1,Destination FIFO Destination Address Register 1"
|
|
line.long 0x0c "DFBIDX1,Destination FIFO B-Dimension Index Register 1"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY1,Destination FIFO Memory Protection Proxy Register 1"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x380++0x3
|
|
line.long 0x00 "DFOPT2,Destination FIFO Options Register 2"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x380+0x4)++0x13
|
|
line.long 0x00 "DFSRC2,Destination FIFO Source Address Register 2"
|
|
line.long 0x04 "DFCNT2,Destination FIFO Count Register 2"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST2,Destination FIFO Destination Address Register 2"
|
|
line.long 0x0c "DFBIDX2,Destination FIFO B-Dimension Index Register 2"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY2,Destination FIFO Memory Protection Proxy Register 2"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
group.long 0x3C0++0x3
|
|
line.long 0x00 "DFOPT3,Destination FIFO Options Register 3"
|
|
bitfld.long 0x00 22. " TCCHEN ,Transfer complete chaining enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " TCINTEN ,Transfer complete interrupt enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 12.--17. 1. " TCC ,Transfer complete code"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " FWID ,FIFO width" "8-bit,16-bit,32-bit,64-bit,128-bit,256-bit,?..."
|
|
bitfld.long 0x00 4.--6. " PRI ,Transfer priority" "Highest,1,2,3,4,5,6,Lowest"
|
|
bitfld.long 0x00 1. " DAM ,Destination address mode within an array" "INCR,CONST"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SAM ,Source address mode within an array" "INCR,CONST"
|
|
rgroup.long (0x3C0+0x4)++0x13
|
|
line.long 0x00 "DFSRC3,Destination FIFO Source Address Register 3"
|
|
line.long 0x04 "DFCNT3,Destination FIFO Count Register 3"
|
|
hexmask.long.word 0x04 16.--31. 1. " BCNT ,B dimension count"
|
|
hexmask.long.word 0x04 0.--15. 1. " ACNT ,A dimension count"
|
|
line.long 0x08 "DFDST3,Destination FIFO Destination Address Register 3"
|
|
line.long 0x0c "DFBIDX3,Destination FIFO B-Dimension Index Register 3"
|
|
hexmask.long.word 0x0c 16.--31. 1. " DSTBIDX ,B-Index offset between destination arrays"
|
|
hexmask.long.word 0x0c 0.--15. 1. " SRCBIDX ,B-Index offset between source arrays"
|
|
line.long 0x10 "DFMPPRXY3,Destination FIFO Memory Protection Proxy Register 3"
|
|
bitfld.long 0x10 8. " PRIV ,Privilege level" "User,Supervisor"
|
|
hexmask.long.byte 0x10 0.--3. 1. " PRIVID ,Privilege ID"
|
|
textline " "
|
|
width 0xb
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "GPIO (General-Purpose Input/Output)"
|
|
base asd:0x01c67000
|
|
width 8.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "BINTEN,GPIO Interrupt Per-Bank Enable Register"
|
|
bitfld.long 0x00 6. " EN6 ,Bank 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EN5 ,Bank 5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EN4 ,Bank 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EN3 ,Bank 3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EN2 ,Bank 2 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1 ,Bank 1 interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EN0 ,Bank 0 interrupt enable" "Disabled,Enabled"
|
|
width 16.
|
|
group.long 0x10++0x7 "GPIO Banks 0 and 1"
|
|
line.long 0x00 "DIR01,GPIO Banks 0 and 1 Direction Register"
|
|
bitfld.long 0x00 31. " DIR31 ,Pin 31 direction" "Output,Input"
|
|
bitfld.long 0x00 30. " DIR30 ,Pin 30 direction" "Output,Input"
|
|
bitfld.long 0x00 29. " DIR29 ,Pin 29 direction" "Output,Input"
|
|
bitfld.long 0x00 28. " DIR28 ,Pin 28 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DIR27 ,Pin 27 direction" "Output,Input"
|
|
bitfld.long 0x00 26. " DIR26 ,Pin 26 direction" "Output,Input"
|
|
bitfld.long 0x00 25. " DIR25 ,Pin 25 direction" "Output,Input"
|
|
bitfld.long 0x00 24. " DIR24 ,Pin 24 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR23 ,Pin 23 direction" "Output,Input"
|
|
bitfld.long 0x00 22. " DIR22 ,Pin 22 direction" "Output,Input"
|
|
bitfld.long 0x00 21. " DIR21 ,Pin 21 direction" "Output,Input"
|
|
bitfld.long 0x00 20. " DIR20 ,Pin 20 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DIR19 ,Pin 19 direction" "Output,Input"
|
|
bitfld.long 0x00 18. " DIR18 ,Pin 18 direction" "Output,Input"
|
|
bitfld.long 0x00 17. " DIR17 ,Pin 17 direction" "Output,Input"
|
|
bitfld.long 0x00 16. " DIR16 ,Pin 16 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR15 ,Pin 15 direction" "Output,Input"
|
|
bitfld.long 0x00 14. " DIR14 ,Pin 14 direction" "Output,Input"
|
|
bitfld.long 0x00 13. " DIR13 ,Pin 13 direction" "Output,Input"
|
|
bitfld.long 0x00 12. " DIR12 ,Pin 12 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DIR11 ,Pin 11 direction" "Output,Input"
|
|
bitfld.long 0x00 10. " DIR10 ,Pin 10 direction" "Output,Input"
|
|
bitfld.long 0x00 9. " DIR9 ,Pin 9 direction" "Output,Input"
|
|
bitfld.long 0x00 8. " DIR8 ,Pin 8 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR7 ,Pin 7 direction" "Output,Input"
|
|
bitfld.long 0x00 6. " DIR6 ,Pin 6 direction" "Output,Input"
|
|
bitfld.long 0x00 5. " DIR5 ,Pin 5 direction" "Output,Input"
|
|
bitfld.long 0x00 4. " DIR4 ,Pin 4 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIR3 ,Pin 3 direction" "Output,Input"
|
|
bitfld.long 0x00 2. " DIR2 ,Pin 2 direction" "Output,Input"
|
|
bitfld.long 0x00 1. " DIR1 ,Pin 1 direction" "Output,Input"
|
|
bitfld.long 0x00 0. " DIR0 ,Pin 0 direction" "Output,Input"
|
|
line.long 0x04 "OUT_DATA01,GPIO Banks 0 and 1 Output Data Register"
|
|
setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT31_set/clr ,Output drive state of GPIO pin 31" "Low,High"
|
|
setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT30_set/clr ,Output drive state of GPIO pin 30" "Low,High"
|
|
setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT29_set/clr ,Output drive state of GPIO pin 29" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT28_set/clr ,Output drive state of GPIO pin 28" "Low,High"
|
|
setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT27_set/clr ,Output drive state of GPIO pin 27" "Low,High"
|
|
setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT26_set/clr ,Output drive state of GPIO pin 26" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT25_set/clr ,Output drive state of GPIO pin 25" "Low,High"
|
|
setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT24_set/clr ,Output drive state of GPIO pin 24" "Low,High"
|
|
setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT23_set/clr ,Output drive state of GPIO pin 23" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT22_set/clr ,Output drive state of GPIO pin 22" "Low,High"
|
|
setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT21_set/clr ,Output drive state of GPIO pin 21" "Low,High"
|
|
setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT20_set/clr ,Output drive state of GPIO pin 20" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT19_set/clr ,Output drive state of GPIO pin 19" "Low,High"
|
|
setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT18_set/clr ,Output drive state of GPIO pin 18" "Low,High"
|
|
setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT17_set/clr ,Output drive state of GPIO pin 17" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT16_set/clr ,Output drive state of GPIO pin 16" "Low,High"
|
|
setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT15_set/clr ,Output drive state of GPIO pin 15" "Low,High"
|
|
setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT14_set/clr ,Output drive state of GPIO pin 14" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT13_set/clr ,Output drive state of GPIO pin 13" "Low,High"
|
|
setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT12_set/clr ,Output drive state of GPIO pin 12" "Low,High"
|
|
setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT11_set/clr ,Output drive state of GPIO pin 11" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT10_set/clr ,Output drive state of GPIO pin 10" "Low,High"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT9_set/clr ,Output drive state of GPIO pin 9" "Low,High"
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT8_set/clr ,Output drive state of GPIO pin 8" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT7_set/clr ,Output drive state of GPIO pin 7" "Low,High"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT6_set/clr ,Output drive state of GPIO pin 6" "Low,High"
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT5_set/clr ,Output drive state of GPIO pin 5" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT4_set/clr ,Output drive state of GPIO pin 4" "Low,High"
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT3_set/clr ,Output drive state of GPIO pin 3" "Low,High"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT2_set/clr ,Output drive state of GPIO pin 2" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT1_set/clr ,Output drive state of GPIO pin 1" "Low,High"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT0_set/clr ,Output drive state of GPIO pin 0" "Low,High"
|
|
group.long 0x20++0x17
|
|
line.long 0x00 "IN_DATA01,GPIO Banks 0 and 1 Input Data Register"
|
|
bitfld.long 0x00 31. " IN31 ,Status of GPIO pin 31" "Low,High"
|
|
bitfld.long 0x00 30. " IN30 ,Status of GPIO pin 30" "Low,High"
|
|
bitfld.long 0x00 29. " IN29 ,Status of GPIO pin 29" "Low,High"
|
|
bitfld.long 0x00 28. " IN28 ,Status of GPIO pin 28" "Low,High"
|
|
bitfld.long 0x00 27. " IN27 ,Status of GPIO pin 27" "Low,High"
|
|
bitfld.long 0x00 26. " IN26 ,Status of GPIO pin 26" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IN25 ,Status of GPIO pin 25" "Low,High"
|
|
bitfld.long 0x00 24. " IN24 ,Status of GPIO pin 24" "Low,High"
|
|
bitfld.long 0x00 23. " IN23 ,Status of GPIO pin 23" "Low,High"
|
|
bitfld.long 0x00 22. " IN22 ,Status of GPIO pin 22" "Low,High"
|
|
bitfld.long 0x00 21. " IN21 ,Status of GPIO pin 21" "Low,High"
|
|
bitfld.long 0x00 20. " IN20 ,Status of GPIO pin 20" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IN19 ,Status of GPIO pin 19" "Low,High"
|
|
bitfld.long 0x00 18. " IN18 ,Status of GPIO pin 18" "Low,High"
|
|
bitfld.long 0x00 17. " IN17 ,Status of GPIO pin 17" "Low,High"
|
|
bitfld.long 0x00 16. " IN16 ,Status of GPIO pin 16" "Low,High"
|
|
bitfld.long 0x00 15. " IN15 ,Status of GPIO pin 15" "Low,High"
|
|
bitfld.long 0x00 14. " IN14 ,Status of GPIO pin 14" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IN13 ,Status of GPIO pin 13" "Low,High"
|
|
bitfld.long 0x00 12. " IN12 ,Status of GPIO pin 12" "Low,High"
|
|
bitfld.long 0x00 11. " IN11 ,Status of GPIO pin 11" "Low,High"
|
|
bitfld.long 0x00 10. " IN10 ,Status of GPIO pin 10" "Low,High"
|
|
bitfld.long 0x00 9. " IN9 ,Status of GPIO pin 9" "Low,High"
|
|
bitfld.long 0x00 8. " IN8 ,Status of GPIO pin 8" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IN7 ,Status of GPIO pin 7" "Low,High"
|
|
bitfld.long 0x00 6. " IN6 ,Status of GPIO pin 6" "Low,High"
|
|
bitfld.long 0x00 5. " IN5 ,Status of GPIO pin 5" "Low,High"
|
|
bitfld.long 0x00 4. " IN4 ,Status of GPIO pin 4" "Low,High"
|
|
bitfld.long 0x00 3. " IN3 ,Status of GPIO pin 3" "Low,High"
|
|
bitfld.long 0x00 2. " IN2 ,Status of GPIO pin 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IN1 ,Status of GPIO pin 1" "Low,High"
|
|
bitfld.long 0x00 0. " IN0 ,Status of GPIO pin 0" "Low,High"
|
|
line.long 0x04 "SET_RIS_TRIG01,GPIO Banks 0 and 1 Set Rising Edge Interrupt Register"
|
|
bitfld.long 0x04 31. " SETRIS31 ,Enable rising edge interrupt detection on GPIO pin 31" "No effect,Enabled"
|
|
bitfld.long 0x04 30. " SETRIS30 ,Enable rising edge interrupt detection on GPIO pin 30" "No effect,Enabled"
|
|
bitfld.long 0x04 29. " SETRIS29 ,Enable rising edge interrupt detection on GPIO pin 29" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SETRIS28 ,Enable rising edge interrupt detection on GPIO pin 28" "No effect,Enabled"
|
|
bitfld.long 0x04 27. " SETRIS27 ,Enable rising edge interrupt detection on GPIO pin 27" "No effect,Enabled"
|
|
bitfld.long 0x04 26. " SETRIS26 ,Enable rising edge interrupt detection on GPIO pin 26" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SETRIS25 ,Enable rising edge interrupt detection on GPIO pin 25" "No effect,Enabled"
|
|
bitfld.long 0x04 24. " SETRIS24 ,Enable rising edge interrupt detection on GPIO pin 24" "No effect,Enabled"
|
|
bitfld.long 0x04 23. " SETRIS23 ,Enable rising edge interrupt detection on GPIO pin 23" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SETRIS22 ,Enable rising edge interrupt detection on GPIO pin 22" "No effect,Enabled"
|
|
bitfld.long 0x04 21. " SETRIS21 ,Enable rising edge interrupt detection on GPIO pin 21" "No effect,Enabled"
|
|
bitfld.long 0x04 20. " SETRIS20 ,Enable rising edge interrupt detection on GPIO pin 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SETRIS19 ,Enable rising edge interrupt detection on GPIO pin 19" "No effect,Enabled"
|
|
bitfld.long 0x04 18. " SETRIS18 ,Enable rising edge interrupt detection on GPIO pin 18" "No effect,Enabled"
|
|
bitfld.long 0x04 17. " SETRIS17 ,Enable rising edge interrupt detection on GPIO pin 17" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SETRIS16 ,Enable rising edge interrupt detection on GPIO pin 16" "No effect,Enabled"
|
|
bitfld.long 0x04 15. " SETRIS15 ,Enable rising edge interrupt detection on GPIO pin 15" "No effect,Enabled"
|
|
bitfld.long 0x04 14. " SETRIS14 ,Enable rising edge interrupt detection on GPIO pin 14" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SETRIS13 ,Enable rising edge interrupt detection on GPIO pin 13" "No effect,Enabled"
|
|
bitfld.long 0x04 12. " SETRIS12 ,Enable rising edge interrupt detection on GPIO pin 12" "No effect,Enabled"
|
|
bitfld.long 0x04 11. " SETRIS11 ,Enable rising edge interrupt detection on GPIO pin 11" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SETRIS10 ,Enable rising edge interrupt detection on GPIO pin 10" "No effect,Enabled"
|
|
bitfld.long 0x04 9. " SETRIS9 ,Enable rising edge interrupt detection on GPIO pin 9" "No effect,Enabled"
|
|
bitfld.long 0x04 8. " SETRIS8 ,Enable rising edge interrupt detection on GPIO pin 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SETRIS7 ,Enable rising edge interrupt detection on GPIO pin 7" "No effect,Enabled"
|
|
bitfld.long 0x04 6. " SETRIS6 ,Enable rising edge interrupt detection on GPIO pin 6" "No effect,Enabled"
|
|
bitfld.long 0x04 5. " SETRIS5 ,Enable rising edge interrupt detection on GPIO pin 5" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SETRIS4 ,Enable rising edge interrupt detection on GPIO pin 4" "No effect,Enabled"
|
|
bitfld.long 0x04 3. " SETRIS3 ,Enable rising edge interrupt detection on GPIO pin 3" "No effect,Enabled"
|
|
bitfld.long 0x04 2. " SETRIS2 ,Enable rising edge interrupt detection on GPIO pin 2" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SETRIS1 ,Enable rising edge interrupt detection on GPIO pin 1" "No effect,Enabled"
|
|
bitfld.long 0x04 0. " SETRIS0 ,Enable rising edge interrupt detection on GPIO pin 0" "No effect,Enabled"
|
|
line.long 0x08 "CLR_RIS_TRIG01,GPIO Banks 0 and 1 Clear Rising Edge Interrupt Register"
|
|
bitfld.long 0x08 31. " CLRRIS31 ,Disable rising edge interrupt detection on GPIO pin 31" "No effect,Disabled"
|
|
bitfld.long 0x08 30. " CLRRIS30 ,Disable rising edge interrupt detection on GPIO pin 30" "No effect,Disabled"
|
|
bitfld.long 0x08 29. " CLRRIS29 ,Disable rising edge interrupt detection on GPIO pin 29" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " CLRRIS28 ,Disable rising edge interrupt detection on GPIO pin 28" "No effect,Disabled"
|
|
bitfld.long 0x08 27. " CLRRIS27 ,Disable rising edge interrupt detection on GPIO pin 27" "No effect,Disabled"
|
|
bitfld.long 0x08 26. " CLRRIS26 ,Disable rising edge interrupt detection on GPIO pin 26" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " CLRRIS25 ,Disable rising edge interrupt detection on GPIO pin 25" "No effect,Disabled"
|
|
bitfld.long 0x08 24. " CLRRIS24 ,Disable rising edge interrupt detection on GPIO pin 24" "No effect,Disabled"
|
|
bitfld.long 0x08 23. " CLRRIS23 ,Disable rising edge interrupt detection on GPIO pin 23" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " CLRRIS22 ,Disable rising edge interrupt detection on GPIO pin 22" "No effect,Disabled"
|
|
bitfld.long 0x08 21. " CLRRIS21 ,Disable rising edge interrupt detection on GPIO pin 21" "No effect,Disabled"
|
|
bitfld.long 0x08 20. " CLRRIS20 ,Disable rising edge interrupt detection on GPIO pin 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CLRRIS19 ,Disable rising edge interrupt detection on GPIO pin 19" "No effect,Disabled"
|
|
bitfld.long 0x08 18. " CLRRIS18 ,Disable rising edge interrupt detection on GPIO pin 18" "No effect,Disabled"
|
|
bitfld.long 0x08 17. " CLRRIS17 ,Disable rising edge interrupt detection on GPIO pin 17" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " CLRRIS16 ,Disable rising edge interrupt detection on GPIO pin 16" "No effect,Disabled"
|
|
bitfld.long 0x08 15. " CLRRIS15 ,Disable rising edge interrupt detection on GPIO pin 15" "No effect,Disabled"
|
|
bitfld.long 0x08 14. " CLRRIS14 ,Disable rising edge interrupt detection on GPIO pin 14" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " CLRRIS13 ,Disable rising edge interrupt detection on GPIO pin 13" "No effect,Disabled"
|
|
bitfld.long 0x08 12. " CLRRIS12 ,Disable rising edge interrupt detection on GPIO pin 12" "No effect,Disabled"
|
|
bitfld.long 0x08 11. " CLRRIS11 ,Disable rising edge interrupt detection on GPIO pin 11" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " CLRRIS10 ,Disable rising edge interrupt detection on GPIO pin 10" "No effect,Disabled"
|
|
bitfld.long 0x08 9. " CLRRIS9 ,Disable rising edge interrupt detection on GPIO pin 9" "No effect,Disabled"
|
|
bitfld.long 0x08 8. " CLRRIS8 ,Disable rising edge interrupt detection on GPIO pin 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CLRRIS7 ,Disable rising edge interrupt detection on GPIO pin 7" "No effect,Disabled"
|
|
bitfld.long 0x08 6. " CLRRIS6 ,Disable rising edge interrupt detection on GPIO pin 6" "No effect,Disabled"
|
|
bitfld.long 0x08 5. " CLRRIS5 ,Disable rising edge interrupt detection on GPIO pin 5" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CLRRIS4 ,Disable rising edge interrupt detection on GPIO pin 4" "No effect,Disabled"
|
|
bitfld.long 0x08 3. " CLRRIS3 ,Disable rising edge interrupt detection on GPIO pin 3" "No effect,Disabled"
|
|
bitfld.long 0x08 2. " CLRRIS2 ,Disable rising edge interrupt detection on GPIO pin 2" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CLRRIS1 ,Disable rising edge interrupt detection on GPIO pin 1" "No effect,Disabled"
|
|
bitfld.long 0x08 0. " CLRRIS0 ,Disable rising edge interrupt detection on GPIO pin 0" "No effect,Disabled"
|
|
line.long 0x0c "SET_FAL_TRIG01,GPIO Banks 0 and 1 Set Falling Edge Interrupt Register"
|
|
bitfld.long 0x0c 31. " SETFAL31 ,Enable falling edge interrupt detection on GPIO pin 31" "No effect,Enabled"
|
|
bitfld.long 0x0c 30. " SETFAL30 ,Enable falling edge interrupt detection on GPIO pin 30" "No effect,Enabled"
|
|
bitfld.long 0x0c 29. " SETFAL29 ,Enable falling edge interrupt detection on GPIO pin 29" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " SETFAL28 ,Enable falling edge interrupt detection on GPIO pin 28" "No effect,Enabled"
|
|
bitfld.long 0x0c 27. " SETFAL27 ,Enable falling edge interrupt detection on GPIO pin 27" "No effect,Enabled"
|
|
bitfld.long 0x0c 26. " SETFAL26 ,Enable falling edge interrupt detection on GPIO pin 26" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SETFAL25 ,Enable falling edge interrupt detection on GPIO pin 25" "No effect,Enabled"
|
|
bitfld.long 0x0c 24. " SETFAL24 ,Enable falling edge interrupt detection on GPIO pin 24" "No effect,Enabled"
|
|
bitfld.long 0x0c 23. " SETFAL23 ,Enable falling edge interrupt detection on GPIO pin 23" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SETFAL22 ,Enable falling edge interrupt detection on GPIO pin 22" "No effect,Enabled"
|
|
bitfld.long 0x0c 21. " SETFAL21 ,Enable falling edge interrupt detection on GPIO pin 21" "No effect,Enabled"
|
|
bitfld.long 0x0c 20. " SETFAL20 ,Enable falling edge interrupt detection on GPIO pin 20" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SETFAL19 ,Enable falling edge interrupt detection on GPIO pin 19" "No effect,Enabled"
|
|
bitfld.long 0x0c 18. " SETFAL18 ,Enable falling edge interrupt detection on GPIO pin 18" "No effect,Enabled"
|
|
bitfld.long 0x0c 17. " SETFAL17 ,Enable falling edge interrupt detection on GPIO pin 17" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SETFAL16 ,Enable falling edge interrupt detection on GPIO pin 16" "No effect,Enabled"
|
|
bitfld.long 0x0c 15. " SETFAL15 ,Enable falling edge interrupt detection on GPIO pin 15" "No effect,Enabled"
|
|
bitfld.long 0x0c 14. " SETFAL14 ,Enable falling edge interrupt detection on GPIO pin 14" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " SETFAL13 ,Enable falling edge interrupt detection on GPIO pin 13" "No effect,Enabled"
|
|
bitfld.long 0x0c 12. " SETFAL12 ,Enable falling edge interrupt detection on GPIO pin 12" "No effect,Enabled"
|
|
bitfld.long 0x0c 11. " SETFAL11 ,Enable falling edge interrupt detection on GPIO pin 11" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " SETFAL10 ,Enable falling edge interrupt detection on GPIO pin 10" "No effect,Enabled"
|
|
bitfld.long 0x0c 9. " SETFAL9 ,Enable falling edge interrupt detection on GPIO pin 9" "No effect,Enabled"
|
|
bitfld.long 0x0c 8. " SETFAL8 ,Enable falling edge interrupt detection on GPIO pin 8" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SETFAL7 ,Enable falling edge interrupt detection on GPIO pin 7" "No effect,Enabled"
|
|
bitfld.long 0x0c 6. " SETFAL6 ,Enable falling edge interrupt detection on GPIO pin 6" "No effect,Enabled"
|
|
bitfld.long 0x0c 5. " SETFAL5 ,Enable falling edge interrupt detection on GPIO pin 5" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SETFAL4 ,Enable falling edge interrupt detection on GPIO pin 4" "No effect,Enabled"
|
|
bitfld.long 0x0c 3. " SETFAL3 ,Enable falling edge interrupt detection on GPIO pin 3" "No effect,Enabled"
|
|
bitfld.long 0x0c 2. " SETFAL2 ,Enable falling edge interrupt detection on GPIO pin 2" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SETFAL1 ,Enable falling edge interrupt detection on GPIO pin 1" "No effect,Enabled"
|
|
bitfld.long 0x0c 0. " SETFAL0 ,Enable falling edge interrupt detection on GPIO pin 0" "No effect,Enabled"
|
|
line.long 0x10 "CLR_FAL_TRIG01,GPIO Banks 0 and 1 Clear Falling Edge Interrupt Register"
|
|
bitfld.long 0x10 31. " CLRFAL31 ,Disable falling edge interrupt detection on GPIO pin 31" "No effect,Disabled"
|
|
bitfld.long 0x10 30. " CLRFAL30 ,Disable falling edge interrupt detection on GPIO pin 30" "No effect,Disabled"
|
|
bitfld.long 0x10 29. " CLRFAL29 ,Disable falling edge interrupt detection on GPIO pin 29" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " CLRFAL28 ,Disable falling edge interrupt detection on GPIO pin 28" "No effect,Disabled"
|
|
bitfld.long 0x10 27. " CLRFAL27 ,Disable falling edge interrupt detection on GPIO pin 27" "No effect,Disabled"
|
|
bitfld.long 0x10 26. " CLRFAL26 ,Disable falling edge interrupt detection on GPIO pin 26" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " CLRFAL25 ,Disable falling edge interrupt detection on GPIO pin 25" "No effect,Disabled"
|
|
bitfld.long 0x10 24. " CLRFAL24 ,Disable falling edge interrupt detection on GPIO pin 24" "No effect,Disabled"
|
|
bitfld.long 0x10 23. " CLRFAL23 ,Disable falling edge interrupt detection on GPIO pin 23" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " CLRFAL22 ,Disable falling edge interrupt detection on GPIO pin 22" "No effect,Disabled"
|
|
bitfld.long 0x10 21. " CLRFAL21 ,Disable falling edge interrupt detection on GPIO pin 21" "No effect,Disabled"
|
|
bitfld.long 0x10 20. " CLRFAL20 ,Disable falling edge interrupt detection on GPIO pin 20" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " CLRFAL19 ,Disable falling edge interrupt detection on GPIO pin 19" "No effect,Disabled"
|
|
bitfld.long 0x10 18. " CLRFAL18 ,Disable falling edge interrupt detection on GPIO pin 18" "No effect,Disabled"
|
|
bitfld.long 0x10 17. " CLRFAL17 ,Disable falling edge interrupt detection on GPIO pin 17" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CLRFAL16 ,Disable falling edge interrupt detection on GPIO pin 16" "No effect,Disabled"
|
|
bitfld.long 0x10 15. " CLRFAL15 ,Disable falling edge interrupt detection on GPIO pin 15" "No effect,Disabled"
|
|
bitfld.long 0x10 14. " CLRFAL14 ,Disable falling edge interrupt detection on GPIO pin 14" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " CLRFAL13 ,Disable falling edge interrupt detection on GPIO pin 13" "No effect,Disabled"
|
|
bitfld.long 0x10 12. " CLRFAL12 ,Disable falling edge interrupt detection on GPIO pin 12" "No effect,Disabled"
|
|
bitfld.long 0x10 11. " CLRFAL11 ,Disable falling edge interrupt detection on GPIO pin 11" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " CLRFAL10 ,Disable falling edge interrupt detection on GPIO pin 10" "No effect,Disabled"
|
|
bitfld.long 0x10 9. " CLRFAL9 ,Disable falling edge interrupt detection on GPIO pin 9" "No effect,Disabled"
|
|
bitfld.long 0x10 8. " CLRFAL8 ,Disable falling edge interrupt detection on GPIO pin 8" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " CLRFAL7 ,Disable falling edge interrupt detection on GPIO pin 7" "No effect,Disabled"
|
|
bitfld.long 0x10 6. " CLRFAL6 ,Disable falling edge interrupt detection on GPIO pin 6" "No effect,Disabled"
|
|
bitfld.long 0x10 5. " CLRFAL5 ,Disable falling edge interrupt detection on GPIO pin 5" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " CLRFAL4 ,Disable falling edge interrupt detection on GPIO pin 4" "No effect,Disabled"
|
|
bitfld.long 0x10 3. " CLRFAL3 ,Disable falling edge interrupt detection on GPIO pin 3" "No effect,Disabled"
|
|
bitfld.long 0x10 2. " CLRFAL2 ,Disable falling edge interrupt detection on GPIO pin 2" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CLRFAL1 ,Disable falling edge interrupt detection on GPIO pin 1" "No effect,Disabled"
|
|
bitfld.long 0x10 0. " CLRFAL0 ,Disable falling edge interrupt detection on GPIO pin 0" "No effect,Disabled"
|
|
line.long 0x14 "INTSTAT01,GPIO Banks 0 and 1 Interrupt Status Register"
|
|
eventfld.long 0x14 31. " STAT31 ,Interrupt status of GPIO pin 31" "Not pending,Pending"
|
|
eventfld.long 0x14 30. " STAT30 ,Interrupt status of GPIO pin 30" "Not pending,Pending"
|
|
eventfld.long 0x14 29. " STAT29 ,Interrupt status of GPIO pin 29" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 28. " STAT28 ,Interrupt status of GPIO pin 28" "Not pending,Pending"
|
|
eventfld.long 0x14 27. " STAT27 ,Interrupt status of GPIO pin 27" "Not pending,Pending"
|
|
eventfld.long 0x14 26. " STAT26 ,Interrupt status of GPIO pin 26" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 25. " STAT25 ,Interrupt status of GPIO pin 25" "Not pending,Pending"
|
|
eventfld.long 0x14 24. " STAT24 ,Interrupt status of GPIO pin 24" "Not pending,Pending"
|
|
eventfld.long 0x14 23. " STAT23 ,Interrupt status of GPIO pin 23" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 22. " STAT22 ,Interrupt status of GPIO pin 22" "Not pending,Pending"
|
|
eventfld.long 0x14 21. " STAT21 ,Interrupt status of GPIO pin 21" "Not pending,Pending"
|
|
eventfld.long 0x14 20. " STAT20 ,Interrupt status of GPIO pin 20" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 19. " STAT19 ,Interrupt status of GPIO pin 19" "Not pending,Pending"
|
|
eventfld.long 0x14 18. " STAT18 ,Interrupt status of GPIO pin 18" "Not pending,Pending"
|
|
eventfld.long 0x14 17. " STAT17 ,Interrupt status of GPIO pin 17" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 16. " STAT16 ,Interrupt status of GPIO pin 16" "Not pending,Pending"
|
|
eventfld.long 0x14 15. " STAT15 ,Interrupt status of GPIO pin 15" "Not pending,Pending"
|
|
eventfld.long 0x14 14. " STAT14 ,Interrupt status of GPIO pin 14" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 13. " STAT13 ,Interrupt status of GPIO pin 13" "Not pending,Pending"
|
|
eventfld.long 0x14 12. " STAT12 ,Interrupt status of GPIO pin 12" "Not pending,Pending"
|
|
eventfld.long 0x14 11. " STAT11 ,Interrupt status of GPIO pin 11" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 10. " STAT10 ,Interrupt status of GPIO pin 10" "Not pending,Pending"
|
|
eventfld.long 0x14 9. " STAT9 ,Interrupt status of GPIO pin 9" "Not pending,Pending"
|
|
eventfld.long 0x14 8. " STAT8 ,Interrupt status of GPIO pin 8" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 7. " STAT7 ,Interrupt status of GPIO pin 7" "Not pending,Pending"
|
|
eventfld.long 0x14 6. " STAT6 ,Interrupt status of GPIO pin 6" "Not pending,Pending"
|
|
eventfld.long 0x14 5. " STAT5 ,Interrupt status of GPIO pin 5" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 4. " STAT4 ,Interrupt status of GPIO pin 4" "Not pending,Pending"
|
|
eventfld.long 0x14 3. " STAT3 ,Interrupt status of GPIO pin 3" "Not pending,Pending"
|
|
eventfld.long 0x14 2. " STAT2 ,Interrupt status of GPIO pin 2" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 1. " STAT1 ,Interrupt status of GPIO pin 1" "Not pending,Pending"
|
|
eventfld.long 0x14 0. " STAT0 ,Interrupt status of GPIO pin 0" "Not pending,Pending"
|
|
group.long 0x38++0x7 "GPIO Banks 2 and 3"
|
|
line.long 0x00 "DIR23,GPIO Banks 2 and 3 Direction Register"
|
|
bitfld.long 0x00 31. " DIR63 ,Pin 63 direction" "Output,Input"
|
|
bitfld.long 0x00 30. " DIR62 ,Pin 62 direction" "Output,Input"
|
|
bitfld.long 0x00 29. " DIR61 ,Pin 61 direction" "Output,Input"
|
|
bitfld.long 0x00 28. " DIR60 ,Pin 60 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DIR59 ,Pin 59 direction" "Output,Input"
|
|
bitfld.long 0x00 26. " DIR58 ,Pin 58 direction" "Output,Input"
|
|
bitfld.long 0x00 25. " DIR57 ,Pin 57 direction" "Output,Input"
|
|
bitfld.long 0x00 24. " DIR56 ,Pin 56 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR55 ,Pin 55 direction" "Output,Input"
|
|
bitfld.long 0x00 22. " DIR54 ,Pin 54 direction" "Output,Input"
|
|
bitfld.long 0x00 21. " DIR53 ,Pin 53 direction" "Output,Input"
|
|
bitfld.long 0x00 20. " DIR52 ,Pin 52 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DIR51 ,Pin 51 direction" "Output,Input"
|
|
bitfld.long 0x00 18. " DIR50 ,Pin 50 direction" "Output,Input"
|
|
bitfld.long 0x00 17. " DIR49 ,Pin 49 direction" "Output,Input"
|
|
bitfld.long 0x00 16. " DIR48 ,Pin 48 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR47 ,Pin 47 direction" "Output,Input"
|
|
bitfld.long 0x00 14. " DIR46 ,Pin 46 direction" "Output,Input"
|
|
bitfld.long 0x00 13. " DIR45 ,Pin 45 direction" "Output,Input"
|
|
bitfld.long 0x00 12. " DIR44 ,Pin 44 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DIR43 ,Pin 43 direction" "Output,Input"
|
|
bitfld.long 0x00 10. " DIR42 ,Pin 42 direction" "Output,Input"
|
|
bitfld.long 0x00 9. " DIR41 ,Pin 41 direction" "Output,Input"
|
|
bitfld.long 0x00 8. " DIR40 ,Pin 40 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR39 ,Pin 39 direction" "Output,Input"
|
|
bitfld.long 0x00 6. " DIR38 ,Pin 38 direction" "Output,Input"
|
|
bitfld.long 0x00 5. " DIR37 ,Pin 37 direction" "Output,Input"
|
|
bitfld.long 0x00 4. " DIR36 ,Pin 36 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIR35 ,Pin 35 direction" "Output,Input"
|
|
bitfld.long 0x00 2. " DIR34 ,Pin 34 direction" "Output,Input"
|
|
bitfld.long 0x00 1. " DIR33 ,Pin 33 direction" "Output,Input"
|
|
bitfld.long 0x00 0. " DIR32 ,Pin 32 direction" "Output,Input"
|
|
line.long 0x04 "OUT_DATA23,GPIO Banks 2 and 3 Output Data Register"
|
|
setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT63_set/clr ,Output drive state of GPIO pin 63" "Low,High"
|
|
setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT62_set/clr ,Output drive state of GPIO pin 62" "Low,High"
|
|
setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT61_set/clr ,Output drive state of GPIO pin 61" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT60_set/clr ,Output drive state of GPIO pin 60" "Low,High"
|
|
setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT59_set/clr ,Output drive state of GPIO pin 59" "Low,High"
|
|
setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT58_set/clr ,Output drive state of GPIO pin 58" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT57_set/clr ,Output drive state of GPIO pin 57" "Low,High"
|
|
setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT56_set/clr ,Output drive state of GPIO pin 56" "Low,High"
|
|
setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT55_set/clr ,Output drive state of GPIO pin 55" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT54_set/clr ,Output drive state of GPIO pin 54" "Low,High"
|
|
setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT53_set/clr ,Output drive state of GPIO pin 53" "Low,High"
|
|
setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT52_set/clr ,Output drive state of GPIO pin 52" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT51_set/clr ,Output drive state of GPIO pin 51" "Low,High"
|
|
setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT50_set/clr ,Output drive state of GPIO pin 50" "Low,High"
|
|
setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT49_set/clr ,Output drive state of GPIO pin 49" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT48_set/clr ,Output drive state of GPIO pin 48" "Low,High"
|
|
setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT47_set/clr ,Output drive state of GPIO pin 47" "Low,High"
|
|
setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT46_set/clr ,Output drive state of GPIO pin 46" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT45_set/clr ,Output drive state of GPIO pin 45" "Low,High"
|
|
setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT44_set/clr ,Output drive state of GPIO pin 44" "Low,High"
|
|
setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT43_set/clr ,Output drive state of GPIO pin 43" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT42_set/clr ,Output drive state of GPIO pin 42" "Low,High"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT41_set/clr ,Output drive state of GPIO pin 41" "Low,High"
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT40_set/clr ,Output drive state of GPIO pin 40" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT39_set/clr ,Output drive state of GPIO pin 39" "Low,High"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT38_set/clr ,Output drive state of GPIO pin 38" "Low,High"
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT37_set/clr ,Output drive state of GPIO pin 37" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT36_set/clr ,Output drive state of GPIO pin 36" "Low,High"
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT35_set/clr ,Output drive state of GPIO pin 35" "Low,High"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT34_set/clr ,Output drive state of GPIO pin 34" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT33_set/clr ,Output drive state of GPIO pin 33" "Low,High"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT32_set/clr ,Output drive state of GPIO pin 32" "Low,High"
|
|
group.long 0x48++0x17
|
|
line.long 0x00 "IN_DATA23,GPIO Banks 2 and 3 Input Data Register"
|
|
bitfld.long 0x00 31. " IN63 ,Status of GPIO pin 63" "Low,High"
|
|
bitfld.long 0x00 30. " IN62 ,Status of GPIO pin 62" "Low,High"
|
|
bitfld.long 0x00 29. " IN61 ,Status of GPIO pin 61" "Low,High"
|
|
bitfld.long 0x00 28. " IN60 ,Status of GPIO pin 60" "Low,High"
|
|
bitfld.long 0x00 27. " IN59 ,Status of GPIO pin 59" "Low,High"
|
|
bitfld.long 0x00 26. " IN58 ,Status of GPIO pin 58" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IN57 ,Status of GPIO pin 57" "Low,High"
|
|
bitfld.long 0x00 24. " IN56 ,Status of GPIO pin 56" "Low,High"
|
|
bitfld.long 0x00 23. " IN55 ,Status of GPIO pin 55" "Low,High"
|
|
bitfld.long 0x00 22. " IN54 ,Status of GPIO pin 54" "Low,High"
|
|
bitfld.long 0x00 21. " IN53 ,Status of GPIO pin 53" "Low,High"
|
|
bitfld.long 0x00 20. " IN52 ,Status of GPIO pin 52" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IN51 ,Status of GPIO pin 51" "Low,High"
|
|
bitfld.long 0x00 18. " IN50 ,Status of GPIO pin 50" "Low,High"
|
|
bitfld.long 0x00 17. " IN49 ,Status of GPIO pin 49" "Low,High"
|
|
bitfld.long 0x00 16. " IN48 ,Status of GPIO pin 48" "Low,High"
|
|
bitfld.long 0x00 15. " IN47 ,Status of GPIO pin 47" "Low,High"
|
|
bitfld.long 0x00 14. " IN46 ,Status of GPIO pin 46" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IN45 ,Status of GPIO pin 45" "Low,High"
|
|
bitfld.long 0x00 12. " IN44 ,Status of GPIO pin 44" "Low,High"
|
|
bitfld.long 0x00 11. " IN43 ,Status of GPIO pin 43" "Low,High"
|
|
bitfld.long 0x00 10. " IN42 ,Status of GPIO pin 42" "Low,High"
|
|
bitfld.long 0x00 9. " IN41 ,Status of GPIO pin 41" "Low,High"
|
|
bitfld.long 0x00 8. " IN40 ,Status of GPIO pin 40" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IN39 ,Status of GPIO pin 39" "Low,High"
|
|
bitfld.long 0x00 6. " IN38 ,Status of GPIO pin 38" "Low,High"
|
|
bitfld.long 0x00 5. " IN37 ,Status of GPIO pin 37" "Low,High"
|
|
bitfld.long 0x00 4. " IN36 ,Status of GPIO pin 36" "Low,High"
|
|
bitfld.long 0x00 3. " IN35 ,Status of GPIO pin 35" "Low,High"
|
|
bitfld.long 0x00 2. " IN34 ,Status of GPIO pin 34" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IN33 ,Status of GPIO pin 33" "Low,High"
|
|
bitfld.long 0x00 0. " IN32 ,Status of GPIO pin 32" "Low,High"
|
|
line.long 0x04 "SET_RIS_TRIG23,GPIO Banks 2 and 3 Set Rising Edge Interrupt Register"
|
|
bitfld.long 0x04 31. " SETRIS63 ,Enable rising edge interrupt detection on GPIO pin 63" "No effect,Enabled"
|
|
bitfld.long 0x04 30. " SETRIS62 ,Enable rising edge interrupt detection on GPIO pin 62" "No effect,Enabled"
|
|
bitfld.long 0x04 29. " SETRIS61 ,Enable rising edge interrupt detection on GPIO pin 61" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SETRIS60 ,Enable rising edge interrupt detection on GPIO pin 60" "No effect,Enabled"
|
|
bitfld.long 0x04 27. " SETRIS59 ,Enable rising edge interrupt detection on GPIO pin 59" "No effect,Enabled"
|
|
bitfld.long 0x04 26. " SETRIS58 ,Enable rising edge interrupt detection on GPIO pin 58" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SETRIS57 ,Enable rising edge interrupt detection on GPIO pin 57" "No effect,Enabled"
|
|
bitfld.long 0x04 24. " SETRIS56 ,Enable rising edge interrupt detection on GPIO pin 56" "No effect,Enabled"
|
|
bitfld.long 0x04 23. " SETRIS55 ,Enable rising edge interrupt detection on GPIO pin 55" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SETRIS54 ,Enable rising edge interrupt detection on GPIO pin 54" "No effect,Enabled"
|
|
bitfld.long 0x04 21. " SETRIS53 ,Enable rising edge interrupt detection on GPIO pin 53" "No effect,Enabled"
|
|
bitfld.long 0x04 20. " SETRIS52 ,Enable rising edge interrupt detection on GPIO pin 52" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SETRIS51 ,Enable rising edge interrupt detection on GPIO pin 51" "No effect,Enabled"
|
|
bitfld.long 0x04 18. " SETRIS50 ,Enable rising edge interrupt detection on GPIO pin 50" "No effect,Enabled"
|
|
bitfld.long 0x04 17. " SETRIS49 ,Enable rising edge interrupt detection on GPIO pin 49" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SETRIS48 ,Enable rising edge interrupt detection on GPIO pin 48" "No effect,Enabled"
|
|
bitfld.long 0x04 15. " SETRIS47 ,Enable rising edge interrupt detection on GPIO pin 47" "No effect,Enabled"
|
|
bitfld.long 0x04 14. " SETRIS46 ,Enable rising edge interrupt detection on GPIO pin 46" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SETRIS45 ,Enable rising edge interrupt detection on GPIO pin 45" "No effect,Enabled"
|
|
bitfld.long 0x04 12. " SETRIS44 ,Enable rising edge interrupt detection on GPIO pin 44" "No effect,Enabled"
|
|
bitfld.long 0x04 11. " SETRIS43 ,Enable rising edge interrupt detection on GPIO pin 43" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SETRIS42 ,Enable rising edge interrupt detection on GPIO pin 42" "No effect,Enabled"
|
|
bitfld.long 0x04 9. " SETRIS41 ,Enable rising edge interrupt detection on GPIO pin 41" "No effect,Enabled"
|
|
bitfld.long 0x04 8. " SETRIS40 ,Enable rising edge interrupt detection on GPIO pin 40" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SETRIS39 ,Enable rising edge interrupt detection on GPIO pin 39" "No effect,Enabled"
|
|
bitfld.long 0x04 6. " SETRIS38 ,Enable rising edge interrupt detection on GPIO pin 38" "No effect,Enabled"
|
|
bitfld.long 0x04 5. " SETRIS37 ,Enable rising edge interrupt detection on GPIO pin 37" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SETRIS36 ,Enable rising edge interrupt detection on GPIO pin 36" "No effect,Enabled"
|
|
bitfld.long 0x04 3. " SETRIS35 ,Enable rising edge interrupt detection on GPIO pin 35" "No effect,Enabled"
|
|
bitfld.long 0x04 2. " SETRIS34 ,Enable rising edge interrupt detection on GPIO pin 34" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SETRIS33 ,Enable rising edge interrupt detection on GPIO pin 33" "No effect,Enabled"
|
|
bitfld.long 0x04 0. " SETRIS32 ,Enable rising edge interrupt detection on GPIO pin 32" "No effect,Enabled"
|
|
line.long 0x08 "CLR_RIS_TRIG23,GPIO Banks 2 and 3 Clear Rising Edge Interrupt Register"
|
|
bitfld.long 0x08 31. " CLRRIS63 ,Disable rising edge interrupt detection on GPIO pin 63" "No effect,Disabled"
|
|
bitfld.long 0x08 30. " CLRRIS62 ,Disable rising edge interrupt detection on GPIO pin 62" "No effect,Disabled"
|
|
bitfld.long 0x08 29. " CLRRIS61 ,Disable rising edge interrupt detection on GPIO pin 61" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " CLRRIS60 ,Disable rising edge interrupt detection on GPIO pin 60" "No effect,Disabled"
|
|
bitfld.long 0x08 27. " CLRRIS59 ,Disable rising edge interrupt detection on GPIO pin 59" "No effect,Disabled"
|
|
bitfld.long 0x08 26. " CLRRIS58 ,Disable rising edge interrupt detection on GPIO pin 58" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " CLRRIS57 ,Disable rising edge interrupt detection on GPIO pin 57" "No effect,Disabled"
|
|
bitfld.long 0x08 24. " CLRRIS56 ,Disable rising edge interrupt detection on GPIO pin 56" "No effect,Disabled"
|
|
bitfld.long 0x08 23. " CLRRIS55 ,Disable rising edge interrupt detection on GPIO pin 55" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " CLRRIS54 ,Disable rising edge interrupt detection on GPIO pin 54" "No effect,Disabled"
|
|
bitfld.long 0x08 21. " CLRRIS53 ,Disable rising edge interrupt detection on GPIO pin 53" "No effect,Disabled"
|
|
bitfld.long 0x08 20. " CLRRIS52 ,Disable rising edge interrupt detection on GPIO pin 52" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CLRRIS51 ,Disable rising edge interrupt detection on GPIO pin 51" "No effect,Disabled"
|
|
bitfld.long 0x08 18. " CLRRIS50 ,Disable rising edge interrupt detection on GPIO pin 50" "No effect,Disabled"
|
|
bitfld.long 0x08 17. " CLRRIS49 ,Disable rising edge interrupt detection on GPIO pin 49" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " CLRRIS48 ,Disable rising edge interrupt detection on GPIO pin 48" "No effect,Disabled"
|
|
bitfld.long 0x08 15. " CLRRIS47 ,Disable rising edge interrupt detection on GPIO pin 47" "No effect,Disabled"
|
|
bitfld.long 0x08 14. " CLRRIS46 ,Disable rising edge interrupt detection on GPIO pin 46" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " CLRRIS45 ,Disable rising edge interrupt detection on GPIO pin 45" "No effect,Disabled"
|
|
bitfld.long 0x08 12. " CLRRIS44 ,Disable rising edge interrupt detection on GPIO pin 44" "No effect,Disabled"
|
|
bitfld.long 0x08 11. " CLRRIS43 ,Disable rising edge interrupt detection on GPIO pin 43" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " CLRRIS42 ,Disable rising edge interrupt detection on GPIO pin 42" "No effect,Disabled"
|
|
bitfld.long 0x08 9. " CLRRIS41 ,Disable rising edge interrupt detection on GPIO pin 41" "No effect,Disabled"
|
|
bitfld.long 0x08 8. " CLRRIS40 ,Disable rising edge interrupt detection on GPIO pin 40" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CLRRIS39 ,Disable rising edge interrupt detection on GPIO pin 39" "No effect,Disabled"
|
|
bitfld.long 0x08 6. " CLRRIS38 ,Disable rising edge interrupt detection on GPIO pin 38" "No effect,Disabled"
|
|
bitfld.long 0x08 5. " CLRRIS37 ,Disable rising edge interrupt detection on GPIO pin 37" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CLRRIS36 ,Disable rising edge interrupt detection on GPIO pin 36" "No effect,Disabled"
|
|
bitfld.long 0x08 3. " CLRRIS35 ,Disable rising edge interrupt detection on GPIO pin 35" "No effect,Disabled"
|
|
bitfld.long 0x08 2. " CLRRIS34 ,Disable rising edge interrupt detection on GPIO pin 34" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CLRRIS33 ,Disable rising edge interrupt detection on GPIO pin 33" "No effect,Disabled"
|
|
bitfld.long 0x08 0. " CLRRIS32 ,Disable rising edge interrupt detection on GPIO pin 32" "No effect,Disabled"
|
|
line.long 0x0c "SET_FAL_TRIG23,GPIO Banks 2 and 3 Set Falling Edge Interrupt Register"
|
|
bitfld.long 0x0c 31. " SETFAL63 ,Enable falling edge interrupt detection on GPIO pin 63" "No effect,Enabled"
|
|
bitfld.long 0x0c 30. " SETFAL62 ,Enable falling edge interrupt detection on GPIO pin 62" "No effect,Enabled"
|
|
bitfld.long 0x0c 29. " SETFAL61 ,Enable falling edge interrupt detection on GPIO pin 61" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " SETFAL60 ,Enable falling edge interrupt detection on GPIO pin 60" "No effect,Enabled"
|
|
bitfld.long 0x0c 27. " SETFAL59 ,Enable falling edge interrupt detection on GPIO pin 59" "No effect,Enabled"
|
|
bitfld.long 0x0c 26. " SETFAL58 ,Enable falling edge interrupt detection on GPIO pin 58" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SETFAL57 ,Enable falling edge interrupt detection on GPIO pin 57" "No effect,Enabled"
|
|
bitfld.long 0x0c 24. " SETFAL56 ,Enable falling edge interrupt detection on GPIO pin 56" "No effect,Enabled"
|
|
bitfld.long 0x0c 23. " SETFAL55 ,Enable falling edge interrupt detection on GPIO pin 55" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SETFAL54 ,Enable falling edge interrupt detection on GPIO pin 54" "No effect,Enabled"
|
|
bitfld.long 0x0c 21. " SETFAL53 ,Enable falling edge interrupt detection on GPIO pin 53" "No effect,Enabled"
|
|
bitfld.long 0x0c 20. " SETFAL52 ,Enable falling edge interrupt detection on GPIO pin 52" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SETFAL51 ,Enable falling edge interrupt detection on GPIO pin 51" "No effect,Enabled"
|
|
bitfld.long 0x0c 18. " SETFAL50 ,Enable falling edge interrupt detection on GPIO pin 50" "No effect,Enabled"
|
|
bitfld.long 0x0c 17. " SETFAL49 ,Enable falling edge interrupt detection on GPIO pin 49" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SETFAL48 ,Enable falling edge interrupt detection on GPIO pin 48" "No effect,Enabled"
|
|
bitfld.long 0x0c 15. " SETFAL47 ,Enable falling edge interrupt detection on GPIO pin 47" "No effect,Enabled"
|
|
bitfld.long 0x0c 14. " SETFAL46 ,Enable falling edge interrupt detection on GPIO pin 46" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " SETFAL45 ,Enable falling edge interrupt detection on GPIO pin 45" "No effect,Enabled"
|
|
bitfld.long 0x0c 12. " SETFAL44 ,Enable falling edge interrupt detection on GPIO pin 44" "No effect,Enabled"
|
|
bitfld.long 0x0c 11. " SETFAL43 ,Enable falling edge interrupt detection on GPIO pin 43" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " SETFAL42 ,Enable falling edge interrupt detection on GPIO pin 42" "No effect,Enabled"
|
|
bitfld.long 0x0c 9. " SETFAL41 ,Enable falling edge interrupt detection on GPIO pin 41" "No effect,Enabled"
|
|
bitfld.long 0x0c 8. " SETFAL40 ,Enable falling edge interrupt detection on GPIO pin 40" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SETFAL39 ,Enable falling edge interrupt detection on GPIO pin 39" "No effect,Enabled"
|
|
bitfld.long 0x0c 6. " SETFAL38 ,Enable falling edge interrupt detection on GPIO pin 38" "No effect,Enabled"
|
|
bitfld.long 0x0c 5. " SETFAL37 ,Enable falling edge interrupt detection on GPIO pin 37" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SETFAL36 ,Enable falling edge interrupt detection on GPIO pin 36" "No effect,Enabled"
|
|
bitfld.long 0x0c 3. " SETFAL35 ,Enable falling edge interrupt detection on GPIO pin 35" "No effect,Enabled"
|
|
bitfld.long 0x0c 2. " SETFAL34 ,Enable falling edge interrupt detection on GPIO pin 34" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SETFAL33 ,Enable falling edge interrupt detection on GPIO pin 33" "No effect,Enabled"
|
|
bitfld.long 0x0c 0. " SETFAL32 ,Enable falling edge interrupt detection on GPIO pin 32" "No effect,Enabled"
|
|
line.long 0x10 "CLR_FAL_TRIG23,GPIO Banks 2 and 3 Clear Falling Edge Interrupt Register"
|
|
bitfld.long 0x10 31. " CLRFAL63 ,Disable falling edge interrupt detection on GPIO pin 63" "No effect,Disabled"
|
|
bitfld.long 0x10 30. " CLRFAL62 ,Disable falling edge interrupt detection on GPIO pin 62" "No effect,Disabled"
|
|
bitfld.long 0x10 29. " CLRFAL61 ,Disable falling edge interrupt detection on GPIO pin 61" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " CLRFAL60 ,Disable falling edge interrupt detection on GPIO pin 60" "No effect,Disabled"
|
|
bitfld.long 0x10 27. " CLRFAL59 ,Disable falling edge interrupt detection on GPIO pin 59" "No effect,Disabled"
|
|
bitfld.long 0x10 26. " CLRFAL58 ,Disable falling edge interrupt detection on GPIO pin 58" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " CLRFAL57 ,Disable falling edge interrupt detection on GPIO pin 57" "No effect,Disabled"
|
|
bitfld.long 0x10 24. " CLRFAL56 ,Disable falling edge interrupt detection on GPIO pin 56" "No effect,Disabled"
|
|
bitfld.long 0x10 23. " CLRFAL55 ,Disable falling edge interrupt detection on GPIO pin 55" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " CLRFAL54 ,Disable falling edge interrupt detection on GPIO pin 54" "No effect,Disabled"
|
|
bitfld.long 0x10 21. " CLRFAL53 ,Disable falling edge interrupt detection on GPIO pin 53" "No effect,Disabled"
|
|
bitfld.long 0x10 20. " CLRFAL52 ,Disable falling edge interrupt detection on GPIO pin 52" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " CLRFAL51 ,Disable falling edge interrupt detection on GPIO pin 51" "No effect,Disabled"
|
|
bitfld.long 0x10 18. " CLRFAL50 ,Disable falling edge interrupt detection on GPIO pin 50" "No effect,Disabled"
|
|
bitfld.long 0x10 17. " CLRFAL49 ,Disable falling edge interrupt detection on GPIO pin 49" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CLRFAL48 ,Disable falling edge interrupt detection on GPIO pin 48" "No effect,Disabled"
|
|
bitfld.long 0x10 15. " CLRFAL47 ,Disable falling edge interrupt detection on GPIO pin 47" "No effect,Disabled"
|
|
bitfld.long 0x10 14. " CLRFAL46 ,Disable falling edge interrupt detection on GPIO pin 46" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " CLRFAL45 ,Disable falling edge interrupt detection on GPIO pin 45" "No effect,Disabled"
|
|
bitfld.long 0x10 12. " CLRFAL44 ,Disable falling edge interrupt detection on GPIO pin 44" "No effect,Disabled"
|
|
bitfld.long 0x10 11. " CLRFAL43 ,Disable falling edge interrupt detection on GPIO pin 43" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " CLRFAL42 ,Disable falling edge interrupt detection on GPIO pin 42" "No effect,Disabled"
|
|
bitfld.long 0x10 9. " CLRFAL41 ,Disable falling edge interrupt detection on GPIO pin 41" "No effect,Disabled"
|
|
bitfld.long 0x10 8. " CLRFAL40 ,Disable falling edge interrupt detection on GPIO pin 40" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " CLRFAL39 ,Disable falling edge interrupt detection on GPIO pin 39" "No effect,Disabled"
|
|
bitfld.long 0x10 6. " CLRFAL38 ,Disable falling edge interrupt detection on GPIO pin 38" "No effect,Disabled"
|
|
bitfld.long 0x10 5. " CLRFAL37 ,Disable falling edge interrupt detection on GPIO pin 37" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " CLRFAL36 ,Disable falling edge interrupt detection on GPIO pin 36" "No effect,Disabled"
|
|
bitfld.long 0x10 3. " CLRFAL35 ,Disable falling edge interrupt detection on GPIO pin 35" "No effect,Disabled"
|
|
bitfld.long 0x10 2. " CLRFAL34 ,Disable falling edge interrupt detection on GPIO pin 34" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CLRFAL33 ,Disable falling edge interrupt detection on GPIO pin 33" "No effect,Disabled"
|
|
bitfld.long 0x10 0. " CLRFAL32 ,Disable falling edge interrupt detection on GPIO pin 32" "No effect,Disabled"
|
|
line.long 0x14 "INTSTAT23,GPIO Banks 2 and 3 Interrupt Status Register"
|
|
eventfld.long 0x14 31. " STAT63 ,Interrupt status of GPIO pin 63" "Not pending,Pending"
|
|
eventfld.long 0x14 30. " STAT62 ,Interrupt status of GPIO pin 62" "Not pending,Pending"
|
|
eventfld.long 0x14 29. " STAT61 ,Interrupt status of GPIO pin 61" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 28. " STAT60 ,Interrupt status of GPIO pin 60" "Not pending,Pending"
|
|
eventfld.long 0x14 27. " STAT59 ,Interrupt status of GPIO pin 59" "Not pending,Pending"
|
|
eventfld.long 0x14 26. " STAT58 ,Interrupt status of GPIO pin 58" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 25. " STAT57 ,Interrupt status of GPIO pin 57" "Not pending,Pending"
|
|
eventfld.long 0x14 24. " STAT56 ,Interrupt status of GPIO pin 56" "Not pending,Pending"
|
|
eventfld.long 0x14 23. " STAT55 ,Interrupt status of GPIO pin 55" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 22. " STAT54 ,Interrupt status of GPIO pin 54" "Not pending,Pending"
|
|
eventfld.long 0x14 21. " STAT53 ,Interrupt status of GPIO pin 53" "Not pending,Pending"
|
|
eventfld.long 0x14 20. " STAT52 ,Interrupt status of GPIO pin 52" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 19. " STAT51 ,Interrupt status of GPIO pin 51" "Not pending,Pending"
|
|
eventfld.long 0x14 18. " STAT50 ,Interrupt status of GPIO pin 50" "Not pending,Pending"
|
|
eventfld.long 0x14 17. " STAT49 ,Interrupt status of GPIO pin 49" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 16. " STAT48 ,Interrupt status of GPIO pin 48" "Not pending,Pending"
|
|
eventfld.long 0x14 15. " STAT47 ,Interrupt status of GPIO pin 47" "Not pending,Pending"
|
|
eventfld.long 0x14 14. " STAT46 ,Interrupt status of GPIO pin 46" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 13. " STAT45 ,Interrupt status of GPIO pin 45" "Not pending,Pending"
|
|
eventfld.long 0x14 12. " STAT44 ,Interrupt status of GPIO pin 44" "Not pending,Pending"
|
|
eventfld.long 0x14 11. " STAT43 ,Interrupt status of GPIO pin 43" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 10. " STAT42 ,Interrupt status of GPIO pin 42" "Not pending,Pending"
|
|
eventfld.long 0x14 9. " STAT41 ,Interrupt status of GPIO pin 41" "Not pending,Pending"
|
|
eventfld.long 0x14 8. " STAT40 ,Interrupt status of GPIO pin 40" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 7. " STAT39 ,Interrupt status of GPIO pin 39" "Not pending,Pending"
|
|
eventfld.long 0x14 6. " STAT38 ,Interrupt status of GPIO pin 38" "Not pending,Pending"
|
|
eventfld.long 0x14 5. " STAT37 ,Interrupt status of GPIO pin 37" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 4. " STAT36 ,Interrupt status of GPIO pin 36" "Not pending,Pending"
|
|
eventfld.long 0x14 3. " STAT35 ,Interrupt status of GPIO pin 35" "Not pending,Pending"
|
|
eventfld.long 0x14 2. " STAT34 ,Interrupt status of GPIO pin 34" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 1. " STAT33 ,Interrupt status of GPIO pin 33" "Not pending,Pending"
|
|
eventfld.long 0x14 0. " STAT32 ,Interrupt status of GPIO pin 32" "Not pending,Pending"
|
|
group.long 0x60++0x7 "GPIO Banks 4 and 5"
|
|
line.long 0x00 "DIR45,GPIO Banks 4 and 5 Direction Register"
|
|
bitfld.long 0x00 31. " DIR95 ,Pin 95 direction" "Output,Input"
|
|
bitfld.long 0x00 30. " DIR94 ,Pin 94 direction" "Output,Input"
|
|
bitfld.long 0x00 29. " DIR93 ,Pin 93 direction" "Output,Input"
|
|
bitfld.long 0x00 28. " DIR92 ,Pin 92 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DIR91 ,Pin 91 direction" "Output,Input"
|
|
bitfld.long 0x00 26. " DIR90 ,Pin 90 direction" "Output,Input"
|
|
bitfld.long 0x00 25. " DIR89 ,Pin 89 direction" "Output,Input"
|
|
bitfld.long 0x00 24. " DIR88 ,Pin 88 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DIR87 ,Pin 87 direction" "Output,Input"
|
|
bitfld.long 0x00 22. " DIR86 ,Pin 86 direction" "Output,Input"
|
|
bitfld.long 0x00 21. " DIR85 ,Pin 85 direction" "Output,Input"
|
|
bitfld.long 0x00 20. " DIR84 ,Pin 84 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DIR83 ,Pin 83 direction" "Output,Input"
|
|
bitfld.long 0x00 18. " DIR82 ,Pin 82 direction" "Output,Input"
|
|
bitfld.long 0x00 17. " DIR81 ,Pin 81 direction" "Output,Input"
|
|
bitfld.long 0x00 16. " DIR80 ,Pin 80 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 15. " DIR79 ,Pin 79 direction" "Output,Input"
|
|
bitfld.long 0x00 14. " DIR78 ,Pin 78 direction" "Output,Input"
|
|
bitfld.long 0x00 13. " DIR77 ,Pin 77 direction" "Output,Input"
|
|
bitfld.long 0x00 12. " DIR76 ,Pin 76 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 11. " DIR75 ,Pin 75 direction" "Output,Input"
|
|
bitfld.long 0x00 10. " DIR74 ,Pin 74 direction" "Output,Input"
|
|
bitfld.long 0x00 9. " DIR73 ,Pin 73 direction" "Output,Input"
|
|
bitfld.long 0x00 8. " DIR72 ,Pin 72 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 7. " DIR71 ,Pin 71 direction" "Output,Input"
|
|
bitfld.long 0x00 6. " DIR70 ,Pin 70 direction" "Output,Input"
|
|
bitfld.long 0x00 5. " DIR69 ,Pin 69 direction" "Output,Input"
|
|
bitfld.long 0x00 4. " DIR68 ,Pin 68 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIR67 ,Pin 67 direction" "Output,Input"
|
|
bitfld.long 0x00 2. " DIR66 ,Pin 66 direction" "Output,Input"
|
|
bitfld.long 0x00 1. " DIR65 ,Pin 65 direction" "Output,Input"
|
|
bitfld.long 0x00 0. " DIR64 ,Pin 64 direction" "Output,Input"
|
|
line.long 0x04 "OUT_DATA45,GPIO Banks 4 and 5 Output Data Register"
|
|
setclrfld.long 0x04 31. 0x08 31. 0x0c 31. " OUT95_set/clr ,Output drive state of GPIO pin 95" "Low,High"
|
|
setclrfld.long 0x04 30. 0x08 30. 0x0c 30. " OUT94_set/clr ,Output drive state of GPIO pin 94" "Low,High"
|
|
setclrfld.long 0x04 29. 0x08 29. 0x0c 29. " OUT93_set/clr ,Output drive state of GPIO pin 93" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 28. 0x08 28. 0x0c 28. " OUT92_set/clr ,Output drive state of GPIO pin 92" "Low,High"
|
|
setclrfld.long 0x04 27. 0x08 27. 0x0c 27. " OUT91_set/clr ,Output drive state of GPIO pin 91" "Low,High"
|
|
setclrfld.long 0x04 26. 0x08 26. 0x0c 26. " OUT90_set/clr ,Output drive state of GPIO pin 90" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x08 25. 0x0c 25. " OUT89_set/clr ,Output drive state of GPIO pin 89" "Low,High"
|
|
setclrfld.long 0x04 24. 0x08 24. 0x0c 24. " OUT88_set/clr ,Output drive state of GPIO pin 88" "Low,High"
|
|
setclrfld.long 0x04 23. 0x08 23. 0x0c 23. " OUT87_set/clr ,Output drive state of GPIO pin 87" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 22. 0x08 22. 0x0c 22. " OUT86_set/clr ,Output drive state of GPIO pin 86" "Low,High"
|
|
setclrfld.long 0x04 21. 0x08 21. 0x0c 21. " OUT85_set/clr ,Output drive state of GPIO pin 85" "Low,High"
|
|
setclrfld.long 0x04 20. 0x08 20. 0x0c 20. " OUT84_set/clr ,Output drive state of GPIO pin 84" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x08 19. 0x0c 19. " OUT83_set/clr ,Output drive state of GPIO pin 83" "Low,High"
|
|
setclrfld.long 0x04 18. 0x08 18. 0x0c 18. " OUT82_set/clr ,Output drive state of GPIO pin 82" "Low,High"
|
|
setclrfld.long 0x04 17. 0x08 17. 0x0c 17. " OUT81_set/clr ,Output drive state of GPIO pin 81" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x08 16. 0x0c 16. " OUT80_set/clr ,Output drive state of GPIO pin 80" "Low,High"
|
|
setclrfld.long 0x04 15. 0x08 15. 0x0c 15. " OUT79_set/clr ,Output drive state of GPIO pin 79" "Low,High"
|
|
setclrfld.long 0x04 14. 0x08 14. 0x0c 14. " OUT78_set/clr ,Output drive state of GPIO pin 78" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x08 13. 0x0c 13. " OUT77_set/clr ,Output drive state of GPIO pin 77" "Low,High"
|
|
setclrfld.long 0x04 12. 0x08 12. 0x0c 12. " OUT76_set/clr ,Output drive state of GPIO pin 76" "Low,High"
|
|
setclrfld.long 0x04 11. 0x08 11. 0x0c 11. " OUT75_set/clr ,Output drive state of GPIO pin 75" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x08 10. 0x0c 10. " OUT74_set/clr ,Output drive state of GPIO pin 74" "Low,High"
|
|
setclrfld.long 0x04 9. 0x08 9. 0x0c 9. " OUT73_set/clr ,Output drive state of GPIO pin 73" "Low,High"
|
|
setclrfld.long 0x04 8. 0x08 8. 0x0c 8. " OUT72_set/clr ,Output drive state of GPIO pin 72" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT71_set/clr ,Output drive state of GPIO pin 71" "Low,High"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT70_set/clr ,Output drive state of GPIO pin 70" "Low,High"
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT69_set/clr ,Output drive state of GPIO pin 69" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT68_set/clr ,Output drive state of GPIO pin 68" "Low,High"
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT67_set/clr ,Output drive state of GPIO pin 67" "Low,High"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT66_set/clr ,Output drive state of GPIO pin 66" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT65_set/clr ,Output drive state of GPIO pin 65" "Low,High"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT64_set/clr ,Output drive state of GPIO pin 64" "Low,High"
|
|
group.long 0x70++0x17
|
|
line.long 0x00 "IN_DATA45,GPIO Banks 4 and 5 Input Data Register"
|
|
bitfld.long 0x00 31. " IN95 ,Status of GPIO pin 95" "Low,High"
|
|
bitfld.long 0x00 30. " IN94 ,Status of GPIO pin 94" "Low,High"
|
|
bitfld.long 0x00 29. " IN93 ,Status of GPIO pin 93" "Low,High"
|
|
bitfld.long 0x00 28. " IN92 ,Status of GPIO pin 92" "Low,High"
|
|
bitfld.long 0x00 27. " IN91 ,Status of GPIO pin 91" "Low,High"
|
|
bitfld.long 0x00 26. " IN90 ,Status of GPIO pin 90" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " IN89 ,Status of GPIO pin 89" "Low,High"
|
|
bitfld.long 0x00 24. " IN88 ,Status of GPIO pin 88" "Low,High"
|
|
bitfld.long 0x00 23. " IN87 ,Status of GPIO pin 87" "Low,High"
|
|
bitfld.long 0x00 22. " IN86 ,Status of GPIO pin 86" "Low,High"
|
|
bitfld.long 0x00 21. " IN85 ,Status of GPIO pin 85" "Low,High"
|
|
bitfld.long 0x00 20. " IN84 ,Status of GPIO pin 84" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " IN83 ,Status of GPIO pin 83" "Low,High"
|
|
bitfld.long 0x00 18. " IN82 ,Status of GPIO pin 82" "Low,High"
|
|
bitfld.long 0x00 17. " IN81 ,Status of GPIO pin 81" "Low,High"
|
|
bitfld.long 0x00 16. " IN80 ,Status of GPIO pin 80" "Low,High"
|
|
bitfld.long 0x00 15. " IN79 ,Status of GPIO pin 79" "Low,High"
|
|
bitfld.long 0x00 14. " IN78 ,Status of GPIO pin 78" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " IN77 ,Status of GPIO pin 77" "Low,High"
|
|
bitfld.long 0x00 12. " IN76 ,Status of GPIO pin 76" "Low,High"
|
|
bitfld.long 0x00 11. " IN75 ,Status of GPIO pin 75" "Low,High"
|
|
bitfld.long 0x00 10. " IN74 ,Status of GPIO pin 74" "Low,High"
|
|
bitfld.long 0x00 9. " IN73 ,Status of GPIO pin 73" "Low,High"
|
|
bitfld.long 0x00 8. " IN72 ,Status of GPIO pin 72" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " IN71 ,Status of GPIO pin 71" "Low,High"
|
|
bitfld.long 0x00 6. " IN70 ,Status of GPIO pin 70" "Low,High"
|
|
bitfld.long 0x00 5. " IN69 ,Status of GPIO pin 69" "Low,High"
|
|
bitfld.long 0x00 4. " IN68 ,Status of GPIO pin 68" "Low,High"
|
|
bitfld.long 0x00 3. " IN67 ,Status of GPIO pin 67" "Low,High"
|
|
bitfld.long 0x00 2. " IN66 ,Status of GPIO pin 66" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " IN65 ,Status of GPIO pin 65" "Low,High"
|
|
bitfld.long 0x00 0. " IN64 ,Status of GPIO pin 64" "Low,High"
|
|
line.long 0x04 "SET_RIS_TRIG45,GPIO Banks 4 and 5 Set Rising Edge Interrupt Register"
|
|
bitfld.long 0x04 31. " SETRIS95 ,Enable rising edge interrupt detection on GPIO pin 95" "No effect,Enabled"
|
|
bitfld.long 0x04 30. " SETRIS94 ,Enable rising edge interrupt detection on GPIO pin 94" "No effect,Enabled"
|
|
bitfld.long 0x04 29. " SETRIS93 ,Enable rising edge interrupt detection on GPIO pin 93" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " SETRIS92 ,Enable rising edge interrupt detection on GPIO pin 92" "No effect,Enabled"
|
|
bitfld.long 0x04 27. " SETRIS91 ,Enable rising edge interrupt detection on GPIO pin 91" "No effect,Enabled"
|
|
bitfld.long 0x04 26. " SETRIS90 ,Enable rising edge interrupt detection on GPIO pin 90" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " SETRIS89 ,Enable rising edge interrupt detection on GPIO pin 89" "No effect,Enabled"
|
|
bitfld.long 0x04 24. " SETRIS88 ,Enable rising edge interrupt detection on GPIO pin 88" "No effect,Enabled"
|
|
bitfld.long 0x04 23. " SETRIS87 ,Enable rising edge interrupt detection on GPIO pin 87" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " SETRIS86 ,Enable rising edge interrupt detection on GPIO pin 86" "No effect,Enabled"
|
|
bitfld.long 0x04 21. " SETRIS85 ,Enable rising edge interrupt detection on GPIO pin 85" "No effect,Enabled"
|
|
bitfld.long 0x04 20. " SETRIS84 ,Enable rising edge interrupt detection on GPIO pin 84" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SETRIS83 ,Enable rising edge interrupt detection on GPIO pin 83" "No effect,Enabled"
|
|
bitfld.long 0x04 18. " SETRIS82 ,Enable rising edge interrupt detection on GPIO pin 82" "No effect,Enabled"
|
|
bitfld.long 0x04 17. " SETRIS81 ,Enable rising edge interrupt detection on GPIO pin 81" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " SETRIS80 ,Enable rising edge interrupt detection on GPIO pin 80" "No effect,Enabled"
|
|
bitfld.long 0x04 15. " SETRIS79 ,Enable rising edge interrupt detection on GPIO pin 79" "No effect,Enabled"
|
|
bitfld.long 0x04 14. " SETRIS78 ,Enable rising edge interrupt detection on GPIO pin 78" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " SETRIS77 ,Enable rising edge interrupt detection on GPIO pin 77" "No effect,Enabled"
|
|
bitfld.long 0x04 12. " SETRIS76 ,Enable rising edge interrupt detection on GPIO pin 76" "No effect,Enabled"
|
|
bitfld.long 0x04 11. " SETRIS75 ,Enable rising edge interrupt detection on GPIO pin 75" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SETRIS74 ,Enable rising edge interrupt detection on GPIO pin 74" "No effect,Enabled"
|
|
bitfld.long 0x04 9. " SETRIS73 ,Enable rising edge interrupt detection on GPIO pin 73" "No effect,Enabled"
|
|
bitfld.long 0x04 8. " SETRIS72 ,Enable rising edge interrupt detection on GPIO pin 72" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SETRIS71 ,Enable rising edge interrupt detection on GPIO pin 71" "No effect,Enabled"
|
|
bitfld.long 0x04 6. " SETRIS70 ,Enable rising edge interrupt detection on GPIO pin 70" "No effect,Enabled"
|
|
bitfld.long 0x04 5. " SETRIS69 ,Enable rising edge interrupt detection on GPIO pin 69" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SETRIS68 ,Enable rising edge interrupt detection on GPIO pin 68" "No effect,Enabled"
|
|
bitfld.long 0x04 3. " SETRIS67 ,Enable rising edge interrupt detection on GPIO pin 67" "No effect,Enabled"
|
|
bitfld.long 0x04 2. " SETRIS66 ,Enable rising edge interrupt detection on GPIO pin 66" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SETRIS65 ,Enable rising edge interrupt detection on GPIO pin 65" "No effect,Enabled"
|
|
bitfld.long 0x04 0. " SETRIS64 ,Enable rising edge interrupt detection on GPIO pin 64" "No effect,Enabled"
|
|
line.long 0x08 "CLR_RIS_TRIG45,GPIO Banks 4 and 5 Clear Rising Edge Interrupt Register"
|
|
bitfld.long 0x08 31. " CLRRIS95 ,Disable rising edge interrupt detection on GPIO pin 95" "No effect,Disabled"
|
|
bitfld.long 0x08 30. " CLRRIS94 ,Disable rising edge interrupt detection on GPIO pin 94" "No effect,Disabled"
|
|
bitfld.long 0x08 29. " CLRRIS93 ,Disable rising edge interrupt detection on GPIO pin 93" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 28. " CLRRIS92 ,Disable rising edge interrupt detection on GPIO pin 92" "No effect,Disabled"
|
|
bitfld.long 0x08 27. " CLRRIS91 ,Disable rising edge interrupt detection on GPIO pin 91" "No effect,Disabled"
|
|
bitfld.long 0x08 26. " CLRRIS90 ,Disable rising edge interrupt detection on GPIO pin 90" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 25. " CLRRIS89 ,Disable rising edge interrupt detection on GPIO pin 89" "No effect,Disabled"
|
|
bitfld.long 0x08 24. " CLRRIS88 ,Disable rising edge interrupt detection on GPIO pin 88" "No effect,Disabled"
|
|
bitfld.long 0x08 23. " CLRRIS87 ,Disable rising edge interrupt detection on GPIO pin 87" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 22. " CLRRIS86 ,Disable rising edge interrupt detection on GPIO pin 86" "No effect,Disabled"
|
|
bitfld.long 0x08 21. " CLRRIS85 ,Disable rising edge interrupt detection on GPIO pin 85" "No effect,Disabled"
|
|
bitfld.long 0x08 20. " CLRRIS84 ,Disable rising edge interrupt detection on GPIO pin 84" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CLRRIS83 ,Disable rising edge interrupt detection on GPIO pin 83" "No effect,Disabled"
|
|
bitfld.long 0x08 18. " CLRRIS82 ,Disable rising edge interrupt detection on GPIO pin 82" "No effect,Disabled"
|
|
bitfld.long 0x08 17. " CLRRIS81 ,Disable rising edge interrupt detection on GPIO pin 81" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " CLRRIS80 ,Disable rising edge interrupt detection on GPIO pin 80" "No effect,Disabled"
|
|
bitfld.long 0x08 15. " CLRRIS79 ,Disable rising edge interrupt detection on GPIO pin 79" "No effect,Disabled"
|
|
bitfld.long 0x08 14. " CLRRIS78 ,Disable rising edge interrupt detection on GPIO pin 78" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 13. " CLRRIS77 ,Disable rising edge interrupt detection on GPIO pin 77" "No effect,Disabled"
|
|
bitfld.long 0x08 12. " CLRRIS76 ,Disable rising edge interrupt detection on GPIO pin 76" "No effect,Disabled"
|
|
bitfld.long 0x08 11. " CLRRIS75 ,Disable rising edge interrupt detection on GPIO pin 75" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 10. " CLRRIS74 ,Disable rising edge interrupt detection on GPIO pin 74" "No effect,Disabled"
|
|
bitfld.long 0x08 9. " CLRRIS73 ,Disable rising edge interrupt detection on GPIO pin 73" "No effect,Disabled"
|
|
bitfld.long 0x08 8. " CLRRIS72 ,Disable rising edge interrupt detection on GPIO pin 72" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CLRRIS71 ,Disable rising edge interrupt detection on GPIO pin 71" "No effect,Disabled"
|
|
bitfld.long 0x08 6. " CLRRIS70 ,Disable rising edge interrupt detection on GPIO pin 70" "No effect,Disabled"
|
|
bitfld.long 0x08 5. " CLRRIS69 ,Disable rising edge interrupt detection on GPIO pin 69" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CLRRIS68 ,Disable rising edge interrupt detection on GPIO pin 68" "No effect,Disabled"
|
|
bitfld.long 0x08 3. " CLRRIS67 ,Disable rising edge interrupt detection on GPIO pin 67" "No effect,Disabled"
|
|
bitfld.long 0x08 2. " CLRRIS66 ,Disable rising edge interrupt detection on GPIO pin 66" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CLRRIS65 ,Disable rising edge interrupt detection on GPIO pin 65" "No effect,Disabled"
|
|
bitfld.long 0x08 0. " CLRRIS64 ,Disable rising edge interrupt detection on GPIO pin 64" "No effect,Disabled"
|
|
line.long 0x0c "SET_FAL_TRIG45,GPIO Banks 4 and 5 Set Falling Edge Interrupt Register"
|
|
bitfld.long 0x0c 31. " SETFAL95 ,Enable falling edge interrupt detection on GPIO pin 95" "No effect,Enabled"
|
|
bitfld.long 0x0c 30. " SETFAL94 ,Enable falling edge interrupt detection on GPIO pin 94" "No effect,Enabled"
|
|
bitfld.long 0x0c 29. " SETFAL93 ,Enable falling edge interrupt detection on GPIO pin 93" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 28. " SETFAL92 ,Enable falling edge interrupt detection on GPIO pin 92" "No effect,Enabled"
|
|
bitfld.long 0x0c 27. " SETFAL91 ,Enable falling edge interrupt detection on GPIO pin 91" "No effect,Enabled"
|
|
bitfld.long 0x0c 26. " SETFAL90 ,Enable falling edge interrupt detection on GPIO pin 90" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " SETFAL89 ,Enable falling edge interrupt detection on GPIO pin 89" "No effect,Enabled"
|
|
bitfld.long 0x0c 24. " SETFAL88 ,Enable falling edge interrupt detection on GPIO pin 88" "No effect,Enabled"
|
|
bitfld.long 0x0c 23. " SETFAL87 ,Enable falling edge interrupt detection on GPIO pin 87" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 22. " SETFAL86 ,Enable falling edge interrupt detection on GPIO pin 86" "No effect,Enabled"
|
|
bitfld.long 0x0c 21. " SETFAL85 ,Enable falling edge interrupt detection on GPIO pin 85" "No effect,Enabled"
|
|
bitfld.long 0x0c 20. " SETFAL84 ,Enable falling edge interrupt detection on GPIO pin 84" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " SETFAL83 ,Enable falling edge interrupt detection on GPIO pin 83" "No effect,Enabled"
|
|
bitfld.long 0x0c 18. " SETFAL82 ,Enable falling edge interrupt detection on GPIO pin 82" "No effect,Enabled"
|
|
bitfld.long 0x0c 17. " SETFAL81 ,Enable falling edge interrupt detection on GPIO pin 81" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 16. " SETFAL80 ,Enable falling edge interrupt detection on GPIO pin 80" "No effect,Enabled"
|
|
bitfld.long 0x0c 15. " SETFAL79 ,Enable falling edge interrupt detection on GPIO pin 79" "No effect,Enabled"
|
|
bitfld.long 0x0c 14. " SETFAL78 ,Enable falling edge interrupt detection on GPIO pin 78" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " SETFAL77 ,Enable falling edge interrupt detection on GPIO pin 77" "No effect,Enabled"
|
|
bitfld.long 0x0c 12. " SETFAL76 ,Enable falling edge interrupt detection on GPIO pin 76" "No effect,Enabled"
|
|
bitfld.long 0x0c 11. " SETFAL75 ,Enable falling edge interrupt detection on GPIO pin 75" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " SETFAL74 ,Enable falling edge interrupt detection on GPIO pin 74" "No effect,Enabled"
|
|
bitfld.long 0x0c 9. " SETFAL73 ,Enable falling edge interrupt detection on GPIO pin 73" "No effect,Enabled"
|
|
bitfld.long 0x0c 8. " SETFAL72 ,Enable falling edge interrupt detection on GPIO pin 72" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " SETFAL71 ,Enable falling edge interrupt detection on GPIO pin 71" "No effect,Enabled"
|
|
bitfld.long 0x0c 6. " SETFAL70 ,Enable falling edge interrupt detection on GPIO pin 70" "No effect,Enabled"
|
|
bitfld.long 0x0c 5. " SETFAL69 ,Enable falling edge interrupt detection on GPIO pin 69" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SETFAL68 ,Enable falling edge interrupt detection on GPIO pin 68" "No effect,Enabled"
|
|
bitfld.long 0x0c 3. " SETFAL67 ,Enable falling edge interrupt detection on GPIO pin 67" "No effect,Enabled"
|
|
bitfld.long 0x0c 2. " SETFAL66 ,Enable falling edge interrupt detection on GPIO pin 66" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SETFAL65 ,Enable falling edge interrupt detection on GPIO pin 65" "No effect,Enabled"
|
|
bitfld.long 0x0c 0. " SETFAL64 ,Enable falling edge interrupt detection on GPIO pin 64" "No effect,Enabled"
|
|
line.long 0x10 "CLR_FAL_TRIG45,GPIO Banks 4 and 5 Clear Falling Edge Interrupt Register"
|
|
bitfld.long 0x10 31. " CLRFAL95 ,Disable falling edge interrupt detection on GPIO pin 95" "No effect,Disabled"
|
|
bitfld.long 0x10 30. " CLRFAL94 ,Disable falling edge interrupt detection on GPIO pin 94" "No effect,Disabled"
|
|
bitfld.long 0x10 29. " CLRFAL93 ,Disable falling edge interrupt detection on GPIO pin 93" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 28. " CLRFAL92 ,Disable falling edge interrupt detection on GPIO pin 92" "No effect,Disabled"
|
|
bitfld.long 0x10 27. " CLRFAL91 ,Disable falling edge interrupt detection on GPIO pin 91" "No effect,Disabled"
|
|
bitfld.long 0x10 26. " CLRFAL90 ,Disable falling edge interrupt detection on GPIO pin 90" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " CLRFAL89 ,Disable falling edge interrupt detection on GPIO pin 89" "No effect,Disabled"
|
|
bitfld.long 0x10 24. " CLRFAL88 ,Disable falling edge interrupt detection on GPIO pin 88" "No effect,Disabled"
|
|
bitfld.long 0x10 23. " CLRFAL87 ,Disable falling edge interrupt detection on GPIO pin 87" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 22. " CLRFAL86 ,Disable falling edge interrupt detection on GPIO pin 86" "No effect,Disabled"
|
|
bitfld.long 0x10 21. " CLRFAL85 ,Disable falling edge interrupt detection on GPIO pin 85" "No effect,Disabled"
|
|
bitfld.long 0x10 20. " CLRFAL84 ,Disable falling edge interrupt detection on GPIO pin 84" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " CLRFAL83 ,Disable falling edge interrupt detection on GPIO pin 83" "No effect,Disabled"
|
|
bitfld.long 0x10 18. " CLRFAL82 ,Disable falling edge interrupt detection on GPIO pin 82" "No effect,Disabled"
|
|
bitfld.long 0x10 17. " CLRFAL81 ,Disable falling edge interrupt detection on GPIO pin 81" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CLRFAL80 ,Disable falling edge interrupt detection on GPIO pin 80" "No effect,Disabled"
|
|
bitfld.long 0x10 15. " CLRFAL79 ,Disable falling edge interrupt detection on GPIO pin 79" "No effect,Disabled"
|
|
bitfld.long 0x10 14. " CLRFAL78 ,Disable falling edge interrupt detection on GPIO pin 78" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " CLRFAL77 ,Disable falling edge interrupt detection on GPIO pin 77" "No effect,Disabled"
|
|
bitfld.long 0x10 12. " CLRFAL76 ,Disable falling edge interrupt detection on GPIO pin 76" "No effect,Disabled"
|
|
bitfld.long 0x10 11. " CLRFAL75 ,Disable falling edge interrupt detection on GPIO pin 75" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " CLRFAL74 ,Disable falling edge interrupt detection on GPIO pin 74" "No effect,Disabled"
|
|
bitfld.long 0x10 9. " CLRFAL73 ,Disable falling edge interrupt detection on GPIO pin 73" "No effect,Disabled"
|
|
bitfld.long 0x10 8. " CLRFAL72 ,Disable falling edge interrupt detection on GPIO pin 72" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 7. " CLRFAL71 ,Disable falling edge interrupt detection on GPIO pin 71" "No effect,Disabled"
|
|
bitfld.long 0x10 6. " CLRFAL70 ,Disable falling edge interrupt detection on GPIO pin 70" "No effect,Disabled"
|
|
bitfld.long 0x10 5. " CLRFAL69 ,Disable falling edge interrupt detection on GPIO pin 69" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " CLRFAL68 ,Disable falling edge interrupt detection on GPIO pin 68" "No effect,Disabled"
|
|
bitfld.long 0x10 3. " CLRFAL67 ,Disable falling edge interrupt detection on GPIO pin 67" "No effect,Disabled"
|
|
bitfld.long 0x10 2. " CLRFAL66 ,Disable falling edge interrupt detection on GPIO pin 66" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CLRFAL65 ,Disable falling edge interrupt detection on GPIO pin 65" "No effect,Disabled"
|
|
bitfld.long 0x10 0. " CLRFAL64 ,Disable falling edge interrupt detection on GPIO pin 64" "No effect,Disabled"
|
|
line.long 0x14 "INTSTAT45,GPIO Banks 4 and 5 Interrupt Status Register"
|
|
eventfld.long 0x14 31. " STAT95 ,Interrupt status of GPIO pin 95" "Not pending,Pending"
|
|
eventfld.long 0x14 30. " STAT94 ,Interrupt status of GPIO pin 94" "Not pending,Pending"
|
|
eventfld.long 0x14 29. " STAT93 ,Interrupt status of GPIO pin 93" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 28. " STAT92 ,Interrupt status of GPIO pin 92" "Not pending,Pending"
|
|
eventfld.long 0x14 27. " STAT91 ,Interrupt status of GPIO pin 91" "Not pending,Pending"
|
|
eventfld.long 0x14 26. " STAT90 ,Interrupt status of GPIO pin 90" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 25. " STAT89 ,Interrupt status of GPIO pin 89" "Not pending,Pending"
|
|
eventfld.long 0x14 24. " STAT88 ,Interrupt status of GPIO pin 88" "Not pending,Pending"
|
|
eventfld.long 0x14 23. " STAT87 ,Interrupt status of GPIO pin 87" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 22. " STAT86 ,Interrupt status of GPIO pin 86" "Not pending,Pending"
|
|
eventfld.long 0x14 21. " STAT85 ,Interrupt status of GPIO pin 85" "Not pending,Pending"
|
|
eventfld.long 0x14 20. " STAT84 ,Interrupt status of GPIO pin 84" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 19. " STAT83 ,Interrupt status of GPIO pin 83" "Not pending,Pending"
|
|
eventfld.long 0x14 18. " STAT82 ,Interrupt status of GPIO pin 82" "Not pending,Pending"
|
|
eventfld.long 0x14 17. " STAT81 ,Interrupt status of GPIO pin 81" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 16. " STAT80 ,Interrupt status of GPIO pin 80" "Not pending,Pending"
|
|
eventfld.long 0x14 15. " STAT79 ,Interrupt status of GPIO pin 79" "Not pending,Pending"
|
|
eventfld.long 0x14 14. " STAT78 ,Interrupt status of GPIO pin 78" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 13. " STAT77 ,Interrupt status of GPIO pin 77" "Not pending,Pending"
|
|
eventfld.long 0x14 12. " STAT76 ,Interrupt status of GPIO pin 76" "Not pending,Pending"
|
|
eventfld.long 0x14 11. " STAT75 ,Interrupt status of GPIO pin 75" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 10. " STAT74 ,Interrupt status of GPIO pin 74" "Not pending,Pending"
|
|
eventfld.long 0x14 9. " STAT73 ,Interrupt status of GPIO pin 73" "Not pending,Pending"
|
|
eventfld.long 0x14 8. " STAT72 ,Interrupt status of GPIO pin 72" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 7. " STAT71 ,Interrupt status of GPIO pin 71" "Not pending,Pending"
|
|
eventfld.long 0x14 6. " STAT70 ,Interrupt status of GPIO pin 70" "Not pending,Pending"
|
|
eventfld.long 0x14 5. " STAT69 ,Interrupt status of GPIO pin 69" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 4. " STAT68 ,Interrupt status of GPIO pin 68" "Not pending,Pending"
|
|
eventfld.long 0x14 3. " STAT67 ,Interrupt status of GPIO pin 67" "Not pending,Pending"
|
|
eventfld.long 0x14 2. " STAT66 ,Interrupt status of GPIO pin 66" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 1. " STAT65 ,Interrupt status of GPIO pin 65" "Not pending,Pending"
|
|
eventfld.long 0x14 0. " STAT64 ,Interrupt status of GPIO pin 64" "Not pending,Pending"
|
|
width 15.
|
|
group.long 0x88++0x7 "GPIO Bank 6"
|
|
line.long 0x00 "DIR6,GPIO Bank 6 Direction Register"
|
|
bitfld.long 0x00 7. " DIR103 ,Pin 103 direction" "Output,Input"
|
|
bitfld.long 0x00 6. " DIR102 ,Pin 102 direction" "Output,Input"
|
|
bitfld.long 0x00 5. " DIR101 ,Pin 101 direction" "Output,Input"
|
|
bitfld.long 0x00 4. " DIR100 ,Pin 100 direction" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIR99 ,Pin 99 direction" "Output,Input"
|
|
bitfld.long 0x00 2. " DIR98 ,Pin 98 direction" "Output,Input"
|
|
bitfld.long 0x00 1. " DIR97 ,Pin 97 direction" "Output,Input"
|
|
bitfld.long 0x00 0. " DIR96 ,Pin 96 direction" "Output,Input"
|
|
line.long 0x04 "OUT_DATA06,GPIO Bank 6 Output Data Register"
|
|
setclrfld.long 0x04 7. 0x08 7. 0x0c 7. " OUT103_set/clr ,Output drive state of GPIO pin 103" "Low,High"
|
|
setclrfld.long 0x04 6. 0x08 6. 0x0c 6. " OUT102_set/clr ,Output drive state of GPIO pin 102" "Low,High"
|
|
setclrfld.long 0x04 5. 0x08 5. 0x0c 5. " OUT101_set/clr ,Output drive state of GPIO pin 101" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 4. 0x08 4. 0x0c 4. " OUT100_set/clr ,Output drive state of GPIO pin 100" "Low,High"
|
|
setclrfld.long 0x04 3. 0x08 3. 0x0c 3. " OUT99_set/clr ,Output drive state of GPIO pin 99" "Low,High"
|
|
setclrfld.long 0x04 2. 0x08 2. 0x0c 2. " OUT98_set/clr ,Output drive state of GPIO pin 98" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x08 1. 0x0c 1. " OUT97_set/clr ,Output drive state of GPIO pin 97" "Low,High"
|
|
setclrfld.long 0x04 0. 0x08 0. 0x0c 0. " OUT96_set/clr ,Output drive state of GPIO pin 96" "Low,High"
|
|
group.long 0x98++0x17
|
|
line.long 0x00 "IN_DATA6,GPIO Bank 6 Input Data Register"
|
|
bitfld.long 0x00 7. " IN103 ,Status of GPIO pin 103" "Low,High"
|
|
bitfld.long 0x00 6. " IN102 ,Status of GPIO pin 102" "Low,High"
|
|
bitfld.long 0x00 5. " IN101 ,Status of GPIO pin 101" "Low,High"
|
|
bitfld.long 0x00 4. " IN100 ,Status of GPIO pin 100" "Low,High"
|
|
bitfld.long 0x00 3. " IN99 ,Status of GPIO pin 99" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " IN98 ,Status of GPIO pin 98" "Low,High"
|
|
bitfld.long 0x00 1. " IN97 ,Status of GPIO pin 97" "Low,High"
|
|
bitfld.long 0x00 0. " IN96 ,Status of GPIO pin 96" "Low,High"
|
|
line.long 0x04 "SET_RIS_TRIG6,GPIO Bank 6 Set Rising Edge Interrupt Register"
|
|
bitfld.long 0x04 7. " SETRIS103 ,Enable rising edge interrupt detection on GPIO pin 103" "No effect,Enabled"
|
|
bitfld.long 0x04 6. " SETRIS102 ,Enable rising edge interrupt detection on GPIO pin 102" "No effect,Enabled"
|
|
bitfld.long 0x04 5. " SETRIS101 ,Enable rising edge interrupt detection on GPIO pin 101" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " SETRIS100 ,Enable rising edge interrupt detection on GPIO pin 100" "No effect,Enabled"
|
|
bitfld.long 0x04 3. " SETRIS99 ,Enable rising edge interrupt detection on GPIO pin 99" "No effect,Enabled"
|
|
bitfld.long 0x04 2. " SETRIS98 ,Enable rising edge interrupt detection on GPIO pin 98" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SETRIS97 ,Enable rising edge interrupt detection on GPIO pin 97" "No effect,Enabled"
|
|
bitfld.long 0x04 0. " SETRIS96 ,Enable rising edge interrupt detection on GPIO pin 96" "No effect,Enabled"
|
|
line.long 0x08 "CLR_RIS_TRIG6,GPIO Bank 6 Clear Rising Edge Interrupt Register"
|
|
bitfld.long 0x08 7. " CLRRIS103 ,Disable rising edge interrupt detection on GPIO pin 103" "No effect,Disabled"
|
|
bitfld.long 0x08 6. " CLRRIS102 ,Disable rising edge interrupt detection on GPIO pin 102" "No effect,Disabled"
|
|
bitfld.long 0x08 5. " CLRRIS101 ,Disable rising edge interrupt detection on GPIO pin 101" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 4. " CLRRIS100 ,Disable rising edge interrupt detection on GPIO pin 100" "No effect,Disabled"
|
|
bitfld.long 0x08 3. " CLRRIS99 ,Disable rising edge interrupt detection on GPIO pin 99" "No effect,Disabled"
|
|
bitfld.long 0x08 2. " CLRRIS98 ,Disable rising edge interrupt detection on GPIO pin 98" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 1. " CLRRIS97 ,Disable rising edge interrupt detection on GPIO pin 97" "No effect,Disabled"
|
|
bitfld.long 0x08 0. " CLRRIS96 ,Disable rising edge interrupt detection on GPIO pin 96" "No effect,Disabled"
|
|
line.long 0x0c "SET_FAL_TRIG6,GPIO Bank 6 Set Falling Edge Interrupt Register"
|
|
bitfld.long 0x0c 7. " SETFAL103 ,Enable falling edge interrupt detection on GPIO pin 103" "No effect,Enabled"
|
|
bitfld.long 0x0c 6. " SETFAL102 ,Enable falling edge interrupt detection on GPIO pin 102" "No effect,Enabled"
|
|
bitfld.long 0x0c 5. " SETFAL101 ,Enable falling edge interrupt detection on GPIO pin 101" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " SETFAL100 ,Enable falling edge interrupt detection on GPIO pin 100" "No effect,Enabled"
|
|
bitfld.long 0x0c 3. " SETFAL99 ,Enable falling edge interrupt detection on GPIO pin 99" "No effect,Enabled"
|
|
bitfld.long 0x0c 2. " SETFAL98 ,Enable falling edge interrupt detection on GPIO pin 98" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " SETFAL97 ,Enable falling edge interrupt detection on GPIO pin 97" "No effect,Enabled"
|
|
bitfld.long 0x0c 0. " SETFAL96 ,Enable falling edge interrupt detection on GPIO pin 96" "No effect,Enabled"
|
|
line.long 0x10 "CLR_FAL_TRIG6,GPIO Bank 6 Clear Falling Edge Interrupt Register"
|
|
bitfld.long 0x10 7. " CLRFAL103 ,Disable falling edge interrupt detection on GPIO pin 103" "No effect,Disabled"
|
|
bitfld.long 0x10 6. " CLRFAL102 ,Disable falling edge interrupt detection on GPIO pin 102" "No effect,Disabled"
|
|
bitfld.long 0x10 5. " CLRFAL101 ,Disable falling edge interrupt detection on GPIO pin 101" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " CLRFAL100 ,Disable falling edge interrupt detection on GPIO pin 100" "No effect,Disabled"
|
|
bitfld.long 0x10 3. " CLRFAL99 ,Disable falling edge interrupt detection on GPIO pin 99" "No effect,Disabled"
|
|
bitfld.long 0x10 2. " CLRFAL98 ,Disable falling edge interrupt detection on GPIO pin 98" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CLRFAL97 ,Disable falling edge interrupt detection on GPIO pin 97" "No effect,Disabled"
|
|
bitfld.long 0x10 0. " CLRFAL96 ,Disable falling edge interrupt detection on GPIO pin 96" "No effect,Disabled"
|
|
line.long 0x14 "INTSTAT6,GPIO Bank 6 Interrupt Status Register"
|
|
eventfld.long 0x14 7. " STAT103 ,Interrupt status of GPIO pin 103" "Not pending,Pending"
|
|
eventfld.long 0x14 6. " STAT102 ,Interrupt status of GPIO pin 102" "Not pending,Pending"
|
|
eventfld.long 0x14 5. " STAT101 ,Interrupt status of GPIO pin 101" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 4. " STAT100 ,Interrupt status of GPIO pin 100" "Not pending,Pending"
|
|
eventfld.long 0x14 3. " STAT99 ,Interrupt status of GPIO pin 99" "Not pending,Pending"
|
|
eventfld.long 0x14 2. " STAT98 ,Interrupt status of GPIO pin 98" "Not pending,Pending"
|
|
textline " "
|
|
eventfld.long 0x14 1. " STAT97 ,Interrupt status of GPIO pin 97" "Not pending,Pending"
|
|
eventfld.long 0x14 0. " STAT96 ,Interrupt status of GPIO pin 96" "Not pending,Pending"
|
|
width 0xb
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
base asd:0x01C21000
|
|
width 8.
|
|
if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ICOAR,I2C Own Address Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " OADDR ,Slave address of the I2C module"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ICOAR,I2C Own Address Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " OADDR ,Slave address of the I2C module"
|
|
endif
|
|
group.long 0x04++0x13
|
|
line.long 0x00 "ICIMR,I2C Interrupt Mask Register"
|
|
bitfld.long 0x00 6. " AAS ,Address-as-slave interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCD ,Stop condition detected interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ICXRDY ,Transmit-data-ready interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ICRRDY ,Receive-data-ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ARDY ,Register-access-ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " NACK ,No-acknowledgment interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " AL ,Arbitration-lost interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "ICSTR,I2C Status Register"
|
|
eventfld.long 0x04 14. " SDIR ,Slave direction" "Receiver,Transmitter"
|
|
eventfld.long 0x04 13. " NACKSNT ,NACK sent" "Not sent,Sent"
|
|
eventfld.long 0x04 12. " BB ,Bus busy" "Free,Busy"
|
|
textline " "
|
|
bitfld.long 0x04 11. " RSFULL ,Receive shift register full" "No overrun,Overrun"
|
|
bitfld.long 0x04 10. " XSMT ,Transmit shift register empty" "Underflow,No underflow"
|
|
bitfld.long 0x04 9. " AAS ,Addressed-as-slave" "Cleared,Recognized"
|
|
textline " "
|
|
bitfld.long 0x04 8. " AD0 ,Address 0 bit" "Cleared,Detected"
|
|
eventfld.long 0x04 5. " SCD ,Stop condition detected" "Not detected,Detected"
|
|
eventfld.long 0x04 4. " ICXRDY ,Transmit-data-ready interrupt flag" "Not ready,Ready"
|
|
textline " "
|
|
eventfld.long 0x04 3. " ICRRDY ,Receive-data-ready interrupt flag" "Not ready,Ready"
|
|
eventfld.long 0x04 2. " ARDY ,Register-access-ready interrupt flag" "Not ready,Ready"
|
|
eventfld.long 0x04 1. " NACK ,No-acknowledgement interrupt flag" "Not received,Received"
|
|
textline " "
|
|
eventfld.long 0x04 0. " AL ,Arbitration-lost interrupt flag" "Not lost,Lost"
|
|
line.long 0x08 "ICCLKL,I2C Clock Divider Register Low"
|
|
hexmask.long.word 0x08 0.--15. 1. " ICCL ,Clock low-time divide-down value"
|
|
line.long 0x0c "ICCLKH,I2C Clock Divider Register High"
|
|
hexmask.long.word 0x0c 0.--15. 1. " ICCH ,Clock high-time divide-down value"
|
|
line.long 0x10 "ICCNT,I2C Data Count Register"
|
|
hexmask.long.word 0x10 0.--15. 1. " ICDC ,Data count value"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "ICDRR,I2C Data Receive Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " D ,Receive data"
|
|
if (((data.long(asd:0x01C21000+0x24))&0x100)==(0x000))
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "ICSAR,I2C Slave Address Register"
|
|
hexmask.long.byte 0x00 0.--6. 1. " SADDR ,Slave address transmitted in master-transmitter mode"
|
|
else
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "ICSAR,I2C Slave Address Register"
|
|
hexmask.long.word 0x00 0.--9. 1. " SADDR ,Slave address transmitted in master-transmitter mode"
|
|
endif
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "ICDXR,I2C Data Transmit Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " D ,Transmit data"
|
|
line.long 0x04 "ICMDR,I2C Mode Register"
|
|
bitfld.long 0x04 15. " NACKMOD ,NACK mode" "ACK,NACK"
|
|
bitfld.long 0x04 14. " FREE ,Emulation mode" "Stopped,Run free"
|
|
bitfld.long 0x04 13. " STT ,START condition" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x04 11. " STP ,STOP condition" "Not generated,Generated"
|
|
bitfld.long 0x04 10. " MST ,Master mode" "Slave,Master"
|
|
bitfld.long 0x04 09. " TRX ,Transmitter mode" "Receiver,Transmitter"
|
|
textline " "
|
|
bitfld.long 0x04 08. " XA ,Expanded address mode" "7-bit,10-bit"
|
|
bitfld.long 0x04 07. " RM ,Repeat mode" "Non-repeat,Repeat"
|
|
bitfld.long 0x04 06. " DLB ,Digital loopback mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 05. " IRS ,I2C module reset" "Reset,No reset"
|
|
bitfld.long 0x04 04. " STB ,START byte mode" "Disabled,Enabled"
|
|
bitfld.long 0x04 03. " FDF ,Free data format mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0.--2. " BC ,Bit count" "8-bits/word,1-bit/word,2-bits/word,3-bits/word,4-bits/word,5-bits/word,6-bits/word,7-bits/word"
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "ICIVR,I2C Interrupt Vector Register"
|
|
bitfld.long 0x00 0.--2. " INTCODE ,Interrupt code" "None,AL,NACK,ARDY,ICRRDY,ICXRDY,SCD,AAS"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ICEMDR,I2C Extended Mode Register"
|
|
bitfld.long 0x00 1. " IGNACK ,Ignore NACK mode" "Not ignored,Ignored"
|
|
bitfld.long 0x00 0. " BCM ,Backward compatibility mode" "More data,Data copied"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "ICPSC,I2C Prescaler Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IPSC ,I2C prescaler divide-down value"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x34++0x7
|
|
line.long 0x00 "REVID1,I2C Revision Identification Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REVID1 ,Identifies revision of peripheral"
|
|
line.long 0x04 "REVID2,I2C Revision Identification Register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " REVID2 ,Peripheral Identification Number"
|
|
group.long 0x48++0x17
|
|
line.long 0x00 "ICPFUNC,I2C Pin Function Register"
|
|
bitfld.long 0x00 0. " PFUNC0 ,Controls the function of the I2C_SCL and I2C_SDA pins" "I2C_SCL & I2C_SDA,GPIO"
|
|
line.long 0x04 "ICPDIR,I2C Pin Direction Register"
|
|
bitfld.long 0x04 1. " PDIR1 ,Controls the direction of the I2C_SDA pin when configured as GPIO" "Input,Output"
|
|
bitfld.long 0x04 0. " PDIR0 ,Controls the direction of the I2C_SCL pin when configured as GPIO" "Input,Output"
|
|
line.long 0x08 "ICPDIN,I2C Pin Data In Register"
|
|
bitfld.long 0x08 1. " PDIN1 ,Indicates the logic level present on the I2C_SDA pin" "Low,High"
|
|
bitfld.long 0x08 0. " PDIN0 ,Indicates the logic level present on the I2C_SCL pin" "Low,High"
|
|
line.long 0x0c "ICPDOUT,I2C Pin Data Out Register"
|
|
bitfld.long 0x0c 1. " PDOUT1 ,Controls the level driven on the I2C_SDA pin when GPIO" "Low,High"
|
|
bitfld.long 0x0c 0. " PDOUT0 ,Controls the level driven on the I2C_SCL pin when GPIO" "Low,High"
|
|
line.long 0x10 "ICPDSET,I2C Pin Data Set Register"
|
|
bitfld.long 0x10 1. " PDSET1 ,Set the PDOUT1 bit in the I2C pin data out register" "Low,High"
|
|
bitfld.long 0x10 0. " PDSET0 ,Set the PDOUT0 bit in the I2C pin data out register" "Low,High"
|
|
line.long 0x14 "ICPDCLR,I2C Pin Data Clear Register"
|
|
bitfld.long 0x14 1. " PDCLR1 ,Clear the PDOUT1 bit in the I2C pin data out register" "Not cleared,Cleared"
|
|
bitfld.long 0x14 0. " PDCLR0 ,Clear the PDOUT0 bit in the I2C pin data out register" "Not cleared,Cleared"
|
|
else
|
|
rgroup.long 0x34++0x7
|
|
line.long 0x00 "ICPID1,I2C Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
line.long 0x04 "ICPID2,I2C Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYPE ,Peripheral type"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.open "MMC/SD (Multimedia Card/Secure Digital Card Controller)"
|
|
tree "MMC/SD 0"
|
|
base asd:0x01e11000
|
|
width 12.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "MMCTL,MMC Control Register"
|
|
bitfld.long 0x00 6.--7. " DATEG ,DAT3 edge detection select" "Disabled,Rising edge,Falling edge,Both"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x00 2. " WIDTH0 ,Data bus width bit 0" "1 bit,4 bits"
|
|
else
|
|
bitfld.long 0x00 2. " WIDTH ,Data bus width" "1 bit,4 bits"
|
|
endif
|
|
bitfld.long 0x00 1. " CMDRST ,CMD logic reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DATRST ,DAT logic reset" "No reset,Reset"
|
|
line.long 0x04 "MMCCLK,MMC Memory Clock Control Register"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x04 9. " DIV4 ,DIV4 option" "/(2*(CLKRT+1)),/(4*(CLKRT+1))"
|
|
endif
|
|
newline
|
|
bitfld.long 0x04 8. " CLKEN ,CLK pin enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CLKRT ,Clock rate. Use this field to set the divide-down value for the memory clock"
|
|
newline
|
|
hgroup.long 0x08++0x3
|
|
hide.long 0x00 "MMCST0,MMC Status Register 0"
|
|
in
|
|
newline
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x00 "MMCST1,MMC Status Register 1"
|
|
bitfld.long 0x00 6. " FIFOFUL ,FIFO is full" "Not full,Full"
|
|
bitfld.long 0x00 5. " FIFOEMP ,FIFO is empty" "Not empty,Empty"
|
|
bitfld.long 0x00 4. " DAT3ST ,DAT3 status" "Low,High"
|
|
bitfld.long 0x00 3. " DRFUL ,Data receive register (MMCDRR) is full" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 2. " DXEMP ,Data transmit register (MMCDXR) is empty" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " CLKSTP ,Clock stop status" "Active,Stopped"
|
|
bitfld.long 0x00 0. " BUSY ,Busy signal" "Not detected,Detected"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "MMCIM,MMC Interrupt Mask Register"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x00 13. " ECCS ,Command Completion Signal permission" "Prohibited,Permitted"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 12. " ETRNDNE ,Transfer done (TRNDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EDATED ,DAT3 edge detect (DATED) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EDRRDY ,Data receive register ready (DRRDY) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EDXRDY ,Data transmit register (MMCDXR) ready interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " ECRCRS ,Response CRC error (CRCRS) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ECRCRD ,Read-data CRC error (CRCRD) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ECRCWR ,Write-data CRC error (CRCWR) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ETOUTRS ,Response time-out event (TOUTRS) interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " ETOUTRD ,Read-data time-out event (TOUTRD) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ERSPDNE ,Command/response done (RSPDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EBSYDNE ,Busy done (BSYDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDATDNE ,Data done (DATDNE) interrupt enable" "Disabled,Enabled"
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "MMCTOR,MMC Response Time-Out Register"
|
|
sif cpuis("DM357")
|
|
hexmask.long.byte 0x00 8.--12. 1. " TOD_20_16 ,Data read time-out count upper 5 bits"
|
|
elif (cpuis("DM365")||cpuis("DM368"))
|
|
hexmask.long.word 0x00 8.--17. 1. " TOD_25_16 ,Data read time-out count upper 10 bits"
|
|
else
|
|
hexmask.long.byte 0x00 8.--15. 1. " TOD_23_16 ,Data read time-out count upper 8 bits"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " TOR ,Time-out count for response"
|
|
line.long 0x04 "MMCTOD,MMC Data Read Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TOD_15_0 ,Data read time-out count"
|
|
line.long 0x08 "MMCBLEN,MMC Block Length Register"
|
|
hexmask.long.word 0x08 0.--11. 1. " BLEN ,Block length"
|
|
line.long 0x0C "MMCNBLK,MMC Number of Blocks Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " NBLK ,Number of blocks"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "MMCNBLC,MMC Number of Blocks Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " NBLC ,Number of blocks remaining to be transferred"
|
|
group.long 0x28++0x7
|
|
line.long 0x00 "MMCDRR,MMC Data Receive Register"
|
|
line.long 0x04 "MMCDXR,MMC Data Transmit Register"
|
|
if (((d.l(asd:0x01e11000+0x30))&0x2000)==0x2000)
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "MMCCMD,MMC Command Register"
|
|
bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted"
|
|
bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer"
|
|
newline
|
|
bitfld.long 0x00 12. " STRMTP ,Stream enable" "Block,Stream"
|
|
bitfld.long 0x00 11. " DTRW ,Write enable" "Read,Write"
|
|
bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3"
|
|
bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index"
|
|
else
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "MMCCMD,MMC Command Register"
|
|
bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted"
|
|
bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3"
|
|
bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index"
|
|
endif
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "MMCARGHL,MMC Argument Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " ARGH ,Argument - high part"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARGL ,Argument - low part"
|
|
if ((((d.l(asd:0x01e11000+0x30))&0x600)==0x200)||(((d.l(asd:0x01e11000+0x30))&0x600)==0x600))
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3"
|
|
sif cpuis("DM357")
|
|
group.long 0x40++0x7
|
|
else
|
|
rgroup.long 0x40++0x7
|
|
endif
|
|
line.long 0x00 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MMCRSP5 ,MMC Response Register 5"
|
|
line.long 0x04 "MMCRSP67,MMC Response Register 6 and 7"
|
|
hexmask.long.word 0x04 16.--31. 1. " MMCRSP7 ,MMC Response Register 7"
|
|
hexmask.long.word 0x04 0.--15. 1. " MMCRSP6 ,MMC Response Register 6"
|
|
elif (((d.l(asd:0x01e11000+0x30))&0x600)==0x400)
|
|
sif cpuis("DM357")
|
|
group.long 0x38++0xF
|
|
else
|
|
rgroup.long 0x38++0xF
|
|
endif
|
|
line.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " MMCRSP1 ,MMC Response Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " MMCRSP0 ,MMC Response Register 0"
|
|
line.long 0x04 "MMCRSP23,MMC Response Register 2 and 3"
|
|
hexmask.long.word 0x04 16.--31. 1. " MMCRSP3 ,MMC Response Register 3"
|
|
hexmask.long.word 0x04 0.--15. 1. " MMCRSP2 ,MMC Response Register 2"
|
|
line.long 0x08 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hexmask.long.word 0x08 16.--31. 1. " MMCRSP5 ,MMC Response Register 5"
|
|
hexmask.long.word 0x08 0.--15. 1. " MMCRSP4 ,MMC Response Register 4"
|
|
line.long 0x0C "MMCRSP67,MMC Response Register 6 and 7"
|
|
hexmask.long.word 0x0C 16.--31. 1. " MMCRSP7 ,MMC Response Register 7"
|
|
hexmask.long.word 0x0C 0.--15. 1. " MMCRSP6 ,MMC Response Register 6"
|
|
else
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x00 "MMCRSP67,MMC Response Register 6 and 7"
|
|
endif
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "MMCDRSP,MMC Data Response Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DRSP ,CRC status token"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "MMCCIDX,MMC Command Index Register"
|
|
bitfld.long 0x00 7. " STRT ,Start bit" "0,1"
|
|
bitfld.long 0x00 6. " XMIT ,Transmission bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CIDX ,Command index"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "SDIOCTL,SDIO Control Register"
|
|
bitfld.long 0x00 1. " RDWTCR ,Read wait enable for CRC error" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDWTRQ ,Read wait request" "Ended,Set"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x00 "SDIOST0,SDIO Status Register 0"
|
|
bitfld.long 0x00 2. " RDWTST ,Read wait status" "Not in progress,In progress"
|
|
bitfld.long 0x00 1. " INTPRD ,Interrupt period" "Not in progress,In progress"
|
|
bitfld.long 0x00 0. " DAT1 ,External state of the SD_DATA1 pin" "Low,High"
|
|
group.long 0x6C++0xB
|
|
line.long 0x00 "SDIOIEN,SDIO Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " RWSEN ,Read wait interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IOINTEN ,SDIO card interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "SDIOIST,SDIO Interrupt Status Register"
|
|
eventfld.long 0x04 1. " RWS ,Read wait interrupt status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " IOINT ,SDIO card interrupt status" "Not occurred,Occurred"
|
|
line.long 0x08 "MMCFIFOCTL,MMC FIFO Control Register"
|
|
bitfld.long 0x08 3.--4. " ACCWD ,Access width" "4 bytes,3 bytes,2 bytes,1 byte"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "256 bits,512 bits"
|
|
else
|
|
bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "128 bits,256 bits"
|
|
endif
|
|
bitfld.long 0x08 1. " FIFODIR ,FIFO direction" "Read,Write"
|
|
bitfld.long 0x08 0. " FIFORST ,FIFO reset" "No reset,Reset"
|
|
width 0x0B
|
|
tree.end
|
|
tree "MMC/SD 1"
|
|
base asd:0x01e00000
|
|
width 12.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "MMCTL,MMC Control Register"
|
|
bitfld.long 0x00 6.--7. " DATEG ,DAT3 edge detection select" "Disabled,Rising edge,Falling edge,Both"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x00 2. " WIDTH0 ,Data bus width bit 0" "1 bit,4 bits"
|
|
else
|
|
bitfld.long 0x00 2. " WIDTH ,Data bus width" "1 bit,4 bits"
|
|
endif
|
|
bitfld.long 0x00 1. " CMDRST ,CMD logic reset" "No reset,Reset"
|
|
bitfld.long 0x00 0. " DATRST ,DAT logic reset" "No reset,Reset"
|
|
line.long 0x04 "MMCCLK,MMC Memory Clock Control Register"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x04 9. " DIV4 ,DIV4 option" "/(2*(CLKRT+1)),/(4*(CLKRT+1))"
|
|
endif
|
|
newline
|
|
bitfld.long 0x04 8. " CLKEN ,CLK pin enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 0.--7. 1. " CLKRT ,Clock rate. Use this field to set the divide-down value for the memory clock"
|
|
newline
|
|
hgroup.long 0x08++0x3
|
|
hide.long 0x00 "MMCST0,MMC Status Register 0"
|
|
in
|
|
newline
|
|
rgroup.long 0x0C++0x3
|
|
line.long 0x00 "MMCST1,MMC Status Register 1"
|
|
bitfld.long 0x00 6. " FIFOFUL ,FIFO is full" "Not full,Full"
|
|
bitfld.long 0x00 5. " FIFOEMP ,FIFO is empty" "Not empty,Empty"
|
|
bitfld.long 0x00 4. " DAT3ST ,DAT3 status" "Low,High"
|
|
bitfld.long 0x00 3. " DRFUL ,Data receive register (MMCDRR) is full" "Not detected,Detected"
|
|
newline
|
|
bitfld.long 0x00 2. " DXEMP ,Data transmit register (MMCDXR) is empty" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " CLKSTP ,Clock stop status" "Active,Stopped"
|
|
bitfld.long 0x00 0. " BUSY ,Busy signal" "Not detected,Detected"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "MMCIM,MMC Interrupt Mask Register"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x00 13. " ECCS ,Command Completion Signal permission" "Prohibited,Permitted"
|
|
endif
|
|
newline
|
|
bitfld.long 0x00 12. " ETRNDNE ,Transfer done (TRNDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " EDATED ,DAT3 edge detect (DATED) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EDRRDY ,Data receive register ready (DRRDY) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " EDXRDY ,Data transmit register (MMCDXR) ready interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " ECRCRS ,Response CRC error (CRCRS) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ECRCRD ,Read-data CRC error (CRCRD) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " ECRCWR ,Write-data CRC error (CRCWR) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ETOUTRS ,Response time-out event (TOUTRS) interrupt enable" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 3. " ETOUTRD ,Read-data time-out event (TOUTRD) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ERSPDNE ,Command/response done (RSPDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " EBSYDNE ,Busy done (BSYDNE) interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EDATDNE ,Data done (DATDNE) interrupt enable" "Disabled,Enabled"
|
|
group.long 0x14++0x0F
|
|
line.long 0x00 "MMCTOR,MMC Response Time-Out Register"
|
|
sif cpuis("DM357")
|
|
hexmask.long.byte 0x00 8.--12. 1. " TOD_20_16 ,Data read time-out count upper 5 bits"
|
|
elif (cpuis("DM365")||cpuis("DM368"))
|
|
hexmask.long.word 0x00 8.--17. 1. " TOD_25_16 ,Data read time-out count upper 10 bits"
|
|
else
|
|
hexmask.long.byte 0x00 8.--15. 1. " TOD_23_16 ,Data read time-out count upper 8 bits"
|
|
endif
|
|
newline
|
|
hexmask.long.byte 0x00 0.--7. 1. " TOR ,Time-out count for response"
|
|
line.long 0x04 "MMCTOD,MMC Data Read Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TOD_15_0 ,Data read time-out count"
|
|
line.long 0x08 "MMCBLEN,MMC Block Length Register"
|
|
hexmask.long.word 0x08 0.--11. 1. " BLEN ,Block length"
|
|
line.long 0x0C "MMCNBLK,MMC Number of Blocks Register"
|
|
hexmask.long.word 0x0C 0.--15. 1. " NBLK ,Number of blocks"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "MMCNBLC,MMC Number of Blocks Counter Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " NBLC ,Number of blocks remaining to be transferred"
|
|
group.long 0x28++0x7
|
|
line.long 0x00 "MMCDRR,MMC Data Receive Register"
|
|
line.long 0x04 "MMCDXR,MMC Data Transmit Register"
|
|
if (((d.l(asd:0x01e00000+0x30))&0x2000)==0x2000)
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "MMCCMD,MMC Command Register"
|
|
bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted"
|
|
bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer"
|
|
newline
|
|
bitfld.long 0x00 12. " STRMTP ,Stream enable" "Block,Stream"
|
|
bitfld.long 0x00 11. " DTRW ,Write enable" "Read,Write"
|
|
bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3"
|
|
bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index"
|
|
else
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "MMCCMD,MMC Command Register"
|
|
bitfld.long 0x00 16. " DMATRIG ,DMA transfer event generation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " DCLR ,Data receive/transmit clear" "Not cleared,Cleared"
|
|
bitfld.long 0x00 14. " INITCK ,Initialization clock cycles" "Not inserted,Inserted"
|
|
bitfld.long 0x00 13. " WDATX ,Data transfer indicator" "No data,Data transfer"
|
|
newline
|
|
bitfld.long 0x00 9.--10. " RSPFMT ,Response format" "No response,R1/R4/R5/R6,R2,R3"
|
|
bitfld.long 0x00 8. " BSYEXP ,Busy expected" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PPLEN ,Push pull enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CMD ,Command index"
|
|
endif
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "MMCARGHL,MMC Argument Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " ARGH ,Argument - high part"
|
|
hexmask.long.word 0x00 0.--15. 1. " ARGL ,Argument - low part"
|
|
if ((((d.l(asd:0x01e00000+0x30))&0x600)==0x200)||(((d.l(asd:0x01e00000+0x30))&0x600)==0x600))
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3"
|
|
sif cpuis("DM357")
|
|
group.long 0x40++0x7
|
|
else
|
|
rgroup.long 0x40++0x7
|
|
endif
|
|
line.long 0x00 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MMCRSP5 ,MMC Response Register 5"
|
|
line.long 0x04 "MMCRSP67,MMC Response Register 6 and 7"
|
|
hexmask.long.word 0x04 16.--31. 1. " MMCRSP7 ,MMC Response Register 7"
|
|
hexmask.long.word 0x04 0.--15. 1. " MMCRSP6 ,MMC Response Register 6"
|
|
elif (((d.l(asd:0x01e00000+0x30))&0x600)==0x400)
|
|
sif cpuis("DM357")
|
|
group.long 0x38++0xF
|
|
else
|
|
rgroup.long 0x38++0xF
|
|
endif
|
|
line.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hexmask.long.word 0x00 16.--31. 1. " MMCRSP1 ,MMC Response Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " MMCRSP0 ,MMC Response Register 0"
|
|
line.long 0x04 "MMCRSP23,MMC Response Register 2 and 3"
|
|
hexmask.long.word 0x04 16.--31. 1. " MMCRSP3 ,MMC Response Register 3"
|
|
hexmask.long.word 0x04 0.--15. 1. " MMCRSP2 ,MMC Response Register 2"
|
|
line.long 0x08 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hexmask.long.word 0x08 16.--31. 1. " MMCRSP5 ,MMC Response Register 5"
|
|
hexmask.long.word 0x08 0.--15. 1. " MMCRSP4 ,MMC Response Register 4"
|
|
line.long 0x0C "MMCRSP67,MMC Response Register 6 and 7"
|
|
hexmask.long.word 0x0C 16.--31. 1. " MMCRSP7 ,MMC Response Register 7"
|
|
hexmask.long.word 0x0C 0.--15. 1. " MMCRSP6 ,MMC Response Register 6"
|
|
else
|
|
hgroup.long 0x38++0x3
|
|
hide.long 0x00 "MMCRSP01,MMC Response Register 0 and 1"
|
|
hgroup.long 0x3C++0x3
|
|
hide.long 0x00 "MMCRSP23,MMC Response Register 2 and 3"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "MMCRSP45,MMC Response Register 4 and 5"
|
|
hgroup.long 0x44++0x3
|
|
hide.long 0x00 "MMCRSP67,MMC Response Register 6 and 7"
|
|
endif
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "MMCDRSP,MMC Data Response Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DRSP ,CRC status token"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "MMCCIDX,MMC Command Index Register"
|
|
bitfld.long 0x00 7. " STRT ,Start bit" "0,1"
|
|
bitfld.long 0x00 6. " XMIT ,Transmission bit" "0,1"
|
|
hexmask.long.byte 0x00 0.--5. 1. " CIDX ,Command index"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "SDIOCTL,SDIO Control Register"
|
|
bitfld.long 0x00 1. " RDWTCR ,Read wait enable for CRC error" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RDWTRQ ,Read wait request" "Ended,Set"
|
|
rgroup.long 0x68++0x3
|
|
line.long 0x00 "SDIOST0,SDIO Status Register 0"
|
|
bitfld.long 0x00 2. " RDWTST ,Read wait status" "Not in progress,In progress"
|
|
bitfld.long 0x00 1. " INTPRD ,Interrupt period" "Not in progress,In progress"
|
|
bitfld.long 0x00 0. " DAT1 ,External state of the SD_DATA1 pin" "Low,High"
|
|
group.long 0x6C++0xB
|
|
line.long 0x00 "SDIOIEN,SDIO Interrupt Enable Register"
|
|
bitfld.long 0x00 1. " RWSEN ,Read wait interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " IOINTEN ,SDIO card interrupt enable" "Disabled,Enabled"
|
|
line.long 0x04 "SDIOIST,SDIO Interrupt Status Register"
|
|
eventfld.long 0x04 1. " RWS ,Read wait interrupt status" "Not occurred,Occurred"
|
|
eventfld.long 0x04 0. " IOINT ,SDIO card interrupt status" "Not occurred,Occurred"
|
|
line.long 0x08 "MMCFIFOCTL,MMC FIFO Control Register"
|
|
bitfld.long 0x08 3.--4. " ACCWD ,Access width" "4 bytes,3 bytes,2 bytes,1 byte"
|
|
sif (cpuis("DM365")||cpuis("DM368"))
|
|
bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "256 bits,512 bits"
|
|
else
|
|
bitfld.long 0x08 2. " FIFOLEV ,FIFO level" "128 bits,256 bits"
|
|
endif
|
|
bitfld.long 0x08 1. " FIFODIR ,FIFO direction" "Read,Write"
|
|
bitfld.long 0x08 0. " FIFORST ,FIFO reset" "No reset,Reset"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "PWM (Pulse-Width Modulator)"
|
|
tree "PWM 0"
|
|
width 7.
|
|
base asd:0x01c22000
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PWM0 Peripheral Identification Register"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number"
|
|
hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number"
|
|
else
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "PCR,PWM0 Peripheral Control Register"
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running"
|
|
line.long 0x04 "CFG,PWM0 Configuration Register"
|
|
bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running"
|
|
bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High"
|
|
bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High"
|
|
bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High"
|
|
bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..."
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "START,PWM0 Start Register"
|
|
bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "RPT,PWM0 Repeat Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)"
|
|
line.long 0x04 "PER,PWM0 Period Register"
|
|
line.long 0x08 "PH1D,PWM0 First-Phase Duration Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 1"
|
|
width 7.
|
|
base asd:0x01c22400
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PWM1 Peripheral Identification Register"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number"
|
|
hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number"
|
|
else
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "PCR,PWM1 Peripheral Control Register"
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running"
|
|
line.long 0x04 "CFG,PWM1 Configuration Register"
|
|
bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running"
|
|
bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High"
|
|
bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High"
|
|
bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High"
|
|
bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..."
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "START,PWM1 Start Register"
|
|
bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "RPT,PWM1 Repeat Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)"
|
|
line.long 0x04 "PER,PWM1 Period Register"
|
|
line.long 0x08 "PH1D,PWM1 First-Phase Duration Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 2"
|
|
width 7.
|
|
base asd:0x01c22800
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PWM2 Peripheral Identification Register"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number"
|
|
hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number"
|
|
else
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "PCR,PWM2 Peripheral Control Register"
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running"
|
|
line.long 0x04 "CFG,PWM2 Configuration Register"
|
|
bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running"
|
|
bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High"
|
|
bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High"
|
|
bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High"
|
|
bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..."
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "START,PWM2 Start Register"
|
|
bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "RPT,PWM2 Repeat Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)"
|
|
line.long 0x04 "PER,PWM2 Period Register"
|
|
line.long 0x08 "PH1D,PWM2 First-Phase Duration Register"
|
|
width 0xb
|
|
tree.end
|
|
tree "PWM 3"
|
|
width 7.
|
|
base asd:0x01c22c00
|
|
sif (cpu()!="DM357")
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PWM3 Peripheral Identification Register"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number"
|
|
hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number"
|
|
else
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
endif
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "PCR,PWM3 Peripheral Control Register"
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Immediately stop,Free-running"
|
|
line.long 0x04 "CFG,PWM3 Configuration Register"
|
|
bitfld.long 0x04 17. " OPST ,PWM operation status" "Idle,Running"
|
|
bitfld.long 0x04 16. " CURLEV ,PWM output status" "Low,High"
|
|
bitfld.long 0x04 6. " INTEN ,Interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " INACTOUT ,Inactive output level" "Low,High"
|
|
bitfld.long 0x04 4. " P1OUT ,First-phase output level" "Low,High"
|
|
bitfld.long 0x04 2.--3. " EVTRIG ,Event trigger" "Disabled,Positive edge,Negative edge,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " MODE ,Operationg mode" "Disabled,One shot,Continuous,?..."
|
|
wgroup.long 0x0c++0x3
|
|
line.long 0x00 "START,PWM3 Start Register"
|
|
bitfld.long 0x00 0. " START ,PWM start bit" "No effect,Start"
|
|
group.long 0x10++0xb
|
|
line.long 0x00 "RPT,PWM3 Repeat Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RPT ,One-shot mode repeat count (RPT+1)"
|
|
line.long 0x04 "PER,PWM3 Period Register"
|
|
line.long 0x08 "PH1D,PWM3 First-Phase Duration Register"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "SPI (Serial Port Interface)"
|
|
tree "SPI 0"
|
|
base asd:0x01c66000
|
|
width 10.
|
|
group.long 0x00++0xf
|
|
line.long 0x00 "SPIGCR0,SPI Global Control Register 0"
|
|
bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset"
|
|
line.long 0x04 "SPIGCR1,SPI Global Control Register 1"
|
|
bitfld.long 0x04 24. " SPIENA ,SPI enable" "Reset,Enabled"
|
|
bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CLKMOD ,Clock mode" "Reserved,Enabled"
|
|
bitfld.long 0x04 0. " MASTER ,Master mode" "Reserved,Enabled"
|
|
line.long 0x08 "SPIINT,SPI Interrupt Register"
|
|
bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Not used,Used"
|
|
bitfld.long 0x08 8. " RXINTEN ,Receive interrupt enable" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x08 6. " OVRNINTEN ,Overrun interrupt enable" "Not generated,Generated"
|
|
bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt"
|
|
line.long 0x0c "SPILVL,SPI Interrupt Level Register"
|
|
bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1"
|
|
bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1"
|
|
endif
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "SPIFLG,SPI Flag Register"
|
|
in
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SPIPC0,SPI Pin Control Register 0"
|
|
bitfld.long 0x00 11. " DIFUN ,SPI data input (SPI_DI) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 10. " DOFUN ,SPI data output (SPI_DO) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 9. " CLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1FUN ,SPI slave 1 (SPI_EN1) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 0. " EN0FUN ,SPI slave 0 (SPI_EN0) functional pin" "Reserved,Functional"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "SPIPC2,SPI Pin Control Register 2"
|
|
bitfld.long 0x00 11. " DIDIN ,SPI data input (SPI_DI) pin value" "0,1"
|
|
bitfld.long 0x00 10. " DODIN ,SPI data output (SPI_DO) pin value" "0,1"
|
|
bitfld.long 0x00 9. " CLKDIN ,SPI clock (SPI_CLK) pin value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1DIN ,SPI slave 1 (SPI_EN1) pin value" "0,1"
|
|
bitfld.long 0x00 0. " EN0DIN ,SPI slave 0 (SPI_EN0) pin value" "0,1"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "SPIDAT1,SPI Shift Register"
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPI_EN1,/SPI_EN0,None"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,SPI shift data 1"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "SPIBUF,SPI Buffer Register"
|
|
in
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x00 "SPIEMU,SPI Emulation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation"
|
|
group.long 0x48++0x7
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay"
|
|
hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
line.long 0x04 "SPIDEF,SPI Default Chip Select Register"
|
|
bitfld.long 0x04 1. " EN1DEF ,Chip select default pattern" "0,1"
|
|
bitfld.long 0x04 0. " EN0DEF ,Chip select default pattern" "0,1"
|
|
width 10.
|
|
group.long 0x50++0xf
|
|
line.long 0x0 "SPIFMT0,SPI Data Format Register 0"
|
|
bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first"
|
|
bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0"
|
|
textline " "
|
|
bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x4 "SPIFMT1,SPI Data Format Register 1"
|
|
bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first"
|
|
bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1"
|
|
textline " "
|
|
bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x8 "SPIFMT2,SPI Data Format Register 2"
|
|
bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first"
|
|
bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2"
|
|
textline " "
|
|
bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0xC "SPIFMT3,SPI Data Format Register 3"
|
|
bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first"
|
|
bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3"
|
|
textline " "
|
|
bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "SPI 1"
|
|
base asd:0x01c66800
|
|
width 10.
|
|
group.long 0x00++0xf
|
|
line.long 0x00 "SPIGCR0,SPI Global Control Register 0"
|
|
bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset"
|
|
line.long 0x04 "SPIGCR1,SPI Global Control Register 1"
|
|
bitfld.long 0x04 24. " SPIENA ,SPI enable" "Reset,Enabled"
|
|
bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CLKMOD ,Clock mode" "Reserved,Enabled"
|
|
bitfld.long 0x04 0. " MASTER ,Master mode" "Reserved,Enabled"
|
|
line.long 0x08 "SPIINT,SPI Interrupt Register"
|
|
bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Not used,Used"
|
|
bitfld.long 0x08 8. " RXINTEN ,Receive interrupt enable" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x08 6. " OVRNINTEN ,Overrun interrupt enable" "Not generated,Generated"
|
|
bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt"
|
|
line.long 0x0c "SPILVL,SPI Interrupt Level Register"
|
|
bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1"
|
|
bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1"
|
|
endif
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "SPIFLG,SPI Flag Register"
|
|
in
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SPIPC0,SPI Pin Control Register 0"
|
|
bitfld.long 0x00 11. " DIFUN ,SPI data input (SPI_DI) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 10. " DOFUN ,SPI data output (SPI_DO) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 9. " CLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1FUN ,SPI slave 1 (SPI_EN1) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 0. " EN0FUN ,SPI slave 0 (SPI_EN0) functional pin" "Reserved,Functional"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "SPIPC2,SPI Pin Control Register 2"
|
|
bitfld.long 0x00 11. " DIDIN ,SPI data input (SPI_DI) pin value" "0,1"
|
|
bitfld.long 0x00 10. " DODIN ,SPI data output (SPI_DO) pin value" "0,1"
|
|
bitfld.long 0x00 9. " CLKDIN ,SPI clock (SPI_CLK) pin value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1DIN ,SPI slave 1 (SPI_EN1) pin value" "0,1"
|
|
bitfld.long 0x00 0. " EN0DIN ,SPI slave 0 (SPI_EN0) pin value" "0,1"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "SPIDAT1,SPI Shift Register"
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPI_EN1,/SPI_EN0,None"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,SPI shift data 1"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "SPIBUF,SPI Buffer Register"
|
|
in
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x00 "SPIEMU,SPI Emulation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation"
|
|
group.long 0x48++0x7
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay"
|
|
hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
line.long 0x04 "SPIDEF,SPI Default Chip Select Register"
|
|
bitfld.long 0x04 1. " EN1DEF ,Chip select default pattern" "0,1"
|
|
bitfld.long 0x04 0. " EN0DEF ,Chip select default pattern" "0,1"
|
|
width 10.
|
|
group.long 0x50++0xf
|
|
line.long 0x0 "SPIFMT0,SPI Data Format Register 0"
|
|
bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first"
|
|
bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0"
|
|
textline " "
|
|
bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x4 "SPIFMT1,SPI Data Format Register 1"
|
|
bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first"
|
|
bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1"
|
|
textline " "
|
|
bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x8 "SPIFMT2,SPI Data Format Register 2"
|
|
bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first"
|
|
bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2"
|
|
textline " "
|
|
bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0xC "SPIFMT3,SPI Data Format Register 3"
|
|
bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first"
|
|
bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3"
|
|
textline " "
|
|
bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree "SPI 2"
|
|
base asd:0x01c67800
|
|
width 10.
|
|
group.long 0x00++0xf
|
|
line.long 0x00 "SPIGCR0,SPI Global Control Register 0"
|
|
bitfld.long 0x00 0. " RESET ,Reset bit for the SPI module" "Reset,No reset"
|
|
line.long 0x04 "SPIGCR1,SPI Global Control Register 1"
|
|
bitfld.long 0x04 24. " SPIENA ,SPI enable" "Reset,Enabled"
|
|
bitfld.long 0x04 16. " LOOPBACK ,Internal loop-back test mode" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CLKMOD ,Clock mode" "Reserved,Enabled"
|
|
bitfld.long 0x04 0. " MASTER ,Master mode" "Reserved,Enabled"
|
|
line.long 0x08 "SPIINT,SPI Interrupt Register"
|
|
bitfld.long 0x08 16. " DMAREQEN ,DMA request enable" "Not used,Used"
|
|
bitfld.long 0x08 8. " RXINTEN ,Receive interrupt enable" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.long 0x08 6. " OVRNINTEN ,Overrun interrupt enable" "Not generated,Generated"
|
|
bitfld.long 0x08 4. " BITERRENA ,Enables interrupt on bit error" "No interrupt,Interrupt"
|
|
line.long 0x0c "SPILVL,SPI Interrupt Level Register"
|
|
bitfld.long 0x0c 8. " RXINTLVL ,Receive interrupt level" "INT0,INT1"
|
|
bitfld.long 0x0c 6. " OVRNINTLVL ,Receive overrun interrupt level" "INT0,INT1"
|
|
textline " "
|
|
bitfld.long 0x0c 4. " BITERRLVL ,Bit error interrupt level" "INT0,INT1"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x0c 2. " PARERRLVL ,Parity error interrupt level" "INT0,INT1"
|
|
endif
|
|
hgroup.long 0x10++0x3
|
|
hide.long 0x00 "SPIFLG,SPI Flag Register"
|
|
in
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "SPIPC0,SPI Pin Control Register 0"
|
|
bitfld.long 0x00 11. " DIFUN ,SPI data input (SPI_DI) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 10. " DOFUN ,SPI data output (SPI_DO) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 9. " CLKFUN ,SPI clock (SPI_CLK) functional pin" "Reserved,Functional"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1FUN ,SPI slave 1 (SPI_EN1) functional pin" "Reserved,Functional"
|
|
bitfld.long 0x00 0. " EN0FUN ,SPI slave 0 (SPI_EN0) functional pin" "Reserved,Functional"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "SPIPC2,SPI Pin Control Register 2"
|
|
bitfld.long 0x00 11. " DIDIN ,SPI data input (SPI_DI) pin value" "0,1"
|
|
bitfld.long 0x00 10. " DODIN ,SPI data output (SPI_DO) pin value" "0,1"
|
|
bitfld.long 0x00 9. " CLKDIN ,SPI clock (SPI_CLK) pin value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EN1DIN ,SPI slave 1 (SPI_EN1) pin value" "0,1"
|
|
bitfld.long 0x00 0. " EN0DIN ,SPI slave 0 (SPI_EN0) pin value" "0,1"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "SPIDAT1,SPI Shift Register"
|
|
bitfld.long 0x00 28. " CSHOLD ,Chip select hold mode" "Deactivated,Active"
|
|
bitfld.long 0x00 24.--25. " DFSEL ,Data word format select" "0,1,2,3"
|
|
bitfld.long 0x00 16.--17. " CSNR ,Chip select number" "Both,/SPI_EN1,/SPI_EN0,None"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIDAT1 ,SPI shift data 1"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "SPIBUF,SPI Buffer Register"
|
|
in
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x00 "SPIEMU,SPI Emulation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " SPIEMU ,SPI emulation"
|
|
group.long 0x48++0x7
|
|
line.long 0x00 "SPIDELAY,SPI Delay Register"
|
|
hexmask.long.byte 0x00 24.--28. 1. " C2TDELAY ,Chip-select-active-to-transmit-start-delay"
|
|
hexmask.long.byte 0x00 16.--20. 1. " T2CDELAY ,Transmit-end-to-chip-select-inactive-delay"
|
|
line.long 0x04 "SPIDEF,SPI Default Chip Select Register"
|
|
bitfld.long 0x04 1. " EN1DEF ,Chip select default pattern" "0,1"
|
|
bitfld.long 0x04 0. " EN0DEF ,Chip select default pattern" "0,1"
|
|
width 10.
|
|
group.long 0x50++0xf
|
|
line.long 0x0 "SPIFMT0,SPI Data Format Register 0"
|
|
bitfld.long 0x0 20. " SHIFTDIR0 ,Shift direction for data format 0" "MSB first,LSB first"
|
|
bitfld.long 0x0 17. " POLARITY0 ,Clock polarity for data format 0" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x0 16. " PHASE0 ,Clock delay for data format 0" "No delay,Half cycle"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRESCALE0[7:0] ,Prescaler for data format 0"
|
|
textline " "
|
|
bitfld.long 0x0 0.--4. " CHARLEN0[4:0] ,Data word lenght for data format 0" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x4 "SPIFMT1,SPI Data Format Register 1"
|
|
bitfld.long 0x4 20. " SHIFTDIR1 ,Shift direction for data format 1" "MSB first,LSB first"
|
|
bitfld.long 0x4 17. " POLARITY1 ,Clock polarity for data format 1" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x4 16. " PHASE1 ,Clock delay for data format 1" "No delay,Half cycle"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRESCALE1[7:0] ,Prescaler for data format 1"
|
|
textline " "
|
|
bitfld.long 0x4 0.--4. " CHARLEN1[4:0] ,Data word lenght for data format 1" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0x8 "SPIFMT2,SPI Data Format Register 2"
|
|
bitfld.long 0x8 20. " SHIFTDIR2 ,Shift direction for data format 2" "MSB first,LSB first"
|
|
bitfld.long 0x8 17. " POLARITY2 ,Clock polarity for data format 2" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0x8 16. " PHASE2 ,Clock delay for data format 2" "No delay,Half cycle"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRESCALE2[7:0] ,Prescaler for data format 2"
|
|
textline " "
|
|
bitfld.long 0x8 0.--4. " CHARLEN2[4:0] ,Data word lenght for data format 2" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
line.long 0xC "SPIFMT3,SPI Data Format Register 3"
|
|
bitfld.long 0xC 20. " SHIFTDIR3 ,Shift direction for data format 3" "MSB first,LSB first"
|
|
bitfld.long 0xC 17. " POLARITY3 ,Clock polarity for data format 3" "Low-inactive,High-inactive"
|
|
textline " "
|
|
bitfld.long 0xC 16. " PHASE3 ,Clock delay for data format 3" "No delay,Half cycle"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRESCALE3[7:0] ,Prescaler for data format 3"
|
|
textline " "
|
|
bitfld.long 0xC 0.--4. " CHARLEN3[4:0] ,Data word lenght for data format 3" "Not detected,Not detected,2 bits,3 bits,4 bits,5 bits,6 bits,7 bits,8 bits,9 bits,10 bits,11 bits,12 bits,13 bits,14 bits,15 bits,16 bits,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected,Not detected"
|
|
hgroup.long 0x60++0x3
|
|
hide.long 0x00 "INTVECT0,SPI Interrupt Vector Register 0"
|
|
in
|
|
hgroup.long 0x64++0x03
|
|
hide.long 0x00 "INTVECT1,SPI Interrupt Vector Register 1"
|
|
in
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "64-Bit Timer"
|
|
tree "Timer 0/1"
|
|
base asd:0x01c21400
|
|
width 15.
|
|
sif (cpu()=="DM335")
|
|
tree "PID12 for timers 0/1/2"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
tree.end
|
|
tree "PID12 for timer 3"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
elif (cpu()=="DM357")
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer"
|
|
else
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EMUMGT,Emulation Management Register"
|
|
bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish"
|
|
bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "TIM12,Timer Counter Register"
|
|
line.long 0x04 "TIM34,Timer Counter Register"
|
|
line.long 0x08 "PRD12,Timer Period Register"
|
|
line.long 0x0c "PRD34,Timer Period Register"
|
|
line.long 0x10 "TCR,Timer Control Register"
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
textline " "
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
line.long 0x14 "TGCR,Timer Global Control Register"
|
|
hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio"
|
|
hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
else
|
|
bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled"
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset"
|
|
bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset"
|
|
sif (cpu()=="DM357")
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "WDTCR,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key"
|
|
bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()!="DM357")
|
|
group.long 0x34++0x13
|
|
line.long 0x00 "REL12,Timer Reload Register 12 Register"
|
|
line.long 0x04 "REL34,Timer Reload Register 34 Register"
|
|
line.long 0x08 "CAP12,Timer Capture Register 12 Register"
|
|
line.long 0x0c "CAP34,Timer Capture Register 34 Register"
|
|
line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register"
|
|
bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "Timer 2/3"
|
|
base asd:0x01c21800
|
|
width 15.
|
|
sif (cpu()=="DM335")
|
|
tree "PID12 for timers 0/1/2"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
tree.end
|
|
tree "PID12 for timer 3"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
elif (cpu()=="DM357")
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer"
|
|
else
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EMUMGT,Emulation Management Register"
|
|
bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish"
|
|
bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "TIM12,Timer Counter Register"
|
|
line.long 0x04 "TIM34,Timer Counter Register"
|
|
line.long 0x08 "PRD12,Timer Period Register"
|
|
line.long 0x0c "PRD34,Timer Period Register"
|
|
line.long 0x10 "TCR,Timer Control Register"
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
textline " "
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
line.long 0x14 "TGCR,Timer Global Control Register"
|
|
hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio"
|
|
hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
else
|
|
bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled"
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset"
|
|
bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset"
|
|
sif (cpu()=="DM357")
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "WDTCR,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key"
|
|
bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()!="DM357")
|
|
group.long 0x34++0x13
|
|
line.long 0x00 "REL12,Timer Reload Register 12 Register"
|
|
line.long 0x04 "REL34,Timer Reload Register 34 Register"
|
|
line.long 0x08 "CAP12,Timer Capture Register 12 Register"
|
|
line.long 0x0c "CAP34,Timer Capture Register 34 Register"
|
|
line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register"
|
|
bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "Timer 4/5"
|
|
base asd:0x01c20800
|
|
width 15.
|
|
sif (cpu()=="DM335")
|
|
tree "PID12 for timers 0/1/2"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
tree.end
|
|
tree "PID12 for timer 3"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
elif (cpu()=="DM357")
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of the timer"
|
|
else
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EMUMGT,Emulation Management Register"
|
|
bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish"
|
|
bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "TIM12,Timer Counter Register"
|
|
line.long 0x04 "TIM34,Timer Counter Register"
|
|
line.long 0x08 "PRD12,Timer Period Register"
|
|
line.long 0x0c "PRD34,Timer Period Register"
|
|
line.long 0x10 "TCR,Timer Control Register"
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
textline " "
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
line.long 0x14 "TGCR,Timer Global Control Register"
|
|
hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio"
|
|
hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
else
|
|
bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled"
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset"
|
|
bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset"
|
|
sif (cpu()=="DM357")
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "WDTCR,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key"
|
|
bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "WDTCR,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key"
|
|
bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()!="DM357")
|
|
group.long 0x34++0x13
|
|
line.long 0x00 "REL12,Timer Reload Register 12 Register"
|
|
line.long 0x04 "REL34,Timer Reload Register 34 Register"
|
|
line.long 0x08 "CAP12,Timer Capture Register 12 Register"
|
|
line.long 0x0c "CAP34,Timer Capture Register 34 Register"
|
|
line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register"
|
|
bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "WatchDog Timer"
|
|
base asd:0x01c21c00
|
|
width 15.
|
|
sif (cpu()=="DM335")
|
|
tree "PID12 for timers 0/1/2"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
tree.end
|
|
tree "PID12 for timer 3"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
tree.end
|
|
elif (cpu()=="DM357")
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major number" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Custom" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " MINOR ,Minor Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "PID12,Peripheral Identification Register 12"
|
|
hexmask.long.byte 0x00 16.--22. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REVISION ,Revision of peripheral"
|
|
endif
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "EMUMGT,Emulation Management Register"
|
|
bitfld.long 0x00 1. " SOFT ,Emulation suspend event stop mode" "Immediately,After finish"
|
|
bitfld.long 0x00 0. " FREE ,Emulation suspend event response" "SOFT bit select,Free-running"
|
|
group.long 0x10++0x17
|
|
line.long 0x00 "TIM12,Timer Counter Register"
|
|
line.long 0x04 "TIM34,Timer Counter Register"
|
|
line.long 0x08 "PRD12,Timer Period Register"
|
|
line.long 0x0c "PRD34,Timer Period Register"
|
|
line.long 0x10 "TCR,Timer Control Register"
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 28.--29. " CAPEVTMODE34 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 27. " CAPMODE34 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 26. " READRSTMODE34 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " CLKSRC34 ,Clock source" "Internal,External"
|
|
textline " "
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 22.--23. " ENAMODE34 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
textline " "
|
|
sif (cpu()!="DM357")
|
|
bitfld.long 0x10 12.--13. " CAPVTMODE12 ,Capture event mode" "Rising edge,Falling edge,Both edge,?..."
|
|
bitfld.long 0x10 11. " CAPMODE12 ,Capture mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 10. " READRSTMODE12 ,Read reset mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,Enabled continously reload"
|
|
else
|
|
bitfld.long 0x10 8. " CLKSRC12 ,Clock source" "Internal,INPUT_PIN"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " ENAMODE12 ,Enabling mode" "Disabled,Enabled once,Enabled continously,?..."
|
|
endif
|
|
line.long 0x14 "TGCR,Timer Global Control Register"
|
|
hexmask.long.byte 0x14 12.--15. 1. " TDDR34 ,Timer divide-down ratio"
|
|
hexmask.long.byte 0x14 8.--11. 1. " PSC34 ,Count for timer 3:4"
|
|
textline " "
|
|
sif (cpu()=="DM357")
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
else
|
|
bitfld.long 0x14 4. " BW_COMPATIBLE ,Timer backward compatible" "Disabled,Enabled"
|
|
bitfld.long 0x14 2.--3. " TIMMODE ,Timer mode" "64-bit GP,32-bit unchained,64-bit watchdog,32-bit chained"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x14 1. " TIM34RS ,Timer 3:4 reset" "Reset,No reset"
|
|
bitfld.long 0x14 0. " TIM12RS ,Timer 1:2 reset" "Reset,No reset"
|
|
sif (cpu()=="DM357")
|
|
else
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "WDTCR,Watchdog Timer Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WDKEY ,16-bit watchdog timer service key"
|
|
bitfld.long 0x00 15. " WDFLAG ,Watchdog flag" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " WDEN ,Watchdog timer enable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()!="DM357")
|
|
group.long 0x34++0x13
|
|
line.long 0x00 "REL12,Timer Reload Register 12 Register"
|
|
line.long 0x04 "REL34,Timer Reload Register 34 Register"
|
|
line.long 0x08 "CAP12,Timer Capture Register 12 Register"
|
|
line.long 0x0c "CAP34,Timer Capture Register 34 Register"
|
|
line.long 0x10 "INTCTL_STAT,Timer Interrupt Control and Status Register"
|
|
bitfld.long 0x10 31. " SET34 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 30. " EVAL34 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 19. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 18. " EVT_INT_EN34 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CMP_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 16. " CMP_INT_EN34 ,Enable interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SET12 ,Interrupt even" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 14. " EVAL12 ,Interrupt eval" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x10 3. " EVT_INT_STAT34 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 2. " EVT_INT_EN12 ,Enables the interrupt generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " CMP_INT_STAT12 ,Interrupt status" "No interrupt,Interrupt"
|
|
bitfld.long 0x10 0. " CMP_INT_EN12 ,Enable interrupt generation" "Disabled,Enabled"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.open "UART (Universal Asynchronous Receiver/Transmitter)"
|
|
tree "UART 0"
|
|
base asd:0x01c20000
|
|
width 13.
|
|
if (((d.l(asd:0x01c20000+0xc))&0x80)==0x00)
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled"
|
|
bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable"
|
|
if ((((d.l(asd:0x01c20000+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20000+0xc))&0xb)==0xb))
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x8)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01c20000+0xc))&0xb)==0x0)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "MCR,Modem Control Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "LSR,Line Status Register"
|
|
bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready"
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
sif (cpu()=="DM335")
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
else
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
endif
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register"
|
|
bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled"
|
|
bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MDR,Mode Definition Register"
|
|
bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "UART 1"
|
|
base asd:0x01c20400
|
|
width 13.
|
|
if (((d.l(asd:0x01c20400+0xc))&0x80)==0x00)
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled"
|
|
bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable"
|
|
if ((((d.l(asd:0x01c20400+0xc))&0xb)==0x9)||(((d.l(asd:0x01c20400+0xc))&0xb)==0xa)||(((d.l(asd:0x01c20400+0xc))&0xb)==0xb))
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01c20400+0xc))&0xb)==0x8)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01c20400+0xc))&0xb)==0x0)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "MCR,Modem Control Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "LSR,Line Status Register"
|
|
bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready"
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
sif (cpu()=="DM335")
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
else
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
endif
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register"
|
|
bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled"
|
|
bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MDR,Mode Definition Register"
|
|
bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "UART 2"
|
|
base asd:0x01e06000
|
|
width 13.
|
|
if (((d.l(asd:0x01e06000+0xc))&0x80)==0x00)
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "RBR/THR,Receiver Buffer/Transmitter Holding Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA ,Receive/Transmit data"
|
|
line.long 0x04 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x04 2. " ELSI ,Receiver line status interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " ETBEI ,Transmitter holding register empty interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " ERBI ,Receiver data available interrupt and character timeout indication interrupt enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
endif
|
|
rgroup.long 0x08++0x3
|
|
line.long 0x00 "IIR,Interrupt Identification Register"
|
|
bitfld.long 0x00 6.--7. " FIFOEN ,FIFOs enabled" "Non-FIFO,Reserved,Reserved,Enabled"
|
|
bitfld.long 0x00 1.--3. " INTID ,Interrupt type" "Reserved,THR empty,Receive data available,Receive line status,Reserved,Reserved,Character timeout indication,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " IPEND ,Interrupt pending" "Pending,Not pending"
|
|
wgroup.long 0x08++0x3
|
|
line.long 0x00 "FCR,FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " RXFIFTL ,Receiver FIFO trigger level" "1 byte,4 bytes,8 bytes,14 bytes"
|
|
bitfld.long 0x00 3. " DMAMODE1 ,DMA MODE1 enable" "Disable,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXCLR ,Transmitter FIFO clear" "No effect,Clear"
|
|
bitfld.long 0x00 1. " RXCLR ,Receiver FIFO clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FIFOEN ,Transmitter and receiver FIFOs mode enable" "Non-FIFO,Enable"
|
|
if ((((d.l(asd:0x01e06000+0xc))&0xb)==0x9)||(((d.l(asd:0x01e06000+0xc))&0xb)==0xa)||(((d.l(asd:0x01e06000+0xc))&0xb)==0xb))
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01e06000+0xc))&0xb)==0x8)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " EPS ,Even parity select" "Odd,Even"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
elif (((d.l(asd:0x01e06000+0xc))&0xb)==0x0)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,1.5"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCR,Line Control Register"
|
|
bitfld.long 0x00 7. " DLAB ,Divisor latch access" "RBR/THR/IER,DLL/DLH"
|
|
bitfld.long 0x00 6. " BC ,Break control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SP ,Stick parity" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEN ,Parity enable" "No parity,Enabled"
|
|
bitfld.long 0x00 2. " STB ,Number of STOP bits generated" "1,2"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WLS ,Word lenght select" "5 bits,6 bits,7 bits,8 bits"
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "MCR,Modem Control Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
else
|
|
bitfld.long 0x00 5. " AFE ,Autoflow control enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " LOOP ,Loop back mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RTS ,RTS control" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "LSR,Line Status Register"
|
|
bitfld.long 0x00 7. " RXFIFOE ,Receiver FIFO error" "No error,Error"
|
|
bitfld.long 0x00 6. " TEMT ,Transmitter empty (TEMT) indicator" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 5. " THRE ,Transmitter holding register empty (THRE) indicator" "Not empty,Empty"
|
|
bitfld.long 0x00 4. " BI ,Break indicator" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FE ,Framing error (FE) indicator" "No error,Error"
|
|
bitfld.long 0x00 2. " PE ,Parity error (PE) indicator" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " OE ,Overrun error (OE) indicator" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " DR ,Data-ready (DR) indicator for the receiver" "No ready,Ready"
|
|
group.long 0x20++0x7
|
|
line.long 0x00 "DLL,Divisor LSB Latch"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DLL ,The 8 least-significant bits (LSBs) of the 16-bit divisor"
|
|
line.long 0x04 "DLH,Divisor MSB Latch"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DLH ,The 8 most-significant bits (MSBs) of the 16-bit divisor"
|
|
sif (cpu()=="DM335")
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
elif (cpu()=="DM365"||cpu()=="DM368")
|
|
rgroup.long 0x28++0x3
|
|
line.long 0x00 "PID,Peripheral Identification Register"
|
|
bitfld.long 0x00 30.--31. " SCHME ,PID scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Functional value"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " R ,PDS release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--10. " X ,Major spec release" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " Z ,Major RTL release" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " Y ,Minor spec release"
|
|
else
|
|
rgroup.long 0x28++0x7
|
|
line.long 0x00 "PID1,Peripheral Identification Register 1"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
line.long 0x04 "PID2,Peripheral Identification Register 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " TYP ,Type of peripheral"
|
|
endif
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "PWREMU_MGMT,Power and Emulation Management Register"
|
|
bitfld.long 0x00 14. " UTRST ,UART transmitter reset" "Reset,Enabled"
|
|
bitfld.long 0x00 13. " URRST ,UART receiver reset" "Reset,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " FREE ,Free-running enable mode" "Stopped,Free-running"
|
|
sif (cpu()=="DM335"||cpu()=="DM365"||cpu()=="DM368")
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "MDR,Mode Definition Register"
|
|
bitfld.long 0x00 0. " OSM_SEL ,Over-sampling mode" "16x over-sampling,13x over-sampling"
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "USB (Universal Serial Bus)"
|
|
base asd:0x01c64000
|
|
width 13.
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CTRLR,Control Register"
|
|
bitfld.long 0x00 4. " RNDIS ,RNDIS mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " UINT ,USB non-PDR interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLKFACK ,Clock stop fast ACK enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RESET ,Soft reset" "No effect,Reset"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STATR,Status Register"
|
|
bitfld.long 0x0 0. " DRVVBUS ,Current DRVVBUS value" "Low,High"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "RNDISR,RNDIS Register"
|
|
bitfld.long 0x0 19. " RX4EN ,Receive Endpoint 4 RNDIS mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 18. " RX3EN ,Receive Endpoint 3 RNDIS mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 17. " RX2EN ,Receive Endpoint 2 RNDIS mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 16. " RX1EN ,Receive Endpoint 1 RNDIS mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " TX4EN ,Transmit Endpoint 4 RNDIS mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " TX3EN ,Transmit Endpoint 3 RNDIS mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 1. " TX2EN ,Transmit Endpoint 2 RNDIS mode enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 0. " TX1EN ,Transmit Endpoint 1 RNDIS mode enable" "Disabled,Enabled"
|
|
line.long 0x4 "AUTOREQ,Auto Request Register"
|
|
bitfld.long 0x4 6.--7. " Rx4 ,RX endpoint 4 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req"
|
|
bitfld.long 0x4 4.--5. " Rx3 ,RX endpoint 3 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req"
|
|
textline " "
|
|
bitfld.long 0x4 2.--3. " Rx2 ,RX endpoint 2 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req"
|
|
bitfld.long 0x4 0.--1. " Rx1 ,RX endpoint 1 Auto Req enable" "No auto req,Auto req (EOP),Reserved,Auto req"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "INTSRCR,USB Interrupt Source Register"
|
|
setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,DRVVBUS level change caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,VBus voltage < VBus Valid Threshold (VBus error) caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,SRP detection caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,Device disconnection (Valid in Host Mode) caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,Device connection (Valid in Host Mode) caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,SOF start caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,Reset Signaling detection (In Peripheral Mode)/Babble detection (In Host Mode) caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,Resume signaling detection caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,Suspend Signaling detection caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 caused interrupt" "Not caused,Caused"
|
|
setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 caused interrupt" "Not caused,Caused"
|
|
textline " "
|
|
setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 caused interrupt" "Not caused,Caused"
|
|
group.long 0x2c++0x3
|
|
line.long 0x0 "INTMSKR,USB Interrupt Mask Register"
|
|
setclrfld.long 0x0 24. 0x4 24. 0x8 24. " USB[8]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 23. 0x4 23. 0x8 23. " USB[7]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 22. 0x4 22. 0x8 22. " USB[6]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 21. 0x4 21. 0x8 21. " USB[5]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 20. 0x4 20. 0x8 20. " USB[4]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 19. 0x4 19. 0x8 19. " USB[3]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 18. 0x4 18. 0x8 18. " USB[2]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 17. 0x4 17. 0x8 17. " USB[1]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 16. 0x4 16. 0x8 16. " USB[0]_set/clr ,USB interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 12. 0x4 12. 0x8 12. " RX[4]_set/clr ,Receive endpoint 4 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 11. 0x4 11. 0x8 11. " RX[3]_set/clr ,Receive endpoint 3 interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 10. 0x4 10. 0x8 10. " RX[2]_set/clr ,Receive endpoint 2 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 9. 0x4 9. 0x8 9. " RX[1]_set/clr ,Receive endpoint 1 interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 8. 0x4 8. 0x8 8. " RX[0]_set/clr ,Receive endpoint 0 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 4. 0x4 4. 0x8 4. " TX[4]_set/clr ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 3. 0x4 3. 0x8 3. " TX[3]_set/clr ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x4 2. 0x8 2. " TX[2]_set/clr ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked"
|
|
setclrfld.long 0x0 1. 0x4 1. 0x8 1. " TX[1]_set/clr ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
setclrfld.long 0x0 0. 0x4 0. 0x8 0. " TX[0]_set/clr ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "INTMASKEDR,USB Interrupt Source Masked Register"
|
|
bitfld.long 0x0 24. " USB[8] ,USB interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 23. " USB[7] ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 22. " USB[6] ,USB interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 21. " USB[5] ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 20. " USB[4] ,USB interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 19. " USB[3] ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 18. " USB[2] ,USB interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 17. " USB[1] ,USB interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 16. " USB[0] ,USB interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 12. " RX[4] ,Receive endpoint 4 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 11. " RX[3] ,Receive endpoint 3 interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 10. " RX[2] ,Receive endpoint 2 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 9. " RX[1] ,Receive endpoint 1 interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 8. " RX[0] ,Receive endpoint 0 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 4. " TX[4] ,Transmit endpoint 4 interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 3. " TX[3] ,Transmit endpoint 3 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 2. " TX[2] ,Transmit endpoint 2 interrupt source mask" "Not masked,Masked"
|
|
bitfld.long 0x0 1. " TX[1] ,Transmit endpoint 1 interrupt source mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x0 0. " TX[0] ,Transmit endpoint 0 interrupt source mask" "Not masked,Masked"
|
|
group.long 0x3c++0x3
|
|
line.long 0x0 "EOIR,USB End of Interrupt Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " VECTOR ,End of Interrupt Vector"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "INTVECTR,USB Interrupt Vector Register"
|
|
group.long 0x80++0xb
|
|
line.long 0x0 "TCPPICR,Transmit CPPI Control Register"
|
|
bitfld.long 0x0 0. " TCPPI_ENABLE ,Transmit CPPI Enable Control" "Disabled,Enabled"
|
|
line.long 0x4 "TCPPITDR,Transmit CPPI Teardown Register"
|
|
bitfld.long 0x4 31. " READY ,Teardown register writable" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--1. " CHANNEL ,Teardown Channel" "0,1,2,3"
|
|
line.long 0x8 "TCPPIEOIR,Transmit CPPI DMA Controller End of Interrupt Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. " VECTOR ,End of Interrupt Vector"
|
|
rgroup.long 0x8c++0x7
|
|
line.long 0x0 "TCPPIIVECTR,Transmit CPPI DMA Controller Interrupt Vector Register"
|
|
line.long 0x4 "TCPPIMSKSR,Transmit CPPI Masked Status Register"
|
|
bitfld.long 0x4 3. " MASKEDCOMP_PENDING3 ,Channel 3 Masked High Priority Transmit Completion Pending" "0,1"
|
|
bitfld.long 0x4 2. " MASKEDCOMP_PENDING2 ,Channel 2 Masked High Priority Transmit Completion Pending" "0,1"
|
|
textline " "
|
|
bitfld.long 0x4 1. " MASKEDCOMP_PENDING1 ,Channel 1 Masked High Priority Transmit Completion Pending" "0,1"
|
|
bitfld.long 0x4 0. " MASKEDCOMP_PENDING0 ,Channel 0 Masked High Priority Transmit Completion Pending" "0,1"
|
|
group.long 0x94++0x3
|
|
line.long 0x0 "TCPPIRAWSR,Transmit CPPI Raw Status Register"
|
|
setclrfld.long 0x0 3. 0x4 3. 0x8 3. " COMP_PENDING[3]_set/clr ,Channel 3 High Priority Transmit Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 2. 0x4 2. 0x8 2. " COMP_PENDING[2]_set/clr ,Channel 2 High Priority Transmit Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 1. 0x4 1. 0x8 1. " COMP_PENDING[1]_set/clr ,Channel 1 High Priority Transmit Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0 0. 0x4 0. 0x8 0. " COMP_PENDING[0]_set/clr ,Channel 0 High Priority Transmit Completion Pending" "Not pending,Pending"
|
|
group.long 0xc0++0x3
|
|
line.long 0x0 "RCPPICR,Receive CPPI Control Register"
|
|
bitfld.long 0x0 0. " RCPPI_ENABLE ,Receive CPPI Enable Control" "Disabled,Enabled"
|
|
group.long 0xd0++0x7
|
|
line.long 0x0 "RPPIMSKSR,Receive CPPI Masked Status Register"
|
|
bitfld.long 0x0 3. " MASKED_COMP_PENDING3 ,Channel 3 Masked Receive Completion Pending" "0,1"
|
|
bitfld.long 0x0 2. " MASKED_COMP_PENDING2 ,Channel 2 Masked Receive Completion Pending" "0,1"
|
|
textline " "
|
|
bitfld.long 0x0 1. " MASKED_COMP_PENDING1 ,Channel 1 Masked Receive Completion Pending" "0,1"
|
|
bitfld.long 0x0 0. " MASKED_COMP_PENDING0 ,Channel 0 Masked Receive Completion Pending" "0,1"
|
|
line.long 0x4 "RCPPIRAWSR,Receive CPPI Raw Status Register"
|
|
setclrfld.long 0x4 3. 0x8 3. 0x0c 3. " COMP_PENDING[3]_set/clr ,Channel 3 Raw Receive Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x4 2. 0x8 2. 0x0c 2. " COMP_PENDING[2]_set/clr ,Channel 2 Raw Receive Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x4 1. 0x8 1. 0x0c 1. " COMP_PENDING[1]_set/clr ,Channel 1 Raw Receive Completion Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x4 0. 0x8 0. 0x0c 0. " COMP_PENDING[0]_set/clr ,Channel 0 Raw Receive Completion Pending" "Not pending,Pending"
|
|
group.long 0xe0++0xf
|
|
line.long 0x0 "RBUFCNT0,Receive Buffer Count 0 Register"
|
|
hexmask.long.word 0x0 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 0"
|
|
line.long 0x4 "RBUFCNT1,Receive Buffer Count 1 Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 1"
|
|
line.long 0x8 "RBUFCNT2,Receive Buffer Count 2 Register"
|
|
hexmask.long.word 0x8 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 2"
|
|
line.long 0xC "RBUFCNT3,Receive Buffer Count 3 Register"
|
|
hexmask.long.word 0xC 0.--15. 1. " BUFCNT ,Receive CPPI Buffer Count 3"
|
|
width 17.
|
|
tree "Transmit/Receive CPPI Channel 0 State Block"
|
|
group.long 0x100++0x17
|
|
line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1"
|
|
hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2"
|
|
hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not truncated,Truncated"
|
|
line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3"
|
|
line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5"
|
|
hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length"
|
|
group.long (0x100+0x1c)++0x23
|
|
line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer"
|
|
hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback"
|
|
line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset"
|
|
line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1"
|
|
hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer"
|
|
line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2"
|
|
hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3"
|
|
hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4"
|
|
line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5"
|
|
hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6"
|
|
hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length"
|
|
line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer"
|
|
hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback"
|
|
tree.end
|
|
tree "Transmit/Receive CPPI Channel 1 State Block"
|
|
group.long 0x140++0x17
|
|
line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1"
|
|
hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2"
|
|
hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not truncated,Truncated"
|
|
line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3"
|
|
line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5"
|
|
hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length"
|
|
group.long (0x140+0x1c)++0x23
|
|
line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer"
|
|
hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback"
|
|
line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset"
|
|
line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1"
|
|
hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer"
|
|
line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2"
|
|
hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3"
|
|
hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4"
|
|
line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5"
|
|
hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6"
|
|
hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length"
|
|
line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer"
|
|
hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback"
|
|
tree.end
|
|
tree "Transmit/Receive CPPI Channel 2 State Block"
|
|
group.long 0x180++0x17
|
|
line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1"
|
|
hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2"
|
|
hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not truncated,Truncated"
|
|
line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3"
|
|
line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5"
|
|
hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length"
|
|
group.long (0x180+0x1c)++0x23
|
|
line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer"
|
|
hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback"
|
|
line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset"
|
|
line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1"
|
|
hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer"
|
|
line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2"
|
|
hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3"
|
|
hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4"
|
|
line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5"
|
|
hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6"
|
|
hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length"
|
|
line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer"
|
|
hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback"
|
|
tree.end
|
|
tree "Transmit/Receive CPPI Channel 3 State Block"
|
|
group.long 0x1C0++0x17
|
|
line.long 0x0 "TCPPIDMASTATEW0,Transmit CPPI DMA State Word 0"
|
|
hexmask.long 0x0 2.--31. 0x4 " TXQ_HEAD_PTR ,TX Queue Head Pointer"
|
|
textline " "
|
|
bitfld.long 0x0 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x04 "TCPPIDMASTATEW1,Transmit CPPI DMA State Word 1"
|
|
hexmask.long 0x04 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x04 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x08 "TCPPIDMASTATEW2,Transmit CPPI DMA State Word 2"
|
|
hexmask.long 0x08 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x08 1. " TRUNCATED_NON_EOP ,Packet truncation occurred on the current packet flag" "Not truncated,Truncated"
|
|
line.long 0xc "TCPPIDMASTATEW3,Transmit CPPI DMA State Word 3"
|
|
line.long 0x10 "TCPPIDMASTATEW4,Transmit CPPI DMA State Word 4"
|
|
hexmask.long.byte 0x10 24.--31. 1. " DESC_MSG ,Descriptor Message"
|
|
textline " "
|
|
bitfld.long 0x10 17. " CURR_BUFFER_EOP ,Current Buffer is EOP" "Not EOP,EOP"
|
|
textline " "
|
|
bitfld.long 0x10 16. " CURR_BUFFER_SOP ,Current Buffer is SOP" "Not SOP,SOP"
|
|
textline " "
|
|
hexmask.long.word 0x10 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x14 "TCPPIDMASTATEW5,Transmit CPPI DMA State Word 5"
|
|
hexmask.long.word 0x14 16.--31. 1. " REM_LENGTH ,Remaining Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x14 0.--15. 1. " LENGTH ,Packet Length"
|
|
group.long (0x1C0+0x1c)++0x23
|
|
line.long 0x0 "TCPPICOMPPTR,Transmit CPPI Completion Pointer"
|
|
hexmask.long 0x0 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x0 0. " WRBK_MODE ,Writeback/Compare Mode" "Compare,Writeback"
|
|
line.long 0x4 "RCPPIDMASTATEW0,Receive CPPI DMA State Word 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " SOP_BUFFER_OFFSET ,Start of Packet Buffer Offset"
|
|
line.long 0x8 "RCPPIDMASTATEW1,Receive CPPI DMA State Word 1"
|
|
hexmask.long 0x08 2.--31. 0x4 " RXQ_HEAD_PTR ,Receive Queue Head Pointer"
|
|
line.long 0xc "RCPPIDMASTATEW2,Receive CPPI DMA State Word 2"
|
|
hexmask.long 0x0c 2.--31. 0x4 " SOP_DESCRIPTOR_PTR ,Start of Packet Buffer Descriptor Pointer"
|
|
textline " "
|
|
bitfld.long 0x0c 0. " IN_PACKET ,DMA in the middle of packet processing flag" "Not in packet,In packet"
|
|
line.long 0x10 "RCPPIDMASTATEW3,Receive CPPI DMA State Word 3"
|
|
hexmask.long 0x10 2.--31. 0x4 " CURR_DESCRIPTOR_PTR ,Current Buffer Descriptor Pointer"
|
|
line.long 0x14 "RCPPIDMASTATEW4,Receive CPPI DMA State Word 4"
|
|
line.long 0x18 "RCPPIDMASTATEW5,Receive CPPI DMA State Word 5"
|
|
hexmask.long.word 0x18 16.--31. 1. " PKT_LENGTH ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x18 0.--15. 1. " CURR_BUFFER_LENGTH ,Current Buffer Length"
|
|
line.long 0x1c "RCPPIDMASTATEW6,Receive CPPI DMA State Word 6"
|
|
hexmask.long.word 0x1c 16.--31. 1. " SOP_BUFFER_BYTECNT ,Packet Length"
|
|
textline " "
|
|
hexmask.long.word 0x1c 0.--15. 1. " CURR_BUFFER_BYTECNT ,Current Buffer Length"
|
|
line.long 0x20 "RCPPICOMPPTR,Receive CPPI Completion Pointer"
|
|
hexmask.long 0x20 2.--31. 0x4 " DESC_ADDR ,Descriptor Address"
|
|
textline " "
|
|
bitfld.long 0x20 0. " RDBK_MODE ,Readback / Compare Mode" "Compare,Readback"
|
|
tree.end
|
|
width 10.
|
|
tree "Common USB Registers"
|
|
group.byte 0x400++0x1
|
|
line.byte 0x0 "FADDR,Function Address Register"
|
|
hexmask.byte 0x0 0.--6. 1. " FUNCADDR ,7_bit address of the peripheral part of the transaction"
|
|
line.byte 0x1 "POWER,Power Management Register"
|
|
bitfld.byte 0x1 7. " ISOUPDATE ,Waiting for SOF token" "No wait,Wait"
|
|
bitfld.byte 0x1 6. " SOFTCONN ,Soft Connect/Disconnect feature" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x1 5. " HSEN ,High-speed mode negotiation enable" "Disabled,Enabled"
|
|
bitfld.byte 0x1 4. " HSMODE ,High-speed mode" "Full speed,High speed"
|
|
textline " "
|
|
bitfld.byte 0x1 3. " RESET ,Reset" "No reset,Reset"
|
|
bitfld.byte 0x1 2. " RESUME ,Resume in suspend mode" "No resume,Resume"
|
|
textline " "
|
|
bitfld.byte 0x1 1. " SUSPENDM ,Suspend mode" "No effect,Suspend mode"
|
|
bitfld.byte 0x1 0. " ENSUSPM ,SUSPENDM output enable" "Disabled,Enabled"
|
|
rgroup.word 0x402++0x3
|
|
line.word 0x0 "INTRTX,Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 4"
|
|
bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active"
|
|
bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active"
|
|
bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active"
|
|
line.word 0x2 "INTRRX,Interrupt Register for Receive Endpoints 1 to 4"
|
|
bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active"
|
|
bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active"
|
|
bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active"
|
|
group.word 0x406++0x3
|
|
line.word 0x0 "INTRTXE,Interrupt Enable Register for INTRTX"
|
|
bitfld.word 0x0 4. " EP4TX ,Tx Endpoint 4 interrupt active" "Not active,Active"
|
|
bitfld.word 0x0 3. " EP3TX ,Tx Endpoint 3 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x0 2. " EP2TX ,Tx Endpoint 2 interrupt active" "Not active,Active"
|
|
bitfld.word 0x0 1. " EP1TX ,Tx Endpoint 1 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x0 0. " EP0 ,Endpoint 0 interrupt active" "Not active,Active"
|
|
line.word 0x2 "INTRRXE,Interrupt Enable Register for INTRRX"
|
|
bitfld.word 0x02 4. " EP4RX ,Receive Endpoint 4 interrupt active" "Not active,Active"
|
|
bitfld.word 0x02 3. " EP3RX ,Receive Endpoint 3 interrupt active" "Not active,Active"
|
|
textline " "
|
|
bitfld.word 0x02 2. " EP2RX ,Receive Endpoint 2 interrupt active" "Not active,Active"
|
|
bitfld.word 0x02 1. " EP1RX ,Receive Endpoint 1 interrupt active" "Not active,Active"
|
|
hgroup.byte 0x40a++0x0
|
|
hide.byte 0x0 "INTRUSB,Interrupt Register for Common USB Interrupts"
|
|
in
|
|
group.byte 0x40b++0x0
|
|
line.byte 0x0 "INTRUSBE,Interrupt Enable Register for INTRUSB"
|
|
bitfld.byte 0x0 7. " VBUSERR ,Vbus error interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 6. " SESSREQ ,Session request interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 5. " DISCON ,Disconnect interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 4. " CONN ,Connect interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 3. " SOF ,Start of frame interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 2. " RESET_BABBLE ,Reset interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x0 1. " RESUME ,Resume interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x0 0. " SUSPEND ,Suspend interrupt enable" "Disabled,Enabled"
|
|
rgroup.word 0x40c++0x1
|
|
line.word 0x0 "FRAME,Frame Number Register"
|
|
hexmask.word 0x0 0.--10. 1. " FRAMENUMBER ,Last received frame number"
|
|
group.byte 0x40e++0x1
|
|
line.byte 0x0 "INDEX,Index Register for Selecting the Endpoint Status and Control Registers"
|
|
bitfld.byte 0x0 0.--3. " EPSEL ,Endpoint control/status register select" "EP 0,EP 1,EP 2,EP 3,EP 4,?..."
|
|
line.byte 0x1 "TESTMODE,Register to Enable the USB 2.0 Test Modes"
|
|
bitfld.byte 0x1 7. " FORCE_HOST ,Force Host mode" "Normal,Host"
|
|
bitfld.byte 0x1 6. " FIFO_ACCESS ,Transfer packet EP0 Tx FIFO to EP0 Receive FIFO" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.byte 0x1 5. " FORCE_FS ,Force full-speed mode" "Normal,Full speed"
|
|
bitfld.byte 0x1 4. " FORCE_HS ,Force high-speed mode" "Normal,High speed"
|
|
textline " "
|
|
bitfld.byte 0x1 3. " TEST_PACKET ,Test_Packet test mode" "Normal,Test_Packet"
|
|
bitfld.byte 0x1 2. " TEST_K ,Test_K test mode" "Normal,Test_K"
|
|
textline " "
|
|
bitfld.byte 0x1 1. " TEST_J ,Test_J test mode" "Normal,Test_J"
|
|
bitfld.byte 0x1 0. " TEST_SE0_NAK ,Test_SE0_NAK test mode" "Normal,Test_SE0_NAK"
|
|
tree.end
|
|
width 17.
|
|
tree "Indexed Registers"
|
|
if ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word 0x412++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word 0x418++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte 0x41a++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte 0x41b++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
rgroup.byte 0x41f++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word 0x412++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word 0x418++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
rgroup.byte 0x41f++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word 0x410++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word 0x412++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not received,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word 0x414++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word 0x416++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
textline " "
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word 0x418++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte 0x41a++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte 0x41b++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte 0x41c++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte 0x41d++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Recieve Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte 0x41f++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
group.word 0x410++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word 0x412++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word 0x414++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word 0x416++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte 0x41f++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
width 12.
|
|
tree "FIFOx"
|
|
hgroup.long 0x420++0x3
|
|
hide.long 0x00 "FIFO0,Transmit and Receive FIFO Register for Endpoint 0"
|
|
in
|
|
hgroup.long 0x424++0x3
|
|
hide.long 0x0 "FIFO1,Transmit and Receive FIFO Register for Endpoint 1"
|
|
in
|
|
hgroup.long 0x428++0x3
|
|
hide.long 0x0 "FIFO2,Transmit and Receive FIFO Register for Endpoint 2"
|
|
in
|
|
hgroup.long 0x42c++0x3
|
|
hide.long 0x0 "FIFO3,Transmit and Receive FIFO Register for Endpoint 3"
|
|
in
|
|
hgroup.long 0x430++0x3
|
|
hide.long 0x0 "FIFO4,Transmit and Receive FIFO Register for Endpoint 4"
|
|
in
|
|
tree.end
|
|
width 12.
|
|
group.byte 0x460++0x0 "OTG Device Control"
|
|
line.byte 0x00 "DEVCTL,OTG Device Control Register"
|
|
bitfld.byte 0x00 7. " BDEVICE ,USB controller is operating as the 'A' device or the 'B'" "A device,B device"
|
|
bitfld.byte 0x00 6. " FSDEV ,Full speed or high speed detected" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " LSDEV ,Low speed detected" "Not detected,Detected"
|
|
bitfld.byte 0x00 3.--4. " VBUS ,Current VBus level" "Below Session End,Above Session End,Above AValid,Above VBusValid"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOSTMODE ,USB controller is acting as a Host" "Peripheral,Host"
|
|
bitfld.byte 0x00 1. " HOSTREQ ,Host Negotiation initiated" "Not initiated,Initiated"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SESSION ,Session start" "Started,Ended"
|
|
if (((data.byte(asd:0x01c64000+0x462))&(0x10))==0x0)
|
|
; TXFIFOSZ -> DPB == single
|
|
group.byte 0x462++0x0 "Dynamic FIFO Control"
|
|
line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size"
|
|
bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double"
|
|
bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144"
|
|
else
|
|
group.byte 0x462++0x0 "Dynamic FIFO Control"
|
|
line.byte 0x00 "TXFIFOSZ,Transmit Endpoint FIFO Size"
|
|
bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double"
|
|
bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288"
|
|
endif
|
|
if (((data.byte(asd:0x01c64000+0x463))&0x10)==0x0)
|
|
; RXFIFOSZ -> DpB == Single
|
|
group.byte 0x463++0x0
|
|
line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size"
|
|
bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double"
|
|
bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144"
|
|
else
|
|
group.byte 0x463++0x0
|
|
line.byte 0x00 "RXFIFOSZ,Receive Endpoint FIFO Size"
|
|
bitfld.byte 0x00 4. " DPB ,Double packet buffering is enabled" "Single,Double"
|
|
bitfld.byte 0x00 0.--3. " SZ ,Maximum packet size allowed" "16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288"
|
|
endif
|
|
group.word 0x464++0x1
|
|
line.word 0x00 "TXFIFOADDR,Transmit Endpoint FIFO Address"
|
|
hexmask.word 0x00 0.--12. 1. " ADDR ,Start address of endpoint FIFO"
|
|
group.word 0x466++0x1
|
|
line.word 0x00 "RXFIFOADDR,Receive Endpoint FIFO Address"
|
|
hexmask.word 0x00 0.--12. 1. " ADDR ,Start address of endpoint FIFO"
|
|
width 12.
|
|
tree "EPTRG0"
|
|
if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4)
|
|
; DEVCTL -> HOSTMODE == HOST
|
|
group.byte (0x480)++0x0
|
|
line.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x480+0x2)++0x2
|
|
line.byte 0x0 "TXHUBADDR,Transmit Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
line.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x480+0x6)++0x1
|
|
line.byte 0x0 "RXHUBADDR,Receive Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
else
|
|
hgroup.byte (0x480)++0x0
|
|
hide.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hgroup.byte (0x480+0x2)++0x2
|
|
hide.byte 0x00 "TXHUBADDR,Transmit Hub Address"
|
|
hide.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hide.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hgroup.byte (0x480+0x6)++0x1
|
|
hide.byte 0x00 "RXHUBADDR,Receive Hub Address"
|
|
hide.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
endif
|
|
tree.end
|
|
tree "EPTRG1"
|
|
if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4)
|
|
; DEVCTL -> HOSTMODE == HOST
|
|
group.byte (0x488)++0x0
|
|
line.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x488+0x2)++0x2
|
|
line.byte 0x0 "TXHUBADDR,Transmit Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
line.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x488+0x6)++0x1
|
|
line.byte 0x0 "RXHUBADDR,Receive Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
else
|
|
hgroup.byte (0x488)++0x0
|
|
hide.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hgroup.byte (0x488+0x2)++0x2
|
|
hide.byte 0x00 "TXHUBADDR,Transmit Hub Address"
|
|
hide.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hide.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hgroup.byte (0x488+0x6)++0x1
|
|
hide.byte 0x00 "RXHUBADDR,Receive Hub Address"
|
|
hide.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
endif
|
|
tree.end
|
|
tree "EPTRG2"
|
|
if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4)
|
|
; DEVCTL -> HOSTMODE == HOST
|
|
group.byte (0x490)++0x0
|
|
line.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x490+0x2)++0x2
|
|
line.byte 0x0 "TXHUBADDR,Transmit Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
line.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x490+0x6)++0x1
|
|
line.byte 0x0 "RXHUBADDR,Receive Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
else
|
|
hgroup.byte (0x490)++0x0
|
|
hide.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hgroup.byte (0x490+0x2)++0x2
|
|
hide.byte 0x00 "TXHUBADDR,Transmit Hub Address"
|
|
hide.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hide.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hgroup.byte (0x490+0x6)++0x1
|
|
hide.byte 0x00 "RXHUBADDR,Receive Hub Address"
|
|
hide.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
endif
|
|
tree.end
|
|
tree "EPTRG3"
|
|
if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4)
|
|
; DEVCTL -> HOSTMODE == HOST
|
|
group.byte (0x498)++0x0
|
|
line.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x498+0x2)++0x2
|
|
line.byte 0x0 "TXHUBADDR,Transmit Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
line.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x498+0x6)++0x1
|
|
line.byte 0x0 "RXHUBADDR,Receive Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
else
|
|
hgroup.byte (0x498)++0x0
|
|
hide.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hgroup.byte (0x498+0x2)++0x2
|
|
hide.byte 0x00 "TXHUBADDR,Transmit Hub Address"
|
|
hide.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hide.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hgroup.byte (0x498+0x6)++0x1
|
|
hide.byte 0x00 "RXHUBADDR,Receive Hub Address"
|
|
hide.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
endif
|
|
tree.end
|
|
tree "EPTRG4"
|
|
if ((d.b((asd:0x01c64000+0x460))&0x4)==0x4)
|
|
; DEVCTL -> HOSTMODE == HOST
|
|
group.byte (0x4A0)++0x0
|
|
line.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x4A0+0x2)++0x2
|
|
line.byte 0x0 "TXHUBADDR,Transmit Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
line.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hexmask.byte 0x02 0.--6. 1. " FUNCADDR ,Address of target function"
|
|
group.byte (0x4A0+0x6)++0x1
|
|
line.byte 0x0 "RXHUBADDR,Receive Hub Address"
|
|
bitfld.byte 0x0 7. " MULT_TRANS ,Multiple transaction translator" "Single,Multiple"
|
|
hexmask.byte 0x0 0.--6. 1. " HUBADDR ,Address of hub"
|
|
line.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
hexmask.byte 0x01 0.--6. 1. " HUBPORT ,Port number of the hub"
|
|
else
|
|
hgroup.byte (0x4A0)++0x0
|
|
hide.byte 0x00 "TXFUNCADDR,Transmit Function Address"
|
|
hgroup.byte (0x4A0+0x2)++0x2
|
|
hide.byte 0x00 "TXHUBADDR,Transmit Hub Address"
|
|
hide.byte 0x01 "TXHUBPORT,Transmit Hub Port"
|
|
hide.byte 0x02 "RXFUNCADDR,Receive Function Address"
|
|
hgroup.byte (0x4A0+0x6)++0x1
|
|
hide.byte 0x00 "RXHUBADDR,Receive Hub Address"
|
|
hide.byte 0x01 "RXHUBPORT,Receive Hub Port"
|
|
endif
|
|
tree.end
|
|
width 17.
|
|
group 0x00++0x0 "Control and Status Registers for Endpoints"
|
|
tree "EOCSR0"
|
|
if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word (0x500+0x2)++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x500+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte (0x500+0xa)++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte (0x500+0xb)++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
if (0==0.)
|
|
rgroup.byte (0x500+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word (0x500+0x2)++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word (0x500+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
if (0==0.)
|
|
rgroup.byte (0x500+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x500)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x500+0x2)++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not recieved,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x500+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x500+0x6)++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x500+0x8)++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte (0x500+0xa)++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x500+0xb)++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte (0x500+0xc)++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x500+0xd)++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x500+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x500)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x500+0x2)++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x500+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x500+0x6)++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x500+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
tree "EOCSR1"
|
|
if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word (0x510+0x2)++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x510+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte (0x510+0xa)++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte (0x510+0xb)++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
if (1==0.)
|
|
rgroup.byte (0x510+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word (0x510+0x2)++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word (0x510+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
if (1==0.)
|
|
rgroup.byte (0x510+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x510)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x510+0x2)++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not recieved,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x510+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x510+0x6)++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x510+0x8)++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte (0x510+0xa)++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x510+0xb)++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte (0x510+0xc)++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x510+0xd)++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x510+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x510)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x510+0x2)++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x510+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x510+0x6)++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x510+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
tree "EOCSR2"
|
|
if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word (0x520+0x2)++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x520+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte (0x520+0xa)++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte (0x520+0xb)++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
if (2==0.)
|
|
rgroup.byte (0x520+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word (0x520+0x2)++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word (0x520+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
if (2==0.)
|
|
rgroup.byte (0x520+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x520)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x520+0x2)++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not recieved,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x520+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x520+0x6)++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x520+0x8)++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte (0x520+0xa)++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x520+0xb)++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte (0x520+0xc)++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x520+0xd)++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x520+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x520)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x520+0x2)++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x520+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x520+0x6)++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x520+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
tree "EOCSR3"
|
|
if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word (0x530+0x2)++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x530+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte (0x530+0xa)++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte (0x530+0xb)++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
if (3==0.)
|
|
rgroup.byte (0x530+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word (0x530+0x2)++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word (0x530+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
if (3==0.)
|
|
rgroup.byte (0x530+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x530)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x530+0x2)++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not recieved,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x530+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x530+0x6)++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x530+0x8)++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte (0x530+0xa)++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x530+0xb)++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte (0x530+0xc)++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x530+0xd)++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x530+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x530)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x530+0x2)++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x530+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x530+0x6)++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x530+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
tree "EOCSR4"
|
|
if (((d.b((asd:0x01c64000+0x460))&0x4)==0x4)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == host AND&& Endpoint == 0
|
|
group.word (0x540+0x2)++0x1
|
|
line.word 0x00 "HOST_CSR0,Control Status Register for Endpoint 0 in Host Mode"
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of EP0 data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,Endpoint 0 FIFO next packet flush" "No effect,Flushed"
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Endpoint 0 halted" "Continue,Halted"
|
|
textline " "
|
|
bitfld.word 0x00 6. " STATUSPKT ,Status stage transaction" "No effect,Performed"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction requested" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ERROR ,Transaction perfrorm error" "No error,Error"
|
|
bitfld.word 0x00 3. " SETUPPKT ,SETUP token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 2. " RXSTALL ,STALL handshake received" "Not received,Received"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,FIFO data packet load" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x540+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
group.byte (0x540+0xa)++0x0
|
|
line.byte 0x00 "HOST_TYPE0,Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
group.byte (0x540+0xb)++0x0
|
|
line.byte 0x00 "HOST_NAKLIMIT0,NAKLimit0 Register"
|
|
bitfld.byte 0x00 0.--4. " EP0NAKLIMIT ,Number of frames/microframes after which Endpoint 0 should time out" "Disabled,Disabled,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
sif (cpu()=="TMS320DM355")
|
|
if (4==0.)
|
|
rgroup.byte (0x540+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x0))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 0
|
|
group.word (0x540+0x2)++0x1
|
|
line.word 0x00 "PERI_CSR0,Control Status Register for Endpoint 0 in Peripheral Mode"
|
|
bitfld.word 0x00 8. " FLUSHFIFO ,FIFO flush" "Not flushed,Flushed"
|
|
bitfld.word 0x00 7. " SERV_SETUPEND ,Clear SETUPEND bit" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SERV_RXPKTRDY ,Clear RXPKTRDY bit" "No effect,Cleared"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Terminate the current transaction" "Not terminated,Terminated"
|
|
textline " "
|
|
bitfld.word 0x00 4. " SETUPEND ,Control transaction ends" "Not ended,Ended"
|
|
bitfld.word 0x00 3. " DATAEND ,Data end" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.word 0x00 2. " SENTSTALL ,STALL handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 1. " TXPKTRDY ,Transmit packet ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Packet received" "Not received,Received"
|
|
rgroup.word (0x540+0x8)++0x1
|
|
line.word 0x00 "COUNT0,Count 0 Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " EP0RXCOUNT ,Number of received data bytes in the Endpoint 0 FIFO"
|
|
sif (cpu()=="TMS320DM355")
|
|
if (4==0.)
|
|
rgroup.byte (0x540+0xf)++0x0
|
|
line.byte 0x00 "CONFIGDATA,Configuration Data Register"
|
|
bitfld.byte 0x00 7. " MPRXE ,Indicates automatic amalgamation of bulk packets" "Not selected,Selected"
|
|
bitfld.byte 0x00 6. " MPTXE ,Indicates automatic splitting of bulk packets" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BIGENDIAN ,Indicates endian ordering" "Little endian,Big endian"
|
|
bitfld.byte 0x00 4. " HBRXE ,Indicates high-bandwidth Rx ISO endpoint support" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " HBTXE ,Indicates high-bandwidth Tx ISO endpoint support" "Not selected,Selected"
|
|
bitfld.byte 0x00 2. " DYNFIFO ,Indicates dynamic FIFO sizing" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SOFTCONE ,Indicates soft connect/disconnect" "Not selected,Selected"
|
|
bitfld.byte 0x00 0. " UTMIDATAWIDTH ,Indicates selected UTMI data width" "8 bits,16 bits"
|
|
endif
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x4)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Host AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x540)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x540+0x2)++0x1
|
|
line.word 0x00 "HOST_TXCSR,Control Status Register for Host Transmit Endpoint"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DATATOGWREN ,DATATOG bit write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DATATOG ,Current state of Tx EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " NAK_TIMEOUT ,Tx endpoint halted" "Continue,Halted"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXSTALL ,Stall handshake received" "Not recieved,Received"
|
|
bitfld.word 0x00 4. " SETUPPKT ,Setup token send" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " ERROR ,No handshake receive" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x540+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x540+0x6)++0x1
|
|
line.word 0x00 "HOST_RXCSR,Control Status Register for Host Receive Endpoint"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request for Receive endpoints" "Not requested,Requested"
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DATATOGWREN ,DATATOG write enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " DATATOG ,Current state of RX EP data toggle" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Reset endpoint data toggle" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " RXSTALL ,Stall handshake Received" "Not received,Received"
|
|
bitfld.word 0x00 5. " REQPKT ,IN transaction request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERR_NAKTIMEOUT ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ERROR ,No data packet received" "No Error,Error"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
rgroup.word (0x540+0x8)++0x1
|
|
line.word 0x00 "RXCOUNT,Receive Count Register"
|
|
hexmask.word 0x00 0.--12. 1. " EPRXCOUNT ,Number of received data bytes in the packet in the Receive FIFO"
|
|
group.byte (0x540+0xa)++0x0
|
|
line.byte 0x00 "HOST_TXTYPE,Transmit Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " TENDPN ,Endpoint number contained in the transmit endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x540+0xb)++0x0
|
|
line.byte 0x00 "HOST_TXINTERVAL,Transmit Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
group.byte (0x540+0xc)++0x0
|
|
line.byte 0x00 "HOST_RXTYPE,Receive Type Register"
|
|
bitfld.byte 0x00 6.--7. " SPEED ,Operating speed of target device" "Illegal,High,Full,Low"
|
|
bitfld.byte 0x00 4.--5. " PROT ,Required protocol for the transmit endpoint" "Control,Isochronous,Bulk,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " RENDPN ,Endpoint number contained in the Receive endpoint descriptor" "0,1,2,3,4,?..."
|
|
group.byte (0x540+0xd)++0x0
|
|
line.byte 0x00 "HOST_RXINTERVAL,Receive Interval Register"
|
|
hexmask.byte 0x00 0.--7. 1. " POLINTVL_NAKLIMIT ,Polling interval for currenlty selected endpoint"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x540+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
elif ((((d.b((asd:0x01c64000+0x460)))&0x4)==0x0)&&((((d.b((asd:0x01c64000+0x40e)))&0xf)==0x1)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x2)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x3)||(((d.b((asd:0x01c64000+0x40e)))&0xf)==0x4)))
|
|
; DEVCTL -> HOSTMODE == Peripheral AND&& Endpoint == 1 , 2 , 3 , 4
|
|
group.word (0x540)++0x1
|
|
line.word 0x00 "TXMAXP,Maximum Packet Size for Peripheral/Host Transmit Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum payload transmitted in a single transaction"
|
|
group.word (0x540+0x2)++0x1
|
|
line.word 0x00 "PERI_TXCSR,Control Status Register for Peripheral Transmit Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Isochronous transfer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " MODE ,Tx endpoint direction enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " FRCDATATOG ,Force endpoint data toggle" "No effect,Forced"
|
|
textline " "
|
|
bitfld.word 0x00 10. " DMAMODE ,DMA mode (should always be 0)" "0,1"
|
|
bitfld.word 0x00 6. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 4. " SENDSTALL ,Stall handshake to IN token issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 3. " FLUSHFIFO ,Next packet from endpoint Tx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 2. " UNDERRUN ,IN token received" "Not received,Received"
|
|
textline " "
|
|
bitfld.word 0x00 1. " FIFONOTEMPTY ,FIFO not empty" "Empty,Not empty"
|
|
bitfld.word 0x00 0. " TXPKTRDY ,Data packet loaded into FIFO" "Not loaded,Loaded"
|
|
group.word (0x540+0x4)++0x1
|
|
line.word 0x00 "RXMAXP,Maximum Packet Size for Peripheral Host Receive Endpoint"
|
|
hexmask.word 0x00 0.--10. 1. " MAXPAYLOAD ,Maximum amount of data that can be transferred through the selected endpoint"
|
|
group.word (0x540+0x6)++0x1
|
|
line.word 0x00 "PERI_RXCSR,Control Status Register for Peripheral Receive Endpoint"
|
|
bitfld.word 0x00 14. " ISO ,Receive endpoint for Isochronous transfers enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " DMAEN ,DMA request enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " DISNYET ,NYET handshake disable" "Enabled,Disabled"
|
|
bitfld.word 0x00 7. " CLRDATATOG ,Endpoint data toggle reset" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 6. " SENTSTALL ,Stall handshake transmitted" "Not transmitted,Transmitted"
|
|
bitfld.word 0x00 5. " SENDSTALL ,Stall handshake issue" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.word 0x00 4. " FLUSHFIFO ,Next packet from endpoint Rx FIFO flush" "No effect,Flushed"
|
|
bitfld.word 0x00 3. " DATAERROR ,CRC or bit-stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " OVERRUN ,Rx FIFO overrun" "No overrun,Overrun"
|
|
bitfld.word 0x00 1. " FIFOFULL ,FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.word 0x00 0. " RXPKTRDY ,Data packet received" "Not received,Received"
|
|
sif (cpu()=="TMS320DM6443"||cpu()=="TMS320DM6446")
|
|
rgroup.byte (0x540+0xf)++0x0
|
|
line.byte 0x00 "FIFOSIZE,FIFOSize Register"
|
|
bitfld.byte 0x00 4.--7. " RXFIFOSZ ,FIFO size for selected receive endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
bitfld.byte 0x00 0.--3. " TXFIFOSZ ,FIFO size for selected transmit endpoint" "Reserved,Reserved,Reserved,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,2048 bytes,4096 bytes,8192 bytes,?..."
|
|
endif
|
|
else
|
|
group 0x00++0x0
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline " "
|
|
textline "These registers are only available for Endpoints 0-4 choosed by EPSEL in INDEX register"
|
|
endif
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree.open "VPSS (Video Processing Subsystem)"
|
|
tree "VPSSCLK (VPSS Clock Control)"
|
|
base asd:0x01c70000
|
|
width 9.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,Peripheral Revision and Class Information"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification VPBE module"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "CLKCTRL,VPSS Clock Control Register"
|
|
bitfld.long 0x00 6. " CCDC_CLK ,CCDC clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " IPIPE_CLK ,IPIPE clock enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " H3A_CLK ,H3A clock enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VENC_CLKSEL ,Select clock for VENC" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VPBE_CLK ,VPBE clock enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "VPBE (Video Processing Back End)"
|
|
tree "OSD (VPBE - On Screen Display)"
|
|
base asd:0x01c70200
|
|
width 14.
|
|
group.long 0x00++0xb
|
|
line.long 0x00 "MODE,OSD Mode Register"
|
|
bitfld.long 0x00 15. " CS ,Cb/Cr or Cr/Cb format" "Cb/Cr,Cr/Cb"
|
|
bitfld.long 0x00 14. " OVRSZ ,OSD Window Vertical Expansion Enable" "x 1,x 6/5"
|
|
bitfld.long 0x00 13. " OHRSZ ,OSD Window Horizontal Expansion Enable" "x 1,x 9/8"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EF ,Expansion Filter Enable" "Off,On"
|
|
bitfld.long 0x00 11. " VVRSZ ,Video Window Vertical Expansion Enable" "x 1,x 6/5"
|
|
bitfld.long 0x00 10. " VHRSZ ,Video Window Horizontal Expansion Enable" "x 1,x 9/8"
|
|
textline " "
|
|
bitfld.long 0x00 9. " FSINV ,Field signal inversion" "Uninverted,Inverted"
|
|
bitfld.long 0x00 8. " BCLUT ,Background CLUT selection" "ROM,RAM"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CABG ,Background Color CLUT"
|
|
line.long 0x04 "VIDWINMD,Video Window Mode Setup Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x04 15. " VFINV ,Video Window 0/1 Expansion Filter Coefficient Inverse" "Normal,Inversed"
|
|
else
|
|
bitfld.long 0x04 15. " VFINV ,Video Window 0/1 Expansion Filter Coefficient Inverse" "Inversed,Normal"
|
|
endif
|
|
bitfld.long 0x04 14. " V1EFC ,Video Window 1 Expansion Filter Coefficient" "Same,Different"
|
|
bitfld.long 0x04 12.--13. " VHZ1 ,Video Window 1 horizontal direction zoom" "x1,x2,x4,?..."
|
|
textline " "
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x04 10.--11. " VVZ1 ,Video Window 1 vertical direction zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x04 9. " VFF1 ,Video Window 1 display mode" "Field,Frame"
|
|
bitfld.long 0x04 8. " ACT1 ,Sets image display on/off Video Window 1" "Off,On"
|
|
else
|
|
bitfld.long 0x04 10.--11. " VVZ1 ,Video Window 1 vertical direction zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x04 9. " VFF1 ,Video Window 1 display mode" "Off,On"
|
|
bitfld.long 0x04 8. " ACT1 ,Sets image display on/off Video Window 1" "Off,On"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 6. " V0EFC ,Video Window 0 Expansion Filter Coefficient" "Same,Different"
|
|
bitfld.long 0x04 4.--5. " VHZ0 ,Video Window 0 horizontal direction zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x04 2.--3. " VVZ0 ,Video Window 0 vertical direction zoom" "x1,x2,x4,?..."
|
|
textline " "
|
|
bitfld.long 0x04 1. " VFF0 ,Video Window 0 display mode" "Field,Frame"
|
|
bitfld.long 0x04 0. " ACT0 ,Sets image display on/off Video Window 0" "Off,On"
|
|
line.long 0x08 "OSDWIN0MD,OSD Window 0 Mode Setup Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x08 15. " BMPMDE ,Bitmap window mode enable" "Window 0 & 1,Window 0"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x08 13.--14. " BMP0MD ,Bitmap input mode" "BITMAP,RGB16,RGB24,YC"
|
|
bitfld.long 0x08 12. " CLUTS0 ,CLUT select for OSD Window 0" "ROM-look-up,RAM-look-up"
|
|
bitfld.long 0x08 10.--11. " OHZ0 ,OSD Window0 Horizontal Zoom" "x1,x2,x4,?..."
|
|
textline " "
|
|
bitfld.long 0x08 8.--9. " OVZ0 ,OSD Window0 Vertical Zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x08 6.--7. " BMW0 ,Bitmap bit width for OSD window 0" "1-bit,2-bits,4-bits,8-bits"
|
|
bitfld.long 0x08 3.--5. " BLND0 ,Blending ratio between OSD window 0 and Video Window 0" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0"
|
|
textline " "
|
|
bitfld.long 0x08 2. " TE0 ,Transparency Enable for OSD Window 0" "Disabled,Enabled"
|
|
bitfld.long 0x08 1. " OFF0 ,OSD Window 0 Display Mode" "Field,Frame"
|
|
bitfld.long 0x08 0. " OACT0 ,OSD Window 0 Active (displayed)" "Off,On"
|
|
if (((d.l(asd:0x01c70200+0xc))&0x8000)==0x0)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "OSDWIN1MD,OSD Window 1 Mode Setup Register"
|
|
bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window1,Attribute"
|
|
bitfld.long 0x00 13.--14. " BMP1MD ,Bitmap input mode" "BITMAP,RGB16,RGB24,YC"
|
|
bitfld.long 0x00 12. " CLUTS1 ,CLUT select for OSD Window 1" "ROM-look-up,RAM-look-up"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " OHZ1 ,OSD Window1 Horizontal Zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x00 8.--9. " OVZ1 ,OSD Window 1 Vertical Zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x00 6.--7. " BMW1 ,Bitmap bit width for OSD window 1" "1-bit,2-bits,4-bits,8-bits"
|
|
textline " "
|
|
bitfld.long 0x00 3.--5. " BLND1 ,Blending Ratio for OSD Window 1" "W0-0 V0-1,W0-1/8 V0-7/8,W0-2/8 V0-6/8,W0-3/8 V0-5/8,W0-4/8 V0-4/8,W0-5/8 V0-3/8,W0-6/8 V0-2/8,W0-1 V0-0"
|
|
bitfld.long 0x00 2. " TE1 ,Transparency Enable for OSD Window 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " OFF1 ,OSD Window 1 Display Mode" "Field,Frame"
|
|
textline " "
|
|
bitfld.long 0x00 0. " OACT1 ,OSD Window 1 Active (displayed)" "Off,On"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "OSDATRMD,OSD Attribute Window Mode Setup Register"
|
|
bitfld.long 0x00 15. " OASW ,OSD Window 1 Attribute Mode Enable" "OSD Window0,Attribute"
|
|
bitfld.long 0x00 10.--11. " OHZA ,OSD Attribute Window Horizontal Zoom" "x1,x2,x4,?..."
|
|
bitfld.long 0x00 8.--9. " OVZA ,OSD attribute window vertical zoom" "x1,x2,x4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " BLNKINT ,Blinking Interval" "1-unit,2-units,3-units,4-units"
|
|
bitfld.long 0x00 1. " OFFA ,OSD Attribute Window Display Mode" "Field,Frame"
|
|
bitfld.long 0x00 0. " BLNK ,OSD Attribute Window Blink Enable" "Disabled,Enabled"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "RECTCUR,Rectangular Cursor Setup Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RCAD ,Rectangular cursor color palette address"
|
|
bitfld.long 0x00 7. " CLUTSR ,CLUT Select" "ROM-look-up,RAM-look-up"
|
|
bitfld.long 0x00 4.--6. " RCHW ,Rectangular Cursor Horizontal Line Width" "1 pixel,4 pixels,8 pixels,12 pixels,16 pixels,20 pixels,24 pixels,28 pixels"
|
|
textline " "
|
|
bitfld.long 0x00 1.--3. " RCVW ,Rectangular Cursor Vertical Line Width" "1 line,2 lines,4 lines,6 lines,8 lines,10 lines,12 lines,14 lines"
|
|
bitfld.long 0x00 0. " RCACT ,Rectangular Cursor Active (displayed)" "Off,On"
|
|
width 14.
|
|
group.long 0x18++0x7f
|
|
line.long 0x00 "VIDWIN0OFST,Video Window 0 Offset Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.byte 0x00 9.--12. 0x20 " V0AH ,Video window 0 SDRAM source address"
|
|
endif
|
|
hexmask.long.word 0x00 0.--8. 1. " V0LO ,Video Window 0 Line Offset"
|
|
line.long 0x04 "VIDWIN1OFST,Video Window 1 Offset Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.byte 0x04 9.--12. 0x20 " V1AH ,Video window 1 SDRAM source address"
|
|
endif
|
|
hexmask.long.word 0x04 0.--8. 1. " V1LO ,Video Window 1 Line Offset"
|
|
line.long 0x08 "OSDWIN0OFST,OSD Window 0 Offset Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.byte 0x08 9.--12. 0x20 " B0AH ,Bitmap window 0 SDRAM source address"
|
|
endif
|
|
hexmask.long.word 0x08 0.--8. 1. " O0LO ,OSD Window 0 Line Offset"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
line.long 0x0c "OSDWIN1OFST,Bitmap Window 1/Attribute Window Offset Register"
|
|
hexmask.long.byte 0x0c 9.--12. 0x20 " B1AH ,Bitmap window 1 SDRAM source address"
|
|
else
|
|
line.long 0x0c "OSDWIN1OFST,OSD Window 1 Offset Register"
|
|
endif
|
|
hexmask.long.word 0x0c 0.--8. 1. " O1LO ,OSD Window 1 Line Offset"
|
|
line.long 0x10 "VIDWINADH,Video Window 0/1 Address Register-High"
|
|
hexmask.long.byte 0x10 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High"
|
|
hexmask.long.byte 0x10 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High"
|
|
line.long 0x14 "VIDWIN0ADL,Video Window 0 Address Register-Low"
|
|
hexmask.long.word 0x14 0.--15. 1. " VIDWIN0ADL ,Video Window 0 SDRAM Source Address-Low"
|
|
line.long 0x18 "VIDWIN1ADL,Video Window1 Address Register-Low"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x18 0.--15. 1. " VIDWIN1ADL ,Video window 1 SDRAM source address-Low"
|
|
else
|
|
hexmask.long.byte 0x18 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High"
|
|
hexmask.long.byte 0x18 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High"
|
|
endif
|
|
line.long 0x1c "OSDWINADH,Bitmap Window 0/1 Address Register-High"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.byte 0x1c 8.--14. 1. " V1AH ,BMP window 1/attribute window SDRAM source address-High"
|
|
hexmask.long.byte 0x1c 0.--6. 1. " V0AH ,BMP window 0 SDRAM source address-High"
|
|
else
|
|
hexmask.long.byte 0x1c 8.--14. 1. " V1AH ,Video Window 1 SDRAM Source Address-High"
|
|
hexmask.long.byte 0x1c 0.--6. 1. " V0AH ,Video Window 0 SDRAM Source Address-High"
|
|
endif
|
|
line.long 0x20 "OSDWIN0ADL,Bitmap Window 0 Address Register-Low"
|
|
hexmask.long.word 0x20 0.--15. 1. " BMPWIN0ADL ,Bitmap Window 0 SDRAM Source Address-Low"
|
|
line.long 0x24 "OSDWIN1ADL,Bitmap Window 1 / Attribute Window 1 Address Register-Low"
|
|
hexmask.long.word 0x24 0.--15. 1. " BMPWIN1ADL ,Bitmap Window 1 / Attribute SDRAM Source Address-Low"
|
|
line.long 0x28 "BASEPX,Base Pixel X Register"
|
|
hexmask.long.word 0x28 0.--9. 1. " BPX ,Base Pixel in X horizontal base display reference position for all windows"
|
|
line.long 0x2c "BASEPY,Base Pixel Y Register"
|
|
hexmask.long.word 0x2c 0.--8. 1. " BPY ,Base Pixel in Y vertical base display reference position for all windows"
|
|
line.long 0x30 "VIDWIN0XP,Video Window 0 X-Position Register"
|
|
hexmask.long.word 0x30 0.--10. 1. " V0X ,Video Window 0 X-Position Horizontal display start position"
|
|
line.long 0x34 "VIDWIN0YP,Video Window 0 Y-Position Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x34 0.--9. 1. " V0Y ,Video Window 0 Y-Position Vertical display start position"
|
|
else
|
|
hexmask.long.word 0x34 0.--8. 1. " V0Y ,Video Window 0 Y-Position Vertical display start position"
|
|
endif
|
|
line.long 0x38 "VIDWIN0XL,Video Window 0 X-Size Register"
|
|
hexmask.long.word 0x38 0.--10. 1. " V0W ,Video Window 0 X-Width Horizontal display width in pixels"
|
|
line.long 0x3c "VIDWIN0YL,Video Window 0 Y-Size Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x3c 0.--10. 1. " V0H ,Video Window 0 Y-Height Vertical display height in lines"
|
|
else
|
|
hexmask.long.word 0x3c 0.--9. 1. " V0H ,Video Window 0 Y-Height Vertical display height in pixels"
|
|
endif
|
|
line.long 0x40 "VIDWIN1XP,Video Window 1 X-Position Register"
|
|
hexmask.long.word 0x40 0.--10. 1. " V1X ,Video Window 1 X-Position Horizontal display start position"
|
|
line.long 0x44 "VIDWIN1YP,Video Window 1 Y-Position Register"
|
|
hexmask.long.word 0x44 0.--9. 1. " V1Y ,Video Window 1 Y-Position Vertical display start position"
|
|
line.long 0x48 "VIDWIN1XL,Video Window 1 X-Size Register"
|
|
hexmask.long.word 0x48 0.--10. 1. " V1W ,Video Window 1 X-Width Horizontal display width in pixels"
|
|
line.long 0x4c "VIDWIN1YL,Video Window 1 Y-Size Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x4c 0.--10. 1. " V1H ,Video Window 1 Y-Height Vertical display height in lines"
|
|
else
|
|
hexmask.long.word 0x4c 0.--9. 1. " V1H ,Video Window 1 Y-Height Vertical display height in pixels"
|
|
endif
|
|
line.long 0x50 "OSDWIN0XP,OSD Window 0 X-Position Register"
|
|
hexmask.long.word 0x50 0.--10. 1. " W0X ,OSD Window 0 X-Position Horizontal display start position"
|
|
line.long 0x54 "OSDWIN0YP,OSD Window 0 Y-Position Register"
|
|
hexmask.long.word 0x54 0.--9. 1. " W0Y ,OSD Window 0 Y-Position Vertical display start position"
|
|
line.long 0x58 "OSDWIN0XL,OSD Window 0 X-Size Register"
|
|
hexmask.long.word 0x58 0.--10. 1. " W0W ,OSD Window 0 X-Width Horizontal display width in pixels"
|
|
line.long 0x5c "OSDWIN0YL,OSD Window 0 Y-Size Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x5c 0.--10. 1. " W0H ,OSD Window 0 Y-Height Vertical display height in lines"
|
|
else
|
|
hexmask.long.word 0x5c 0.--9. 1. " W0H ,OSD Window 0 Y-Height Vertical display height in pixels"
|
|
endif
|
|
line.long 0x60 "OSDWIN1XP,OSD Window 1 X-Position Register"
|
|
hexmask.long.word 0x60 0.--10. 1. " W1X ,OSD Window 1 X-Position Horizontal display start position"
|
|
line.long 0x64 "OSDWIN1YP,OSD Window 1 Y-Position Register"
|
|
hexmask.long.word 0x64 0.--9. 1. " W1Y ,OSD Window 1 Y-Position Vertical display start position"
|
|
line.long 0x68 "OSDWIN1XL,OSD Window 1 X-Size Register"
|
|
hexmask.long.word 0x68 0.--10. 1. " W1W ,OSD Window 1 X-Width Horizontal display width in pixels"
|
|
line.long 0x6c "OSDWIN1YL,OSD Window 1 Y-Size Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x6c 0.--10. 1. " W1H ,OSD Window 1 Y-Height Vertical display height in lines"
|
|
else
|
|
hexmask.long.word 0x6c 0.--9. 1. " W1H ,OSD Window 1 Y-Height Vertical display height in pixels"
|
|
endif
|
|
line.long 0x70 "CURXP,Rectangular Cursor Window X-Position Register"
|
|
hexmask.long.word 0x70 0.--10. 1. " RCSX ,Rectangular Cursor Window X-Position Horizontal display start position"
|
|
line.long 0x74 "CURYP,Rectangular Cursor Window Y-Position Register"
|
|
hexmask.long.word 0x74 0.--9. 1. " RCSY ,Rectangular Cursor Window Y-Position Vertical display start position"
|
|
line.long 0x78 "CURXL,Rectangular Cursor Window X-Size Register"
|
|
hexmask.long.word 0x78 0.--10. 1. " RCSW ,Rectangular Cursor Window X-Width Horizontal display width in pixels"
|
|
line.long 0x7c "CURYL,Rectangular Cursor Window Y-Size Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
hexmask.long.word 0x7c 0.--10. 1. " RCSH ,Rectangular Cursor Window Y-Height Vertical display height in lines"
|
|
else
|
|
hexmask.long.word 0x7c 0.--9. 1. " RCSH ,Rectangular Cursor Window Y-Height Vertical display height in pixels"
|
|
endif
|
|
group.long 0xa0++0x1f
|
|
line.long 0x0 "W0BMP01,Window 0 Bitmap Value to Palette Map 0/1 Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PAL01 ,Palette Address for Bitmap Value [1] - OSD Window 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PAL00 ,Palette Address for Bitmap Value [0] - OSD Window 0"
|
|
line.long 0x4 "W0BMP23,Window 0 Bitmap Value to Palette Map 2/3 Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PAL03 ,Palette Address for Bitmap Value [3] - OSD Window 0"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PAL02 ,Palette Address for Bitmap Value [2] - OSD Window 0"
|
|
line.long 0x8 "W0BMP45,Window 0 Bitmap Value to Palette Map 4/5 Register"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PAL05 ,Palette Address for Bitmap Value [5] - OSD Window 0"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PAL04 ,Palette Address for Bitmap Value [4] - OSD Window 0"
|
|
line.long 0xC "W0BMP67,Window 0 Bitmap Value to Palette Map 6/7 Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PAL07 ,Palette Address for Bitmap Value [7] - OSD Window 0"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PAL06 ,Palette Address for Bitmap Value [6] - OSD Window 0"
|
|
line.long 0x10 "W0BMP89,Window 0 Bitmap Value to Palette Map 8/9 Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PAL09 ,Palette Address for Bitmap Value [9] - OSD Window 0"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PAL08 ,Palette Address for Bitmap Value [8] - OSD Window 0"
|
|
line.long 0x14 "W0BMPAB,Window 0 Bitmap Value to Palette Map A/B Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PAL11 ,Palette Address for Bitmap Value [B] - OSD Window 0"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PAL10 ,Palette Address for Bitmap Value [A] - OSD Window 0"
|
|
line.long 0x18 "W0BMPCD,Window 0 Bitmap Value to Palette Map C/D Register"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PAL13 ,Palette Address for Bitmap Value [D] - OSD Window 0"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PAL12 ,Palette Address for Bitmap Value [C] - OSD Window 0"
|
|
line.long 0x1C "W0BMPEF,Window 0 Bitmap Value to Palette Map E/F Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PAL15 ,Palette Address for Bitmap Value [F] - OSD Window 0"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PAL14 ,Palette Address for Bitmap Value [E] - OSD Window 0"
|
|
group.long 0xc0++0x1f
|
|
line.long 0x0 "W1BMP01,Window 1 Bitmap Value to Palette Map 0/1 Register"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PAL01 ,Palette Address for Bitmap Value [1] - OSD Window 1"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PAL00 ,Palette Address for Bitmap Value [0] - OSD Window 1"
|
|
line.long 0x4 "W1BMP23,Window 1 Bitmap Value to Palette Map 2/3 Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PAL03 ,Palette Address for Bitmap Value [3] - OSD Window 1"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PAL02 ,Palette Address for Bitmap Value [2] - OSD Window 1"
|
|
line.long 0x8 "W1BMP45,Window 1 Bitmap Value to Palette Map 4/5 Register"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PAL05 ,Palette Address for Bitmap Value [5] - OSD Window 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PAL04 ,Palette Address for Bitmap Value [4] - OSD Window 1"
|
|
line.long 0xC "W1BMP67,Window 1 Bitmap Value to Palette Map 6/7 Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PAL07 ,Palette Address for Bitmap Value [7] - OSD Window 1"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PAL06 ,Palette Address for Bitmap Value [6] - OSD Window 1"
|
|
line.long 0x10 "W1BMP89,Window 1 Bitmap Value to Palette Map 8/9 Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PAL09 ,Palette Address for Bitmap Value [9] - OSD Window 1"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PAL08 ,Palette Address for Bitmap Value [8] - OSD Window 1"
|
|
line.long 0x14 "W1BMPAB,Window 1 Bitmap Value to Palette Map A/B Register"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PAL11 ,Palette Address for Bitmap Value [B] - OSD Window 1"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PAL10 ,Palette Address for Bitmap Value [A] - OSD Window 1"
|
|
line.long 0x18 "W1BMPCD,Window 1 Bitmap Value to Palette Map C/D Register"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PAL13 ,Palette Address for Bitmap Value [D] - OSD Window 1"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PAL12 ,Palette Address for Bitmap Value [C] - OSD Window 1"
|
|
line.long 0x1C "W1BMPEF,Window 1 Bitmap Value to Palette Map E/F Register"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PAL15 ,Palette Address for Bitmap Value [F] - OSD Window 1"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PAL14 ,Palette Address for Bitmap Value [E] - OSD Window 1"
|
|
width 14.
|
|
group.long 0xe0++0x1f
|
|
line.long 0x00 "VBNDRY,Test Mode Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TSTPATNCHROMA ,Chrominance data input register for test mode"
|
|
bitfld.long 0x00 3. " VFILINCMD ,Vertical Filter Increment Mode" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 2. " VBNDRYPRCSEN ,Video boundary processing active" "Off,On"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x00 1. " TEST1 ,TI Test #1" "Normal,RESET_ALL_REGS"
|
|
bitfld.long 0x00 0. " TEST0 ,TI Test #0" "Normal,TEST_MODE"
|
|
endif
|
|
width 14.
|
|
line.long 0x04 "EXTMODE,Extended Mode Register"
|
|
bitfld.long 0x04 15. " EXPMDSEL ,Expansion Filtering Mode Select" "Before,After"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x04 13.--14. " SCRNHEXP ,Horizontal Expansion Mode" "x 1,NTSC x9/8 horizontal,Horizontal,?..."
|
|
else
|
|
bitfld.long 0x04 13.--14. " SCRNHEXP ,Horizontal Expansion Mode" "x 1,x 9/8,x 3/2,?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 12. " SCRNVEXP ,Vertical Expansion Mode" "x 1,x 6/5"
|
|
bitfld.long 0x04 11. " OSD1BLDCHR ,OSD Bitmap1 Blend Characteristics" "Global,Pixel level"
|
|
textline " "
|
|
bitfld.long 0x04 10. " OSD0BLDCHR ,OSD Bitmap0 Blend Characteristics" "Global,Pixel level"
|
|
bitfld.long 0x04 9. " ATNOSD1EN ,Attenuation Enable for REC601 for OSD Bitmap 1" "Normal,Attenuated"
|
|
textline " "
|
|
bitfld.long 0x04 8. " ATNOSD0EN ,Attenuation Enable for REC601 for OSD Bitmap 0" "Normal,Attenuated"
|
|
bitfld.long 0x04 7. " OSDHRSZ15 ,OSD Bitmap Window Horizontal 1.5x Expansion" "Normal,x 1.5"
|
|
textline " "
|
|
bitfld.long 0x04 6. " VIDHRSZ15 ,OSD Video Window Horizontal 1.5x Expansion" "Normal,x 1.5"
|
|
bitfld.long 0x04 5. " ZMFILV1HEN ,Video Window 1 Horizontal Zoom Filter" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x04 4. " ZMFILV1VEN ,Video Window 1 Vertical Zoom Filter" "Off,On"
|
|
bitfld.long 0x04 3. " ZMFILV0HEN ,Video Window 0 Horizontal Zoom Filter" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x04 2. " ZMFILV0VEN ,Video Window 0 Vertical Zoom Filter" "Off,On"
|
|
bitfld.long 0x04 1. " EXPFILHEN ,Horizontal Expansion Filter Enable" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EXPFILVEN ,Vertical Expansion Filter Enable" "Off,On"
|
|
line.long 0x08 "MISCCTL,Miscellaneous Control Register"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
bitfld.long 0x08 15. " BLDSEL ,Blend factor select bit for RGB888 mode" "Compatible,New"
|
|
bitfld.long 0x08 14. " YC420 ,Read data format select bit" "422,420"
|
|
bitfld.long 0x08 13. " BBF_TH ,Bitmap blend factor through mode select bit" "Blend factor,Blend factor through mode"
|
|
textline " "
|
|
bitfld.long 0x08 12. " CRM_CALC ,Blend calculation for Croma" "Signed,Unsigned"
|
|
textline " "
|
|
bitfld.long 0x08 7. " FIELD_ID ,Field ID" "Top,Bottom"
|
|
eventfld.long 0x08 6. " DMANG ,OSD DMA Status" "No error,Error"
|
|
bitfld.long 0x08 4. " RSEL ,CLUT ROM selection" "DM320,DM270"
|
|
else
|
|
bitfld.long 0x08 7. " FIELD_ID ,Video window RGB mode enable" "Top,Bottom"
|
|
bitfld.long 0x08 6. " DMANG ,OSD DMA Status" "No error,Error"
|
|
bitfld.long 0x08 4. " RSEL ,CLUT ROM selection" "CLUT0,CLUT1"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 3. " CPBSY ,CLUT Write Busy" "Not busy,Busy"
|
|
width 14.
|
|
line.long 0x0c "CLUTRAMYCB,CLUT RAM Y/Cb Setup Register"
|
|
hexmask.long.byte 0x0c 8.--15. 1. " Y ,Write data (Y) into built-in CLUT RAM"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " CB ,Write data (Cb) into built-in CLUT RAM"
|
|
sif (cpu()=="DM365"||cpu()=="DM368")
|
|
line.long 0x10 "CLUTRAMCR,CLUT RAM Cr/Mapping Setup Register"
|
|
else
|
|
line.long 0x10 "CLUTRAMCR,CLUT RAMCR Setup Register"
|
|
endif
|
|
hexmask.long.byte 0x10 8.--15. 1. " CR ,Write data (Cr) into built-in CLUT-RAM"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CADDR ,CLUT Write Pallette Address"
|
|
line.long 0x14 "TRANSPVALL,Transparency Color Code - Lower Register"
|
|
hexmask.long.word 0x14 0.--15. 1. " RGBL ,RGB Transparency Value"
|
|
line.long 0x18 "TRANSPVALU,Transparency Color Code - Upper Register"
|
|
hexmask.long.byte 0x18 8.--15. 1. " Y ,Luma Transparency Value"
|
|
hexmask.long.byte 0x18 0.--7. 1. " RGBU ,RGB Transparency Value"
|
|
line.long 0x1c "TRANSPBMPIDX,Transparent Index Code for Bitmaps Register"
|
|
hexmask.long.byte 0x1c 8.--15. 1. " BMP1 ,OSD Bitmap 1 transparent value"
|
|
hexmask.long.byte 0x1c 0.--7. 1. " BMP0 ,OSD Bitmap 0 transparent value"
|
|
width 0xb
|
|
tree.end
|
|
tree "VENC (VPBE - Video Encoder / Digital LCD Controller)"
|
|
base asd:0x01c70400
|
|
width 11.
|
|
if (((d.l(asd:0x01c70400))&0x410)==0x0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "VMOD,Video Mode Register"
|
|
bitfld.long 0x00 12.--13. " VDMD ,Digital video output mode" "YCbCr 16 bit,YCbCr 8 bit,RGB666 parallel 18 bit,RGB8 serial 8 bit"
|
|
bitfld.long 0x00 10. " ITLC ,Interlaced Scan Mode Enable" "Interlace,Non-interlace"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select SDTV/HDTV" "NTSC/525P,PAL/625P,?..."
|
|
bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL,Not NTSC/PAL"
|
|
bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VIE ,Composite Analog Output Enable" "Fixed L,Normal"
|
|
bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
elif (((d.l(asd:0x01c70400))&0x410)==0x400)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "VMOD,Video Mode Register"
|
|
bitfld.long 0x00 12.--13. " VDMD ,Digital video output mode" "YCbCr 16 bit,YCbCr 8 bit,RGB666 parallel 18 bit,RGB8 serial 8 bit"
|
|
bitfld.long 0x00 11. " ITLCL ,Non-interlace line number select (NTSC/PAL)" "262/312 lines,263/313 lines"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ITLC ,Interlaced Scan Mode Enable" "Interlace,Non-interlace"
|
|
bitfld.long 0x00 6.--7. " TVTYP ,TV Format Type Select SDTV/HDTV" "NTSC/525P,PAL/625P,?..."
|
|
textline " "
|
|
bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave"
|
|
bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL,Not NTSC/PAL"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking"
|
|
bitfld.long 0x00 1. " VIE ,Composite Analog Output Enable" "Fixed L,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "VMOD,Video Mode Register"
|
|
bitfld.long 0x00 12.--13. " VDMD ,Digital video output mode" "YCbCr 16 bit,YCbCr 8 bit,RGB666 parallel 18 bit,RGB8 serial 8 bit"
|
|
bitfld.long 0x00 9. " NSIT ,Nonstandard interlace mode" "Progressive,Interlace"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SLAVE ,Master-slave select" "Master,Slave"
|
|
bitfld.long 0x00 4. " VMD ,Video timing" "NTSC/PAL,Not NTSC/PAL"
|
|
textline " "
|
|
bitfld.long 0x00 3. " BLNK ,Blanking enable" "Normal,Blanking"
|
|
bitfld.long 0x00 1. " VIE ,Composite Analog Output Enable" "Fixed L,Normal"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VENC ,Video Encoder Enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
group.long 0x04++0x7
|
|
line.long 0x00 "VIDCTL,Video Interface I/O Control Register"
|
|
bitfld.long 0x00 14. " VCLKP ,VCLK output polarity" "Non-inverse,Inverse"
|
|
bitfld.long 0x00 13. " VCLKE ,VCLK output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " VCLKZ ,VCLK pin output enable" "Output,Tri-state"
|
|
bitfld.long 0x00 8. " SYDIR ,Horizontal/Vertical Sync pin I/O control" "Output,Input"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " DOMD ,Digital data output mode" "Normal,Inversed,L level,H level"
|
|
bitfld.long 0x00 3. " YCSWAP ,Swaps YOUT/COUT pins" "Normal,Interchange"
|
|
textline " "
|
|
bitfld.long 0x00 2. " YCOL ,YOUT/COUT pin output level" "Normal,DC level"
|
|
bitfld.long 0x00 1. " YCOMD ,YC Output Mode (Input Through Mode)" "Digital video output,YIN/CIN input through"
|
|
textline " "
|
|
bitfld.long 0x00 0. " YCDIR ,YOUT / COUT I/O Direction" "Output,Input"
|
|
line.long 0x04 "VDPRO,Video Data Processing Register"
|
|
bitfld.long 0x04 14.--15. " PFLTC ,C Prefilter select" "No filter,1+1,1+2+1,?..."
|
|
bitfld.long 0x04 12.--13. " PFLTY ,Y Prefilter select" "No filter,1+1,1+2+1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 11. " PFLTR ,Prefilter sampling frequency" "ENC/2,ENC"
|
|
bitfld.long 0x04 9. " CBTYP ,Color Bar Type" "75%,100%"
|
|
textline " "
|
|
bitfld.long 0x04 8. " CBMD ,Color bar mode" "Normal,Color bar"
|
|
bitfld.long 0x04 6. " ATRGB ,Input video (Attenuation control for RGB)" "No attenuation,REC601"
|
|
textline " "
|
|
bitfld.long 0x04 5. " ATYCC ,Input video (Attenuation control forYCbCr)" "No attenuation,REC601"
|
|
bitfld.long 0x04 4. " ATYCOM ,Input video (Attention control for composite)" "No attenuation,REC601"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CUPS ,Chroma signal up-sampling enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " YUPS ,Y signal up-sampling enable" "Disabled,Enabled"
|
|
width 11.
|
|
if (((d.l(asd:0x01c70400))&0x20)==0x20)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "SYNCCTL,Sync Control Register"
|
|
bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H"
|
|
bitfld.long 0x00 12.--13. " EXFMD ,External field detection mode" "Rising edge,Raw field,Vsync as ID,Vsync phase"
|
|
bitfld.long 0x00 11. " EXFIV ,External field input inversion" "Non-inverse,Inverse"
|
|
textline " "
|
|
bitfld.long 0x00 10. " EXSYNC ,External sync select" "HSYNC/VSYNC,CCD sync"
|
|
bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low"
|
|
bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CSP ,Composite signal output polarity" "Active high,Active low"
|
|
bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width"
|
|
textline " "
|
|
bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite"
|
|
bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low"
|
|
bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "SYNCCTL,Sync Control Register"
|
|
bitfld.long 0x00 14. " OVD ,OSD vsync delay" "No delay,0.5H"
|
|
bitfld.long 0x00 10. " EXSYNC ,External sync select" "HSYNC/VSYNC,CCD sync"
|
|
bitfld.long 0x00 9. " EXVIV ,External vertical sync input polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EXHIV ,External horizontal sync input polarity" "Active high,Active low"
|
|
bitfld.long 0x00 7. " CSP ,Composite signal output polarity" "Active high,Active low"
|
|
bitfld.long 0x00 6. " CSE ,Composite signal output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SYSW ,Output sync select" "Normal,Pulse width"
|
|
bitfld.long 0x00 4. " VSYNCS ,Vertical sync output signal" "Vertical,Composite"
|
|
bitfld.long 0x00 3. " VPL ,Vertical sync output polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HPL ,Horizontal sync output polarity" "Active high,Active low"
|
|
bitfld.long 0x00 1. " SYEV ,Vertical sync output enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SYEH ,Horizontal sync output enable" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
if (((d.l(asd:0x01c70400+0xc))&0x20)==0x20)
|
|
group.long 0x10++0x7
|
|
line.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register"
|
|
hexmask.long.word 0x00 0.--12. 1. " HSPLS ,Horizontal sync pulse width"
|
|
line.long 0x04 "VSPLS,Vertical Sync Pulse Width Register"
|
|
hexmask.long.word 0x04 0.--12. 1. " VSPLS ,Vertical sync pulse width"
|
|
else
|
|
hgroup.long 0x10++0x7
|
|
hide.long 0x00 "HSPLS,Horizontal Sync Pulse Width Register"
|
|
hide.long 0x04 "VSPLS,Vertical Sync Pulse Width Register"
|
|
endif
|
|
group.long 0x18++0xb
|
|
line.long 0x00 "HINT,Horizontal Interval Register"
|
|
hexmask.long.word 0x00 0.--12. 1. " HINT ,Horizontal interval"
|
|
line.long 0x04 "HSTART,Horizontal Valid Data Start Position Register"
|
|
hexmask.long.word 0x04 0.--12. 1. " HSTART ,Horizontal valid data start position"
|
|
line.long 0x08 "HVALID,Horizontal Data Valid Range Register"
|
|
hexmask.long.word 0x08 0.--12. 1. " HVALID ,Horizontal data valid range"
|
|
group.long 0x24++0x13
|
|
line.long 0x00 "VINT,Vertical Interval Register"
|
|
hexmask.long.word 0x00 0.--12. 1. " VINT ,Vertical interval"
|
|
line.long 0x04 "VSTART,Vertical Valid Data Start Position Register"
|
|
hexmask.long.word 0x04 0.--12. 1. " VSTART ,Vertical valid data start position"
|
|
line.long 0x08 "VVALID,Vertical Data Valid Range Register"
|
|
hexmask.long.word 0x08 0.--12. 1. " VVALID ,Vertical data valid range"
|
|
line.long 0x0c "HSDLY,Horizontal Sync Delay Register"
|
|
hexmask.long.word 0x0c 0.--12. 1. " HSDLY ,Output delay of horizontal sync signal"
|
|
line.long 0x10 "VSDLY,Vertical Sync Delay Register"
|
|
hexmask.long.word 0x10 0.--12. 1. " VSDLY ,Output delay of vertical sync signal"
|
|
width 11.
|
|
if (((d.l(asd:0x01c70400))&0x3000)==0x0)
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "YCCTL,YCbCr Control Register"
|
|
bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched"
|
|
bitfld.long 0x00 2.--3. " YCP ,YC output order" "CbCr,CrCb,?..."
|
|
bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656"
|
|
elif (((d.l(asd:0x01c70400))&0x3000)==0x1000)
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "YCCTL,YCbCr Control Register"
|
|
bitfld.long 0x00 4. " CHM ,Chroma Output Mode" "Not latched,Latched"
|
|
bitfld.long 0x00 2.--3. " YCP ,YC output order" "Cb-Y-Cr-Y,Y-Cr-Y-Cb,Cr-Y-Cb-Y,Y-Cb-Y-Cr"
|
|
bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656"
|
|
else
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "YCCTL,YCbCr Control Register"
|
|
bitfld.long 0x00 0. " R656 ,REC656 mode" "Normal,REC656"
|
|
endif
|
|
if (((d.l(asd:0x01c70400+0x3c))&0x800)==0x800)
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "RGBCTL,RGB Control Register"
|
|
bitfld.long 0x00 15. " RGBLAT ,RGB latch setting" "Normal,Latch"
|
|
bitfld.long 0x00 13. " IRSWP ,Swap order of data output in IronMan mode" "Normal,Data swap"
|
|
bitfld.long 0x00 12. " IR9 ,IronMan 9-bit mode" "8 bits,9 bits"
|
|
textline " "
|
|
bitfld.long 0x00 11. " IRONM ,Iron-man type RGB output" "Normal,Iron-man"
|
|
bitfld.long 0x00 10. " DFLTR ,RGB LPF sampling frequency" "ENC/2,ENC"
|
|
bitfld.long 0x00 8.--9. " DFLTS ,RGB LPF select" "No filter,1+2+1,1+2+4+2+1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " RGBEF ,RGB Output Order for Even Fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..."
|
|
bitfld.long 0x00 0.--2. " RGBOF ,RGB Output Order for Odd Fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..."
|
|
else
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "RGBCTL,RGB Control Register"
|
|
bitfld.long 0x00 15. " RGBLAT ,RGB latch setting" "Normal,Latch"
|
|
bitfld.long 0x00 11. " IRONM ,Iron-man type RGB output" "Normal,Iron-man"
|
|
bitfld.long 0x00 10. " DFLTR ,RGB LPF sampling frequency" "ENC/2,ENC"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DFLTS ,RGB LPF select" "No filter,1+2+1,1+2+4+2+1,?..."
|
|
bitfld.long 0x00 4.--6. " RGBEF ,RGB Output Order for Even Fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..."
|
|
bitfld.long 0x00 0.--2. " RGBOF ,RGB Output Order for Odd Fields" "R0-G1-B2,R0-B1-G2,G0-R1-B2,G0-B1-R2,B0-R1-G2,B0-G1-R2,?..."
|
|
textline " "
|
|
endif
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "RGBCLP,RGB Level Clipping Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " UPCLIP ,Upper clip level for RGB output"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OFST ,Offset level for RGB output"
|
|
if (((d.l(asd:0x01c70400+0x44))&0x40)==0x40)
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "LINECTL,Line Identification Control Register"
|
|
bitfld.long 0x00 11. " VSTF ,Vertical data valid start position field mode" "Normal,Field"
|
|
bitfld.long 0x00 8.--10. " VCLID ,Vertical culling line position" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 7. " VCLRD ,Vertical culling counter reset mode" "Zero,Random"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VCL56 ,Digital output vertical culling" "No culling,5/6 culling"
|
|
bitfld.long 0x00 5. " HLDF ,Digital output field hold" "Normal,Output"
|
|
bitfld.long 0x00 4. " HLDL ,Digital output line hold" "Normal,Output"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LINID ,Start line ID control in even field" "0,1"
|
|
bitfld.long 0x00 2. " DCKCLP ,DCLK pattern switching by culling line ID" "Off,On"
|
|
bitfld.long 0x00 1. " DCKCLI ,DCLK polarity inversion by culling line ID" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RGBCL ,RGB output order switching by culling line ID" "Off,On"
|
|
else
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "LINECTL,Line Identification Control Register"
|
|
bitfld.long 0x00 11. " VSTF ,Vertical data valid start position field mode" "Normal,Field"
|
|
bitfld.long 0x00 6. " VCL56 ,Digital output vertical culling" "No culling,5/6 culling"
|
|
bitfld.long 0x00 5. " HLDF ,Digital output field hold" "Normal,Output"
|
|
textline " "
|
|
bitfld.long 0x00 4. " HLDL ,Digital output line hold" "Normal,Output"
|
|
bitfld.long 0x00 3. " LINID ,Start line ID control in even field" "0,1"
|
|
bitfld.long 0x00 2. " DCKCLP ,DCLK pattern switching by culling line ID" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCKCLI ,DCLK polarity inversion by culling line ID" "Off,On"
|
|
bitfld.long 0x00 0. " RGBCL ,RGB output order switching by culling line ID" "Off,On"
|
|
textline " "
|
|
endif
|
|
group.long 0x48++0x5f
|
|
line.long 0x00 "CULLLINE,Culling Line Control Register"
|
|
hexmask.long.byte 0x00 12.--15. 1. " CLOF ,Culling line ID toggle position (Odd field)"
|
|
hexmask.long.byte 0x00 8.--11. 1. " CLEF ,Culling line ID toggle position (Even field)"
|
|
hexmask.long.byte 0x00 0.--3. 1. " CULI ,Culling line ID inversion interval"
|
|
line.long 0x04 "LCDOUT,LCD Output Signal Control Register"
|
|
bitfld.long 0x04 8. " OES ,Output Enable Signal Selection Maps LCD_OE or BRIGHT" "LCD_OE,BRIGHT"
|
|
bitfld.long 0x04 7. " FIDP ,Field Id output polarity" "Non-inverse,Inverse"
|
|
bitfld.long 0x04 6. " PWMP ,PWM output pulse polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 5. " PWME ,PWM output control" "Off,On"
|
|
bitfld.long 0x04 4. " ACE ,LCD_AC output control" "Off,On"
|
|
bitfld.long 0x04 3. " BRP ,Bright output polarity" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x04 2. " BRE ,Bright output control" "Off,On"
|
|
bitfld.long 0x04 1. " OEP ,LCD_OE output polarity" "Active high,Active low"
|
|
bitfld.long 0x04 0. " OEE ,LCD_OE output control" "Off,On"
|
|
line.long 0x08 "BRTS,Brightness Start Position Signal Control Register"
|
|
hexmask.long.word 0x08 0.--12. 1. " BRTS ,Bright pulse start position"
|
|
line.long 0x0c "BRTW,Brightness Width Signal Control Register"
|
|
hexmask.long.word 0x0c 0.--12. 1. " BRTW ,Bright pulse width"
|
|
line.long 0x10 "ACCTL,LCD_AC Signal Control Register"
|
|
bitfld.long 0x10 13.--15. " ACTF ,LCD_AC toggle interval" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.word 0x10 0.--12. 1. " ACTH ,LCD_AC toggle horizontal position"
|
|
line.long 0x14 "PWMP,PWM Start Position Signal Control Register"
|
|
hexmask.long.word 0x14 0.--12. 1. " PWMP ,PWM output period"
|
|
line.long 0x18 "PWMW,PWM Width Signal Control Register"
|
|
hexmask.long.word 0x18 0.--12. 1. " PWMW ,PWM output pulse width"
|
|
line.long 0x1c "DCLKCTL,DCLK Control Register"
|
|
bitfld.long 0x1c 15. " DCKIM ,Specified for internal DCLK from output DCLK" "Off,On"
|
|
bitfld.long 0x1c 12.--13. " DOFST ,DCLK output offset" "0,-0.5,0.5,1"
|
|
bitfld.long 0x1c 11. " DCKEC ,DCLK pattern mode" "Level,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 10. " DCKME ,DCLK mask control" "Off,On"
|
|
bitfld.long 0x1c 9. " DCKOH ,DCLK output divide" "Div by 1,Div by 2"
|
|
bitfld.long 0x1c 8. " DCKIH ,Internal DCLK output divide" "Div by 1,Div by 2"
|
|
textline " "
|
|
bitfld.long 0x1c 0.--5. " DCKPW ,DCLK pattern valid bit width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
line.long 0x20 "DCLKPTN0,DCLK Pattern 0 Register"
|
|
hexmask.long.word 0x20 0.--15. 1. " DCPTN0 ,DCLK pattern"
|
|
line.long 0x24 "DCLKPTN1,DCLK Pattern 1 Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " DCPTN1 ,DCLK pattern"
|
|
line.long 0x28 "DCLKPTN2,DCLK Pattern 2 Register"
|
|
hexmask.long.word 0x28 0.--15. 1. " DCPTN2 ,DCLK pattern"
|
|
line.long 0x2c "DCLKPTN3,DCLK Pattern 3 Register"
|
|
hexmask.long.word 0x2c 0.--15. 1. " DCPTN3 ,DCLK pattern"
|
|
line.long 0x30 "DCLKPTN0A,DCLK Auxiliary Pattern 0 Register"
|
|
hexmask.long.word 0x30 0.--15. 1. " DCPTN0A ,DCLK pattern (auxiliary)"
|
|
line.long 0x34 "DCLKPTN1A,DCLK Auxiliary Pattern 1 Register"
|
|
hexmask.long.word 0x34 0.--15. 1. " DCPTN1A ,DCLK pattern (auxiliary)"
|
|
line.long 0x38 "DCLKPTN2A,DCLK Auxiliary Pattern 2 Register"
|
|
hexmask.long.word 0x38 0.--15. 1. " DCPTN2A ,DCLK pattern (auxiliary)"
|
|
line.long 0x3c "DCLKPTN3A,DCLK Auxiliary Pattern 3 Register"
|
|
hexmask.long.word 0x3c 0.--15. 1. " DCPTN3A ,DCLK pattern (auxiliary)"
|
|
line.long 0x40 "DCLKHS,Horizontal DCLK Mask Start Register"
|
|
hexmask.long.word 0x40 0.--12. 1. " DCHS ,Horizontal DCLK mask start position"
|
|
line.long 0x44 "DCLKHSA,Horizontal Auxiliary DCLK Mask Start Register"
|
|
hexmask.long.word 0x44 0.--12. 1. " DCHS ,Horizontal DCLK (auxiliary) mask start position"
|
|
line.long 0x48 "DCLKHR,Horizontal DCLK Mask Range Register"
|
|
hexmask.long.word 0x48 0.--12. 1. " DCHR ,Horizontal DCLK mask range"
|
|
line.long 0x4c "DCLKVS,Vertical DCLK Mask Start Register"
|
|
hexmask.long.word 0x4c 0.--12. 1. " DCVS ,DCLK vertical mask start position"
|
|
line.long 0x50 "DCLKVR,Vertical DCLK Mask Range Register"
|
|
hexmask.long.word 0x50 0.--12. 1. " DCVR ,DCLK vertical mask range"
|
|
width 11.
|
|
line.long 0x54 "CAPCTL,Caption Control Register"
|
|
hexmask.long.byte 0x54 8.--14. 1. " CADF ,Closed caption default data register"
|
|
bitfld.long 0x54 0.--1. " CAPF ,Closed caption field select" "No data,Odd field,Even field,Both"
|
|
line.long 0x58 "CAPDO,Caption Data Odd Field Register"
|
|
hexmask.long.byte 0x58 8.--14. 1. " CADO0 ,Closed caption default data0"
|
|
hexmask.long.byte 0x58 0.--6. 1. " CADO1 ,Closed caption default data1"
|
|
line.long 0x5c "CAPDE,Caption Data Even Field Register"
|
|
hexmask.long.byte 0x5c 8.--14. 1. " CADE0 ,Closed caption default data0"
|
|
hexmask.long.byte 0x5c 0.--6. 1. " CADE1 ,Closed caption default data1"
|
|
if (((d.l(asd:0x01c70400))&0xC0)==0x40)
|
|
hgroup.long 0xa8++0x3
|
|
hide.long 0x00 "ATR0,Video Attribute Data 0 Register"
|
|
group.long 0xac++0x7
|
|
line.long 0x00 "ATR1,Video Attribute Data 1 Register"
|
|
bitfld.long 0x00 4.--7. " GROUP2 ,Group2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0.--3. " GROUP1 ,Group1 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x04 "ATR2,Video Attribute Data 2 Register"
|
|
bitfld.long 0x04 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion"
|
|
bitfld.long 0x04 3.--5. "GROUP4 ,Group4 Data" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " GROUP3 ,Group3 Data" "0,1,2,3,4,5,6,7"
|
|
elif (((d.l(asd:0x01c70400))&0xC0)==0x0)
|
|
group.long 0xa8++0xb
|
|
line.long 0x00 "ATR0,Video Attribute Data 0 Register"
|
|
bitfld.long 0x00 3.--5. " WORD0B ,Word0-B Data" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " WORD0A ,Word0-A Data" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "ATR1,Video Attribute Data 1 Register"
|
|
bitfld.long 0x04 4.--7. " WORD2 ,Word2 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x04 0.--3. " WORD1 ,Word1 Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
line.long 0x08 "ATR2,Video Attribute Data 2 Register"
|
|
bitfld.long 0x08 7. " ATR_EN ,Atribute Data Insertion Enable" "No insertion,Insertion"
|
|
hexmask.long.byte 0x08 0.--5. 1. " CRC ,CRC Data"
|
|
else
|
|
hgroup.long 0xa8++0x7
|
|
hide.long 0x00 "ATR0,Video Attribute Data 0 Register"
|
|
hgroup.long 0xac++0x3
|
|
hide.long 0x00 "ATR1,Video Attribute Data 1 Register"
|
|
hgroup.long 0xb0++0x3
|
|
hide.long 0x00 "ATR2,Video Attribute Data 2 Register"
|
|
endif
|
|
group.long 0xb8++0x17
|
|
line.long 0x00 "VSTAT,Video Status Register"
|
|
bitfld.long 0x00 9. " CAEST ,Closed caption status" "Ready,Not ready"
|
|
bitfld.long 0x00 8. " CAOST ,Closed caption status" "Ready,Not ready"
|
|
bitfld.long 0x00 4. " FIDST ,Field ID monitor" "0,1"
|
|
line.long 0x04 "RAMADR,GCP/FRC Table RAM Address"
|
|
hexmask.long.byte 0x04 0.--5. 1. " RAMADR ,Gamma Correction Table RAM address"
|
|
line.long 0x08 "RAMPORT,GCP/FRC Table RAM Data Port"
|
|
hexmask.long.word 0x08 0.--15. 1. " RAMPORT ,GCP/FRC Table RAM Data Port"
|
|
line.long 0x0c "DACTST,DAC Test Register"
|
|
bitfld.long 0x0c 12. " DAPD0 ,DAC0 power-down" "Normal,Power-down"
|
|
bitfld.long 0x0c 10. " DAPDC ,DAC DC output mode" "Normal,DC output"
|
|
hexmask.long.word 0x0c 0.--9. 1. " DALVL ,DC level control"
|
|
line.long 0x10 "YCOLVL,YOUT and COUT Levels Register"
|
|
hexmask.long.byte 0x10 8.--15. 1. " YLVL ,YOUT DC level"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CLVL ,COUT DC level"
|
|
line.long 0x14 "SCPROG,Sub-Carrier Programming Register"
|
|
hexmask.long.word 0x14 0.--9. 1. " SCSD ,Sub-carrier initial phase value"
|
|
group.long 0xdc++0x3
|
|
line.long 0x00 "CVBS,Composite Mode Register"
|
|
bitfld.long 0x00 12.--14. " YCDLY ,Delay adjustment of Y signal in composite signal" "0,1,2,3,-4,-3,-2,-1"
|
|
bitfld.long 0x00 5. " CVLVL ,Composite video level (sync/white)" "286mV/714mV,300mV/700mV"
|
|
bitfld.long 0x00 4. " CSTUP ,Setup for composite" "0%,7.5%"
|
|
bitfld.long 0x00 3. " CLBS ,Blanking shape disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " CRCUT ,Chroma signal low pass filter select" "1.5 MHz,3 MHz"
|
|
bitfld.long 0x00 1. " CBBLD ,Blanking build up time for composite output" "140 us,300 us"
|
|
bitfld.long 0x00 0. " CSBLD ,Sync build up time for composite output" "140 us,200 us"
|
|
group.long 0xe4++0x7
|
|
line.long 0x00 "ETMG0,CVBS Timing Control 0 Register"
|
|
hexmask.long.byte 0x00 8.--11. 1. " CEPW ,Equalizing pulse width offset for composite output"
|
|
hexmask.long.byte 0x00 4.--7. 1. " CFSW ,Field sync pulse width offset for composite output"
|
|
hexmask.long.byte 0x00 0.--3. 1. " CLSW ,Line sync pulse width offset for composite output"
|
|
line.long 0x04 "ETMG1,CVBS Timing Control 1 Register"
|
|
hexmask.long.byte 0x04 12.--15. 1. " CBSE ,Burst end position offset for composite output"
|
|
hexmask.long.byte 0x04 8.--11. 1. " CBST ,Burst start position offset for composite output"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CFPW ,Front porch position offset for composite output"
|
|
hexmask.long.byte 0x04 0.--3. 1. " CLBI ,Line blanking end position offset for composite output"
|
|
group.long 0x114++0x33
|
|
line.long 0x00 "DRGBX0,Digital RGB Matrix 0 Register"
|
|
hexmask.long.word 0x00 0.--10. 1. " DGY ,YCbCr->RGB matrix coefficient GY for digital RGB out"
|
|
line.long 0x04 "DRGBX1,Digital RGB Matrix 1 Register"
|
|
hexmask.long.word 0x04 0.--10. 1. " DRV ,YCbCr->RGB matrix coefficient RV for digital RGB out"
|
|
line.long 0x08 "DRGBX2,Digital RGB Matrix 2 Register"
|
|
hexmask.long.word 0x08 0.--10. 1. " DGU ,YCbCr->RGB matrix coefficient GU for digital RGB out"
|
|
line.long 0x0c "DRGBX3,Digital RGB Matrix 3 Register"
|
|
hexmask.long.word 0x0c 0.--10. 1. " DGV ,YCbCr->RGB matrix coefficient GV for digital RGB out"
|
|
line.long 0x10 "DRGBX4,Digital RGB Matrix 4 Register"
|
|
hexmask.long.word 0x10 0.--10. 1. " DBU ,YCbCr->RGB matrix coefficient BU for digital RGB out"
|
|
line.long 0x14 "VSTARTA,Vertical Data Valid Start Position for Even Field Register"
|
|
hexmask.long.word 0x14 0.--12. 1. " VSTARTA ,Vertical data valid start position for even field"
|
|
line.long 0x18 "OSDCLK0,OSD Clock Control 0 Register"
|
|
hexmask.long.byte 0x18 0.--3. 1. " OCPW ,OSD clock pattern bit width"
|
|
line.long 0x1c "OSDCLK1,OSD Clock Control 1 Register"
|
|
hexmask.long.word 0x1c 0.--15. 1. " OCPT ,OSD clock pattern"
|
|
line.long 0x20 "HVLDCL0,Horizontal Valid Culling Control 0 Register"
|
|
bitfld.long 0x20 4. " HCM ,Horizontal valid culling mode" "Normal,Horizontal"
|
|
hexmask.long.byte 0x20 0.--3. 1. " HCPW ,Horizontal valid culling pattern bit width"
|
|
line.long 0x24 "HVLDCL1,Horizontal Valid Culling Control 1 Register"
|
|
hexmask.long.word 0x24 0.--15. 1. " HCPT ,Horizontal valid culling pattern"
|
|
line.long 0x28 "OSDHADV,OSD Horizontal Sync Advance Register"
|
|
hexmask.long.byte 0x28 0.--7. 1. " OHAD ,OSD horizontal sync advance"
|
|
line.long 0x2c "CLKCTL,Clock Control Register"
|
|
bitfld.long 0x2c 8. " CKGAM ,Clock Enable for Gamma Correction Table" "Off,On"
|
|
bitfld.long 0x2c 4. " CLKDIG ,Clock Enable for Digital LCD Controller" "Off,On"
|
|
bitfld.long 0x2c 0. " CLKENC ,Clock Enable for Video Encoder" "Off,On"
|
|
line.long 0x30 "GAMCTL,Enable Gamma Correction Register"
|
|
bitfld.long 0x30 0. " GAMON ,Gamma Correction Enable" "Off,On"
|
|
width 0xb
|
|
tree.end
|
|
tree "VPSSBL (VPSS Buffer Logic)"
|
|
base asd:0x01c70800
|
|
width 9.
|
|
rgroup.long 0x2780++0x3
|
|
line.long 0x00 "PID,Peripheral Revision and Class Information Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification VPBE module"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
group.long 0x2784++0x13
|
|
line.long 0x00 "PCR,Peripheral Control Register"
|
|
bitfld.long 0x00 6. " WBLCTRL ,Select DDR2/mDDR write transfer" "IPIPE,?..."
|
|
bitfld.long 0x00 4.--5. " RBLCTRL ,Select DDR2/mDDR read master" "IPIPEIF,Reserved,H3A,?..."
|
|
bitfld.long 0x00 0.--2. " CPRIORITY ,Sets priority of VPSS" "High,0,1,2,3,4,5,Low"
|
|
width 9.
|
|
line.long 0x04 "INTSTAT,Interrupt Status Register"
|
|
eventfld.long 0x04 12. " IPIPE_INT5 ,IPIPE_INT5 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 11. " IPIPE_INT4 ,IPIPE_INT4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 10. " IPIPE_INT3 ,IPIPE_INT3 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 9. " IPIPE_INT2 ,IPIPE_INT2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 8. " IPIPE_INT1 ,IPIPE_INT1 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 7. " IPIPE_INT0 ,IPIPE_INT0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 6. " IPIPEIFINT ,IPIPEIFIN interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 5. " OSDINT ,OSDINT interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 4. " VENCINT ,VENCINT interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 3. " H3AINT ,H3AINT interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 2. " CCDC_VDINT2 ,CCDC_VDINT2 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x04 1. " CCDC_VDINT1 ,CCDC_VDINT1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x04 0. " CCDC_VDINT0 ,CCDC_VDINT0 interrupt" "No interrupt,Interrupt"
|
|
width 9.
|
|
line.long 0x08 "INTSEL,Interrupt Selection Register"
|
|
bitfld.long 0x08 28.--31. " INTSEL7 ,Selects the interrupt for vpss-int[7]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 24.--27. " INTSEL6 ,Selects the interrupt for vpss-int[6]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x08 20.--23. " INTSEL5 ,Selects the interrupt for vpss-int[5]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 16.--19. " INTSEL4 ,Selects the interrupt for vpss-int[4]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " INTSEL3 ,Selects the interrupt for vpss-int[3]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 8.--11. " INTSEL2 ,Selects the interrupt for vpss-int[2]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x08 4.--7. " INTSEL1 ,Selects the interrupt for vpss-int[1]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 0.--3. " INTSEL0 ,Selects the interrupt for vpss-int[0]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
line.long 0x0c "EVTSEL,Event Selection Register"
|
|
bitfld.long 0x0C 28.--31. " EVTSEL3 ,Selects the interrupt for vpss-int[3]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x0C 24.--27. " EVTSEL2 ,Selects the interrupt for vpss-int[2]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 20.--23. " EVTSEL1 ,Selects the interrupt for vpss-int[1]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x0C 16.--19. " EVTSEL0 ,Selects the interrupt for vpss-int[0]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " EVTSEL8 ,Selects the interrupt for vpss-int[8]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,IPIPE_INT4_BSC,IPIPE_INT5_MMR,?..."
|
|
line.long 0x10 "MEMCTRL,Shared Memory Master Select Register"
|
|
bitfld.long 0x10 1. " RSZ_CTRL ,Resizer memory select" "IPIPE,?..."
|
|
bitfld.long 0x10 0. " DFCCTRL ,Defect correction memory select" "IPIPE,CCDC"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "VPFE (Video Processing Front End)"
|
|
tree "CCDC (VPFE - CCD Controller)"
|
|
base asd:0x01c70600
|
|
width 11.
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "SYNCEN,CCDC Synchronization Enable"
|
|
bitfld.word 0x00 1. " WEN ,Data Write Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " VDHDEN ,VD/HD Enable" "Disabled,Enabled"
|
|
if ((d.w(asd:0x01c70600+0x4)&0x3000)==0x0)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "MODESET,CCDC Mode Setup"
|
|
bitfld.word 0x00 15. " FLDSTAT ,Field Status" "Odd,Even"
|
|
bitfld.word 0x00 14. " LPF ,3-tap Low-Pass (anti-aliasing) Filter" "Off,On"
|
|
bitfld.word 0x00 12.--13. " INPMOD ,Setting of data input mode" "CCD RAW data,YCbCr 16-bit,YCbCr 8-bit,?..."
|
|
textline " "
|
|
bitfld.word 0x00 11. " PACK8 ,Pack to 8-bits/pixel" "Normal,8 bits/pixel"
|
|
bitfld.word 0x00 8.--10. " DATASFT ,CCD Data Right Shift" "No shift,1-bit,2-bits,3-bits,4-bits,5-bits,6-bits,?..."
|
|
bitfld.word 0x00 7. " FLDMODE ,Sensor Field Mode" "Non-interlaced,Interlaced"
|
|
textline " "
|
|
bitfld.word 0x00 6. " DATAPOL ,CCD Data Polarity" "Normal,One's complement"
|
|
bitfld.word 0x00 5. " EXWEN ,External WEN Selection" "Not used,Used"
|
|
bitfld.word 0x00 4. " FLDPOL ,Field Indicator Polarity" "Positive,Negative"
|
|
textline " "
|
|
bitfld.word 0x00 3. " HDPOL ,HD Sync Polarity" "Positive,Negative"
|
|
bitfld.word 0x00 2. " VDPOL ,VD Sync Polarity" "Positive,Negative"
|
|
bitfld.word 0x00 0. " VDHOUT ,VD/HD Sync Direction" "Input,Output"
|
|
else
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "MODESET,CCDC Mode Setup"
|
|
bitfld.word 0x00 15. " FLDSTAT ,Field Status" "Odd,Even"
|
|
bitfld.word 0x00 14. " LPF ,3-tap Low-Pass (anti-aliasing) Filter" "Off,On"
|
|
bitfld.word 0x00 12.--13. " INPMOD ,Setting of data input mode" "CCD RAW data,YCbCr 16-bit,YCbCr 8-bit,?..."
|
|
textline " "
|
|
bitfld.word 0x00 11. " PACK8 ,Pack to 8-bits/pixel" "Normal,8 bits/pixel"
|
|
bitfld.word 0x00 7. " FLDMODE ,Sensor Field Mode" "Non-interlaced,Interlaced"
|
|
textline " "
|
|
bitfld.word 0x00 6. " DATAPOL ,CCD Data Polarity" "Normal,One's complement"
|
|
bitfld.word 0x00 5. " EXWEN ,External WEN Selection" "Not used,Used"
|
|
bitfld.word 0x00 4. " FLDPOL ,Field Indicator Polarity" "Positive,Negative"
|
|
textline " "
|
|
bitfld.word 0x00 3. " HDPOL ,HD Sync Polarity" "Positive,Negative"
|
|
bitfld.word 0x00 2. " VDPOL ,VD Sync Polarity" "Positive,Negative"
|
|
bitfld.word 0x00 0. " VDHOUT ,VD/HD Sync Direction" "Input,Output"
|
|
endif
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "HDWIDTH,CCDC HD Pulse Width"
|
|
hexmask.word 0x00 0.--11. 1. " HDW ,Width of HD sync pulse"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "VDWIDTH,CCDC VD Pulse Width"
|
|
hexmask.word 0x00 0.--11. 1. " VDW ,Width of VD sync pulse"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "PPLN,CCDC Pixels Per Line"
|
|
hexmask.word 0x00 0.--15. 1. " PPLN ,Pixels per line"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "LPFR,CCDC Lines Per Frame"
|
|
hexmask.word 0x00 0.--15. 1. " HLPFR ,Half lines per filed or frame"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "SPH,CCDC Start Pixel Horizontal"
|
|
hexmask.word 0x00 0.--14. 1. " SPH ,Start pixel horizontal"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "NPH,CCDC Number of Pixels Horizontal"
|
|
hexmask.word 0x00 0.--14. 1. " NPH ,Number of pixels horizontal"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "SLV0,CCDC Start Line Vertical - Field 0"
|
|
hexmask.word 0x00 0.--14. 1. " SLV0 ,Start line vertical (field 0)"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "SLV1,CCDC Start Line Vertical - Field 1"
|
|
hexmask.word 0x00 0.--14. 1. " SLV1 ,Start line vertical (field 1)"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "NLV,Number of Lines Vertical"
|
|
hexmask.word 0x00 0.--14. 1. " NLV ,Number of lines vertical"
|
|
width 11.
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "CULH,CCDC Culling - Horizontal"
|
|
bitfld.word 0x00 15. " CULHEVN7 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 14. " CULHEVN6 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 13. " CULHEVN5 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CULHEVN4 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 11. " CULHEVN3 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 10. " CULHEVN2 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CULHEVN1 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 8. " CULHEVN0 ,Horizontal Culling Pattern for Even Line" "Culled,Retained"
|
|
bitfld.word 0x00 7. " CULHODD7 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CULHODD6 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
bitfld.word 0x00 5. " CULHODD5 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
bitfld.word 0x00 4. " CULHODD4 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CULHODD3 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
bitfld.word 0x00 2. " CULHODD2 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
bitfld.word 0x00 1. " CULHODD1 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CULHODD0 ,Horizontal Culling Pattern for Odd Line" "Culled,Retained"
|
|
group.word 0x30++0x1
|
|
line.word 0x00 "CULV,Culling - Vertical"
|
|
bitfld.word 0x00 7. " CULV7 ,Vertical Culling Pattern" "Culled,Retained"
|
|
bitfld.word 0x00 6. " CULV6 ,Vertical Culling Pattern" "Culled,Retained"
|
|
bitfld.word 0x00 5. " CULV5 ,Vertical Culling Pattern" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 4. " CULV4 ,Vertical Culling Pattern" "Culled,Retained"
|
|
bitfld.word 0x00 3. " CULV3 ,Vertical Culling Pattern" "Culled,Retained"
|
|
bitfld.word 0x00 2. " CULV2 ,Vertical Culling Pattern" "Culled,Retained"
|
|
textline " "
|
|
bitfld.word 0x00 1. " CULV1 ,Vertical Culling Pattern" "Culled,Retained"
|
|
bitfld.word 0x00 0. " CULV0 ,Vertical Culling Pattern" "Culled,Retained"
|
|
width 11.
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "HSIZE,CCDC Horizontal Size"
|
|
bitfld.word 0x00 12. " ADR_UPDT ,SDRAM address update" "Increment,Decrement"
|
|
hexmask.word 0x00 0.--11. 1. " LNOFST ,Address offset for each line"
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "SDOFST,CCDC SDRAM Line Offset"
|
|
bitfld.word 0x00 14. " FIINV ,Field identification signal inverse" "Not inversed,Inversed"
|
|
bitfld.word 0x00 12.--13. " FOFST ,Line offset value of odd field" "+1 line,+2 lines,+3 lines,+4 lines"
|
|
bitfld.word 0x00 9.--11. " LOFTS0 ,Line offset values of even line and even field" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines"
|
|
textline " "
|
|
bitfld.word 0x00 6.--8. " LOFTS1 ,Line offset values of odd line and even field" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines"
|
|
bitfld.word 0x00 3.--5. " LOFTS2 ,Line offset values of even line and odd field" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines"
|
|
bitfld.word 0x00 0.--2. " LOFTS3 ,Line offset values of odd line and odd field" "+1 line,+2 lines,+3 lines,+4 lines,-1 line,-2 lines,-3 lines,-4 lines"
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "STADRH,CCDC SDRAM High Address"
|
|
hexmask.word.byte 0x00 0.--6. 1. " ADRH ,Upper 7 bits of the SDRAM starting address for CCDC output"
|
|
group.word 0x40++0x1
|
|
line.word 0x00 "STADRL,CCDC SDRAM Low Address"
|
|
hexmask.word 0x00 0.--15. 1. " ADRL ,Lower 16 bits of the SDRAM starting address for CCDC output"
|
|
group.word 0x44++0x1
|
|
line.word 0x00 "CLAMP,CCD Data Clamping"
|
|
bitfld.word 0x00 15. " CLAMPEN ,Clamp Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 13.--14. " OBSLEN ,Optical Black Sample Length" "2 pixels,4 pixels,8 pixels,16 pixels"
|
|
hexmask.word 0x00 0.--12. 1. " OBST ,Start Pixel of Optical Black Samples"
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "DCSUB,CCDC DC Clamp"
|
|
bitfld.word 0x00 14.--15. " OBSLN ,Optical black sample lines" "2 lines,4 lines,8 lines,16 lines"
|
|
hexmask.word 0x00 0.--13. 1. " DCSUB ,DC level to subtract from CCD data"
|
|
group.word 0x4c++0x1
|
|
line.word 0x00 "COLPTN,CCD Color Pattern"
|
|
bitfld.word 0x00 14.--15. " CPF1P0 ,Color pattern for pixel position 0 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 12.--13. " CPF1P1 ,Color pattern for pixel position 1 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 10.--11. " CPF1P2 ,Color pattern for pixel position 2 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 8.--9. " CPF1P3 ,Color pattern for pixel position 3 (Field 1)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " CPF0P0 ,Color pattern for pixel position 0 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 4.--5. " CPF0P1 ,Color pattern for pixel position 1 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 2.--3. " CPF0P2 ,Color pattern for pixel position 2 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
bitfld.word 0x00 0.--1. " CPF0P3 ,Color pattern for pixel position 3 (Field 0)" "R/Ye,Gr/Cy,Gb/G,B/Mg"
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "BLKCMP0,Black Compensation #1 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " R_YE ,Black level compensation for R/Ye pixels"
|
|
hexmask.word.byte 0x00 0.--7. 1. " GR_CY ,Black level compensation for Gr/Cy pixels"
|
|
group.word 0x54++0x1
|
|
line.word 0x00 "BLKCMP1,Black Compensation #2 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " GB_G ,Black level compensation for Gb/G pixels"
|
|
hexmask.word.byte 0x00 0.--7. 1. " B_MG ,Black level compensation for B/Mg pixels"
|
|
group.word 0x58++0x1
|
|
line.word 0x00 "MEDFILT,CCD Median Filter"
|
|
hexmask.word 0x00 0.--13. 1. " MFTHR ,Threshold value for median filter"
|
|
group.word 0x5c++0x1
|
|
line.word 0x00 "RYEGAIN,CCD RYE Gain Adjustment"
|
|
hexmask.word 0x00 0.--10. 1. " GAIN ,Gain adjustment factor for CCD data"
|
|
group.word 0x60++0x1
|
|
line.word 0x00 "GRCYGAIN,CCD GRCY Gain Adjustment"
|
|
hexmask.word 0x00 0.--10. 1. " GAIN ,Gain adjustment factor for CCD data"
|
|
group.word 0x64++0x1
|
|
line.word 0x00 "GBGGAIN,CCD GBG Gain Adjustment"
|
|
hexmask.word 0x00 0.--10. 1. " GAIN ,Gain adjustment factor for CCD data"
|
|
group.word 0x68++0x1
|
|
line.word 0x00 "BMGGAIN,CCD BMG Gain Adjustment"
|
|
hexmask.word 0x00 0.--10. 1. " GAIN ,Gain adjustment factor for CCD data"
|
|
group.word 0x6c++0x1
|
|
line.word 0x00 "OFFSET,CCD Offset Adjustment"
|
|
hexmask.word 0x00 0.--9. 1. " OFFSET ,Offset adjustment after gain adjustment"
|
|
group.word 0x70++0x1
|
|
line.word 0x00 "OUTCLIP,CCDC Output Clipping Value"
|
|
hexmask.word 0x00 0.--13. 1. " OCLIP ,Output clipping value after gain and offset"
|
|
group.word 0x74++0x1
|
|
line.word 0x00 "VDINT0,CCDC VD Interrupt Register 0"
|
|
hexmask.word 0x00 0.--14. 1. " VDINT0 ,VD0 Interrupt Timing"
|
|
group.word 0x78++0x1
|
|
line.word 0x00 "VDINT1,CCDC VD Interrupt Register 1"
|
|
hexmask.word 0x00 0.--14. 1. " VDINT1 ,VD1 Interrupt Timing"
|
|
width 11.
|
|
group.word 0x80++0x1
|
|
line.word 0x00 "GAMMAWD,CCDC Gamma Correction Settings Register"
|
|
bitfld.word 0x00 10.--11. " MFIL1 ,Median filter mode for IPIPE" "No filter,Average,Median,?..."
|
|
bitfld.word 0x00 8.--9. " MFIL2 ,Median Filter for SDRAM capture" "No filter,Average,Median,?..."
|
|
bitfld.word 0x00 5. " CFAP ,CFA Pattern" "Mozaic,Stripe"
|
|
textline " "
|
|
bitfld.word 0x00 2.--4. " GWDI ,Gamma Width Input (For A-LAW table & H3A port)" "Bits 13-4,Bits 12-3,Bits 11-2,Bits 10-1,Bits 9-0,?..."
|
|
bitfld.word 0x00 0. " CCDTBL ,Apply Gamma (A-LAW) to CCDC data saved to SDRAM" "Disabled,Enabled"
|
|
group.word 0x84++0x1
|
|
line.word 0x00 "REC656IF,REC656 Control Register"
|
|
bitfld.word 0x00 1. " ECCFVH ,FVH Error Correction Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " R656ON ,REC656 Interface Enable" "Disabled,Enabled"
|
|
if (((d.w(ad:(0x01c70600+0x88)))&0x400)==0x400)
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "CCDCFG,CCD Configuration Register"
|
|
bitfld.word 0x00 15. " VDLC ,Enable synchronizing function registers on VSYNC" "Latched,Not latched"
|
|
bitfld.word 0x00 13. " MSBINVI ,MSB of Chroma input signal stored to SDRAM inverted" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " BSWD ,Byte Swap Data stored to SDRAM" "Normal,Swap bytes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " Y8POS ,Location of Y signal when YCbCr 8bit data is input" "Even pixel,Odd pixel"
|
|
bitfld.word 0x00 10. " EXTRG ,External Trigger" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " TRGSEL ,Signal that initializes SDRAM address" "WEN bit,FID input"
|
|
textline " "
|
|
bitfld.word 0x00 8. " WENLOG ,Specifies CCD valid area" "ANDed,ORed"
|
|
bitfld.word 0x00 6. " FIDMD ,Setting of FID detection function" "VSYNC,Not latched"
|
|
bitfld.word 0x00 5. " BW656 ,The data width in REC656 input mode" "8-bits,10-bits"
|
|
textline " "
|
|
bitfld.word 0x00 4. " YCINSWP ,Y input (YIN[7:0]) and C input (CIN[7:0]) are swapped" "Normal,Swapped"
|
|
else
|
|
group.word 0x88++0x1
|
|
line.word 0x00 "CCDCFG,CCD Configuration Register"
|
|
bitfld.word 0x00 15. " VDLC ,Enable synchronizing function registers on VSYNC" "Latched,Not latched"
|
|
bitfld.word 0x00 13. " MSBINVI ,MSB of Chroma input signal stored to SDRAM inverted" "Normal,Inverted"
|
|
bitfld.word 0x00 12. " BSWD ,Byte Swap Data stored to SDRAM" "Normal,Swap bytes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " Y8POS ,Location of Y signal when YCbCr 8bit data is input" "Even pixel,Odd pixel"
|
|
bitfld.word 0x00 10. " EXTRG ,External Trigger" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " WENLOG ,Specifies CCD valid area" "ANDed,ORed"
|
|
textline " "
|
|
bitfld.word 0x00 6. " FIDMD ,Setting of FID detection function" "VSYNC,Not latched"
|
|
bitfld.word 0x00 5. " BW656 ,The data width in CCIR656 input mode" "8-bits,10-bits"
|
|
bitfld.word 0x00 4. " YCINSWP ,Y input (YIN[7:0]) and C input (CIN[7:0]) are swapped" "Normal,Swapped"
|
|
textline " "
|
|
endif
|
|
width 11.
|
|
group.word 0x94++0x1
|
|
line.word 0x00 "FMTSPH,CCDC FMT Start Pixel Horizontal Register"
|
|
hexmask.word 0x00 0.--12. 1. " FMTSPH ,Formatter Start pixel horizontal"
|
|
group.word 0x98++0x1
|
|
line.word 0x00 "FMTLNH,CCDC FMT Number Of Pixel Horizontal Register"
|
|
hexmask.word 0x00 0.--12. 1. " FMTLNH ,Formatter Number of pixels in horizontal"
|
|
group.word 0x9c++0x1
|
|
line.word 0x00 "FMTSLV,CCDC FMT Start Line Vertical Register"
|
|
hexmask.word 0x00 0.--12. 1. " FMTSLV ,Formatter Start line vertical"
|
|
group.word 0xa0++0x1
|
|
line.word 0x00 "FMTLNV,CCDC FMT Number Line Vertical Register"
|
|
hexmask.word 0x00 0.--14. 1. " FMTLNV ,Formatter Number of lines in vertical"
|
|
group.word 0xf4++0x1
|
|
line.word 0x00 "LSCCFG1,Lens Shading Correction Configuration 1 Register"
|
|
bitfld.word 0x00 4.--5. " GFMODE ,Gain Factor Mode" "U8Q8/interpolation,U16Q14/interpolation,Reserved,U16Q14/No interpolation"
|
|
bitfld.word 0x00 0. " LSCEN ,Lens shading correction enable" "Disabled,Enabled"
|
|
width 11.
|
|
group.word 0xf8++0x1
|
|
line.word 0x00 "LSCCFG2,Lens Shading Correction Configuration 2 Register"
|
|
bitfld.word 0x00 14.--15. " GFTSEL_OPOL ,Gain factor table selection for odd pixel odd line" "Table 1,Table 2,Table 3,?..."
|
|
bitfld.word 0x00 12.--13. " GFTSEL_EPOL ,Gain factor table selection for even pixel odd line" "Table 1,Table 2,Table 3,?..."
|
|
bitfld.word 0x00 10.--11. " GFTSEL_OPEL ,Gain factor table selection for odd pixel even line" "Table 1,Table 2,Table 3,?..."
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " GFTSEL_EPEL ,Gain factor table selection for even pixel even line" "Table 1,Table 2,Table 3,?..."
|
|
bitfld.word 0x00 4.--7. " GFTINV ,Gain factor table interval" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 1.--3. " GFTSF ,Gain factor table scaling factor" "0,1,2,3,4,5,6,7"
|
|
group.word 0xfc++0x1
|
|
line.word 0x00 "LSCH0,Lens Shading Correction - Center Position (H0) Register"
|
|
bitfld.word 0x00 14.--15. " LSCCSW ,Color channel switch for shading factors (H 0 , V 0 , k h , k v) configuration" "Table 1,Table 2,Table 3,?..."
|
|
hexmask.word 0x00 0.--13. 1. " LSCH0 ,Lens center position (H0: H direction) Range: 0-16383"
|
|
group.word 0x100++0x1
|
|
line.word 0x00 "LSCV0,Lens Shading Correction - Center Position (V0) Register"
|
|
hexmask.word 0x00 0.--13. 1. " LSCV0 ,Lens center position (V0: V direction) Range: 0-16383"
|
|
group.word 0x104++0x1
|
|
line.word 0x00 "LSCKH,Lens Shading Correction - Horizontal Coefficients Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " KHR ,Horizontal-right coefficient"
|
|
hexmask.word.byte 0x00 0.--7. 1. " KHL ,Horizontal-left coefficient"
|
|
group.word 0x108++0x1
|
|
line.word 0x00 "LSCKV,Lens Shading Correction - Vertical Coefficients Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " KVL ,Vertical-lower coefficient"
|
|
hexmask.word.byte 0x00 0.--7. 1. " KVU ,Vertical-upper coefficient"
|
|
group.word 0x10c++0x1
|
|
line.word 0x00 "LSCMEMCTL,Lens Shading Correction - Memory Control Register"
|
|
bitfld.word 0x00 4. " LSCMBSY ,Memory access busy flag" "Not busy,Busy"
|
|
bitfld.word 0x00 3. " LSCMRD ,Memory read (for debug)" "Write,Read"
|
|
bitfld.word 0x00 2. " LSCMARST ,Memory address reset" "Increment,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " LSCMSL ,Memory selection" "Table 1,Table 2,Table 3,?..."
|
|
group.word 0x110++0x1
|
|
line.word 0x00 "LSCMEMD,Lens Shading Correction - Memory Write Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " LSCMD ,Memory write data"
|
|
group.word 0x114++0x1
|
|
line.word 0x00 "LSCMEMQ,Lens Shading Correction - Memory Read Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " LSCMQ ,Memory read data (for debug purpose)"
|
|
width 11.
|
|
group.word 0x118++0x1
|
|
line.word 0x00 "DFCCTL,Defect Correction - Control Register"
|
|
bitfld.word 0x00 8.--10. " VDFLSFT ,Vertical line defect level shift value" "0,1,2,3,4,5,6,Not allowed"
|
|
bitfld.word 0x00 7. " VDFCUDA ,Vertical line defect correction upper pixels disable" "Corrected,Not corrected"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " VDFCSL ,Vertical line defect correction mode select" "Normal,HORZINTERPOLIFSAT,HORZINTERPOL,?..."
|
|
bitfld.word 0x00 4. " VDFCEN ,Vertical line defect correction enable" "Off,On"
|
|
textline " "
|
|
bitfld.word 0x00 0. " GDFCEN ,General defect correction enable" "Off,On"
|
|
group.word 0x11c++0x1
|
|
line.word 0x00 "DFCVSAT,Defect Correction - Vertical Saturation Level Register"
|
|
hexmask.word 0x00 0.--13. 1. " VDFSLV ,Vertical line defect correction saturation level"
|
|
width 11.
|
|
group.word 0x120++0x1
|
|
line.word 0x00 "DFCMEMCTL,Defect Correction - Memory Control Register"
|
|
bitfld.word 0x00 4. " DFCMCLR ,Memory clear" "Clear completed,Clear"
|
|
bitfld.word 0x00 2. " DFCMARST ,Memory address reset" "Increment,Clear"
|
|
bitfld.word 0x00 1. " DFCMRD ,Memory read (for debug)" "Read completed,Read"
|
|
textline " "
|
|
bitfld.word 0x00 0. " DFCMWR ,Memory write" "Write completed,Write"
|
|
group.word 0x124++0x1
|
|
line.word 0x00 "DFCMEM0,Defect Correction - Set V Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " DFCMEM0 ,Memory 0"
|
|
group.word 0x128++0x1
|
|
line.word 0x00 "DFCMEM1,Defect Correction - Set H Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " DFCMEM1 ,Memory 1"
|
|
group.word 0x12c++0x1
|
|
line.word 0x00 "DFCMEM2,Defect Correction - Set SUB1 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DFCMEM2 ,Memory 2"
|
|
group.word 0x130++0x1
|
|
line.word 0x00 "DFCMEM3,Defect Correction - Set SUB2 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DFCMEM3 ,Memory 3"
|
|
group.word 0x134++0x1
|
|
line.word 0x00 "DFCMEM4,Defect Correction - Set SUB3 Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " DFCMEM4 ,Memory 4"
|
|
width 11.
|
|
group.word 0x138++0x1
|
|
line.word 0x00 "CSCCTL,Color Space Converter Enable Register"
|
|
bitfld.word 0x00 15. " CSCEN[15] ,CSC enable 15" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " CSCEN[14] ,CSC enable 14" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " CSCEN[13] ,CSC enable 13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " CSCEN[12] ,CSC enable 12" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " CSCEN[11] ,CSC enable 11" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CSCEN[10] ,CSC enable 10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " CSCEN[9] ,CSC enable 9" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " CSCEN[8] ,CSC enable 8" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " CSCEN[7] ,CSC enable 7" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " CSCEN[6] ,CSC enable 6" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " CSCEN[5] ,CSC enable 5" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " CSCEN[4] ,CSC enable 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " CSCEN[3] ,CSC enable 3" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " CSCEN[2] ,CSC enable 2" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " CSCEN[1] ,CSC enable 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " CSCEN[0] ,CSC enable 0" "Disabled,Enabled"
|
|
group.word 0x13c++0x1
|
|
line.word 0x00 "CSCM0,Color Space Converter - Coefficients #0 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM01 ,Color space conversion coefficient value M01"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM00 ,Color space conversion coefficient value M00"
|
|
group.word 0x140++0x1
|
|
line.word 0x00 "CSCM1,Color Space Converter - Coefficients #1 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM03 ,Color space conversion coefficient value M03"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM02 ,Color space conversion coefficient value M02"
|
|
group.word 0x144++0x1
|
|
line.word 0x00 "CSCM2,Color Space Converter - Coefficients #2 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM11 ,Color space conversion coefficient value M11"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM10 ,Color space conversion coefficient value M10"
|
|
group.word 0x148++0x1
|
|
line.word 0x00 "CSCM3,Color Space Converter - Coefficients #3 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM13 ,Color space conversion coefficient value M13"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM12 ,Color space conversion coefficient value M12"
|
|
group.word 0x14c++0x1
|
|
line.word 0x00 "CSCM4,Color Space Converter - Coefficients #4 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM21 ,Color space conversion coefficient value M21"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM20 ,Color space conversion coefficient value M20"
|
|
group.word 0x150++0x1
|
|
line.word 0x00 "CSCM5,Color Space Converter - Coefficients #5 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM23 ,Color space conversion coefficient value M23"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM22 ,Color space conversion coefficient value M22"
|
|
group.word 0x154++0x1
|
|
line.word 0x00 "CSCM6,Color Space Converter - Coefficients #6 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM31 ,Color space conversion coefficient value M31"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM30 ,Color space conversion coefficient value M30"
|
|
group.word 0x158++0x1
|
|
line.word 0x00 "CSCM7,Color Space Converter - Coefficients #7 Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " CSCM33 ,Color space conversion coefficient value M33"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CSCM32 ,Color space conversion coefficient value M32"
|
|
group.word 0x15c++0x1
|
|
line.word 0x00 "DATAOFST,Data Offset Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " VOFST ,V direction data offset for defect correction and lens shading correction"
|
|
hexmask.word.byte 0x00 0.--7. 1. " HOFST ,H direction data offset for defect correction and lens shading correction"
|
|
width 0xb
|
|
tree.end
|
|
tree "IPIPEIF (VPFE - Image Pipe IF)"
|
|
base asd:0x01c70100
|
|
width 8.
|
|
if ((d.w(asd:0x01c70100+0x4)&0xc)==0x0)
|
|
hgroup.word 0x00++0x1
|
|
hide.word 0x00 "ENABLE,IPIPE I/F Enable Register"
|
|
else
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "ENABLE,IPIPE I/F Enable Register"
|
|
bitfld.word 0x00 0. " ENABLE ,IPIPE I/F Enable" "Disabled,Enabled"
|
|
endif
|
|
if ((d.w(asd:0x01c70100+0x4)&0x40c)==0x0)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
textline " "
|
|
textline " "
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0x4)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Output[13:0]" "Read[15:2],Read[14:1],Read[13:0],Read[12:0]&'0',Read[11:0]&'00',Read[10:0]&'000',Read[9:0]&'0000',?..."
|
|
bitfld.word 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV"
|
|
bitfld.word 0x00 9. " IALAW ,Inverse A-law Conversion" "Off,On"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PACK8IN ,8-Bit Packed Mode" "16 bits/pixel,8 bits/pixel"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
bitfld.word 0x00 0. " ONESHOT ,One Shot Mode" "Continuous mode,One shot mode"
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0x8)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Output[13:0]" "Read[15:2],Read[14:1],Read[13:0],Read[12:0]&'0',Read[11:0]&'00',Read[10:0]&'000',Read[9:0]&'0000',?..."
|
|
bitfld.word 0x00 9. " IALAW ,Inverse A-law Conversion" "Off,On"
|
|
bitfld.word 0x00 8. " PACK8IN ,8-Bit Packed Mode" "16 bits/pixel,8 bits/pixel"
|
|
textline " "
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
textline " "
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0xc)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
bitfld.word 0x00 0. " ONESHOT ,One Shot Mode" "Continuous mode,One shot mode"
|
|
textline " "
|
|
textline " "
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0x400)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
bitfld.word 0x00 4.--6. " CLKDIV ,Clock Selection when Offline Mode (SDRAM Input Mode)" "1/2,1/3,1/4,1/5,1/6,1/8,1/16,1/32"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
textline " "
|
|
textline " "
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0x404)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Output[13:0]" "Read[15:2],Read[14:1],Read[13:0],Read[12:0]&'0',Read[11:0]&'00',Read[10:0]&'000',Read[9:0]&'0000',?..."
|
|
bitfld.word 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV"
|
|
bitfld.word 0x00 9. " IALAW ,Inverse A-law Conversion" "Off,On"
|
|
textline " "
|
|
bitfld.word 0x00 8. " PACK8IN ,8-Bit Packed Mode" "16 bits/pixel,8 bits/pixel"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
bitfld.word 0x00 4.--6. " CLKDIV ,Clock Selection when Offline Mode (SDRAM Input Mode)" "1/2,1/3,1/4,1/5,1/6,1/8,1/16,1/32"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
bitfld.word 0x00 0. " ONESHOT ,One Shot Mode" "Continuous mode,One shot mode"
|
|
elif ((d.w(asd:0x01c70100+0x4)&0x40c)==0x408)
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 11.--13. " DATASFT ,SDRAM Read Data Shift Output[13:0]" "Read[15:2],Read[14:1],Read[13:0],Read[12:0]&'0',Read[11:0]&'00',Read[10:0]&'000',Read[9:0]&'0000',?..."
|
|
bitfld.word 0x00 9. " IALAW ,Inverse A-law Conversion" "Off,On"
|
|
bitfld.word 0x00 8. " PACK8IN ,8-Bit Packed Mode" "16 bits/pixel,8 bits/pixel"
|
|
textline " "
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
bitfld.word 0x00 4.--6. " CLKDIV ,Clock Selection when Offline Mode (SDRAM Input Mode)" "1/2,1/3,1/4,1/5,1/6,1/8,1/16,1/32"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
else
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "CFG,IPIPE I/F Configuration Register"
|
|
bitfld.word 0x00 10. " CLKSEL ,IPIPEIF & IPIPE Clock Select" "PCLK,CLKDIV"
|
|
bitfld.word 0x00 7. " AVGFILT ,Averaging Filter" "Off,On"
|
|
bitfld.word 0x00 4.--6. " CLKDIV ,Clock Selection when Offline Mode (SDRAM Input Mode)" "1/2,1/3,1/4,1/5,1/6,1/8,1/16,1/32"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " INPSRC ,CCD/YCbCr Data Port Selection" "CCD Controller,SDRAM (raw),CCD Controller & SDRAM (Darkframe),SDRAM (YCbCr)"
|
|
textline " "
|
|
bitfld.word 0x00 1. " DECM ,Pixel Decimation" "No decimation,Decimate"
|
|
bitfld.word 0x00 0. " ONESHOT ,One Shot Mode" "Continuous mode,One shot mode"
|
|
textline " "
|
|
endif
|
|
if ((d.w(asd:0x01c70100+0x4)&0xc)==0x8)
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PPLN,IPIPE I/F Start pixel in HD Register"
|
|
hexmask.word 0x00 0.--12. 1. " PPLN ,Start Pixel in Horizontal Sync (HD)"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "LPFR,IPIPE I/F Start line in VD Register"
|
|
hexmask.word 0x00 0.--12. 1. " LPFR ,Start Pixel in Vertical Sync (VD)"
|
|
elif (((d.w(asd:0x01c70100+0x4)&0xc)==0x4)||((d.w(asd:0x01c70100+0x4)&0xc)==0xc))
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "PPLN,IPIPE I/F Interval of HD Register"
|
|
hexmask.word 0x00 0.--12. 1. " PPLN ,Interval of Horizontal Sync (HD)"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "LPFR,IPIPE I/F Interval of VD"
|
|
hexmask.word 0x00 0.--12. 1. " LPFR ,Interval of Vertical Sync (VD)"
|
|
else
|
|
hgroup.word 0x08++0x1
|
|
hide.word 0x00 "PPLN,Interval of Horizontal Sync (HD)/Start Pixel in Horizontal Sync (HD)"
|
|
hgroup.word 0x0c++0x1
|
|
hide.word 0x00 "LPFR,IPIPE I/F Interval of VD / Start line in VD Register"
|
|
endif
|
|
if ((d.w(asd:0x01c70100+0x4)&0xc)==0x0)
|
|
hgroup.word 0x10++0x1
|
|
hide.word 0x00 "HNUM,IPIPE I/F Number of valid pixels per line Register"
|
|
hgroup.word 0x14++0x1
|
|
hide.word 0x00 "VNUM,IPIPE I/F Number of Valid Lines per Frame Register"
|
|
hgroup.word 0x18++0x1
|
|
hide.word 0x00 "ADDRU,IPIPE I/F Memory Address (Upper) Register"
|
|
hgroup.word 0x1c++0x1
|
|
hide.word 0x00 "ADDRL,IPIPE I/F Memory Address (Lower) Register"
|
|
hgroup.word 0x20++0x1
|
|
hide.word 0x00 "ADOFS,IPIPE I/F Address Offset of Each Line Register"
|
|
else
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "HNUM,IPIPE I/F Number of valid pixels per line Register"
|
|
hexmask.word 0x00 0.--12. 1. " HNUM ,The Number of Valid Pixel in a Line"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "VNUM,IPIPE I/F Number of Valid Lines per Frame Register"
|
|
hexmask.word 0x00 0.--12. 1. " VNUM ,The Number of Valid Lines in a Vertical"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "ADDRU,IPIPE I/F Memory Address (Upper) Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " ADDRU ,Memory Address - Upper"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "ADDRL,IPIPE I/F Memory Address (Lower) Register"
|
|
hexmask.word 0x00 0.--15. 1. " ADDRL ,Memory Address - Lower"
|
|
group.word 0x20++0x1
|
|
line.word 0x00 "ADOFS,IPIPE I/F Address Offset of Each Line Register"
|
|
hexmask.word 0x00 0.--8. 1. " ADOFS ,The Address Offset of Each Line"
|
|
endif
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "RSZ,IPIPE I/F Horizontal Resizing Parameter Register"
|
|
hexmask.word.byte 0x00 0.--6. 1. " RSZ ,The Horizontal Resizing Parameter"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "GAIN,IPIPE I/F Gain Parameter Register"
|
|
hexmask.word 0x00 0.--9. 1. " GAIN ,Gain Parameter"
|
|
width 0xb
|
|
tree.end
|
|
tree "IPIPE (VPFE - Image Pipe)"
|
|
base asd:0x01c71000
|
|
width 14.
|
|
tree "Global Registers"
|
|
group.word 0x00++0x1
|
|
line.word 0x00 "IPIPE_EN,IPIPE Enable Register"
|
|
bitfld.word 0x00 0. " EN ,IPIPE Module Enable" "Disabled,Enabled"
|
|
group.word 0x04++0x1
|
|
line.word 0x00 "IPIPE_MODE,One Shot Mode Register"
|
|
bitfld.word 0x00 1. " WRT ,CAM_WEN mode selection" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " ONESHOT ,One shot mode" "Disabled,Enabled"
|
|
group.word 0x08++0x1
|
|
line.word 0x00 "IPIPE_DPATHS,Input/Output Data Paths Register"
|
|
bitfld.word 0x00 2. " BYPASS ,Enable RAW-Bypass mode through IPIPE" "Off,On"
|
|
bitfld.word 0x00 0.--1. " FMT ,Data Path through IPIPE" "RAW2YUV,RAW2RAW,RAW2BOX,YUV2YUV"
|
|
group.word 0x0c++0x1
|
|
line.word 0x00 "IPIPE_COLPAT,Color Pattern Register"
|
|
bitfld.word 0x00 6.--7. " OLOP ,Color of the odd line and odd pixel" "Red,Green (red line),Green (blue line),Blue"
|
|
bitfld.word 0x00 4.--5. " OLEP ,Color of the odd line and even pixel" "Red,Green (red line),Green (blue line),Blue"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " ELOP ,Color of the even line and odd pixel" "Red,Green (red line),Green (blue line),Blue"
|
|
bitfld.word 0x00 0.--1. " ELEP ,Color of the even line and even pixel" "Red,Green (red line),Green (blue line),Blue"
|
|
group.word 0x10++0x1
|
|
line.word 0x00 "IPIPE_VST,Vertical Start Position Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Vertical start position"
|
|
group.word 0x14++0x1
|
|
line.word 0x00 "IPIPE_VSZ,Vertical Processing Size Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Vertical processing size"
|
|
group.word 0x18++0x1
|
|
line.word 0x00 "IPIPE_HST,Horizontal Start Position Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Horizontal start position"
|
|
group.word 0x1c++0x1
|
|
line.word 0x00 "IPIPE_HSZ,Horizontal Processing Size Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Horizontal processing size"
|
|
tree.end
|
|
width 9.
|
|
tree "Gated Clock Enables"
|
|
group.word 0x24++0x1
|
|
line.word 0x00 "GCL_ARM,ARM Gated Clock Control Register"
|
|
bitfld.word 0x00 0. " REG ,IPIPE MMR clock enable" "Off,On"
|
|
group.word 0x28++0x1
|
|
line.word 0x00 "GCL_CCD,CCD Gated Clock Control Register"
|
|
bitfld.word 0x00 2. " G2 ,IPIPE G2 clock enable" "Off,On"
|
|
bitfld.word 0x00 1. " G1 ,IPIPE G1 clock enable" "Off,On"
|
|
bitfld.word 0x00 0. " G0 ,IPIPE G0 clock enable" "Off,On"
|
|
group.word 0x2c++0x1
|
|
line.word 0x00 "GCL_SDR,SDR Gated Clock Control Register"
|
|
bitfld.word 0x00 0. " RSZ ,IPIPE RSZ clock enable" "Off,On"
|
|
tree.end
|
|
width 10.
|
|
tree "Internal Memory Access"
|
|
group.word 0x30++0x1
|
|
line.word 0x00 "RAM_MODE,Internal Table Selection Register"
|
|
bitfld.word 0x00 15. " WIT ,Internal wait flag" "Busy,Not busy"
|
|
bitfld.word 0x00 6. " EXT ,Output selection of the IPIPE_NWAIT" "Output,No output"
|
|
bitfld.word 0x00 5. " WDT ,Write data enable" "Read only,Write"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ADR ,Auto increment mode" "Manual,Auto increment"
|
|
bitfld.word 0x00 0.--3. " SEL ,Memory selection" "Histogram 0,Histogram 1,Reserved,Reserved,Defect correction,Gamma Red,Gamma Green,Gamma Blue,Gamma RGB all,Edge enhancer,?..."
|
|
group.word 0x34++0x1
|
|
line.word 0x00 "RAM_ADR,Address Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Address of an internal memory"
|
|
group.word 0x38++0x1
|
|
line.word 0x00 "RAM_WDT,Write Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,Write data value of an internal memory"
|
|
group.word 0x3c++0x1
|
|
line.word 0x00 "RAM_RDT,Read Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,Read data value of an internal memory"
|
|
tree.end
|
|
width 9.
|
|
tree "Interrupts"
|
|
group.word 0x40++0x1
|
|
line.word 0x00 "IRQ_EN,Interrupt Enable Register"
|
|
bitfld.word 0x00 5. " INT5 ,IRQ5 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " INT4 ,IRQ4 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " INT3 ,IRQ3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " INT2 ,IRQ2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " INT1 ,IRQ1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " INT0 ,IRQ0 enable" "Disabled,Enabled"
|
|
group.word 0x44++0x1
|
|
line.word 0x00 "IRQ_RZA,Interval of IRQ-2 Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Interval of IRQ_2"
|
|
group.word 0x48++0x1
|
|
line.word 0x00 "IRQ_RZB,Interval of IRQ-3 Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Interval of IRQ_3"
|
|
tree.end
|
|
width 9.
|
|
tree "Defect Correction"
|
|
group.word 0x4c++0x1
|
|
line.word 0x00 "DFC_EN,Defect Correction Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Defect correction enable" "Disabled,Enabled"
|
|
group.word 0x50++0x1
|
|
line.word 0x00 "DFC_SEL,Copy Method Selection (from Top or from Bottom) Register"
|
|
bitfld.word 0x00 0. " SEL ,Copy method in vertical defect correction" "Top,Bottom"
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "DFC_ADR,Start Address in LUT Register"
|
|
hexmask.word 0x00 0.--9. 1. " ADR ,Start Address in LUT"
|
|
group.word 0x58++0x1
|
|
line.word 0x00 "DFC_SIZ,Number of Available Entries in LUT Register"
|
|
hexmask.word 0x00 0.--9. 1. " SIZ ,Number of valid data in LUT"
|
|
tree.end
|
|
width 13.
|
|
tree "Programmable Noise Filter"
|
|
group.word 0x5c++0x1
|
|
line.word 0x00 "D2F_EN,2D Noise Filter Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Noise filter enable" "Disabled,Enabled"
|
|
group.word 0x60++0x1
|
|
line.word 0x00 "D2F_CFG,Noise Filter Configuration Register"
|
|
bitfld.word 0x00 4. " TYP ,Sampling method of green pixels" "Box,Diamond"
|
|
bitfld.word 0x00 2.--3. " SHF ,Down shift value in LUT reference address" "0,1,2,3"
|
|
bitfld.word 0x00 0.--1. " SPR ,Spread value in noise filter algorithm" "0,1,2,3"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "D2F_THR[32],Noise Filter LUT Values (Threshold) Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " VAL ,Threshold value in noise filter algorithm"
|
|
group.long 0xe4++0x3
|
|
line.long 0x00 "D2F_STR[32],Noise Filter LUT Values (Intensity) Register"
|
|
hexmask.long.byte 0x00 0.--4. 1. " VAL ,Intensity value in noise filter algorithm"
|
|
tree.end
|
|
width 11.
|
|
tree "Pre-filter"
|
|
group.word 0x164++0x1
|
|
line.word 0x00 "PRE_EN,PreFilter Enable Register"
|
|
bitfld.word 0x00 0. " EN ,PreFilter enable" "Disabled,Enabled"
|
|
group.word 0x168++0x1
|
|
line.word 0x00 "PRE_TYP,PreFilter Type Register"
|
|
bitfld.word 0x00 3. " EN1 ,Enable of Adaptive DotReduction" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " EN0 ,Enable of Adaptive PreFilter" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " SEL1 ,Averaging Method GS1 in PreFilter" "AVG4PIX,AVG2MEDPIX"
|
|
bitfld.word 0x00 0. " SEL0 ,Averaging Method GS2 in PreFilter" "AVG4PIX,AVG2MEDPIX"
|
|
group.word 0x16c++0x1
|
|
line.word 0x00 "PRE_SHF,Shift Value of Adaptive Gain Register"
|
|
hexmask.word.byte 0x00 0.--3. 1. " VAL ,Downshift value in adaptive PreFilter algorithm"
|
|
group.word 0x170++0x1
|
|
line.word 0x00 "PRE_GAIN,Constant Gain or Adaptive Gain Slope Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Constant gain or adaptive gain slope"
|
|
group.word 0x174++0x1
|
|
line.word 0x00 "PRE_THR_G,Threshold G Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Threshold (ThrG) in the adaptive PreFilter algorithm"
|
|
group.word 0x178++0x1
|
|
line.word 0x00 "PRE_THR_B,Threshold B Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Threshold (ThrB) in the DotReduction"
|
|
group.word 0x17c++0x1
|
|
line.word 0x00 "PRE_THR_1,Threshold 1 Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Threshold (Thr1) in the adaptive PreFilter algorithm"
|
|
tree.end
|
|
width 11.
|
|
tree "White Balance"
|
|
group.word 0x180++0x1
|
|
line.word 0x00 "WB2_DGN,Digital Gain Register"
|
|
hexmask.word 0x00 0.--9. 1. " DGAIN ,Digital Gain. Value is in U10Q8"
|
|
group.word 0x184++0x1
|
|
line.word 0x00 "WB2_WG_R,White Balance Gain (Red) Register"
|
|
hexmask.word 0x00 0.--9. 1. " WG ,Red gain"
|
|
group.word 0x188++0x1
|
|
line.word 0x00 "WB2_WG_GR,White Balance Gain (Gr) Register"
|
|
hexmask.word 0x00 0.--9. 1. " WG ,Gr gain"
|
|
group.word 0x18c++0x1
|
|
line.word 0x00 "WB2_WG_GB,White Balance Gain (Gb) Register"
|
|
hexmask.word 0x00 0.--9. 1. " WG ,Gb gain"
|
|
group.word 0x190++0x1
|
|
line.word 0x00 "WB2_WG_B,White Balance Gain (Blue) Register"
|
|
hexmask.word 0x00 0.--9. 1. " WG ,Blue gain"
|
|
tree.end
|
|
width 12.
|
|
tree "RGB to RGB Conversion (Include GAMMA Correction)"
|
|
group.word 0x1f4++0x1
|
|
line.word 0x00 "RGB_MUL_RR,Matrix Coefficient RR Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient RR"
|
|
group.word 0x1f8++0x1
|
|
line.word 0x00 "RGB_MUL_GR,Matrix Coefficient GR Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient GR"
|
|
group.word 0x1fc++0x1
|
|
line.word 0x00 "RGB_MUL_BR,Matrix Coefficient BR Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient BR"
|
|
group.word 0x200++0x1
|
|
line.word 0x00 "RGB_MUL_RG,Matrix Coefficient RG Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient RG"
|
|
group.word 0x204++0x1
|
|
line.word 0x00 "RGB_MUL_GG,Matrix Coefficient GG Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient GG"
|
|
group.word 0x208++0x1
|
|
line.word 0x00 "RGB_MUL_BG,Matrix Coefficient BG Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient BG"
|
|
group.word 0x20c++0x1
|
|
line.word 0x00 "RGB_MUL_RB,Matrix Coefficient RB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient RB"
|
|
group.word 0x210++0x1
|
|
line.word 0x00 "RGB_MUL_GB,Matrix Coefficient GB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient GB"
|
|
group.word 0x214++0x1
|
|
line.word 0x00 "RGB_MUL_BB,Matrix Coefficient BB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Matrix coefficient BB"
|
|
group.word 0x218++0x1
|
|
line.word 0x00 "RGB_OFT_OR,R Output Offset Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Output offset value for R"
|
|
group.word 0x21c++0x1
|
|
line.word 0x00 "RGB_OFT_OG,G Output Offset Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Output offset value for G"
|
|
group.word 0x220++0x1
|
|
line.word 0x00 "RGB_OFT_OB,B Output Offset Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Output offset value for B"
|
|
group.word 0x224++0x1
|
|
line.word 0x00 "GMM_CFG,Gamma Correction Configuration Register"
|
|
bitfld.word 0x00 5.--6. " SIZ ,Size of gamma table" "128 words,256 words,Reserved,512 words"
|
|
bitfld.word 0x00 4. " TBL ,Selection of gamma table" "RAM,ROM"
|
|
bitfld.word 0x00 2. " BYPB ,Gamma correction mode for B" "Not bypass,Bypass"
|
|
bitfld.word 0x00 1. " BYPG ,Gamma correction mode for G" "Not bypass,Bypass"
|
|
textline " "
|
|
bitfld.word 0x00 0. " BYPR ,Gamma correction mode for R" "Not bypass,Bypass"
|
|
tree.end
|
|
width 13.
|
|
tree "RGB to YCbCr Conversion"
|
|
group.word 0x228++0x1
|
|
line.word 0x00 "YCC_ADJ,Luminance Adjustment (Contrast and Brightness) Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " BRT ,Brightness"
|
|
hexmask.word.byte 0x00 0.--7. 1. " CTR ,Contrast"
|
|
group.word 0x22c++0x1
|
|
line.word 0x00 "YCC_MUL_RY,Matrix Coefficient RY Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for RY"
|
|
group.word 0x230++0x1
|
|
line.word 0x00 "YCC_MUL_GY,Matrix Coefficient GY Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for GY"
|
|
group.word 0x234++0x1
|
|
line.word 0x00 "YCC_MUL_BY,Matrix Coefficient BY Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for BY"
|
|
group.word 0x238++0x1
|
|
line.word 0x00 "YCC_MUL_RCB,Matrix Coefficient RCb Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for RCb"
|
|
group.word 0x23c++0x1
|
|
line.word 0x00 "YCC_MUL_GCB,Matrix Coefficient GCb Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for GCb"
|
|
group.word 0x240++0x1
|
|
line.word 0x00 "YCC_MUL_BCB,Matrix Coefficient BCb Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for BCb"
|
|
group.word 0x244++0x1
|
|
line.word 0x00 "YCC_MUL_RCR,Matrix Coefficient RCr Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for RCr"
|
|
group.word 0x248++0x1
|
|
line.word 0x00 "YCC_MUL_GCR,Matrix Coefficient GCr Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for GCr"
|
|
group.word 0x24c++0x1
|
|
line.word 0x00 "YCC_MUL_BCR,Matrix Coefficient BCr Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,Matrix coefficient for BCr"
|
|
group.word 0x250++0x1
|
|
line.word 0x00 "YCC_OFT_Y,Y Output Offset Register"
|
|
hexmask.word 0x00 0.--8. 1. " VAL ,Y output offset"
|
|
group.word 0x254++0x1
|
|
line.word 0x00 "YCC_OFT_CB,Cb Output Offset Register"
|
|
hexmask.word 0x00 0.--8. 1. " VAL ,Cb output offset"
|
|
group.word 0x258++0x1
|
|
line.word 0x00 "YCC_OFT_CR,Cr Output Offset Register"
|
|
hexmask.word 0x00 0.--8. 1. " VAL ,Cr output offset"
|
|
group.word 0x25c++0x1
|
|
line.word 0x00 "YCC_Y_MIN,Saturation (Luminance Minimum) Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Minimum luminance value"
|
|
group.word 0x260++0x1
|
|
line.word 0x00 "YCC_Y_MAX,Saturation (Luminance Maximum) Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Maximum luminance value"
|
|
group.word 0x264++0x1
|
|
line.word 0x00 "YCC_C_MIN,Saturation (Chrominance Minimum) Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Minimum chrominance value"
|
|
group.word 0x268++0x1
|
|
line.word 0x00 "YCC_C_MAX,Saturation (Chrominance Maximum) Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Minimum chrominance value"
|
|
group.word 0x26c++0x1
|
|
line.word 0x00 "YCC_PHS,Chrominance Position (for 422 Down Sampler) Register"
|
|
bitfld.word 0x00 1. " LPF ,121_LPF enable for chrominance" "Off,On"
|
|
bitfld.word 0x00 0. " POS ,Phase position of the output of the chrominance" "COSITING,CENTERING"
|
|
tree.end
|
|
width 12.
|
|
tree "Edge Enhancer"
|
|
group.word 0x270++0x1
|
|
line.word 0x00 "YEE_EN,Edge Enhancer Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Edge enhancer enable" "Disabled,Enabled"
|
|
group.word 0x274++0x1
|
|
line.word 0x00 "YEE_EMF,MedianNR Enable Register"
|
|
bitfld.word 0x00 0. " EN ,MedianNR enable" "Disabled,Enabled"
|
|
group.word 0x278++0x1
|
|
line.word 0x00 "YEE_SHF,HPF Shift Length Register"
|
|
hexmask.word.byte 0x00 0.--3. 1. " SHF ,HPF shift length"
|
|
group.word 0x27c++0x1
|
|
line.word 0x00 "YEE_MUL_00,HPF Coefficient 00 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 00"
|
|
group.word 0x280++0x1
|
|
line.word 0x00 "YEE_MUL_01,HPF Coefficient 01 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 01"
|
|
group.word 0x284++0x1
|
|
line.word 0x00 "YEE_MUL_02,HPF Coefficient 02 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 02"
|
|
group.word 0x288++0x1
|
|
line.word 0x00 "YEE_MUL_10,HPF Coefficient 10 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 10"
|
|
group.word 0x28c++0x1
|
|
line.word 0x00 "YEE_MUL_11,HPF Coefficient 11 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 11"
|
|
group.word 0x290++0x1
|
|
line.word 0x00 "YEE_MUL_12,HPF Coefficient 12 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 12"
|
|
group.word 0x294++0x1
|
|
line.word 0x00 "YEE_MUL_20,HPF Coefficient 20 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 20"
|
|
group.word 0x298++0x1
|
|
line.word 0x00 "YEE_MUL_21,HPF Coefficient 21 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 21"
|
|
group.word 0x29c++0x1
|
|
line.word 0x00 "YEE_MUL_22,HPF Coefficient 22 Register"
|
|
hexmask.word 0x00 0.--9. 1. " VAL ,HPF coefficient 22"
|
|
tree.end
|
|
width 11.
|
|
tree "False Color Suppression"
|
|
group.word 0x2a0++0x1
|
|
line.word 0x00 "FCS_EN,Fault Color Suppression Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Fault color suppression enable" "Disabled,Enabled"
|
|
group.word 0x2a4++0x1
|
|
line.word 0x00 "FCS_TYP,Type selection of HPF Register"
|
|
bitfld.word 0x00 0.--2. " TYP ,Type of HPF" "Y,Horizontal HPF,Vertical HPF,2D HPF,2D HPF(edge enhancement),?..."
|
|
group.word 0x2a8++0x1
|
|
line.word 0x00 "FCS_SHF_Y,Down Shift Size (HPF) Register"
|
|
bitfld.word 0x00 0.--1. " SHF ,Down shift value for HPF" "0,1,2,3"
|
|
group.word 0x2ac++0x1
|
|
line.word 0x00 "FCS_SHF_C,Down Shift Size (GAIN) Register"
|
|
bitfld.word 0x00 0.--2. " SHF ,Down shift value for GAIN function" "0,1,2,3,4,5,6,7"
|
|
group.word 0x2b0++0x1
|
|
line.word 0x00 "FCS_THR,Threshold Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " THR ,Threshold of the suppression gain"
|
|
group.word 0x2b4++0x1
|
|
line.word 0x00 "FCS_SGN,Intensity Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " SGN ,Intensity of the color suppression"
|
|
group.word 0x2b8++0x1
|
|
line.word 0x00 "FCS_LTH,Lower Limit of Chroma Gain Register"
|
|
hexmask.word 0x00 0.--8. 1. " LIM ,Lower limit of chroma gain"
|
|
tree.end
|
|
width 9.
|
|
tree.open "Resizer"
|
|
group.word 0x2bc++0x1
|
|
line.word 0x00 "RSZ_SEQ,Processing Mode Register"
|
|
bitfld.word 0x00 4. " CRV ,Chroma sampling point change" "Not changed,Changed"
|
|
bitfld.word 0x00 3. " VRV ,Vertical reversal of output image" "Normal,Flipped top to bottom"
|
|
bitfld.word 0x00 2. " HRV ,Horizontal reversal of output image" "Normal,Flipped left to right"
|
|
textline " "
|
|
bitfld.word 0x00 1. " TMM ,Terminal condition of vertical processing" "Output,Input"
|
|
bitfld.word 0x00 0. " SEQ ,Operation mode of vertical processing" "Normal,Continuous"
|
|
group.word 0x2c0++0x1
|
|
line.word 0x00 "RSZ_AAL,Vertical Anti aliasing Filter Register"
|
|
bitfld.word 0x00 0. " AAL ,Vertical anti aliasing filter enable" "Disabled,Enabled"
|
|
width 13.
|
|
tree "RSZ 0"
|
|
tree "Resizer Rescale Parameters"
|
|
group.word 0x2c4++0x1
|
|
line.word 0x00 "RSZ_EN,Resizer Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Resizer enable" "Disabled,Enabled"
|
|
group.word 0x2c8++0x1
|
|
line.word 0x00 "RSZ_MODE,One Shot Mode Register"
|
|
bitfld.word 0x00 0. " OST ,One shot mode enable" "Continuous,One shot"
|
|
group.word 0x2cc++0x1
|
|
line.word 0x00 "RSZ_I_VST,Vertical Start Position of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of image processing"
|
|
group.word 0x2d0++0x1
|
|
line.word 0x00 "RSZ_I_VSZ,Vertical Size of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Number of input lines"
|
|
group.word 0x2d4++0x1
|
|
line.word 0x00 "RSZ_I_HST,Horizontal Start Position of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of image processing"
|
|
group.word 0x2d8++0x1
|
|
line.word 0x00 "RSZ_O_VSZ,Vertical Size of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the output image"
|
|
group.word 0x2dc++0x1
|
|
line.word 0x00 "RSZ_O_HST,Horizontal Start Position of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal position of the first pixel to be output in processed image"
|
|
group.word 0x2e0++0x1
|
|
line.word 0x00 "RSZ_O_HSZ,Horizontal Size of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of output image"
|
|
group.word 0x2e4++0x1
|
|
line.word 0x00 "RSZ_V_PHS,Initial Phase of Vertical Resizing Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process"
|
|
rgroup.word 0x2e8++0x1
|
|
line.word 0x00 "RSZ_V_PHS_O,Phase of Last Value in Previous Resize Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Phase value of the last line in the previous resizing process"
|
|
group.word 0x2ec++0x1
|
|
line.word 0x00 "RSZ_V_DIF,Vertical Resize Parameter Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Vertical resize parameter"
|
|
rgroup.word 0x2f0++0x1
|
|
line.word 0x00 "RSZ_V_SIZ_O,Actual Number of Output Lines Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Number of actually produced lines in the previous resizing process"
|
|
group.word 0x2f4++0x1
|
|
line.word 0x00 "RSZ_H_PHS,Initial Phase of Horizontal Resizing Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Initial value for the phase value in horizontal resizing process"
|
|
group.word 0x2f8++0x1
|
|
line.word 0x00 "RSZ_H_DIF,Horizontal Resize Parameter Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Horizontal resize parameter"
|
|
group.word 0x2fc++0x1
|
|
line.word 0x00 "RSZ_H_TYP,Interpolation Method for Horizontal Rescaling Register"
|
|
bitfld.word 0x00 0. " TYP ,Selection of resizing method in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation"
|
|
group.word 0x300++0x1
|
|
line.word 0x00 "RSZ_H_LSE,Selection of Horizontal LPF Intensity Register"
|
|
bitfld.word 0x00 0. " SEL ,Selection of the intensity value for horizontal low pass filtering" "Calculated,RSZ_H_LPF"
|
|
group.word 0x304++0x1
|
|
line.word 0x00 "RSZ_H_LPF,Horizontal LPF Intensity Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Intensity parameter for horizontal low pass filtering"
|
|
tree.end
|
|
width 13.
|
|
tree "Resizer RGB Conversion Parameters"
|
|
group.word 0x308++0x1
|
|
line.word 0x00 "RSZ_RGB_EN,RGB Output Enable Register"
|
|
bitfld.word 0x00 0. " EN ,RGB output enable" "Disabled,Enabled"
|
|
group.word 0x30c++0x1
|
|
line.word 0x00 "RSZ_RGB_TYP,RGB Output Bit Mode (32 or 16 bit) Register"
|
|
bitfld.word 0x00 2. " MSK1 ,Enable masking of the last 2 pixels" "Not masked,Masked"
|
|
bitfld.word 0x00 1. " MSK0 ,Enable masking of the first 2 pixels" "Not masked,Masked"
|
|
bitfld.word 0x00 0. " TYP ,16bit/32bit output selection" "32 bits,16 bits"
|
|
group.word 0x310++0x1
|
|
line.word 0x00 "RSZ_RGB_BLD,YC422 to YC444 Conversion Method Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,The alpha value used in 32_bit output mode"
|
|
tree.end
|
|
width 15.
|
|
tree "Resizer External Memory Parameters"
|
|
group.word 0x314++0x1
|
|
line.word 0x00 "RSZ_SDR_BAD_H,SDRAM Base Address MSB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,The upper 11 bits of the first address in the allowed memory space in buffer memory or SDRAM"
|
|
group.word 0x318++0x1
|
|
line.word 0x00 "RSZ_SDR_BAD_L,SDRAM Base Address LSB Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,The lower 16 bits of the first address in the allowed memory space in buffer memory or SDRAM"
|
|
group.word 0x31c++0x1
|
|
line.word 0x00 "RSZ_SDR_SAD_H,SDRAM Start Address MSB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,The higher 11 bits of the first address of output in buffer memory or SDRAM"
|
|
group.word 0x320++0x1
|
|
line.word 0x00 "RSZ_SDR_SAD_L,SDRAM Start Address LSB Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,The lower 16 bits of the first address of output in buffer memory or SDRAM"
|
|
group.word 0x324++0x1
|
|
line.word 0x00 "RSZ_SDR_OFT,SDRAM Line Offset Register"
|
|
hexmask.word 0x00 0.--15. 1. " OFT ,The size of the memory space for each line"
|
|
group.word 0x328++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_S,Start Line of SDRAM Pointer Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,The vertical position of the first output line in the output memory space"
|
|
group.word 0x32c++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_E,End Line of SDRAM Pointer Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,SDRAM Available Capacity"
|
|
rgroup.word 0x330++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_O,Output of Current Pointer Value (Read Only) Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Vertical position of the last line of the previous resizing process in the memory space"
|
|
tree.end
|
|
tree.end
|
|
width 13.
|
|
tree "RSZ 1"
|
|
tree "Resizer Rescale Parameters"
|
|
group.word 0x334++0x1
|
|
line.word 0x00 "RSZ_EN,Resizer Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Resizer enable" "Disabled,Enabled"
|
|
group.word 0x338++0x1
|
|
line.word 0x00 "RSZ_MODE,One Shot Mode Register"
|
|
bitfld.word 0x00 0. " OST ,One shot mode enable" "Continuous,One shot"
|
|
group.word 0x33c++0x1
|
|
line.word 0x00 "RSZ_I_VST,Vertical Start Position of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of image processing"
|
|
group.word 0x340++0x1
|
|
line.word 0x00 "RSZ_I_VSZ,Vertical Size of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Number of input lines"
|
|
group.word 0x344++0x1
|
|
line.word 0x00 "RSZ_I_HST,Horizontal Start Position of the Input Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of image processing"
|
|
group.word 0x348++0x1
|
|
line.word 0x00 "RSZ_O_VSZ,Vertical Size of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the output image"
|
|
group.word 0x34c++0x1
|
|
line.word 0x00 "RSZ_O_HST,Horizontal Start Position of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal position of the first pixel to be output in processed image"
|
|
group.word 0x350++0x1
|
|
line.word 0x00 "RSZ_O_HSZ,Horizontal Size of the Output Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of output image"
|
|
group.word 0x354++0x1
|
|
line.word 0x00 "RSZ_V_PHS,Initial Phase of Vertical Resizing Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Initial value for the phase value in vertical resizing process"
|
|
rgroup.word 0x358++0x1
|
|
line.word 0x00 "RSZ_V_PHS_O,Phase of Last Value in Previous Resize Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Phase value of the last line in the previous resizing process"
|
|
group.word 0x35c++0x1
|
|
line.word 0x00 "RSZ_V_DIF,Vertical Resize Parameter Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Vertical resize parameter"
|
|
rgroup.word 0x360++0x1
|
|
line.word 0x00 "RSZ_V_SIZ_O,Actual Number of Output Lines Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Number of actually produced lines in the previous resizing process"
|
|
group.word 0x364++0x1
|
|
line.word 0x00 "RSZ_H_PHS,Initial Phase of Horizontal Resizing Process Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Initial value for the phase value in horizontal resizing process"
|
|
group.word 0x368++0x1
|
|
line.word 0x00 "RSZ_H_DIF,Horizontal Resize Parameter Register"
|
|
hexmask.word 0x00 0.--13. 1. " VAL ,Horizontal resize parameter"
|
|
group.word 0x36c++0x1
|
|
line.word 0x00 "RSZ_H_TYP,Interpolation Method for Horizontal Rescaling Register"
|
|
bitfld.word 0x00 0. " TYP ,Selection of resizing method in horizontal direction" "4-tap cubic convolution,2-tap linear interpolation"
|
|
group.word 0x370++0x1
|
|
line.word 0x00 "RSZ_H_LSE,Selection of Horizontal LPF Intensity Register"
|
|
bitfld.word 0x00 0. " SEL ,Selection of the intensity value for horizontal low pass filtering" "Calculated,RSZ_H_LPF"
|
|
group.word 0x374++0x1
|
|
line.word 0x00 "RSZ_H_LPF,Horizontal LPF Intensity Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,Intensity parameter for horizontal low pass filtering"
|
|
tree.end
|
|
width 13.
|
|
tree "Resizer RGB Conversion Parameters"
|
|
group.word 0x378++0x1
|
|
line.word 0x00 "RSZ_RGB_EN,RGB Output Enable Register"
|
|
bitfld.word 0x00 0. " EN ,RGB output enable" "Disabled,Enabled"
|
|
group.word 0x37c++0x1
|
|
line.word 0x00 "RSZ_RGB_TYP,RGB Output Bit Mode (32 or 16 bit) Register"
|
|
bitfld.word 0x00 2. " MSK1 ,Enable masking of the last 2 pixels" "Not masked,Masked"
|
|
bitfld.word 0x00 1. " MSK0 ,Enable masking of the first 2 pixels" "Not masked,Masked"
|
|
bitfld.word 0x00 0. " TYP ,16bit/32bit output selection" "32 bits,16 bits"
|
|
group.word 0x380++0x1
|
|
line.word 0x00 "RSZ_RGB_BLD,YC422 to YC444 Conversion Method Register"
|
|
hexmask.word.byte 0x00 0.--7. 1. " VAL ,The alpha value used in 32_bit output mode"
|
|
tree.end
|
|
width 15.
|
|
tree "Resizer External Memory Parameters"
|
|
group.word 0x384++0x1
|
|
line.word 0x00 "RSZ_SDR_BAD_H,SDRAM Base Address MSB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,The upper 11 bits of the first address in the allowed memory space in buffer memory or SDRAM"
|
|
group.word 0x388++0x1
|
|
line.word 0x00 "RSZ_SDR_BAD_L,SDRAM Base Address LSB Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,The lower 16 bits of the first address in the allowed memory space in buffer memory or SDRAM"
|
|
group.word 0x38c++0x1
|
|
line.word 0x00 "RSZ_SDR_SAD_H,SDRAM Start Address MSB Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,The higher 11 bits of the first address of output in buffer memory or SDRAM"
|
|
group.word 0x390++0x1
|
|
line.word 0x00 "RSZ_SDR_SAD_L,SDRAM Start Address LSB Register"
|
|
hexmask.word 0x00 0.--15. 1. " VAL ,The lower 16 bits of the first address of output in buffer memory or SDRAM"
|
|
group.word 0x394++0x1
|
|
line.word 0x00 "RSZ_SDR_OFT,SDRAM Line Offset Register"
|
|
hexmask.word 0x00 0.--15. 1. " OFT ,The size of the memory space for each line"
|
|
group.word 0x398++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_S,Start Line of SDRAM Pointer Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,The vertical position of the first output line in the output memory space"
|
|
group.word 0x39c++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_E,End Line of SDRAM Pointer Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,SDRAM Available Capacity"
|
|
rgroup.word 0x3a0++0x1
|
|
line.word 0x00 "RSZ_SDR_PTR_O,Output of Current Pointer Value (Read Only) Register"
|
|
hexmask.word 0x00 0.--12. 1. " VAL ,Vertical position of the last line of the previous resizing process in the memory space"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
width 10.
|
|
tree "Boxcar (2d)"
|
|
group.word 0x3a4++0x1
|
|
line.word 0x00 "BOX_EN,Boxcar Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Boxcar enable" "Disabled,Enabled"
|
|
group.word 0x3a8++0x1
|
|
line.word 0x00 "BOX_MODE,One Shot Mode Register"
|
|
bitfld.word 0x00 0. " OST ,One shot mode enable" "Continuous,One shot"
|
|
group.word 0x3ac++0x1
|
|
line.word 0x00 "BOX_TYP,Block Size (16 x 16 or 8 x 8) Register"
|
|
bitfld.word 0x00 0. " SEL ,Block size in boxcar sampling" "8 x 8,16 x 16"
|
|
group.word 0x3b0++0x1
|
|
line.word 0x00 "BOX_SHF,Down Shift Value of Input Register"
|
|
bitfld.word 0x00 0.--2. " VAL ,Down shift value of input data" "0,1,2,3,4,?..."
|
|
group.word 0x3b4++0x1
|
|
line.word 0x00 "HST_EN,Histogram Enable Register"
|
|
bitfld.word 0x00 0. " EN ,Histogram enable" "Disabled,Enabled"
|
|
group.word 0x3b8++0x1
|
|
line.word 0x00 "HST_MODE,One Shot Mode Register"
|
|
bitfld.word 0x00 0. " OST ,One shot mode enable" "Continuous,One shot"
|
|
group.word 0x3bc++0x1
|
|
line.word 0x00 "HST_SEL,Histogram Source Select Register"
|
|
bitfld.word 0x00 1. " GREENSEL ,Green sampling selection" "Gr,Gb"
|
|
bitfld.word 0x00 0. " SOURCE ,Input selection" "R/Gr/Gb/B,RGB input + Y output"
|
|
width 10.
|
|
group.word 0x3c0++0x1
|
|
line.word 0x00 "HST_PARA,Histogram Parameters Select Register"
|
|
bitfld.word 0x00 12.--13. " BIN ,Number of bins" "32 bins,64 bins,128 bins,256 bins"
|
|
bitfld.word 0x00 8.--11. " SHF ,Shift length of input data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.word 0x00 7. " COL3 ,Color 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " COL2 ,Color 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " COL1 ,Color 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " COL0 ,Color 0 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " RGN3 ,Region 3 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " RGN2 ,Region 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RGN1 ,Region 1 enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RGN0 ,Region 0 enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 9.
|
|
tree.open "Histogram Region Definitions"
|
|
tree "Histogram Region 0"
|
|
group.word 0x3C4++0x1
|
|
line.word 0x00 "HST_VST,Vertical Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of the region from the IPIPE_VST"
|
|
group.word (0x3C4+0x4)++0x1
|
|
line.word 0x00 "HST_VSZ,Vertical Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the region"
|
|
group.word (0x3C4+0x8)++0x1
|
|
line.word 0x00 "HST_HST,Horizontal Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of the region from the IPIPE_HST"
|
|
group.word (0x3C4+0xc)++0x1
|
|
line.word 0x00 "HST_HSZ,Horizontal Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of the region"
|
|
tree.end
|
|
tree "Histogram Region 1"
|
|
group.word 0x3D4++0x1
|
|
line.word 0x00 "HST_VST,Vertical Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of the region from the IPIPE_VST"
|
|
group.word (0x3D4+0x4)++0x1
|
|
line.word 0x00 "HST_VSZ,Vertical Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the region"
|
|
group.word (0x3D4+0x8)++0x1
|
|
line.word 0x00 "HST_HST,Horizontal Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of the region from the IPIPE_HST"
|
|
group.word (0x3D4+0xc)++0x1
|
|
line.word 0x00 "HST_HSZ,Horizontal Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of the region"
|
|
tree.end
|
|
tree "Histogram Region 2"
|
|
group.word 0x3E4++0x1
|
|
line.word 0x00 "HST_VST,Vertical Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of the region from the IPIPE_VST"
|
|
group.word (0x3E4+0x4)++0x1
|
|
line.word 0x00 "HST_VSZ,Vertical Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the region"
|
|
group.word (0x3E4+0x8)++0x1
|
|
line.word 0x00 "HST_HST,Horizontal Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of the region from the IPIPE_HST"
|
|
group.word (0x3E4+0xc)++0x1
|
|
line.word 0x00 "HST_HSZ,Horizontal Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of the region"
|
|
tree.end
|
|
tree "Histogram Region 3"
|
|
group.word 0x3F4++0x1
|
|
line.word 0x00 "HST_VST,Vertical Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical start position of the region from the IPIPE_VST"
|
|
group.word (0x3F4+0x4)++0x1
|
|
line.word 0x00 "HST_VSZ,Vertical Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Vertical size of the region"
|
|
group.word (0x3F4+0x8)++0x1
|
|
line.word 0x00 "HST_HST,Horizontal Start Position Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal start position of the region from the IPIPE_HST"
|
|
group.word (0x3F4+0xc)++0x1
|
|
line.word 0x00 "HST_HSZ,Horizontal Size Register"
|
|
hexmask.word 0x00 0.--11. 1. " VAL ,Horizontal size of the region"
|
|
tree.end
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
tree "H3A (VPFE - Hardware 3A)"
|
|
base asd:0x01c70080
|
|
width 13.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,Peripheral Revision and Class Information"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification VPFE module"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PCR,Peripheral Control Register"
|
|
hexmask.long.word 0x00 22.--31. 1. " AVE2LMT ,AE/AWB Stauration Limit"
|
|
bitfld.long 0x00 21. " SDR_FETCH_EN ,SDRAM Fetch Enable" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 20. " INP_WIDTH ,Input Width" "4 pix/32 bits,2 pix/32 bits"
|
|
bitfld.long 0x00 19. " INP_SRC ,Input Source" "CCDC,SDRAM"
|
|
textline " "
|
|
bitfld.long 0x00 18. " BUSYAEAWB ,Busy bit for AE/AWB" "Not busy,Busy"
|
|
bitfld.long 0x00 17. " AEW_ALAW_EN ,AE/AWB A-law Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " AEW_EN ,AE/AWB Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " BUSYAF ,Busy bit for AF" "Not busy,Busy"
|
|
textline " "
|
|
bitfld.long 0x00 14. " FVMODE ,Focus Value Accumulation Mode" "Sum,Peak"
|
|
bitfld.long 0x00 11.--13. " RGBPOS ,Red, Green, and blue pixel location in the AF windows" "GR/GB - Bayer,RG/GB - Bayer,GR/BG - Bayer,RG/BG - Bayer,GG/RB - custom,RB/GG - custom,?..."
|
|
textline " "
|
|
hexmask.long.byte 0x00 3.--10. 1. " MED_TH ,Median filter threshold"
|
|
bitfld.long 0x00 2. " AF_MED_EN ,Auto Focus Median filter Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AF_ALAW_EN ,Auto Focus A-law table Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " AF_EN ,Auto Focus Enalbe" "Disabled,Enabled"
|
|
width 13.
|
|
group.long 0x08++0x7
|
|
line.long 0x00 "AFPAX1,Setup for the AF Engine Paxel Configuration Register"
|
|
hexmask.long.byte 0x00 16.--22. 1. " PAXW ,AF Engine Paxel Width"
|
|
hexmask.long.byte 0x00 0.--6. 1. " PAXH ,AF Engine Paxel Height"
|
|
line.long 0x04 "AFPAX2,Setup for the AF Engine Paxel Configuration Register"
|
|
bitfld.long 0x04 13.--16. " AFINCV ,AF Engine Line Increments" "2 lines,4 lines,6 lines,8 lines,10 lines,12 lines,14 lines,16 lines,18 lines,20 lines,22 lines,24 lines,26 lines,28 lines,30 lines,32 lines"
|
|
hexmask.long.byte 0x04 6.--12. 1. " PAXVC ,AF Engine Vertical Paxel Count"
|
|
textline " "
|
|
hexmask.long.byte 0x04 0.--5. 1. " PAXHC ,AF Engine Horizontal Paxel Count"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "AFPAXSTART,Start Position for AF Engine Paxels Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " PAXSH ,AF Engine Paxel Horizontal start position"
|
|
hexmask.long.word 0x00 0.--11. 1. " PAXSV ,AF Engine Paxel Vertical start position"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "AFIIRSH,Start Position for IIRSH Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " IIRSH ,AF Engine IIR Horizontal Start Position"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "AFBUFST,SDRAM/DDRAM Start address for AF Engine Register"
|
|
hexmask.long 0x00 0.--31. 1. " AFBUFST ,AF Engine SDRAM/DDRAM Start Address"
|
|
group.long 0x1c++0x17
|
|
line.long 0x00 "AFCOEF010,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x00 16.--27. 1. " COEFF1 ,AF Engine IIR filter Coefficient 1"
|
|
hexmask.long.word 0x00 0.--11. 1. " COEFF0 ,AF Engine IIR filter Coefficient 0"
|
|
line.long 0x04 "AFCOEF032,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x04 16.--27. 1. " COEFF3 ,AF Engine IIR filter Coefficient 3"
|
|
hexmask.long.word 0x04 0.--11. 1. " COEFF2 ,AF Engine IIR filter Coefficient 2"
|
|
line.long 0x08 "AFCOEF054,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x08 16.--27. 1. " COEFF5 ,AF Engine IIR filter Coefficient 5"
|
|
hexmask.long.word 0x08 0.--11. 1. " COEFF4 ,AF Engine IIR filter Coefficient 4"
|
|
line.long 0x0c "AFCOEF076,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x0c 16.--27. 1. " COEFF7 ,AF Engine IIR filter Coefficient 7"
|
|
hexmask.long.word 0x0c 0.--11. 1. " COEFF6 ,AF Engine IIR filter Coefficient 6"
|
|
line.long 0x10 "AFCOEF098,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x10 16.--27. 1. " COEFF9 ,AF Engine IIR filter Coefficient 9"
|
|
hexmask.long.word 0x10 0.--11. 1. " COEFF8 ,AF Engine IIR filter Coefficient 8"
|
|
line.long 0x14 "AFCOEF0010,IIR filter coefficient data for SET 0"
|
|
hexmask.long.word 0x14 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10"
|
|
group.long 0x34++0x17
|
|
line.long 0x00 "AFCOEF110,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x00 16.--27. 1. " COEFF1 ,AF Engine IIR filter Coefficient 1"
|
|
hexmask.long.word 0x00 0.--11. 1. " COEFF0 ,AF Engine IIR filter Coefficient 0"
|
|
line.long 0x04 "AFCOEF132,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x04 16.--27. 1. " COEFF3 ,AF Engine IIR filter Coefficient 3"
|
|
hexmask.long.word 0x04 0.--11. 1. " COEFF2 ,AF Engine IIR filter Coefficient 2"
|
|
line.long 0x08 "AFCOEF154,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x08 16.--27. 1. " COEFF5 ,AF Engine IIR filter Coefficient 5"
|
|
hexmask.long.word 0x08 0.--11. 1. " COEFF4 ,AF Engine IIR filter Coefficient 4"
|
|
line.long 0x0c "AFCOEF176,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x0c 16.--27. 1. " COEFF7 ,AF Engine IIR filter Coefficient 7"
|
|
hexmask.long.word 0x0c 0.--11. 1. " COEFF6 ,AF Engine IIR filter Coefficient 6"
|
|
line.long 0x10 "AFCOEF198,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x10 16.--27. 1. " COEFF9 ,AF Engine IIR filter Coefficient 9"
|
|
hexmask.long.word 0x10 0.--11. 1. " COEFF8 ,AF Engine IIR filter Coefficient 8"
|
|
line.long 0x14 "AFCOEF1010,IIR filter coefficient data for SET 1"
|
|
hexmask.long.word 0x14 0.--11. 1. " COEFF10 ,AF Engine IIR filter Coefficient 10"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "AEWWIN1,Configuration for AE/AWB Windows"
|
|
hexmask.long.byte 0x00 24.--30. 1. " WINH ,AE/AWB Engine Window Height"
|
|
hexmask.long.byte 0x00 13.--19. 1. " WINW ,AE/AWB Engine Window Width"
|
|
hexmask.long.byte 0x00 6.--12. 1. " WINVC ,AE/AWB Engine Vertical Window Count"
|
|
hexmask.long.byte 0x00 0.--5. 1. " WINHC ,AE/AWB Engine Horizontal Window Count"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "AEWINSTART,Start position for AE/AWB Windows Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position"
|
|
hexmask.long.word 0x00 0.--11. 1. " WINSH ,AE/AWB Engine Horizontal Window Start Position"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "AEWINBLK,Start position and height for black line of AE/AWB Windows Register"
|
|
hexmask.long.word 0x00 16.--27. 1. " WINSV ,AE/AWB Engine Vertical Window Start Position for single black line of windows"
|
|
hexmask.long.byte 0x00 0.--6. 1. " WINH ,AE/AWB Engine Window Height for the single black line of windows"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "AEWSUBWIN,Configuration for subsample data in AE/AWB window Register"
|
|
bitfld.long 0x00 8.--11. " AEWINCV ,AE/AWB Engine Vertical Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
bitfld.long 0x00 0.--3. " AEWINCH ,AE/AWB Engine Horizontal Sampling Point Increment" "2,4,6,8,10,12,14,16,18,20,22,24,26,28,30,32"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "AEWBUFST,SDRAM/DDRAM Start address for AE/AWB Engine"
|
|
hexmask.long 0x00 0.--31. 1. " AEWBUFST ,AE/AWB Engine SDRAM/DDRAM Start Address"
|
|
group.long 0x60++0xb
|
|
line.long 0x00 "RSDR_ADDR,SDRAM/DDRAM Read Address for AE/AWB Engine Register"
|
|
hexmask.long 0x00 0.--31. 1. " RADR ,Read Address"
|
|
line.long 0x04 "RADR_OFFSET,Line Offset for the Read Data Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " OFFSET ,Line offset"
|
|
line.long 0x08 "SDR_FRSIZE,Frame Size for SDRAM Read Data Register"
|
|
bitfld.long 0x08 28.--30. " BITSEL ,Bit Selection" "BITS9_0,BITS10_1,BITS11_2,BITS12_3,BITS13_4,BITS14_5,BITS15_6,?..."
|
|
hexmask.long.word 0x08 16.--27. 1. " VSIZE ,Number of lines to fetch from SDRAM for the frame"
|
|
hexmask.long.word 0x08 0.--11. 1. " HSIZE ,Number of pixels to fetch for each line for SDRAM"
|
|
width 0xb
|
|
tree.end
|
|
tree "VPSSBL (VPSS Buffer Logic)"
|
|
base asd:0x01c70800
|
|
width 9.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,Peripheral Revision and Class Information Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TID ,Peripheral Identification VPBE module"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CID ,Class Identification"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PREV ,Peripheral Revision Number Initial Revision"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "PCR,Peripheral Control Register"
|
|
bitfld.long 0x00 6. " WBLCTRL ,Select DDR2/mDDR controller Write Master" "IPIPE,?..."
|
|
bitfld.long 0x00 4.--5. " RBLCTRL ,Select DDR2/mDDR controller Read Master" "IPIPEIF,Reserved,H3A,?..."
|
|
bitfld.long 0x00 0.--2. " CPRIORITY ,Sets priority of VPSS" "High,0,1,2,3,4,5,Low"
|
|
width 9.
|
|
group.long 0x0c++0xf
|
|
line.long 0x00 "INTSTAT,Interrupt Status Register"
|
|
eventfld.long 0x00 12. " IPIPE_INT5 ,IPIPE_INT5 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 11. " IPIPE_INT4 ,IPIPE_INT4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 10. " IPIPE_INT3 ,IPIPE_INT3 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 9. " IPIPE_INT2 ,IPIPE_INT2 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 8. " IPIPE_INT1 ,IPIPE_INT1 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 7. " IPIPE_INT0 ,IPIPE_INT0 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 6. " IPIPEIFINT ,IPIPEIFIN interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 5. " OSDINT ,OSDINT interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 4. " VENCINT ,VENCINT interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 3. " H3AINT ,H3AINT interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 2. " CCDC_VDINT2 ,CCDC_VDINT2 interrupt" "No interrupt,Interrupt"
|
|
eventfld.long 0x00 1. " CCDC_VDINT1 ,CCDC_VDINT1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.long 0x00 0. " CCDC_VDINT0 ,CCDC_VDINT0 interrupt" "No interrupt,Interrupt"
|
|
width 9.
|
|
line.long 0x04 "INTSEL,Interrupt Selection Register"
|
|
bitfld.long 0x04 28.--31. " INTSEL7 ,Selects the interrupt for vpss-int[7]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x04 24.--27. " INTSEL6 ,Selects the interrupt for vpss-int[6]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x04 20.--23. " INTSEL5 ,Selects the interrupt for vpss-int[5]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x04 16.--19. " INTSEL4 ,Selects the interrupt for vpss-int[4]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " INTSEL3 ,Selects the interrupt for vpss-int[3]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x04 8.--11. " INTSEL2 ,Selects the interrupt for vpss-int[2]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " INTSEL1 ,Selects the interrupt for vpss-int[1]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x04 0.--3. " INTSEL0 ,Selects the interrupt for vpss-int[0]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
line.long 0x08 "EVTSEL,Event Selection Register"
|
|
bitfld.long 0x08 28.--31. " EVTSEL3 ,Selects the event for vpss_evt[3]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 24.--27. " EVTSEL2 ,Selects the event for vpss_evt[2]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x08 20.--23. " EVTSEL1 ,Selects the event for vpss_evt[1]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
bitfld.long 0x08 16.--19. " EVTSEL0 ,Selects the event for vpss_evt[0]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " INTSEL8 ,Selects the interrupt for vpss-int[8]" "CCDC VDINT0,CCDC VDINT1,CCDC VDINT2,H3AINT,VENCINT,OSDINT,IPIPEIFINT,IPIPE_INT0_HST,IPIPE_INT1_SDR,IPIPE_INT2_RZA,IPIPE_INT3_RZB,Reserved,IPIPE_INT5_MMR,?..."
|
|
line.long 0x0c "MEMCTRL,Shared Memory Master Select Register"
|
|
bitfld.long 0x0c 2. " IPIPE_WD_EN ,IPIPE Write Address Word Enable" "Enabled,Disabled"
|
|
bitfld.long 0x0c 1. " RSZ_CTRL ,Resizer memory select" "IPIPE,?..."
|
|
bitfld.long 0x0c 0. " DFCCTRL ,Defect correction memory select" "IPIPE,CCDC"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "RTO (Real Time Out Controller)"
|
|
base asd:0x01c20c00
|
|
width 13.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "REVID,RTO Controller Revision ID Register"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Scheme value" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Function"
|
|
textline " "
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
hexmask.long.byte 0x00 8.--10. 1. " MAJOR ,Major number"
|
|
textline " "
|
|
hexmask.long.byte 0x00 6.--7. 1. " CUSTOM ,Custom"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Number"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "CTRL_STATUS,RTO Controller Control and Status Register"
|
|
bitfld.long 0x00 21. " OUTSTATE[3] ,Output signal status bit[3]" "Low,High"
|
|
bitfld.long 0x00 20. " OUTSTATE[2] ,Output signal status bit[2]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " OUTSTATE[1] ,Output signal status bit[1]" "Low,High"
|
|
bitfld.long 0x00 18. " OUTSTATE[0] ,Output signal status bit[0]" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SOURCEPOLARITY ,Event source bit" "High,Low"
|
|
bitfld.long 0x00 16. " OVERRUN ,Overrun condition bit" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " OPMASKDATA[3] ,Output mask[3]" "Not changed,Changed"
|
|
bitfld.long 0x00 14. " OPMASKDATA[2] ,Output mask[2]" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 13. " OPMASKDATA[1] ,Output mask[1]" "Not changed,Changed"
|
|
bitfld.long 0x00 12. " OPMASKDATA[0] ,Output mask[0]" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x00 11. " OPPATTERNDATA[3] ,Output pattern mode bit[3]" "Not changed,Toggled"
|
|
bitfld.long 0x00 10. " OPPATTERNDATA[2] ,Output pattern mode bit[2]" "Not changed,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " OPPATTERNDATA[1] ,Output pattern mode bit[1]" "Not changed,Toggled"
|
|
bitfld.long 0x00 8. " OPPATTERNDATA[0] ,Output pattern mode bit[0]" "Not changed,Toggled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " OUTPUTMODE ,Output Mode" "Direct Out,Toggle"
|
|
bitfld.long 0x00 5.--6. " DETECTBIT ,Input event condition detect" "No events,Rising edge,Falling edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " SELECTBIT ,Select input event source" "Timer 1:2 side of Timer 3,Timer 3:4 side of Timer 3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,RTO Enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree.open "PLL"
|
|
tree "PLL Controller 0"
|
|
base asd:0x01C40800
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PLL Controller Peripheral Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "PLLCTL,PLL Control Register"
|
|
bitfld.long 0x00 8. " CLKMODE ,Reference clock selection" "Internal,CLKIN"
|
|
bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "PLLEN,Internal test hardware"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PLLDIS ,PLL disable" "Not disabled,Disabled"
|
|
bitfld.long 0x00 3. " PLLRST ,PLL reset" "Released,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down mode select" "Operational,Power-down"
|
|
bitfld.long 0x00 0. " PLLEN ,PLL enable" "Bypass mode,PLL mode"
|
|
width 10.
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "PLLM,PLL Multiplier Control Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PLLM ,PLL multiplier"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x00 "PREDIV,PLL Pre-Divider Control Register"
|
|
bitfld.long 0x00 15. " PREDEN ,Pre-divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio for post divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x118--0x123
|
|
line.long 0x00 "PLLDIV1,PLL Controller Divider 1 Register"
|
|
bitfld.long 0x00 15. " D1EN ,Divider 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
line.long 0x04 "PLLDIV2,PLL Controller Divider 2 Register"
|
|
bitfld.long 0x04 15. " D2EN ,Divider 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
line.long 0x08 "PLLDIV3,PLL Controller Divider 3 Register"
|
|
bitfld.long 0x08 15. " D3EN ,Divider 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x00 "POSTDIV,PLL Post-Divider Control Register"
|
|
bitfld.long 0x00 15. " POSTEN ,Post-Divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "BPDIV,Bypass Divider Register"
|
|
bitfld.long 0x00 15. " BPDEN ,Bypass divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x138++0x3
|
|
line.long 0x00 "PLLCMD,PLL Controller Command Register"
|
|
bitfld.long 0x00 0. " GOSET ,GO operation command" "No effect,Initiated"
|
|
rgroup.long 0x13c++0x3
|
|
line.long 0x00 "PLLSTAT,PLL Controller Status Register"
|
|
bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress"
|
|
if (0==0)
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register"
|
|
bitfld.long 0x00 3. " ALN4 ,SYSCLK4 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 2. " ALN3 ,SYSCLK3 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned"
|
|
else
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register"
|
|
bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned"
|
|
endif
|
|
if (0==0)
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "DCHANGE,PLLDIV Divider Ratio Change Status Register"
|
|
bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified"
|
|
else
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "DCHANGE,PLLDIV Divider Ratio Change Status Register"
|
|
bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified"
|
|
endif
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "CKEN,Clock Enable Control Register"
|
|
bitfld.long 0x00 0. " AUXEN ,AUXCLK enable" "Disabled,Enabled"
|
|
rgroup.long 0x14c++0x3
|
|
line.long 0x00 "CKSTAT,Clock Status Register"
|
|
bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On"
|
|
bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On"
|
|
if (0==0)
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x00 "SYSTAT,SYSCLK Status Register"
|
|
bitfld.long 0x00 3. " SYSON4 ,SYSCLK4 on status" "Off,On"
|
|
bitfld.long 0x00 2. " SYSON3 ,SYSCLK3 on status" "Off,On"
|
|
bitfld.long 0x00 1. " SYSON2 ,SYSCLK2 on status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSON1 ,SYSCLK1 on status" "Off,On"
|
|
else
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x00 "SYSTAT,SYSCLK Status Register"
|
|
bitfld.long 0x00 1. " SYSON2 ,SYSCLK2 on status" "Off,On"
|
|
bitfld.long 0x00 0. " SYSON1 ,SYSCLK1 on status" "Off,On"
|
|
endif
|
|
group.long 0x160++0x3
|
|
line.long 0x00 "PLLDIV4,PLL Controller Divider 4 Register"
|
|
bitfld.long 0x00 15. " D4EN ,Divider 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 0xb
|
|
tree.end
|
|
tree "PLL Controller 1"
|
|
base asd:0x01C40c00
|
|
width 10.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,PLL Controller Peripheral Identification Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TYPE ,Type of peripheral"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CLASS ,Class of peripheral"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REV ,Revision of peripheral"
|
|
group.long 0x100++0x3
|
|
line.long 0x00 "PLLCTL,PLL Control Register"
|
|
bitfld.long 0x00 8. " CLKMODE ,Reference clock selection" "Internal,CLKIN"
|
|
bitfld.long 0x00 5. " PLLENSRC ,PLL enable source" "PLLEN,Internal test hardware"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PLLDIS ,PLL disable" "Not disabled,Disabled"
|
|
bitfld.long 0x00 3. " PLLRST ,PLL reset" "Released,Asserted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PLLPWRDN ,PLL power-down mode select" "Operational,Power-down"
|
|
bitfld.long 0x00 0. " PLLEN ,PLL enable" "Bypass mode,PLL mode"
|
|
width 10.
|
|
group.long 0x110++0x3
|
|
line.long 0x00 "PLLM,PLL Multiplier Control Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PLLM ,PLL multiplier"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x00 "PREDIV,PLL Pre-Divider Control Register"
|
|
bitfld.long 0x00 15. " PREDEN ,Pre-divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio for post divider" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x118--0x123
|
|
line.long 0x00 "PLLDIV1,PLL Controller Divider 1 Register"
|
|
bitfld.long 0x00 15. " D1EN ,Divider 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
line.long 0x04 "PLLDIV2,PLL Controller Divider 2 Register"
|
|
bitfld.long 0x04 15. " D2EN ,Divider 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
line.long 0x08 "PLLDIV3,PLL Controller Divider 3 Register"
|
|
bitfld.long 0x08 15. " D3EN ,Divider 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x00 "POSTDIV,PLL Post-Divider Control Register"
|
|
bitfld.long 0x00 15. " POSTEN ,Post-Divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x12C++0x03
|
|
line.long 0x00 "BPDIV,Bypass Divider Register"
|
|
bitfld.long 0x00 15. " BPDEN ,Bypass divider enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
group.long 0x138++0x3
|
|
line.long 0x00 "PLLCMD,PLL Controller Command Register"
|
|
bitfld.long 0x00 0. " GOSET ,GO operation command" "No effect,Initiated"
|
|
rgroup.long 0x13c++0x3
|
|
line.long 0x00 "PLLSTAT,PLL Controller Status Register"
|
|
bitfld.long 0x00 0. " GOSTAT ,GO operation status" "Not in progress,In progress"
|
|
if (1==0)
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register"
|
|
bitfld.long 0x00 3. " ALN4 ,SYSCLK4 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 2. " ALN3 ,SYSCLK3 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned"
|
|
else
|
|
group.long 0x140++0x3
|
|
line.long 0x00 "ALNCTL,PLL Controller Clock Align Control Register"
|
|
bitfld.long 0x00 1. " ALN2 ,SYSCLK2 alignment" "Not aligned,Aligned"
|
|
bitfld.long 0x00 0. " ALN1 ,SYSCLK1 alignment" "Not aligned,Aligned"
|
|
endif
|
|
if (1==0)
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "DCHANGE,PLLDIV Divider Ratio Change Status Register"
|
|
bitfld.long 0x00 3. " SYS4 ,SYSCLK4 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 2. " SYS3 ,SYSCLK3 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified"
|
|
else
|
|
rgroup.long 0x144++0x3
|
|
line.long 0x00 "DCHANGE,PLLDIV Divider Ratio Change Status Register"
|
|
bitfld.long 0x00 1. " SYS2 ,SYSCLK2 divide ratio modified" "Not modified,Modified"
|
|
bitfld.long 0x00 0. " SYS1 ,SYSCLK1 divide ratio modified" "Not modified,Modified"
|
|
endif
|
|
group.long 0x148++0x3
|
|
line.long 0x00 "CKEN,Clock Enable Control Register"
|
|
bitfld.long 0x00 0. " AUXEN ,AUXCLK enable" "Disabled,Enabled"
|
|
rgroup.long 0x14c++0x3
|
|
line.long 0x00 "CKSTAT,Clock Status Register"
|
|
bitfld.long 0x00 3. " BPON ,SYSCLKBP on status" "Off,On"
|
|
bitfld.long 0x00 0. " AUXEN ,AUXCLK on status" "Off,On"
|
|
if (1==0)
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x00 "SYSTAT,SYSCLK Status Register"
|
|
bitfld.long 0x00 3. " SYSON4 ,SYSCLK4 on status" "Off,On"
|
|
bitfld.long 0x00 2. " SYSON3 ,SYSCLK3 on status" "Off,On"
|
|
bitfld.long 0x00 1. " SYSON2 ,SYSCLK2 on status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SYSON1 ,SYSCLK1 on status" "Off,On"
|
|
else
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x00 "SYSTAT,SYSCLK Status Register"
|
|
bitfld.long 0x00 1. " SYSON2 ,SYSCLK2 on status" "Off,On"
|
|
bitfld.long 0x00 0. " SYSON1 ,SYSCLK1 on status" "Off,On"
|
|
endif
|
|
group.long 0x160++0x3
|
|
line.long 0x00 "PLLDIV4,PLL Controller Divider 4 Register"
|
|
bitfld.long 0x00 15. " D4EN ,Divider 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--4. " RATIO ,Divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
|
|
width 0xb
|
|
tree.end
|
|
tree.end
|
|
tree "PSC (Power and Sleep Controller)"
|
|
base asd:0x01c41000
|
|
width 9.
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "PID,Peripheral Revision and Class Information"
|
|
bitfld.long 0x00 30.--31. " SCHEME ,Distinguishes between the old scheme and the current scheme" "0,1,2,3"
|
|
hexmask.long.word 0x00 16.--27. 1. " FUNC ,Software compatible module family"
|
|
hexmask.long.byte 0x00 11.--15. 1. " RTL ,RTL revision"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " MAJOR ,Major Revision" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 6.--7. " CUSTOM ,Special version for a particular device" "0,1,2,3"
|
|
hexmask.long.byte 0x00 0.--5. 1. " MINOR ,Minor Revision"
|
|
wgroup.long 0x18++0x3
|
|
line.long 0x00 "INTEVAL,Interrupt Evaluation Register"
|
|
bitfld.long 0x00 0. " ALLEV ,Evaluate PSC interrupt" "No effect,Re-evaluate"
|
|
width 9.
|
|
rgroup.long 0x40++0x7
|
|
line.long 0x00 "MERRPR0,Module Error Pending Register 0 (mod 0 - 31)"
|
|
bitfld.long 0x00 31. " M031 ,Module interrupt status bit for module 31" "Not active,Active"
|
|
bitfld.long 0x00 30. " M030 ,Module interrupt status bit for module 30" "Not active,Active"
|
|
bitfld.long 0x00 29. " M029 ,Module interrupt status bit for module 29" "Not active,Active"
|
|
bitfld.long 0x00 28. " M028 ,Module interrupt status bit for module 28" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " M027 ,Module interrupt status bit for module 27" "Not active,Active"
|
|
bitfld.long 0x00 26. " M026 ,Module interrupt status bit for module 26" "Not active,Active"
|
|
bitfld.long 0x00 25. " M025 ,Module interrupt status bit for module 25" "Not active,Active"
|
|
bitfld.long 0x00 24. " M024 ,Module interrupt status bit for module 24" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " M023 ,Module interrupt status bit for module 23" "Not active,Active"
|
|
bitfld.long 0x00 22. " M022 ,Module interrupt status bit for module 22" "Not active,Active"
|
|
bitfld.long 0x00 21. " M021 ,Module interrupt status bit for module 21" "Not active,Active"
|
|
bitfld.long 0x00 20. " M020 ,Module interrupt status bit for module 20" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " M019 ,Module interrupt status bit for module 19" "Not active,Active"
|
|
bitfld.long 0x00 18. " M018 ,Module interrupt status bit for module 18" "Not active,Active"
|
|
bitfld.long 0x00 17. " M017 ,Module interrupt status bit for module 17" "Not active,Active"
|
|
bitfld.long 0x00 16. " M016 ,Module interrupt status bit for module 16" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " M015 ,Module interrupt status bit for module 15" "Not active,Active"
|
|
bitfld.long 0x00 14. " M014 ,Module interrupt status bit for module 14" "Not active,Active"
|
|
bitfld.long 0x00 13. " M013 ,Module interrupt status bit for module 13" "Not active,Active"
|
|
bitfld.long 0x00 12. " M012 ,Module interrupt status bit for module 12" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " M011 ,Module interrupt status bit for module 11" "Not active,Active"
|
|
bitfld.long 0x00 10. " M010 ,Module interrupt status bit for module 10" "Not active,Active"
|
|
bitfld.long 0x00 9. " M09 ,Module interrupt status bit for module 9" "Not active,Active"
|
|
bitfld.long 0x00 8. " M08 ,Module interrupt status bit for module 8" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " M07 ,Module interrupt status bit for module 7" "Not active,Active"
|
|
bitfld.long 0x00 6. " M06 ,Module interrupt status bit for module 6" "Not active,Active"
|
|
bitfld.long 0x00 5. " M05 ,Module interrupt status bit for module 5" "Not active,Active"
|
|
bitfld.long 0x00 4. " M04 ,Module interrupt status bit for module 4" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " M03 ,Module interrupt status bit for module 3" "Not active,Active"
|
|
bitfld.long 0x00 2. " M02 ,Module interrupt status bit for module 2" "Not active,Active"
|
|
bitfld.long 0x00 1. " M01 ,Module interrupt status bit for module 1" "Not active,Active"
|
|
bitfld.long 0x00 0. " M00 ,Module interrupt status bit for module 0" "Not active,Active"
|
|
line.long 0x04 "MERRPR1,Module Error Pending Register 1 (mod 32 - 63)"
|
|
bitfld.long 0x04 9. " M041 ,Module interrupt status bit for module 41" "Not active,Active"
|
|
bitfld.long 0x04 8. " M040 ,Module interrupt status bit for module 40" "Not active,Active"
|
|
bitfld.long 0x04 6. " M038 ,Module interrupt status bit for module 38" "Not active,Active"
|
|
bitfld.long 0x04 5. " M037 ,Module interrupt status bit for module 37" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 4. " M036 ,Module interrupt status bit for module 36" "Not active,Active"
|
|
bitfld.long 0x04 3. " M035 ,Module interrupt status bit for module 35" "Not active,Active"
|
|
bitfld.long 0x04 2. " M034 ,Module interrupt status bit for module 34" "Not active,Active"
|
|
bitfld.long 0x04 1. " M033 ,Module interrupt status bit for module 33" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 0. " M032 ,Module interrupt status bit for module 32" "Not active,Active"
|
|
group.long 0x50++0x7
|
|
line.long 0x00 "MERRCR0,Module Error Clear Register 0 (mod 0-31)"
|
|
bitfld.long 0x00 31. " M31 ,Module interrupt status bit clear for module 31" "No effect,Cleared"
|
|
bitfld.long 0x00 30. " M30 ,Module interrupt status bit clear for module 30" "No effect,Cleared"
|
|
bitfld.long 0x00 29. " M29 ,Module interrupt status bit clear for module 29" "No effect,Cleared"
|
|
bitfld.long 0x00 28. " M28 ,Module interrupt status bit clear for module 28" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 27. " M27 ,Module interrupt status bit clear for module 27" "No effect,Cleared"
|
|
bitfld.long 0x00 26. " M26 ,Module interrupt status bit clear for module 26" "No effect,Cleared"
|
|
bitfld.long 0x00 25. " M25 ,Module interrupt status bit clear for module 25" "No effect,Cleared"
|
|
bitfld.long 0x00 24. " M24 ,Module interrupt status bit clear for module 24" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 23. " M23 ,Module interrupt status bit clear for module 23" "No effect,Cleared"
|
|
bitfld.long 0x00 22. " M22 ,Module interrupt status bit clear for module 22" "No effect,Cleared"
|
|
bitfld.long 0x00 21. " M21 ,Module interrupt status bit clear for module 21" "No effect,Cleared"
|
|
bitfld.long 0x00 20. " M20 ,Module interrupt status bit clear for module 20" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 19. " M19 ,Module interrupt status bit clear for module 19" "No effect,Cleared"
|
|
bitfld.long 0x00 18. " M18 ,Module interrupt status bit clear for module 18" "No effect,Cleared"
|
|
bitfld.long 0x00 17. " M17 ,Module interrupt status bit clear for module 17" "No effect,Cleared"
|
|
bitfld.long 0x00 16. " M16 ,Module interrupt status bit clear for module 16" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 15. " M15 ,Module interrupt status bit clear for module 15" "No effect,Cleared"
|
|
bitfld.long 0x00 14. " M14 ,Module interrupt status bit clear for module 14" "No effect,Cleared"
|
|
bitfld.long 0x00 13. " M13 ,Module interrupt status bit clear for module 13" "No effect,Cleared"
|
|
bitfld.long 0x00 12. " M12 ,Module interrupt status bit clear for module 12" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 11. " M11 ,Module interrupt status bit clear for module 11" "No effect,Cleared"
|
|
bitfld.long 0x00 10. " M10 ,Module interrupt status bit clear for module 10" "No effect,Cleared"
|
|
bitfld.long 0x00 9. " M9 ,Module interrupt status bit clear for module 9" "No effect,Cleared"
|
|
bitfld.long 0x00 8. " M8 ,Module interrupt status bit clear for module 8" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 7. " M7 ,Module interrupt status bit clear for module 7" "No effect,Cleared"
|
|
bitfld.long 0x00 6. " M6 ,Module interrupt status bit clear for module 6" "No effect,Cleared"
|
|
bitfld.long 0x00 5. " M5 ,Module interrupt status bit clear for module 5" "No effect,Cleared"
|
|
bitfld.long 0x00 4. " M4 ,Module interrupt status bit clear for module 4" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 3. " M3 ,Module interrupt status bit clear for module 3" "No effect,Cleared"
|
|
bitfld.long 0x00 2. " M2 ,Module interrupt status bit clear for module 2" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " M1 ,Module interrupt status bit clear for module 1" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " M0 ,Module interrupt status bit clear for module 0" "No effect,Cleared"
|
|
line.long 0x04 "MERRCR1,Module Error Clear Register 1 (mod 32-64)"
|
|
bitfld.long 0x04 9. " M41 ,Module interrupt status bit clear for module 41" "No effect,Cleared"
|
|
bitfld.long 0x04 8. " M40 ,Module interrupt status bit clear for module 40" "No effect,Cleared"
|
|
bitfld.long 0x04 6. " M38 ,Module interrupt status bit clear for module 38" "No effect,Cleared"
|
|
bitfld.long 0x04 5. " M37 ,Module interrupt status bit clear for module 37" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 4. " M36 ,Module interrupt status bit clear for module 36" "No effect,Cleared"
|
|
bitfld.long 0x04 3. " M35 ,Module interrupt status bit clear for module 35" "No effect,Cleared"
|
|
bitfld.long 0x04 2. " M34 ,Module interrupt status bit clear for module 34" "No effect,Cleared"
|
|
bitfld.long 0x04 1. " M33 ,Module interrupt status bit clear for module 33" "No effect,Cleared"
|
|
textline " "
|
|
bitfld.long 0x04 0. " M32 ,Module interrupt status bit clear for module 32" "No effect,Cleared"
|
|
rgroup.long 0x60++0x3
|
|
line.long 0x00 "PERRPR,Power Error Pending Register"
|
|
bitfld.long 0x00 1. " P1 ,Power domain interrupt 1 status" "Not active,Active"
|
|
bitfld.long 0x00 0. " P0 ,Power domain interrupt 0 status" "Not active,Active"
|
|
wgroup.long 0x68++0x3
|
|
line.long 0x00 "PERRCR,Power Error Clear Register"
|
|
bitfld.long 0x00 1. " P1 ,Clear power domain interrupt 1" "No effect,Cleared"
|
|
bitfld.long 0x00 1. " P0 ,Clear power domain interrupt 0" "No effect,Cleared"
|
|
width 9.
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x00 "EPCPR,External Power Control Pending Register"
|
|
bitfld.long 0x00 1. " EPC1 ,External power control pending bit" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " EPC0 ,External power control pending bit" "Not pending,Pending"
|
|
wgroup.long 0x78++0x3
|
|
line.long 0x00 "EPCCR,External Power Control Clear Register"
|
|
bitfld.long 0x00 1. " EPC1 ,External power control clear bit" "No effect,Cleared"
|
|
bitfld.long 0x00 0. " EPC0 ,External power control clear bit" "No effect,Cleared"
|
|
wgroup.long 0x120++0x3
|
|
line.long 0x00 "PTCMD,Power Domain Transition Command Register"
|
|
bitfld.long 0x00 0. " GO[1] ,Power domain GO transition command" "No effect,Interrupt"
|
|
rgroup.long 0x128++0x3
|
|
line.long 0x00 "PTSTAT,Power Domain Transition Status Register"
|
|
bitfld.long 0x00 0. " GOSTAT[1] ,Power domain transition status" "No transition,In progress"
|
|
rgroup.long 0x200++0x7
|
|
line.long 0x00 "PDSTAT0,Power Domain Status 0 Register"
|
|
bitfld.long 0x00 11. " EMUIHB ,Emulation alters domain state" "Not active,Active"
|
|
bitfld.long 0x00 9. " PORDONE ,Power_On_Reset (POR) Done status" "Not done,Done"
|
|
bitfld.long 0x00 8. " POR ,Power Domain Power_On_Reset (POR) status" "Asserted,De-asserted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STATE4 ,Power Domain Status" "Off,On"
|
|
bitfld.long 0x00 3. " STATE3 ,Power Domain Status" "Off,On"
|
|
bitfld.long 0x00 2. " STATE2 ,Power Domain Status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " STATE1 ,Power Domain Status" "Off,On"
|
|
bitfld.long 0x00 0. " STATE0 ,Power Domain Status" "Off,On"
|
|
group.long 0x300++0x7
|
|
line.long 0x00 "PDCTL0,Power Domain Control 0 Register"
|
|
bitfld.long 0x00 9. " EMUIHBIE ,Emulation alters power domain state interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EPCGOOD ,External power control power good indication" "Off,On"
|
|
bitfld.long 0x00 0. " NEXT ,Power domain next state" "Off,On"
|
|
rgroup.long 0x800++0x27
|
|
line.long 0x0 "MDSTAT0,Module Status 0 Register"
|
|
bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x0 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x4 "MDSTAT1,Module Status 1 Register"
|
|
bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x4 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x4 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x8 "MDSTAT2,Module Status 2 Register"
|
|
bitfld.long 0x8 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x8 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x8 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x8 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x8 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x8 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0xC "MDSTAT3,Module Status 3 Register"
|
|
bitfld.long 0xC 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0xC 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0xC 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0xC 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0xC 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0xC 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x10 "MDSTAT4,Module Status 4 Register"
|
|
bitfld.long 0x10 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x10 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x10 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x10 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x10 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x14 "MDSTAT5,Module Status 5 Register"
|
|
bitfld.long 0x14 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x14 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x14 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x14 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x14 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x18 "MDSTAT6,Module Status 6 Register"
|
|
bitfld.long 0x18 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x18 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x18 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x18 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x18 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x1C "MDSTAT7,Module Status 7 Register"
|
|
bitfld.long 0x1C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x1C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x1C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x1C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x1C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x20 "MDSTAT8,Module Status 8 Register"
|
|
bitfld.long 0x20 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x20 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x20 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x20 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x20 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x20 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x24 "MDSTAT9,Module Status 9 Register"
|
|
bitfld.long 0x24 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x24 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x24 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x24 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x24 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x24 0.--5. 1. " STATE ,Module state status"
|
|
rgroup.long 0x828++0x77
|
|
line.long 0x0 "MDSTAT10,Module Status 10 Register"
|
|
bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x0 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x4 "MDSTAT11,Module Status 11 Register"
|
|
bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x4 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x4 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x8 "MDSTAT12,Module Status 12 Register"
|
|
bitfld.long 0x8 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x8 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x8 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x8 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x8 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x8 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x8 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0xC "MDSTAT13,Module Status 13 Register"
|
|
bitfld.long 0xC 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0xC 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0xC 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0xC 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0xC 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0xC 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0xC 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x10 "MDSTAT14,Module Status 14 Register"
|
|
bitfld.long 0x10 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x10 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x10 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x10 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x10 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x10 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x10 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x14 "MDSTAT15,Module Status 15 Register"
|
|
bitfld.long 0x14 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x14 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x14 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x14 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x14 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x14 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x18 "MDSTAT16,Module Status 16 Register"
|
|
bitfld.long 0x18 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x18 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x18 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x18 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x18 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x18 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x1C "MDSTAT17,Module Status 17 Register"
|
|
bitfld.long 0x1C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x1C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x1C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x1C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x1C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x1C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x20 "MDSTAT18,Module Status 18 Register"
|
|
bitfld.long 0x20 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x20 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x20 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x20 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x20 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x20 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x20 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x24 "MDSTAT19,Module Status 19 Register"
|
|
bitfld.long 0x24 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x24 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x24 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x24 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x24 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x24 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x24 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x28 "MDSTAT20,Module Status 20 Register"
|
|
bitfld.long 0x28 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x28 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x28 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x28 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x28 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x28 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x28 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x2C "MDSTAT21,Module Status 21 Register"
|
|
bitfld.long 0x2C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x2C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x2C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x2C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x2C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x2C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x2C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x30 "MDSTAT22,Module Status 22 Register"
|
|
bitfld.long 0x30 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x30 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x30 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x30 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x30 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x30 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x30 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x34 "MDSTAT23,Module Status 23 Register"
|
|
bitfld.long 0x34 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x34 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x34 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x34 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x34 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x34 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x34 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x38 "MDSTAT24,Module Status 24 Register"
|
|
bitfld.long 0x38 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x38 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x38 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x38 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x38 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x38 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x38 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x3C "MDSTAT25,Module Status 25 Register"
|
|
bitfld.long 0x3C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x3C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x3C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x3C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x3C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x3C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x3C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x40 "MDSTAT26,Module Status 26 Register"
|
|
bitfld.long 0x40 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x40 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x40 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x40 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x40 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x40 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x40 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x44 "MDSTAT27,Module Status 27 Register"
|
|
bitfld.long 0x44 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x44 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x44 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x44 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x44 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x44 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x44 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x48 "MDSTAT28,Module Status 28 Register"
|
|
bitfld.long 0x48 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x48 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x48 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x48 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x48 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x48 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x48 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x4C "MDSTAT29,Module Status 29 Register"
|
|
bitfld.long 0x4C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x4C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x4C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x4C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x50 "MDSTAT30,Module Status 30 Register"
|
|
bitfld.long 0x50 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x50 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x50 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x50 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x50 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x50 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x50 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x54 "MDSTAT31,Module Status 31 Register"
|
|
bitfld.long 0x54 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x54 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x54 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x54 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x54 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x54 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x54 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x58 "MDSTAT32,Module Status 32 Register"
|
|
bitfld.long 0x58 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x58 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x58 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x58 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x58 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x58 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x58 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x5C "MDSTAT33,Module Status 33 Register"
|
|
bitfld.long 0x5C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x5C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x5C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x5C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x5C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x5C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x5C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x60 "MDSTAT34,Module Status 34 Register"
|
|
bitfld.long 0x60 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x60 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x60 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x60 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x60 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x60 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x60 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x64 "MDSTAT35,Module Status 35 Register"
|
|
bitfld.long 0x64 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x64 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x64 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x64 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x64 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x64 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x64 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x68 "MDSTAT36,Module Status 36 Register"
|
|
bitfld.long 0x68 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x68 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x68 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x68 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x68 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x68 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x68 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x6C "MDSTAT37,Module Status 37 Register"
|
|
bitfld.long 0x6C 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x6C 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x6C 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x6C 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x6C 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x6C 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x6C 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x70 "MDSTAT38,Module Status 38 Register"
|
|
bitfld.long 0x70 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x70 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x70 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x70 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x70 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x70 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x70 0.--5. 1. " STATE ,Module state status"
|
|
rgroup.long 0x8a0++0x7
|
|
line.long 0x0 "MDSTAT40,Module Status 40 Register"
|
|
bitfld.long 0x0 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x0 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x0 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x0 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x0 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--5. 1. " STATE ,Module state status"
|
|
line.long 0x4 "MDSTAT41,Module Status 41 Register"
|
|
bitfld.long 0x4 17. " EMUIHB ,Emulation Alters Module State Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 16. " EMURST ,Emulation Alters Module Reset Interrupt active" "Not active,Active"
|
|
bitfld.long 0x4 12. " MCKOUT ,Module clock output status" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x4 11. " MRSTDONE ,Module reset done" "Not done,Done"
|
|
bitfld.long 0x4 10. " MRST ,Module reset status" "Asserted,De-asserted"
|
|
bitfld.long 0x4 8. " LRST ,Module local reset status" "Asserted,De-asserted"
|
|
textline " "
|
|
hexmask.long.byte 0x4 0.--5. 1. " STATE ,Module state status"
|
|
group.long 0xa00++0x27
|
|
line.long 0x0 "MDCTL0,Module Control 0 Register"
|
|
bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x4 "MDCTL1,Module Control 1 Register"
|
|
bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x8 "MDCTL2,Module Control 2 Register"
|
|
bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0xC "MDCTL3,Module Control 3 Register"
|
|
bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x10 "MDCTL4,Module Control 4 Register"
|
|
bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x14 "MDCTL5,Module Control 5 Register"
|
|
bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x18 "MDCTL6,Module Control 6 Register"
|
|
bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x1C "MDCTL7,Module Control 7 Register"
|
|
bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x20 "MDCTL8,Module Control 8 Register"
|
|
bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x24 "MDCTL9,Module Control 9 Register"
|
|
bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
group.long 0xa28++0x6f
|
|
line.long 0x0 "MDCTL10,Module Control 10 Register"
|
|
bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x4 "MDCTL11,Module Control 11 Register"
|
|
bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x8 "MDCTL12,Module Control 12 Register"
|
|
bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0xC "MDCTL13,Module Control 13 Register"
|
|
bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x10 "MDCTL14,Module Control 14 Register"
|
|
bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x14 "MDCTL15,Module Control 15 Register"
|
|
bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x18 "MDCTL16,Module Control 16 Register"
|
|
bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x1C "MDCTL17,Module Control 17 Register"
|
|
bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x20 "MDCTL18,Module Control 18 Register"
|
|
bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x24 "MDCTL19,Module Control 19 Register"
|
|
bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x28 "MDCTL20,Module Control 20 Register"
|
|
bitfld.long 0x28 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x28 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x28 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x2C "MDCTL21,Module Control 21 Register"
|
|
bitfld.long 0x2C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x2C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x2C 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x30 "MDCTL22,Module Control 22 Register"
|
|
bitfld.long 0x30 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x30 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x30 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x34 "MDCTL23,Module Control 23 Register"
|
|
bitfld.long 0x34 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x34 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x34 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x38 "MDCTL24,Module Control 24 Register"
|
|
bitfld.long 0x38 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x38 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x38 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x3C "MDCTL25,Module Control 25 Register"
|
|
bitfld.long 0x3C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x3C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x3C 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x40 "MDCTL26,Module Control 26 Register"
|
|
bitfld.long 0x40 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x40 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x40 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x44 "MDCTL27,Module Control 27 Register"
|
|
bitfld.long 0x44 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x44 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x44 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x48 "MDCTL28,Module Control 28 Register"
|
|
bitfld.long 0x48 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x48 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x48 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
rgroup.long 0xa74++0x27
|
|
line.long 0x0 "MDCTL29,Module Control 29 Register"
|
|
bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x4 "MDCTL30,Module Control 30 Register"
|
|
bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x8 "MDCTL31,Module Control 31 Register"
|
|
bitfld.long 0x8 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x8 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x8 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0xC "MDCTL32,Module Control 32 Register"
|
|
bitfld.long 0xC 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0xC 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0xC 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x10 "MDCTL33,Module Control 33 Register"
|
|
bitfld.long 0x10 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x10 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x10 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x14 "MDCTL34,Module Control 34 Register"
|
|
bitfld.long 0x14 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x14 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x14 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x18 "MDCTL35,Module Control 35 Register"
|
|
bitfld.long 0x18 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x18 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x18 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x1C "MDCTL36,Module Control 36 Register"
|
|
bitfld.long 0x1C 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x1C 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x1C 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x20 "MDCTL37,Module Control 37 Register"
|
|
bitfld.long 0x20 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x20 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x20 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x24 "MDCTL38,Module Control 38 Register"
|
|
bitfld.long 0x24 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x24 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x24 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
group.long 0xaa0++0x7
|
|
line.long 0x0 "MDCTL40,Module Control 40 Register"
|
|
bitfld.long 0x0 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x0 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
line.long 0x4 "MDCTL41,Module Control 41 Register"
|
|
bitfld.long 0x4 10. " EMUIHBIE ,Interrupt enable for emulation alters module state" "Disabled,Enabled"
|
|
bitfld.long 0x4 9. " EMURSTIE ,Interrupt enable for emulation alters reset" "Disabled,Enabled"
|
|
bitfld.long 0x4 0.--4. " NEXT ,Module next state" "SwRstDisable,SyncReset,Disable,Enable,?..."
|
|
width 0xb
|
|
tree.end
|
|
tree "INTC (Interrupt Controller)"
|
|
base asd:0x01C48000
|
|
width 9.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "FIQ0,Fast Interrupt Request Status Register 0"
|
|
bitfld.long 0x00 31. " FIQ[31] ,Interrupt status of INT31 (SDIOINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 30. " FIQ[30] ,Interrupt status of INT30 (AEMIFINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 29. " FIQ[29] ,Interrupt status of INT29 (DDRINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 28. " FIQ[28] ,Interrupt status of INT28 (PWMINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 27. " FIQ[27] ,Interrupt status of INT27 (MMCINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 26. " FIQ[26] ,Interrupt status of INT26 (MMCINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 25. " FIQ[25] ,Interrupt status of INT25 (MBRINT0/MBRINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 24. " FIQ[24] ,Interrupt status of INT24 (MBXINT0/MBXINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 23. " FIQ[23] ,Interrupt status of INT23 (SDIOINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 22. " FIQ[22] ,Interrupt status of INT22 (TINT7)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 21. " FIQ[21] ,Interrupt status of INT21 (SPINT2-1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 20. " FIQ[20] ,Interrupt status of INT20 (PSCINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FIQ[19] ,Interrupt status of INT19 (SPINT2-0/TCERRINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 18. " FIQ[18] ,Interrupt status of INT18 ((SPINT1-1/TCERRINT0))" "Occurred,Not occurred"
|
|
bitfld.long 0x00 17. " FIQ[17] ,Interrupt status of INT17 (SPINT1-0/CCERRINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 16. " FIQ[16] ,Interrupt status of INT16 (CCINT0)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 15. " FIQ[15] ,Interrupt status of INT15 (TINT6)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 14. " FIQ[14] ,Interrupt status of INT14 ((UARTINT2/TINT5))" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 13. " FIQ[13] ,Interrupt status of INT13 (RTOINT/TINT4)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 12. " FIQ[12] ,Interrupt status of INT12 (USBINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 8. " FIQ[8] ,Interrupt status of INT8 (VPSSINT8)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FIQ[7] ,Interrupt status of INT7 (VPSSINT7)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 6. " FIQ[6] ,Interrupt status of INT6 (VPSSINT6)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 5. " FIQ[5] ,Interrupt status of INT5 (VPSSINT5)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FIQ[4] ,Interrupt status of INT4 (VPSSINT4)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 3. " FIQ[3] ,Interrupt status of INT3 (VPSSINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 2. " FIQ[2] ,Interrupt status of INT2 (VPSSINT2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " FIQ[1] ,Interrupt status of INT1 (VPSSINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x00 0. " FIQ[0] ,Interrupt status of INT0 (VPSSINT0)" "Occurred,Not occurred"
|
|
line.long 0x04 "FIQ1,Fast Interrupt Request Status Register 1"
|
|
bitfld.long 0x04 31. " FIQ[63] ,Interrupt status of INT63 (EMUINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 30. " FIQ[62] ,Interrupt status of INT62 (COMMRX)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 29. " FIQ[61] ,Interrupt status of INT61 (COMMTX)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 28. " FIQ[60] ,Interrupt status of INT60 (GPIOBNK6)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 27. " FIQ[59] ,Interrupt status of INT59 (GPIOBNK5)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 26. " FIQ[58] ,Interrupt status of INT58 (GPIOBNK4)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 25. " FIQ[57] ,Interrupt status of INT57 (GPIOBNK3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 24. " FIQ[56] ,Interrupt status of INT56 (GPIOBNK2)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 23. " FIQ[55] ,Interrupt status of INT55 (GPIOBNK1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 22. " FIQ[54] ,Interrupt status of INT54 (GPIOBNK0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 21. " FIQ[53] ,Interrupt status of INT53 (GPIO9)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 20. " FIQ[52] ,Interrupt status of INT52 (GPIO8)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FIQ[51] ,Interrupt status of INT51 (GPIO7)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 18. " FIQ[50] ,Interrupt status of INT50 (GPIO6)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 17. " FIQ[49] ,Interrupt status of INT49 (GPIO5)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 16. " FIQ[48] ,Interrupt status of INT48 (GPIO4)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 15. " FIQ[47] ,Interrupt status of INT47 (GPIO3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 14. " FIQ[46] ,Interrupt status of INT46 (GPIO2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 13. " FIQ[45] ,Interrupt status of INT45 (GPIO1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 12. " FIQ[44] ,Interrupt status of INT44 (GPIO0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 11. " FIQ[43] ,Interrupt status of INT43 (SPINT0-1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 10. " FIQ[42] ,Interrupt status of INT42 (SPINT0-0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 9. " FIQ[41] ,Interrupt status of INT41 (UARTINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 8. " FIQ[40] ,Interrupt status of INT40 (UARTINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FIQ[39] ,Interrupt status of INT39 (I2CINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 6. " FIQ[38] ,Interrupt status of INT38 (PWMINT2)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 5. " FIQ[37] ,Interrupt status of INT37 (PWMINT1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " FIQ[36] ,Interrupt status of INT36 (PWMINT0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 3. " FIQ[35] ,Interrupt status of INT35 (TINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 2. " FIQ[34] ,Interrupt status of INT34 (TINT2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " FIQ[33] ,Interrupt status of INT33 (TINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 0. " FIQ[32] ,Interrupt status of INT32 (TINT0)" "Occurred,Not occurred"
|
|
group.long 0x08++0x7
|
|
line.long 0x00 "IRQ0,IRQ Interrupt Status 0"
|
|
bitfld.long 0x0 31. " IRQ[31] ,Interrupt status of INT31 (SDIOINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 30. " IRQ[30] ,Interrupt status of INT30 (AEMIFINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 29. " IRQ[29] ,Interrupt status of INT29 (DDRINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 28. " IRQ[28] ,Interrupt status of INT28 (PWMINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 27. " IRQ[27] ,Interrupt status of INT27 (MMCINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 26. " IRQ[26] ,Interrupt status of INT26 (MMCINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 25. " IRQ[25] ,Interrupt status of INT25 (MBRINT0/MBRINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 24. " IRQ[24] ,Interrupt status of INT24 (MBXINT0/MBXINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 23. " IRQ[23] ,Interrupt status of INT23 (SDIOINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 22. " IRQ[22] ,Interrupt status of INT22 (TINT7)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 21. " IRQ[21] ,Interrupt status of INT21 (SPINT2-1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 20. " IRQ[20] ,Interrupt status of INT20 (PSCINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 19. " IRQ[19] ,Interrupt status of INT19 (SPINT2-0/TCERRINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 18. " IRQ[18] ,Interrupt status of INT18 ((SPINT1-1/TCERRINT0))" "Occurred,Not occurred"
|
|
bitfld.long 0x0 17. " IRQ[17] ,Interrupt status of INT17 (SPINT1-0/CCERRINT)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 16. " IRQ[16] ,Interrupt status of INT16 (CCINT0)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 15. " IRQ[15] ,Interrupt status of INT15 (TINT6)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 14. " IRQ[14] ,Interrupt status of INT14 ((UARTINT2/TINT5))" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 13. " IRQ[13] ,Interrupt status of INT13 (RTOINT/TINT4)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 12. " IRQ[12] ,Interrupt status of INT12 (USBINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 8. " IRQ[8] ,Interrupt status of INT8 (VPSSINT8)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 7. " IRQ[7] ,Interrupt status of INT7 (VPSSINT7)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 6. " IRQ[6] ,Interrupt status of INT6 (VPSSINT6)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 5. " IRQ[5] ,Interrupt status of INT5 (VPSSINT5)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 4. " IRQ[4] ,Interrupt status of INT4 (VPSSINT4)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 3. " IRQ[3] ,Interrupt status of INT3 (VPSSINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 2. " IRQ[2] ,Interrupt status of INT2 (VPSSINT2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x0 1. " IRQ[1] ,Interrupt status of INT1 (VPSSINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x0 0. " IRQ[0] ,Interrupt status of INT0 (VPSSINT0)" "Occurred,Not occurred"
|
|
line.long 0x04 "IRQ1,IRQ Interrupt Status 1"
|
|
bitfld.long 0x04 31. " IRQ[63] ,Interrupt status of INT63 (EMUINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 30. " IRQ[62] ,Interrupt status of INT62 (COMMRX)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 29. " IRQ[61] ,Interrupt status of INT61 (COMMTX)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 28. " IRQ[60] ,Interrupt status of INT60 (GPIOBNK6)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 27. " IRQ[59] ,Interrupt status of INT59 (GPIOBNK5)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 26. " IRQ[58] ,Interrupt status of INT58 (GPIOBNK4)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 25. " IRQ[57] ,Interrupt status of INT57 (GPIOBNK3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 24. " IRQ[56] ,Interrupt status of INT56 (GPIOBNK2)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 23. " IRQ[55] ,Interrupt status of INT55 (GPIOBNK1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 22. " IRQ[54] ,Interrupt status of INT54 (GPIOBNK0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 21. " IRQ[53] ,Interrupt status of INT53 (GPIO9)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 20. " IRQ[52] ,Interrupt status of INT52 (GPIO8)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 19. " IRQ[51] ,Interrupt status of INT51 (GPIO7)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 18. " IRQ[50] ,Interrupt status of INT50 (GPIO6)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 17. " IRQ[49] ,Interrupt status of INT49 (GPIO5)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 16. " IRQ[48] ,Interrupt status of INT48 (GPIO4)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 15. " IRQ[47] ,Interrupt status of INT47 (GPIO3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 14. " IRQ[46] ,Interrupt status of INT46 (GPIO2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 13. " IRQ[45] ,Interrupt status of INT45 (GPIO1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 12. " IRQ[44] ,Interrupt status of INT44 (GPIO0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 11. " IRQ[43] ,Interrupt status of INT43 (SPINT0-1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 10. " IRQ[42] ,Interrupt status of INT42 (SPINT0-0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 9. " IRQ[41] ,Interrupt status of INT41 (UARTINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 8. " IRQ[40] ,Interrupt status of INT40 (UARTINT0)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 7. " IRQ[39] ,Interrupt status of INT39 (I2CINT)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 6. " IRQ[38] ,Interrupt status of INT38 (PWMINT2)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 5. " IRQ[37] ,Interrupt status of INT37 (PWMINT1)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 4. " IRQ[36] ,Interrupt status of INT36 (PWMINT0)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 3. " IRQ[35] ,Interrupt status of INT35 (TINT3)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 2. " IRQ[34] ,Interrupt status of INT34 (TINT2)" "Occurred,Not occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " IRQ[33] ,Interrupt status of INT33 (TINT1)" "Occurred,Not occurred"
|
|
bitfld.long 0x04 0. " IRQ[32] ,Interrupt status of INT32 (TINT0)" "Occurred,Not occurred"
|
|
rgroup.long 0x10++0x7
|
|
line.long 0x00 "FIQENTRY,Fast Interrupt Request Entry Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " FIQENTRY ,Interrupt entry table address of the current highest-priority fast interrupt request"
|
|
line.long 0x04 "IRQENTRY,Interrupt Request Entry Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " IRQENTRY ,Interrupt entry table address of the current highest-priority interrupt request"
|
|
group.long 0x18++0x7
|
|
line.long 0x00 "EINT0,Interrupt Enable Register 0"
|
|
bitfld.long 0x00 31. " EINT[31] ,Interrupt enable for INT31 (SDIOINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " EINT[30] ,Interrupt enable for INT30 (AEMIFINT)" "Disabled,Enabled"
|
|
bitfld.long 0x00 29. " EINT[29] ,Interrupt enable for INT29 (DDRINT)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " EINT[28] ,Interrupt enable for INT28 (PWMINT3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " EINT[27] ,Interrupt enable for INT27 (MMCINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " EINT[26] ,Interrupt enable for INT26 (MMCINT0)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EINT[25] ,Interrupt enable for INT25 (MBRINT0/MBRINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " EINT[24] ,Interrupt enable for INT24 (MBXINT0/MBXINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " EINT[23] ,Interrupt enable for INT23 (SDIOINT0)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " EINT[22] ,Interrupt enable for INT22 (TINT7)" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " EINT[21] ,Interrupt enable for INT21 (SPINT2-1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " EINT[20] ,Interrupt enable for INT20 (PSCINT)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EINT[19] ,Interrupt enable for INT19 (SPINT2-0/TCERRINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EINT[18] ,Interrupt enable for INT18 ((SPINT1-1/TCERRINT0))" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " EINT[17] ,Interrupt enable for INT17 (SPINT1-0/CCERRINT)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " EINT[16] ,Interrupt enable for INT16 (CCINT0)" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " EINT[15] ,Interrupt enable for INT15 (TINT6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " EINT[14] ,Interrupt enable for INT14 ((UARTINT2/TINT5))" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " EINT[13] ,Interrupt enable for INT13 (RTOINT/TINT4)" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " EINT[12] ,Interrupt enable for INT12 (USBINT)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " EINT[8] ,Interrupt enable for INT8 (VPSSINT8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " EINT[7] ,Interrupt enable for INT7 (VPSSINT7)" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EINT[6] ,Interrupt enable for INT6 (VPSSINT6)" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EINT[5] ,Interrupt enable for INT5 (VPSSINT5)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT[4] ,Interrupt enable for INT4 (VPSSINT4)" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " EINT[3] ,Interrupt enable for INT3 (VPSSINT3)" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " EINT[2] ,Interrupt enable for INT2 (VPSSINT2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT[1] ,Interrupt enable for INT1 (VPSSINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " EINT[0] ,Interrupt enable for INT0 (VPSSINT0)" "Disabled,Enabled"
|
|
line.long 0x04 "EINT1,Interrupt Enable Register 1"
|
|
bitfld.long 0x04 31. " EINT[63] ,Interrupt enable for INT63 (EMUINT)" "Disabled,Enabled"
|
|
bitfld.long 0x04 30. " EINT[62] ,Interrupt enable for INT62 (COMMRX)" "Disabled,Enabled"
|
|
bitfld.long 0x04 29. " EINT[61] ,Interrupt enable for INT61 (COMMTX)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 28. " EINT[60] ,Interrupt enable for INT60 (GPIOBNK6)" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " EINT[59] ,Interrupt enable for INT59 (GPIOBNK5)" "Disabled,Enabled"
|
|
bitfld.long 0x04 26. " EINT[58] ,Interrupt enable for INT58 (GPIOBNK4)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 25. " EINT[57] ,Interrupt enable for INT57 (GPIOBNK3)" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " EINT[56] ,Interrupt enable for INT56 (GPIOBNK2)" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " EINT[55] ,Interrupt enable for INT55 (GPIOBNK1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 22. " EINT[54] ,Interrupt enable for INT54 (GPIOBNK0)" "Disabled,Enabled"
|
|
bitfld.long 0x04 21. " EINT[53] ,Interrupt enable for INT53 (GPIO9)" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " EINT[52] ,Interrupt enable for INT52 (GPIO8)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 19. " EINT[51] ,Interrupt enable for INT51 (GPIO7)" "Disabled,Enabled"
|
|
bitfld.long 0x04 18. " EINT[50] ,Interrupt enable for INT50 (GPIO6)" "Disabled,Enabled"
|
|
bitfld.long 0x04 17. " EINT[49] ,Interrupt enable for INT49 (GPIO5)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 16. " EINT[48] ,Interrupt enable for INT48 (GPIO4)" "Disabled,Enabled"
|
|
bitfld.long 0x04 15. " EINT[47] ,Interrupt enable for INT47 (GPIO3)" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " EINT[46] ,Interrupt enable for INT46 (GPIO2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " EINT[45] ,Interrupt enable for INT45 (GPIO1)" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " EINT[44] ,Interrupt enable for INT44 (GPIO0)" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " EINT[43] ,Interrupt enable for INT43 (SPINT0-1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " EINT[42] ,Interrupt enable for INT42 (SPINT0-0)" "Disabled,Enabled"
|
|
bitfld.long 0x04 9. " EINT[41] ,Interrupt enable for INT41 (UARTINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " EINT[40] ,Interrupt enable for INT40 (UARTINT0)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " EINT[39] ,Interrupt enable for INT39 (I2CINT)" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " EINT[38] ,Interrupt enable for INT38 (PWMINT2)" "Disabled,Enabled"
|
|
bitfld.long 0x04 5. " EINT[37] ,Interrupt enable for INT37 (PWMINT1)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 4. " EINT[36] ,Interrupt enable for INT36 (PWMINT0)" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " EINT[35] ,Interrupt enable for INT35 (TINT3)" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " EINT[34] ,Interrupt enable for INT34 (TINT2)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " EINT[33] ,Interrupt enable for INT33 (TINT1)" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " EINT[32] ,Interrupt enable for INT32 (TINT0)" "Disabled,Enabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "INTCTL,Interrupt Operation Control Register"
|
|
bitfld.long 0x00 2. " IDMODE ,Interrupt disable mode" "Immediately,After ACK"
|
|
bitfld.long 0x00 1. " IERAW ,Masked interrupt reflected in the IRQENTRY register" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " FERAW ,Masked interrupt reflect in FIQENTRY register" "Disabled,Enabled"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "EABASE,Interrupt Entry Table Base Address Register"
|
|
hexmask.long 0x00 3.--28. 0x8 " EABASE ,Interrupt entry table base address"
|
|
bitfld.long 0x00 0.--1. " SIZE ,Size of each entry in the interrupt entry table" "4 bytes,8 bytes,16 bytes,32 bytes"
|
|
width 9.
|
|
group.long 0x30++0x1f
|
|
line.long 0x00 "INTPRI0,Interrupt Priority Register 0"
|
|
bitfld.long 0x00 28.--30. " INT7 ,INT7 (VPSSINT7) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 24.--26. " INT6 ,INT6 (VPSSINT6) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 20.--22. " INT5 ,INT5 (VPSSINT5) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 16.--18. " INT4 ,INT4 (VPSSINT4) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 12.--14. " INT3 ,INT3 (VPSSINT3) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 8.--10. " INT2 ,INT2 (VPSSINT2) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " INT1 ,INT1 (VPSSINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " INT0 ,INT0 (VPSSINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x04 "INTPRI1,Interrupt Priority Register 1"
|
|
bitfld.long 0x04 28.--30. " INT15 ,INT15 (TINT6) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 24.--26. " INT14 ,INT14 (UARTINT2/TINT5) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 20.--22. " INT13 ,INT13 (RTOINT/TINT4) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 16.--18. " INT12 ,INT12 (USBINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x04 0.--2. " INT8 ,INT8 (VPSSINT8) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x08 "INTPRI2,Interrupt Priority Register 2"
|
|
bitfld.long 0x08 28.--30. " INT23 ,INT23 (SDIOINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 24.--26. " INT22 ,INT22 (TINT7) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 20.--22. " INT21 ,INT21 (SPINT2-1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 16.--18. " INT20 ,INT20 (PSCINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 12.--14. " INT19 ,INT19 (SPINT2-0/TCERRINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 8.--10. " INT18 ,INT18 (SPINT1-1/TCERRINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 4.--6. " INT17 ,INT17 (SPINT1-0/CCERRINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x08 0.--2. " INT16 ,INT16 (CCINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x0c "INTPRI3,Interrupt Priority Register 3"
|
|
bitfld.long 0x0c 28.--30. " INT31 ,INT31 (SDIOINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 24.--26. " INT30 ,INT30 (AEMIFINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 20.--22. " INT29 ,INT29 (DDRINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 16.--18. " INT28 ,INT28 (PWMINT3) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 12.--14. " INT27 ,INT27 (MMCINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 8.--10. " INT26 ,INT26 (MMCINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 4.--6. " INT25 ,INT25 (MBRINT0/MBRINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0c 0.--2. " INT24 ,INT24 (MBXINT0/MBXINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "INTPRI4,Interrupt Priority Register 4"
|
|
bitfld.long 0x10 28.--30. " INT39 ,INT39 (I2CINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 24.--26. " INT38 ,INT38 (PWMINT2) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 20.--22. " INT37 ,INT37 (PWMINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 16.--18. " INT36 ,INT36 (PWMINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 12.--14. " INT35 ,INT35 (TINT3) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 8.--10. " INT34 ,INT34 (TINT2) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 4.--6. " INT33 ,INT33 (TINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. " INT32 ,INT32 (TINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "INTPRI5,Interrupt Priority Register 5"
|
|
bitfld.long 0x14 28.--30. " INT47 ,INT47 (GPIO3) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 24.--26. " INT46 ,INT46 (GPIO2) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 20.--22. " INT45 ,INT45 (GPIO1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 16.--18. " INT44 ,INT44 (GPIO0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 12.--14. " INT43 ,INT43 (SPINT0-1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 8.--10. " INT42 ,INT42 (SPINT0-0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 4.--6. " INT41 ,INT41 (UARTINT1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 0.--2. " INT40 ,INT40 (UARTINT0) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "INTPRI6,Interrupt Priority Register 6"
|
|
bitfld.long 0x18 28.--30. " INT55 ,INT55 (GPIOBNK1) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 24.--26. " INT54 ,INT54 (GPIOBNK0) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 20.--22. " INT53 ,INT53 (GPIO9) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 16.--18. " INT52 ,INT52 (GPIO8) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 12.--14. " INT51 ,INT51 (GPIO7) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 8.--10. " INT50 ,INT50 (GPIO6) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 4.--6. " INT49 ,INT49 (GPIO5) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. " INT48 ,INT48 (GPIO4) priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1c "INTPRI7,Interrupt Priority Register 7"
|
|
bitfld.long 0x1c 28.--30. " INT63 ,INT63 (EMUINT) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 24.--26. " INT62 ,INT62 (COMMRX) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 20.--22. " INT61 ,INT61 (COMMTX) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 16.--18. " INT60 ,INT60 (GPIOBNK6) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 12.--14. " INT59 ,INT59 (GPIOBNK5) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 8.--10. " INT58 ,INT58 (GPIOBNK4) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 4.--6. " INT57 ,INT57 (GPIOBNK3) priority level" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1c 0.--2. " INT56 ,INT56 (GPIOBNK2) priority level" "0,1,2,3,4,5,6,7"
|
|
width 0xb
|
|
tree.end
|
|
tree "SCR (System Control Registers)"
|
|
base asd:0x01c40000
|
|
width 14.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "PINMUX0,Pin Mux 0 (Video In) Pin Mux Register"
|
|
bitfld.long 0x00 14. " PCLK ,Enable the PCLK" "GIO[82],PCLK"
|
|
bitfld.long 0x00 13. " CAM_WEN ,Enable the CAM_WEN" "GIO[83],CAM_WEN"
|
|
bitfld.long 0x00 12. " CAM_VD ,Enable the CAM_VD" "GIO[84],CAM_VD"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CAM_HD ,Enable the CAM_HD" "GIO[85],CAM_HD"
|
|
bitfld.long 0x00 10. " YIN_70 ,Enable the YIN[7:0]" "GIO[93:86],YIN[7:0]"
|
|
bitfld.long 0x00 9. " CIN_10 ,Enable the CIN[1:0]" "GIO[95:94],CIN[1:0]"
|
|
textline " "
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x00 8. " CIN_32 ,Enable the CIN[3:2]" "GIO[97:96],CIN[3:2]"
|
|
bitfld.long 0x00 6.--7. " CIN_4 ,Enable the CIN[4]" "GIO[98],CIN[4],SPI[2]_SDI,SPI[2]_SDENA[1]"
|
|
bitfld.long 0x00 4.--5. " YCIN_5 ,Enable the CIN[5]" "GIO[99],CIN[5],SPI[2]_SDENA[0],?..."
|
|
else
|
|
bitfld.long 0x00 8. " CIN_32 ,Enable the CIN[3:2]" "GIO[97:96],CIN[3:2]"
|
|
bitfld.long 0x00 6.--7. " CIN_4 ,Enable the CIN[4]" "GIO[98],CIN[4],SPI[2]_SDI,SPI[2]_SDENA[1]"
|
|
bitfld.long 0x00 4.--5. " CIN_5 ,Enable the CIN[5]" "GIO[99],CIN[5],SPI[2]_SDENA[0],?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " CIN_6 ,Enable the CIN[6]" "GIO[100],CIN[6],SPI[2]_SDO,?..."
|
|
bitfld.long 0x00 0.--1. " CIN_7 ,Enable the CIN[7]" "GIO[101],CIN[7],SPI[2]_SCLK,?..."
|
|
width 14.
|
|
line.long 0x04 "PINMUX1,Pin Mux 1 (Video Out) Pin Mux Register"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x04 22. " VCLK ,Enable VCLK" "VCLK,GIO[[68]]"
|
|
bitfld.long 0x04 20.--21. " EXTCLK ,Enable EXTCLK" "GIO[69],EXTCLK,B2,PWM3"
|
|
bitfld.long 0x04 18.--19. " FIELD ,Enable FIELD" "GIO[70],FIELD,R2,PWM3"
|
|
else
|
|
bitfld.long 0x04 22. " VCLK ,Enable VCLK" "VCLK,GIO[[68]]"
|
|
bitfld.long 0x04 20.--21. " EXTCLK ,Enable EXTCLK" "GIO[69],EXTCLK,R2,PWM3"
|
|
bitfld.long 0x04 18.--19. " FIELD ,Enable FIELD" "GIO[70],FIELD,B2,PWM3"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 17. " DLCD ,Enable DLCD Signal" "LCD_OE/BRIGHT,GIO[71]"
|
|
bitfld.long 0x04 16. " HVSYNC ,Enable HVSYNC" "HSYNC/VSYNC,GIO[73:72]"
|
|
bitfld.long 0x04 14.--15. " COUT_0 ,Enable COUT[0]" "GIO[74],COUT[0],PWM3,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--13. " COUT_1 ,Enable COUT[1]" "GIO[75],COUT[1],PWM3,?..."
|
|
bitfld.long 0x04 10.--11. " COUT_2 ,Enable COUT[2]" "GIO[76],COUT[2],PWM2,RTO3"
|
|
bitfld.long 0x04 8.--9. " COUT_3 ,Enable COUT[3]" "GIO[77],COUT[3],PWM2,RTO2"
|
|
textline " "
|
|
bitfld.long 0x04 6.--7. " COUT_4 ,Enable COUT[4]" "GIO[78],COUT[4],PWM2,RTO1"
|
|
bitfld.long 0x04 4.--5. " COUT_5 ,Enable COUT[5]" "GIO[79],COUT[5],PWM2,RTO0"
|
|
bitfld.long 0x04 2.--3. " COUT_6 ,Enable COUT[6]" "GIO[80],COUT[6],PWM1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--1. " COUT_7 ,Enable COUT[7]" "GIO[81],COUT[7],PWM0,?..."
|
|
line.long 0x08 "PINMUX2,Pin Mux 2 (AEMIF) Pin Mux Register"
|
|
sif (cpu()=="DMA335")
|
|
bitfld.long 0x08 11. " EM_CLK ,Enable EM_CLK" "EM_CLK,GIO[31]"
|
|
bitfld.long 0x08 10. " EM_ADV ,Enable EM_ADV (Address Valid Detect for OneNAND)" "EM_ADV,GIO[32]"
|
|
bitfld.long 0x08 9. " EM_WAIT ,Enable EM_WAIT" "EM_WAIT,GIO[33]"
|
|
else
|
|
bitfld.long 0x08 11. " EM_CLK ,Enable EM_CLK" "EM_CLK,GIO[31]"
|
|
bitfld.long 0x08 10. " EM_AVD ,Enable EM_AVD (Address Valid Detect for OneNAND)" "EM_AVD,GIO[32]"
|
|
bitfld.long 0x08 9. " EM_WAIT ,Enable EM_WAIT" "EM_WAIT,GIO[33]"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x08 8. " EM_WE_OE ,Enable EM_WE_OE" "EM_WE & EM_OE,GIO[35:34]"
|
|
bitfld.long 0x08 7. " EM_CE1 ,Enable EM_CE1" "EM_A0,GIO[36]"
|
|
bitfld.long 0x08 6. " EM_CE0 ,Enable EM_CE0" "EM_CE0,GIO[37]"
|
|
textline " "
|
|
bitfld.long 0x08 5. " EM_D7_0 ,Enable EM_D[7:0]" "EM_D[7:0],GIO[45:38]"
|
|
bitfld.long 0x08 4. " EM_D15_8 ,Enable EM_D[15:8]" "EM_D[15:8],GIO[53:46]"
|
|
bitfld.long 0x08 2.--3. " EM_BA0 ,Enable EM_BA0" "EM_BA0,EM_A14,GIO[54],?..."
|
|
textline " "
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x08 1. " EM_A0_BA1 ,Enable EM_A0 BA1" "EM_A0/EM_BA1,GIO[56:55]"
|
|
bitfld.long 0x08 0. " EM_A13_3 ,Enable EM_A13_3" "EM_A[13:3],GIO[64:57]"
|
|
else
|
|
bitfld.long 0x08 1. " EM_A0_BA1 ,Enable EM_A0 BA1" "EM_A0/EM_BA1,GIO[56:55]"
|
|
bitfld.long 0x08 0. " EM_A13_3 ,Enable EM_A13_3" "EM_A[13:3],GIO[67:57]"
|
|
endif
|
|
width 14.
|
|
line.long 0x0c "PINMUX3,Pin Mux 3 (GIO/Misc) Pin Mux Register"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x0C 28. " GIO7 ,Enable GIO[7]" "GIO[7],SPI0_SDENA[1]"
|
|
bitfld.long 0x0C 27. " GIO8 ,Enable GIO[8]" "GIO[8],SPI1_SDO"
|
|
bitfld.long 0x0C 25.--26. " GIO9 ,Enable GIO[9]" "GIO[9],SPI0_SDI,SPI0_SDENA[1],?..."
|
|
else
|
|
bitfld.long 0x0C 28. " GIO7 ,Enable GIO[7]" "GIO[7],SPI0_SDENA[1]"
|
|
bitfld.long 0x0C 27. " GIO8 ,Enable GIO[8]" "GIO[8],SPI1_SDO"
|
|
bitfld.long 0x0C 25.--26. " GIO9 ,Enable GIO[9]" "GIO[9],SPI1_SDI,SPI1_SDENA[1],?..."
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x0C 24. " GIO10 ,Enable GIO[10]" "GIO[10],SPI1_SCLK"
|
|
bitfld.long 0x0C 23. " GIO11 ,Enable GIO[11]" "GIO[11],SPI1_SDENA[0]"
|
|
bitfld.long 0x0C 22. " GIO12 ,Enable GIO[12]" "GIO[12],UART1_TXD"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " GIO13 ,Enable GIO[13]" "GIO[13],UART1_RXD"
|
|
bitfld.long 0x0C 20. " GIO14 ,Enable GIO[14]" "GIO[14],I2C_SCL"
|
|
bitfld.long 0x0C 19. " GIO15 ,Enable GIO[15]" "GIO[15],I2C_SDA"
|
|
textline " "
|
|
bitfld.long 0x0C 18. " GIO16 ,Enable GIO[16]" "GIO[16],CLKOUT3"
|
|
bitfld.long 0x0C 17. " GIO17 ,Enable GIO[17]" "GIO[17],CLKOUT2"
|
|
bitfld.long 0x0C 16. " GIO18 ,Enable GIO[18]" "GIO[18],CLKOUT1"
|
|
textline " "
|
|
bitfld.long 0x0C 14.--15. " GIO19 ,Enable GIO[19]" "GIO[19],SD1_DATA0,UART2_TXD,?..."
|
|
bitfld.long 0x0C 12.--13. " GIO20 ,Enable GIO[20]" "GIO[20],SD1_DATA1,UART2_RXD,?..."
|
|
bitfld.long 0x0C 10.--11. " GIO21 ,Enable GIO[21]" "GIO[21],SD1_DATA2,UART2_CTS,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 8.--9. " GIO22 ,Enable GIO[22]" "GIO[22],SD1_DATA3,UART2_RTS,?..."
|
|
bitfld.long 0x0C 7. " GIO23 ,Enable GIO[23]" "GIO[23],SD1_CMD"
|
|
bitfld.long 0x0C 6. " GIO24 ,Enable GIO[24]" "GIO[24],SD1_CLK"
|
|
textline " "
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x0C 5. " GIO25 ,Enable GIO[25]" "GIO[25],ASP0_FSR"
|
|
bitfld.long 0x0C 4. " GIO26 ,Enable GIO[26]" "GIO[26],ASP0_CLKR"
|
|
bitfld.long 0x0C 3. " GIO27 ,Enable GIO[27]" "GIO[27],ASP0_DR"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " GIO28 ,Enable GIO[28]" "GIO[28],ASP0_FSX"
|
|
bitfld.long 0x0C 1. " GIO29 ,Enable GIO[29]" "GIO[29],ASP0_CLKX"
|
|
bitfld.long 0x0C 0. " GIO30 ,Enable GIO[30]" "GIO[30],ASP0_DX"
|
|
else
|
|
bitfld.long 0x0C 5. " GIO25 ,Enable GIO[25]" "GIO[25],ASP0_BFSR"
|
|
bitfld.long 0x0C 4. " GIO26 ,Enable GIO[26]" "GIO[26],ASP0_R"
|
|
bitfld.long 0x0C 3. " GIO27 ,Enable GIO[27]" "GIO[27],ASP0_BDR"
|
|
textline " "
|
|
bitfld.long 0x0C 2. " GIO28 ,Enable GIO[28]" "GIO[28],ASP0_BFSX"
|
|
bitfld.long 0x0C 1. " GIO29 ,Enable GIO[29]" "GIO[29],ASP0_X"
|
|
bitfld.long 0x0C 0. " GIO30 ,Enable GIO[30]" "GIO[30],ASP0_BDX"
|
|
endif
|
|
width 14.
|
|
line.long 0x10 "PINMUX4,Pin Mux 4 (Misc) Pin Mux Register"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x10 2. " MMCSD0_MS ,Enable MMCSD0_MS" "MMC/SD[0],?..."
|
|
bitfld.long 0x10 1. " SPIO_SDI ,Enable SPI0_SD" "SPI0_SDI,GIO[32]"
|
|
else
|
|
bitfld.long 0x10 2. " MMCSD0_MS ,Enable MMCSD0_MS" "MMC/SD[0],MS"
|
|
bitfld.long 0x10 1. " SPIO_SDI ,Enable SPI0_SD" "SPI0_SDI,GIO[32]"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x10 0. " SPI0_SDENA ,Enable SPI0_SDENA0" "SPI0_SDENA[0],GIO[103]"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "BOOTCFG,Boot Configuration"
|
|
bitfld.long 0x00 8. " GIO0_RESET ,GIO0 Value Sampled at Reset" "Low,High"
|
|
bitfld.long 0x00 6.--7. " BTSEL ,Configuration at boot of BTSEL[1:0] pins" "NAND Flash,OneNAND,SD0,UART0"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AECFG[3] ,AEMIF Data Bus width" "16 bits,8 bits"
|
|
bitfld.long 0x00 1.--2. " AECFG[2:1] ,Configuration of EM_AN pin" "BA0,A[14],GIO[54],?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " AECFG[0] ,AEMIF Address" "A[13:3] and A[0],BA1"
|
|
group.long 0x18++0x7
|
|
line.long 0x00 "ARM_INTMUX,ARM Interrupt Mux Control Register"
|
|
bitfld.long 0x00 7. " INT20 ,Interrupt 20" "PSC,?..."
|
|
bitfld.long 0x00 6. " INT25 ,Interrupt 25" "ASP0 RINT,ASP1 RINT"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INT24 ,Interrupt 24" "ASP0 XINT,ASP1 XINT"
|
|
bitfld.long 0x00 4. " INT19 ,Interrupt 19" "SPINT2_0,EDMA TC1 Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT18 ,Interrupt 18" "SPINT1_1,EDMA TC0 Error"
|
|
bitfld.long 0x00 2. " INT17 ,Interrupt 17" "SPI1 INT0,EDMA CC Error"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT14 ,Interrupt 14" "UART2,TIMER2:TINT5"
|
|
bitfld.long 0x00 0. " INT13 ,Interrupt 13" "RTO,TIMER2:TINT4"
|
|
line.long 0x04 "EDMA_EVTMUX,EDMA Event Mux Control Register"
|
|
sif (cpu()=="DM335")
|
|
bitfld.long 0x04 2. " EVT26 ,Event Mux Control 26" "MMC/SD[0] Receive,?..."
|
|
bitfld.long 0x04 1. " EVT9 ,Event Mux Control 9" "ASP1 Receive,TIMER2:TINT5"
|
|
else
|
|
bitfld.long 0x04 2. " EVT26 ,Event Mux Control 26" "MMC/SD[0] Receive,MS"
|
|
bitfld.long 0x04 1. " EVT9 ,Event Mux Control 9" "ASP1 Receive,TIMER2:TINT5"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x04 0. " EVT8 ,Event Mux Control 8" "ASP1 Transmit,TIMER2:TINT4"
|
|
rgroup.long 0x20++0xb
|
|
line.long 0x00 "DDR_SLEW,DDR Slew"
|
|
bitfld.long 0x00 2.--3. " DDRDATA_SLEW ,DDR data slew programmed in eFuse" "0,1,2,3"
|
|
bitfld.long 0x00 0.--1. " DDRCMD_SLEW ,DDR command slew programmed in eFuse" "0,1,2,3"
|
|
line.long 0x04 "CLKOUT,CLKOUT Divisor / Output Control"
|
|
bitfld.long 0x04 2. " CRYS_DIV8 ,CLKOUT3 Enable (CLKOUT3 is crystal frequency (reference clock) dvidied by 8)" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " CRYS_DIV3 ,CLKOUT2 Enable (CLKOUT2 is crystal frequency (reference clock) dvidied by 3)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " CRYS_DIV1 ,CLKOUT1 Enable (CLKOUT1 is crystal frequency (reference clock) dvidied by 1)" "Disabled,Enabled"
|
|
line.long 0x08 "DEVICE_ID,Device ID"
|
|
hexmask.long.byte 0x08 28.--31. 1. " DEVREV ,Device Revision"
|
|
hexmask.long.word 0x08 12.--27. 1. " PARTNUM ,Device Part Number (Unique JTAG ID)"
|
|
textline " "
|
|
hexmask.long.word 0x08 1.--11. 1. " MFGR ,Manufacturer's JTAG ID Texas Instruments' Mfg ID"
|
|
group.long 0x2c++0x1f
|
|
line.long 0x00 "VDAC_CONFIG,Video Dac Configuration"
|
|
bitfld.long 0x00 26.--29. " TRESB4R4 ,Resistance trimming control bit for VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 22.--25. " TRESB4R2 ,Resistance trimming control bit for VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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bitfld.long 0x00 18.--21. " TRESB4R1 ,Resistance trimming control bit for VREF" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hexmask.long.byte 0x00 11.--17. 1. " TRIMBITS ,PNP transistor trimming control bit for VREF"
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textline " "
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bitfld.long 0x00 10. " PWD_BGZ ,Power Down of VREFF" "Power down,Power Up"
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bitfld.long 0x00 9. " SPEED ,Faster operation of VREF transfer" "Normal,Faster"
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textline " "
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bitfld.long 0x00 8. " TVINT ,TV cable connect status from DAC" "Connected,Disconnected"
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bitfld.long 0x00 7. " PWD_VBUFZ ,Power down of video buffer" "Power Down,Power UP"
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textline " "
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bitfld.long 0x00 4.--6. " VREFSET ,VREF setting to video buffer" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 3. " ACCUP_EN ,AC capacitor coupling externally to video buffer" "Disabled,Enabled"
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bitfld.long 0x00 2. " DINV ,Data invert from VENC (inside the DAC)" "No inversion,Inversion"
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line.long 0x04 "TIMER64_CTL,Timer64+ Input Control"
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bitfld.long 0x04 1. " GIO3_4 ,Input" "GIO3,GIO4"
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bitfld.long 0x04 0. " GIO1_2 ,Input" "GIO1,GIO2"
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line.long 0x08 "USB_PHY_CTRL,USB PHY Control"
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bitfld.long 0x08 11. " DATAPOL ,USB PHY data polority inviersion" "No inversion,Inversion"
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bitfld.long 0x08 9.--10. " PHYCLKSRC ,USB HY input clock source" "24MHz,12MHz,PLLC1.sysclk3,?..."
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textline " "
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bitfld.long 0x08 8. " PHYCLKGD ,USB PHY Power/Clock Good" "Not ramped/not locked,Good/locked"
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bitfld.long 0x08 7. " SESNDEN ,Session End Comparator enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x08 6. " VBDTCTEN ,Vbus comparator enable" "Disabled,Enabled"
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bitfld.long 0x08 5. " VBUSENS ,OTG analog block VBUSSENSE output status" "Not present(<0.5V),Present(>0.5V)"
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textline " "
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bitfld.long 0x08 4. " PHYPLLON ,USB PHY PLL suspend override" "Normal,Override"
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bitfld.long 0x08 2. " VPSS_OSCPDWN ,VPSS oscillator power down control" "Powered,Power off"
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textline " "
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bitfld.long 0x08 1. " OTGPDWN ,USB OTG analog block power down control" "Powered,Power off"
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bitfld.long 0x08 0. " PHYPDWN ,USB PHY power down control" "Powered,Power off"
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line.long 0x0c "MISC,Miscellaneous Control"
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bitfld.long 0x0C 4. " TIMER2_WDT ,TIMER2 Definition" "Normal,WDT"
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bitfld.long 0x0C 2.--3. " DEV_SPEED ,Device speed grade eFuse status" "0,1,2,3"
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textline " "
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bitfld.long 0x0C 1. " PLL1_POSTDIV ,PLL1 post-divider selection" "Equal to 1,Equal to 2"
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bitfld.long 0x0C 0. " AIM_WAIST ,ARM Internal Memory Wait States" "1 state,No wait"
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line.long 0x10 "MSTPRI0,Master Priorities 0"
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bitfld.long 0x10 4.--6. " ARM_CFGP ,ARM CFG bus priority" "0,1,2,3,4,5,6,7"
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bitfld.long 0x10 0.--2. " ARM_DMAP ,ARM DMA priority" "0,1,2,3,4,5,6,7"
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line.long 0x14 "MSTPRI1,Master Priorities 1"
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bitfld.long 0x14 8.--10. " USBP ,USB bus priority" "0,1,2,3,4,5,6,7"
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width 14.
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line.long 0x18 "VPSS_CLK_CTRL,VPSS Clock Mux Control"
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bitfld.long 0x18 5.--6. " VENC_CLK_SRC ,27MHz Input Source" "PLL1/SYSCLK3,External/MXI2/MXO2,External/MXI1/MXO1,?..."
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bitfld.long 0x18 4. " DACCLKEN ,Enable Video DAC clock" "Disabled,Enabled"
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textline " "
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sif (cpu()=="DM335")
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bitfld.long 0x18 3. " VENCLKEN ,Enable Video Encoder clock" "Disabled,Enabled"
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else
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bitfld.long 0x18 3. " VENCLKEN ,Enable VPBE/Video Encoder clock" "Disabled,Enabled"
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endif
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bitfld.long 0x18 2. " PCLK_INV ,Invert VPFE pixel clock" "Normal,Inverted"
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textline " "
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bitfld.long 0x18 0.--1. " VPSS_MUXSEL ,VPSS clock selection" "PLL1 SYSCLK3/MXI2/MXI1,Reserved,External VPBE,Pxiel clock VPFE/PCLK pin"
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width 14.
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line.long 0x1c "DEEPSLEEP,Deep Sleep Mode Configuration"
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bitfld.long 0x1c 31. " SLEEPENABLE ,Enable Deep Sleep Mode" "Disabled,Enabled"
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bitfld.long 0x1c 30. " SLEEPCOMPLETE ,Deep Sleep Wakeup Completed" "Normal/still asleep,After DSM"
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textline " "
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hexmask.long.word 0x1c 4.--15. 1. " COUNT ,Wakeup Delay Counter"
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bitfld.long 0x1c 2. " DRVVBUS_FORCE ,USB_DRVVBUS Force Value" "Low,High"
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textline " "
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bitfld.long 0x1c 1. " DRVVBUS_OVERRIDE ,USB_DRVVBUS Override" "Normal,Override"
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group.long 0x50++0x1f
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line.long 0x0 "DEBOUNCE0,De-bounce for GIO[0] Input"
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bitfld.long 0x0 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x0 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x4 "DEBOUNCE1,De-bounce for GIO[1] Input"
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bitfld.long 0x4 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x4 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x8 "DEBOUNCE2,De-bounce for GIO[2] Input"
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bitfld.long 0x8 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x8 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0xC "DEBOUNCE3,De-bounce for GIO[3] Input"
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bitfld.long 0xC 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0xC 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x10 "DEBOUNCE4,De-bounce for GIO[4] Input"
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bitfld.long 0x10 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x10 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x14 "DEBOUNCE5,De-bounce for GIO[5] Input"
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bitfld.long 0x14 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x14 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x18 "DEBOUNCE6,De-bounce for GIO[6] Input"
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bitfld.long 0x18 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x18 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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line.long 0x1C "DEBOUNCE7,De-bounce for GIO[7] Input"
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bitfld.long 0x1C 31. " ENABLE ,Debounce Enable" "Enabled,Disabled"
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hexmask.long.tbyte 0x1C 0.--20. 1. " INTERVAL ,Interval count for the debounce circuit"
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width 14.
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group.long 0x70++0x3
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line.long 0x00 "VTPIOCR,VTP IO Control Register"
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bitfld.long 0x00 15. " READY ,VTP Ready Status" "Not ready,Ready"
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bitfld.long 0x00 14. " VTPIOREADY ,VTP IO Ready" "Not ready,Ready"
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bitfld.long 0x00 13. " CLR ,VTP Clear" "Cleared,Not cleared"
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textline " "
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bitfld.long 0x00 8. " PWRSAVE ,VTP Power Save Mode" "Disabled,Enabled"
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bitfld.long 0x00 7. " LOCK ,VTP Impedance Lock" "Unlocked,Locked"
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bitfld.long 0x00 6. " PWRDN ,VTP Power Down" "Disabled,Enabled"
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width 0xb
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tree.end
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textline " "
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