10745 lines
788 KiB
Plaintext
10745 lines
788 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: TLE987*QX On-Chip Peripherals
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; @Props: Released
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; @Author: WWE, AST
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; @Changelog: 2016-11-22 WWE
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; @Manufacturer: INFINEON - Infineon Technologies AG
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; @Doc: Infineon-Infineon-TLE9879QXA40-UM-v01_00-EN.pdf (Rev. 1.0 2015-06-02)
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; @Core: Cortex-M3
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; @Chip: TLE9871QXA20, TLE9877QXA20, TLE9877QXA40, TLE9879QXA20, TLE9879QXA40
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; @Copyright: (C) 1989-2016 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pertle987x.per 17736 2024-04-08 09:26:07Z kwisniewski $
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; Known problems
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; Module Register Description
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; --------------------------------------------------------------------------------
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; SCU-DM SCU_SCON2 TI RI must not be included as offset would be negative
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; INTE SCON1 Missing offset in documentation
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; INTE SCON2 Missing offset in documentation
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tree.close "Core Registers (Cortex-M3)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 11.
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group 0x10--0x1b
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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;group 0x14++0x03
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line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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;group 0x18++0x03
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line.long 0x08 "SYST_CVR,SysTick Current Value Register"
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hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value"
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rgroup 0x1c++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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textline " "
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rgroup 0xd00++0x03
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line.long 0x00 "CPUID,CPU ID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
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bitfld.long 0x00 20.--23. " VARIANT ,Implementation Defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x00 16.--19. " CONSTANT ,Constant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Number of Processor"
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bitfld.long 0x00 0.--3. " REVISION ,Implementation Defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd04--0xd17
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line.long 0x00 "ICSR,Interrupt Control State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set"
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bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set"
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bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared"
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textline " "
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bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set"
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bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared"
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bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
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textline " "
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bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending"
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hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field"
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bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
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textline " "
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field"
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;group 0xd08++0x03
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line.long 0x04 "VTOR,Vector Table Offset Register"
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bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM"
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hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field"
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;group 0xd0c++0x03
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
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rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all"
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bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset"
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;group 0xd10++0x03
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line.long 0x0c "SCR,System Control Register"
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bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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textline " "
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bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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;group 0xd14++0x03
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line.long 0x10 "CCR,Configuration Control Register"
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bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte"
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bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
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bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
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group 0xd18--0xd23
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line.long 0x00 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x04 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x08 "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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group 0xd24++0x3
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line.long 0x00 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled"
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bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced"
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bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced"
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textline " "
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bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
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bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
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bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
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bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
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bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
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textline " "
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bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
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group 0xd28--0xd3b
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line.byte 0x0 "MMFSR,Memory Manage Fault Status Register"
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bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error"
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bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error"
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textline " "
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bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error"
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bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error"
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;group 0xd29++0x00
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid"
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bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error"
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bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error"
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textline " "
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error"
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bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error"
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bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error"
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;group 0xd2a++0x01
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line.word 0x02 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error"
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bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error"
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bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error"
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textline " "
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bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error"
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bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error"
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;group 0xd2c++0x03
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line.long 0x04 "HFSR,Hard Fault Status Register"
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bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error"
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bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error"
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bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error"
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;group 0xd30++0x03
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line.long 0x08 "DFSR,Debug Fault Status Register"
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bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted"
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bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
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bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched"
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textline " "
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bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed"
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bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested"
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;group 0xd34++0x03
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line.long 0xc "MMFAR,Memory Manage Fault Address Register"
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;group 0xd38++0x03
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line.long 0x10 "BFAR,Bus Fault Address Register"
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wgroup 0xf00++0x03
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line.long 0x00 "STIR,Software Trigger Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Feature Registers"
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width 10.
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rgroup.long 0xD40++0x0B
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line.long 0x00 "ID_PFR0,Processor Feature Register 0"
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bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
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bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
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line.long 0x04 "ID_PFR1,Processor Feature Register 1"
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bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
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line.long 0x08 "ID_DFR0,Debug Feature Register 0"
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bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
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hgroup.long 0xD4C++0x03
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hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
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rgroup.long 0xD50++0x03
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line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
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bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
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bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
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bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
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textline " "
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bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
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bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
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hgroup.long 0xD54++0x03
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hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
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rgroup.long 0xD58++0x03
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line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
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bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
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rgroup.long 0xD60++0x13
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line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
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bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
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bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
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bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
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textline " "
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bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
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bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
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bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
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line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
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bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
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bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
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bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
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textline " "
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bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
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line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
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bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
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bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
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bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
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textline " "
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bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
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bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
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bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
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textline " "
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bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
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line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
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bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
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bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
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bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
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textline " "
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bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
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bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
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textline " "
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bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
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line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
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bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
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bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
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bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
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textline " "
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bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
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bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
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bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
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tree.end
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tree "CoreSight Identification Registers"
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width 6.
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rgroup.long 0xFE0++0x0F
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line.long 0x00 "PID0,Peripheral ID0"
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hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
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line.long 0x04 "PID1,Peripheral ID1"
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hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
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hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
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line.long 0x08 "PID2,Peripheral ID2"
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hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
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bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001)
|
|
group 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step"
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
wgroup 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..."
|
|
group 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group 0x00--0x27
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field"
|
|
;group 0x08++0x03
|
|
line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address"
|
|
bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID0"
|
|
line.long 0x14 "PID1,Peripheral ID1"
|
|
line.long 0x18 "PID2,Peripheral ID2"
|
|
line.long 0x1c "PID3,Peripheral ID3"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group 0x00--0x1B
|
|
line.long 0x00 "DWT_CTRL,DWT Control Register"
|
|
bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10"
|
|
bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled"
|
|
;group 0x04++0x03
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
;group 0x08++0x03
|
|
line.long 0x08 "DWT_CPICNT,DWT CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
;group 0x0c++0x03
|
|
line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
;group 0x10++0x03
|
|
line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
;group 0x14++0x03
|
|
line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
;group 0x18++0x03
|
|
line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
group.long 0x40++0x03
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
group.long 0x50++0x03
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x44++0x03
|
|
line.long 0x00 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x54++0x03
|
|
line.long 0x00 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00)
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00)
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x48++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00)
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
else
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res"
|
|
bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set"
|
|
bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..."
|
|
endif
|
|
tree "Coresight Management Registers"
|
|
rgroup 0xfd0--0xfff
|
|
line.long 0x00 "PID4,Peripheral ID4"
|
|
line.long 0x04 "PID5,Peripheral ID5"
|
|
line.long 0x08 "PID6,Peripheral ID6"
|
|
line.long 0x0c "PID7,Peripheral ID7"
|
|
line.long 0x10 "PID0,Peripheral ID1"
|
|
line.long 0x14 "PID1,Peripheral ID2"
|
|
line.long 0x18 "PID2,Peripheral ID3"
|
|
line.long 0x1c "PID3,Peripheral ID4"
|
|
line.long 0x20 "CID0,Component ID0"
|
|
line.long 0x24 "CID1,Component ID1"
|
|
line.long 0x28 "CID2,Component ID2"
|
|
line.long 0x2c "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
config 16. 8.
|
|
tree "PMU (Power Managment Unit)"
|
|
base ad:0x50004000
|
|
width 26.
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "PMU_SUPPLY_STS,Voltage Reg Status Register"
|
|
bitfld.byte 0x00 6. " PMU_5V_FAIL_EN ,Enabling of VDDP status information as interrupt source" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 5. " PMU_5V_OVERLOAD ,Overload at VDDP regulator" "No overload,Overload"
|
|
textline " "
|
|
rbitfld.byte 0x00 4. " PMU_5V_OVERVOLT ,Overvoltage at VDDP regulator" "No overvoltage,Overvoltage"
|
|
bitfld.byte 0x00 2. " PMU_1V5_FAIL_EN ,Enabling of VDDC status information as interrupt source" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.byte 0x00 1. " PMU_1V5_OVERLOAD ,Overload at VDDC regulator" "No overload,Overload"
|
|
rbitfld.byte 0x00 0. " PMU_1V5_OVERVOLT ,Overvoltage at VDDC regulator" "No overvoltage,Overvoltage"
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "PMU_VDDEXT_CTRL,VDDEXT Control"
|
|
rbitfld.byte 0x00 7. " STABLE ,VDDEXT Supply works inside its specified range 1" "Not stable,Stable"
|
|
rbitfld.byte 0x00 6. " OK ,VDDEXT Supply works inside its specified range 2" "No,Yes"
|
|
textline " "
|
|
rbitfld.byte 0x00 5. " OVERLOAD ,VDDEXT Supply Overload" "No overload,Overload"
|
|
rbitfld.byte 0x00 4. " OVERVOLT ,VDDEXT Supply Overvoltage" "No overvoltage,Overvoltage"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SHORT ,VDDEXT Supply Shorted Output" "No,Yes"
|
|
bitfld.byte 0x00 2. " FAIL_EN ,Enabling of VDDEXT Supply status information as interrupt source" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CYC_EN ,VDDEXT Supply for Cyclic Sense Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " ENABLE ,VDDEXT Supply Enable" "Disabled,Enabled"
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "PMU_SYS_FAIL_STS,System Fail Status Register"
|
|
bitfld.byte 0x00 6. " WDT1_SEQ_FAIL ,External Watchdog (WDT1) Sequential Fail" "No fail,Fail"
|
|
bitfld.byte 0x00 5. " SYS_OT ,System Overtemperature Indication Flag" "No overtemperature,Overtemperature"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PMU_5V_OVL ,VDDP Overload Flag" "No overload,Overload"
|
|
bitfld.byte 0x00 2. " PMU_1V5_OVL ,VDDC Overload Flag" "No overload,Overload"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SUPP_TMOUT ,Supply Time Out" "No fail,Fail"
|
|
bitfld.byte 0x00 0. " SUPP_SHORT ,Supply Short" "Ok,Short"
|
|
group.byte 0x80++0x00
|
|
line.byte 0x00 "PMU_WAKE_STS_FAIL,Wake Status Fail Register"
|
|
bitfld.byte 0x00 2. " VDDEXTSHORT ,Stop-Exit due to short circuit at the VDDEXT Supply" "No short circuit,Short circuit"
|
|
bitfld.byte 0x00 0. " SUPPFAIL ,Stop-Exit due to overvoltage at the VDDEXT Supply" "No overvoltage,Suspend enabled"
|
|
group.byte 0xD8++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO0_RISE,Wake Configuration GPIO Port 0 Rising Edge Register"
|
|
bitfld.byte 0x00 4. " GPIO0_RI_4 ,Port 0_4 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO0_RI_3 ,Port 0_3 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO0_RI_2 ,Port 0_2 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO0_RI_1 ,Port 0_1 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO0_RI_0 ,Port 0_0 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
group.byte 0xDC++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO0_FALL,Wake Configuration GPIO Port 0 Falling Edge Register"
|
|
bitfld.byte 0x00 4. " GPIO0_FA_4 ,Port 0_4 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO0_FA_3 ,Port 0_3 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO0_FA_2 ,Port 0_2 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO0_FA_1 ,Port 0_1 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO0_FA_0 ,Port 0_0 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
group.byte 0xE0++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO0_CYC,Wake Port 0 Cycle Enabled Register"
|
|
bitfld.byte 0x00 4. " GPIO0_CYC_4 ,GPIO0_4 input for cycle sense enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO0_CYC_3 ,GPIO0_3 input for cycle sense enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO0_CYC_2 ,GPIO0_2 input for cycle sense enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO0_CYC_1 ,GPIO0_1 input for cycle sense enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO0_CYC_0 ,GPIO0_0 input for cycle sense enable" "Disabled,Enabled"
|
|
group.byte 0xE4++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO1_RISE,Wake Configuration GPIO Port 1 Rising Edge Register"
|
|
bitfld.byte 0x00 4. " GPIO1_RI_4 ,Port 1_4 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO1_RI_3 ,Port 1_3 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO1_RI_2 ,Port 1_2 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO1_RI_1 ,Port 1_1 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO1_RI_0 ,Port 1_0 Wake-Up on Rising Edge enable" "Disabled,Enabled"
|
|
group.byte 0xE8++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO1_FALL,Wake Configuration GPIO Port 0 Falling Edge Register"
|
|
bitfld.byte 0x00 4. " GPIO1_FA_4 ,Port 1_4 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO1_FA_3 ,Port 1_3 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO1_FA_2 ,Port 1_2 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO1_FA_1 ,Port 1_1 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO1_FA_0 ,Port 1_0 Wake-Up on Falling Edge enable" "Disabled,Enabled"
|
|
group.byte 0xEC++0x00
|
|
line.byte 0x00 "PMU_WAKE_CONF_GPIO0_CYC,Wake Port 0 Cycle Enabled Register"
|
|
bitfld.byte 0x00 4. " GPIO1_CYC_4 ,GPIO1_4 input for cycle sense enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " GPIO1_CYC_3 ,GPIO1_3 input for cycle sense enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " GPIO1_CYC_2 ,GPIO1_2 input for cycle sense enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " GPIO1_CYC_1 ,GPIO1_1 input for cycle sense enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPIO1_CYC_0 ,GPIO1_0 input for cycle sense enable" "Disabled,Enabled"
|
|
group.byte 0xAC++0x00
|
|
line.byte 0x00 "PMU_CNF_WAKE_FILTER,PMU Wake-Up Timing Register"
|
|
bitfld.byte 0x00 2.--3. " CNF_GPIO_FT ,Wake-Up Filter time for General Purpose IO" "10us,20us,40us,5us"
|
|
bitfld.byte 0x00 1. " CNF_MON_FT ,Wake-Up Filter time for Monitoring Inputs" "20us,40us"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " CNF_LIN_FT ,Wake-Up Filter time for LIN WAKE" "30us,50us"
|
|
group.byte 0x50++0x00
|
|
line.byte 0x00 "PMU_LIN_WAKE_EN,LIN Wake Enable"
|
|
bitfld.byte 0x00 7. " LIN_EN ,Lin Wake enable" "Disabled,Enabled"
|
|
hgroup.byte 0x00++0x00
|
|
hide.byte 0x00 "PMU_WAKE_STATUS,Main wake status register"
|
|
in
|
|
hgroup.byte 0x84++0x00
|
|
hide.byte 0x00 "PMU_WAKE_STS_MON,Wake Source MON Input Register"
|
|
in
|
|
hgroup.byte 0x88++0x00
|
|
hide.byte 0x00 "PMU_WAKE_STS_GPIO0,Wake Status GPIO 0 Register"
|
|
in
|
|
hgroup.byte 0x8C++0x00
|
|
hide.byte 0x00 "PMU_WAKE_STS_GPIO1,Wake Status GPIO 1 Register"
|
|
in
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "PMU_CNF_PMU_SETTINGS,PMU Settings Register"
|
|
bitfld.byte 0x00 7. " EN_VDDEXT_OC_OFF_N ,Disabling VDDEXT Shutdown in Overload Condition" "No,Yes"
|
|
bitfld.byte 0x00 3. " CYC_SENSE_EN ,Enabling Cyclic Sense" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CYC_WAKE_EN ,Enabling Cyclic Wake" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " EN_0V9_N ,Disables the reduction of the VDDC regulator output to 0.9 V during Stop-Mode" "No,Yes"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " WAKE_W_RST ,Wake-Up with reset execution" "No,Yes"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "PMU_CNF_CYC_SENSE,Dead Time in Cyclic Sense Register"
|
|
bitfld.byte 0x00 7. " OSC_100kHz_EN ,100 kHz Oscillator Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4.--5. " E01 ,Exponent" "0,1,2,3"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " M03 ,Mantissa" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
group.byte 0x2C++0x00
|
|
line.byte 0x00 "PMU_CNF_CYC_WAKE,Dead Time in Cyclic Wake Register"
|
|
bitfld.byte 0x00 4.--5. " E01 ,Exponent" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " M03 ,Mantissa" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "PMU_CNF_CYC_SAMPLE_DEL,Sample Delay in Cyclic Sense Register"
|
|
bitfld.byte 0x00 0.--3. " M03 ,Mantissa" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "PMU_CNF_RST_TFB,Reset Blind Time Register"
|
|
bitfld.byte 0x00 0.--1. " RST_TFB ,Reset Pin Blind Time Selection Bits" "0.5us,1us,5us,31us"
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "PMU_RESET_STS1,Reset Status Hard Register"
|
|
bitfld.byte 0x00 7. " PMU_1V5DIDPOR ,Power-On Reset Flag" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " PMU_PIN ,PIN-Reset Flag" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " PMU_EXTWDT ,External Watchdog (WDT1) Reset Flag" "No reset,Reset"
|
|
bitfld.byte 0x00 4. " PMU_CLKWDT ,Clock Watchdog (CLKWDT) Reset Flag" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " PMU_LPR ,Low Priority Resets" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " PMU_SLEEPEX ,Flag which indicates a reset caused by Sleep-Exit" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " PMU_WAKE ,Flag which indicates a reset caused by Stop-Exit" "No reset,Reset"
|
|
bitfld.byte 0x00 0. " SYS_FAIL ,Flag which indicates a reset caused by a System Fail reported in the corresponding Fail Register" "No reset,Reset"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "PMU_RESET_STS2,Reset Status Soft Register"
|
|
bitfld.byte 0x00 2. " LOCKUP ,Lockup-Reset Flag" "No reset,Reset"
|
|
bitfld.byte 0x00 1. " PMU_SOFT ,Soft-Reset Flag" "No reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " PMU_INTWDT ,Internal Watchdog Reset Flag" "No reset,Reset"
|
|
group.byte 0xC0++0x00
|
|
line.byte 0x00 "PMU_GPUDATA00,General Purpose User DATA0"
|
|
group.byte 0xC4++0x00
|
|
line.byte 0x00 "PMU_GPUDATA01,General Purpose User DATA1"
|
|
group.byte 0xC8++0x00
|
|
line.byte 0x00 "PMU_GPUDATA02,General Purpose User DATA2"
|
|
group.byte 0xCC++0x00
|
|
line.byte 0x00 "PMU_GPUDATA03,General Purpose User DATA3"
|
|
group.byte 0xD0++0x00
|
|
line.byte 0x00 "PMU_GPUDATA04,General Purpose User DATA4"
|
|
group.byte 0xD4++0x00
|
|
line.byte 0x00 "PMU_GPUDATA05,General Purpose User DATA5"
|
|
group.byte 0x2D4++0x00
|
|
line.byte 0x00 "PMU_SystemStartConfig,System Startup Configuration Register"
|
|
bitfld.byte 0x00 0. " MBIST_EN ,System Startup Configuration Bit for RAM MBIST at Sleep Mode exit" "Disabled,Enabled"
|
|
width 0x0b
|
|
tree.end
|
|
tree "SCU-DM (System Control Unit - Digital Modules)"
|
|
base ad:0x50005000
|
|
width 20.
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0xB0++0x00
|
|
line.byte 0x00 "SCU_OSC_CON,OSC Control Register"
|
|
bitfld.byte 0x00 7. " OSCTRIM_8 ,OSC_PLL trim configuration bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " XPD ,XTAL (Osc_hp) power down control" "Power up,Power down"
|
|
textline " "
|
|
rbitfld.byte 0x00 3. " OSC2L ,OSC-Too-Low condition flag" "Above,Below"
|
|
bitfld.byte 0x00 2. " OSCWDTRST ,Oscillator watchdog reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " OSCSS ,Oscillator source select" "PLL synchronous,XTAL synchronous,PLL asynchronous,PLL asynchronous"
|
|
else
|
|
group.byte 0xB0++0x00
|
|
line.byte 0x00 "SCU_OSC_CON,OSC Control Register"
|
|
rbitfld.byte 0x00 7. " OSCTRIM_8 ,OSC_PLL trim configuration bit" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4. " XPD ,XTAL (Osc_hp) power down control" "Power up,Power down"
|
|
textline " "
|
|
rbitfld.byte 0x00 3. " OSC2L ,OSC-Too-Low condition flag" "Above,Below"
|
|
bitfld.byte 0x00 2. " OSCWDTRST ,Oscillator watchdog reset" "No effect,Reset"
|
|
textline " "
|
|
rbitfld.byte 0x00 0.--1. " OSCSS ,Oscillator source select" "PLL synchronous,XTAL synchronous,PLL asynchronous,PLL asynchronous"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "SCU_PLL_CON,PLL Control Register"
|
|
bitfld.byte 0x00 4.--7. " NDIV ,PLL N-Divider" "/8,/9,/10,/12,/14,/15,/16,/18,/20,/21,/22,/24,/25,/26,/27,/28"
|
|
bitfld.byte 0x00 3. " VCOBYP ,PLL VCO bypass mode select" "Not bypassed,Bypassed"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " OSCDISC ,Oscillator disconnect" "Connected,Disconnected"
|
|
bitfld.byte 0x00 1. " RESLD ,Restart lock detection" "No effect,Reset"
|
|
textline " "
|
|
rbitfld.byte 0x00 0. " LOCK ,PLL lock status flag" "Not locked,Locked"
|
|
else
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "SCU_PLL_CON,PLL Control Register"
|
|
rbitfld.byte 0x00 4.--7. " NDIV ,PLL N-Divider" "/8,/9,/10,/12,/14,/15,/16,/18,/20,/21,/22,/24,/25,/26,/27,/28"
|
|
bitfld.byte 0x00 3. " VCOBYP ,PLL VCO bypass mode select" "Not bypassed,Bypassed"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " OSCDISC ,Oscillator disconnect" "Connected,Disconnected"
|
|
bitfld.byte 0x00 1. " RESLD ,Restart lock detection" "No effect,Reset"
|
|
textline " "
|
|
rbitfld.byte 0x00 0. " LOCK ,PLL lock status flag" "Not locked,Locked"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "SCU_CMCON1,Clock Control Register 1"
|
|
bitfld.byte 0x00 7. " VCOSEL ,VCOSEL setting" "0,1"
|
|
bitfld.byte 0x00 6. " K1DIV ,PLL K1-Divider" "/2,/1"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " K2DIV ,PLL K2-Divider" "/2,/3,/4,/5"
|
|
bitfld.byte 0x00 0.--3. " CLKREL ,Slow down clock divider for fcclk generation" "/1,/2,/3,/4,/8,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512"
|
|
else
|
|
group.byte 0x48++0x00
|
|
line.byte 0x00 "SCU_CMCON1,Clock Control Register 1"
|
|
bitfld.byte 0x00 7. " VCOSEL ,VCOSEL setting" "0,1"
|
|
rbitfld.byte 0x00 6. " K1DIV ,PLL K1-Divider" "/2,/1"
|
|
textline " "
|
|
rbitfld.byte 0x00 4.--5. " K2DIV ,PLL K2-Divider" "/2,/3,/4,/5"
|
|
bitfld.byte 0x00 0.--3. " CLKREL ,Slow down clock divider for fcclk generation" "/1,/2,/3,/4,/8,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x4C++0x00
|
|
line.byte 0x00 "SCU_CMCON2,Clock Control Register 2"
|
|
bitfld.byte 0x00 0. " PBA0CLKREL ,PBA0 clock divider" "/1,/2"
|
|
else
|
|
rgroup.byte 0x4C++0x00
|
|
line.byte 0x00 "SCU_CMCON2,Clock Control Register 2"
|
|
bitfld.byte 0x00 0. " PBA0CLKREL ,PBA0 clock divider" "/1,/2"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x70++0x00
|
|
line.byte 0x00 "SCU_SYSCON0,System Control Register 0"
|
|
bitfld.byte 0x00 6.--7. " SYSCLKSEL ,System clock select" "Fpll,Fosc,Flp_clk,Flp_clk"
|
|
rbitfld.byte 0x00 4.--5. " NVMCLKFAC ,NVM access clock factor" "/1,/2,/3,/4"
|
|
else
|
|
rgroup.byte 0x70++0x00
|
|
line.byte 0x00 "SCU_SYSCON0,System Control Register 0"
|
|
bitfld.byte 0x00 6.--7. " SYSCLKSEL ,System clock select" "Fpll,Fosc,Flp_clk,Flp_clk"
|
|
bitfld.byte 0x00 4.--5. " NVMCLKFAC ,NVM access clock factor" "/1,/2,/3,/4"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x54++0x00
|
|
line.byte 0x00 "SCU_APCLK_CTRL1,Analog Peripheral Clock Control 1 Register"
|
|
bitfld.byte 0x00 7. " CPCLK_DIV ,Charge pump clock divider" "/2,/1"
|
|
bitfld.byte 0x00 6. " CPCLK_SEL ,Charge pump clock selection" "LP_CLK,Fsys"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " BGCLK_DIV ,Bandgap clock divider" "/2,/1"
|
|
bitfld.byte 0x00 4. " BGCLK_SEL ,Bandgap clock selection" "LP_CLK,Fsys"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " CLKWDT_IE ,Clock watchdog interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " T3CLK_SEL ,Timer 3 clock selection" "LP_CLK,MI_CLOCK"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " APCLK_SET ,Set and overtake flag for clock settings" "Ignored,Overtaken"
|
|
rbitfld.byte 0x00 0. " PLL_LOCK ,PLL lock indicator" "Not locked,Locked"
|
|
else
|
|
group.byte 0x54++0x00
|
|
line.byte 0x00 "SCU_APCLK_CTRL1,Analog Peripheral Clock Control 1 Register"
|
|
rbitfld.byte 0x00 7. " CPCLK_DIV ,Charge pump clock divider" "/2,/1"
|
|
rbitfld.byte 0x00 6. " CPCLK_SEL ,Charge pump clock selection" "LP_CLK,Fsys"
|
|
textline " "
|
|
rbitfld.byte 0x00 5. " BGCLK_DIV ,Bandgap clock divider" "/2,/1"
|
|
rbitfld.byte 0x00 4. " BGCLK_SEL ,Bandgap clock selection" "LP_CLK,Fsys"
|
|
textline " "
|
|
rbitfld.byte 0x00 3. " CLKWDT_IE ,Clock watchdog interrupt enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 2. " T3CLK_SEL ,Timer 3 clock selection" "LP_CLK,MI_CLOCK"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " APCLK_SET ,Set and overtake flag for clock settings" "Ignored,Overtaken"
|
|
rbitfld.byte 0x00 0. " PLL_LOCK ,PLL lock indicator" "Not locked,Locked"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "SCU_APCLK_CTRL2,Analog Peripheral Clock Control 2 Register"
|
|
bitfld.byte 0x00 2.--3. " T3CLK_DIV ,Timer 3 clock divider" "/1,/2,/4,/8"
|
|
bitfld.byte 0x00 0.--1. " SDADCCLK_DIV ,SDADC clock divider" "/1,/2,/4,/8"
|
|
else
|
|
group.byte 0x6C++0x00
|
|
line.byte 0x00 "SCU_APCLK_CTRL2,Analog Peripheral Clock Control 2 Register"
|
|
rbitfld.byte 0x00 2.--3. " T3CLK_DIV ,Timer 3 clock divider" "/1,/2,/4,/8"
|
|
bitfld.byte 0x00 0.--1. " SDADCCLK_DIV ,SDADC clock divider" "/1,/2,/4,/8"
|
|
endif
|
|
group.byte 0x58++0x00
|
|
line.byte 0x00 "SCU_APCLK1,Analog Peripheral Clock Register 1"
|
|
bitfld.byte 0x00 7. " APCLK3SCLR ,Analog peripherals clock status clear" "No effect,Clear"
|
|
rbitfld.byte 0x00 6. " APCLK3STS ,Loss of clock status" "No loss,Loss"
|
|
textline " "
|
|
rbitfld.byte 0x00 4.--5. " APCLK1STS ,Analog peripherals clock status" "In range,Above,Below,Not in range"
|
|
bitfld.byte 0x00 2. " APCLK1SCLR ,Analog peripherals clock status clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " APCLK1FAC ,Analog module clock factor" "/1,/2,/3,/4"
|
|
group.byte 0x5C++0x00
|
|
line.byte 0x00 "SCU_APCLK2,Analog Peripheral Clock Register 2"
|
|
bitfld.byte 0x00 7. " APCLK2SCLR ,Analog peripherals clock status clear" "No effect,Clear"
|
|
rbitfld.byte 0x00 5.--6. " APCLK2STS ,Analog peripherals clock status" "In range,Above,Below,Not in range"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--4. " APCLK2FAC ,Slow down clock divider for TFILT_CLK generation" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32"
|
|
group.byte 0xB4++0x00
|
|
line.byte 0x00 "SCU_COCON,Clock Output Control Register"
|
|
bitfld.byte 0x00 7. " EN ,CLKOUT enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " COUTS1 ,Clock out source select bit 1" "FCCLK,COUTS0"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " TLEN ,Toggle latch enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " COUTS0 ,Clock out source select bit 0" "Selected,COREL"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " COREL ,Clock output divider" "/1,/2,/3,/4,/6,/8,/10,/12,/14,/16,/18,/20,/24,/32,/36,/40"
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x68++0x00
|
|
line.byte 0x00 "SCU_RSTCON,Reset Control Register"
|
|
bitfld.byte 0x00 7. " LOCKUP_EN ,Lockup reset enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " LOCKUP ,Lockup flag" "Not active,Active"
|
|
else
|
|
rgroup.byte 0x68++0x00
|
|
line.byte 0x00 "SCU_RSTCON,Reset Control Register"
|
|
bitfld.byte 0x00 7. " LOCKUP_EN ,Lockup reset enable flag" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " LOCKUP ,Lockup flag" "Not active,Active"
|
|
endif
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "SCU_PMCON0,Power Mode Control Register 0"
|
|
bitfld.byte 0x00 3. " SD ,Slow down mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " PD ,Power down mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SL ,Sleep mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " XTAL_ON ,OSC_HP operation in power down mode" "No,Yes"
|
|
else
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "SCU_PMCON0,Power Mode Control Register 0"
|
|
rbitfld.byte 0x00 3. " SD ,Slow down mode enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 2. " PD ,Power down mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.byte 0x00 1. " SL ,Sleep mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " XTAL_ON ,OSC_HP operation in power down mode" "No,Yes"
|
|
endif
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "SCU_MODIEN1,Peripheral Interrupt Enable Register 1"
|
|
bitfld.byte 0x00 7. " TIEN1 ,UART 1 transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIEN1 ,UART 1 receive interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RIREN1 ,SSC 1 receive interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TIREN1 ,SSC 1 transmit interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EIREN1 ,SSC 1 error interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x34++0x00
|
|
line.byte 0x00 "SCU_MODIEN2,Peripheral Interrupt Enable Register 2"
|
|
bitfld.byte 0x00 7. " TIEN2 ,UART 2 transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " RIEN2 ,UART 2 receive interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " EXINT2_EN ,External interrupt 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " RIREN2 ,SSC 2 receive interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TIREN2 ,SSC 2 transmit interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " EIREN2 ,SSC 2 error interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "SCU_MODIEN3,Peripheral Interrupt Enable Register 3"
|
|
rbitfld.byte 0x00 5. " MONSTS ,MON input status" "0,1"
|
|
bitfld.byte 0x00 4. " MONIE ,MON interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " IE0 ,External interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "SCU_MODIEN4,Peripheral Interrupt Enable Register 4"
|
|
bitfld.byte 0x00 0. " IE1 ,External interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x15C++0x00
|
|
line.byte 0x00 "SCU_GPT12IEN,GPT12 Interrupt Enable Register"
|
|
bitfld.byte 0x00 5. " CRIE ,General purpose timer 12 capture and reload interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " T6IE ,General purpose timer 12 T6 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " T5IE ,General purpose timer 12 T5 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " T4IE ,General purpose timer 12 T4 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " T3IE ,General purpose timer 12 T3 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " T2IE ,General purpose timer 12 T2 interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x144++0x00
|
|
line.byte 0x00 "SCU_DMAIEN1,DMA Interrupt Enable Register 1"
|
|
bitfld.byte 0x00 7. " CH8IE ,DMA channel 8 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CH7IE ,DMA channel 7 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " CH6IE ,DMA channel 6 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " CH5IE ,DMA channel 5 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " CH4IE ,DMA channel 4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " CH3IE ,DMA channel 3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CH2IE ,DMA channel 2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " CH1IE ,DMA channel 1 interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x148++0x00
|
|
line.byte 0x00 "SCU_DMAIEN2,DMA Interrupt Enable Register 2"
|
|
bitfld.byte 0x00 6. " SDADCIE ,DMA SDADC transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " GPT12IE ,DMA GPT12 triggered transfer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SSCRXIE ,DMA SSC receive transfer interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " SSCTXIE ,DMA SSC transmit transfer interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " TRSEQ2RDYIE ,DMA transfer sequence 2 ready interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TRSEQ1RDYIE ,DMA transfer sequence 1 ready interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " TRERRIE ,DMA transfer error interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x14C++0x00
|
|
line.byte 0x00 "SCU_DMASRCSEL,DMA Source Selection Register"
|
|
rbitfld.byte 0x00 7. " GPT12_T3 ,GPT12 transmit request" "Not present,Present"
|
|
rbitfld.byte 0x00 6. " SSCRX ,SSC receive request" "Not present,Present"
|
|
textline " "
|
|
rbitfld.byte 0x00 5. " SSCTX ,SSC transmit request" "Not present,Present"
|
|
bitfld.byte 0x00 3. " T12PM_DMAEN ,CC6_T12_PM (Period match) DMA muxer" "ADC1,CC6 T12_PM"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " T12ZM_DMAEN ,CC6_T12_ZM (Zero match) DMA muxer" "ADC1,CC6 T12_ZM"
|
|
bitfld.byte 0x00 1. " SSCRXSRCSEL ,Sscx receive source select" "SSC1,SSC2"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " SSCTXSRCSEL ,Sscx transmit source select" "SSC1,SSC2"
|
|
wgroup.byte 0x198++0x00
|
|
line.byte 0x00 "SCU_DMASRCCLR,DMA Source Selection Clear Register"
|
|
bitfld.byte 0x00 7. " GPT12_T3C ,GPT12 transmit request clear" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " SSCRXC ,SSC receive request clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " SSCTXC ,SSC transmit request clear" "No effect,Clear"
|
|
group.byte 0x180++0x00
|
|
line.byte 0x00 "SCU_DMASRCSEL2,DMA Source Selection Register 2"
|
|
bitfld.byte 0x00 0.--1. " GPT12_DMAEN ,GPT12 T3 DMA muxer (DMA channel)" "Timer3,GPT12 T3,Timer3/CCU6 T12_ZM,GPT12 T3/T12_ZM"
|
|
group.byte 0xB8++0x00
|
|
line.byte 0x00 "SCU_MODPISEL,Peripheral Input Select Register"
|
|
bitfld.byte 0x00 7. " U_TX_CONDIS ,UART1 txd connection disable" "No,Yes"
|
|
bitfld.byte 0x00 6. " URIOS1 ,UART1 input/output select" "LIN,P1.4"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " EXINT2IS ,External interrupt 2 input select" ",EXINT2_1,EXINT2_2,EXINT2_3"
|
|
bitfld.byte 0x00 2.--3. " EXINT1IS ,External interrupt 1 input select" "EXINT1_0,EXINT1_1,EXINT1_2,EXINT1_3"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " EXINT0IS ,External interrupt 0 input select" "EXINT0_0,EXINT0_1,EXINT0_2,EXINT0_3"
|
|
group.byte 0xBC++0x00
|
|
line.byte 0x00 "SCU_MODPISEL1,Peripheral Input Select Register 1"
|
|
bitfld.byte 0x00 7. " T21EXCON ,Timer 21 external input control" "MODPISEL2.T2EXIS,Analog subsystem"
|
|
bitfld.byte 0x00 6. " T2EXCON ,Timer 2 external input control" "MODPISEL2.T2EXIS,Analog subsystem"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " GPT12CAPINB ,GPT12 CAPINB input control" "P0.3,BEMF"
|
|
group.byte 0xC0++0x00
|
|
line.byte 0x00 "SCU_MODPISEL2,Peripheral Input Select Register 2"
|
|
bitfld.byte 0x00 6.--7. " T21EXIS ,Timer 21 external input select" "T21EX_0,T21EX_1,T21EX_2,T21EX_3"
|
|
bitfld.byte 0x00 4.--5. " T2EXIS ,Timer 2 external input select" "LIN,T2EX_1,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 2.--3. " T21IS ,Timer 21 input select" "T21_0,T21_1,T21_2,?..."
|
|
bitfld.byte 0x00 0.--1. " T2IS ,Timer 2 input select" "T2_0,T2_1,?..."
|
|
group.byte 0xC4++0x00
|
|
line.byte 0x00 "SCU_MODPISEL3,Peripheral Input Select Register 3"
|
|
bitfld.byte 0x00 6. " URIOS2 ,UART2 input/output select" "RXD2_0/TXD2_0,RXD2_1/TXD2_1"
|
|
group.byte 0xE8++0x00
|
|
line.byte 0x00 "SCU_P0_POCON0,Port Output Control Register"
|
|
bitfld.byte 0x00 4.--6. " PDM1 ,P0.1 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
bitfld.byte 0x00 0.--2. " PDM0 ,P0.0 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0xEC++0x00
|
|
line.byte 0x00 "SCU_P0_POCON1,Port Output Control Register"
|
|
bitfld.byte 0x00 4.--6. " PDM3 ,P0.3 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
bitfld.byte 0x00 0.--2. " PDM2 ,P0.2 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0xF0++0x00
|
|
line.byte 0x00 "SCU_P0_POCON2,Port Output Control Register"
|
|
bitfld.byte 0x00 0.--2. " PDM4 ,P0.4 port driver mode" ",,,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0xF8++0x00
|
|
line.byte 0x00 "SCU_P1_POCON0,Port Output Control Register"
|
|
bitfld.byte 0x00 4.--6. " PDM1 ,P1.1 port driver mode" ",,,Weak,Medium,Medium,Medium,Weak"
|
|
bitfld.byte 0x00 0.--2. " PDM0 ,P1.0 port driver mode" ",,,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0xFC++0x00
|
|
line.byte 0x00 "SCU_P1_POCON1,Port Output Control Register"
|
|
bitfld.byte 0x00 4.--6. " PDM3 ,P1.3 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
bitfld.byte 0x00 0.--2. " PDM2 ,P1.2 port driver mode" ",,,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0x100++0x00
|
|
line.byte 0x00 "SCU_P1_POCON2,Port Output Control Register"
|
|
bitfld.byte 0x00 0.--2. " PDM4 ,P1.4 port driver mode" "Strong/sharp,Strong/medium,Strong/soft,Weak,Medium,Medium,Medium,Weak"
|
|
group.byte 0xF4++0x00
|
|
line.byte 0x00 "SCU_TCCR,Temperature Compensation Control Register"
|
|
bitfld.byte 0x00 0.--1. " TCC ,Temperature compensation control" "-40 to 0,0 to 40,40 to 80,80 to 175"
|
|
group.byte 0xD0++0x00
|
|
line.byte 0x00 "SCU_GPT12PISEL,GPT12 Peripheral Input Select Register"
|
|
bitfld.byte 0x00 5. " T3_GPT12_SEL ,CCU6_INT_SEL" "Timer3,GPT12"
|
|
bitfld.byte 0x00 4. " TRIG_CONF ,CCU6 trigger configuration" "Single,Continuous"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--3. " GPT12 ,GPT12 TIN3B / TIN4D input select" "CC60,CC61,CC62,T12 ZM,T12 PM,T12 CM0,T12 CM1,T12 CM2,T13 PM,T13 ZM,T13 CM,Edges on CC60/61/62,?..."
|
|
group.byte 0x60++0x00
|
|
line.byte 0x00 "SCU_PMCON1,Peripheral Management Control Register 1"
|
|
bitfld.byte 0x00 4. " GPT12_DIS ,General purpose timer 12 disable request" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " T2_DIS ,T2 disable request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " CCU6_DIS ,CCU6 disable request" "Not requested,Requested"
|
|
bitfld.byte 0x00 1. " SSC1_DIS ,SSC1 disable request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " ADC1_DIS ,ADC1 disable request" "Not requested,Requested"
|
|
group.byte 0x64++0x00
|
|
line.byte 0x00 "SCU_PMCON2,Peripheral Management Control Register 2"
|
|
bitfld.byte 0x00 5. " T3_DIS ,T3 disable request" "Not requested,Requested"
|
|
bitfld.byte 0x00 3. " T21_DIS ,T21 disable request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SSC2_DIS ,SSC2 disable request" "Not requested,Requested"
|
|
group.byte 0xC8++0x00
|
|
line.byte 0x00 "SCU_MODSUSP1,Module Suspend Control Register 1"
|
|
bitfld.byte 0x00 6. " T21_SUSP ,Timer21 debug suspend bit" "Not suspended,Suspended"
|
|
bitfld.byte 0x00 4. " GPT12_SUSP ,GPT12 debug suspend bit" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " T2_SUSP ,Timer2 debug suspend bit" "Not suspended,Suspended"
|
|
bitfld.byte 0x00 2. " T13SUSP ,Timer 13 debug suspend bit" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " T12SUSP ,Timer 12 debug suspend bit" "Not suspended,Suspended"
|
|
bitfld.byte 0x00 0. " WDTSUSP ,SCU watchdog timer debug suspend bit" "Not suspended,Suspended"
|
|
group.byte 0xCC++0x00
|
|
line.byte 0x00 "SCU_MODSUSP2,Module Suspend Control Register 2"
|
|
bitfld.byte 0x00 2. " ADC1_SUSP ,ADC1 unit debug suspend bit" "Not suspended,Suspended"
|
|
bitfld.byte 0x00 1. " MU_SUSP ,Measurement unit debug suspend bit" "Not suspended,Suspended"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " T3_SUSP ,Timer 3 debug suspend bit" "Not suspended,Suspended"
|
|
group.byte 0x94++0x00
|
|
line.byte 0x00 "SCU_LINST,LIN Status Register"
|
|
bitfld.byte 0x00 6. " SYNEN ,End of SYN byte and SYN byte error interrupts enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 5. " ERRSYN ,SYN byte error interrupt flag" "No error,Error"
|
|
textline " "
|
|
rbitfld.byte 0x00 4. " EOFSYN ,End of SYN byte interrupt flag" "No error,Error"
|
|
rbitfld.byte 0x00 3. " BRK ,Break field flag" "No break field,Break field"
|
|
textline " "
|
|
bitfld.byte 0x00 1.--2. " BGSEL ,Baud rate select for detection" "0,1,2,3"
|
|
bitfld.byte 0x00 0. " BRDIS ,Baud rate detection disable" "No,Yes"
|
|
wgroup.byte 0xA4++0x00
|
|
line.byte 0x00 "SCU_LINSCLR,LIN Status Clear Register"
|
|
bitfld.byte 0x00 5. " ERRSYNC ,SYN byte error interrupt flag" "No effect,Clear"
|
|
bitfld.byte 0x00 4. " EOFSYNC ,End of SYN byte interrupt flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " BRKC ,Break field flag clear" "No effect,Clear"
|
|
group.byte 0x78++0x00
|
|
line.byte 0x00 "SCU_WDTREL,Watchdog Timer Reload Register"
|
|
if (((d.b(ad:0x50005000+0xAC))&0x04)==0x00)
|
|
group.byte 0x50++0x00
|
|
line.byte 0x00 "SCU_WDTCON,Watchdog Timer Control Register"
|
|
bitfld.byte 0x00 5. " WINBEN ,Watchdog Window-Boundary enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4. " WDTPR ,Watchdog prewarning mode flag" "Normal,Prewarning"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " WDTEN ,WDT enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " WDTRS ,WDT refresh start" "No effect,Refresh"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " WDTIN ,Watchdog timer input frequency selection" "/2,/128"
|
|
else
|
|
group.byte 0x50++0x00
|
|
line.byte 0x00 "SCU_WDTCON,Watchdog Timer Control Register"
|
|
bitfld.byte 0x00 5. " WINBEN ,Watchdog Window-Boundary enable" "Disabled,Enabled"
|
|
rbitfld.byte 0x00 4. " WDTPR ,Watchdog prewarning mode flag" "Normal,Prewarning"
|
|
textline " "
|
|
rbitfld.byte 0x00 2. " WDTEN ,WDT enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " WDTRS ,WDT refresh start" "No effect,Refresh"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " WDTIN ,Watchdog timer input frequency selection" "/2,/128"
|
|
endif
|
|
rgroup.byte 0x80++0x00
|
|
line.byte 0x00 "SCU_WDTL,Watchdog Timer - Low Byte"
|
|
rgroup.byte 0x84++0x00
|
|
line.byte 0x00 "SCU_WDTH,Watchdog Timer - High Byte"
|
|
group.byte 0x7C++0x00
|
|
line.byte 0x00 "SCU_WDTWINB,Watchdog Window-Boundary Count"
|
|
group.byte 0x88++0x00
|
|
line.byte 0x00 "SCU_UART_BCON1,Baud Rate Control Register 1"
|
|
bitfld.byte 0x00 1.--3. " BRPRE ,Prescaler bit" "FPCLK,FPCLK/2,FPCLK/4,FPCLK/8,FPCLK/16,FPCLK/32,?..."
|
|
bitfld.byte 0x00 0. " R ,Baud rate generator run control bit" "Disabled,Enabled"
|
|
group.byte 0x98++0x00
|
|
line.byte 0x00 "SCU_UART_BCON2,Baud Rate Control Register 2"
|
|
bitfld.byte 0x00 1.--3. " BRPRE ,Prescaler bit" "FPCLK,FPCLK/2,FPCLK/4,FPCLK/8,FPCLK/16,FPCLK/32,?..."
|
|
bitfld.byte 0x00 0. " R ,Baud rate generator run control bit" "Disabled,Enabled"
|
|
group.byte 0x94++0x00
|
|
line.byte 0x00 "SCU_UART_LINST,LIN Status Register"
|
|
bitfld.byte 0x00 6. " SYNEN ,End of SYN byte and SYN byte error interrupts enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " ERRSYN ,SYN byte error interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " EOFSYN ,End of SYN byte interrupt flag" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 3. " BRK ,Break field flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1.--2. " BGSEL ,Baud rate select for detection" "0,1,2,3"
|
|
bitfld.byte 0x00 0. " BRDIS ,Baud rate detection disable" "Enabled,Disabled"
|
|
group.byte 0x8C++0x00
|
|
line.byte 0x00 "SCU_UART_BGL1,Baud Rate Timer/reload Register 1 Low Byte"
|
|
bitfld.byte 0x00 5.--7. " BR_VALUE ,Baud rate timer/reload value" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. " FD_SEL ,Fractional divider selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x9C++0x00
|
|
line.byte 0x00 "SCU_UART_BGL2,Baud Rate Timer/reload Register 2 Low Byte"
|
|
bitfld.byte 0x00 5.--7. " BR_VALUE ,Baud rate timer/reload value" "0,1,2,3,4,5,6,7"
|
|
bitfld.byte 0x00 0.--4. " FD_SEL ,Fractional divider selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.byte 0x90++0x00
|
|
line.byte 0x00 "SCU_UART_BGH1,Baud Rate Timer/reload Register 1 High Byte"
|
|
group.byte 0xA0++0x00
|
|
line.byte 0x00 "SCU_UART_BGH2,Baud Rate Timer/reload Register 2 High Byte"
|
|
group.byte 0xD8++0x00
|
|
line.byte 0x00 "SCU_EDCSTAT,Error Detection And Correction Status Register"
|
|
rbitfld.byte 0x00 4. " RSBE ,RAM single bit error" "No error,Error"
|
|
setclrfld.byte 0x00 2. -0x04 2. 0x04 2. " NVMDBE_SET/CLR ,NVM double bit error" "No error,Error"
|
|
textline " "
|
|
setclrfld.byte 0x00 0. -0x04 0. 0x04 0. " RDBE_SET/CLR ,RAM double bit error" "No error,Error"
|
|
wgroup.byte 0x10C++0x00
|
|
line.byte 0x00 "SCU_EDCSCLR,Error Detection And Correction Status Clear Register"
|
|
bitfld.byte 0x00 4. " RSBEC ,RAM single bit error clear" "No effect,Clear"
|
|
group.byte 0xAC++0x00
|
|
line.byte 0x00 "SCU_PASSWD,Password Register"
|
|
bitfld.byte 0x00 3.--7. " PASS ,Password bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,Open access,20,Close access,22,23,Enable(mode),25,26,27,28,29,30,31"
|
|
rbitfld.byte 0x00 2. " PROTECT_S ,Bit-Protection signal status bit" "Unprotected,Protected"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " MODE ,Bit-Protection scheme control bit" "Disabled,,,Enabled"
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "SCU_SYS_STRTUP_STS,System Startup Status Register"
|
|
bitfld.byte 0x00 2. " PG100TP_CHKS_ERR ,100 TP page checksum error" "No error,Error"
|
|
bitfld.byte 0x00 1. " MRAMINITSTS ,Map RAM initialization status" "Not failed,Failed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " INIT_FAIL ,Initialization at startup failed" "No error,Error"
|
|
group.byte 0xE0++0x00
|
|
line.byte 0x00 "SCU_NVM_PROT_STS,NVM Protection Status Register"
|
|
bitfld.byte 0x00 3. " NVMPROTSTSL_3 ,NVM protection status register low flags" "Not readable,Readable"
|
|
bitfld.byte 0x00 2. " NVMPROTSTSL_2 ,NVM protection status register low flags" "Not readable,Readable"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NVMPROTSTSL_1 ,NVM protection status register low flags" "Not changeable,Changeable"
|
|
bitfld.byte 0x00 0. " NVMPROTSTSL_0 ,NVM protection status register low flags" "Not changeable,Changeable"
|
|
group.byte 0xE4++0x00
|
|
line.byte 0x00 "SCU_MEM_ACC_STS,Memory Access Status Register"
|
|
bitfld.byte 0x00 4. " ROM_PROT_ERR ,ROM access protection" "No error,Error"
|
|
bitfld.byte 0x00 1. " NVM_ADDR_ERR ,NVM address protection" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " NVM_PROT_ERR ,NVM access protection" "No error,Error"
|
|
rgroup.byte 0xA8++0x00
|
|
line.byte 0x00 "SCU_ID,Identity Register"
|
|
bitfld.byte 0x00 3.--7. " PRODID ,Product ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.byte 0x00 0.--2. " VERID ,Version ID" "0,A-Stepping,B-Stepping,3,4,5,6,7"
|
|
group.byte 0xDC++0x00
|
|
line.byte 0x00 "SCU_MEMSTAT,Memory Status Register"
|
|
bitfld.byte 0x00 6.--7. " SASTATUS ,Service algorithm status" "Initialization OK,Successful/fixed,Successful/error,Not successful"
|
|
bitfld.byte 0x00 0.--5. " SECTORINFO ,Sector information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.byte 0xDC++0x00
|
|
line.byte 0x00 "SCU_MEMSTAT,Memory Status Register"
|
|
bitfld.byte 0x00 1. " EMPROP ,Emergency program operation status bit" "Not requested,Requested"
|
|
bitfld.byte 0x00 0. " NVMPROP ,NVM program operation status bit" "Not started,Started"
|
|
width 0x0B
|
|
tree.end
|
|
tree "SCU-PM (System Control Unit - Power Modules)"
|
|
base ad:0x50006000
|
|
width 27.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "SCUPM_AMCLK_FREQ_STS,Analog Module Clock Frequency Status"
|
|
bitfld.long 0x00 8.--13. " AMCLK2_FREQ ,Current frequency of Analog Module Clock 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
bitfld.long 0x00 0.--5. " AMCLK1_FREQ ,Current frequency of Analog Module Clock System Clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "SCUPM_AMCLK_CTRL,Analog Module Clock Control Register"
|
|
bitfld.long 0x00 0. " CLKWDT_PD_N ,Clock Watchdog Powerdown" "Disabled,Enabled"
|
|
group.long 0x0C++0x03
|
|
line.long 0x00 "SCUPM_AMCLK_TH_HYS,Analog Module Clock Limit Register"
|
|
bitfld.long 0x00 30.--31. " AMCLK2_LOW_HYS ,Analog Module Clock 2 (TFILT_CLK) Lower Hysteresis" "0,1,2,3"
|
|
bitfld.long 0x00 24.--29. " AMCLK2_LOW_TH ,Analog Module Clock 2 (TFILT_CLK) Lower Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " AMCLK2_UP_HYS ,Analog Module Clock 2 (TFILT_CLK) Upper Hysteresis" "0,1,2,3"
|
|
bitfld.long 0x00 16.--21. " AMCLK2_UP_TH ,Analog Module Clock 2 (TFILT_CLK) Upper Limit Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " AMCLK1_LOW_HYS ,Analog Module Clock 1 (TFILT_CLK) Lower Hysteresis" "0,1,2,3"
|
|
bitfld.long 0x00 8.--13. " AMCLK1_LOW_TH ,Analog Module Clock 1 (TFILT_CLK) Lower Limit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " AMCLK1_UP_HYS ,Analog Module Clock 1 (TFILT_CLK) Upper Hysteresis" "0,1,2,3"
|
|
bitfld.long 0x00 0.--5. " AMCLK1_UP_TH ,Analog Module Clock 1 (TFILT_CLK) Upper Limit Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x6C++0x03
|
|
line.long 0x00 "SCUPM_STCALIB,System Tick Calibration Register"
|
|
hexmask.long 0x00 0.--25. 1. " STCALIB ,System Tick Calibration"
|
|
rgroup.long 0x18++0x03
|
|
line.long 0x00 "SCUPM_SYS_IS,System Interrupt Status"
|
|
bitfld.long 0x00 29. " PHW_ZCHI_STS ,Phase W Zero Crossing Comparator High Status" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PHW_ZCLOW_STS ,Phase W Zero Crossing Comparator Low Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PHV_ZCHI_STS ,Phase V Zero Crossing Comparator High Status" "Inactive,Active"
|
|
bitfld.long 0x00 26. " PHV_ZCLOW_STS ,Phase V Zero Crossing Comparator Low Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PHU_ZCHI_STS ,Phase U Zero Crossing Comparator High Status" "Inactive,Active"
|
|
bitfld.long 0x00 24. " PHU_ZCLOW_STS ,Phase U Zero Crossing Comparator Low Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ADC4_EOC_IS ,ADC4 EOC Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 22. " ADC3_EOC_IS ,ADC3 EOC Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PHW_ZCHI_IS ,Phase W Zero Crossing Comparator High Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 20. " PHW_ZCLOW_IS ,Phase W Zero Crossing Comparator Low Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PHV_ZCHI_IS ,Phase V Zero Crossing Comparator High Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 18. " PHV_ZCLOW_IS ,Phase V Zero Crossing Comparator Low Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PHU_ZCHI_IS ,Phase U Zero Crossing Comparator High Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 16. " PHU_ZCLOW_IS ,Phase U Zero Crossing Comparator Low Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADC2_ESM_IS ,ADC2 Exceptional Sequence Measurement Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 14. " VREF5V_OVL_IS ,VREF5V Overload Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VREF5V_UPTH_IS ,VREF5V ADC1 Reference Overvoltage" "Inactive,Active"
|
|
bitfld.long 0x00 12. " VREF5V_LOWTH_IS ,VREF5V ADC1 Reference Undervoltage Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REFBG_UPTHWARN_IS ,8-Bit ADC2 Reference Overvoltage (ADC2 Channel 7) interrupt status" "Inactive,Active"
|
|
bitfld.long 0x00 10. " REFBG_LOTHWARN_IS ,8-Bit ADC2 Reference Undervoltage (ADC2 Channel 7) interrupt status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SYS_OT_IS ,System Overtemperature Shutdown (ADC2, Channel 9) interrupt status" "Inactive,Active"
|
|
bitfld.long 0x00 8. " SYS_OTWARN_IS ,System Overtemperature Prewarning (ADC2 Channel 9) interrupt status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PMU_OT_IS ,PMU Regulator Overtemperature Shutdown (ADC2 Channel9) interrupt status" "Inactive,Active"
|
|
bitfld.long 0x00 6. " PMU_OTWARN_IS ,PMU Regulator Overtemperature Prewarning (ADC2 Channel 9) interrupt status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LIN_TMOUT_IS ,LIN TXD timeout" "Inactive,Active"
|
|
bitfld.long 0x00 1. " LIN_OT_IS ,LIN Overtemperature interrupt status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LIN_OC_IS ,LIN Overcurrent interrupt status" "Inactive,Active"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "SCUPM_SYS_ISCLR,System Interrupt Status Clear"
|
|
bitfld.long 0x00 29. " PHW_ZCHI_SCLR ,Phase W Zero Crossing Comparator High Status" "No effect,Clear"
|
|
bitfld.long 0x00 28. " PHW_ZCLOW_SCLR ,Phase W Zero Crossing Comparator Low Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PHV_ZCHI_SCLR ,Phase V Zero Crossing Comparator High Status" "No effect,Clear"
|
|
bitfld.long 0x00 26. " PHV_ZCLOW_SCLR ,Phase V Zero Crossing Comparator Low Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PHU_ZCHI_SCLR ,Phase U Zero Crossing Comparator High Status" "No effect,Clear"
|
|
bitfld.long 0x00 24. " PHU_ZCLOW_SCLR ,Phase U Zero Crossing Comparator Low Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " ADC4_EOC_ICLR ,ADC4 EOC Interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 22. " ADC3_EOC_ICLR ,ADC3 EOC Interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PHW_ZCHI_ICLR ,Phase W Zero Crossing Comparator High Interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 20. " PHW_ZCLOW_ICLR ,Phase W Zero Crossing Comparator Low Interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PHV_ZCHI_ICLR ,Phase V Zero Crossing Comparator High Interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 18. " PHV_ZCLOW_ICLR ,Phase V Zero Crossing Comparator Low Interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PHU_ZCHI_ICLR ,Phase U Zero Crossing Comparator High Interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " PHU_ZCLOW_ICLR ,Phase U Zero Crossing Comparator Low Interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADC2_ESM_ICLR ,ADC2 Exceptional Sequence Measurement Interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 14. " VREF5V_OVL_ICLR ,VREF5V Overload Interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VREF5V_UPTH_ICLR ,VREF5V ADC1 Reference Overvoltage (ADC2 Channel 6) interrupt Status" "No effect,Clear"
|
|
bitfld.long 0x00 12. " VREF5V_LOWTH_ICLR ,VREF5V ADC1 Reference Undervoltage (ADC2 Channel 6) interrupt Status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REFBG_UPTHWARN_ICLR ,8-Bit ADC2 Reference Overvoltage (ADC2 Channel 7) interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 10. " REFBG_LOTHWARN_ICLR ,8-Bit ADC2 Reference Undervoltage (ADC2 Channel 7) interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SYS_OT_ICLR ,System Overtemperature Shutdown (ADC2 Channel 9) interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 8. " SYS_OTWARN_ICLR ,System Overtemperature Prewarning (ADC2 Channel 9) interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PMU_OT_ICLR ,PMU Regulator Overtemperature Shutdown (ADC2 Channel9) interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 6. " PMU_OTWARN_ICLR ,PMU Regulator Overtemperature Prewarning (ADC2 Channel 9) interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LIN_TMOUT_ICLR ,LIN TXD timeout" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LIN_OT_ICLR ,LIN Overtemperature interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LIN_OC_ICLR ,LIN Overcurrent interrupt status" "No effect,Clear"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "SCUPM_BDRV_IS,Bridge Driver Interrupt Status"
|
|
bitfld.long 0x00 28. " VSD_UPTH_STS ,Warning for VSD Upper Threshold Measurement (ADC2 channel 2) Status" "Inactive,Active"
|
|
bitfld.long 0x00 27. " VSD_LOWTH_STS ,Warning for VSD Lower Threshold Measurement (ADC2 channel 2) Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 26. " VCP_UPTH_STS ,Warning for VCP Upper Threshold Measurement (ADC2 channel 3) Status" "Inactive,Active"
|
|
bitfld.long 0x00 25. " VCP_LOWTH1_STS ,Warning for VCP Lower Threshold 1 Measurement (ADC2 channel 3) Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 24. " VCP_LOWTH2_STS ,Warning for VCP Lower Threshold 2 Measurement (VCP_LOW Signal from CP) Status" "Inactive,Active"
|
|
bitfld.long 0x00 20. " VSD_UPTH_IS ,Warning for VSD Upper Threshold Measurement (ADC2 channel 2) Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VSD_LOWTH_IS ,Warning for VSD Lower Threshold Measurement (ADC2 channel 2) Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 18. " VCP_UPTH_IS ,Warning for VCP Upper Threshold Measurement (ADC2 channel 3) Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VCP_LOWTH1_IS ,Warning for VCP Lower Threshold 1 Measurement (ADC2 channel 3) Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 16. " VCP_LOWTH2_IS ,Warning for VCP Lower Threshold 2 Measurement (VCP_LOW Signal from CP) Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HS3_OC_IS ,External High Side 3 FET Over-current Status" "Inactive,Active"
|
|
bitfld.long 0x00 14. " LS3_OC_IS ,External Low Side 3 FET Over-current Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HS2_OC_IS ,External High Side 2 FET Over-current Status" "Inactive,Active"
|
|
bitfld.long 0x00 12. " HS1_OC_IS ,External High 1 FET Over-current Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_OC_IS ,External Low Side 2 FET Over-current Status" "Inactive,Active"
|
|
bitfld.long 0x00 10. " LS1_OC_IS ,External Low Side 1 FET Over-current Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " HS3_DS_IS ,Bridge Driver High Side 3 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 4. " LS3_DS_IS ,Bridge Driver Low Side 3 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HS2_DS_IS ,Bridge Driver High Side 2 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 2. " HS1_DS_IS ,Bridge Driver High Side 1 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS2_DS_IS ,Bridge Driver Low Side 2 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
bitfld.long 0x00 0. " LS1_DS_IS ,Bridge Driver Low Side 1 Pre-Driver short Interrupt Status" "Inactive,Active"
|
|
wgroup.long 0x54++0x03
|
|
line.long 0x00 "SCUPM_BDRV_ISCLR,Bridge Driver Interrupt Status Clear"
|
|
bitfld.long 0x00 28. " VSD_UPTH_SCLR ,Warning for VSD Upper Threshold Measurement (ADC2 channel 2) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 27. " VSD_LOWTH_SCLR ,Warning for VSD Lower Threshold Measurement (ADC2 channel 2) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " VCP_UPTH_SCLR ,Warning for VCP Upper Threshold Measurement (ADC2 channel 3) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 25. " VCP_LOWTH1_SCLR ,Warning for VCP Lower Threshold 1 Measurement (ADC2 channel 3) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 24. " VCP_LOWTH2_SCLR ,Warning for VCP Lower Threshold 2 Measurement (VCP_LOW Signal from CP) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " VSD_UPTH_ICLR ,Warning for VSD Upper Threshold Measurement (ADC2 channel 2) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VSD_LOWTH_ICLR ,Warning for VSD Lower Threshold Measurement (ADC2 channel 2) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " VCP_UPTH_ICLR ,Warning for VCP Upper Threshold Measurement (ADC2 channel 3) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VCP_LOWTH1_ICLR ,Warning for VCP Lower Threshold 1 Measurement (ADC2 channel 3) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " VCP_LOWTH2_ICLR ,Warning for VCP Lower Threshold 2 Measurement (VCP_LOW Signal from CP) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " HS3_OC_ICLR ,External High Side 3 FET Over-current Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 14. " LS3_OC_ICLR ,External Low Side 3 FET Over-current Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 13. " HS2_OC_ICLR ,External High Side 2 FET Over-current Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 12. " HS1_OC_ICLR ,External High 1 FET Over-current Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_OC_ICLR ,External Low Side 2 FET Over-current Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 10. " LS1_OC_ICLR ,External Low Side 1 FET Over-current Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " HS3_DS_ICLR ,Bridge Driver High Side 3 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " LS3_DS_ICLR ,Bridge Driver Low Side 3 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " HS2_DS_ICLR ,Bridge Driver High Side 2 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " HS1_DS_ICLR ,Bridge Driver High Side 1 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS2_DS_ICLR ,Bridge Driver Low Side 2 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LS1_DS_ICLR ,Bridge Driver Low Side 1 Pre-Driver short Interrupt Status Clear" "No effect,Clear"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SCUPM_SYS_SUPPLY_IRQ_STS,System Supply Interrupt Status"
|
|
bitfld.long 0x00 23. " VDD1V5_OV_STS ,VDDC Overvoltage (ADC2 channel 8) Status" "No overvoltage,Overvoltage"
|
|
bitfld.long 0x00 22. " VDD5V_OV_STS ,VDDP Overvoltage (ADC2 channel 5) Status" "No overvoltage,Overvoltage"
|
|
textline " "
|
|
bitfld.long 0x00 21. " VS_OV_STS ,VS Overvoltage (ADC2 channel 1) Status" "No overvoltage,Overvoltage"
|
|
bitfld.long 0x00 20. " MON_OV_STS ,MON Overvoltage (ADC2 channel 4) Status" "No overvoltage,Overvoltage"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VDD1V5_UV_STS ,VDDC Undervoltage (ADC2 channel 8) Status" "No undervoltage,Undervoltage"
|
|
bitfld.long 0x00 18. " VDD5V_UV_STS ,VDDP Undervoltage (ADC2 channel 5) Status" "No undervoltage,Undervoltage"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VS_UV_STS ,VS Undervoltage (ADC2 channel 1) Status" "No undervoltage,Undervoltage"
|
|
bitfld.long 0x00 16. " MON_UV_STS ,MON Undervoltage (ADC2 channel 4) Status" "No undervoltage,Undervoltage"
|
|
textline " "
|
|
bitfld.long 0x00 7. " VDD1V5_OV_IS ,VDDC Overvoltage (ADC2 channel 8) Interrupt Status" "No overvoltage,Overvoltage"
|
|
bitfld.long 0x00 6. " VDD5V_OV_IS ,VDDP Overvoltage (ADC2 channel 5) Interrupt Status" "No overvoltage,Overvoltage"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VS_OV_IS ,VS Overvoltage (ADC2 channel 1) Interrupt Status" "No overvoltage,Overvoltage"
|
|
bitfld.long 0x00 4. " MON_OV_IS ,MON Overvoltage (ADC2 channel 4) Interrupt Status" "No overvoltage,Overvoltage"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VDD1V5_UV_IS ,VDDC Undervoltage (ADC2 channel 8) Interrupt Status" "No undervoltage,Undervoltage"
|
|
bitfld.long 0x00 2. " VDD5V_UV_IS ,VDDP Undervoltage (ADC2 channel 5) Interrupt Status" "No undervoltage,Undervoltage"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VS_UV_IS ,VS Undervoltage (ADC2 channel 1) Interrupt Status" "No undervoltage,Undervoltage"
|
|
bitfld.long 0x00 0. " MON_UV_IS ,MON Undervoltage (ADC2 channel 4) Interrupt Status" "No undervoltage,Undervoltage"
|
|
wgroup.long 0x24++0x03
|
|
line.long 0x00 "SCUPM_SYS_SUPPLY_IRQ_CLR,System Supply Interrupt Status Clear"
|
|
bitfld.long 0x00 23. " VDD1V5_OV_SCLR ,VDDC Overvoltage (ADC2 channel 8) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 22. " VDD5V_OV_SCLR ,VDDP Overvoltage (ADC2 channel 5) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 21. " VS_OV_SCLR ,VS Overvoltage (ADC2 channel 1) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 20. " MON_OV_SCLR ,MON Overvoltage (ADC2 channel 4) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VDD1V5_UV_SCLR ,VDDC Undervoltage (ADC2 channel 8) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 18. " VDD5V_UV_SCLR ,VDDP Undervoltage (ADC2 channel 5) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 17. " VS_UV_SCLR ,VS Undervoltage (ADC2 channel 1) Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 16. " MON_UV_SCLR ,MON Undervoltage (ADC2 channel 4) Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " VDD1V5_OV_ICLR ,VDDC Overvoltage (ADC2 channel 8) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 6. " VDD5V_OV_ICLR ,VDDP Overvoltage (ADC2 channel 5) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VS_OV_ICLR ,VS Overvoltage (ADC2 channel 1) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 4. " MON_OV_ICLR ,MON Overvoltage (ADC2 channel 4) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VDD1V5_UV_ICLR ,VDDC Undervoltage (ADC2 channel 8) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 2. " VDD5V_UV_ICLR ,VDDP Undervoltage (ADC2 channel 5) Interrupt Status Clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VS_UV_ICLR ,VS Undervoltage (ADC2 channel 1) Interrupt Status Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " MON_UV_ICLR ,MON Undervoltage (ADC2 channel 4) Interrupt Status Clear" "No effect,Clear"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "SCUPM_SYS_IRQ_CTRL,System Interrupt Control"
|
|
bitfld.long 0x00 23. " ADC4_EOC_IE ,ADC4 EOC Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " ADC4_EOC_IE ,ADC3 EOC Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " PHW_ZCHI_IE ,Phase W Zero Crossing Comparator High Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PHW_ZCLOW_IE ,Phase W Zero Crossing Comparator Low Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " PHV_ZCHI_IE ,Phase V Zero Crossing Comparator High Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " PHV_ZCLOW_IE ,Phase V Zero Crossing Comparator Low Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " PHU_ZCHI_IE ,Phase U Zero Crossing Comparator High Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PHU_ZCLOW_IE ,Phase U Zero Crossing Comparator Low Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADC2_ESM_IE ,ADC2 Exceptional Sequence Measurement Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " VREF5V_OVL_IE ,VREF5V Overload Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " VREF5V_UPTH_IE ,VREF5V ADC1 Reference Overvoltage (ADC2, Channel 6) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " VREF5V_LOWTH_IE ,VREF5V ADC1 Reference Undervoltage (ADC2, Channel 6) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " REFBG_UPTHWARN_IE ,Reference Voltage Overvoltage (ADC2 channel 7) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " REFBG_LOTHWARN_IE ,Reference Voltage Undervoltage (ADC2 channel 7) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SYS_OT_IE ,System Overtemperature Shutdown (ADC2 channel 9) Interrupt Enable (leads to shutdown of System)" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SYS_OTWARN_IE ,System Overtemperature Warning (ADC2 channel 9) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PMU_OT_IE ,PMU Regulator Overtemperature Shutdown (ADC2 channel 9) Interrupt Enable (leads to shutdown of System)" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " PMU_OTWARN_IE ,PMU Regulator Overtemperature Warning (ADC2 channel 9) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LIN_TMOUT_IE ,LIN TXD timeout Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LIN_OT_IE ,LIN Overtemperature Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LIN_OC_IE ,LIN Overcurrent Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x5C++0x03
|
|
line.long 0x00 "SCUPM_BDRV_IRQ_CTRL,Bridge Driver Interrupt Control"
|
|
bitfld.long 0x00 20. " VSD_UPTH_IE ,VSD Measurement Upper Threshold (ADC2 channel 2) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " VSD_LOWTH_IE ,VSD Measurement Lower Threshold (ADC2 channel 2) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " VCP_UPTH_IE ,VCP Measurement Upper Threshold (ADC2 channel 2) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " VCP_LOWTH1_IE ,VCP Measurement Lower Threshold 1 (ADC2 channel 3) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " VCP_LOWTH2_IE ,VCP Measurement Lower Threshold 2 Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " HS3_OC_IE ,External High Side 3 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " LS3_OC_IE ,External Low Side 3 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " HS2_OC_IE ,External High Side 2 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " HS1_OC_IE ,External High Side 1 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " LS2_OC_IE ,External Low Side 2 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LS1_OC_IE ,External Low Side 1 FET Over-current Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " HS3_DS_IE ,Bridge Driver High Side 3 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " LS3_DS_IE ,Bridge Driver Low Side 3 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " HS2_DS_IE ,Bridge Driver High Side 2 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " HS1_DS_IE ,Bridge Driver High Side 1 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " LS2_DS_IE ,Bridge Driver Low Side 2 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS1_DS_IE ,Bridge Driver Low Side 1 Pre-Driver Short Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "SCUPM_SYS_SUPPLY_IRQ_CTRL,System Supply Interrupt Control"
|
|
bitfld.long 0x00 7. " VDD1V5_OV_IE ,VDD1V5 Overvoltage (ADC2 channel 8) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " VDD5V_OV_IE ,VDD5V Overvoltage (ADC2 channel 5) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " VS_OV_IE ,VS Overvoltage (ADC2 channel 1) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MON_OV_IE ,MON Overvoltage (ADC2 channel 4) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " VDD1V5_UV_IE ,VDD1V5 Undervoltage (ADC2 channel 8) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " VDD5V_UV_IE ,VDD5V Undervoltage (ADC2 channel 5) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " VS_UV_IE ,VS Undervoltage (ADC2 channel 1) Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MON_UV_IE ,MON Undervoltage (ADC2 channel 4) Interrupt Enable" "Disabled,Enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "SCUPM_PCU_CTRL_STS,Power Control Unit Control Status Register"
|
|
bitfld.long 0x00 26. " CLKWDT_RES_SD_DIS ,Clock Watchdog Reset Disable" "No,Yes"
|
|
bitfld.long 0x00 25. " CLKLOSS_SD_DIS ,Power Switches Loss of Clock Shutdown Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 24. " SYS_OT_PS_DIS ,System Overtemperature Power Switches Shutdown Disable" "No,Yes"
|
|
bitfld.long 0x00 14. " SYS_VSD_OV_SLM_DIS ,VSD Overvoltage Shutdown for Peripherals Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LIN_VS_UV_SD_DIS ,LIN Module VS Undervoltage Transmitter Shutdown" "No,Yes"
|
|
bitfld.long 0x00 7. " FAIL_PS_DIS ,Disable LIN, BDRV and CP because of Overtemperature" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CLKWDT_SD_DIS ,Power Modules Clock Watchdog Shutdown Disable" "No,Yes"
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "SCUPM_BFSTS,Bus Fault Status Register"
|
|
bitfld.long 0x00 1. " SBFSTS ,System Bus Fault Status Valid Flag" "Not valid,Valid"
|
|
bitfld.long 0x00 0. " DBFSTS ,Data Bus Fault Status Valid Flag" "Not valid,Valid"
|
|
wgroup.long 0x8C++0x03
|
|
line.long 0x00 "SCUPM_BFSTS_CLR,Bus Fault Status Clear Register"
|
|
bitfld.long 0x00 1. " SBFSTSCLR ,System Bus Fault Status Clear Flag" "No effect,Clear"
|
|
bitfld.long 0x00 0. " DBFSTSCLR ,Data Bus Fault Status Clear Flag" "No effect,Clear"
|
|
hgroup.long 0x84++0x07
|
|
hide.long 0x00 "SCUPM_DBFA,Data Bus Fault Address Register"
|
|
hide.long 0x04 "SCUPM_SBFA,System Bus Fault Address Register"
|
|
width 0x0b
|
|
tree.end
|
|
tree "DMA Controller"
|
|
base ad:0x50014000
|
|
width 23.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS,DMA Status"
|
|
bitfld.long 0x00 16.--20. " CHNLS_MINUS1 ,Available channels minus 1" "1,2,3,4,5,6,7,8,9,10,11,12,13,?..."
|
|
bitfld.long 0x00 4.--7. " STATE ,Current state of the control state machine" "Idle,Reading channel controller date,Reading source data end pointer,Reading destination data end pointer,Reading source data,Writing destination data,Waiting for DMA request to clear,Writing channel controller data,Stalled,Done,Peripheral scatter-gather transition,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0. " MASTER_ENABLE ,Enable status of the controller" "Disabled,Enabled"
|
|
wgroup.long 0x04++0x03
|
|
line.long 0x00 "CFG,DMA Configuration"
|
|
bitfld.long 0x00 7. " CHN1_PROT_CTRL[3] ,CHN1_PROT_CTRL bit 3" "Low,High"
|
|
bitfld.long 0x00 6. " CHN1_PROT_CTRL[2] ,CHN1_PROT_CTRL bit 2" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CHN1_PROT_CTRL[1] ,CHN1_PROT_CTRL bit 1" "Low,High"
|
|
bitfld.long 0x00 0. " MASTER_ENABLE ,Enable for the controller" "Disabled,Enabled"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL_BASE_PTR,Channel Control Data Base Pointer"
|
|
hexmask.long.tbyte 0x00 9.--31. 0x02 " CTRL_BASE_PTR ,Pointer to the base address of the primary data structure"
|
|
rgroup.long 0x0C++0x07
|
|
line.long 0x00 "ALT_CTRL_BASE_PTR,Base Address Of The Alternate Data Structure"
|
|
line.long 0x04 "WAITONREQ_STATUS,Channel Wait On Request Status"
|
|
bitfld.long 0x04 13. " WAITONREQ_STATUS[13] ,Channel 13 wait on request status" "Low,High"
|
|
bitfld.long 0x04 12. " WAITONREQ_STATUS[12] ,Channel 12 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 11. " WAITONREQ_STATUS[11] ,Channel 11 wait on request status" "Low,High"
|
|
bitfld.long 0x04 10. " WAITONREQ_STATUS[10] ,Channel 10 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 9. " WAITONREQ_STATUS[9] ,Channel 9 wait on request status" "Low,High"
|
|
bitfld.long 0x04 8. " WAITONREQ_STATUS[8] ,Channel 8 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 7. " WAITONREQ_STATUS[7] ,Channel 7 wait on request status" "Low,High"
|
|
bitfld.long 0x04 6. " WAITONREQ_STATUS[6] ,Channel 6 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 5. " WAITONREQ_STATUS[5] ,Channel 5 wait on request status" "Low,High"
|
|
bitfld.long 0x04 4. " WAITONREQ_STATUS[4] ,Channel 4 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 3. " WAITONREQ_STATUS[3] ,Channel 3 wait on request status" "Low,High"
|
|
bitfld.long 0x04 2. " WAITONREQ_STATUS[2] ,Channel 2 wait on request status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x04 1. " WAITONREQ_STATUS[1] ,Channel 1 wait on request status" "Low,High"
|
|
bitfld.long 0x04 0. " WAITONREQ_STATUS[0] ,Channel 0 wait on request status" "Low,High"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "CHNL_SW_REQUEST,Channel Software Request"
|
|
bitfld.long 0x00 13. " CHNL_SW_REQUEST[13] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 12. " CHNL_SW_REQUEST[12] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CHNL_SW_REQUEST[11] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 10. " CHNL_SW_REQUEST[10] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CHNL_SW_REQUEST[9] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 8. " CHNL_SW_REQUEST[8] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CHNL_SW_REQUEST[7] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 6. " CHNL_SW_REQUEST[6] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CHNL_SW_REQUEST[5] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 4. " CHNL_SW_REQUEST[4] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CHNL_SW_REQUEST[3] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 2. " CHNL_SW_REQUEST[2] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHNL_SW_REQUEST[1] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
bitfld.long 0x00 0. " CHNL_SW_REQUEST[0] ,Set the bit to generate a software DMA request" "No effect,Request"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "CHNL_USEBURST_SET/CLR,Returns The Useburst Status Or Disables Dma_sreq[c] Fromgenerating DMA Requests"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CHNL_USEBURST_SET[13] ,Useburst status/Disables dma_sreq[13] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CHNL_USEBURST_SET[12] ,Useburst status/Disables dma_sreq[12] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " CHNL_USEBURST_SET[11] ,Useburst status/Disables dma_sreq[11] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " CHNL_USEBURST_SET[10] ,Useburst status/Disables dma_sreq[10] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " CHNL_USEBURST_SET[9] ,Useburst status/Disables dma_sreq[9] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " CHNL_USEBURST_SET[8] ,Useburst status/Disables dma_sreq[8] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CHNL_USEBURST_SET[7] ,Useburst status/Disables dma_sreq[7] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CHNL_USEBURST_SET[6] ,Useburst status/Disables dma_sreq[6] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CHNL_USEBURST_SET[5] ,Useburst status/Disables dma_sreq[5] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CHNL_USEBURST_SET[4] ,Useburst status/Disables dma_sreq[4] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CHNL_USEBURST_SET[3] ,Useburst status/Disables dma_sreq[3] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " CHNL_USEBURST_SET[2] ,Useburst status/Disables dma_sreq[2] " "Responded/No,Not responded/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CHNL_USEBURST_SET[1] ,Useburst status/Disables dma_sreq[1] " "Responded/No,Not responded/Yes"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CHNL_USEBURST_SET[0] ,Useburst status/Disables dma_sreq[0] " "Responded/No,Not responded/Yes"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "CHNL_REQ_MASK_SET/CLR,Returns the request mask status of dma_req[C] and dma_sreq[C] or disables the corresponding channel from generating DMA requests"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 14. " CHNL_REQ_MASK_SET[13] ,Request status/Disable dma_req[13] and dma_sreq[13]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CHNL_REQ_MASK_SET[12] ,Request status/Disable dma_req[12] and dma_sreq[12]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " CHNL_REQ_MASK_SET[11] ,Request status/Disable dma_req[11] and dma_sreq[11]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " CHNL_REQ_MASK_SET[10] ,Request status/Disable dma_req[10] and dma_sreq[10]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " CHNL_REQ_MASK_SET[9] ,Request status/Disable dma_req[9] and dma_sreq[9]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " CHNL_REQ_MASK_SET[8] ,Request status/Disable dma_req[8] and dma_sreq[8]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CHNL_REQ_MASK_SET[7] ,Request status/Disable dma_req[7] and dma_sreq[7]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CHNL_REQ_MASK_SET[6] ,Request status/Disable dma_req[6] and dma_sreq[6]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CHNL_REQ_MASK_SET[5] ,Request status/Disable dma_req[5] and dma_sreq[5]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CHNL_REQ_MASK_SET[4] ,Request status/Disable dma_req[4] and dma_sreq[4]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CHNL_REQ_MASK_SET[3] ,Request status/Disable dma_req[3] and dma_sreq[3]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " CHNL_REQ_MASK_SET[2] ,Request status/Disable dma_req[2] and dma_sreq[2]" "Enabled/No,Disabled/Yes"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CHNL_REQ_MASK_SET[1] ,Request status/Disable dma_req[1] and dma_sreq[1]" "Enabled/No,Disabled/Yes"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CHNL_REQ_MASK_SET[0] ,Request status/Disable dma_req[0] and dma_sreq[0]" "Enabled/No,Disabled/Yes"
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "CHNL_ENABLE_SET/CLR,Returns the enable status of the channels"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CHNL_ENABLE_SET[13] ,Channel 13 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CHNL_ENABLE_SET[12] ,Channel 12 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " CHNL_ENABLE_SET[11] ,Channel 11 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " CHNL_ENABLE_SET[10] ,Channel 10 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " CHNL_ENABLE_SET[9] ,Channel 9 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " CHNL_ENABLE_SET[8] ,Channel 8 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CHNL_ENABLE_SET[7] ,Channel 7 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CHNL_ENABLE_SET[6] ,Channel 6 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CHNL_ENABLE_SET[5] ,Channel 5 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CHNL_ENABLE_SET[4] ,Channel 4 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CHNL_ENABLE_SET[3] ,Channel 3 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x00 2. " CHNL_ENABLE_SET[2] ,Channel 2 status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CHNL_ENABLE_SET[1] ,Channel 1 status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CHNL_ENABLE_SET[0] ,Channel 0 status" "Disabled,Enabled"
|
|
group.long 0x30++0x03
|
|
line.long 0x00 "CHNL_PRI_ALT_SET/CLR,Returns the channel control data structure status"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CHNL_PRI_ALT_SET[13] ,Channel 13 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CHNL_PRI_ALT_SET[12] ,Channel 12 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " CHNL_PRI_ALT_SET[11] ,Channel 11 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " CHNL_PRI_ALT_SET[10] ,Channel 10 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " CHNL_PRI_ALT_SET[9] ,Channel 9 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " CHNL_PRI_ALT_SET[8] ,Channel 8 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CHNL_PRI_ALT_SET[7] ,Channel 7 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CHNL_PRI_ALT_SET[6] ,Channel 6 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CHNL_PRI_ALT_SET[5] ,Channel 5 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CHNL_PRI_ALT_SET[4] ,Channel 4 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CHNL_PRI_ALT_SET[3] ,Channel 3 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " CHNL_PRI_ALT_SET[2] ,Channel 2 data structure" "Primary,Alternate"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CHNL_PRI_ALT_SET[1] ,Channel 1 data structure" "Primary,Alternate"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CHNL_PRI_ALT_SET[0] ,Channel 0 data structure" "Primary,Alternate"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "CHNL_PRIORITY_SET/CLR,Returns the channel priority mask status"
|
|
setclrfld.long 0x00 13. 0x00 13. 0x04 13. " CHNL_PRIORITY_SET[13] ,Priority for channnel 13 state" "Default,High"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x04 12. " CHNL_PRIORITY_SET[12] ,Priority for channnel 12 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x00 11. 0x04 11. " CHNL_PRIORITY_SET[11] ,Priority for channnel 11 state" "Default,High"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x04 10. " CHNL_PRIORITY_SET[10] ,Priority for channnel 10 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 9. 0x00 9. 0x04 9. " CHNL_PRIORITY_SET[9] ,Priority for channnel 9 state" "Default,High"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x04 8. " CHNL_PRIORITY_SET[8] ,Priority for channnel 8 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x04 7. " CHNL_PRIORITY_SET[7] ,Priority for channnel 7 state" "Default,High"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x04 6. " CHNL_PRIORITY_SET[6] ,Priority for channnel 6 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 5. 0x00 5. 0x04 5. " CHNL_PRIORITY_SET[5] ,Priority for channnel 5 state" "Default,High"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x04 4. " CHNL_PRIORITY_SET[4] ,Priority for channnel 4 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CHNL_PRIORITY_SET[3] ,Priority for channnel 3 state" "Default,High"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x04 2. " CHNL_PRIORITY_SET[2] ,Priority for channnel 2 state" "Default,High"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x04 1. " CHNL_PRIORITY_SET[1] ,Priority for channnel 1 state" "Default,High"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CHNL_PRIORITY_SET[0] ,Priority for channnel 0 state" "Default,High"
|
|
group.long 0x4C++0x03
|
|
line.long 0x00 "ERR_CLR,Bus Error Clear"
|
|
bitfld.long 0x00 0. " ERR_CLR ,Returns the status of dma_err or sets the signal LOW (Read/write)" "Low/no effect,High/set(low)"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Interrupt System"
|
|
base ad:0x50005000
|
|
width 8.
|
|
tree "Interrupt Node Enable Registers"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "IEN0,Interrupt Enable Register 0"
|
|
bitfld.byte 0x00 7. " EA ,Global interrupt mask" "Disabled,Enabled"
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "NMICON,NMI Control Register"
|
|
bitfld.byte 0x00 7. " NMISUP ,Supply prewarning NMI enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " NMIECC ,ECC error NMI enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " NMIMAP ,NVM map error NMI enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " NMIOWD ,Oscillator watchdog NMI enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " NMIOT ,NMI OT enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " NMINVM ,NVM operation complete NMI enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NMIPLL ,PLL loss of lock NMI enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " NMIWDT ,Watchdog timer NMI enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 9.
|
|
tree "External Interrupt Control Registers"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "EXICON0,External Interrupt Control Register 0"
|
|
bitfld.byte 0x00 6.--7. " MON ,MON input trigger select" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.byte 0x00 4.--5. " EXINT2 ,External interrupt 2 trigger select" "Disabled,Rising edge,Falling edge,Both edges"
|
|
textline " "
|
|
bitfld.byte 0x00 2.--3. " EXINT1 ,External interrupt 1 trigger select" "Disabled,Rising edge,Falling edge,Both edges"
|
|
bitfld.byte 0x00 0.--1. " EXINT0 ,External interrupt 0 trigger select" "Disabled,Rising edge,Falling edge,Both edges"
|
|
tree.end
|
|
width 12.
|
|
tree "Interrupt Flag Registers"
|
|
rgroup.byte 0x04++0x00
|
|
line.byte 0x00 "IRCON0,Interrupt Request Register 0"
|
|
bitfld.byte 0x00 7. " MONF ,Interrupt Flag for External Interrupt MON on falling edge" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " MONR ,Interrupt flag for external interrupt MON on rising edge" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " EXINT2F ,Interrupt flag for external interrupt 2x on falling edge" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " EXINT2R ,Interrupt flag for external interrupt 2x on rising edge" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXINT1F ,Interrupt flag for external interrupt 1x on falling edge" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " EXINT1R ,Interrupt flag for external interrupt 1x on rising edge" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " EXINT0F ,Interrupt flag for external interrupt 0x on falling edge" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " EXINT0R ,Interrupt flag for external interrupt 0x on rising edge" "No interrupt,Interrupt"
|
|
wgroup.byte 0x2C++0x00
|
|
line.byte 0x00 "IRCON0CLR,Interrupt Request 0 Clear Register"
|
|
bitfld.byte 0x00 7. " MONFC ,Interrupt flag for external interrupt MON on falling edge clear" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " MONRC ,Interrupt flag for external interrupt MON on rising edge clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " EXINT2FC ,Interrupt flag for external interrupt 2x on falling edge clear" "No effect,Clear"
|
|
bitfld.byte 0x00 4. " EXINT2RC ,Interrupt flag for external interrupt 2x on rising edge clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " EXINT1FC ,Interrupt flag for external interrupt 1x on falling edge clear" "No effect,Clear"
|
|
bitfld.byte 0x00 2. " EXINT1RC ,Interrupt flag for external interrupt 1x on rising edge clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " EXINT0FC ,Interrupt flag for external interrupt 0x on falling edge clear" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " EXINT0RC ,Interrupt flag for external interrupt 0x on rising edge clear" "No effect,Clear"
|
|
rgroup.byte 0x08++0x00
|
|
line.byte 0x00 "IRCON1,Interrupt Request Register 1"
|
|
bitfld.byte 0x00 2. " RIR ,Receive interrupt flag for SSC1" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " TIR ,Transmit interrupt flag for SSC1" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EIR ,Error interrupt flag for SSC1" "No interrupt,Interrupt"
|
|
wgroup.byte 0x178++0x00
|
|
line.byte 0x00 "IRCON1CLR,Interrupt Request 1 Clear Register"
|
|
bitfld.byte 0x00 2. " RIRC ,Receive interrupt flag for SSC1 clear" "No effect,Clear"
|
|
bitfld.byte 0x00 1. " TIRC ,Transmit interrupt flag for SSC1 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EIRC ,Error interrupt flag for SSC1 clear" "No effect,Clear"
|
|
rgroup.byte 0x0C++0x00
|
|
line.byte 0x00 "IRCON2,Interrupt Request Register 2"
|
|
bitfld.byte 0x00 2. " RIR ,Receive interrupt flag for SSC2" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 1. " TIR ,Transmit interrupt flag for SSC2" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EIR ,Error interrupt flag for SSC2" "No interrupt,Interrupt"
|
|
wgroup.byte 0x17C++0x00
|
|
line.byte 0x00 "IRCON2CLR,Interrupt Request 2 Clear Register"
|
|
bitfld.byte 0x00 2. " RIRC ,Receive interrupt flag for SSC2 clear" "No effect,Clear"
|
|
bitfld.byte 0x00 1. " TIRC ,Transmit interrupt flag for SSC2 clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EIRC ,Error interrupt flag for SSC2 clear" "No effect,Clear"
|
|
rgroup.byte 0x10++0x00
|
|
line.byte 0x00 "IRCON3,Interrupt Request Register 3"
|
|
bitfld.byte 0x00 4. " CCU6SR1 ,Interrupt flag 1 for CCU6" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " CCU6SR0 ,Interrupt flag 0 for CCU6" "No interrupt,Interrupt"
|
|
wgroup.byte 0x190++0x00
|
|
line.byte 0x00 "IRCON3CLR,Interrupt Request 3 Clear Register"
|
|
bitfld.byte 0x00 4. " CCU6SR1C ,Interrupt flag 1 for CCU6 clear" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " CCU6SR0C ,Interrupt flag 0 for CCU6 clear" "No effect,Clear"
|
|
rgroup.byte 0x14++0x00
|
|
line.byte 0x00 "IRCON4,Interrupt Request Register 4"
|
|
bitfld.byte 0x00 4. " CCU6SR3 ,Interrupt flag 3 for CCU6" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " CCU6SR2 ,Interrupt flag 2 for CCU6" "No interrupt,Interrupt"
|
|
wgroup.byte 0x194++0x00
|
|
line.byte 0x00 "IRCON4CLR,Interrupt Request 4 Clear Register"
|
|
bitfld.byte 0x00 4. " CCU6SR3C ,Interrupt flag 3 for CCU6 clear" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " CCU6SR2C ,Interrupt flag 2 for CCU6 clear" "No effect,Clear"
|
|
rgroup.byte 0x160++0x00
|
|
line.byte 0x00 "GPT12IRC,Timer And Counter Control/status Register"
|
|
bitfld.byte 0x00 5. " CR ,GPT module 2 capture reload interrupt status" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " T6 ,GPT module 2 timer6 interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " T5 ,GPT module 2 timer5 interrupt status" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 2. " T4 ,GPT module 1 timer4 interrupt status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " T3 ,GPT module 1 timer3 interrupt status" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " T2 ,GPT module 1 timer2 interrupt status" "Not occurred,Occurred"
|
|
wgroup.byte 0x164++0x00
|
|
line.byte 0x00 "GPT12ICLR,Timer And Counter Control/status Clear Register"
|
|
bitfld.byte 0x00 5. " CRC ,GPT module 2 capture reload interrupt status clear" "No effect,Clear"
|
|
bitfld.byte 0x00 4. " T6C ,GPT module 2 timer6 interrupt status clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " T5C ,GPT module 2 timer5 interrupt status clear" "No effect,Clear"
|
|
bitfld.byte 0x00 2. " T4C ,GPT module 1 timer4 interrupt status clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " T3C ,GPT module 1 timer3 interrupt status clear" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " T2C ,GPT module 1 timer2 interrupt status clear" "No effect,Clear"
|
|
rgroup.byte 0x154++0x00
|
|
line.byte 0x00 "DMAIRC1,DMA Interrupt Control Register 1"
|
|
bitfld.byte 0x00 7. " CH8 ,DMA ADC channel 8 interrupt status (Dma channel 11)" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 6. " CH7 ,DMA ADC channel 7 interrupt status (Dma channel 10)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " CH6 ,DMA ADC channel 6 interrupt status (Dma channel 9)" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " CH5 ,DMA ADC channel 5 interrupt status (Dma channel 8)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " CH4 ,DMA ADC channel 4 interrupt status (Dma channel 7)" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " CH3 ,DMA ADC channel 3 interrupt status (Dma channel 6)" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CH2 ,DMA ADC channel 2 interrupt status (Dma channel 5)" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " CH1 ,DMA ADC channel 1 interrupt status (Dma channel 4)" "No interrupt,Interrupt"
|
|
wgroup.long 0x184++0x03
|
|
line.long 0x00 "DMAIRC1CLR,DMA Interrupt Control 1 Clear Register"
|
|
bitfld.long 0x00 7. " CH8 ,DMA ADC channel 8 interrupt status clear (Dma channel 11)" "No effect,Clear"
|
|
bitfld.long 0x00 6. " CH7 ,DMA ADC channel 7 interrupt status clear (Dma channel 10)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CH6 ,DMA ADC channel 6 interrupt status clear (Dma channel 9)" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CH5 ,DMA ADC channel 5 interrupt status clear (Dma channel 8)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,DMA ADC channel 4 interrupt status clear (Dma channel 7)" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CH3 ,DMA ADC channel 3 interrupt status clear (Dma channel 6)" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH2 ,DMA ADC channel 2 interrupt status clear (Dma channel 5)" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CH1 ,DMA ADC channel 1 interrupt status clear (Dma channel 4)" "No effect,Clear"
|
|
rgroup.byte 0x158++0x00
|
|
line.byte 0x00 "DMAIRC2,ADC1 Interrupt Control Register 2"
|
|
bitfld.byte 0x00 5. " GPT12 ,DMA GPT12 transfer ready" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 4. " SSC2 ,DMA SSC2 transfer ready" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SSC1 ,DMA SSC1 transfer ready" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 2. " TRSEQ2DY ,DMA transfer sequence 2 ready" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TRSEQ1DY ,DMA transfer sequence 1 ready" "No interrupt,Interrupt"
|
|
bitfld.byte 0x00 0. " STRDY ,DMA single transfer ready" "No interrupt,Interrupt"
|
|
wgroup.byte 0x188++0x00
|
|
line.byte 0x00 "DMAIRC2CLR,ADC1 Interrupt Control 2 Clear Register"
|
|
bitfld.byte 0x00 5. " GPT12C ,DMA GPT12 transfer ready clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 4. " SSC2C ,DMA SSC2 transfer ready clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " SSC1C ,DMA SSC1 transfer ready clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 2. " TRSEQ2DYC ,DMA transfer sequence 2 ready clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " TRSEQ1DYC ,DMA transfer sequence 1 ready clear" "Not cleared,Cleared"
|
|
; group.byte 0x00++0x00
|
|
; line.byte 0x00 "SCON1,UART1 Control/status Register"
|
|
; bitfld.byte 0x00 1. " TI ,Serial interface transmitter interrupt flag" "No interrupt,Interrupt"
|
|
; bitfld.byte 0x00 0. " RI ,Serial interface receiver interrupt flag" "No interrupt,Interrupt"
|
|
; group.byte 0x00++0x00
|
|
; line.byte 0x00 "SCON2,UART2 Control/status Register"
|
|
; bitfld.byte 0x00 1. " TI ,Serial interface transmitter interrupt flag" "No interrupt,Interrupt"
|
|
; bitfld.byte 0x00 0. " RI ,Serial interface receiver interrupt flag" "No interrupt,Interrupt"
|
|
rgroup.byte 0x18++0x00
|
|
line.byte 0x00 "NMISR,NMI Status Register"
|
|
bitfld.byte 0x00 7. " FNMISUP ,Supply prewarning NMI flag" "No supply,Supply"
|
|
bitfld.byte 0x00 6. " FNMIECC ,ECC error NMI flag" "No error,Error"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " FNMIMAP ,NVM map error NMI flag" "No error,Error"
|
|
bitfld.byte 0x00 4. " FNMIOWD ,Oscillator watchdog or MI_CLK watchdog NMI flag" "Not occured,Occured"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " FNMIOT ,Over-temperature NMI flag" "Not occured,Occured"
|
|
bitfld.byte 0x00 2. " FNMINVM ,NVM operation complete NMI flag" "Not set,Set"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " FNMIPLL ,PLL NMI flag" "Not occured,Occured"
|
|
bitfld.byte 0x00 0. " FNMIWDT ,Watchdog timer NMI flag" "Not occured,Occured"
|
|
wgroup.byte 0x00++0x00
|
|
line.byte 0x00 "NMICLR,NMI Clear Register"
|
|
bitfld.byte 0x00 7. " NMISUPC ,Supply prewarning NMI clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 6. " NMIECCC ,ECC error NMI clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " NMIMAPC ,NVM map error NMI clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 4. " NMIOWDC ,Oscillator watchdog NMI clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " NMIOTC ,NMI OT clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 2. " NMINVMC ,NVM operation complete NMI clear" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " NMIPLLC ,PLL loss of lock NMI clear" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 0. " NMIWDTC ,Watchdog timer NMI clear" "Not cleared,Cleared"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "WDT1 (Watchdog Timer)"
|
|
base ad:0x50006000
|
|
width 11.
|
|
group.long 0x34++0x03
|
|
line.long 0x00 "WDT1_TRIG,WDT1 Watchdog Control"
|
|
bitfld.long 0x00 6.--7. " SOWCONF ,Short Open Window Configuration" "DIS,SOW1,SOW2,SOW3"
|
|
bitfld.long 0x00 0.--5. " WDP_SEL ,Watchdog Period Selection and trigger" "SOW_TRIG,WP_1,WP_2,WP_3,WP_4,WP_5,WP_6,WP_7,WP_8,WP_9,WP_10,WP_11,WP_12,WP_13,WP_14,WP_15,WP_16,WP_17,WP_18,WP_19,WP_20,WP_21,WP_22,WP_23,WP_24,WP_25,WP_26,WP_27,WP_28,WP_29,WP_30,WP_31,WP_32,WP_33,WP_34,WP_35,WP_36,WP_37,WP_38,WP_39,WP_40,WP_41,WP_42,WP_43,WP_44,WP_45,WP_46,WP_47,WP_48,WP_49,WP_50,WP_51,WP_52,WP_53,WP_54,WP_55,WP_56,WP_57,WP_58,WP_59,WP_60,WP_61,WP_62,WP_63"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "GPIO (TLE987xQX Port Registers)"
|
|
tree "Port 0"
|
|
base ad:0x48028000
|
|
width 12.
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "P0_DATA,Port 0 Data Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 0 pin 4 data value" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Port 0 pin 3 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 0 pin 2 data value" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Port 0 pin 1 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 0 pin 0 data value" "0,1"
|
|
group.byte 0x04++0x00
|
|
line.byte 0x00 "P0_DIR,Port 0 Direction Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 0 pin 4 direction control" "Input,Output"
|
|
bitfld.byte 0x00 3. " P3 ,Port 0 pin 3 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 0 pin 2 direction control" "Input,Output"
|
|
bitfld.byte 0x00 1. " P1 ,Port 0 pin 1 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 0 pin 0 direction control" "Input,Output"
|
|
group.byte 0x40++0x00
|
|
line.byte 0x00 "P0_OD,Port 0 Open Drain Control Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 0 Pin 4 Open Drain Mode" "Normal,Open drain"
|
|
bitfld.byte 0x00 3. " P3 ,Port 0 Pin 3 Open Drain Mode" "Normal,Open drain"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 0 Pin 2 Open Drain Mode" "Normal,Open drain"
|
|
bitfld.byte 0x00 1. " P1 ,Port 0 Pin 1 Open Drain Mode" "Normal,Open drain"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 0 Pin 0 Open Drain Mode" "Normal,Open drain"
|
|
group.byte 0x18++0x00
|
|
line.byte 0x00 "P0_PUDSEL,Port 0 Pull-Up/Pull-Down Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Select Port 0 Bit 4" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Select Port 0 Bit 3" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Select Port 0 Bit 2" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Select Port 0 Bit 1" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Select Port 0 Bit 0" "Pull-down,Pull-up"
|
|
group.byte 0x1C++0x00
|
|
line.byte 0x00 "P0_PUDEN,Port 0 Pull-Up/Pull-Down Enable Register"
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Enable at Port 0 Bit 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Enable at Port 0 Bit 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Enable at Port 0 Bit 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Enable at Port 0 Bit 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Enable at Port 0 Bit 0" "Disabled,Enabled"
|
|
group.byte 0x30++0x00
|
|
line.byte 0x00 "P0_ALTSEL0,Port 0 Alternate Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Alternate Select Port 0 Bit 4" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Alternate Select Port 0 Bit 3" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Alternate Select Port 0 Bit 2" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Alternate Select Port 0 Bit 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Alternate Select Port 0 Bit 0" "0,1"
|
|
group.byte 0x34++0x00
|
|
line.byte 0x00 "P0_ALTSEL1,Port 0 Alternate Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Alternate Select Port 0 Bit 4" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Alternate Select Port 0 Bit 3" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Alternate Select Port 0 Bit 2" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Alternate Select Port 0 Bit 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Alternate Select Port 0 Bit 0" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Port 1"
|
|
base ad:0x48028000
|
|
width 12.
|
|
group.byte 0x08++0x00
|
|
line.byte 0x00 "P1_DATA,Port 1 Data Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 1 pin 4 data value" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Port 1 pin 3 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 1 pin 2 data value" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Port 1 pin 1 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 1 pin 0 data value" "0,1"
|
|
group.byte 0x0C++0x00
|
|
line.byte 0x00 "P1_DIR,Port 1 Direction Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 1 pin 4 direction control" "Input,Output"
|
|
bitfld.byte 0x00 3. " P3 ,Port 1 pin 3 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 1 pin 2 direction control" "Input,Output"
|
|
bitfld.byte 0x00 1. " P1 ,Port 1 pin 1 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 1 pin 0 direction control" "Input,Output"
|
|
group.byte 0x44++0x00
|
|
line.byte 0x00 "P1_OD,Port 1 Open Drain Control Register"
|
|
bitfld.byte 0x00 4. " P4 ,Port 1 Pin 4 Open Drain Mode" "Normal,Open drain"
|
|
bitfld.byte 0x00 3. " P3 ,Port 1 Pin 3 Open Drain Mode" "Normal,Open drain"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 1 Pin 2 Open Drain Mode" "Normal,Open drain"
|
|
bitfld.byte 0x00 1. " P1 ,Port 1 Pin 1 Open Drain Mode" "Normal,Open drain"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 1 Pin 0 Open Drain Mode" "Normal,Open drain"
|
|
group.byte 0x20++0x00
|
|
line.byte 0x00 "P1_PUDSEL,Port 1 Pull-Up/Pull-Down Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Select Port 1 Bit 4" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Select Port 1 Bit 3" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Select Port 1 Bit 2" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Select Port 1 Bit 1" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Select Port 1 Bit 0" "Pull-down,Pull-up"
|
|
group.byte 0x24++0x00
|
|
line.byte 0x00 "P1_PUDEN,Port 1 Pull-Up/Pull-Down Enable Register"
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Enable at Port 1 Bit 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Enable at Port 1 Bit 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Enable at Port 1 Bit 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Enable at Port 1 Bit 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Enable at Port 1 Bit 0" "Disabled,Enabled"
|
|
group.byte 0x38++0x00
|
|
line.byte 0x00 "P1_ALTSEL0,Port 1 Alternate Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Alternate Select Port 1 Bit 4" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Alternate Select Port 1 Bit 3" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Alternate Select Port 1 Bit 2" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Alternate Select Port 1 Bit 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Alternate Select Port 1 Bit 0" "0,1"
|
|
group.byte 0x3C++0x00
|
|
line.byte 0x00 "P1_ALTSEL1,Port 1 Alternate Select Register"
|
|
bitfld.byte 0x00 4. " P4 ,Alternate Select Port 1 Bit 4" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Alternate Select Port 1 Bit 3" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Alternate Select Port 1 Bit 2" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Alternate Select Port 1 Bit 1" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Alternate Select Port 1 Bit 0" "0,1"
|
|
width 0x0B
|
|
tree.end
|
|
tree "Port 2"
|
|
base ad:0x48028000
|
|
width 11.
|
|
group.byte 0x10++0x00
|
|
line.byte 0x00 "P2_DATA,Port 2 Data Register"
|
|
bitfld.byte 0x00 5. " P5 ,Port 2 Pin 5 Data Value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,Port 2 pin 4 data value" "0,1"
|
|
bitfld.byte 0x00 3. " P3 ,Port 2 pin 3 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 2 pin 2 data value" "0,1"
|
|
bitfld.byte 0x00 1. " P1 ,Port 2 pin 1 data value" "0,1"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 2 pin 0 data value" "0,1"
|
|
group.byte 0x14++0x00
|
|
line.byte 0x00 "P2_DIR,Port 2 Direction Register"
|
|
bitfld.byte 0x00 5. " P5 ,Port 2 pin 5 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,Port 2 pin 4 direction control" "Input,Output"
|
|
bitfld.byte 0x00 3. " P3 ,Port 2 pin 3 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Port 2 pin 2 direction control" "Input,Output"
|
|
bitfld.byte 0x00 1. " P1 ,Port 2 pin 1 direction control" "Input,Output"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Port 2 pin 0 direction control" "Input,Output"
|
|
group.byte 0x28++0x00
|
|
line.byte 0x00 "P2_PUDSEL,Port 2 Pull-Up/Pull-Down Select Register"
|
|
bitfld.byte 0x00 5. " P5 ,Pull-Up/Pull-Down Select Port 2 Bit 5" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Select Port 2 Bit 4" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Select Port 2 Bit 3" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Select Port 2 Bit 2" "Pull-down,Pull-up"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Select Port 2 Bit 1" "Pull-down,Pull-up"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Select Port 2 Bit 0" "Pull-down,Pull-up"
|
|
group.byte 0x2C++0x00
|
|
line.byte 0x00 "P2_PUDEN,Port 2 Pull-Up/Pull-Down Enable Register"
|
|
bitfld.byte 0x00 5. " P5 ,Pull-Up/Pull-Down Enable at Port 2 Bit 5" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P4 ,Pull-Up/Pull-Down Enable at Port 2 Bit 4" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P3 ,Pull-Up/Pull-Down Enable at Port 2 Bit 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " P2 ,Pull-Up/Pull-Down Enable at Port 2 Bit 2" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1 ,Pull-Up/Pull-Down Enable at Port 2 Bit 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " P0 ,Pull-Up/Pull-Down Enable at Port 2 Bit 0" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree.open "GPT12 (General Purpose Timer Units)"
|
|
tree "GPT1"
|
|
base ad:0x40010000
|
|
width 14.
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "GPT12E_T2,Timer T2 Count Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "GPT12E_T3,Timer T3 Count Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "GPT12E_T4,Timer T4 Count Register"
|
|
if (((d.w(ad:0x40010000+0x0C))&0x38)==(0x00||0x10||0x18))
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "GPT12E_T3CON,Timer T3 Control Register"
|
|
rbitfld.word 0x00 15. " T3RDIR ,Timer T3 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T3CHDIR ,Timer T3 Count Direction Change Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T3EDGE ,Timer T3 Edge Detection Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 11.--12. " BPS1 ,GPT1 Block Prescaler Control" "/8,/4,/32,/16"
|
|
textline " "
|
|
bitfld.word 0x00 10. " T3OTL ,Timer T3 Overflow Toggle Latch" "0,1"
|
|
bitfld.word 0x00 9. " T3OE ,Overflow/Underflow Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " T3UDE ,Timer T3 External Up/Down Enable" "T3UD,T3EUD"
|
|
bitfld.word 0x00 7. " T3UD ,Timer T3 Up/Down Control" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 6. " T3R ,Timer T3 Input Run Bit" "Stop,Run"
|
|
bitfld.word 0x00 3.--5. " T3M ,Timer T3 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T3I ,Timer T3 Input Parameter Selection" "0,1,2,3,4,5,6,7"
|
|
elif (((d.w(ad:0x40010000+0x0C))&0x38)==(0x08))
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "GPT12E_T3CON,Timer T3 Control Register"
|
|
rbitfld.word 0x00 15. " T3DIR ,Timer T3 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T3CHDIR ,Timer T3 Count Direction Change Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T3EDGE ,Timer T3 Edge Detection Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 11.--12. " BPS1 ,GPT1 Block Prescaler Control" "/8,/4,/32,/16"
|
|
textline " "
|
|
bitfld.word 0x00 10. " T3OTL ,Timer T3 Overflow Toggle Latch" "0,1"
|
|
bitfld.word 0x00 9. " T3OE ,Overflow/Underflow Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " T3UDE ,Timer T3 External Up/Down Enable" "T3UD,T3EUD"
|
|
bitfld.word 0x00 7. " T3UD ,Timer T3 Up/Down Control" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 6. " T3R ,Timer T3 Input Run Bit" "Stop,Run"
|
|
bitfld.word 0x00 3.--5. " T3M ,Timer T3 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T3I ,Timer T3 Input Parameter Selection" "None,Positive transition,Negative transition,Any transition,?..."
|
|
else
|
|
group.word 0x0C++0x01
|
|
line.word 0x00 "GPT12E_T3CON,Timer T3 Control Register"
|
|
rbitfld.word 0x00 15. " T3DIR ,Timer T3 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T3CHDIR ,Timer T3 Count Direction Change Flag" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T3EDGE ,Timer T3 Edge Detection Flag" "No count,Count"
|
|
bitfld.word 0x00 11.--12. " BPS1 ,GPT1 Block Prescaler Control" "/8,/4,/32,/16"
|
|
textline " "
|
|
bitfld.word 0x00 10. " T3OTL ,Timer T3 Overflow Toggle Latch" "0,1"
|
|
bitfld.word 0x00 9. " T3OE ,Overflow/Underflow Output Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " T3UDE ,Timer T3 External Up/Down Enable" "T3UD,T3EUD"
|
|
bitfld.word 0x00 7. " T3UD ,Timer T3 Up/Down Control" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 6. " T3R ,Timer T3 Input Run Bit" "Stop,Run"
|
|
bitfld.word 0x00 3.--5. " T3M ,Timer T3 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T3I ,Timer T3 Input Parameter Selection" "None,Any transition(T3IN),Any transition(T3EUD),Any transition(Any),?..."
|
|
endif
|
|
if (((d.w(ad:0x40010000+0x08))&0x38)==(0x00||0x10||0x18))
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "GPT12E_T2CON,Timer T2 Control Register"
|
|
rbitfld.word 0x00 15. " T2DIR ,Timer T2 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T2CHDIR ,Timer T2 Count Direction Change Flag" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T2EDGE ,Timer T2 Edge Detection Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T2IRDIS ,Timer T2 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T2RC ,Timer T2 Remote Control" "T2R,T3R"
|
|
bitfld.word 0x00 8. " T2UDE ,Timer T2 External Up/Down Enable" "T2UD,T2EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T2UD ,Timer T2 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 6. " T2R ,Timer T2 Input Run Bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " T2M ,Timer T2 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
bitfld.word 0x00 0.--2. " T2I ,Timer T2 Input Parameter Selection" "0,1,2,3,4,5,6,7"
|
|
elif (((d.w(ad:0x40010000+0x08))&0x38)==(0x08))
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "GPT12E_T2CON,Timer T2 Control Register"
|
|
rbitfld.word 0x00 15. " T2DIR ,Timer T2 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T2CHDIR ,Timer T2 Count Direction Change Flag" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T2EDGE ,Timer T2 Edge Detection Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T2IRIDIS ,Timer T2 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T2RC ,Timer T2 Remote Control" "T2R,T3R"
|
|
bitfld.word 0x00 8. " T2UDE ,Timer T2 External Up/Down Enable" "T2UD,T2EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T2UD ,Timer T2 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 6. " T2R ,Timer T2 Input Run Bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " T2M ,Timer T2 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
bitfld.word 0x00 0.--2. " T2I ,Timer T2 Input Parameter Selection" "None,Positive transition,Negative transition,Any transition,?..."
|
|
else
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "GPT12E_T2CON,Timer T2 Control Register"
|
|
rbitfld.word 0x00 15. " T2DIR ,Timer T2 Rotation Direction Flag" "Up,Down"
|
|
bitfld.word 0x00 14. " T2CHDIR ,Timer T2 Count Direction Change Flag" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T2EDGE ,Timer T2 Edge Detection Flag" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T2IRIDIS ,Timer T2 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T2RC ,Timer T2 Remote Control" "T2R,T3R"
|
|
bitfld.word 0x00 8. " T2UDE ,Timer T2 External Up/Down Enable" "T2UD,T2EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T2UD ,Timer T2 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 6. " T2R ,Timer T2 Input Run Bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " T2M ,Timer T2 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
bitfld.word 0x00 0.--2. " T2I ,Timer T2 Input Parameter Selection" "None,Any transition(T3IN),Any transition(T3EUD),Any transition(Any),?..."
|
|
endif
|
|
if (((d.w(ad:0x40010000+0x10))&0x38)==(0x00||0x10||0x18))
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "GPT12E_T4CON,Timer T4 Control Register"
|
|
rbitfld.word 0x00 15. " T4RDIR ,Timer T4 Rotation Direction" "Up,Down"
|
|
bitfld.word 0x00 14. " T4CHDIR ,Timer T4 Count Direction Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T4EDGE ,Timer T4 Edge Detection" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T4IRDIS ,Timer T4 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLRT3EN ,Clear Timer T3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CLRT2EN ,Clear Timer T2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T4RC ,Timer T4 Remote Control" "T4R,T3R"
|
|
bitfld.word 0x00 8. " T4UDE ,Timer T4 External Up/Down Enable" "T4UD,T4EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T4UD ,Timer T4 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 3.--5. " T4M ,Timer T4 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T4I ,Timer T4 Input Parameter Selection" "0,1,2,3,4,5,6,7"
|
|
elif (((d.w(ad:0x40010000+0x10))&0x38)==(0x08))
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "GPT12E_T4CON,Timer T4 Control Register"
|
|
rbitfld.word 0x00 15. " T4RDIR ,Timer T4 Rotation Direction" "Up,Down"
|
|
bitfld.word 0x00 14. " T4CHDIR ,Timer T4 Count Direction Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T4EDGE ,Timer T4 Edge Detection" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T4IRDIS ,Timer T4 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLRT3EN ,Clear Timer T3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CLRT2EN ,Clear Timer T2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T4RC ,Timer T4 Remote Control" "T4R,T3R"
|
|
bitfld.word 0x00 8. " T4UDE ,Timer T4 External Up/Down Enable" "T4UD,T4EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T4UD ,Timer T4 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 3.--5. " T4M ,Timer T4 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T4I ,Timer T4 Input Parameter Selection" "None,Positive transition,Negative transition,Any transition,?..."
|
|
else
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "GPT12E_T4CON,Timer T4 Control Register"
|
|
rbitfld.word 0x00 15. " T4RDIR ,Timer T4 Rotation Direction" "Up,Down"
|
|
bitfld.word 0x00 14. " T4CHDIR ,Timer T4 Count Direction Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T4EDGE ,Timer T4 Edge Detection" "Not detected,Detected"
|
|
bitfld.word 0x00 12. " T4IRDIS ,Timer T4 Interrupt Disable" "No,Yes"
|
|
textline " "
|
|
bitfld.word 0x00 11. " CLRT3EN ,Clear Timer T3 Enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " CLRT2EN ,Clear Timer T2 Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T4RC ,Timer T4 Remote Control" "T4R,T3R"
|
|
bitfld.word 0x00 8. " T4UDE ,Timer T4 External Up/Down Enable" "T4UD,T4EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T4UD ,Timer T4 Up/Down Control" "Up,Down"
|
|
bitfld.word 0x00 3.--5. " T4M ,Timer T4 Input Mode Control" "Timer Mode,Counter Mode,Gated(active low),Gated(active high),,,Incremental Interface(rotation),Incremental Interface(edge)"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T4I ,Timer T4 Input Parameter Selection" "None,Any transition(T3IN),Any transition(T3EUD),Any transition(Any),?..."
|
|
endif
|
|
width 0x0b
|
|
tree.end
|
|
tree "GPT2"
|
|
base ad:0x40010000
|
|
width 15.
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "GPT12E_T5,Timer 5 Count Register"
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "GPT12E_T6,Timer 6 Count Register"
|
|
group.word 0x1C++0x01
|
|
line.word 0x00 "GPT12E_CAPREL,Capture/reload Register"
|
|
if (((d.w(ad:0x40010000+0x18))&0x38)==(0x00||0x10||0x18))&&((d.w(ad:0x40010000+0x18)&0x100)==0x00)
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "GPT12E_T6CON,Timer T6 Control Register"
|
|
bitfld.word 0x00 15. " T6SR ,Timer T6 reload mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " T6CLR ,Timer T6 clear enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11.--12. " BPS2 ,GPT2 block prescaler control" "/4,/2,/16,/8"
|
|
bitfld.word 0x00 10. " T6OTL ,Timer T6 overflow toggle latch" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T6OE ,Overflow/underflow output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " T6UDE ,Timer T6 external up/down enable" "T6UD,T6EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T6UD ,Timer T6 up/down control" "Up,Down"
|
|
bitfld.word 0x00 6. " T6R ,Timer T6 input run bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " T6M ,Timer T6 mode control" "Timer mode,Counter mode,Gated(Active low),Gated(Active high),?..."
|
|
bitfld.word 0x00 0.--2. " T6I ,Timer T6 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.word 0x18++0x01
|
|
line.word 0x00 "GPT12E_T6CON,Timer T6 Control Register"
|
|
bitfld.word 0x00 15. " T6SR ,Timer T6 reload mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " T6CLR ,Timer T6 clear enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11.--12. " BPS2 ,GPT2 block prescaler control" "/4,/2,/16,/8"
|
|
bitfld.word 0x00 10. " T6OTL ,Timer T6 overflow toggle latch" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T6OE ,Overflow/underflow output enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " T6UD ,Timer T6 up/down control" "Up,Down"
|
|
textline " "
|
|
bitfld.word 0x00 6. " T6R ,Timer T6 input run bit" "Stop,Run"
|
|
bitfld.word 0x00 3.--5. " T6M ,Timer T6 mode control" "Timer mode,Counter mode,Gated(Active low),Gated(Active high),?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " T6I ,Timer T6 input parameter selection" "None,Positive transition,Negative transition,Any transition,?..."
|
|
endif
|
|
if (((d.w(ad:0x40010000+0x18))&0x18)==(0x00||0x10||0x18))
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "GPT12E_T5CON,Timer T5 Control Register"
|
|
bitfld.word 0x00 15. " T5SC ,Timer T5 capture mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " T5CLR ,Timer T5 clear enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12.--13. " CI ,Register CAPREL capture trigger selection1" "Disabled,Positive,Negative,Any"
|
|
bitfld.word 0x00 10. " CT3 ,Timer T3 capture trigger enable" "CAPIN,T3IN"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T5RC ,Timer T5 remote control" "T5R,T6R"
|
|
bitfld.word 0x00 8. " T5UDE ,Timer T5 external up/down enable" "T5UD,T5EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T5UD ,Timer T2 up/down control" "Up,Down"
|
|
bitfld.word 0x00 6. " T5R ,Timer T5 run bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " T5M ,Timer T5 input mode control" "Timer mode,Counter mode,Gated(Active low),Gated(Active high)"
|
|
bitfld.word 0x00 0.--2. " T5I ,Timer T5 input parameter selection" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group.word 0x14++0x01
|
|
line.word 0x00 "GPT12E_T5CON,Timer T5 Control Register"
|
|
bitfld.word 0x00 15. " T5SC ,Timer T5 capture mode enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " T5CLR ,Timer T5 clear enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12.--13. " CI ,Register CAPREL capture trigger selection1" "Disabled,Positive,Negative,Any"
|
|
bitfld.word 0x00 10. " CT3 ,Timer T3 capture trigger enable" "CAPIN,T3IN"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T5RC ,Timer T5 remote control" "T5R,T6R"
|
|
bitfld.word 0x00 8. " T5UDE ,Timer T5 external up/down enable" "T5UD,T5EUD"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T5UD ,Timer T2 up/down control" "Up,Down"
|
|
bitfld.word 0x00 6. " T5R ,Timer T5 run bit" "Stop,Run"
|
|
textline " "
|
|
bitfld.word 0x00 3.--4. " T5M ,Timer T5 input mode control" "Timer mode,Counter mode,Gated(Active low),Gated(Active high)"
|
|
bitfld.word 0x00 0.--2. " T5I ,Timer T5 input parameter selection" "None,Positive transition,Negative transition,Any transition,None,Positive transition,Negative transition,Any transition"
|
|
endif
|
|
width 0x0B
|
|
tree.end
|
|
tree "Miscellaneous"
|
|
base ad:0x40010000
|
|
width 18.
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "GPT12E_PISEL,Port Input Select Register"
|
|
bitfld.word 0x00 14.--15. " ISCAPIN ,Input Select for CAPIN" "CAPINA,CAPINB,CAPINC,CAPIND"
|
|
bitfld.word 0x00 13. " IST6EUD ,Input Select for T6EUD" "T6EUDA,T6EUDB"
|
|
textline " "
|
|
bitfld.word 0x00 12. " IST6IN ,Input Select for T6IN" "T6INA,T6INB"
|
|
bitfld.word 0x00 11. " IST5EUD ,Input Select for T5EUD" "T5EUDAB,T5EUDB"
|
|
textline " "
|
|
bitfld.word 0x00 10. " IST5IN ,Input Select for T5IN" "T5INA,T5INB"
|
|
bitfld.word 0x00 8.--9. " IST4EUD ,Input Select for TEUD" "T4EUDA,T4EUDB,T4EUDC,T4EUDD"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " IST4IN ,Input Select for T4IN" "T4INA,T4INB,T4INC,T4IND"
|
|
bitfld.word 0x00 4.--5. " IST3EUD ,Input Select for T3EUD" "T3EUDA,T3EUDB,T3EUDC,T3EUDD"
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " IST3IN ,Input Select for T3IN" "T3INA,T3INB,T3INC,T3IND"
|
|
bitfld.word 0x00 1. " IST2EUD ,Input Select for T2EUD" "T2EUDA,T2EUDB"
|
|
textline " "
|
|
bitfld.word 0x00 0. " IST2IN ,Input Select for T2IN" "T2INA,T2INB"
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "GPT12E_GPT12E_ID,Module Identification Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " MOD_TYPE ,Module Identification Number"
|
|
hexmask.word.byte 0x00 0.--7. 1. " MOD_REV ,Module Revision Number"
|
|
width 0x0b
|
|
tree.end
|
|
tree.end
|
|
tree.open "Timers"
|
|
tree "TIMER2"
|
|
base ad:0x48004000
|
|
width 10.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "T2_CON,Timer 2 Control Register"
|
|
rbitfld.long 0x00 7. " TF2 ,Timer 2 overflow/underflow flag" "No overflow/no underflow,Overflow/underflow"
|
|
rbitfld.long 0x00 6. " EXF2 ,Timer 2 external flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXEN2 ,Timer 2 external enable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TR2 ,Timer 2 start/stop control" "Stop,Start"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_T2 ,Timer or counter select" "Timer,Count"
|
|
bitfld.long 0x00 0. " CP_RL2 ,Capture/reload select" "Reload,Capture"
|
|
line.long 0x04 "T2_MOD,Timer 2 Mode Register"
|
|
bitfld.long 0x04 7. " T2REGS ,Edge select for timer 2 external start" "Falling,Rising"
|
|
bitfld.long 0x04 6. " T2RHEN ,Timer 2 external start enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EDGESEL ,Edge select in capture mode/reload mode" "Falling,Rising"
|
|
bitfld.long 0x04 4. " PREN ,Prescaler enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1.--3. " T2PRE ,Timer 2 prescaler bit" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
bitfld.long 0x04 0. " DCEN ,Up/down counter enable" "Disabled,Enabled"
|
|
line.long 0x08 "RC2_L,Timer 2 Reload/capture Register Low Byte"
|
|
line.long 0x0C "RC2_H,Timer 2 Reload/capture Register High Byte"
|
|
line.long 0x10 "T2_L,Timer 2 Low Byte"
|
|
line.long 0x14 "T2_H,Timer 2 High Byte"
|
|
line.long 0x18 "T2_CON1,Timer 2 Control Register 1"
|
|
bitfld.long 0x18 1. " TF2EN ,Overflow/underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " EXF2EN ,External interrupt enable" "Disabled,Enabled"
|
|
wgroup.byte 0x1C++0x00
|
|
line.byte 0x00 "T2_ICLR,Timer 2 Interrupt Clear Register"
|
|
bitfld.byte 0x00 7. " TF2CLR ,Overflow/underflow interrupt clear flag" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " EXF2CLR ,External interrupt clear flag" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER21"
|
|
base ad:0x48005000
|
|
width 10.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "T21_CON,Timer 21 Control Register"
|
|
rbitfld.long 0x00 7. " TF2 ,Timer 21 overflow/underflow flag" "No overflow/no underflow,Overflow/underflow"
|
|
rbitfld.long 0x00 6. " EXF2 ,Timer 21 external flag" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EXEN2 ,Timer 21 external enable control" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " TR2 ,Timer 21 start/stop control" "Stop,Start"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_T2 ,Timer or counter select" "Timer,Count"
|
|
bitfld.long 0x00 0. " CP_RL2 ,Capture/reload select" "Reload,Capture"
|
|
line.long 0x04 "T21_MOD,Timer 21 Mode Register"
|
|
bitfld.long 0x04 7. " T2REGS ,Edge select for timer 21 external start" "Falling,Rising"
|
|
bitfld.long 0x04 6. " T2RHEN ,Timer 21 external start enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EDGESEL ,Edge select in capture mode/reload mode" "Falling,Rising"
|
|
bitfld.long 0x04 4. " PREN ,Prescaler enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1.--3. " T2PRE ,Timer 21 prescaler bit" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128"
|
|
bitfld.long 0x04 0. " DCEN ,Up/down counter enable" "Disabled,Enabled"
|
|
line.long 0x08 "RC21_L,Timer 21 Reload/capture Register Low Byte"
|
|
line.long 0x0C "RC21_H,Timer 21 Reload/capture Register High Byte"
|
|
line.long 0x10 "T21_L,Timer 21 Low Byte"
|
|
line.long 0x14 "T21_H,Timer 21 High Byte"
|
|
line.long 0x18 "T21_CON1,Timer 21 Control Register 1"
|
|
bitfld.long 0x18 1. " TF2EN ,Overflow/underflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x18 0. " EXF2EN ,External interrupt enable" "Disabled,Enabled"
|
|
wgroup.byte 0x1C++0x00
|
|
line.byte 0x00 "T21_ICLR,Timer 21 Interrupt Clear Register"
|
|
bitfld.byte 0x00 7. " TF2CLR ,Overflow/underflow interrupt clear flag" "No effect,Clear"
|
|
bitfld.byte 0x00 6. " EXF2CLR ,External interrupt clear flag" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree "TIMER3"
|
|
base ad:0x48006000
|
|
width 15.
|
|
group.long 0x00++0x13
|
|
line.long 0x00 "T3_TRIGG_CTRL,Timer 3 Trigger Control Register"
|
|
bitfld.long 0x00 6. " RETRIG ,Retrigger condition for CCU6-T12 ZM and CCU6-T12 PM" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " T3_RES_CONF ,Timer 3 trigger reset selection for mode 1b" "No reset on PWM edge,Reset on rising edge,Reset on falling edge,Reset on both edges"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " T3_TRIGG_INP_S ,EL" "CCU6-CC60,CCU6-CC61,CCU6-CC62,CCU6-T12 ZM,CCU6-T12 PM,CCU6-COUT60,CCU6-COUT61,CCU6-COUT62"
|
|
line.long 0x04 "T3_CMP,Timer 3 Compare Value"
|
|
hexmask.long.byte 0x04 8.--15. 1. " HI ,Timer 3 compare value high byte"
|
|
hexmask.long.byte 0x04 0.--7. 1. " LO ,Timer 3 compare value low byte"
|
|
line.long 0x08 "T3_CNT,Timer 3"
|
|
hexmask.long.byte 0x08 8.--15. 1. " HI ,Timer 3 high register or preload value"
|
|
hexmask.long.byte 0x08 0.--7. 1. " LO ,Timer 3 low register or preload value"
|
|
line.long 0x0C "T3_CTRL,Timer 3 Control Register"
|
|
bitfld.long 0x0C 9. " T3H_OVF_IE ,Timer 3 overflow interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " T3L_OVF_IE ,Timer 3 overflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x0C 7. " T3L_OVF_STS ,Timer 3 overflow flag" "No overflow,Overflow"
|
|
bitfld.long 0x0C 6. " TR3L ,Timer 3 run control" "Halted,Runs"
|
|
textline " "
|
|
rbitfld.long 0x0C 5. " T3H_OVF_STS ,Timer 3 overflow flag" "No overflow,Owerflow"
|
|
bitfld.long 0x0C 4. " TR3H ,Timer 3 run control" "Halted,Runs"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " CNT_RDY ,Timer 3 count ready" "Not ready,Ready"
|
|
bitfld.long 0x0C 2. " T3_RD_REQ_CONF ,Timer 3 read mode" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " T3_RD_REQ ,Timer 3 value read request" "Not read,Read"
|
|
bitfld.long 0x0C 0. " T3_PD_N ,Timer 3 power down" "Power down,No power down"
|
|
line.long 0x10 "T3_MODE_CONF,Timer 3 Mode Configuration Register"
|
|
bitfld.long 0x10 6.--7. " T3_SUBM ,Sub-Mode select bits" "No Sub-Mode,Mode 1b,Mode 3b,?..."
|
|
bitfld.long 0x10 0.--1. " T3M ,Mode select bits" "13-bit,16-bit,8-bit,8-bit"
|
|
wgroup.long 0x14++0x03
|
|
line.long 0x00 "T3_ISRCLR,Timer 3 Interrupt Status Clear Register"
|
|
bitfld.long 0x00 7. " T3L_OVF_ICLR ,Timer 3 overflow flag interrupt clear (low)" "No effect,Clear"
|
|
bitfld.long 0x00 5. " T3H_OVF_ICLR ,Timer 3 overflow flag interrupt clear (high)" "No effect,Clear"
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "CCU6 (Capture/Compare Unit 6)"
|
|
base ad:0x4000C000
|
|
width 15.
|
|
group.word 0x6C++0x01
|
|
line.word 0x00 "CCU6_PISEL0,Port Input Select Register 0"
|
|
bitfld.word 0x00 14.--15. " IST12HR ,Input select for T12HR" "T12HRA,T12HRB,T12HRC,T12HRD"
|
|
bitfld.word 0x00 12.--13. " ISPOS2 ,Input select for CCPOS2" "BEMF,CCPOS2_1,CCPOS2_2,CCPOS2_3"
|
|
textline " "
|
|
bitfld.word 0x00 10.--11. " ISPOS1 ,Input select for CCPOS1" "CCPOS1_0,CCPOS1_1,CCPOS1_2,BEMF"
|
|
bitfld.word 0x00 8.--9. " ISPOS0 ,Input select for CCPOS0" "BEMF,CCPOS0_1,CCPOS0_2,CCPOS0_3"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " ISTRP ,Input select for CTRAP" "CTRAP_0,CTRAP_1,?..."
|
|
bitfld.word 0x00 4.--5. " ISCC62 ,Input select for CC62" "CC62_0,CC62_1,CC62_2,?..."
|
|
textline " "
|
|
bitfld.word 0x00 2.--3. " ISCC61 ,Input select for CC61" "CC61_0,?..."
|
|
bitfld.word 0x00 0.--1. " ISCC60 ,Input select for CC60" "CC60_0,CC60_1,?..."
|
|
group.byte 0x74++0x00
|
|
line.byte 0x00 "CCU6_PISEL2,Port Input Select Register 2"
|
|
bitfld.byte 0x00 7. " T13EXT ,Extension for T13HR inputs" "T13HR[D:A],T13HR[H:E]"
|
|
bitfld.byte 0x00 6. " T12EXT ,Extension for T12HR inputs" "T12HR[D:A],T12HR[H:E]"
|
|
textline " "
|
|
bitfld.byte 0x00 4.--5. " ISCNT13 ,Input select for T13 counting input" "T13 prescaler,TCTR4.T13CNT,Rising edge,Falling edge"
|
|
bitfld.byte 0x00 2.--3. " ISCNT12 ,Input select for T12 counting input" "T12 prescaler,TCTR4.T12CNT,Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.byte 0x00 0.--1. " IST13HR ,Input select for T13HR" "T13HRA,T13HRB,T13HRC,T13HRD"
|
|
group.word 0x78++0x01
|
|
line.word 0x00 "CCU6_T12,Timer T12 Counter Register"
|
|
group.word 0x24++0x01
|
|
line.word 0x00 "CCU6_T12PR,Timer T12 Period Register"
|
|
rgroup.word (0x34)++0x01
|
|
line.word 0x00 "CCU6_CC60R,Capture/compare Register For Channel CC60"
|
|
rgroup.word (0x38)++0x01
|
|
line.word 0x00 "CCU6_CC61R,Capture/compare Register For Channel CC61"
|
|
rgroup.word (0x3C)++0x01
|
|
line.word 0x00 "CCU6_CC62R,Capture/compare Register For Channel CC62"
|
|
group.word (0x14)++0x01
|
|
line.word 0x00 "CCU6_CC60SR,Capture/compare Shadow Register For Channel CC60"
|
|
group.word (0x18)++0x01
|
|
line.word 0x00 "CCU6_CC61SR,Capture/compare Shadow Register For Channel CC61"
|
|
group.word (0x1C)++0x01
|
|
line.word 0x00 "CCU6_CC62SR,Capture/compare Shadow Register For Channel CC62"
|
|
group.word 0x2C++0x01
|
|
line.word 0x00 "CCU6_T12DTC,Dead-Time Control Register For Timer T12 Low"
|
|
rbitfld.word 0x00 14. " DTR2 ,Dead-Time run indication bit 2" "Zero,Not zero"
|
|
rbitfld.word 0x00 13. " DTR1 ,Dead-Time run indication bit 1" "Zero,Not zero"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " DTR0 ,Dead-Time run indication bit 0" "Zero,Not zero"
|
|
bitfld.word 0x00 10. " DTE2 ,Dead-Time enable bit 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " DTE1 ,Dead-Time enable bit 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " DTE0 ,Dead-Time enable bit 0" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 0.--7. 1. " DTM ,Dead-time"
|
|
group.word 0x7C++0x01
|
|
line.word 0x00 "CCU6_T13,Timer T13 Counter Register"
|
|
group.word 0x28++0x01
|
|
line.word 0x00 "CCU6_T13PR,Timer T13 Period Register"
|
|
rgroup.word 0x00++0x01
|
|
line.word 0x00 "CCU6_CC63R,Capture/compare Register For Channel CC63"
|
|
group.word 0x20++0x01
|
|
line.word 0x00 "CCU6_CC63SR,Capture/compare Shadow Register For Channel CC63"
|
|
group.word 0x80++0x01
|
|
line.word 0x00 "CCU6_CMPSTAT,Compare State Register"
|
|
bitfld.word 0x00 15. " T13IM ,T13 inverted modulation" "Not inverted,Inverted"
|
|
bitfld.word 0x00 14. " COUT63PS ,Passive state select for compare outputs" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 13. " COUT62PS ,Passive state select for compare outputs" "0,1"
|
|
bitfld.word 0x00 12. " CC62PS ,Passive state select for compare outputs" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 11. " COUT61PS ,Passive state select for compare outputs" "0,1"
|
|
bitfld.word 0x00 10. " CC61PS ,Passive state select for compare outputs" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " COUT60PS ,Passive state select for compare outputs" "0,1"
|
|
bitfld.word 0x00 8. " CC60PS ,Passive state select for compare outputs" "0,1"
|
|
textline " "
|
|
rbitfld.word 0x00 6. " CC63ST ,Capture/compare state bits" "Less,Greater"
|
|
rbitfld.word 0x00 5. " CCPOS2 ,Sampled hall pattern bit 2" "0,1"
|
|
textline " "
|
|
rbitfld.word 0x00 4. " CCPOS1 ,Sampled hall pattern bit 1" "0,1"
|
|
rbitfld.word 0x00 3. " CCPOS0 ,Sampled hall pattern bit 0" "0,1"
|
|
textline " "
|
|
rbitfld.word 0x00 2. " CC62ST ,Capture/compare state bits" "Less/not detected,Greater/detected"
|
|
rbitfld.word 0x00 1. " CC61ST ,Capture/compare state bits" "Less,Greater"
|
|
textline " "
|
|
rbitfld.word 0x00 0. " CC60ST ,Capture/compare state bits" "Less,Greater"
|
|
wgroup.word 0x10++0x01
|
|
line.word 0x00 "CCU6_CMPMODIF,Compare State Modification Register"
|
|
bitfld.word 0x00 14. " MCC63R ,Capture/compare status modification bits" "0,1"
|
|
bitfld.word 0x00 10. " MCC62R ,Capture/compare status modification bits" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 9. " MCC61R ,Capture/compare status modification bits" "0,1"
|
|
bitfld.word 0x00 8. " MCC60R ,Capture/compare status modification bits" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 6. " MCC63S ,Capture/compare status modification bits" "0,1"
|
|
bitfld.word 0x00 2. " MCC62S ,Capture/compare status modification bits" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 1. " MCC61S ,Capture/compare status modification bits" "0,1"
|
|
bitfld.word 0x00 0. " MCC60S ,Capture/compare status modification bits" "0,1"
|
|
group.word 0x40++0x01
|
|
line.word 0x00 "CCU6_T12MSEL,T12 Capture/compare Mode Select Register"
|
|
bitfld.word 0x00 15. " DBYP ,Delay bypass" "Not active,Active"
|
|
bitfld.word 0x00 12.--14. " HSYNC ,Hall synchronization" "Any,T13 compare-match,T13 period-match,Switched off,T12 period-match,T12 one-match,T12 compare-match up,T12 compare-match down"
|
|
textline " "
|
|
bitfld.word 0x00 8.--11. " MSEL62 ,Capture/compare mode selection" "Compare outputs disabled,Pin CC6n-pin cout6n,Pin COUT6n-Pin cc6n,Pins cout6n and cc6n,Double-Register capture mode 1,Double-Register capture mode 2,Double-Register capture mode 3,Double-Register capture mode 4,Hall sensor mode,Hysteresis-like mode,Multi-Input capture mode 1,Multi-Input capture mode 2,Multi-Input capture mode 3,Multi-Input capture mode 4,Multi-Input capture,?..."
|
|
bitfld.word 0x00 4.--7. " MSEL61 ,Capture/compare mode selection" "Compare outputs disabled,Pin CC6n-pin cout6n,Pin COUT6n-Pin cc6n,Pins cout6n and cc6n,Double-Register capture mode 1,Double-Register capture mode 2,Double-Register capture mode 3,Double-Register capture mode 4,Hall sensor mode,Hysteresis-like mode,Multi-Input capture mode 1,Multi-Input capture mode 2,Multi-Input capture mode 3,Multi-Input capture mode 4,Multi-Input capture,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--3. " MSEL60 ,Capture/compare mode selection" "Compare outputs disabled,Pin CC6n-pin cout6n,Pin COUT6n-Pin cc6n,Pins cout6n and cc6n,Double-Register capture mode 1,Double-Register capture mode 2,Double-Register capture mode 3,Double-Register capture mode 4,Hall sensor mode,Hysteresis-like mode,Multi-Input capture mode 1,Multi-Input capture mode 2,Multi-Input capture mode 3,Multi-Input capture mode 4,Multi-Input capture,?..."
|
|
group.word 0x30++0x01
|
|
line.word 0x00 "CCU6_TCTR0,Timer Control Register 0"
|
|
rbitfld.word 0x00 13. " STE13 ,Timer T13 shadow transfer enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 12. " T13R ,Timer T13 run bit" "Stopped,Running"
|
|
textline " "
|
|
bitfld.word 0x00 11. " T13PRE ,Timer T13 prescaler bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 8.--10. " T13CLK ,Timer T13 input clock select" "FCCU,FCCU/2,FCCU/4,FCCU/8,FCCU/16,FCCU/32,FCCU/64,FCCU/128"
|
|
textline " "
|
|
bitfld.word 0x00 7. " CTM ,T12 operating mode" "Edge-aligned,Center-aligned"
|
|
rbitfld.word 0x00 6. " CDIR ,Count direction of timer T12" "Up,Down"
|
|
textline " "
|
|
rbitfld.word 0x00 5. " STE12 ,Timer T12 shadow transfer enable" "Disabled,Enabled"
|
|
rbitfld.word 0x00 4. " T12R ,Timer T12 run bit" "Stopped,Running"
|
|
textline " "
|
|
bitfld.word 0x00 3. " T12PRE ,Timer T12 prescaler bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 0.--2. " T12CLK ,Timer T12 input clock select" "FCCU,FCCU/2,FCCU/4,FCCU/8,FCCU/16,FCCU/32,FCCU/64,FCCU/128"
|
|
group.word 0x58++0x01
|
|
line.word 0x00 "CCU6_TCTR2,Timer Control Register 2"
|
|
bitfld.word 0x00 10.--11. " T13RSEL ,Timer T13 external run selection" "Disabled,Rising edge,Falling edge,Edge"
|
|
bitfld.word 0x00 8.--9. " T12RSEL ,Timer T12 external run selection" "Disabled,Rising edge,Falling edge,Edge"
|
|
textline " "
|
|
bitfld.word 0x00 5.--6. " T13TED ,Timer T13 trigger event direction" "No action,Up,Down,Independent"
|
|
bitfld.word 0x00 2.--4. " T13TEC ,T13 trigger event control" "No action,Channel 0,Channel 1,Channel 2,Channel 0/1/2,Period-match,Zero-match,Ccposx"
|
|
textline " "
|
|
bitfld.word 0x00 1. " T13SSC ,Timer T13 single shot control" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " T12SSC ,Timer T12 single shot control" "Disabled,Enabled"
|
|
wgroup.word 0x04++0x01
|
|
line.word 0x00 "CCU6_TCTR4,Timer Control Register 4"
|
|
bitfld.word 0x00 15. " T13STD ,Timer T13 shadow transfer disable" "No effect,STE13 reset"
|
|
bitfld.word 0x00 14. " T13STR ,Timer T13 shadow transfer request" "No effect,STE13 set"
|
|
textline " "
|
|
bitfld.word 0x00 13. " T13CNT ,Timer T13 count event" "No effect,Count"
|
|
bitfld.word 0x00 10. " T13RES ,Timer T13 reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 9. " T13RS ,Timer T13 run set" "No effect,T13R set"
|
|
bitfld.word 0x00 8. " T13RR ,Timer T13 run reset" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 7. " T12STD ,Timer T12 shadow transfer disable" "No effect,STE12 reset"
|
|
bitfld.word 0x00 6. " T12STR ,Timer T12 shadow transfer request" "No effect,STE12 set"
|
|
textline " "
|
|
bitfld.word 0x00 5. " T12CNT ,Timer T12 count event" "No effect,Count"
|
|
bitfld.word 0x00 3. " DTRES ,Dead-Time counter reset" "No effect,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 2. " T12RES ,Timer T12 reset" "No effect,Reset"
|
|
bitfld.word 0x00 1. " T12RS ,Timer T12 run set" "No effect,T12R set"
|
|
textline " "
|
|
bitfld.word 0x00 0. " T12RR ,Timer T12 run reset" "No effect,T12R cleared"
|
|
group.word 0x5C++0x01
|
|
line.word 0x00 "CCU6_MODCTR,Modulation Control Register"
|
|
bitfld.word 0x00 15. " ECT13O ,Enable compare timer T13 output" "Disabled,Enabled"
|
|
bitfld.word 0x00 13. " T13MODEN[5] ,Modulation of COUT62" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 12. " T13MODEN[4] ,Modulation of CC62" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " T13MODEN[3] ,Modulation of COUT61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " T13MODEN[2] ,Modulation of CC61" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " T13MODEN[1] ,Modulation of COUT60" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " T13MODEN[0] ,Modulation of CC60" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " MCMEN ,Multi-Channel mode enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 5. " T12MODEN[5] ,Modulation of COUT62" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " T12MODEN[4] ,Modulation of CC62" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " T12MODEN[3] ,Modulation of COUT61" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " T12MODEN[2] ,Modulation of CC61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " T12MODEN[1] ,Modulation of COUT60" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " T12MODEN[0] ,Modulation of CC60" "Disabled,Enabled"
|
|
group.word 0x60++0x01
|
|
line.word 0x00 "CCU6_TRPCTR,Trap Control Register"
|
|
bitfld.word 0x00 15. " TRPPEN ,Trap pin enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " TRPEN13 ,Trap enable control for timer T13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 13. " TRPEN[5] ,Trap functionality of COUT62" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " TRPEN[4] ,Trap functionality of CC62" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 11. " TRPEN[3] ,Trap functionality of COUT61" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " TRPEN[2] ,Trap functionality of CC61" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 9. " TRPEN[1] ,Trap functionality of COUT60" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TRPEN[0] ,Trap functionality of CC60" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " TRPM2 ,Trap mode control bit 2" "0,1"
|
|
bitfld.word 0x00 0.--1. " TRPM10 ,Trap mode control bits 1-0" "T12 zero-match,T13 zero-match,,Immediately"
|
|
group.word 0x50++0x01
|
|
line.word 0x00 "CCU6_PSLR,Passive State Level Register"
|
|
bitfld.word 0x00 7. " PSL63 ,Passive state level of output COUT63" "0,1"
|
|
bitfld.word 0x00 5. " PSL[5] ,Passive level for output COUT62" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 4. " PSL[4] ,Passive level for output CC62" "0,1"
|
|
bitfld.word 0x00 3. " PSL[3] ,Passive level for output COUT61" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 2. " PSL[2] ,Passive level for output CC61" "0,1"
|
|
bitfld.word 0x00 1. " PSL[1] ,Passive level for output COUT60" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 0. " PSL[0] ,Passive level for output CC60" "0,1"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "CCU6_MCMOUTS,Multi-Channel Mode Output Shadow Register"
|
|
bitfld.word 0x00 15. " STRHP ,Shadow transfer request for the hall pattern" "Not requested,Requested"
|
|
bitfld.word 0x00 11.--13. " CURHS ,Current hall pattern shadow" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.word 0x00 8.--10. " EXPHS ,Expected hall pattern shadow" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 7. " STRMCM ,Shadow transfer request for MCMPS" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.word 0x00 0.--5. " MCMPS ,Multi-Channel PWM pattern shadow" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
rgroup.word 0x64++0x01
|
|
line.word 0x00 "CCU6_MCMOUT,Multi-Channel Mode Output Register"
|
|
bitfld.word 0x00 11.--13. " CURH ,Current hall pattern" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x00 8.--10. " EXPH ,Expected hall pattern" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.word 0x00 6. " R ,Reminder flag" "Not requested,Requested"
|
|
bitfld.word 0x00 5. " MCMP[5] ,Multi-Channel state for output COUT62" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 4. " MCMP[4] ,Multi-Channel state for output CC62" "0,1"
|
|
bitfld.word 0x00 3. " MCMP[3] ,Multi-Channel state for output COUT61" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 2. " MCMP[2] ,Multi-Channel state for output CC61" "0,1"
|
|
bitfld.word 0x00 1. " MCMP[1] ,Multi-Channel state for output COUT60" "0,1"
|
|
textline " "
|
|
bitfld.word 0x00 0. " MCMP[0] ,Multi-Channel state for output CC60" "0,1"
|
|
group.word 0x54++0x01
|
|
line.word 0x00 "CCU6_MCMCTR,Multi-Channel Mode Control Register"
|
|
bitfld.word 0x00 10. " STE13U ,Shadow transfer enable for T13 upcounting" "No action,Enabled"
|
|
bitfld.word 0x00 9. " STE12D ,Shadow transfer enable for T12 downcounting" "No action,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " STE12U ,Shadow transfer enable for T12 upcounting" "No action,Enabled"
|
|
bitfld.word 0x00 4.--5. " SWSYN ,Switching synchronization" "Direct,T13 zero-match,T12 zero-match,?..."
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " SWSEL ,Switching selection" "No request,Correct pattern,T13 period-match,T12 one-match,T12 channel1 compare-match,T12 period-match,?..."
|
|
group.word 0x68++0x01
|
|
line.word 0x00 "CCU6_IS,Capture/compare Interrupt Status Register"
|
|
setclrfld.word 0x00 15. -0x1C 15. -0x5C 15. " STR_SET/CLR ,Multi-Channel mode shadow transfer request" "Not occurred,Occurred"
|
|
setclrfld.word 0x00 14. -0x1C 14. -0x5C 14. " IDLE ,IDLE state" "No action,Idle"
|
|
textline " "
|
|
setclrfld.word 0x00 13. -0x1C 13. -0x5C 13. " WHE_SET/CLR ,Wrong hall event" "Not detected,Detected"
|
|
setclrfld.word 0x00 12. -0x1C 12. -0x5C 12. " CHE_SET/CLR ,Correct hall event" "Not detected,Detected"
|
|
textline " "
|
|
rbitfld.word 0x00 11. " TRPS ,Trap state" "Not active,Active"
|
|
setclrfld.word 0x00 10. -0x1C 10. -0x5C 10. " TRPF_SET/CLR ,Trap flag" "Not detected,Detected"
|
|
textline " "
|
|
setclrfld.word 0x00 9. -0x1C 9. -0x5C 9. " T13PM_SET/CLR ,Timer T13 Period-Match flag" "Not detected,Detected"
|
|
setclrfld.word 0x00 8. -0x1C 8. -0x5C 8. " T13CM_SET/CLR ,Timer T13 Compare-Match flag" "Not detected,Detected"
|
|
textline " "
|
|
setclrfld.word 0x00 7. -0x1C 7. -0x5C 7. " T12PM_SET/CLR ,Timer T12 Period-Match flag" "Not detected,Detected"
|
|
setclrfld.word 0x00 6. -0x1C 6. -0x5C 6. " T12OM_SET/CLR ,Timer T12 One-Match flag" "Not detected,Detected"
|
|
textline " "
|
|
setclrfld.word 0x00 5. -0x1C 5. -0x5C 5. " ICC62F_SET/CLR ,Capture Compare-Match falling edge flag" "Not occurred,Detected"
|
|
setclrfld.word 0x00 4. -0x1C 4. -0x5C 4. " ICC62R_SET/CLR ,Capture Compare-Match rising edge flag" "Not detected,Detected"
|
|
textline " "
|
|
setclrfld.word 0x00 3. -0x1C 3. -0x5C 3. " ICC61F_SET/CLR ,Capture Compare-Match falling edge flag" "Not detected,Detected"
|
|
setclrfld.word 0x00 2. -0x1C 2. -0x5C 2. " ICC61R_SET/CLR ,Capture Compare-Match rising edge flag" "Not detected,Detected"
|
|
textline " "
|
|
setclrfld.word 0x00 1. -0x1C 1. -0x5C 1. " ICC60F_SET/CLR ,Capture Compare-Match falling edge flag" "Not detected,Detected"
|
|
setclrfld.word 0x00 0. -0x1C 0. -0x5C 0. " ICC60R_SET/CLR ,Capture Compare-Match rising edge flag" "Not detected,Detected"
|
|
wgroup.word 0x4C++0x01
|
|
line.word 0x00 "CCU6_ISS,Capture/compare Interrupt Status Set"
|
|
bitfld.word 0x00 11. " SWHC ,Software hall compare" "No action,Set"
|
|
group.word 0x44++0x01
|
|
line.word 0x00 "CCU6_IEN,Capture/compare Interrupt Enable Register"
|
|
bitfld.word 0x00 15. " ENSTR ,Enable Multi-Channel mode shadow transfer interrupt" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " ENIDLE ,Enable idle" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 13. " ENWHE ,Enable interrupt for wrong hall event" "Disabled,Enabled"
|
|
bitfld.word 0x00 12. " ENCHE ,Enable interrupt for correct hall event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " ENTRPF ,Enable interrupt for trap flag" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " ENT13PM ,Enable interrupt for T13 Period-Match" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " ENT13CM ,Enable interrupt for T13 Compare-Match" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " ENT12PM ,Enable interrupt for T12 Period-Match" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 6. " ENT12OM ,Enable interrupt for T12 One-Match" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " ENCC62F ,Capture ,capture, Compare-Match falling edge interrupt enable for channel 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ENCC62R ,Capture ,capture, Compare-Match rising edge interrupt enable for channel 2" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " ENCC61F ,Capture ,capture, Compare-Match falling edge interrupt enable for channel 1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 2. " ENCC61R ,Capture ,capture, Compare-Match rising edge interrupt enable for channel 1" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " ENCC60F ,Capture ,capture, Compare-Match falling edge interrupt enable for channel 0" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENCC60R ,Capture ,capture, Compare-Match rising edge interrupt enable for channel 0" "Disabled,Enabled"
|
|
group.word 0x48++0x01
|
|
line.word 0x00 "CCU6_INP,Capture/compare Interrupt Node Pointer"
|
|
bitfld.word 0x00 12.--13. " INPT13 ,Interrupt node pointer for timer T13 interrupts" "SR0,SR1,SR2,SR3"
|
|
bitfld.word 0x00 10.--11. " INPT12 ,Interrupt node pointer for timer T12 interrupts" "SR0,SR1,SR2,SR3"
|
|
textline " "
|
|
bitfld.word 0x00 8.--9. " NPERR ,Interrupt node pointer for error interrupts" "SR0,SR1,SR2,SR3"
|
|
bitfld.word 0x00 6.--7. " INPCHE ,Interrupt node pointer for the CHE interrupt" "SR0,SR1,SR2,SR3"
|
|
textline " "
|
|
bitfld.word 0x00 4.--5. " INPCC62 ,Interrupt node pointer for channel 2 interrupts" "SR0,SR1,SR2,SR3"
|
|
bitfld.word 0x00 2.--3. " INPCC61 ,Interrupt node pointer for channel 1 interrupts" "SR0,SR1,SR2,SR3"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " INPCC60 ,Interrupt node pointer for channel 0 interrupts" "SR0,SR1,SR2,SR3"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "UART"
|
|
tree "UART1"
|
|
base ad:0x48020000
|
|
width 14.
|
|
tree "UART Control Registers"
|
|
hgroup.byte 0x04++0x00
|
|
hide.byte 0x00 "UART_SBUF,Serial Data Buffer Register"
|
|
in
|
|
if ((d.b(ad:0x48020000)&0xC0)==0x01)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "UART_SCON,Serial Channel Control Register"
|
|
bitfld.byte 0x00 6.--7. " SM01 ,Serial port operating mode selection" "Mode 0: 8-Bit shift register,Mode 1: 8-Bit shift UART,Mode 2: 9-Bit shift UART,Mode 3: 9-Bit shift UART"
|
|
bitfld.byte 0x00 5. " SM2 ,Enable serial port multiprocessor communication in modes 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " REN ,Enable receiver of serial port" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TI ,Transmit interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RI ,Receive interrupt flag" "No interrupt,Interrupt"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "UART_SCON,Serial Channel Control Register"
|
|
bitfld.byte 0x00 6.--7. " SM01 ,Serial port operating mode selection" "Mode 0: 8-Bit shift register,Mode 1: 8-Bit shift UART,Mode 2: 9-Bit shift UART,Mode 3: 9-Bit shift UART"
|
|
bitfld.byte 0x00 5. " SM2 ,Enable serial port multiprocessor communication in modes 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " REN ,Enable receiver of serial port" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TB8 ,Serial port transmitter bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RB8 ,Serial port receiver bit 9" "Low,High"
|
|
bitfld.byte 0x00 1. " TI ,Transmit interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RI ,Receive interrupt flag" "No interrupt,Interrupt"
|
|
endif
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "UART_SCONCLR,SCON Clear Register"
|
|
bitfld.byte 0x00 1. " TICLR ,SCON.TI clear flag" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " RICLR ,SCON.RI clear flag" "No effect,Clear"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x48022000
|
|
width 14.
|
|
tree "UART Control Registers"
|
|
hgroup.byte 0x04++0x00
|
|
hide.byte 0x00 "UART_SBUF,Serial Data Buffer Register"
|
|
in
|
|
if ((d.b(ad:0x48020000)&0xC0)==0x01)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "UART_SCON,Serial Channel Control Register"
|
|
bitfld.byte 0x00 6.--7. " SM01 ,Serial port operating mode selection" "Mode 0: 8-Bit shift register,Mode 1: 8-Bit shift UART,Mode 2: 9-Bit shift UART,Mode 3: 9-Bit shift UART"
|
|
bitfld.byte 0x00 5. " SM2 ,Enable serial port multiprocessor communication in modes 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " REN ,Enable receiver of serial port" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " TI ,Transmit interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RI ,Receive interrupt flag" "No interrupt,Interrupt"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "UART_SCON,Serial Channel Control Register"
|
|
bitfld.byte 0x00 6.--7. " SM01 ,Serial port operating mode selection" "Mode 0: 8-Bit shift register,Mode 1: 8-Bit shift UART,Mode 2: 9-Bit shift UART,Mode 3: 9-Bit shift UART"
|
|
bitfld.byte 0x00 5. " SM2 ,Enable serial port multiprocessor communication in modes 2 and 3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " REN ,Enable receiver of serial port" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " TB8 ,Serial port transmitter bit 9" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RB8 ,Serial port receiver bit 9" "Low,High"
|
|
bitfld.byte 0x00 1. " TI ,Transmit interrupt flag" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " RI ,Receive interrupt flag" "No interrupt,Interrupt"
|
|
endif
|
|
wgroup.byte 0x08++0x00
|
|
line.byte 0x00 "UART_SCONCLR,SCON Clear Register"
|
|
bitfld.byte 0x00 1. " TICLR ,SCON.TI clear flag" "No effect,Clear"
|
|
bitfld.byte 0x00 0. " RICLR ,SCON.RI clear flag" "No effect,Clear"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "LIN Transceiver"
|
|
base ad:0x4801E000
|
|
width 14.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "LIN_CTRL_STS,LIN Transceiver Control And Status"
|
|
bitfld.long 0x00 24. " M_SM_ERR_CLR ,LIN transceiver mode or slope mode error clear" "No effect,Clear"
|
|
bitfld.long 0x00 21. " HV_MODE ,LIN transceiver high voltage input - output mode" "Disabled,Enabled"
|
|
textline " "
|
|
rbitfld.long 0x00 16.--18. " MODE_FB ,Feedback signals for LIN transmitter mode settings" "Mode error,LIN sleep mode,Mode error,Mode error,Mode error,LIN Receive-Only mode,Mode error,LIN normal mode"
|
|
rbitfld.long 0x00 13.--15. " FB_SM ,Feedback signals for slope mode setting" "Low slope mode,Normal slope mode,Fast slope mode,Flash mode,Slope mode error,Slope mode error,Slope mode error,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " SM ,LIN transmitter slope mode control" "Normal slope mode,Fast slope mode,Low slope mode,Flash mode"
|
|
rbitfld.long 0x00 10. " RXD ,Output signal of receiver" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXD ,LIN transmitter switch on" "Off,On"
|
|
rbitfld.long 0x00 6. " TXD_TMOUT_STS ,LIN TXD time-out status" "No timeout,Timeout"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " OC_STS ,LIN receiver overcurrent status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 4. " OT_STS ,LIN receiver overtemperature status" "No overtemperature,Overtemperature"
|
|
textline " "
|
|
rbitfld.long 0x00 3. " M_SM_ERR ,LIN transceiver mode or slope mode error" "No error,Error"
|
|
bitfld.long 0x00 1.--2. " MODE ,LIN transceiver power mode control" "LIN sleep mode,LIN Receive-Only mode,,LIN normal mode"
|
|
width 0x0B
|
|
tree.end
|
|
tree.open "SSC (High-Speed Synchronous Serial Interface)"
|
|
tree "SSC1"
|
|
base ad:0x48024000
|
|
width 12.
|
|
if ((d.l(ad:0x48024000+0x04)&0x4000)==0x4000)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SSC_PISEL,Port Input Select Register"
|
|
bitfld.byte 0x00 0. 3. " MIS ,Master mode receiver input select" "P0.4,P2.4,P0.1,P1.4"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SSC_PISEL,Port Input Select Register"
|
|
bitfld.byte 0x00 2. " CIS ,Slave mode clock input select" "SSC1_S_SCK,SSC12_S_SCK"
|
|
bitfld.byte 0x00 1. " SIS ,Slave mode receiver input select" "SSC1_S_MTSR,SSC12_S_MTSR"
|
|
endif
|
|
if ((d.w(ad:0x48024000+0x04)&0x8000)==0x00)
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SSC_CON,Control Register"
|
|
bitfld.word 0x00 15. " EN ,Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " MS ,Master select" "Slave mode,Master mode"
|
|
textline " "
|
|
bitfld.word 0x00 12. " AREN ,Automatic reset enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " BEN ,Baud rate error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PEN ,Phase error enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " REN ,Receive error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TEN ,Transmit error enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " LB ,Loop back control" "Normal,LB"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PO ,Clock polarity control" "Low-to-high,High-to-low"
|
|
bitfld.word 0x00 5. " PH ,Clock phase control" "Shift transmit/latch on trailing,Latch receive/shift on trailing"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HB ,Heading control" "LSB,MSB"
|
|
bitfld.word 0x00 0.--3. " BM ,Data width selection" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SSC_CON,Control Register"
|
|
bitfld.word 0x00 15. " EN ,Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " MS ,Master select" "Slave mode,Master mode"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " BSY ,Busy flag" "Not busy,Busy"
|
|
rbitfld.word 0x00 11. " BE ,Baud rate error flag" "No error,Error"
|
|
textline " "
|
|
rbitfld.word 0x00 10. " PE ,Phase error flag" "No error,Error"
|
|
rbitfld.word 0x00 9. " RE ,Receive error flag" "No error,Error"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " TE ,Transmit error flag" "No error,Error"
|
|
rbitfld.word 0x00 0.--3. " BC ,Bit count field" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
endif
|
|
wgroup.word 0x14++0x01
|
|
line.word 0x00 "SSC_ISRCLR,Interrupt Status Register Clear"
|
|
bitfld.word 0x00 11. " BECLR ,Baud rate error flag clear" "No effect,Clear"
|
|
bitfld.word 0x00 10. " PECLR ,Phase error flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RECLR ,Receive error flag clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " TECLR ,Transmit error flag clear" "No effect,Clear"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SSC_BR,Baud Rate Timer Reload Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SSC_TB,Transmitter Buffer Register"
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "SSC_RB,Receiver Buffer Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree "SSC2"
|
|
base ad:0x48026000
|
|
width 12.
|
|
if ((d.l(ad:0x48026000+0x04)&0x4000)==0x4000)
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SSC_PISEL,Port Input Select Register"
|
|
bitfld.byte 0x00 0. " MIS ,Master mode receiver input select" "P1.2,P2.5"
|
|
else
|
|
group.byte 0x00++0x00
|
|
line.byte 0x00 "SSC_PISEL,Port Input Select Register"
|
|
bitfld.byte 0x00 2. " CIS ,Slave mode clock input select" "SSC2_S_SCK,SSC12_S_SCK"
|
|
bitfld.byte 0x00 1. " SIS ,Slave mode receiver input select" "SSC2_S_MTSR,SSC12_S_MTSR"
|
|
endif
|
|
if ((d.w(ad:0x48026000+0x04)&0x8000)==0x00)
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SSC_CON,Control Register"
|
|
bitfld.word 0x00 15. " EN ,Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " MS ,Master select" "Slave mode,Master mode"
|
|
textline " "
|
|
bitfld.word 0x00 12. " AREN ,Automatic reset enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 11. " BEN ,Baud rate error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 10. " PEN ,Phase error enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " REN ,Receive error enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 8. " TEN ,Transmit error enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 7. " LB ,Loop back control" "Normal,LB"
|
|
textline " "
|
|
bitfld.word 0x00 6. " PO ,Clock polarity control" "Low-to-high,High-to-low"
|
|
bitfld.word 0x00 5. " PH ,Clock phase control" "Shift transmit/latch on trailing,Latch receive/shift on trailing"
|
|
textline " "
|
|
bitfld.word 0x00 4. " HB ,Heading control" "LSB,MSB"
|
|
bitfld.word 0x00 0.--3. " BM ,Data width selection" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
else
|
|
group.word 0x04++0x01
|
|
line.word 0x00 "SSC_CON,Control Register"
|
|
bitfld.word 0x00 15. " EN ,Enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 14. " MS ,Master select" "Slave mode,Master mode"
|
|
textline " "
|
|
rbitfld.word 0x00 12. " BSY ,Busy flag" "Not busy,Busy"
|
|
rbitfld.word 0x00 11. " BE ,Baud rate error flag" "No error,Error"
|
|
textline " "
|
|
rbitfld.word 0x00 10. " PE ,Phase error flag" "No error,Error"
|
|
rbitfld.word 0x00 9. " RE ,Receive error flag" "No error,Error"
|
|
textline " "
|
|
rbitfld.word 0x00 8. " TE ,Transmit error flag" "No error,Error"
|
|
rbitfld.word 0x00 0.--3. " BC ,Bit count field" ",2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
endif
|
|
wgroup.word 0x14++0x01
|
|
line.word 0x00 "SSC_ISRCLR,Interrupt Status Register Clear"
|
|
bitfld.word 0x00 11. " BECLR ,Baud rate error flag clear" "No effect,Clear"
|
|
bitfld.word 0x00 10. " PECLR ,Phase error flag clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RECLR ,Receive error flag clear" "No effect,Clear"
|
|
bitfld.word 0x00 8. " TECLR ,Transmit error flag clear" "No effect,Clear"
|
|
group.word 0x10++0x01
|
|
line.word 0x00 "SSC_BR,Baud Rate Timer Reload Register"
|
|
group.word 0x08++0x01
|
|
line.word 0x00 "SSC_TB,Transmitter Buffer Register"
|
|
hgroup.word 0x0C++0x01
|
|
hide.word 0x00 "SSC_RB,Receiver Buffer Register"
|
|
in
|
|
width 0x0B
|
|
tree.end
|
|
tree.end
|
|
tree "MF (Measurement Unit)"
|
|
base ad:0x48018000
|
|
width 15.
|
|
tree "VDH Input Attenuator Control Register"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "VMON_SEN_CTRL,Monitoring Sense Control Register"
|
|
bitfld.long 0x00 5. " VMON_SEN_SEL_INRANGE ,VDH monitoring input attenuator select input range" "0-18V,0-28V"
|
|
bitfld.long 0x00 4. " VMON_SEN_HRESO_5V ,VDH monitoring input attenuator high impedance output control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " VMON_SEN_PD_N ,VDH monitoring input attenuator enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 16.
|
|
tree "BEMF Comparators Control And Status Register"
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "BEMFC_CTRL_STS,BEMF Comparator Control Status Register"
|
|
rbitfld.long 0x00 18. " PHW_ZC_STS ,Phase W comparator zero crossing status" "Below,Above"
|
|
rbitfld.long 0x00 17. " PHV_ZC_STS ,Phase V comparator zero crossing status" "Below,Above"
|
|
textline " "
|
|
rbitfld.long 0x00 16. " PHU_ZC_STS ,Phase U comparator zero crossing status" "Below,Above"
|
|
bitfld.long 0x00 12. " CCPOS_INSEL ,Ccposx_3 INSEL select" "GPIO,BEMF"
|
|
textline " "
|
|
bitfld.long 0x00 10. " PHWCOMP_ON ,Phase W comparator on" "Off,On"
|
|
bitfld.long 0x00 9. " PHVCOMP_ON ,Phase V comparator on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 8. " PHUCOMP_ON ,Phase U comparator on" "Off,On"
|
|
bitfld.long 0x00 5. " GPT12CAPINB ,GPT12 CAPINB value" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 4. " FILTBYPS ,BEMF comparator output filter bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 3. " DEMGFILTDIS ,BEMF comparator demagnetisation filter disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PHWCOMP_EN ,Phase W comparator enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " PHVCOMP_EN ,Phase V comparator enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PHUCOMP_EN ,Phase U comparator enable" "Disabled,Enabled"
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "TRIM_BEMFX,Trimming Of Driver"
|
|
bitfld.long 0x00 8.--9. " BEMF_TFILT_SEL ,Filter time for BEMF comparator output signal" "1 us,2 us,4 us,8 us"
|
|
bitfld.long 0x00 0.--2. " BEMF_BT_TFILT_SEL ,Blanking time for BEMF comparator output signal" "6 us,8 us,12 us,16 us,3 us,3 us,3 us,3 us"
|
|
tree.end
|
|
width 16.
|
|
tree "Temperature Sensor Control Register"
|
|
rgroup.long 0x10++0x03
|
|
line.long 0x00 "TEMPSENSE_CTRL,Temperature Sensor Control Register"
|
|
bitfld.long 0x00 7. " SYS_OT_STS ,System overtemperature (Adc2-channel 9) status" "Inactive,Active"
|
|
bitfld.long 0x00 6. " SYS_OTWARN_STS ,System overtemperature warning (Adc2-channel 9) status" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 5. " PMU_OT_STS ,PMU regulator overtemperature (Adc2-channel 9) status" "Inactive,Active"
|
|
bitfld.long 0x00 4. " PMU_OTWARN_STS ,PMU regulator overtemperature warning (Adc2-channel 9) status" "Inactive,Active"
|
|
tree.end
|
|
width 11.
|
|
tree "Supplement Modules Control And Status Register"
|
|
rgroup.long 0x14++0x07
|
|
line.long 0x00 "REF1_STS,Reference 1 Status Register"
|
|
bitfld.long 0x00 5. " REFBG_UPTHWARN_STS ,Status for overvoltage threshold measurement of internal bandgap reference VBG" "Reset,Set"
|
|
bitfld.long 0x00 4. " REFBG_LOTHWARN_STS ,Status for undervoltage threshold measurement of internal bandgap reference VBG" "Reset,Set"
|
|
line.long 0x04 "REF2_CTRL,Reference 2 Control Register"
|
|
bitfld.long 0x04 3. " VREF5V_OV_STS ,ADC1 bit reference voltage generation overvoltage bit" "No overvoltage,Overvoltage"
|
|
bitfld.long 0x04 2. " VREF5V_UV_STS ,ADC1 bit reference voltage generation undervoltage bit" "No undervoltage,Undervoltage"
|
|
textline " "
|
|
bitfld.long 0x04 1. " VREF5V_OVL_STS ,ADC1 bit reference voltage generation over load bit" "No overload,Overload"
|
|
bitfld.long 0x04 0. " VREF5V_PD_N ,ADC1 bit reference voltage generation power down bit" "Not active,Active"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC2 (Measurement Core Module incl. 8-bit ADC)"
|
|
base ad:0x4801C000
|
|
width 15.
|
|
tree "ADC2 Control Registers"
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "ADC2_CTRL_STS,ADC2 Control And Status Register"
|
|
bitfld.long 0x00 17. " VS_RANGE ,ADC2 channel 1 range selection" "3-22V,3-28V"
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "ADC2_HV_STS,ADC2 HV Status Register"
|
|
bitfld.long 0x00 1. " READY ,HV ADC ready bit" "Not ready,Ready"
|
|
tree.end
|
|
width 17.
|
|
tree "Channel Controller Control Registers"
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ADC2_SQ_FB,Sequencer Feedback Register"
|
|
bitfld.long 0x00 16.--20. " CHX ,Current ADC2 channel" "CH0,CH1,CH2,CH3,CH4,CH5,CH6,,,,,,,,,,,,,,,,,,,,,,,CH7,CH8,CH9"
|
|
bitfld.long 0x00 11.--14. " SQX ,Current active sequencer" "SQ0,SQ1,SQ2,SQ3,SQ4,SQ5,SQ6,SQ7,SQ8,SQ9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 10. " ESM_ACTIVE ,ADC2 ESM active" "Not active,Active"
|
|
bitfld.long 0x00 9. " EIM_ACTIVE ,ADC2 EIM active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SQ_STOP ,ADC2 sequencer stop signal for DPP" "Not stopped,Stopped"
|
|
bitfld.long 0x00 0.--3. " SQ_FB ,Current sequence" "SQ1,SQ2,SQ3,SQ4,SQ5,SQ6,SQ7,SQ8,SQ9,SQ10,ESM,CH_MASK,SUSPEND,?..."
|
|
group.long 0x08++0x07
|
|
line.long 0x00 "ADC2_CHX_EIM,Channel Setting Bits For Exceptional Interrupt Measurement"
|
|
bitfld.long 0x00 12. " SEL ,Exceptional interrupt measurement trigger select" "CCU6_SEL,CP_SEL"
|
|
bitfld.long 0x00 11. " EN ,Exceptional interrupt measurement trigger event enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " REP ,Repeat count for exceptional interrupt measurement" "1,2,4,8,16,32,64,128"
|
|
bitfld.long 0x00 0.--4. " CHX ,Channel set for exceptional interrupt measurement" "CH0,CH1,CH2,CH3,CH4,CH5,CH6,,,,,,,,,,,,,,,,,,,,,,,CH7,CH8,CH9"
|
|
line.long 0x04 "ADC2_CHX_ESM,Channel Setting Bits For Exceptional Sequence Measurement"
|
|
rbitfld.long 0x04 17. " STS ,Exceptional sequence measurement is finished" "Not completed,Completed"
|
|
bitfld.long 0x04 16. " EN ,Enable for exceptional sequence measurement trigger event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 10. " SEL ,Exceptional sequence measurement trigger select" "CCU6_SEL,CP_SEL"
|
|
bitfld.long 0x04 6.--9. " ESM_1 ,Channel sequence for exceptional sequence measurement" ",CH6,CH7,,CH8,,,,CH9,?..."
|
|
textline " "
|
|
bitfld.long 0x04 0.--5. " ESM_0 ,Channel sequence for exceptional sequence measurement" ",CH0,CH1,,CH2,,,,CH3,,,,,,,,CH4,,,,,,,,,,,,,,,,CH5,?..."
|
|
group.long 0x14++0x17
|
|
line.long 0x00 "ADC2_CTRL1,Measurement Unit Control Register 1"
|
|
bitfld.long 0x00 5. " CALIB_EN[5] ,Calibration enable for CH0" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CALIB_EN[4] ,Calibration enable for CH1" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CALIB_EN[3] ,Calibration enable for CH2" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CALIB_EN[2] ,Calibration enable for CH3" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CALIB_EN[1] ,Calibration enable for CH4" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CALIB_EN[0] ,Calibration enable for CH5" "Disabled,Enabled"
|
|
line.long 0x04 "ADC2_CTRL2,Measurement Unit Control Register 2"
|
|
bitfld.long 0x04 8.--11. " SAMPLE_TIME_INT ,Sample time of ADC2" "MICLK4,MICLK6,MICLK8,MICLK10,MICLK12,MICLK14,MICLK16,MICLK18,MICLK20,MICLK22,?..."
|
|
rbitfld.long 0x04 7. " MCM_RDY ,Ready signal for MCM after power on or reset" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x04 0. " MCM_PD_N ,Power down signal for MCM" "Disabled,Enabled"
|
|
line.long 0x08 "ADC2_CTRL4,Measurement Unit Control Register 4"
|
|
bitfld.long 0x08 11. " FILT_OUT_SEL_9 ,Output filter selection for channel 9" "Not selected,Selected"
|
|
bitfld.long 0x08 10. " FILT_OUT_SEL_8 ,Output filter selection for channel 8" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 9. " FILT_OUT_SEL_7 ,Output filter selection for channel 7" "Not selected,Selected"
|
|
bitfld.long 0x08 8. " FILT_OUT_SEL_6 ,Output filter selection for channel 6" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 5. " FILT_OUT_SEL_5 ,Output filter selection for channels 5" "Not selected,Selected"
|
|
bitfld.long 0x08 4. " FILT_OUT_SEL_4 ,Output filter selection for channels 4" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FILT_OUT_SEL_3 ,Output filter selection for channels 3" "Not selected,Selected"
|
|
bitfld.long 0x08 2. " FILT_OUT_SEL_2 ,Output filter selection for channels 2" "Not selected,Selected"
|
|
textline " "
|
|
bitfld.long 0x08 1. " FILT_OUT_SEL_1 ,Output filter selection for channels 1" "Not selected,Selected"
|
|
bitfld.long 0x08 0. " FILT_OUT_SEL_0 ,Output filter selection for channels 0" "Not selected,Selected"
|
|
line.long 0x0C "ADC2_SQ1_4,Measurement Channel Enable Bits For Cycle 1-4"
|
|
bitfld.long 0x0C 29. " SQ4[5] ,Sequence 4 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 28. " SQ4[4] ,Sequence 4 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " SQ4[3] ,Sequence 4 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 26. " SQ4[2] ,Sequence 4 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 25. " SQ4[1] ,Sequence 4 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " SQ4[0] ,Sequence 4 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 21. " SQ3[5] ,Sequence 3 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " SQ3[4] ,Sequence 3 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SQ3[3] ,Sequence 3 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 18. " SQ3[2] ,Sequence 3 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 17. " SQ3[1] ,Sequence 3 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " SQ3[0] ,Sequence 3 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 13. " SQ2[5] ,Sequence 2 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " SQ2[4] ,Sequence 2 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " SQ2[3] ,Sequence 2 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 10. " SQ2[2] ,Sequence 2 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 9. " SQ2[1] ,Sequence 2 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " SQ2[0] ,Sequence 2 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 5. " SQ1[5] ,Sequence 1 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " SQ1[4] ,Sequence 1 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " SQ1[3] ,Sequence 1 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 2. " SQ1[2] ,Sequence 1 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 1. " SQ1[1] ,Sequence 1 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " SQ1[0] ,Sequence 1 channel 0 enable" "Disabled,Enabled"
|
|
line.long 0x10 "ADC2_SQ5_8,Measurement Channel Enable Bits For Cycle 5-8"
|
|
bitfld.long 0x10 29. " SQ8[5] ,Sequence 8 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 28. " SQ8[4] ,Sequence 8 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SQ8[3] ,Sequence 8 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 26. " SQ8[2] ,Sequence 8 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 25. " SQ8[1] ,Sequence 8 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 24. " SQ8[0] ,Sequence 8 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 21. " SQ7[5] ,Sequence 7 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 20. " SQ7[4] ,Sequence 7 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SQ7[3] ,Sequence 7 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 18. " SQ7[2] ,Sequence 7 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 17. " SQ7[1] ,Sequence 7 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " SQ7[0] ,Sequence 7 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 13. " SQ6[5] ,Sequence 6 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " SQ6[4] ,Sequence 6 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 11. " SQ6[3] ,Sequence 6 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 10. " SQ6[2] ,Sequence 6 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " SQ6[1] ,Sequence 6 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " SQ6[0] ,Sequence 6 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 5. " SQ5[5] ,Sequence 5 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " SQ5[4] ,Sequence 5 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " SQ5[3] ,Sequence 5 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 2. " SQ5[2] ,Sequence 5 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 1. " SQ5[1] ,Sequence 5 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x10 0. " SQ5[0] ,Sequence 5 channel 0 enable" "Disabled,Enabled"
|
|
line.long 0x14 "ADC2_SQ9_10,Measurement Channel Enable Bits For Cycle 9-10"
|
|
bitfld.long 0x14 13. " SQ10[5] ,Sequence 10 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 12. " SQ10[4] ,Sequence 10 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 11. " SQ10[3] ,Sequence 10 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 10. " SQ10[2] ,Sequence 10 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 9. " SQ10[1] ,Sequence 10 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 8. " SQ10[0] ,Sequence 10 channel 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 5. " SQ9[5] ,Sequence 9 channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 4. " SQ9[4] ,Sequence 9 channel 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 3. " SQ9[3] ,Sequence 9 channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " SQ9[2] ,Sequence 9 channel 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 1. " SQ9[1] ,Sequence 9 channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x14 0. " SQ9[0] ,Sequence 9 channel 0 enable" "Disabled,Enabled"
|
|
group.long 0x2C++0x07
|
|
line.long 0x00 "ADC2_SQ1_8_INT,Measurement Channel Enable Bits For Cycle 1-8"
|
|
bitfld.long 0x00 31. " SQ8_INT[9] ,Sequence 8 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " SQ8_INT[8] ,Sequence 8 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 29. " SQ8_INT[7] ,Sequence 8 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " SQ8_INT[6] ,Sequence 8 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SQ7_INT[9] ,Sequence 7 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " SQ7_INT[8] ,Sequence 7 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " SQ7_INT[7] ,Sequence 7 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " SQ7_INT[6] ,Sequence 7 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SQ6_INT[9] ,Sequence 6 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " SQ6_INT[8] ,Sequence 6 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " SQ6_INT[7] ,Sequence 6 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " SQ6_INT[6] ,Sequence 6 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SQ5_INT[9] ,Sequence 5 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " SQ5_INT[8] ,Sequence 5 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " SQ5_INT[7] ,Sequence 5 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SQ5_INT[6] ,Sequence 5 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SQ4_INT[9] ,Sequence 4 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " SQ4_INT[8] ,Sequence 4 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " SQ4_INT[7] ,Sequence 4 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " SQ4_INT[6] ,Sequence 4 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SQ3_INT[9] ,Sequence 3 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " SQ3_INT[8] ,Sequence 3 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SQ3_INT[7] ,Sequence 3 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " SQ3_INT[6] ,Sequence 3 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SQ2_INT[9] ,Sequence 2 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " SQ2_INT[8] ,Sequence 2 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SQ2_INT[7] ,Sequence 2 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SQ2_INT[6] ,Sequence 2 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SQ1_INT[9] ,Sequence 1 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " SQ1_INT[8] ,Sequence 1 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SQ1_INT[7] ,Sequence 1 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SQ1_INT[6] ,Sequence 1 channel 6 enable" "Disabled,Enabled"
|
|
line.long 0x04 "ADC2_SQ9_10_INT,Measurement Channel Enable Bits For Cycle 9 And 10"
|
|
bitfld.long 0x04 7. " SQ10_INT[9] ,Sequence 10 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 6. " SQ10_INT[8] ,Sequence 10 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 5. " SQ10_INT[7] ,Sequence 10 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " SQ10_INT[6] ,Sequence 10 channel 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SQ9_INT[9] ,Sequence 9 channel 9 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " SQ9_INT[8] ,Sequence 9 channel 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " SQ9_INT[7] ,Sequence 9 channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " SQ9_INT[6] ,Sequence 9 channel 6 enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 16.
|
|
tree "Calibration Unit Control Registers"
|
|
group.long 0x34++0x13
|
|
line.long 0x00 "ADC2_CAL_CH0_1,ADC2 Calibration Value For Channel 0 & 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " GAIN_CH1 ,Gain calibration for channel 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " OFFS_CH1 ,Offset calibration for channel 1"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " GAIN_CH0 ,Gain calibration for channel 0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " OFFS_CH0 ,Offset calibration for channel 0"
|
|
line.long 0x04 "ADC2_CAL_CH2_3,ADC2 Calibration Value For Channel 2 & 3"
|
|
hexmask.long.byte 0x04 24.--31. 1. " GAIN_CH3 ,Gain calibration for channel 3"
|
|
hexmask.long.byte 0x04 16.--23. 1. " OFFS_CH3 ,Offset calibration for channel 3"
|
|
textline " "
|
|
hexmask.long.byte 0x04 8.--15. 1. " GAIN_CH2 ,Gain calibration for channel 2"
|
|
hexmask.long.byte 0x04 0.--7. 1. " OFFS_CH2 ,Offset calibration for channel 2"
|
|
line.long 0x08 "ADC2_CAL_CH4_5,ADC2 Calibration Value For Channel 4 & 5"
|
|
hexmask.long.byte 0x08 24.--31. 1. " GAIN_CH5 ,Gain calibration for channel 5"
|
|
hexmask.long.byte 0x08 16.--23. 1. " OFFS_CH5 ,Offset calibration for channel 5"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " GAIN_CH4 ,Gain calibration for channel 4"
|
|
hexmask.long.byte 0x08 0.--7. 1. " OFFS_CH4 ,Offset calibration for channel 4"
|
|
line.long 0x0C "ADC2_CAL_CH6_7,ADC2 Calibration Value For Channel 6 & 7"
|
|
hexmask.long.byte 0x0C 24.--31. 1. " GAIN_CH7 ,Gain calibration for channel 7"
|
|
hexmask.long.byte 0x0C 16.--23. 1. " OFFS_CH7 ,Offset calibration for channel 7"
|
|
textline " "
|
|
hexmask.long.byte 0x0C 8.--15. 1. " GAIN_CH6 ,Gain calibration for channel 6"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " OFFS_CH6 ,Offset calibration for channel 6"
|
|
line.long 0x10 "ADC2_CAL_CH8_9,ADC2 Calibration Value For Channel 8 & 9"
|
|
hexmask.long.byte 0x10 24.--31. 1. " GAIN_CH9 ,Gain calibration for channel 9"
|
|
hexmask.long.byte 0x10 16.--23. 1. " OFFS_CH9 ,Offset calibration for channel 9"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " GAIN_CH8 ,Gain calibration for channel 8"
|
|
hexmask.long.byte 0x10 0.--7. 1. " OFFS_CH8 ,Offset calibration for channel 8"
|
|
tree.end
|
|
width 19.
|
|
tree "IIR Filter Control Registers"
|
|
group.long 0x48++0x07
|
|
line.long 0x00 "ADC2_FILTCOEFF0_5,Filter Coefficients ADC Channel 0-5"
|
|
bitfld.long 0x00 10.--11. " CH5 ,Filter coefficients ADC channel 5" "/2,/4,/8,/16"
|
|
bitfld.long 0x00 8.--9. " CH4 ,Filter coefficients ADC channel 4" "/2,/4,/8,/16"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CH3 ,Filter coefficients ADC channel 3" "/2,/4,/8,/16"
|
|
bitfld.long 0x00 4.--5. " CH2 ,Filter coefficients ADC channel 2" "/2,/4,/8,/16"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " CH1 ,Filter coefficients ADC channel 1" "/2,/4,/8,/16"
|
|
bitfld.long 0x00 0.--1. " CH0 ,Filter coefficients ADC channel 0" "/2,/4,/8,/16"
|
|
line.long 0x04 "ADC2_FILTCOEFF6_9,Filter Coefficients ADC Channel 6-9"
|
|
bitfld.long 0x04 6.--7. " CH9 ,Filter coefficients ADC channel 9" "/2,/4,/8,/16"
|
|
bitfld.long 0x04 4.--5. " CH8 ,Filter coefficients ADC channel 8" "/2,/4,/8,/16"
|
|
textline " "
|
|
bitfld.long 0x04 2.--3. " CH7 ,Filter coefficients ADC channel 7" "/2,/4,/8,/16"
|
|
bitfld.long 0x04 0.--1. " CH6 ,Filter coefficients ADC channel 6" "/2,/4,/8,/16"
|
|
rgroup.long 0x50++0x27
|
|
line.long 0x00 "ADC2_FILT_OUT0,ADC Or Filter Output Channel 0"
|
|
hexmask.long.word 0x00 0.--9. 1. " OUT_CH0 ,ADC or filter output value channel 0"
|
|
line.long 0x04 "ADC2_FILT_OUT1,ADC Or Filter Output Channel 1"
|
|
hexmask.long.word 0x04 0.--9. 1. " OUT_CH1 ,ADC or filter output value channel 1"
|
|
line.long 0x08 "ADC2_FILT_OUT2,ADC Or Filter Output Channel 2"
|
|
hexmask.long.word 0x08 0.--9. 1. " OUT_CH2 ,ADC or filter output value channel 2"
|
|
line.long 0x0C "ADC2_FILT_OUT3,ADC Or Filter Output Channel 3"
|
|
hexmask.long.word 0x0C 0.--9. 1. " OUT_CH3 ,ADC or filter output value channel 3"
|
|
line.long 0x10 "ADC2_FILT_OUT4,ADC Or Filter Output Channel 4"
|
|
hexmask.long.word 0x10 0.--9. 1. " OUT_CH4 ,ADC or filter output value channel 4"
|
|
line.long 0x14 "ADC2_FILT_OUT5,ADC Or Filter Output Channel 5"
|
|
hexmask.long.word 0x14 0.--9. 1. " OUT_CH5 ,ADC or filter output value channel 5"
|
|
line.long 0x18 "ADC2_FILT_OUT6,ADC Or Filter Output Channel 6"
|
|
hexmask.long.word 0x18 0.--9. 1. " OUT_CH6 ,ADC or filter output value channel 6"
|
|
line.long 0x1C "ADC2_FILT_OUT7,ADC Or Filter Output Channel 7"
|
|
hexmask.long.word 0x1C 0.--9. 1. " OUT_CH7 ,ADC or filter output value channel 7"
|
|
line.long 0x20 "ADC2_FILT_OUT8,ADC Or Filter Output Channel 8"
|
|
hexmask.long.word 0x20 0.--9. 1. " OUT_CH8 ,ADC or filter output value channel 8"
|
|
line.long 0x24 "ADC2_FILT_OUT9,ADC Or Filter Output Channel 9"
|
|
hexmask.long.word 0x24 0.--9. 1. " OUT_CH9 ,ADC or filter output value channel 9"
|
|
tree.end
|
|
width 19.
|
|
tree "Postprocessing Control Registers"
|
|
group.long 0x78++0x3B
|
|
line.long 0x00 "ADC2_FILT_UP_CTRL,Upper Threshold Filter Enable"
|
|
bitfld.long 0x00 5. " CH5_EN ,Upper threshold IIR filter enable ch 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " CH4_EN ,Upper threshold IIR filter enable ch 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3_EN ,Upper threshold IIR filter enable ch 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " CH2_EN ,Upper threshold IIR filter enable ch 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CH1_EN ,Upper threshold IIR filter enable ch 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " CH0_EN ,Upper threshold IIR filter enable ch 0" "Disabled,Enabled"
|
|
line.long 0x04 "ADC2_FILT_LO_CTRL,Lower Threshold Filter Enable"
|
|
bitfld.long 0x04 5. " CH5_EN ,Lower threshold IIR filter enable ch 5" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " CH4_EN ,Lower threshold IIR filter enable ch 4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH3_EN ,Lower threshold IIR filter enable ch 3" "Disabled,Enabled"
|
|
bitfld.long 0x04 2. " CH2_EN ,Lower threshold IIR filter enable ch 2" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 1. " CH1_EN ,Lower threshold IIR filter enable ch 1" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " CH0_EN ,Lower threshold IIR filter enable ch 0" "Disabled,Enabled"
|
|
line.long 0x08 "ADC2_TH0_3_LOWER,Lower Comparator Trigger Level Channel 0-3"
|
|
hexmask.long.byte 0x08 24.--31. 1. " CH3 ,Channel 3 lower trigger level"
|
|
hexmask.long.byte 0x08 16.--23. 1. " CH2 ,Channel 2 lower trigger level"
|
|
textline " "
|
|
hexmask.long.byte 0x08 8.--15. 1. " CH1 ,Channel 1 lower trigger level"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CH0 ,Channel 0 lower trigger level"
|
|
line.long 0x0C "ADC2_TH4_5_LOWER,Lower Comparator Trigger Level Channel 4&5"
|
|
hexmask.long.byte 0x0C 8.--15. 1. " CH5 ,Channel 5 lower trigger level"
|
|
hexmask.long.byte 0x0C 0.--7. 1. " CH4 ,Channel 4 lower trigger level"
|
|
line.long 0x10 "ADC2_TH6_9_LOWER,Lower Comparator Trigger Level Channel 6-9"
|
|
hexmask.long.byte 0x10 24.--31. 1. " CH9 ,Channel 9 lower trigger level"
|
|
hexmask.long.byte 0x10 16.--23. 1. " CH8 ,Channel 8 lower trigger level"
|
|
textline " "
|
|
hexmask.long.byte 0x10 8.--15. 1. " CH7 ,Channel 7 lower trigger level"
|
|
hexmask.long.byte 0x10 0.--7. 1. " CH6 ,Channel 6 lower trigger level"
|
|
line.long 0x14 "ADC2_TH0_3_UPPER,Upper Comparator Trigger Level Channel 0-3"
|
|
hexmask.long.byte 0x14 24.--31. 1. " CH3 ,Channel 3 upper trigger level"
|
|
hexmask.long.byte 0x14 16.--23. 1. " CH2 ,Channel 2 upper trigger level"
|
|
textline " "
|
|
hexmask.long.byte 0x14 8.--15. 1. " CH1 ,Channel 1 upper trigger level"
|
|
hexmask.long.byte 0x14 0.--7. 1. " CH0 ,Channel 0 upper trigger level"
|
|
line.long 0x18 "ADC2_TH4_5_UPPER,Upper Comparator Trigger Level Channel 4&5"
|
|
hexmask.long.byte 0x18 8.--15. 1. " CH5 ,Channel 5 upper trigger level"
|
|
hexmask.long.byte 0x18 0.--7. 1. " CH4 ,Channel 4 upper trigger level"
|
|
line.long 0x1C "ADC2_TH6_9_UPPER,Upper Comparator Trigger Level Channel 6-9"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " CH9 ,Channel 9 upper trigger level"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " CH8 ,Channel 8 upper trigger level"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 8.--15. 1. " CH7 ,Channel 7 upper trigger level"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " CH6 ,Channel 6 upper trigger level"
|
|
line.long 0x20 "ADC2_CNT0_3_LOWER,Lower Counter Trigger Level Channel 0-3"
|
|
bitfld.long 0x20 27.--28. " HYST_LO_CH3 ,Channel 3 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x20 24.--26. " CNT_LO_CH3 ,Lower timer trigger threshold channel 3" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x20 19.--20. " HYST_LO_CH2 ,Channel 2 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x20 16.--18. " CNT_LO_CH2 ,Lower timer trigger threshold channel 2" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x20 11.--12. " HYST_LO_CH1 ,Channel 1 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x20 8.--10. " CNT_LO_CH1 ,Lower timer trigger threshold channel 1" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x20 3.--4. " HYST_LO_CH0 ,Channel 0 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x20 0.--2. " CNT_LO_CH0 ,Lower timer trigger threshold channel 0" "1,2,4,8,16,32,64,128"
|
|
line.long 0x24 "ADC2_CNT4_5_LOWER,Lower Counter Trigger Level Channel 4&5"
|
|
bitfld.long 0x24 11.--12. " HYST_LO_CH5 ,Channel 5 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x24 8.--10. " CNT_LO_CH5 ,Lower timer trigger threshold channel 5" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x24 3.--4. " HYST_LO_CH4 ,Channel 4 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x24 0.--2. " CNT_LO_CH4 ,Lower timer trigger threshold channel 4" "1,2,4,8,16,32,64,128"
|
|
line.long 0x28 "ADC2_CNT6_9_LOWER,Lower Counter Trigger Level Channel 6-9"
|
|
bitfld.long 0x28 27.--28. " HYST_LO_CH9 ,Channel 9 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x28 24.--26. " CNT_LO_CH9 ,Lower timer trigger threshold channel 9" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x28 19.--20. " HYST_LO_CH8 ,Channel 8 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x28 16.--18. " CNT_LO_CH8 ,Lower timer trigger threshold channel 8" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x28 11.--12. " HYST_LO_CH7 ,Channel 7 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x28 8.--10. " CNT_LO_CH7 ,Lower timer trigger threshold channel 7" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x28 3.--4. " HYST_LO_CH6 ,Channel 6 lower hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x28 0.--2. " CNT_LO_CH6 ,Lower timer trigger threshold channel 6" "1,2,4,8,16,32,64,128"
|
|
line.long 0x2C "ADC2_CNT0_3_UPPER,Upper Counter Trigger Level Channel 0-3"
|
|
bitfld.long 0x2C 27.--28. " HYST_UP_CH3 ,Channel 3 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x2C 24.--26. " CNT_UP_CH3 ,Upper timer trigger threshold channel 3" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x2C 19.--20. " HYST_UP_CH2 ,Channel 2 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x2C 16.--18. " CNT_UP_CH2 ,Upper timer trigger threshold channel 2" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x2C 11.--12. " HYST_UP_CH1 ,Channel 1 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x2C 8.--10. " CNT_UP_CH1 ,Upper timer trigger threshold channel 1" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x2C 3.--4. " HYST_UP_CH0 ,Channel 0 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x2C 0.--2. " CNT_UP_CH0 ,Upper timer trigger threshold channel 0" "1,2,4,8,16,32,64,128"
|
|
line.long 0x30 "ADC2_CNT4_5_UPPER,Upper Counter Trigger Level Channel 4&5"
|
|
bitfld.long 0x30 11.--12. " HYST_UP_CH5 ,Channel 5 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x30 8.--10. " CNT_UP_CH5 ,Upper timer trigger threshold channel 5" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x30 3.--4. " HYST_UP_CH4 ,Channel 4 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x30 0.--2. " CNT_UP_CH4 ,Upper timer trigger threshold channel 4" "1,2,4,8,16,32,64,128"
|
|
line.long 0x34 "ADC2_CNT6_9_UPPER,Upper Counter Trigger Level Channel 6-9"
|
|
bitfld.long 0x34 27.--28. " HYST_UP_CH9 ,Channel 9 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x34 24.--26. " CNT_UP_CH9 ,Upper timer trigger threshold channel 9" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x34 19.--20. " HYST_UP_CH8 ,Channel 8 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x34 16.--18. " CNT_UP_CH8 ,Upper timer trigger threshold channel 8" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x34 11.--12. " HYST_UP_CH7 ,Channel 7 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x34 8.--10. " CNT_UP_CH7 ,Upper timer trigger threshold channel 7" "1,2,4,8,16,32,64,128"
|
|
textline " "
|
|
bitfld.long 0x34 3.--4. " HYST_UP_CH6 ,Channel 6 upper hysteresis" "HYSTOFF,HYST4,HYST8,HYST16"
|
|
bitfld.long 0x34 0.--2. " CNT_UP_CH6 ,Upper timer trigger threshold channel 6" "1,2,4,8,16,32,64,128"
|
|
line.long 0x38 "ADC2_MMODE0_5,Overvoltage Measurement Mode Of Ch 0-5"
|
|
bitfld.long 0x38 10.--11. " CH5 ,Measurement mode ch 5" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
bitfld.long 0x38 8.--9. " CH4 ,Measurement mode ch 4" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
textline " "
|
|
bitfld.long 0x38 6.--7. " CH3 ,Measurement mode ch 3" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
bitfld.long 0x38 4.--5. " CH2 ,Measurement mode ch 2" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
textline " "
|
|
bitfld.long 0x38 2.--3. " CH1 ,Measurement mode ch 1" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
bitfld.long 0x38 0.--1. " CH0 ,Measurement mode ch 0" "MMODE0,MMODEUV,MMODEOV,?..."
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "ADC1 (10-Bit Analog To Digital Converter)"
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base ad:0x40004000
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width 15.
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tree "ADC1 Control And Status Register"
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group.long 0x00++0x07
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line.long 0x00 "ADC1_CTRL_STS,ADC1 Control And Status Register"
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bitfld.long 0x00 4.--6. " IN_MUX_SEL ,Channel for software mode" "CH0_EN,CH1_EN,CH2_EN,CH3_EN,CH4_EN,CH5_EN,CH6_EN,CH7_EN"
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bitfld.long 0x00 3. " EOC ,ADC1 end of conversion" "Pending,Finished"
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textline " "
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bitfld.long 0x00 2. " SOC ,ADC1 start of conversion" "Disabled,Enabled"
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bitfld.long 0x00 0. " PD_N ,ADC1 power down signal" "Power down,Power up"
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line.long 0x04 "ADC1_GLOBCTR,Global Control Register"
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bitfld.long 0x04 8.--9. " ANON ,Analog part switched on" "Off,Slow standby,Fast standby,Normal"
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bitfld.long 0x04 0.--5. " DIVA ,Divide factor for the analog internal clock" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64"
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rgroup.long 0x74++0x03
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line.long 0x00 "ADC1_GLOBSTR,Global Status Register"
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bitfld.long 0x00 8.--9. " ANON_ST ,Analog part switched on" "Off,Slow standby,Fast standby,Normal"
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bitfld.long 0x00 3.--5. " CHNR ,Channel number" "0,1,2,3,4,5,6,7"
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textline " "
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bitfld.long 0x00 1. " SAMPLE ,Sample phase indication" "Idle,Active"
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bitfld.long 0x00 0. " BUSY ,Analog part busy" "Idle,Active"
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tree.end
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width 14.
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tree "Channel Controller Control Registers"
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group.long 0x08++0x07
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line.long 0x00 "ADC1_CHX_EIM,Channel Setting Bits For Exceptional Interrupt Measurement"
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bitfld.long 0x00 16.--18. " TRIG_SEL ,Trigger selection for exceptional interrupt measurement" "NONE,COUT63,GPT12_T6OUT,GPT12_T3OUT,T2,T21,CCU_6_INT,#"
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bitfld.long 0x00 4.--6. " REP ,Repeat count for exceptional interrupt measurement" "1,2,4,8,16,32,64,128"
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textline " "
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bitfld.long 0x00 0.--2. " CHX ,Channel set for exceptional interrupt measurement" "CH0_EN,CH1_EN,CH2_EN,CH3_EN,CH4_EN,CH5_EN,CH6_EN,CH7_EN"
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line.long 0x04 "ADC1_CHX_ESM,Channel Setting Bits For Exceptional Sequence Measurement"
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bitfld.long 0x04 16.--18. " TRIG_SEL ,Trigger selection for exceptional interrupt measurement" "NONE,COUT63,GPT12_T6OUT,GPT12_T3OUT,T2,T21,CCU_6_INT,#"
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bitfld.long 0x04 7. " ESM_0[7] ,Exceptional Sequence Measurement Channel 7" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 6. " ESM_0[6] ,Exceptional Sequence Measurement Channel 6" "Disabled,Enabled"
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bitfld.long 0x04 5. " ESM_0[5] ,Exceptional Sequence Measurement Channel 5" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 4. " ESM_0[4] ,Exceptional Sequence Measurement Channel 4" "Disabled,Enabled"
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bitfld.long 0x04 3. " ESM_0[3] ,Exceptional Sequence Measurement Channel 3" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 2. " ESM_0[2] ,Exceptional Sequence Measurement Channel 2" "Disabled,Enabled"
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bitfld.long 0x04 1. " ESM_0[1] ,Exceptional Sequence Measurement Channel 1" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 0. " ESM_0[0] ,Exceptional Sequence Measurement Channel 0" "Disabled,Enabled"
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group.long 0x18++0x07
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line.long 0x00 "ADC1_SQ1_4,Measurement Channel Enable Bits For Cycle 1-4"
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bitfld.long 0x00 31. " SQ4[7] ,Sequence 4 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x00 30. " SQ4[6] ,Sequence 4 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 29. " SQ4[5] ,Sequence 4 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x00 28. " SQ4[4] ,Sequence 4 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 27. " SQ4[3] ,Sequence 4 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x00 26. " SQ4[2] ,Sequence 4 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 25. " SQ4[1] ,Sequence 4 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x00 24. " SQ4[0] ,Sequence 4 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 23. " SQ3[7] ,Sequence 3 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x00 22. " SQ3[6] ,Sequence 3 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 21. " SQ3[5] ,Sequence 3 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x00 20. " SQ3[4] ,Sequence 3 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 19. " SQ3[3] ,Sequence 3 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x00 18. " SQ3[2] ,Sequence 3 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 17. " SQ3[1] ,Sequence 3 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x00 16. " SQ3[0] ,Sequence 3 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 15. " SQ2[7] ,Sequence 2 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x00 14. " SQ2[6] ,Sequence 2 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 13. " SQ2[5] ,Sequence 2 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x00 12. " SQ2[4] ,Sequence 2 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 11. " SQ2[3] ,Sequence 2 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x00 10. " SQ2[2] ,Sequence 2 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 9. " SQ2[1] ,Sequence 2 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x00 8. " SQ2[0] ,Sequence 2 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 7. " SQ1[7] ,Sequence 1 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x00 6. " SQ1[6] ,Sequence 1 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 5. " SQ1[5] ,Sequence 1 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x00 4. " SQ1[4] ,Sequence 1 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 3. " SQ1[3] ,Sequence 1 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x00 2. " SQ1[2] ,Sequence 1 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 1. " SQ1[1] ,Sequence 1 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " SQ1[0] ,Sequence 1 channel 0 enable" "Disabled,Enabled"
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line.long 0x04 "ADC1_SQ5_8,Measurement Channel Enable Bits For Cycle 5-8"
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bitfld.long 0x04 31. " SQ8[7] ,Sequence 8 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x04 30. " SQ8[6] ,Sequence 8 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 29. " SQ8[5] ,Sequence 8 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x04 28. " SQ8[4] ,Sequence 8 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 27. " SQ8[3] ,Sequence 8 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x04 26. " SQ8[2] ,Sequence 8 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 25. " SQ8[1] ,Sequence 8 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x04 24. " SQ8[0] ,Sequence 8 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 23. " SQ7[7] ,Sequence 7 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x04 22. " SQ7[6] ,Sequence 7 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 21. " SQ7[5] ,Sequence 7 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x04 20. " SQ7[4] ,Sequence 7 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 19. " SQ7[3] ,Sequence 7 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x04 18. " SQ7[2] ,Sequence 7 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 17. " SQ7[1] ,Sequence 7 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x04 16. " SQ7[0] ,Sequence 7 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 15. " SQ6[7] ,Sequence 6 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x04 14. " SQ6[6] ,Sequence 6 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 13. " SQ6[5] ,Sequence 6 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x04 12. " SQ6[4] ,Sequence 6 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 11. " SQ6[3] ,Sequence 6 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x04 10. " SQ6[2] ,Sequence 6 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 9. " SQ6[1] ,Sequence 6 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x04 8. " SQ6[0] ,Sequence 6 channel 0 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 7. " SQ5[7] ,Sequence 5 channel 7 enable" "Disabled,Enabled"
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bitfld.long 0x04 6. " SQ5[6] ,Sequence 5 channel 6 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 5. " SQ5[5] ,Sequence 5 channel 5 enable" "Disabled,Enabled"
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bitfld.long 0x04 4. " SQ5[4] ,Sequence 5 channel 4 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 3. " SQ5[3] ,Sequence 5 channel 3 enable" "Disabled,Enabled"
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bitfld.long 0x04 2. " SQ5[2] ,Sequence 5 channel 2 enable" "Disabled,Enabled"
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textline " "
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bitfld.long 0x04 1. " SQ5[1] ,Sequence 5 channel 1 enable" "Disabled,Enabled"
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bitfld.long 0x04 0. " SQ5[0] ,Sequence 5 channel 0 enable" "Disabled,Enabled"
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group.long 0x24++0x0B
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line.long 0x00 "ADC1_DWSEL,Measurement Channel Data Width Selection"
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bitfld.long 0x00 7. " CH7 ,Data width channel 7" "10BIT,8BIT"
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bitfld.long 0x00 6. " CH6 ,Data width channel 6" "10BIT,8BIT"
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textline " "
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bitfld.long 0x00 5. " CH5 ,Data width channel 5" "10BIT,8BIT"
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bitfld.long 0x00 4. " CH4 ,Data width channel 4" "10BIT,8BIT"
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textline " "
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bitfld.long 0x00 3. " CH3 ,Data width channel 3" "10BIT,8BIT"
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bitfld.long 0x00 2. " CH2 ,Data width channel 2" "10BIT,8BIT"
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textline " "
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bitfld.long 0x00 1. " CH1 ,Data width channel 1" "10BIT,8BIT"
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bitfld.long 0x00 0. " CH0 ,Data width channel 0" "10BIT,8BIT"
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line.long 0x04 "ADC1_STC_0_3,Measurement Channel Sample Time Control 0-3"
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hexmask.long.byte 0x04 24.--31. 1. " CH3 ,Sample time control for channel 3"
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hexmask.long.byte 0x04 16.--23. 1. " CH2 ,Sample time control for channel 2"
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textline " "
|
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hexmask.long.byte 0x04 8.--15. 1. " CH1 ,Sample time control for channel 1"
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hexmask.long.byte 0x04 0.--7. 1. " CH0 ,Sample time control for channel 0"
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line.long 0x08 "ADC1_STC_4_7,Measurement Channel Sample Time Control 4-7"
|
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hexmask.long.byte 0x08 24.--31. 1. " CH7 ,Sample time control for channel 7"
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hexmask.long.byte 0x08 16.--23. 1. " CH6 ,Sample time control for channel 6"
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textline " "
|
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hexmask.long.byte 0x08 8.--15. 1. " CH5 ,Sample time control for channel 5"
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hexmask.long.byte 0x08 0.--7. 1. " CH4 ,Sample time control for channel 4"
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group.long 0x50++0x03
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line.long 0x00 "ADC1_SQ_FB,Sequencer Feedback Register"
|
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rbitfld.long 0x00 16.--18. " CHX ,Current channel" "CH0,CH1,CH2,CH3,CH4,CH5,CH6,CH7"
|
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rbitfld.long 0x00 11.--13. " SQX ,Current active sequence in sequencer mode" "SQ0,SQ1,SQ2,SQ3,SQ4,SQ5,SQ6,SQ7"
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textline " "
|
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rbitfld.long 0x00 10. " ESM_ACTIVE ,ADC1 ESM active" "Not active,Active"
|
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rbitfld.long 0x00 9. " EIM_ACTIVE ,ADC1 EIM active" "Not active,Active"
|
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textline " "
|
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bitfld.long 0x00 8. " SQ_RUN ,ADC1 sequencer RUN" "Stopped,Running"
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tree.end
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width 18.
|
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tree "Result Registers"
|
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hgroup.long 0x40++0x03
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hide.long 0x00 "ADC1_RES_OUT_EIM,ADC1 Output Channel EIM"
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in
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hgroup.long 0x54++0x03
|
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hide.long 0x00 "ADC1_RES_OUT7,ADC1 Output Channel 7"
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in
|
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hgroup.long 0x58++0x03
|
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hide.long 0x00 "ADC1_RES_OUT6,ADC1 Output Channel 6"
|
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in
|
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hgroup.long 0x5C++0x03
|
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hide.long 0x00 "ADC1_RES_OUT5,ADC1 Output Channel 5"
|
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in
|
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hgroup.long 0x60++0x03
|
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hide.long 0x00 "ADC1_RES_OUT4,ADC1 Output Channel 4"
|
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in
|
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hgroup.long 0x64++0x03
|
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hide.long 0x00 "ADC1_RES_OUT3,ADC1 Output Channel 3"
|
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in
|
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hgroup.long 0x68++0x03
|
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hide.long 0x00 "ADC1_RES_OUT2,ADC1 Output Channel 2"
|
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in
|
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hgroup.long 0x6C++0x03
|
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hide.long 0x00 "ADC1_RES_OUT1,ADC1 Output Channel 1"
|
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in
|
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hgroup.long 0x70++0x03
|
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hide.long 0x00 "ADC1_RES_OUT0,ADC1 Output Channel 0"
|
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in
|
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tree.end
|
|
width 17.
|
|
tree "Interrupt Registers"
|
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group.long 0x78++0x03
|
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line.long 0x00 "ADC1_IS_SET/CLR,ADC1 Interrupt Status Register"
|
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setclrfld.long 0x00 9. 0x04 9. 0x08 9. " ESM_STS ,Exceptional sequence measurement (Esm) status" "Inactive,Active"
|
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setclrfld.long 0x00 8. 0x04 8. 0x08 8. " EIM_STS ,Exceptional interrupt measurement (Eim) status" "Inactive,Active"
|
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textline " "
|
|
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " CH7_STS ,ADC1 channel 7 interrupt status" "Inactive,Active"
|
|
setclrfld.long 0x00 6. 0x04 6. 0x08 6. " CH6_STS ,ADC1 channel 6 interrupt status" "Inactive,Active"
|
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textline " "
|
|
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " CH5_STS ,ADC1 channel 5 interrupt status" "Inactive,Active"
|
|
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CH4_STS ,ADC1 channel 4 interrupt status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x04 3. 0x08 3. " CH3_STS ,ADC1 channel 3 interrupt status" "Inactive,Active"
|
|
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CH2_STS ,ADC1 channel 2 interrupt status" "Inactive,Active"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CH1_STS ,ADC1 channel 1 interrupt status" "Inactive,Active"
|
|
setclrfld.long 0x00 0. 0x04 0. 0x08 0. " CH0_STS ,ADC1 channel 0 interrupt status" "Inactive,Active"
|
|
tree.end
|
|
width 0x0B
|
|
tree.end
|
|
tree "High-Voltage Monitor Input"
|
|
base ad:0x50004000
|
|
width 5.
|
|
group.byte 0x34++0x00
|
|
line.byte 0x00 "CNF,Settings Monitor 1"
|
|
rbitfld.byte 0x00 7. " STS ,MON status input" "Low,High"
|
|
bitfld.byte 0x00 5. " PU ,Pull-Up current source for MON input enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " PD ,Pull-Down current source for MON input enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " CYC ,MON for cycle sense enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " RISE ,MON Wake-up on rising edge enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " FALL ,MON Wake-up on falling edge enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EN ,MON enable" "Disabled,Enabled"
|
|
width 0x0B
|
|
tree.end
|
|
tree "BDRV (Bridge Driver)"
|
|
base ad:0x40034000
|
|
width 14.
|
|
tree "Driver Register"
|
|
if ((d.l(ad:0x40034000)&0x8000000)==0x8000000)&&((d.l(ad:0x40034000)&0x800)==0x800)&&((d.l(ad:0x40034000)&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 28. " HS2_DS_STS ,High side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 27. " HS2_DCS_EN ,High side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 20. " HS1_DS_STS ,High side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 12. " LS2_DS_STS ,Low side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 4. " LS1_DS_STS ,Low side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x00)&&((d.l(ad:0x40034000)&0x800)==0x800)&&((d.l(ad:0x40034000)&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 27. " HS2_DCS_EN ,High side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 20. " HS1_DS_STS ,High side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 4. " LS1_DS_STS ,Low side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x8000000)&&((d.l(ad:0x40034000)&0x800)==0x00)&&((d.l(ad:0x40034000)&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 28. " HS2_DS_STS ,High side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 20. " HS1_DS_STS ,High side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " LS2_DS_STS ,Low side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LS1_DS_STS ,Low side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x00)&&((d.l(ad:0x40034000)&0x800)==0x00)&&((d.l(ad:0x40034000)&0x1000)==0x1000)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 20. " HS1_DS_STS ,High side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LS1_DS_STS ,Low side driver 1 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x00)&&((d.l(ad:0x40034000)&0x800)==0x00)&&((d.l(ad:0x40034000)&0x1000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x8000000)&&((d.l(ad:0x40034000)&0x800)==0x00)&&((d.l(ad:0x40034000)&0x1000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 28. " HS2_DS_STS ,High side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
rbitfld.long 0x00 12. " LS2_DS_STS ,Low side driver 2 drain source monitoring status in OFF-State" "No short,Short"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x00)&&((d.l(ad:0x40034000)&0x800)==0x800)&&((d.l(ad:0x40034000)&0x1000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 27. " HS2_DCS_EN ,High side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
elif ((d.l(ad:0x40034000)&0x8000000)==0x8000000)&&((d.l(ad:0x40034000)&0x800)==0x800)&&((d.l(ad:0x40034000)&0x1000)==0x00)
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "CTRL1,H-Bridge Driver Control 1"
|
|
bitfld.long 0x00 31. " HS2_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 30. " HS2_OC_STS ,External high side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 29. " HS2_SUPERR_STS ,High side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 27. " HS2_DCS_EN ,High side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 26. " HS2_ON ,High side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 25. " HS2_PWM ,High side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 24. " HS2_EN ,High side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " HS1_OC_DIS ,High side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 22. " HS1_OC_STS ,External high side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 21. " HS1_SUPERR_STS ,High side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 19. " HS1_DCS_EN ,High side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " HS1_ON ,High side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 17. " HS1_PWM ,High side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " HS1_EN ,High side driver 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS2_OC_DIS ,Low side driver overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 14. " LS2_OC_STS ,External low side 2 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 13. " LS2_SUPERR_STS ,Low side driver 2 supply error status" "No error,Error"
|
|
bitfld.long 0x00 11. " LS2_DCS_EN ,Low side driver 2 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LS2_ON ,Low side driver 2 on" "Off,On"
|
|
bitfld.long 0x00 9. " LS2_PWM ,Low side driver 2 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " LS2_EN ,Low side driver 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LS1_OC_DIS ,Low side driver 1 overcurrent shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LS1_OC_STS ,External low side 1 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 5. " LS1_SUPERR_STS ,Low side driver 1 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 3. " LS1_DCS_EN ,Low side driver 1 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " LS1_ON ,Low side driver 1 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LS1_PWM ,Low side driver 1 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " LS1_EN ,Low side driver 1 enable" "Disabled,Enabled"
|
|
endif
|
|
if ((d.l(ad:0x40034000+0x04)&0x800)==0x800)
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL2,H-Bridge Driver Control 2"
|
|
bitfld.long 0x00 31. " DLY_DIAG_DIRSEL ,Ext. Power diag timer on / off select" "Off,On"
|
|
bitfld.long 0x00 28.--30. " DLY_DIAG_CHSEL ,Ext. Power diag timer channel select" "Disabled,HB1 LS,HB2 LS,HB3 LS,Disabled,HB1 HS,HB2 HS,HB3 HS"
|
|
textline " "
|
|
rbitfld.long 0x00 27. " DLY_DIAG_STS ,Ext. Power diag timer valid flag" "Invalid,Valid"
|
|
bitfld.long 0x00 26. " DLY_DIAG_SCLR ,Ext. Power diag timer valid flag clear" "No effect,Clear"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " DLY_DIAG_TIM ,Ext. Power diag timer result register"
|
|
bitfld.long 0x00 15. " HS3_OC_DIS ,High side driver 3 Over-current shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " HS3_OC_STS ,External high side 3 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 13. " HS3_SUPERR_STS ,High side driver 3 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 12. " HS3_DS_STS ,High side driver 3 drain source monitoring status" "No short,Short"
|
|
bitfld.long 0x00 11. " HS3_DCS_EN ,High side driver 3 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HS3_ON ,High side driver 3 on" "Off,On"
|
|
bitfld.long 0x00 9. " HS3_PWM ,High side driver 3 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " HS3_EN ,High side driver 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " LS3_OC_DIS ,Low side driver 3 Over-current shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 6. " LS3_OC_STS ,External low side 3 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 5. " LS3_SUPERR_STS ,Low side driver 3 supply error status" "No error,Error"
|
|
textline " "
|
|
rbitfld.long 0x00 4. " LS3_DS_STS ,Low side driver 3 drain source monitoring status in OFF-State" "No short,Short"
|
|
bitfld.long 0x00 3. " LS3_DCS_EN ,Low side driver 3 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS3_ON ,Low side driver 3 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS3_PWM ,Low side driver 3 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS3_EN ,Low side driver 3 enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CTRL2,H-Bridge Driver Control 2"
|
|
bitfld.long 0x00 31. " DLY_DIAG_DIRSEL ,Ext. Power diag timer on / off select" "Off,On"
|
|
bitfld.long 0x00 28.--30. " DLY_DIAG_CHSEL ,Ext. Power diag timer channel select" "Disabled,HB1 LS,HB2 LS,HB3 LS,Disabled,HB1 HS,HB2 HS,HB3 HS"
|
|
textline " "
|
|
rbitfld.long 0x00 27. " DLY_DIAG_STS ,Ext. Power diag timer valid flag" "Invalid,Valid"
|
|
bitfld.long 0x00 26. " DLY_DIAG_SCLR ,Ext. Power diag timer valid flag clear" "No effect,Clear"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " DLY_DIAG_TIM ,Ext. Power diag timer result register"
|
|
bitfld.long 0x00 15. " HS3_OC_DIS ,High side driver 3 Over-current shutdown select" "Global shutdown,Local shutdown"
|
|
textline " "
|
|
rbitfld.long 0x00 14. " HS3_OC_STS ,External high side 3 FET Over-current status" "No overcurrent,Overcurrent"
|
|
rbitfld.long 0x00 13. " HS3_SUPERR_STS ,High side driver 3 supply error status" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 11. " HS3_DCS_EN ,High side driver 3 diagnosis current source enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " HS3_ON ,High side driver 3 on" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 9. " HS3_PWM ,High side driver 3 PWM enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " HS3_EN ,High side driver 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LS3_OC_DIS ,Low side driver 3 Over-current shutdown select" "Global shutdown,Local shutdown"
|
|
rbitfld.long 0x00 6. " LS3_OC_STS ,External low side 3 FET Over-current status" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
rbitfld.long 0x00 5. " LS3_SUPERR_STS ,Low side driver 3 supply error status" "No error,Error"
|
|
bitfld.long 0x00 3. " LS3_DCS_EN ,Low side driver 3 diagnosis current source enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LS3_ON ,Low side driver 3 on" "Off,On"
|
|
bitfld.long 0x00 1. " LS3_PWM ,Low side driver 3 PWM enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " LS3_EN ,Low side driver 3 enable" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "CTRL3,H-Bridge Driver Control 3"
|
|
rbitfld.long 0x00 31. " SEQ_ERR_STS ,Driver sequence error status" "No error,Error"
|
|
bitfld.long 0x00 30. " SEQ_ERR_SCLR ,Driver sequence error status clear" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " DRV_CCP_DIS ,Dynamic cross conduction protection disable" "No,Yes"
|
|
bitfld.long 0x00 24.--25. " DRV_CCP_TIMSEL ,Minimum cross conduction protection time setting1" "0.2us,0.4us,0.8us,1.6us"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " DSMONVTH ,Voltage threshold for Drain-Source monitoring of external fets" "0.25_V,0.5_V,0.75_V,1.0_V,1.25_V,1.5_V,1.75_V,2.0_V"
|
|
bitfld.long 0x00 15. " OFF_SEQ_EN ,Turn-Off slewrate sequencer enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " IDISCHARGEDIV2_N ,IDISCHARGE current divide by 2 not" "Half range,Full range"
|
|
bitfld.long 0x00 8.--12. " IDISCHARGE_TRIM ,Trimming of the internal driver dis-charge current" "Hi-Z,Min,19.80 mA,31.10 mA,42.30 mA,53.90 mA,64.90 mA,76.20 mA,86.80 mA,98.00 mA,108.50 mA,119.40 mA,129.70 mA,140.30 mA,150.40 mA,160.80 mA,170.10 mA,180.30 mA,189.80 mA,199.60 mA,208.90 mA,218.40 mA,227.40 mA,236.70 mA,245.30 mA,254.30 mA,262.80 mA,271.50 mA,279.60 mA,288.00 mA,295.90 mA,Max 304 mA"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ON_SEQ_EN ,Turn on slewrate sequencer enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " ICHARGEDIV2_N ,ICHARGE current divide by 2 not" "Half range,Full range"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " ICHARGE_TRIM ,Trimming of the internal driver charge current" "Hi-Z,Min,19.80 mA,31.10 mA,42.30 mA,53.90 mA,64.90 mA,76.20 mA,86.80 mA,98.00 mA,108.50 mA,119.40 mA,129.70 mA,140.30 mA,150.40 mA,160.80 mA,170.10 mA,180.30 mA,189.80 mA,199.60 mA,208.90 mA,218.40 mA,227.40 mA,236.70 mA,245.30 mA,254.30 mA,262.80 mA,271.50 mA,279.60 mA,288.00 mA,295.90 mA,Max 304 mA"
|
|
group.long 0x10++0x07
|
|
line.long 0x00 "OFF_SEQ_CTRL,Turn-off Slewrate Sequencer Control"
|
|
bitfld.long 0x00 27.--31. " DRV_OFF_I_1 ,Slew rate sequencer off phase 1 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x00 24.--26. " DRV_OFF_T_1 ,Slew rate sequencer off phase 1 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x00 19.--23. " DRV_OFF_I_2 ,Slew rate sequencer off phase 2 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x00 16.--18. " DRV_OFF_T_2 ,Slew rate sequencer off phase 2 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x00 11.--15. " DRV_OFF_I_3 ,Slew rate sequencer off phase 3 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x00 8.--10. " DRV_OFF_T_3 ,Slew rate sequencer off phase 3 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x00 3.--7. " DRV_OFF_I_4 ,Slew rate sequencer off phase 4 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x00 0.--2. " DRV_OFF_T_4 ,Slew rate sequencer off phase 4 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
line.long 0x04 "ON_SEQ_CTRL,Turn-on Slewrate Sequencer Control"
|
|
bitfld.long 0x04 27.--31. " DRV_ON_I_1 ,Slew rate sequencer on phase 1 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x04 24.--26. " DRV_ON_T_1 ,Slew rate sequencer on phase 1 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x04 19.--23. " DRV_ON_I_2 ,Slew rate sequencer on phase 2 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x04 16.--18. " DRV_ON_T_2 ,Slew rate sequencer on phase 2 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x04 11.--15. " DRV_ON_I_3 ,Slew rate sequencer on phase 3 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x04 8.--10. " DRV_ON_T_3 ,Slew rate sequencer on phase 3 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
textline " "
|
|
bitfld.long 0x04 3.--7. " DRV_ON_I_4 ,Slew rate sequencer on phase 4 current" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Maximum"
|
|
bitfld.long 0x04 0.--2. " DRV_ON_T_4 ,Slew rate sequencer on phase 4 time" "50ns,100ns,150ns,200ns,250ns,300ns,350ns,400ns"
|
|
tree.end
|
|
width 11.
|
|
tree "Driver Trimming Register"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "TRIM_DRVX,Trimming Of Driver"
|
|
bitfld.long 0x00 24.--25. " CPLOW_TFILT_SEL ,Filter time for charge pump voltage low diagnosis" "4 us,8 us,16 us,32 us"
|
|
bitfld.long 0x00 23. " HS3DRV_OCSDN_DIS ,High side 3 predriver in overcurrent situation disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 22. " HS2DRV_OCSDN_DIS ,High side 2 predriver in overcurrent situation disable" "No,Yes"
|
|
bitfld.long 0x00 21. " HS1DRV_OCSDN_DIS ,High side 1 predriver in overcurrent situation disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 20. " HS3DRV_FDISCHG_DIS ,High side 3 predriver fast discharge disable" "No,Yes"
|
|
bitfld.long 0x00 19. " HS2DRV_FDISCHG_DIS ,High side 2 predriver fast discharge disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 18. " HS1DRV_FDISCHG_DIS ,High side 1 predriver fast discharge disable" "No,Yes"
|
|
bitfld.long 0x00 16.--17. " HSDRV_DS_TFILT_SEL ,Filter time for Drain-Source monitoring of high side drivers" "1 us,2 us,4 us,8 us"
|
|
textline " "
|
|
bitfld.long 0x00 15. " LS3DRV_OCSDN_DIS ,Low side 3 predriver in overcurrent situation disable" "No,Yes"
|
|
bitfld.long 0x00 14. " LS2DRV_OCSDN_DIS ,Low side 2 predriver in overcurrent situation disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 13. " LS1DRV_OCSDN_DIS ,Low side 1 predriver in overcurrent situation disable" "No,Yes"
|
|
bitfld.long 0x00 12. " LS3DRV_FDISCHG_DIS ,Low side 3 predriver fast discharge disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 11. " LS2DRV_FDISCHG_DIS ,Low side 2 predriver fast discharge disable" "No,Yes"
|
|
bitfld.long 0x00 10. " LS1DRV_FDISCHG_DIS ,Low side 1 predriver fast discharge disable" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " LSDRV_DS_TFILT_SEL ,Filter time for Drain-Source monitoring of low side drivers" "1 us,2 us,4 us,8 us"
|
|
bitfld.long 0x00 0.--1. " LS_HS_BT_TFILT_SEL ,Blanking time for Drain-Source monitoring of low / high side drivers" "1 us,2 us,4 us,8 us"
|
|
tree.end
|
|
width 13.
|
|
tree "Charge Pump Control And Status Register"
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "CP_CTRL_STS,Charge Pump Control And Status Register"
|
|
bitfld.long 0x00 26.--27. " VTHVCP9V_TRIM ,Charge pump output voltage 9V trimming" "7.5_V,8.0_V,8.5_V,9.0_V"
|
|
bitfld.long 0x00 25. " VCP9V_SET ,Charge pump 9 V output voltage set" "14V,9V"
|
|
textline " "
|
|
bitfld.long 0x00 24. " CPLOPWRM_EN ,Charge pump low power mode enable" "Disabled,Enabled"
|
|
rbitfld.long 0x00 23. " VSD_UPTH_STS ,Driver supply MU high status" "OK,Too high"
|
|
textline " "
|
|
bitfld.long 0x00 22. " DRVX_VSDUP_DIS ,Driver on VSD upper voltage disable" "No,Yes"
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rbitfld.long 0x00 21. " VSD_LOTH_STS ,Driver supply MU low status" "OK,Too low"
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textline " "
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bitfld.long 0x00 20. " DRVX_VSDLO_DIS ,Driver on VSD lower voltage disable" "No,Yes"
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rbitfld.long 0x00 19. " VCP_UPTH_STS ,Charge pump MU high status" "OK,Too high"
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textline " "
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bitfld.long 0x00 18. " DRVX_VCPUP_DIS ,Driver on charge pump upper voltage disable" "Enabled,Disabled"
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rbitfld.long 0x00 17. " VCP_LOTH1_STS ,Charge pump MU low status" "OK,Too low"
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textline " "
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bitfld.long 0x00 16. " DRVX_VCPLO_DIS ,Driver on charge pump low voltage disable" "Enabled,Disabled"
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bitfld.long 0x00 8.--10. " VCP_LOWTH2 ,Charge pump output voltage lower threshold detection level" "7.325_V,7.654_V,7.982_V,8.309_V,8.638_V,8.966_V,9.293_V,9.620_V"
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textline " "
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rbitfld.long 0x00 5. " VCP_LOTH2_STS ,Charge pump low status" "OK,Too low"
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bitfld.long 0x00 2. " CP_RDY_EN ,Bridge driver on charge pump ready enable" "Off,On"
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textline " "
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bitfld.long 0x00 0. " CP_EN ,Charge pump enable" "Disabled,Enabled"
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line.long 0x04 "CP_CLK_CTRL,Charge Pump Clock Control Register"
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bitfld.long 0x04 15. " CPCLK_EN ,Charge pump clock enable" "Disabled,Enabled"
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bitfld.long 0x04 13.--14. " F_CP ,MSB of CP_CLK divider" "0,1,2,3"
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textline " "
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bitfld.long 0x04 8.--12. " DITH_UPPER ,CP_CLK upper frequency boundary during dithering" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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bitfld.long 0x04 0.--4. " DITH_LOWER ,CP_CLK lower frequency boundary during dithering" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
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tree.end
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width 0x0B
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|
tree.end
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tree "CSA (Current Sense Amplifier)"
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base ad:0x48018000
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width 6.
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group.long 0x0C++0x03
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line.long 0x00 "CTRL,Operational Amplifier Control And Status"
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bitfld.long 0x00 8. " VZERO ,Current sense output voltage level to ground" "VOUT,GROUND"
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bitfld.long 0x00 1.--2. " GAIN ,Operational amplifier gain setting" "10,20,40,60"
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bitfld.long 0x00 0. " EN ,OPA enable" "Disabled,Enabled"
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width 0x0B
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tree.end
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textline ""
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