324 lines
18 KiB
Plaintext
324 lines
18 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: ARM CoreSight Module: Secure Debug Channel (sdc600_apbcom_ext)
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; @Props: Released
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; @Author: PEG
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; @Changelog: 2023-04-19
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; @Manufacturer: ARM
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; @Doc: coresight_sdc_600_technical_reference_manual_101130_0002_02_en.pdf
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: persdc.per 16011 2023-04-20 16:40:33Z pegold $
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entry &sdcbase=ad:0x0
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sif (&sdcbase==ad:0x0&&COMPonent.AVAILABLE("SDC")==FALSE())
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textline " Error: No valid SDC base address specified!"
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textline " Either specify a SDC base address including the access class as a parameter"
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textline " or configure a SDC module for this chip."
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textline ""
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textline " Syntax: 'PER ~~/persdc.per <access_class>:<address>' or"
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textline " 'SYStem.CONFIG SDC.Base <access_class>:<address>'"
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else
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sif (&sdcbase==ad:0x0&&COMPonent.AVAILABLE("SDC")==TRUE())
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base e:component.base("SDC",-1)
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config 16. 8.
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width 7.
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group 0xd00--0xd03 "SDC-600 APBCOM Module"
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line.long 0x0 "VIDR,Version ID Register"
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bitfld.long 0x0 4.--7. "PROTVERSION ,APBCOM protocol version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " PMVERSION ,APBCOM programmers model version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd08--0xd0b
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line.long 0x0 "FIDTXR, Feature ID TxEngine Register"
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bitfld.long 0x0 16.--19. "TXFD ,TxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
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bitfld.long 0x0 10. " TXSZ32 ,TxEngine 32-bit write support" "no,yes"
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bitfld.long 0x0 9. " TXSZ16 ,TxEngine 16-bit write support" "no,yes"
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bitfld.long 0x0 8. " TXSZ8 ,TxEngine 8-bit write support" "no,yes"
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bitfld.long 0x0 4.--7. " TXW ,TxEngine width" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes"
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bitfld.long 0x0 1. " TXINT ,TxEngine interrupts implemented" "no,yes"
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bitfld.long 0x0 0. " TXI ,TxEngine implemented" "no,yes"
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group 0xd0c--0xd0f
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line.long 0x0 "FIDRXR,ID RxEngine Register"
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bitfld.long 0x0 16.--19. "RXFD ,RxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
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bitfld.long 0x0 10. " RXSZ32 ,RxEngine 32-bit write support" "no,yes"
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bitfld.long 0x0 9. " RXSZ16 ,RxEngine 16-bit write support" "no,yes"
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bitfld.long 0x0 8. " RXSZ8 ,RxEngine 8-bit write support" "no,yes"
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bitfld.long 0x0 1. " RXINT ,RxEngine interrupts implemented" "no,yes"
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bitfld.long 0x0 0. " RXI ,RxEngine implemented" "no,yes"
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group 0xd10--0xd13
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line.long 0x0 "ICSR,Interrupt Control Status Register"
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bitfld.long 0x0 31. "RXFIS ,RxEngine FIFO interrupt status" "no,yes"
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bitfld.long 0x0 16.--19. " RXFIL ,RxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 15. " TXFIS ,TxEngine FIFO interrupt status" "no,yes"
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bitfld.long 0x0 0.--3. " TXFIL ,TxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hgroup 0xd20--0xd23
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hide.long 0x0 "DR,Data Register"
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in
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hgroup 0xd30--0xd33
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hide.long 0x0 "DBR,Data Blocking Register"
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in
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group 0xd3c--0xd3f
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line.long 0x0 "SR,Status Register"
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bitfld.long 0x0 31. "PEN ,COM port component enabled status" "no,yes"
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bitfld.long 0x0 30. " RXLE ,RxEngine link error detected" "no,yes"
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hexmask.long.byte 0x0 16.--23. 1. " RXF ,RxEngine FIFO fill level"
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bitfld.long 0x0 15. " TRINPROG ,Transfer in progress" "no,yes"
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bitfld.long 0x0 14. " TXLE ,TxEngine link error detected" "no,yes"
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bitfld.long 0x0 13. " TXOE ,TxEngine FIFO overflow" "no,yes"
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bitfld.long 0x0 12. " RRDIS ,Remote reboot requests disabled" "enabled,disabled"
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hexmask.long.byte 0x0 0.--7. 1. " TXS ,TxEngine FIFO space"
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width 11.
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tree "CoreSight Management Registers"
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group 0xefc--0xeff
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line.long 0x0 "ITSTATUS,Integration Mode Status Register"
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bitfld.long 0x0 0. "DPABORT ,Rising Edge on DP_ABORT Detected" "no,yes"
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group 0xf00--0xf03
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line.long 0x0 "ITCTRL,Integration Mode Control Register"
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bitfld.long 0x0 0. "IME ,Integration Mode Enabled" "no,yes"
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group 0xfa0--0xfa3
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line.long 0x0 "CLAIMSET,Claim Tag Set"
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eventfld.long 0x0 7. "SETCTV7 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 6. " SETCTV6 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 5. " SETCTV5 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 4. " SETCTV4 ,Set Claim Tag Value" "-,Available (Set)"
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textline " "
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eventfld.long 0x0 3. "SETCTV3 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 2. " SETCTV2 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 1. " SETCTV1 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 0. " SETCTV0 ,Set Claim Tag Value" "-,Available (Set)"
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group 0xfa4--0xfa7
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line.long 0x0 "CLAIMCLR,Claim Tag Clear"
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eventfld.long 0x0 7. "CLRCTV7 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 6. " CLRCTV6 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 5. " CLRCTV5 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 4. " CLRCTV4 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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textline " "
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eventfld.long 0x0 3. "CLRCTV3 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 2. " CLRCTV2 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 1. " CLRCTV1 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 0. " CLRCTV0 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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group 0xfa8--0xfab
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line.long 0x0 "DEVAFF0,Device Affinity Register 0"
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group 0xfac--0xfaf
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line.long 0x0 "DEVAFF1,Device Affinity Register 1"
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group 0xfb0--0xfb3
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line.long 0x0 "LAR,Lock Access Register"
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hexmask.long.long 0x0 0.--31. 1. "AC ,Access Code"
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group 0xfb4--0xfbb
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line.long 0x0 "LSR,Lock Status Register"
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bitfld.long 0x0 2. "ILR ,Implemented Lock Register" "32-bit,8-bit"
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bitfld.long 0x0 1. " LS ,Lock Status" "Locked,Granted"
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bitfld.long 0x0 0. " LCM ,Lock Control Mechanism Exists" "Not implemented,Implemented"
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group 0xfb8--0xfbb
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line.long 0x0 "AUTHSTATUS,Authentication Status Register"
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bitfld.long 0x0 3. "NIDV ,Value of Noninvasive Debug Enable Signals" "Low,High"
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bitfld.long 0x0 2. " NIDC ,Noninvasive Debug Controlled" "Low,High"
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bitfld.long 0x0 1. " IDV ,Value of Invasive Debug Enable Signals" "Low,High"
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bitfld.long 0x0 0. " IDC ,Invasive Debug Controlled" "Low,High"
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group 0xfbc--0xfbf
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line.long 0x0 "DEVARCH,Device Architecture Register"
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group 0xfc8--0xfcb
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line.long 0x0 "DEVID,Device Configuration Register"
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bitfld.long 0x0 6.--6. "CP ,COM port functionality present" "no,yes"
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bitfld.long 0x0 5.--5. " PRR ,Powerup request functionality included" "no,yes"
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bitfld.long 0x0 4.--4. " SYSMEM ,System memory present on bus to ROM table" "no,yes"
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bitfld.long 0x0 0.--3. " FORMAT ,ROM format" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfc4--0xfc7
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line.long 0x0 "DEVID1,Device Configuration Register 1"
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group 0xfc0--0xfc3
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line.long 0x0 "DEVID2,Device Configuration Register 2"
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group 0xfcc--0xfcf
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line.long 0x0 "DEVTYPE,Device Type Identification Register"
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group 0xfe0--0xfe3
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line.long 0x0 "PIDR0,Peripheral Identification Register 0"
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hexmask.long.byte 0x0 0.--7. 1. "PartNumber[7:0] ,Part Number[7:0]"
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group 0xfe4--0xfe7
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line.long 0x0 "PIDR1,Peripheral Identification Register 1"
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bitfld.long 0x0 4.--7. "JEP106ID[3:0] ,JEP106 Identity Code [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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bitfld.long 0x0 0.--3. " PartNumber[11:8] ,Part Number [11:8]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfe8--0xfeb
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line.long 0x0 "PIDR2,Peripheral Identification Register 2"
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bitfld.long 0x0 4.--7. "REVISION ,Revision Number of Peripherial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 3. " JEP106USED ,Indicating a JEP106 Value Used" "Not used,Used"
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bitfld.long 0x0 0.--2. " JEP106ID[6:4] ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
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group 0xfec--0xfef
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line.long 0x0 "PIDR3,Peripheral Identification Register 3"
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bitfld.long 0x0 4.--7. "REVAND ,Manufacturer Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " CMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xfd0--0xfd3
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line.long 0x0 "PIDR4,Peripheral Identification Register 4"
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bitfld.long 0x0 4.--7. "4KBCOUNT ,Number of 4KB Block Used" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
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bitfld.long 0x0 0.--3. " JEP106CC ,JEP Continuation Code" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfd4--0xfd7
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line.long 0x0 "PIDR5,Peripheral ID5 Register (Reserved for Future)"
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group 0xfd8--0xfdb
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line.long 0x0 "PIDR6,Peripheral ID6 Register (Reserved for Future)"
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group 0xfdc--0xfdf
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line.long 0x0 "PIDR7,Peripheral ID7 Register (Reserved for Future)"
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group 0xff0--0xff3
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line.long 0x0 "CIDR0,Component Identification Register 0"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID0 ,Preamble"
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group 0xff4--0xff7
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line.long 0x0 "CIDR1,Component Identification Register 1"
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bitfld.long 0x0 4.--7. "CLASS ,Component class" "Verification,ROM Table,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CoreSight Component,Reserved,Peripheral Test,Reserved,Reserved,Generic IP,No Standardized"
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hexmask.long.byte 0x0 0.--3. 1. " COMPID1 ,Preamble"
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group 0xff8--0xffb
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line.long 0x0 "CIDR2,Component Identification Register 2"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID2 ,Preamble"
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group 0xffc--0xfff
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line.long 0x0 "CIDR3,Component Identification Register 3"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID3 ,Preamble"
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tree.end
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textline ""
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else
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base &sdcbase
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config 16. 8.
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width 7.
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group 0xd00--0xd03 "SDC-600 APBCOM Module"
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line.long 0x0 "VIDR,Version ID Register"
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bitfld.long 0x0 4.--7. "PROTVERSION ,APBCOM protocol version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " PMVERSION ,APBCOM programmers model version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xd08--0xd0b
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line.long 0x0 "FIDTXR, Feature ID TxEngine Register"
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bitfld.long 0x0 16.--19. "TXFD ,TxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
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bitfld.long 0x0 10. " TXSZ32 ,TxEngine 32-bit write support" "no,yes"
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bitfld.long 0x0 9. " TXSZ16 ,TxEngine 16-bit write support" "no,yes"
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bitfld.long 0x0 8. " TXSZ8 ,TxEngine 8-bit write support" "no,yes"
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bitfld.long 0x0 4.--7. " TXW ,TxEngine width" "0 bytes,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes"
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bitfld.long 0x0 1. " TXINT ,TxEngine interrupts implemented" "no,yes"
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bitfld.long 0x0 0. " TXI ,TxEngine implemented" "no,yes"
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group 0xd0c--0xd0f
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line.long 0x0 "FIDRXR,ID RxEngine Register"
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bitfld.long 0x0 16.--19. "RXFD ,RxEngine FIFO depth" "1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,9 bytes,10 bytes,11 bytes,12 bytes,13 bytes,14 bytes,15 bytes,16 bytes"
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bitfld.long 0x0 10. " RXSZ32 ,RxEngine 32-bit write support" "no,yes"
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bitfld.long 0x0 9. " RXSZ16 ,RxEngine 16-bit write support" "no,yes"
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bitfld.long 0x0 8. " RXSZ8 ,RxEngine 8-bit write support" "no,yes"
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bitfld.long 0x0 1. " RXINT ,RxEngine interrupts implemented" "no,yes"
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bitfld.long 0x0 0. " RXI ,RxEngine implemented" "no,yes"
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group 0xd10--0xd13
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line.long 0x0 "ICSR,Interrupt Control Status Register"
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bitfld.long 0x0 31. "RXFIS ,RxEngine FIFO interrupt status" "no,yes"
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bitfld.long 0x0 16.--19. " RXFIL ,RxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 15. " TXFIS ,TxEngine FIFO interrupt status" "no,yes"
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bitfld.long 0x0 0.--3. " TXFIL ,TxEngine FIFO interrupt level select" "disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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hgroup 0xd20--0xd23
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hide.long 0x0 "DR,Data Register"
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in
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hgroup 0xd30--0xd33
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hide.long 0x0 "DBR,Data Blocking Register"
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in
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group 0xd3c--0xd3f
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line.long 0x0 "SR,Status Register"
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bitfld.long 0x0 31. "PEN ,COM port component enabled status" "no,yes"
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bitfld.long 0x0 30. " RXLE ,RxEngine link error detected" "no,yes"
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hexmask.long.byte 0x0 16.--23. 1. " RXF ,RxEngine FIFO fill level"
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bitfld.long 0x0 15. " TRINPROG ,Transfer in progress" "no,yes"
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bitfld.long 0x0 14. " TXLE ,TxEngine link error detected" "no,yes"
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bitfld.long 0x0 13. " TXOE ,TxEngine FIFO overflow" "no,yes"
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bitfld.long 0x0 12. " RRDIS ,Remote reboot requests disabled" "enabled,disabled"
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hexmask.long.byte 0x0 0.--7. 1. " TXS ,TxEngine FIFO space"
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width 11.
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tree "CoreSight Management Registers"
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group 0xefc--0xeff
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line.long 0x0 "ITSTATUS,Integration Mode Status Register"
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bitfld.long 0x0 0. "DPABORT ,Rising Edge on DP_ABORT Detected" "no,yes"
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group 0xf00--0xf03
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line.long 0x0 "ITCTRL,Integration Mode Control Register"
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bitfld.long 0x0 0. "IME ,Integration Mode Enabled" "no,yes"
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group 0xfa0--0xfa3
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line.long 0x0 "CLAIMSET,Claim Tag Set"
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eventfld.long 0x0 7. "SETCTV7 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 6. " SETCTV6 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 5. " SETCTV5 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 4. " SETCTV4 ,Set Claim Tag Value" "-,Available (Set)"
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textline " "
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eventfld.long 0x0 3. "SETCTV3 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 2. " SETCTV2 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 1. " SETCTV1 ,Set Claim Tag Value" "-,Available (Set)"
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eventfld.long 0x0 0. " SETCTV0 ,Set Claim Tag Value" "-,Available (Set)"
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group 0xfa4--0xfa7
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line.long 0x0 "CLAIMCLR,Claim Tag Clear"
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eventfld.long 0x0 7. "CLRCTV7 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 6. " CLRCTV6 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 5. " CLRCTV5 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 4. " CLRCTV4 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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textline " "
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eventfld.long 0x0 3. "CLRCTV3 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 2. " CLRCTV2 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 1. " CLRCTV1 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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eventfld.long 0x0 0. " CLRCTV0 ,Clear Claim Tag Value" "Not Claimed,Claimed (Clear)"
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group 0xfa8--0xfab
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line.long 0x0 "DEVAFF0,Device Affinity Register 0"
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group 0xfac--0xfaf
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line.long 0x0 "DEVAFF1,Device Affinity Register 1"
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group 0xfb0--0xfb3
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line.long 0x0 "LAR,Lock Access Register"
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hexmask.long.long 0x0 0.--31. 1. "AC ,Access Code"
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group 0xfb4--0xfbb
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line.long 0x0 "LSR,Lock Status Register"
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bitfld.long 0x0 2. "ILR ,Implemented Lock Register" "32-bit,8-bit"
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bitfld.long 0x0 1. " LS ,Lock Status" "Locked,Granted"
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bitfld.long 0x0 0. " LCM ,Lock Control Mechanism Exists" "Not implemented,Implemented"
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group 0xfb8--0xfbb
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line.long 0x0 "AUTHSTATUS,Authentication Status Register"
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bitfld.long 0x0 3. "NIDV ,Value of Noninvasive Debug Enable Signals" "Low,High"
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bitfld.long 0x0 2. " NIDC ,Noninvasive Debug Controlled" "Low,High"
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bitfld.long 0x0 1. " IDV ,Value of Invasive Debug Enable Signals" "Low,High"
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bitfld.long 0x0 0. " IDC ,Invasive Debug Controlled" "Low,High"
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group 0xfbc--0xfbf
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line.long 0x0 "DEVARCH,Device Architecture Register"
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group 0xfc8--0xfcb
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line.long 0x0 "DEVID,Device Configuration Register"
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bitfld.long 0x0 6.--6. "CP ,COM port functionality present" "no,yes"
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bitfld.long 0x0 5.--5. " PRR ,Powerup request functionality included" "no,yes"
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bitfld.long 0x0 4.--4. " SYSMEM ,System memory present on bus to ROM table" "no,yes"
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bitfld.long 0x0 0.--3. " FORMAT ,ROM format" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfc4--0xfc7
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line.long 0x0 "DEVID1,Device Configuration Register 1"
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group 0xfc0--0xfc3
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line.long 0x0 "DEVID2,Device Configuration Register 2"
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group 0xfcc--0xfcf
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line.long 0x0 "DEVTYPE,Device Type Identification Register"
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group 0xfe0--0xfe3
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line.long 0x0 "PIDR0,Peripheral Identification Register 0"
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hexmask.long.byte 0x0 0.--7. 1. "PartNumber[7:0] ,Part Number[7:0]"
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group 0xfe4--0xfe7
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line.long 0x0 "PIDR1,Peripheral Identification Register 1"
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bitfld.long 0x0 4.--7. "JEP106ID[3:0] ,JEP106 Identity Code [3:0]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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bitfld.long 0x0 0.--3. " PartNumber[11:8] ,Part Number [11:8]" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfe8--0xfeb
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line.long 0x0 "PIDR2,Peripheral Identification Register 2"
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bitfld.long 0x0 4.--7. "REVISION ,Revision Number of Peripherial" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 3. " JEP106USED ,Indicating a JEP106 Value Used" "Not used,Used"
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bitfld.long 0x0 0.--2. " JEP106ID[6:4] ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
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group 0xfec--0xfef
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line.long 0x0 "PIDR3,Peripheral Identification Register 3"
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bitfld.long 0x0 4.--7. "REVAND ,Manufacturer Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0.--3. " CMOD ,Customer Modified" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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group 0xfd0--0xfd3
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line.long 0x0 "PIDR4,Peripheral Identification Register 4"
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bitfld.long 0x0 4.--7. "4KBCOUNT ,Number of 4KB Block Used" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
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bitfld.long 0x0 0.--3. " JEP106CC ,JEP Continuation Code" "0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F"
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group 0xfd4--0xfd7
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line.long 0x0 "PIDR5,Peripheral ID5 Register (Reserved for Future)"
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group 0xfd8--0xfdb
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line.long 0x0 "PIDR6,Peripheral ID6 Register (Reserved for Future)"
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group 0xfdc--0xfdf
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line.long 0x0 "PIDR7,Peripheral ID7 Register (Reserved for Future)"
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group 0xff0--0xff3
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line.long 0x0 "CIDR0,Component Identification Register 0"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID0 ,Preamble"
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group 0xff4--0xff7
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line.long 0x0 "CIDR1,Component Identification Register 1"
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bitfld.long 0x0 4.--7. "CLASS ,Component class" "Verification,ROM Table,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CoreSight Component,Reserved,Peripheral Test,Reserved,Reserved,Generic IP,No Standardized"
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hexmask.long.byte 0x0 0.--3. 1. " COMPID1 ,Preamble"
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group 0xff8--0xffb
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line.long 0x0 "CIDR2,Component Identification Register 2"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID2 ,Preamble"
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group 0xffc--0xfff
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line.long 0x0 "CIDR3,Component Identification Register 3"
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hexmask.long.byte 0x0 0.--7. 1. "COMPID3 ,Preamble"
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tree.end
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textline ""
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endif
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endif
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textline " "
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