9431 lines
666 KiB
Plaintext
9431 lines
666 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: S3FXXX On-Chip Peripherals
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; @Props: Released
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; @Author: PSS
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; @Changelog: 2011-07-12 PSS
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; @Manufacturer: SAMSUNG - Samsung Semiconductor
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; @Doc: 000809um_s3f4a0kr_rev10.pdf; 123821um_s3f4a2fr_rev10.pdf
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; 459639um_S3F4A1HJ_Rev10.pdf; 478350um_s3f4a0kj_rev10.pdf
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; 529970um_S3F4A1HR_Rev10.pdf; 564700um_s3f4a2fj_rev10.pdf
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; @Core: ARM7TDMI-S
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pers3fxxx.per 12528 2020-11-12 13:57:39Z bschroefel $
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config 16. 8.
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width 0x0b
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base ad:0x3ff0000
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tree "ICEBreaker"
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width 8.
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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tree.end
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tree "ADC (Analog to Digital Converter)"
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base ad:0xFFE0C000
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width 10.
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group.long 0x58++0x03
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line.long 0x00 "ADC_PMSR,Power Management Status Register"
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setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not halted,Halted"
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hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,IP identifier code"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ADC ,ADC Clock Status" "Disabled,Enabled"
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wgroup.long 0x60++0x03
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line.long 0x00 "ADC_CR,Control Register"
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bitfld.long 0x00 4. " STOP ,Stop Conversion in Continuous Conversion" "No effect,Stop"
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bitfld.long 0x00 3. " START ,Start Conversion" "No effect,Start"
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bitfld.long 0x00 2. " ADCDIS ,ADC Disable" "No effect,Disable"
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textline " "
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bitfld.long 0x00 1. " ADCEN ,ADC Enable" "No effect,Enable"
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bitfld.long 0x00 0. " SWRST ,ADC Software Reset" "No effect,Reset"
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group.long 0x64++0x03
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line.long 0x00 "ADC_MR,Mode Register"
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bitfld.long 0x00 20. " CONTCV ,Continuous Conversion" "One shot,Continuous"
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bitfld.long 0x00 16.--19. " NBRCH[2:0] ,Number of Conversions" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
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bitfld.long 0x00 5. " IES ,Internal/External Start" "Internal,External"
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textline " "
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hexmask.long.byte 0x00 0.--4. 1. " PRVAL[4:0] ,Preload Value"
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wgroup.long 0x6C++0x03
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line.long 0x00 "ADC_CSR,Clear Status Register"
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bitfld.long 0x00 2. " OVR ,Overrun Interrupt" "No effect,Clear"
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rgroup.long 0x70++0x03
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line.long 0x00 "ADC_SR,Status Register"
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bitfld.long 0x00 9. " CTVS ,Continuous Mode Status" "One shot,Continuous"
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bitfld.long 0x00 8. " ADCENS ,ADC Enable Status" "Disabled,Enabled"
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bitfld.long 0x00 2. " OVR ,Overrun" "No overrun,Overrun"
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textline " "
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bitfld.long 0x00 1. " READY ,ADC Ready for Conversion" "Not ready,Ready"
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bitfld.long 0x00 0. " EOC ,End of Conversion" "Not completed,Completed"
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group.long 0x7C++0x03
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line.long 0x00 "ADC_IMR,Inrerrupt Mask Register"
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setclrfld.long 0x00 2. -0x08 2. -0x04 2. " OVR ,Overrun interrupt" "Disabled,Enabled"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " READY ,ADC ready for conversion interrupt" "Disabled,Enabled"
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setclrfld.long 0x00 0. -0x08 0. -0x04 0. " EOC ,End of Conversion interrupt" "Disabled,Enabled"
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group.long 0x80++0x07
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line.long 0x00 "ADC_CMR0,Conversion Mode Register 0"
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bitfld.long 0x00 28.--31. " CV8[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x00 24.--27. " CV7[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x00 20.--23. " CV6[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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textline " "
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bitfld.long 0x00 16.--19. " CV5[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x00 12.--15. " CV4[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x00 8.--11. " CV3[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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textline " "
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bitfld.long 0x00 4.--7. " CV2[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x00 0.--3. " CV1[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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line.long 0x04 "ADC_CMR1,Conversion Mode Register 1"
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bitfld.long 0x04 28.--31. " CV16[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x04 24.--27. " CV15[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x04 20.--23. " CV14[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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textline " "
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bitfld.long 0x04 16.--19. " CV13[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x04 12.--15. " CV12[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x04 8.--11. " CV11[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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textline " "
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bitfld.long 0x04 4.--7. " CV10[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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bitfld.long 0x04 0.--3. " CV9[3:0] ,Input Selection" "In0,In1,In2,In3,In4,In5,In6,In7,In8,In9,In10,In11,In12,In13,In14,In15"
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rgroup.long 0x2088++0x03
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line.long 0x00 "ADC_DR,Convert Data Register"
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hexmask.long.word 0x00 0.--9. 1. " DATA[9:0] ,Converted Data"
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width 11.
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tree.end
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sif (cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR"||cpu()=="S3F4A1HR"||cpu()=="S3F4A1HJ")
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tree "CAPT (Capture Module)"
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tree "CAPT0"
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base ad:0xFFE48000
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width 11.
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group.long 0x58++0x03
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line.long 0x00 "CAP0_PMSR,CAPTURE Power Management Status Register"
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setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not halted,Halted"
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hexmask.long 0x00 4.--29. 1. " IPIDCODE ,Version number"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAP ,CAPTURE Clock" "Disabled,Enabled"
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wgroup.long 0x60++0x03
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line.long 0x00 "CAP0_CR,CAPTURE Control Register"
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bitfld.long 0x00 3. " STARTCAP ,Start Capture" "No effect,Start"
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bitfld.long 0x00 2. " CAPDIS ,Capture Disable" "No effect,Disable"
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bitfld.long 0x00 1. " CAPEN ,Capture Enable" "No effect,Enable"
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textline " "
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bitfld.long 0x00 0. " SWRST ,Capture Software Reset" "No effect,Reset"
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group.long 0x64++0x03
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line.long 0x00 "CAP0_MR,CAPTURE Mode Register"
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bitfld.long 0x00 7. " ONESHOT ,One Shot" "Continuous,One shot"
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bitfld.long 0x00 6. " OVERMODE ,Overrun Mode" "Disabled,Enabled"
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bitfld.long 0x00 4.--5. " MEASMODE[1:0] ,Measurement Mode" "Each edge,Each edge,Positive,Negative"
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textline " "
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bitfld.long 0x00 0.--3. " PRESCALAR[3:0] ,Counter Clock Prescalar" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536"
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wgroup.long 0x6C++0x03
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line.long 0x00 "CAP0_CSR,CAPTURE Clear Status Register"
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bitfld.long 0x00 2. " OVERFLOW ,Clear Overflow Interrupt" "No effect,Clear"
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bitfld.long 0x00 1. " OVERRUN ,Clear Overrun Interrupt" "No effect,Clear"
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rgroup.long 0x70++0x03
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line.long 0x00 "CAP0_SR,CAPTURE Status Register"
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bitfld.long 0x00 8. " CAPENS ,Capture Enable Status" "Disabled,Enabled"
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bitfld.long 0x00 3. " DATACAPT ,Data Captured" "Not captured,Captured"
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bitfld.long 0x00 2. " OVERFLOW ,Overflow" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x00 1. " OVERRUN ,Overrun" "Not occurred,Occurred"
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group.long 0x7C++0x03
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line.long 0x00 "CAP0_IMR,CAPTURE Interrupt Mask Register"
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setclrfld.long 0x00 3. -0x08 3. -0x04 3. " DATACAPT ,Data Capture Interrupt Mask" "Disabled,Enabled"
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setclrfld.long 0x00 2. -0x08 2. -0x04 2. " OVERFLOW ,Overflow Interrupt Mask" "Disabled,Enabled"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVERRUN ,Overrun Interrupt Mask" "Disabled,Enabled"
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rgroup.long 0x2080++0x03
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line.long 0x00 "CAP0_DR,CAPTURE Data register"
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bitfld.long 0x00 15. " LEVEL ,Level measured" "Low level,High level"
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hexmask.long.word 0x00 0.--14. 1. " DURATION[14:0] ,Capture Duration"
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width 11.
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tree.end
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sif (cpu()=="S3F4A0KJ")||(cpu()=="S3F4A0KR")
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tree "CAPT1"
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base ad:0xFFE4C000
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width 11.
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group.long 0x58++0x03
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line.long 0x00 "CAP1_PMSR,CAPTURE Power Management Status Register"
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setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not halted,Halted"
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hexmask.long 0x00 4.--29. 1. " IPIDCODE ,Version number"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAP ,CAPTURE Clock" "Disabled,Enabled"
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wgroup.long 0x60++0x03
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line.long 0x00 "CAP1_CR,CAPTURE Control Register"
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bitfld.long 0x00 3. " STARTCAP ,Start Capture" "No effect,Start"
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bitfld.long 0x00 2. " CAPDIS ,Capture Disable" "No effect,Disable"
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bitfld.long 0x00 1. " CAPEN ,Capture Enable" "No effect,Enable"
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textline " "
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bitfld.long 0x00 0. " SWRST ,Capture Software Reset" "No effect,Reset"
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group.long 0x64++0x03
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line.long 0x00 "CAP1_MR,CAPTURE Mode Register"
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bitfld.long 0x00 7. " ONESHOT ,One Shot" "Continuous,One shot"
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bitfld.long 0x00 6. " OVERMODE ,Overrun Mode" "Disabled,Enabled"
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bitfld.long 0x00 4.--5. " MEASMODE[1:0] ,Measurement Mode" "Each edge,Each edge,Positive,Negative"
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textline " "
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bitfld.long 0x00 0.--3. " PRESCALAR[3:0] ,Counter Clock Prescalar" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536"
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wgroup.long 0x6C++0x03
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line.long 0x00 "CAP1_CSR,CAPTURE Clear Status Register"
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bitfld.long 0x00 2. " OVERFLOW ,Clear Overflow Interrupt" "No effect,Clear"
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bitfld.long 0x00 1. " OVERRUN ,Clear Overrun Interrupt" "No effect,Clear"
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rgroup.long 0x70++0x03
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line.long 0x00 "CAP1_SR,CAPTURE Status Register"
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bitfld.long 0x00 8. " CAPENS ,Capture Enable Status" "Disabled,Enabled"
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bitfld.long 0x00 3. " DATACAPT ,Data Captured" "Not captured,Captured"
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bitfld.long 0x00 2. " OVERFLOW ,Overflow" "Not occurred,Occurred"
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textline " "
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bitfld.long 0x00 1. " OVERRUN ,Overrun" "Not occurred,Occurred"
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group.long 0x7C++0x03
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line.long 0x00 "CAP1_IMR,CAPTURE Interrupt Mask Register"
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setclrfld.long 0x00 3. -0x08 3. -0x04 3. " DATACAPT ,Data Capture Interrupt Mask" "Disabled,Enabled"
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setclrfld.long 0x00 2. -0x08 2. -0x04 2. " OVERFLOW ,Overflow Interrupt Mask" "Disabled,Enabled"
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setclrfld.long 0x00 1. -0x08 1. -0x04 1. " OVERRUN ,Overrun Interrupt Mask" "Disabled,Enabled"
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rgroup.long 0x2080++0x03
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line.long 0x00 "CAP1_DR,CAPTURE Data register"
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bitfld.long 0x00 15. " LEVEL ,Level measured" "Low level,High level"
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hexmask.long.word 0x00 0.--14. 1. " DURATION[14:0] ,Capture Duration"
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width 11.
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tree.end
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endif
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tree.end
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endif
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tree "CM (Clock Manager)"
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base ad:0xFFFE8000
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width 11.
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rgroup.long 0x00++0x03
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line.long 0x00 "CM_STR,CLKMNGR Oscillator and PLL Status Register"
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bitfld.long 0x00 3. " LFUSED ,Low frequency oscillator use status" "Unused,Used"
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bitfld.long 0x00 2. " LFOST ,Low frequency oscillator stabilization status" "Disabled,Enabled"
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bitfld.long 0x00 1. " OSCST ,Master oscillator stabilization status" "Disabled,Enabled"
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textline " "
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bitfld.long 0x00 0. " PLLST ,PLL stabilization status" "Disabled,Enabled"
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group.long 0x08++0x0F
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line.long 0x00 "CM_WFIR,CLKMNGR Wait for Interrupt"
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hexmask.long.word 0x00 16.--31. 1. " WFIKEY[15:0] ,Wait for Interrupt Key"
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bitfld.long 0x00 5. " PCLK1 ,Enable/Disable the PCLK1 clocks of peripheral clock in the HALT mode" "Enabled,Disabled"
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line.long 0x04 "CM_PSTR,CLKMNGR PLL Stabilization Time"
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hexmask.long.word 0x04 16.--31. 1. " PLLKEY[15:0] ,Key for write access into the CM_PSTR register"
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hexmask.long.word 0x04 0.--10. 1. " PST[10:0] ,PLL stabilization time"
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line.long 0x08 "CM_PDPR,CLKMNGR PLL Divider Parameters"
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hexmask.long.word 0x08 16.--31. 1. " PDPKEY[15:0] ,Key for write access into the CM_PDPR register"
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bitfld.long 0x08 10.--15. " PLL_PRE[5:0] ,Pre divider parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
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bitfld.long 0x08 8.--9. " PLL_POST[1:0] ,Post scalar parameter" "1,2,4,8"
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textline " "
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hexmask.long.byte 0x08 0.--7. 1. " PMUL[7:0] ,PLL multiplier parameter"
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line.long 0x0C "CM_OSTR,CLKMNGR Oscillator Stabilization Time"
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hexmask.long.word 0x0C 16.--31. 1. " OSTKEY[15:0] ,Key for write access into the CM_OSTR register"
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hexmask.long.word 0x0C 0.--15. 1. " OST[15:0] ,Master oscillator stabilization time"
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group.long 0x1C++0x07
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line.long 0x00 "CM_DIVBR,CLKMNGR Master Clock Divider"
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bitfld.long 0x00 0.--2. " PCLK1DIV[2:0] ,Peripheral divider" "1,2,3,4,5,6,7,8"
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line.long 0x04 "CM_SELR,CLKMNGR System Clock Selection"
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hexmask.long.word 0x04 16.--31. 1. " SELKEY[15:0] ,Key for write access into the CM_SELR register"
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bitfld.long 0x04 0.--1. " CMCLK_SEL[1:0] ,Select between different clocks" "Normal,High speed,Slow,Low power"
|
|
rgroup.long 0x24++0x03
|
|
line.long 0x00 "CM_RSR,CLKMNGR Reset Status"
|
|
bitfld.long 0x00 2. " WD ,Internal reset from watchdog" "Not WD,WD"
|
|
bitfld.long 0x00 1. " CM ,Internal reset from Clock Monitor" "Not CM,CM"
|
|
bitfld.long 0x00 0. " LVD ,Internal reset from LVD" "Not LVD,LVD"
|
|
group.long 0x28++0x07
|
|
line.long 0x00 "CM_MDIVR,CLKMNGR Master Oscillator Clock Divider"
|
|
hexmask.long.word 0x00 16.--31. 1. " MDIVKEY[15:0] ,Key for write access into the CM_MDIVR register"
|
|
bitfld.long 0x00 13.--15. " LDIV[2:0] ,Low frequency oscillator clock divider" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 10.--12. " CDIV[2:0] ,Core clock divider" "1,2,3,4,5,6,7,8"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " MDIV[8:0] ,Master clock divider"
|
|
line.long 0x04 "CM_LFOSCR,CLKMNGR Low Frequency Oscillator Control"
|
|
hexmask.long.word 0x04 16.--31. 1. " LFOSCKEY[15:0] ,Key for write access into the CM_LFOSCR register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " LF_ST[7:0] ,Low frequency stabilization time"
|
|
bitfld.long 0x04 1. " LFSEL ,Low frequency clock selection" "Master clock/MDIV+1,Low frequency oscillator clock"
|
|
textline " "
|
|
bitfld.long 0x04 0. " LFOSCEN ,Enable/Disable the low frequency oscillator" "Disabled,Enabled"
|
|
wgroup.long 0x30++0x03
|
|
line.long 0x00 "CM_CR,CLKMNGR Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " CRKEY[15:0] ,Key for write access into the CM_CR register"
|
|
bitfld.long 0x00 5. " IDLEMODE ,Stop ARM clock" "No effect,IDLE mode"
|
|
bitfld.long 0x00 4. " STOPMODE ,Stop all clocks" "No effect,STOP mode"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HALTMODE ,Stop ARM clock" "No effect,HALT mode"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CM_MR,CLKMNGR Mode Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " MRKEY[15:0] ,Key for write access into the CM_MR register"
|
|
bitfld.long 0x00 0. " CM_EN ,Clock Monitor Enable" "Disabled,Enabled"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "CM_CSR,CM Clear Status Register"
|
|
bitfld.long 0x00 0. " STABLE ,Clear stable interrupt" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "CM_SR,CM Status Register"
|
|
bitfld.long 0x00 0. " STABLE ,Stable interrupt" "Not available,Available"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "CM_IMR,CM Interrupt Mask Register"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " STABLE ,Stable interrupt stable" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "CANB (Controller Area Network)"
|
|
tree "CANB0"
|
|
base ad:0xFFE18000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CAN0_PMSR,Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN0 ,CAN0 Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "CAN0_CR,Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Store"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CAN0DIS ,CAN0 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CAN0EN ,CAN0 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN0 Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CAN0_MR,Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2[2:0] ,Phase Segment 2 Value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1[3:0] ,Phase Segment 1 Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic Retransmission" "No retransmission,Activated"
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
wgroup.long 0x6c++0x03
|
|
line.long 0x00 "CAN0_CSR,Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "CAN0_SR,Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "No request/completed/left,Pending/occurring"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "No access,Access"
|
|
bitfld.long 0x00 23. " TS ,Transmit status" "Idle/receive mode,Started"
|
|
bitfld.long 0x00 22. " RS ,Receive status" "Idle/Transmit mode,Receive mode"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Finished,In progress"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Finished,In progress"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No warning,Limit reached"
|
|
bitfld.long 0x00 16. " CAN0ENS ,CAN0 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No occurred,Occurred"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ISS ,Interrupt Source Status" "No interrupt,Interrupt"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "CAN0_IMR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "CAN0_ISSR,Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 Interrupt" "Not occurred,Occurred"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "CAN0_SIMR,Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x94++0x07
|
|
line.long 0x00 "CAN0_HPIR,CAN0 Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15:0] ,Channel X interrupt mask"
|
|
line.long 0x04 "CAN0_ERCR,CAN0 Error Counter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TEC[7:0] ,Transmit error counter"
|
|
bitfld.long 0x04 7. " REP ,Receive Error Passive" "Below level,Level reached"
|
|
hexmask.long.byte 0x04 0.--6. 1. " REC[6:0] ,Reception error counter"
|
|
if (((d.l(ad:0xFFE18000+0x100+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN0_TMR0,CAN0 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN0_DAR0,CAN0 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN0_DBR0,CAN0 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN0_MSKR0,CAN0 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN0_IR0,CAN0 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN0_MCR0,CAN0 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN0_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN0_TMR0,CAN0 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN0_DAR0,CAN0 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN0_DBR0,CAN0 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN0_MSKR0,CAN0 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN0_IR0,CAN0 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN0_MCR0,CAN0 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN0_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
if (((d.l(ad:0xFFE18000+0x120+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN0_TMR1,CAN0 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN0_DAR1,CAN0 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN0_DBR1,CAN0 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN0_MSKR1,CAN0 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN0_IR1,CAN0 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN0_MCR1,CAN0 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN0_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN0_TMR1,CAN0 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN0_DAR1,CAN0 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN0_DBR1,CAN0 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN0_MSKR1,CAN0 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN0_IR1,CAN0 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN0_MCR1,CAN0 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN0_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
rgroup.long 0x140++0xB
|
|
line.long 0x00 "CAN0_TRR,CAN0 Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32 " "Not waiting,Undone"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31 " "Not waiting,Undone"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30 " "Not waiting,Undone"
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28 " "Not waiting,Undone"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27 " "Not waiting,Undone"
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26 " "Not waiting,Undone"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24 " "Not waiting,Undone"
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23 " "Not waiting,Undone"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22 " "Not waiting,Undone"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20 " "Not waiting,Undone"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19 " "Not waiting,Undone"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18 " "Not waiting,Undone"
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16 " "Not waiting,Undone"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15 " "Not waiting,Undone"
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14 " "Not waiting,Undone"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12 " "Not waiting,Undone"
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11 " "Not waiting,Undone"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10 " "Not waiting,Undone"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8 " "Not waiting,Undone"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7 " "Not waiting,Undone"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6 " "Not waiting,Undone"
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4 " "Not waiting,Undone"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3 " "Not waiting,Undone"
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2 " "Not waiting,Undone"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1 " "Not waiting,Undone"
|
|
line.long 0x04 "CAN0_NDR,CAN0 New Data Register"
|
|
bitfld.long 0x04 31. " CH32 ,New data on channel 32 " "No new data,New data written"
|
|
bitfld.long 0x04 30. " CH31 ,New data on channel 31 " "No new data,New data written"
|
|
bitfld.long 0x04 29. " CH30 ,New data on channel 30 " "No new data,New data written"
|
|
bitfld.long 0x04 28. " CH29 ,New data on channel 29 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 27. " CH28 ,New data on channel 28 " "No new data,New data written"
|
|
bitfld.long 0x04 26. " CH27 ,New data on channel 27 " "No new data,New data written"
|
|
bitfld.long 0x04 25. " CH26 ,New data on channel 26 " "No new data,New data written"
|
|
bitfld.long 0x04 24. " CH25 ,New data on channel 25 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 23. " CH24 ,New data on channel 24 " "No new data,New data written"
|
|
bitfld.long 0x04 22. " CH23 ,New data on channel 23 " "No new data,New data written"
|
|
bitfld.long 0x04 21. " CH22 ,New data on channel 22 " "No new data,New data written"
|
|
bitfld.long 0x04 20. " CH21 ,New data on channel 21 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 19. " CH20 ,New data on channel 20 " "No new data,New data written"
|
|
bitfld.long 0x04 18. " CH19 ,New data on channel 19 " "No new data,New data written"
|
|
bitfld.long 0x04 17. " CH18 ,New data on channel 18 " "No new data,New data written"
|
|
bitfld.long 0x04 16. " CH17 ,New data on channel 17 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CH16 ,New data on channel 16 " "No new data,New data written"
|
|
bitfld.long 0x04 14. " CH15 ,New data on channel 15 " "No new data,New data written"
|
|
bitfld.long 0x04 13. " CH14 ,New data on channel 14 " "No new data,New data written"
|
|
bitfld.long 0x04 12. " CH13 ,New data on channel 13 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CH12 ,New data on channel 12 " "No new data,New data written"
|
|
bitfld.long 0x04 10. " CH11 ,New data on channel 11 " "No new data,New data written"
|
|
bitfld.long 0x04 9. " CH10 ,New data on channel 10 " "No new data,New data written"
|
|
bitfld.long 0x04 8. " CH9 ,New data on channel 9 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CH8 ,New data on channel 8 " "No new data,New data written"
|
|
bitfld.long 0x04 6. " CH7 ,New data on channel 7 " "No new data,New data written"
|
|
bitfld.long 0x04 5. " CH6 ,New data on channel 6 " "No new data,New data written"
|
|
bitfld.long 0x04 4. " CH5 ,New data on channel 5 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH4 ,New data on channel 4 " "No new data,New data written"
|
|
bitfld.long 0x04 2. " CH3 ,New data on channel 3 " "No new data,New data written"
|
|
bitfld.long 0x04 1. " CH2 ,New data on channel 2 " "No new data,New data written"
|
|
bitfld.long 0x04 0. " CH1 ,New data on channel 1 " "No new data,New data written"
|
|
line.long 0x08 "CAN0_MVR,CAN0 Message Valid Register"
|
|
bitfld.long 0x08 31. " CH32 ,Message valid on channel 32 " "Ignored,Configured"
|
|
bitfld.long 0x08 30. " CH31 ,Message valid on channel 31 " "Ignored,Configured"
|
|
bitfld.long 0x08 29. " CH30 ,Message valid on channel 30 " "Ignored,Configured"
|
|
bitfld.long 0x08 28. " CH29 ,Message valid on channel 29 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 27. " CH28 ,Message valid on channel 28 " "Ignored,Configured"
|
|
bitfld.long 0x08 26. " CH27 ,Message valid on channel 27 " "Ignored,Configured"
|
|
bitfld.long 0x08 25. " CH26 ,Message valid on channel 26 " "Ignored,Configured"
|
|
bitfld.long 0x08 24. " CH25 ,Message valid on channel 25 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 23. " CH24 ,Message valid on channel 24 " "Ignored,Configured"
|
|
bitfld.long 0x08 22. " CH23 ,Message valid on channel 23 " "Ignored,Configured"
|
|
bitfld.long 0x08 21. " CH22 ,Message valid on channel 22 " "Ignored,Configured"
|
|
bitfld.long 0x08 20. " CH21 ,Message valid on channel 21 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CH20 ,Message valid on channel 20 " "Ignored,Configured"
|
|
bitfld.long 0x08 18. " CH19 ,Message valid on channel 19 " "Ignored,Configured"
|
|
bitfld.long 0x08 17. " CH18 ,Message valid on channel 18 " "Ignored,Configured"
|
|
bitfld.long 0x08 16. " CH17 ,Message valid on channel 17 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CH16 ,Message valid on channel 16 " "Ignored,Configured"
|
|
bitfld.long 0x08 14. " CH15 ,Message valid on channel 15 " "Ignored,Configured"
|
|
bitfld.long 0x08 13. " CH14 ,Message valid on channel 14 " "Ignored,Configured"
|
|
bitfld.long 0x08 12. " CH13 ,Message valid on channel 13 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 11. " CH12 ,Message valid on channel 12 " "Ignored,Configured"
|
|
bitfld.long 0x08 10. " CH11 ,Message valid on channel 11 " "Ignored,Configured"
|
|
bitfld.long 0x08 9. " CH10 ,Message valid on channel 10 " "Ignored,Configured"
|
|
bitfld.long 0x08 8. " CH9 ,Message valid on channel 9 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CH8 ,Message valid on channel 8 " "Ignored,Configured"
|
|
bitfld.long 0x08 6. " CH7 ,Message valid on channel 7 " "Ignored,Configured"
|
|
bitfld.long 0x08 5. " CH6 ,Message valid on channel 6 " "Ignored,Configured"
|
|
bitfld.long 0x08 4. " CH5 ,Message valid on channel 5 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CH4 ,Message valid on channel 4 " "Ignored,Configured"
|
|
bitfld.long 0x08 2. " CH3 ,Message valid on channel 3 " "Ignored,Configured"
|
|
bitfld.long 0x08 1. " CH2 ,Message valid on channel 2 " "Ignored,Configured"
|
|
bitfld.long 0x08 0. " CH1 ,Message valid on channel 1 " "Ignored,Configured"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CAN0_TSTR,CAN0 Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY[15:0] ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX open drain" "Not configured,Configured"
|
|
bitfld.long 0x00 3.--4. " TX[1:0] ,Control of CAN_TX pin" "Controlled,Monitored,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A0KJ")||(cpu()=="S3F4A0KR")||(cpu()=="S3F4A1HJ")||(cpu()=="S3F4A1HR")
|
|
tree "CANB1"
|
|
base ad:0xFFE3C000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CAN1_PMSR,Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN1 ,CAN1 Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "CAN1_CR,Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Store"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CAN1DIS ,CAN1 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CAN1EN ,CAN1 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN1 Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CAN1_MR,Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2[2:0] ,Phase Segment 2 Value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1[3:0] ,Phase Segment 1 Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic Retransmission" "No retransmission,Activated"
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
wgroup.long 0x6c++0x03
|
|
line.long 0x00 "CAN1_CSR,Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "CAN1_SR,Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "No request/completed/left,Pending/occurring"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "No access,Access"
|
|
bitfld.long 0x00 23. " TS ,Transmit status" "Idle/receive mode,Started"
|
|
bitfld.long 0x00 22. " RS ,Receive status" "Idle/Transmit mode,Receive mode"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Finished,In progress"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Finished,In progress"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No warning,Limit reached"
|
|
bitfld.long 0x00 16. " CAN1ENS ,CAN1 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No occurred,Occurred"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ISS ,Interrupt Source Status" "No interrupt,Interrupt"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "CAN1_IMR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "CAN1_ISSR,Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 Interrupt" "Not occurred,Occurred"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "CAN1_SIMR,Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x94++0x07
|
|
line.long 0x00 "CAN1_HPIR,CAN1 Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15:0] ,Channel X interrupt mask"
|
|
line.long 0x04 "CAN1_ERCR,CAN1 Error Counter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TEC[7:0] ,Transmit error counter"
|
|
bitfld.long 0x04 7. " REP ,Receive Error Passive" "Below level,Level reached"
|
|
hexmask.long.byte 0x04 0.--6. 1. " REC[6:0] ,Reception error counter"
|
|
if (((d.l(ad:0xFFE3C000+0x100+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN1_TMR0,CAN1 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN1_DAR0,CAN1 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN1_DBR0,CAN1 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN1_MSKR0,CAN1 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN1_IR0,CAN1 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN1_MCR0,CAN1 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN1_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN1_TMR0,CAN1 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN1_DAR0,CAN1 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN1_DBR0,CAN1 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN1_MSKR0,CAN1 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN1_IR0,CAN1 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN1_MCR0,CAN1 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN1_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
if (((d.l(ad:0xFFE3C000+0x120+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN1_TMR1,CAN1 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN1_DAR1,CAN1 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN1_DBR1,CAN1 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN1_MSKR1,CAN1 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN1_IR1,CAN1 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN1_MCR1,CAN1 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN1_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN1_TMR1,CAN1 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN1_DAR1,CAN1 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN1_DBR1,CAN1 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN1_MSKR1,CAN1 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN1_IR1,CAN1 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN1_MCR1,CAN1 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN1_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
rgroup.long 0x140++0xB
|
|
line.long 0x00 "CAN1_TRR,CAN1 Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32 " "Not waiting,Undone"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31 " "Not waiting,Undone"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30 " "Not waiting,Undone"
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28 " "Not waiting,Undone"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27 " "Not waiting,Undone"
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26 " "Not waiting,Undone"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24 " "Not waiting,Undone"
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23 " "Not waiting,Undone"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22 " "Not waiting,Undone"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20 " "Not waiting,Undone"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19 " "Not waiting,Undone"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18 " "Not waiting,Undone"
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16 " "Not waiting,Undone"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15 " "Not waiting,Undone"
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14 " "Not waiting,Undone"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12 " "Not waiting,Undone"
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11 " "Not waiting,Undone"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10 " "Not waiting,Undone"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8 " "Not waiting,Undone"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7 " "Not waiting,Undone"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6 " "Not waiting,Undone"
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4 " "Not waiting,Undone"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3 " "Not waiting,Undone"
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2 " "Not waiting,Undone"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1 " "Not waiting,Undone"
|
|
line.long 0x04 "CAN1_NDR,CAN1 New Data Register"
|
|
bitfld.long 0x04 31. " CH32 ,New data on channel 32 " "No new data,New data written"
|
|
bitfld.long 0x04 30. " CH31 ,New data on channel 31 " "No new data,New data written"
|
|
bitfld.long 0x04 29. " CH30 ,New data on channel 30 " "No new data,New data written"
|
|
bitfld.long 0x04 28. " CH29 ,New data on channel 29 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 27. " CH28 ,New data on channel 28 " "No new data,New data written"
|
|
bitfld.long 0x04 26. " CH27 ,New data on channel 27 " "No new data,New data written"
|
|
bitfld.long 0x04 25. " CH26 ,New data on channel 26 " "No new data,New data written"
|
|
bitfld.long 0x04 24. " CH25 ,New data on channel 25 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 23. " CH24 ,New data on channel 24 " "No new data,New data written"
|
|
bitfld.long 0x04 22. " CH23 ,New data on channel 23 " "No new data,New data written"
|
|
bitfld.long 0x04 21. " CH22 ,New data on channel 22 " "No new data,New data written"
|
|
bitfld.long 0x04 20. " CH21 ,New data on channel 21 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 19. " CH20 ,New data on channel 20 " "No new data,New data written"
|
|
bitfld.long 0x04 18. " CH19 ,New data on channel 19 " "No new data,New data written"
|
|
bitfld.long 0x04 17. " CH18 ,New data on channel 18 " "No new data,New data written"
|
|
bitfld.long 0x04 16. " CH17 ,New data on channel 17 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CH16 ,New data on channel 16 " "No new data,New data written"
|
|
bitfld.long 0x04 14. " CH15 ,New data on channel 15 " "No new data,New data written"
|
|
bitfld.long 0x04 13. " CH14 ,New data on channel 14 " "No new data,New data written"
|
|
bitfld.long 0x04 12. " CH13 ,New data on channel 13 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CH12 ,New data on channel 12 " "No new data,New data written"
|
|
bitfld.long 0x04 10. " CH11 ,New data on channel 11 " "No new data,New data written"
|
|
bitfld.long 0x04 9. " CH10 ,New data on channel 10 " "No new data,New data written"
|
|
bitfld.long 0x04 8. " CH9 ,New data on channel 9 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CH8 ,New data on channel 8 " "No new data,New data written"
|
|
bitfld.long 0x04 6. " CH7 ,New data on channel 7 " "No new data,New data written"
|
|
bitfld.long 0x04 5. " CH6 ,New data on channel 6 " "No new data,New data written"
|
|
bitfld.long 0x04 4. " CH5 ,New data on channel 5 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH4 ,New data on channel 4 " "No new data,New data written"
|
|
bitfld.long 0x04 2. " CH3 ,New data on channel 3 " "No new data,New data written"
|
|
bitfld.long 0x04 1. " CH2 ,New data on channel 2 " "No new data,New data written"
|
|
bitfld.long 0x04 0. " CH1 ,New data on channel 1 " "No new data,New data written"
|
|
line.long 0x08 "CAN1_MVR,CAN1 Message Valid Register"
|
|
bitfld.long 0x08 31. " CH32 ,Message valid on channel 32 " "Ignored,Configured"
|
|
bitfld.long 0x08 30. " CH31 ,Message valid on channel 31 " "Ignored,Configured"
|
|
bitfld.long 0x08 29. " CH30 ,Message valid on channel 30 " "Ignored,Configured"
|
|
bitfld.long 0x08 28. " CH29 ,Message valid on channel 29 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 27. " CH28 ,Message valid on channel 28 " "Ignored,Configured"
|
|
bitfld.long 0x08 26. " CH27 ,Message valid on channel 27 " "Ignored,Configured"
|
|
bitfld.long 0x08 25. " CH26 ,Message valid on channel 26 " "Ignored,Configured"
|
|
bitfld.long 0x08 24. " CH25 ,Message valid on channel 25 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 23. " CH24 ,Message valid on channel 24 " "Ignored,Configured"
|
|
bitfld.long 0x08 22. " CH23 ,Message valid on channel 23 " "Ignored,Configured"
|
|
bitfld.long 0x08 21. " CH22 ,Message valid on channel 22 " "Ignored,Configured"
|
|
bitfld.long 0x08 20. " CH21 ,Message valid on channel 21 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CH20 ,Message valid on channel 20 " "Ignored,Configured"
|
|
bitfld.long 0x08 18. " CH19 ,Message valid on channel 19 " "Ignored,Configured"
|
|
bitfld.long 0x08 17. " CH18 ,Message valid on channel 18 " "Ignored,Configured"
|
|
bitfld.long 0x08 16. " CH17 ,Message valid on channel 17 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CH16 ,Message valid on channel 16 " "Ignored,Configured"
|
|
bitfld.long 0x08 14. " CH15 ,Message valid on channel 15 " "Ignored,Configured"
|
|
bitfld.long 0x08 13. " CH14 ,Message valid on channel 14 " "Ignored,Configured"
|
|
bitfld.long 0x08 12. " CH13 ,Message valid on channel 13 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 11. " CH12 ,Message valid on channel 12 " "Ignored,Configured"
|
|
bitfld.long 0x08 10. " CH11 ,Message valid on channel 11 " "Ignored,Configured"
|
|
bitfld.long 0x08 9. " CH10 ,Message valid on channel 10 " "Ignored,Configured"
|
|
bitfld.long 0x08 8. " CH9 ,Message valid on channel 9 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CH8 ,Message valid on channel 8 " "Ignored,Configured"
|
|
bitfld.long 0x08 6. " CH7 ,Message valid on channel 7 " "Ignored,Configured"
|
|
bitfld.long 0x08 5. " CH6 ,Message valid on channel 6 " "Ignored,Configured"
|
|
bitfld.long 0x08 4. " CH5 ,Message valid on channel 5 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CH4 ,Message valid on channel 4 " "Ignored,Configured"
|
|
bitfld.long 0x08 2. " CH3 ,Message valid on channel 3 " "Ignored,Configured"
|
|
bitfld.long 0x08 1. " CH2 ,Message valid on channel 2 " "Ignored,Configured"
|
|
bitfld.long 0x08 0. " CH1 ,Message valid on channel 1 " "Ignored,Configured"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CAN1_TSTR,CAN1 Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY[15:0] ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX open drain" "Not configured,Configured"
|
|
bitfld.long 0x00 3.--4. " TX[1:0] ,Control of CAN_TX pin" "Controlled,Monitored,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A0KJ")||(cpu()=="S3F4A0KR")
|
|
tree "CANB2"
|
|
base ad:0xFFE40000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CAN2_PMSR,Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN2 ,CAN2 Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "CAN2_CR,Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Store"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CAN2DIS ,CAN2 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CAN2EN ,CAN2 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN2 Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CAN2_MR,Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2[2:0] ,Phase Segment 2 Value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1[3:0] ,Phase Segment 1 Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic Retransmission" "No retransmission,Activated"
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
wgroup.long 0x6c++0x03
|
|
line.long 0x00 "CAN2_CSR,Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "CAN2_SR,Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "No request/completed/left,Pending/occurring"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "No access,Access"
|
|
bitfld.long 0x00 23. " TS ,Transmit status" "Idle/receive mode,Started"
|
|
bitfld.long 0x00 22. " RS ,Receive status" "Idle/Transmit mode,Receive mode"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Finished,In progress"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Finished,In progress"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No warning,Limit reached"
|
|
bitfld.long 0x00 16. " CAN2ENS ,CAN2 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No occurred,Occurred"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ISS ,Interrupt Source Status" "No interrupt,Interrupt"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "CAN2_IMR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "CAN2_ISSR,Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 Interrupt" "Not occurred,Occurred"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "CAN2_SIMR,Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x94++0x07
|
|
line.long 0x00 "CAN2_HPIR,CAN2 Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15:0] ,Channel X interrupt mask"
|
|
line.long 0x04 "CAN2_ERCR,CAN2 Error Counter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TEC[7:0] ,Transmit error counter"
|
|
bitfld.long 0x04 7. " REP ,Receive Error Passive" "Below level,Level reached"
|
|
hexmask.long.byte 0x04 0.--6. 1. " REC[6:0] ,Reception error counter"
|
|
if (((d.l(ad:0xFFE40000+0x100+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN2_TMR0,CAN2 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN2_DAR0,CAN2 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN2_DBR0,CAN2 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN2_MSKR0,CAN2 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN2_IR0,CAN2 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN2_MCR0,CAN2 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN2_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN2_TMR0,CAN2 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN2_DAR0,CAN2 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN2_DBR0,CAN2 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN2_MSKR0,CAN2 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN2_IR0,CAN2 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN2_MCR0,CAN2 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN2_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
if (((d.l(ad:0xFFE40000+0x120+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN2_TMR1,CAN2 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN2_DAR1,CAN2 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN2_DBR1,CAN2 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN2_MSKR1,CAN2 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN2_IR1,CAN2 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN2_MCR1,CAN2 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN2_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN2_TMR1,CAN2 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN2_DAR1,CAN2 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN2_DBR1,CAN2 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN2_MSKR1,CAN2 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN2_IR1,CAN2 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN2_MCR1,CAN2 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN2_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
rgroup.long 0x140++0xB
|
|
line.long 0x00 "CAN2_TRR,CAN2 Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32 " "Not waiting,Undone"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31 " "Not waiting,Undone"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30 " "Not waiting,Undone"
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28 " "Not waiting,Undone"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27 " "Not waiting,Undone"
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26 " "Not waiting,Undone"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24 " "Not waiting,Undone"
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23 " "Not waiting,Undone"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22 " "Not waiting,Undone"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20 " "Not waiting,Undone"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19 " "Not waiting,Undone"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18 " "Not waiting,Undone"
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16 " "Not waiting,Undone"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15 " "Not waiting,Undone"
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14 " "Not waiting,Undone"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12 " "Not waiting,Undone"
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11 " "Not waiting,Undone"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10 " "Not waiting,Undone"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8 " "Not waiting,Undone"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7 " "Not waiting,Undone"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6 " "Not waiting,Undone"
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4 " "Not waiting,Undone"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3 " "Not waiting,Undone"
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2 " "Not waiting,Undone"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1 " "Not waiting,Undone"
|
|
line.long 0x04 "CAN2_NDR,CAN2 New Data Register"
|
|
bitfld.long 0x04 31. " CH32 ,New data on channel 32 " "No new data,New data written"
|
|
bitfld.long 0x04 30. " CH31 ,New data on channel 31 " "No new data,New data written"
|
|
bitfld.long 0x04 29. " CH30 ,New data on channel 30 " "No new data,New data written"
|
|
bitfld.long 0x04 28. " CH29 ,New data on channel 29 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 27. " CH28 ,New data on channel 28 " "No new data,New data written"
|
|
bitfld.long 0x04 26. " CH27 ,New data on channel 27 " "No new data,New data written"
|
|
bitfld.long 0x04 25. " CH26 ,New data on channel 26 " "No new data,New data written"
|
|
bitfld.long 0x04 24. " CH25 ,New data on channel 25 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 23. " CH24 ,New data on channel 24 " "No new data,New data written"
|
|
bitfld.long 0x04 22. " CH23 ,New data on channel 23 " "No new data,New data written"
|
|
bitfld.long 0x04 21. " CH22 ,New data on channel 22 " "No new data,New data written"
|
|
bitfld.long 0x04 20. " CH21 ,New data on channel 21 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 19. " CH20 ,New data on channel 20 " "No new data,New data written"
|
|
bitfld.long 0x04 18. " CH19 ,New data on channel 19 " "No new data,New data written"
|
|
bitfld.long 0x04 17. " CH18 ,New data on channel 18 " "No new data,New data written"
|
|
bitfld.long 0x04 16. " CH17 ,New data on channel 17 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CH16 ,New data on channel 16 " "No new data,New data written"
|
|
bitfld.long 0x04 14. " CH15 ,New data on channel 15 " "No new data,New data written"
|
|
bitfld.long 0x04 13. " CH14 ,New data on channel 14 " "No new data,New data written"
|
|
bitfld.long 0x04 12. " CH13 ,New data on channel 13 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CH12 ,New data on channel 12 " "No new data,New data written"
|
|
bitfld.long 0x04 10. " CH11 ,New data on channel 11 " "No new data,New data written"
|
|
bitfld.long 0x04 9. " CH10 ,New data on channel 10 " "No new data,New data written"
|
|
bitfld.long 0x04 8. " CH9 ,New data on channel 9 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CH8 ,New data on channel 8 " "No new data,New data written"
|
|
bitfld.long 0x04 6. " CH7 ,New data on channel 7 " "No new data,New data written"
|
|
bitfld.long 0x04 5. " CH6 ,New data on channel 6 " "No new data,New data written"
|
|
bitfld.long 0x04 4. " CH5 ,New data on channel 5 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH4 ,New data on channel 4 " "No new data,New data written"
|
|
bitfld.long 0x04 2. " CH3 ,New data on channel 3 " "No new data,New data written"
|
|
bitfld.long 0x04 1. " CH2 ,New data on channel 2 " "No new data,New data written"
|
|
bitfld.long 0x04 0. " CH1 ,New data on channel 1 " "No new data,New data written"
|
|
line.long 0x08 "CAN2_MVR,CAN2 Message Valid Register"
|
|
bitfld.long 0x08 31. " CH32 ,Message valid on channel 32 " "Ignored,Configured"
|
|
bitfld.long 0x08 30. " CH31 ,Message valid on channel 31 " "Ignored,Configured"
|
|
bitfld.long 0x08 29. " CH30 ,Message valid on channel 30 " "Ignored,Configured"
|
|
bitfld.long 0x08 28. " CH29 ,Message valid on channel 29 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 27. " CH28 ,Message valid on channel 28 " "Ignored,Configured"
|
|
bitfld.long 0x08 26. " CH27 ,Message valid on channel 27 " "Ignored,Configured"
|
|
bitfld.long 0x08 25. " CH26 ,Message valid on channel 26 " "Ignored,Configured"
|
|
bitfld.long 0x08 24. " CH25 ,Message valid on channel 25 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 23. " CH24 ,Message valid on channel 24 " "Ignored,Configured"
|
|
bitfld.long 0x08 22. " CH23 ,Message valid on channel 23 " "Ignored,Configured"
|
|
bitfld.long 0x08 21. " CH22 ,Message valid on channel 22 " "Ignored,Configured"
|
|
bitfld.long 0x08 20. " CH21 ,Message valid on channel 21 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CH20 ,Message valid on channel 20 " "Ignored,Configured"
|
|
bitfld.long 0x08 18. " CH19 ,Message valid on channel 19 " "Ignored,Configured"
|
|
bitfld.long 0x08 17. " CH18 ,Message valid on channel 18 " "Ignored,Configured"
|
|
bitfld.long 0x08 16. " CH17 ,Message valid on channel 17 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CH16 ,Message valid on channel 16 " "Ignored,Configured"
|
|
bitfld.long 0x08 14. " CH15 ,Message valid on channel 15 " "Ignored,Configured"
|
|
bitfld.long 0x08 13. " CH14 ,Message valid on channel 14 " "Ignored,Configured"
|
|
bitfld.long 0x08 12. " CH13 ,Message valid on channel 13 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 11. " CH12 ,Message valid on channel 12 " "Ignored,Configured"
|
|
bitfld.long 0x08 10. " CH11 ,Message valid on channel 11 " "Ignored,Configured"
|
|
bitfld.long 0x08 9. " CH10 ,Message valid on channel 10 " "Ignored,Configured"
|
|
bitfld.long 0x08 8. " CH9 ,Message valid on channel 9 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CH8 ,Message valid on channel 8 " "Ignored,Configured"
|
|
bitfld.long 0x08 6. " CH7 ,Message valid on channel 7 " "Ignored,Configured"
|
|
bitfld.long 0x08 5. " CH6 ,Message valid on channel 6 " "Ignored,Configured"
|
|
bitfld.long 0x08 4. " CH5 ,Message valid on channel 5 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CH4 ,Message valid on channel 4 " "Ignored,Configured"
|
|
bitfld.long 0x08 2. " CH3 ,Message valid on channel 3 " "Ignored,Configured"
|
|
bitfld.long 0x08 1. " CH2 ,Message valid on channel 2 " "Ignored,Configured"
|
|
bitfld.long 0x08 0. " CH1 ,Message valid on channel 1 " "Ignored,Configured"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CAN2_TSTR,CAN2 Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY[15:0] ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX open drain" "Not configured,Configured"
|
|
bitfld.long 0x00 3.--4. " TX[1:0] ,Control of CAN_TX pin" "Controlled,Monitored,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "CANB3"
|
|
base ad:0xFFE44000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "CAN3_PMSR,Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CAN3 ,CAN3 Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "CAN3_CR,Control Register"
|
|
bitfld.long 0x00 10. " STSR ,Store shift register" "No effect,Store"
|
|
bitfld.long 0x00 9. " ABBTX ,Abort basic transmission" "No effect,Abort"
|
|
bitfld.long 0x00 8. " RQBTX ,Request basic transmission" "No effect,Request"
|
|
bitfld.long 0x00 4. " CCDIS ,Configuration change disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CCEN ,Configuration change enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CAN3DIS ,CAN3 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CAN3EN ,CAN3 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,CAN3 Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "CAN3_MR,Mode Register"
|
|
bitfld.long 0x00 20.--22. " PHSEG2[2:0] ,Phase Segment 2 Value" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 16.--19. " PHSEG1[3:0] ,Phase Segment 1 Value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 14. " AR ,Automatic Retransmission" "No retransmission,Activated"
|
|
bitfld.long 0x00 12.--13. " SJW ,Synchronization Jump Width" "1,2,3,4"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--9. 1. " BD ,Baud rate pre-scalar"
|
|
wgroup.long 0x6c++0x03
|
|
line.long 0x00 "CAN3_CSR,Clear Status Register"
|
|
bitfld.long 0x00 15. " CRC ,Clear CRC error" "No effect,Clear"
|
|
bitfld.long 0x00 14. " BIT0 ,Clear bit to zero error" "No effect,Clear"
|
|
bitfld.long 0x00 13. " BIT1 ,Clear bit to one error" "No effect,Clear"
|
|
bitfld.long 0x00 12. " ACK ,Clear acknowledge error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FORM ,Clear form error" "No effect,Clear"
|
|
bitfld.long 0x00 10. " STUFF ,Clear stuff error" "No effect,Clear"
|
|
bitfld.long 0x00 9. " TXOK ,Clear successfully transmit message" "No effect,Clear"
|
|
bitfld.long 0x00 8. " RXOK ,Clear successfully received message" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 4. " ACTVT ,Clear activity" "No effect,Clear"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Clear bus off transition" "No effect,Clear"
|
|
bitfld.long 0x00 2. " ERPASSTR ,Clear error passive transition" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Clear error passive warning transition" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "CAN3_SR,Status Register"
|
|
bitfld.long 0x00 25. " BTXPD ,Basic transmission pending" "No request/completed/left,Pending/occurring"
|
|
bitfld.long 0x00 24. " CCENS ,Configuration change enable" "No access,Access"
|
|
bitfld.long 0x00 23. " TS ,Transmit status" "Idle/receive mode,Started"
|
|
bitfld.long 0x00 22. " RS ,Receive status" "Idle/Transmit mode,Receive mode"
|
|
textline " "
|
|
bitfld.long 0x00 21. " BUSY1 ,Busy flag of interface 1" "Finished,In progress"
|
|
bitfld.long 0x00 20. " BUSY0 ,Busy flag of interface 0" "Finished,In progress"
|
|
bitfld.long 0x00 19. " BUSOFF ,Bus off" "Disabled,Enabled"
|
|
bitfld.long 0x00 18. " ERPASS ,Error passive" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 17. " ERWARN ,Error passive warning" "No warning,Limit reached"
|
|
bitfld.long 0x00 16. " CAN3ENS ,CAN3 enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CRC ,CRC error" "No error,Error"
|
|
bitfld.long 0x00 14. " BIT0 ,Bit to zero error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIT1 ,Bit to one error" "No error,Error"
|
|
bitfld.long 0x00 12. " ACK ,Acknowledge error" "No error,Error"
|
|
bitfld.long 0x00 11. " FORM ,Form error" "No error,Error"
|
|
bitfld.long 0x00 10. " STUFF ,Stuff error" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x00 9. " TXOK ,Successfully transmitted a message" "Not transmitted,Transmitted"
|
|
bitfld.long 0x00 8. " RXOK ,Successfully received a message" "Not received,Received"
|
|
bitfld.long 0x00 4. " ACTVT ,Activity" "No occurred,Occurred"
|
|
bitfld.long 0x00 3. " BUSOFFTR ,Bus off transition" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ERPASSTR ,Error passive transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ERWARNTR ,Error passive warning transition" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ISS ,Interrupt Source Status" "No interrupt,Interrupt"
|
|
group.long 0x7c++0x03
|
|
line.long 0x00 "CAN3_IMR,Interrupt Mask Register"
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CRC ,CRC error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " BIT0 ,Bit to zero error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " BIT1 ,Bit to one error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " ACK ,Acknowledge error mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " FORM ,Form error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " STUFF ,Stuff error mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXOK ,Successfully transmitted a message mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " RXOK ,Successfully received a message mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ACTVT ,Activity mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " BUSOFFTR ,Bus off mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " ERPASSTR ,Error passive mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ERWARNTR ,Error passive warning mask" "Disabled,Enabled"
|
|
rgroup.long 0x84++0x03
|
|
line.long 0x00 "CAN3_ISSR,Interrupt Source Status Register"
|
|
bitfld.long 0x00 31. " CH32 ,Channel 32 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " CH31 ,Channel 31 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 29. " CH30 ,Channel 30 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 28. " CH29 ,Channel 29 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Channel 28 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 26. " CH27 ,Channel 27 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 25. " CH26 ,Channel 26 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " CH25 ,Channel 25 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Channel 24 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 22. " CH23 ,Channel 23 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 21. " CH22 ,Channel 22 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 20. " CH21 ,Channel 21 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Channel 20 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 18. " CH19 ,Channel 19 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 17. " CH18 ,Channel 18 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 16. " CH17 ,Channel 17 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Channel 16 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 14. " CH15 ,Channel 15 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 13. " CH14 ,Channel 14 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 12. " CH13 ,Channel 13 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Channel 12 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 10. " CH11 ,Channel 11 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 9. " CH10 ,Channel 10 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 8. " CH9 ,Channel 9 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Channel 8 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 6. " CH7 ,Channel 7 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 5. " CH6 ,Channel 6 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " CH5 ,Channel 5 Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Channel 4 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CH3 ,Channel 3 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CH2 ,Channel 2 Interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " CH1 ,Channel 1 Interrupt" "Not occurred,Occurred"
|
|
rgroup.long 0x90++0x03
|
|
line.long 0x00 "CAN3_SIMR,Source Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " CH32 ,Channel 32 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " CH31 ,Channel 31 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CH30 ,Channel 30 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " CH29 ,Channel 29 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " CH28 ,Channel 28 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " CH27 ,Channel 27 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CH26 ,Channel 26 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CH25 ,Channel 25 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " CH24 ,Channel 24 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " CH23 ,Channel 23 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " CH22 ,Channel 22 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 20. -0x04 20. " CH21 ,Channel 21 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " CH20 ,Channel 20 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " CH19 ,Channel 19 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CH18 ,Channel 18 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CH17 ,Channel 17 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " CH16 ,Channel 16 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " CH15 ,Channel 15 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " CH14 ,Channel 14 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " CH13 ,Channel 13 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " CH12 ,Channel 12 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CH11 ,Channel 11 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " CH10 ,Channel 10 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " CH9 ,Channel 9 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH8 ,Channel 8 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH7 ,Channel 7 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH6 ,Channel 6 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH5 ,Channel 5 Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH4 ,Channel 4 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH3 ,Channel 3 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH2 ,Channel 2 Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH1 ,Channel 1 Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x94++0x07
|
|
line.long 0x00 "CAN3_HPIR,CAN3 Highest Priority Interrupt Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " INTID[15:0] ,Channel X interrupt mask"
|
|
line.long 0x04 "CAN3_ERCR,CAN3 Error Counter Register"
|
|
hexmask.long.byte 0x04 8.--15. 1. " TEC[7:0] ,Transmit error counter"
|
|
bitfld.long 0x04 7. " REP ,Receive Error Passive" "Below level,Level reached"
|
|
hexmask.long.byte 0x04 0.--6. 1. " REC[6:0] ,Reception error counter"
|
|
if (((d.l(ad:0xFFE44000+0x100+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN3_TMR0,CAN3 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN3_DAR0,CAN3 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN3_DBR0,CAN3 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN3_MSKR0,CAN3 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN3_IR0,CAN3 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN3_MCR0,CAN3 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN3_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "CAN3_TMR0,CAN3 Interface 0 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN3_DAR0,CAN3 Interface 0 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN3_DBR0,CAN3 Interface 0 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN3_MSKR0,CAN3 Interface 0 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN3_IR0,CAN3 Interface 0 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN3_MCR0,CAN3 Interface 0 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x100+0x18)++0x03
|
|
line.long 0x00 "CAN3_STPR0,Interface 0 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
if (((d.l(ad:0xFFE44000+0x120+0x10))&0x40000000)==0x40000000)
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN3_TMR1,CAN3 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN3_DAR1,CAN3 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN3_DBR1,CAN3 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN3_MSKR1,CAN3 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
hexmask.long.tbyte 0x0C 0.--17. 1. " EXTMASK[17:0] ,Extended identifier mask"
|
|
line.long 0x10 "CAN3_IR1,CAN3 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
textline " "
|
|
hexmask.long.tbyte 0x10 0.--17. 1. " EXTID[17:0] ,Extended identifier of interface 0"
|
|
line.long 0x14 "CAN3_MCR1,CAN3 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN3_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
else
|
|
group.long 0x120++0x17
|
|
line.long 0x00 "CAN3_TMR1,CAN3 Interface 1 Transfer Management Register"
|
|
bitfld.long 0x00 15. " CLRIT ,Clear interrupt pending bit" "Unchanged,Cleared"
|
|
bitfld.long 0x00 14. " TRND ,Set TXRQST bit or clear NEWDAT" "Unchanged,Set/Cleared"
|
|
bitfld.long 0x00 12. " AMCR ,Access message control register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 11. " AIR ,Access identifier register" "Unchanged,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 10. " AMSKR ,Access mask register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 9. " ADBR ,Access Data B register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 8. " ADAR ,Access Data A register" "Unchanged,Transferred"
|
|
bitfld.long 0x00 7. " WR ,Write or read direction" "Read,Write"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " NUMBER[5:0] ,Message number"
|
|
line.long 0x04 "CAN3_DAR1,CAN3 Interface 1 Data A Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x08 "CAN3_DBR1,CAN3 Interface 1 Data B Register"
|
|
hexmask.long.byte 0x08 24.--31. 1. " DATA3[7:0] ,Data 3 of interface 0"
|
|
hexmask.long.byte 0x08 16.--23. 1. " DATA2[7:0] ,Data 2 of interface 0"
|
|
hexmask.long.byte 0x08 8.--15. 1. " DATA1[7:0] ,Data 1 of interface 0"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA0[7:0] ,Data 0 of interface 0"
|
|
line.long 0x0C "CAN3_MSKR1,CAN3 Interface 1 Mask Register"
|
|
bitfld.long 0x0C 31. " MXTD ,XTD bit mask" "No effect,Used"
|
|
bitfld.long 0x0C 30. " MMDIR ,Message direction mask" "No effect,Used"
|
|
hexmask.long.word 0x0C 18.--28. 1. " BASEMASK[10:0] ,Base identifier mask"
|
|
line.long 0x10 "CAN3_IR1,CAN3 Interface 1 Identifier Register"
|
|
bitfld.long 0x10 31. " MSGVAL ,Message Valid" "Ignored,Configured"
|
|
bitfld.long 0x10 30. " XTD ,Extended identifier" "Standard,Extended"
|
|
bitfld.long 0x10 29. " MDIR ,Message direction" "Receive,Transmit"
|
|
hexmask.long.word 0x10 18.--28. 1. " BASEID[10:0] ,Base identifier of interface X"
|
|
line.long 0x14 "CAN3_MCR1,CAN3 Interface 1 Message Control Register"
|
|
bitfld.long 0x14 15. " NEWDAT ,New data" "No new data,New data"
|
|
bitfld.long 0x14 14. " MSGLST ,Message lost" "Not lost,Lost"
|
|
bitfld.long 0x14 13. " ITPND ,Interrupt pending" "Not the source,Source"
|
|
bitfld.long 0x14 12. " UMASK ,Use acceptance mask" "Ignored,Used"
|
|
textline " "
|
|
bitfld.long 0x14 11. " TXIE ,Transmit interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 10. " RXIE ,Receive interrupt enable" "Unchanged,Set"
|
|
bitfld.long 0x14 9. " RMTEN ,Remote enable" "Unchanged,Set"
|
|
bitfld.long 0x14 8. " TXRQST ,Transmit request" "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x14 7. " OVERWRITE ,Overwrite mode" "Normal,Overwrite"
|
|
bitfld.long 0x14 0.--3. " DLC[3:0] ,Data length code" "0,1,2,3,4,5,6,7,8,?..."
|
|
rgroup.long (0x120+0x18)++0x03
|
|
line.long 0x00 "CAN3_STPR1,Interface 1 Stamp Register"
|
|
hexmask.long 0x00 0.--31. 1. " STAMP[31:0] ,Stamp value"
|
|
endif
|
|
rgroup.long 0x140++0xB
|
|
line.long 0x00 "CAN3_TRR,CAN3 Transmission Request Register"
|
|
bitfld.long 0x00 31. " CH32 ,Transmission request on channel 32 " "Not waiting,Undone"
|
|
bitfld.long 0x00 30. " CH31 ,Transmission request on channel 31 " "Not waiting,Undone"
|
|
bitfld.long 0x00 29. " CH30 ,Transmission request on channel 30 " "Not waiting,Undone"
|
|
bitfld.long 0x00 28. " CH29 ,Transmission request on channel 29 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 27. " CH28 ,Transmission request on channel 28 " "Not waiting,Undone"
|
|
bitfld.long 0x00 26. " CH27 ,Transmission request on channel 27 " "Not waiting,Undone"
|
|
bitfld.long 0x00 25. " CH26 ,Transmission request on channel 26 " "Not waiting,Undone"
|
|
bitfld.long 0x00 24. " CH25 ,Transmission request on channel 25 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 23. " CH24 ,Transmission request on channel 24 " "Not waiting,Undone"
|
|
bitfld.long 0x00 22. " CH23 ,Transmission request on channel 23 " "Not waiting,Undone"
|
|
bitfld.long 0x00 21. " CH22 ,Transmission request on channel 22 " "Not waiting,Undone"
|
|
bitfld.long 0x00 20. " CH21 ,Transmission request on channel 21 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 19. " CH20 ,Transmission request on channel 20 " "Not waiting,Undone"
|
|
bitfld.long 0x00 18. " CH19 ,Transmission request on channel 19 " "Not waiting,Undone"
|
|
bitfld.long 0x00 17. " CH18 ,Transmission request on channel 18 " "Not waiting,Undone"
|
|
bitfld.long 0x00 16. " CH17 ,Transmission request on channel 17 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 15. " CH16 ,Transmission request on channel 16 " "Not waiting,Undone"
|
|
bitfld.long 0x00 14. " CH15 ,Transmission request on channel 15 " "Not waiting,Undone"
|
|
bitfld.long 0x00 13. " CH14 ,Transmission request on channel 14 " "Not waiting,Undone"
|
|
bitfld.long 0x00 12. " CH13 ,Transmission request on channel 13 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 11. " CH12 ,Transmission request on channel 12 " "Not waiting,Undone"
|
|
bitfld.long 0x00 10. " CH11 ,Transmission request on channel 11 " "Not waiting,Undone"
|
|
bitfld.long 0x00 9. " CH10 ,Transmission request on channel 10 " "Not waiting,Undone"
|
|
bitfld.long 0x00 8. " CH9 ,Transmission request on channel 9 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CH8 ,Transmission request on channel 8 " "Not waiting,Undone"
|
|
bitfld.long 0x00 6. " CH7 ,Transmission request on channel 7 " "Not waiting,Undone"
|
|
bitfld.long 0x00 5. " CH6 ,Transmission request on channel 6 " "Not waiting,Undone"
|
|
bitfld.long 0x00 4. " CH5 ,Transmission request on channel 5 " "Not waiting,Undone"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH4 ,Transmission request on channel 4 " "Not waiting,Undone"
|
|
bitfld.long 0x00 2. " CH3 ,Transmission request on channel 3 " "Not waiting,Undone"
|
|
bitfld.long 0x00 1. " CH2 ,Transmission request on channel 2 " "Not waiting,Undone"
|
|
bitfld.long 0x00 0. " CH1 ,Transmission request on channel 1 " "Not waiting,Undone"
|
|
line.long 0x04 "CAN3_NDR,CAN3 New Data Register"
|
|
bitfld.long 0x04 31. " CH32 ,New data on channel 32 " "No new data,New data written"
|
|
bitfld.long 0x04 30. " CH31 ,New data on channel 31 " "No new data,New data written"
|
|
bitfld.long 0x04 29. " CH30 ,New data on channel 30 " "No new data,New data written"
|
|
bitfld.long 0x04 28. " CH29 ,New data on channel 29 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 27. " CH28 ,New data on channel 28 " "No new data,New data written"
|
|
bitfld.long 0x04 26. " CH27 ,New data on channel 27 " "No new data,New data written"
|
|
bitfld.long 0x04 25. " CH26 ,New data on channel 26 " "No new data,New data written"
|
|
bitfld.long 0x04 24. " CH25 ,New data on channel 25 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 23. " CH24 ,New data on channel 24 " "No new data,New data written"
|
|
bitfld.long 0x04 22. " CH23 ,New data on channel 23 " "No new data,New data written"
|
|
bitfld.long 0x04 21. " CH22 ,New data on channel 22 " "No new data,New data written"
|
|
bitfld.long 0x04 20. " CH21 ,New data on channel 21 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 19. " CH20 ,New data on channel 20 " "No new data,New data written"
|
|
bitfld.long 0x04 18. " CH19 ,New data on channel 19 " "No new data,New data written"
|
|
bitfld.long 0x04 17. " CH18 ,New data on channel 18 " "No new data,New data written"
|
|
bitfld.long 0x04 16. " CH17 ,New data on channel 17 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CH16 ,New data on channel 16 " "No new data,New data written"
|
|
bitfld.long 0x04 14. " CH15 ,New data on channel 15 " "No new data,New data written"
|
|
bitfld.long 0x04 13. " CH14 ,New data on channel 14 " "No new data,New data written"
|
|
bitfld.long 0x04 12. " CH13 ,New data on channel 13 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 11. " CH12 ,New data on channel 12 " "No new data,New data written"
|
|
bitfld.long 0x04 10. " CH11 ,New data on channel 11 " "No new data,New data written"
|
|
bitfld.long 0x04 9. " CH10 ,New data on channel 10 " "No new data,New data written"
|
|
bitfld.long 0x04 8. " CH9 ,New data on channel 9 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 7. " CH8 ,New data on channel 8 " "No new data,New data written"
|
|
bitfld.long 0x04 6. " CH7 ,New data on channel 7 " "No new data,New data written"
|
|
bitfld.long 0x04 5. " CH6 ,New data on channel 6 " "No new data,New data written"
|
|
bitfld.long 0x04 4. " CH5 ,New data on channel 5 " "No new data,New data written"
|
|
textline " "
|
|
bitfld.long 0x04 3. " CH4 ,New data on channel 4 " "No new data,New data written"
|
|
bitfld.long 0x04 2. " CH3 ,New data on channel 3 " "No new data,New data written"
|
|
bitfld.long 0x04 1. " CH2 ,New data on channel 2 " "No new data,New data written"
|
|
bitfld.long 0x04 0. " CH1 ,New data on channel 1 " "No new data,New data written"
|
|
line.long 0x08 "CAN3_MVR,CAN3 Message Valid Register"
|
|
bitfld.long 0x08 31. " CH32 ,Message valid on channel 32 " "Ignored,Configured"
|
|
bitfld.long 0x08 30. " CH31 ,Message valid on channel 31 " "Ignored,Configured"
|
|
bitfld.long 0x08 29. " CH30 ,Message valid on channel 30 " "Ignored,Configured"
|
|
bitfld.long 0x08 28. " CH29 ,Message valid on channel 29 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 27. " CH28 ,Message valid on channel 28 " "Ignored,Configured"
|
|
bitfld.long 0x08 26. " CH27 ,Message valid on channel 27 " "Ignored,Configured"
|
|
bitfld.long 0x08 25. " CH26 ,Message valid on channel 26 " "Ignored,Configured"
|
|
bitfld.long 0x08 24. " CH25 ,Message valid on channel 25 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 23. " CH24 ,Message valid on channel 24 " "Ignored,Configured"
|
|
bitfld.long 0x08 22. " CH23 ,Message valid on channel 23 " "Ignored,Configured"
|
|
bitfld.long 0x08 21. " CH22 ,Message valid on channel 22 " "Ignored,Configured"
|
|
bitfld.long 0x08 20. " CH21 ,Message valid on channel 21 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 19. " CH20 ,Message valid on channel 20 " "Ignored,Configured"
|
|
bitfld.long 0x08 18. " CH19 ,Message valid on channel 19 " "Ignored,Configured"
|
|
bitfld.long 0x08 17. " CH18 ,Message valid on channel 18 " "Ignored,Configured"
|
|
bitfld.long 0x08 16. " CH17 ,Message valid on channel 17 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 15. " CH16 ,Message valid on channel 16 " "Ignored,Configured"
|
|
bitfld.long 0x08 14. " CH15 ,Message valid on channel 15 " "Ignored,Configured"
|
|
bitfld.long 0x08 13. " CH14 ,Message valid on channel 14 " "Ignored,Configured"
|
|
bitfld.long 0x08 12. " CH13 ,Message valid on channel 13 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 11. " CH12 ,Message valid on channel 12 " "Ignored,Configured"
|
|
bitfld.long 0x08 10. " CH11 ,Message valid on channel 11 " "Ignored,Configured"
|
|
bitfld.long 0x08 9. " CH10 ,Message valid on channel 10 " "Ignored,Configured"
|
|
bitfld.long 0x08 8. " CH9 ,Message valid on channel 9 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 7. " CH8 ,Message valid on channel 8 " "Ignored,Configured"
|
|
bitfld.long 0x08 6. " CH7 ,Message valid on channel 7 " "Ignored,Configured"
|
|
bitfld.long 0x08 5. " CH6 ,Message valid on channel 6 " "Ignored,Configured"
|
|
bitfld.long 0x08 4. " CH5 ,Message valid on channel 5 " "Ignored,Configured"
|
|
textline " "
|
|
bitfld.long 0x08 3. " CH4 ,Message valid on channel 4 " "Ignored,Configured"
|
|
bitfld.long 0x08 2. " CH3 ,Message valid on channel 3 " "Ignored,Configured"
|
|
bitfld.long 0x08 1. " CH2 ,Message valid on channel 2 " "Ignored,Configured"
|
|
bitfld.long 0x08 0. " CH1 ,Message valid on channel 1 " "Ignored,Configured"
|
|
group.long 0x14C++0x03
|
|
line.long 0x00 "CAN3_TSTR,CAN3 Test Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " TSTKEY[15:0] ,Test access key"
|
|
bitfld.long 0x00 6. " RX ,Monitor the value of CAN_RX pin" "Dominant,Recessive"
|
|
bitfld.long 0x00 5. " TXOPD ,TX open drain" "Not configured,Configured"
|
|
bitfld.long 0x00 3.--4. " TX[1:0] ,Control of CAN_TX pin" "Controlled,Monitored,Dominant,Recessive"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LBACK ,Loop Back Mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " SILENT ,Silent mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " BASIC ,Basic mode" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="S3F4A0KJ")||(cpu()=="S3F4A0KR")||(cpu()=="S3F4A1HJ")||(cpu()=="S3F4A1HR")
|
|
tree "DFC (Data Flash Controller)"
|
|
base ad:0xFFE00000
|
|
width 10.
|
|
group.long 0x0058++0x03
|
|
line.long 0x00 "DFC_PMSR,DFC Power Management Status"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " DFC ,DFC Power Management Status" "Disabled,Enabled"
|
|
wgroup.long 0x0060++003
|
|
line.long 0x00 "DFC_CR,DFC Control Register"
|
|
bitfld.long 0x00 30.--31. " SECTOR[1:0] ,Sector Number" "0,1,2,3"
|
|
bitfld.long 0x00 25.--29. " PAGE[4:0] ,Page Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.byte 0x00 8.--15. 1. " CRKEY[7:0] ,Key for the write access into the DFC_CR Register"
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " ERASE[1:0] ,Erase cycle" "No effect,Page erase,Sector erase,Chip erase"
|
|
group.long 0x0064++0x03
|
|
line.long 0x00 "DFC_MR,DFC Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BA[7:0] ,Data Flash Controller Base Address"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MRKEY[7:0] ,Key for the write access into the DFC_MR Register"
|
|
bitfld.long 0x00 7. " WPR ,Write and Erase Protection" "Allowed,Not allowed"
|
|
textline " "
|
|
bitfld.long 0x00 4. " STANDEN ,Standby Mode Enable" "Disabled,Enabled"
|
|
wgroup.long 0x006C++0x03
|
|
line.long 0x00 "DFC_CSR,DFC Clear Status"
|
|
bitfld.long 0x00 2. " DACCESS ,Denied access" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ENDERASE ,End of erase cycle" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ENDWR ,End of write cycle" "No effect,Clear"
|
|
rgroup.long 0x070++0x03
|
|
line.long 0x00 "DFC_SR,DFC Status Register"
|
|
bitfld.long 0x00 8. " BUSY ,Flash busy (status bit)" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " DACCESS ,Denied access" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ENDERASE ,End of chip or sector erase" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENDWR ,End of write cycle" "Not completed,Completed"
|
|
group.long 0x007C++0x03
|
|
line.long 0x00 "DFC_IMR,DFC Interrupt Mask"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DACCESS ,Denied access interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ENDERASE ,End of erase interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ENDWR ,End of write interrupt mask" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "EPC (External Protocol Controller)"
|
|
base ad:0xFFFE0000
|
|
width 10.
|
|
wgroup.long 0x050++0x07
|
|
line.long 0x00 "EPC_ECR,EPC Enable Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " CLOCKENKEY[15:0] ,Clock enable key"
|
|
bitfld.long 0x00 1. " EPC ,EPC clock enable" "No effect,Enable"
|
|
line.long 0x04 "EPC_DCR,EPC Disable Control Register"
|
|
hexmask.long.word 0x04 16.--31. 1. " CLOCKENKEY[15:0] ,Clock disable key"
|
|
bitfld.long 0x04 1. " EPC ,EPC clock disable" "No effect,Disable"
|
|
rgroup.long 0x058++0x03
|
|
line.long 0x00 "EPC_PMSR,EPC Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
bitfld.long 0x00 1. " EPC ,EPC clock status" "Disabled,Enabled"
|
|
wgroup.long 0x060++0x03
|
|
line.long 0x00 "EPC_CR,EPC Control Register"
|
|
bitfld.long 0x00 1. " SWRSTEPC ,Reset the EPC" "No effect,Reset"
|
|
group.long 0x080++0x13
|
|
line.long 0x00 "EPC_PR,EPC Prescalar Register"
|
|
bitfld.long 0x00 4.--6. " PHASE[2:0] ,Delayed system clock cycles" "No delay,1 period,2 periods,3 periods,4 periods,5 periods,6 periods,7 periods"
|
|
bitfld.long 0x00 3. " POL ,Clock out polarity" "Rising Edge,Falling Edge"
|
|
bitfld.long 0x00 0.--2. " PRESCALAR[2:0] ,Clock Prescalar" "SCLK,SCLK/2,SCLK/4,SCLK/6,SCLK/8,SCLK/10,SCLK/12,SCLK/14"
|
|
line.long 0x4 "EPC_DSR0,EPC Device Select Register 0"
|
|
hexmask.long.word 0x4 21.--31. 0x20 " EPC_BA[11:0] ,Base Address"
|
|
bitfld.long 0x4 12. " HS ,Select the high speed mode" "Low speed,High speed"
|
|
bitfld.long 0x4 8.--11. " MEMSIZE[3:0] ,External Memory size" "16 Mbytes,8 Mbytes,4 Mbytes,2 Mbytes,1 Mbytes,512 Kbytes,256 Kbytes,128 Kbytes,64 Kbyes,32 Kbytes,16 Kbytes,8 Kbytes,4 Kbytes,2 Kbytes,1 Kbytes,?..."
|
|
bitfld.long 0x4 3. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " DBW ,Data bus width" "8-bit,16-bit"
|
|
line.long 0x8 "EPC_DSR1,EPC Device Select Register 1"
|
|
hexmask.long.word 0x8 21.--31. 0x20 " EPC_BA[11:0] ,Base Address"
|
|
bitfld.long 0x8 12. " HS ,Select the high speed mode" "Low speed,High speed"
|
|
bitfld.long 0x8 8.--11. " MEMSIZE[3:0] ,External Memory size" "16 Mbytes,8 Mbytes,4 Mbytes,2 Mbytes,1 Mbytes,512 Kbytes,256 Kbytes,128 Kbytes,64 Kbyes,32 Kbytes,16 Kbytes,8 Kbytes,4 Kbytes,2 Kbytes,1 Kbytes,?..."
|
|
bitfld.long 0x8 3. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " DBW ,Data bus width" "8-bit,16-bit"
|
|
line.long 0xC "EPC_DSR2,EPC Device Select Register 2"
|
|
hexmask.long.word 0xC 21.--31. 0x20 " EPC_BA[11:0] ,Base Address"
|
|
bitfld.long 0xC 12. " HS ,Select the high speed mode" "Low speed,High speed"
|
|
bitfld.long 0xC 8.--11. " MEMSIZE[3:0] ,External Memory size" "16 Mbytes,8 Mbytes,4 Mbytes,2 Mbytes,1 Mbytes,512 Kbytes,256 Kbytes,128 Kbytes,64 Kbyes,32 Kbytes,16 Kbytes,8 Kbytes,4 Kbytes,2 Kbytes,1 Kbytes,?..."
|
|
bitfld.long 0xC 3. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0xC 0. " DBW ,Data bus width" "8-bit,16-bit"
|
|
line.long 0x10 "EPC_DSR3,EPC Device Select Register 3"
|
|
hexmask.long.word 0x10 21.--31. 0x20 " EPC_BA[11:0] ,Base Address"
|
|
bitfld.long 0x10 12. " HS ,Select the high speed mode" "Low speed,High speed"
|
|
bitfld.long 0x10 8.--11. " MEMSIZE[3:0] ,External Memory size" "16 Mbytes,8 Mbytes,4 Mbytes,2 Mbytes,1 Mbytes,512 Kbytes,256 Kbytes,128 Kbytes,64 Kbyes,32 Kbytes,16 Kbytes,8 Kbytes,4 Kbytes,2 Kbytes,1 Kbytes,?..."
|
|
bitfld.long 0x10 3. " CSEN ,Chip Select Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 0. " DBW ,Data bus width" "8-bit,16-bit"
|
|
wgroup.long 0x180++0x07
|
|
line.long 0x00 "EPC_WER,RAM Write Enable Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " WRITEENKEY[15:0] ,Write enable key"
|
|
bitfld.long 0x00 0. " WRITERAM ,Write in RAM enable" "No effect,Enable"
|
|
line.long 0x04 "RAM_WDR,RAM Write Disable Register"
|
|
bitfld.long 0x04 0. " WRITERAM ,Write in RAM disable" "No effect,Disable"
|
|
rgroup.long 0x188++0x03
|
|
line.long 0x00 "EPC_WSR,RAM Write Status Register"
|
|
bitfld.long 0x00 0. " WRITERAM ,Write in RAM status" "Not allowed,Allowed"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "EPC_TBL0,RAM XCS0 read Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x220++0x03
|
|
line.long 0x00 "EPC_TBL1,RAM XCS0 write Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x240++0x03
|
|
line.long 0x00 "EPC_TBL2,RAM XCS1 read Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x260++0x03
|
|
line.long 0x00 "EPC_TBL3,RAM XCS1 write Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x280++0x03
|
|
line.long 0x00 "EPC_TBL4,RAM XCS2 read Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2A0++0x03
|
|
line.long 0x00 "EPC_TBL5,RAM XCS2 write Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2C0++0x03
|
|
line.long 0x00 "EPC_TBL6,RAM XCS3 read Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
group.long 0x2E0++0x03
|
|
line.long 0x00 "EPC_TBL7,RAM XCS3 write Register"
|
|
bitfld.long 0x00 21.--23. " CTRL4_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 18.--20. " CTRL3_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 15.--17. " CTRL2_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 12.--14. " CTRL1_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " CTRL0_LINE[2:0] ,Control lines" "0 for any access,1 for low byte access,1 for high byte access,0 for 16bit access,1 for 16bit access,0 for high byte access,0 for low byte access,1 for any access"
|
|
bitfld.long 0x00 8. " XCS ,Chip Select" "Low,High"
|
|
bitfld.long 0x00 7. " VALIDDATA ,Valid Data monitoring" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " EOT ,End of Table" "Not end,End"
|
|
textline " "
|
|
bitfld.long 0x00 0.--5. " CYCLE_COUNTER[5:0] ,Number of EPC clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree "PIO (General Purpose I/O)"
|
|
tree "PIO0"
|
|
base ad:0xFFE64000
|
|
width 10.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO0_PSR,PIO0 Pin Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Peripheral,PIO0"
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|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Peripheral,PIO0"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Peripheral,PIO0"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Peripheral,PIO0"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO0_OSR,PIO0 Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Input,Output"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Input,Output"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Input,Output"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Input,Output"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Input,Output"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Input,Output"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Input,Output"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Input,Output"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Input,Output"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "PIO0_WODR,PIO0 Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO0_ODSR,PIO0 Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Low,High"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Low,High"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Low,High"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Low,High"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Low,High"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Low,High"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Low,High"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Low,High"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PIO0_PDSR,PIO0 Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "PIO0_MDSR,PIO0 Multi-Driver Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Not open drain,Open drain"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO0_PMSR,PIO0 Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:20] ,Version number"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PIO0 ,PIO0 clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PIO0_CR,PIO0 Control Register"
|
|
bitfld.long 0x00 0. " SWRST ,PIO0 software reset" "No effect,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PIO0_CSR,PIO0 Clear Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 29. " P29 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 25. " P25 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P21 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 17. " P17 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 13. " P13 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 9. " P9 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 5. " P5 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 1. " P1 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,PIO0 clear interrupt status" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "PIO0_SR,PIO0 Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 30. " P30 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 29. " P29 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 28. " P28 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 26. " P26 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 25. " P25 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 24. " P24 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 22. " P22 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 21. " P21 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 20. " P20 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 18. " P18 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 17. " P17 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 16. " P16 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 14. " P14 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 13. " P13 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 12. " P12 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 10. " P10 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 9. " P9 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 8. " P8 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 6. " P6 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 5. " P5 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 4. " P4 ,PIO0 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 2. " P2 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 1. " P1 ,PIO0 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 0. " P0 ,PIO0 interrupt status" "No change,Change detected"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PIO0_IMR,PIO0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,PIO0 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "PIO1"
|
|
base ad:0xFFE68000
|
|
width 10.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO1_PSR,PIO1 Pin Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Peripheral,PIO1"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Peripheral,PIO1"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Peripheral,PIO1"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO1_OSR,PIO1 Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Input,Output"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Input,Output"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Input,Output"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Input,Output"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Input,Output"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Input,Output"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Input,Output"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Input,Output"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Input,Output"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "PIO1_WODR,PIO1 Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO1_ODSR,PIO1 Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Low,High"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Low,High"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Low,High"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Low,High"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Low,High"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Low,High"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Low,High"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Low,High"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PIO1_PDSR,PIO1 Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "PIO1_MDSR,PIO1 Multi-Driver Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Not open drain,Open drain"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO1_PMSR,PIO1 Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:20] ,Version number"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PIO1 ,PIO1 clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PIO1_CR,PIO1 Control Register"
|
|
bitfld.long 0x00 0. " SWRST ,PIO1 software reset" "No effect,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PIO1_CSR,PIO1 Clear Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 29. " P29 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 25. " P25 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P21 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 17. " P17 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 13. " P13 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 9. " P9 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 5. " P5 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 1. " P1 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,PIO1 clear interrupt status" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "PIO1_SR,PIO1 Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 30. " P30 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 29. " P29 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 28. " P28 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 26. " P26 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 25. " P25 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 24. " P24 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 22. " P22 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 21. " P21 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 20. " P20 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 18. " P18 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 17. " P17 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 16. " P16 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 14. " P14 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 13. " P13 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 12. " P12 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 10. " P10 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 9. " P9 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 8. " P8 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 6. " P6 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 5. " P5 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 4. " P4 ,PIO1 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 2. " P2 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 1. " P1 ,PIO1 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 0. " P0 ,PIO1 interrupt status" "No change,Change detected"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PIO1_IMR,PIO1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,PIO1 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR"||cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "PIO2"
|
|
base ad:0xFFE6C000
|
|
width 10.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO2_PSR,PIO2 Pin Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Peripheral,PIO2"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Peripheral,PIO2"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Peripheral,PIO2"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO2_OSR,PIO2 Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Input,Output"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Input,Output"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Input,Output"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Input,Output"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Input,Output"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Input,Output"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Input,Output"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Input,Output"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Input,Output"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "PIO2_WODR,PIO2 Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO2_ODSR,PIO2 Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Low,High"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Low,High"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Low,High"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Low,High"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Low,High"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Low,High"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Low,High"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Low,High"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PIO2_PDSR,PIO2 Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "PIO2_MDSR,PIO2 Multi-Driver Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Not open drain,Open drain"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO2_PMSR,PIO2 Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:20] ,Version number"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PIO2 ,PIO2 clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PIO2_CR,PIO2 Control Register"
|
|
bitfld.long 0x00 0. " SWRST ,PIO2 software reset" "No effect,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PIO2_CSR,PIO2 Clear Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 29. " P29 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 25. " P25 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P21 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 17. " P17 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 13. " P13 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 9. " P9 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 5. " P5 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 1. " P1 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,PIO2 clear interrupt status" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "PIO2_SR,PIO2 Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 30. " P30 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 29. " P29 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 28. " P28 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 26. " P26 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 25. " P25 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 24. " P24 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 22. " P22 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 21. " P21 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 20. " P20 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 18. " P18 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 17. " P17 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 16. " P16 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 14. " P14 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 13. " P13 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 12. " P12 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 10. " P10 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 9. " P9 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 8. " P8 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 6. " P6 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 5. " P5 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 4. " P4 ,PIO2 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 2. " P2 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 1. " P1 ,PIO2 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 0. " P0 ,PIO2 interrupt status" "No change,Change detected"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PIO2_IMR,PIO2 Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,PIO2 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "PIO3"
|
|
base ad:0xFFE70000
|
|
width 10.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "PIO3_PSR,PIO3 Pin Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Peripheral,PIO3"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Peripheral,PIO3"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Peripheral,PIO3"
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "PIO3_OSR,PIO3 Output Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Input,Output"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Input,Output"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Input,Output"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Input,Output"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Input,Output"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Input,Output"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Input,Output"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Input,Output"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Input,Output"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Input,Output"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Input,Output"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Input,Output"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Input,Output"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Input,Output"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Input,Output"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Input,Output"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Input,Output"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Input,Output"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Input,Output"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Input,Output"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Input,Output"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Input,Output"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Input,Output"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Input,Output"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Input,Output"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Input,Output"
|
|
wgroup.long 0x2C++0x03
|
|
line.long 0x00 "PIO3_WODR,PIO3 Write Output Data Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x38++0x03
|
|
line.long 0x00 "PIO3_ODSR,PIO3 Output Data Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Low,High"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Low,High"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Low,High"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Low,High"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Low,High"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Low,High"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Low,High"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Low,High"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Low,High"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Low,High"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Low,High"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Low,High"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Low,High"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Low,High"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Low,High"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Low,High"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Low,High"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Low,High"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Low,High"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Low,High"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Low,High"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Low,High"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Low,High"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Low,High"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Low,High"
|
|
group.long 0x3C++0x03
|
|
line.long 0x00 "PIO3_PDSR,PIO3 Pin Data Status Register"
|
|
bitfld.long 0x00 31. " P31 ,P31 pin" "Low,High"
|
|
bitfld.long 0x00 30. " P30 ,P30 pin" "Low,High"
|
|
bitfld.long 0x00 29. " P29 ,P29 pin" "Low,High"
|
|
bitfld.long 0x00 28. " P28 ,P28 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,P27 pin" "Low,High"
|
|
bitfld.long 0x00 26. " P26 ,P26 pin" "Low,High"
|
|
bitfld.long 0x00 25. " P25 ,P25 pin" "Low,High"
|
|
bitfld.long 0x00 24. " P24 ,P24 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,P23 pin" "Low,High"
|
|
bitfld.long 0x00 22. " P22 ,P22 pin" "Low,High"
|
|
bitfld.long 0x00 21. " P21 ,P21 pin" "Low,High"
|
|
bitfld.long 0x00 20. " P20 ,P20 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,P19 pin" "Low,High"
|
|
bitfld.long 0x00 18. " P18 ,P18 pin" "Low,High"
|
|
bitfld.long 0x00 17. " P17 ,P17 pin" "Low,High"
|
|
bitfld.long 0x00 16. " P16 ,P16 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,P15 pin" "Low,High"
|
|
bitfld.long 0x00 14. " P14 ,P14 pin" "Low,High"
|
|
bitfld.long 0x00 13. " P13 ,P13 pin" "Low,High"
|
|
bitfld.long 0x00 12. " P12 ,P12 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,P11 pin" "Low,High"
|
|
bitfld.long 0x00 10. " P10 ,P10 pin" "Low,High"
|
|
bitfld.long 0x00 9. " P9 ,P9 pin" "Low,High"
|
|
bitfld.long 0x00 8. " P8 ,P8 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,P7 pin" "Low,High"
|
|
bitfld.long 0x00 6. " P6 ,P6 pin" "Low,High"
|
|
bitfld.long 0x00 5. " P5 ,P5 pin" "Low,High"
|
|
bitfld.long 0x00 4. " P4 ,P4 pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,P3 pin" "Low,High"
|
|
bitfld.long 0x00 2. " P2 ,P2 pin" "Low,High"
|
|
bitfld.long 0x00 1. " P1 ,P1 pin" "Low,High"
|
|
bitfld.long 0x00 0. " P0 ,P0 pin" "Low,High"
|
|
rgroup.long 0x48++0x03
|
|
line.long 0x00 "PIO3_MDSR,PIO3 Multi-Driver Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,P31 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,P30 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,P29 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,P28 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,P27 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,P26 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,P25 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,P24 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,P23 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,P22 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,P21 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,P20 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,P19 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,P18 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,P17 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,P16 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,P15 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,P14 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,P13 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,P12 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,P11 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,P10 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Not open drain,Open drain"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Not open drain,Open drain"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Not open drain,Open drain"
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "PIO3_PMSR,PIO3 Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:20] ,Version number"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PIO3 ,PIO3 clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PIO3_CR,PIO3 Control Register"
|
|
bitfld.long 0x00 0. " SWRST ,PIO3 software reset" "No effect,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PIO3_CSR,PIO3 Clear Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 30. " P30 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 29. " P29 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 28. " P28 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 26. " P26 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 25. " P25 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 24. " P24 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 22. " P22 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 21. " P21 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 20. " P20 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 18. " P18 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 17. " P17 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 16. " P16 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 14. " P14 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 13. " P13 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 12. " P12 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 10. " P10 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 9. " P9 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 8. " P8 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 6. " P6 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 5. " P5 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 4. " P4 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 2. " P2 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 1. " P1 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
bitfld.long 0x00 0. " P0 ,PIO3 clear interrupt status" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "PIO3_SR,PIO3 Status Register"
|
|
bitfld.long 0x00 31. " P31 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 30. " P30 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 29. " P29 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 28. " P28 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 27. " P27 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 26. " P26 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 25. " P25 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 24. " P24 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 23. " P23 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 22. " P22 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 21. " P21 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 20. " P20 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 19. " P19 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 18. " P18 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 17. " P17 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 16. " P16 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 15. " P15 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 14. " P14 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 13. " P13 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 12. " P12 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " P11 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 10. " P10 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 9. " P9 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 8. " P8 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 7. " P7 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 6. " P6 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 5. " P5 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 4. " P4 ,PIO3 interrupt status" "No change,Change detected"
|
|
textline " "
|
|
bitfld.long 0x00 3. " P3 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 2. " P2 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 1. " P1 ,PIO3 interrupt status" "No change,Change detected"
|
|
bitfld.long 0x00 0. " P0 ,PIO3 interrupt status" "No change,Change detected"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PIO3_IMR,PIO3 Interrupt Mask Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " P31 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " P30 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " P29 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " P28 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " P27 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " P26 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " P25 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " P24 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 23. -0x08 23. -0x04 23. " P23 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. -0x08 22. -0x04 22. " P22 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. -0x08 21. -0x04 21. " P21 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. -0x08 31. -0x04 31. " P20 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. -0x08 19. -0x04 19. " P19 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " P18 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " P17 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " P16 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 15. -0x08 15. -0x04 15. " P15 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. -0x08 14. -0x04 14. " P14 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 13. -0x08 13. -0x04 13. " P13 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. -0x08 12. -0x04 12. " P12 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 11. -0x08 11. -0x04 11. " P11 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " P10 ,PIO3 interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " P9 ,P9 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " P8 ,P8 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " P7 ,P7 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " P6 ,P6 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " P5 ,P5 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " P4 ,P4 pin" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " P3 ,P3 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " P2 ,P2 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " P1 ,P1 pin" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " P0 ,P0 pin" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "GPT (General Purpose Timer)"
|
|
tree "Channel 0"
|
|
base ad:0xFFE1C000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GPT_PMSR,GPT Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " GPT ,General Purpose Timer clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "GPT_CR,GPT Control Register"
|
|
bitfld.long 0x00 3. " SWTRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 2. " CLKDIS ,Counter clock disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CLKEN ,Counter clock enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(d:0xFFE1C000+0x64)&0x0x8000))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Capture Mode"
|
|
bitfld.long 0x00 18.--19. " LDRB[1:0] ,Load RB" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA[1:0] ,Load RA" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB as external trigger" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG[1:0] ,External trigger edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " LDBDIS ,Load RB disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Load RB stops counter" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Waveform Mode"
|
|
bitfld.long 0x00 30.--31. " BSWTRG[1:0] ,TIOB software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT[1:0] ,TIOB External event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 26.--27. " BCPC[1:0] ,TIOB compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 24.--25. " BCBP[1:0] ,TIOB compare B" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " ASWTRG[1:0] ,TIOA software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 20.--21. " AEEVT[1:0] ,TIOA external event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC[1:0] ,TIOA compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 16.--17. " ACPA[1:0] ,TIOA compare A" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ENETRG ,Enable external trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External event" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Compare RC disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " CPCSTOP ,Compare RC stops the counter" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "GPT_CSR,GPT Clear Status Register"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 6. " LDRBS ,Load Register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " LDRAS ,Load Register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow Interrupt" "No effect,Clear"
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "GPT_SR,GPT Status Register"
|
|
bitfld.long 0x00 18. " TCLKS ,TCLK status" "Change detected,No change"
|
|
bitfld.long 0x00 17. " TIOAS ,TIOA status" "Change detected,No change"
|
|
bitfld.long 0x00 16. " TIOBS ,TIOB status" "Change detected,No change"
|
|
bitfld.long 0x00 10. " MTIOB ,TIOB mirror" "Input,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MTIOA ,TIOA mirror" "Input,Undefined"
|
|
bitfld.long 0x00 8. " CLKSTA ,Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger status" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " LDRBS ,Load register B status" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LDRAS ,Load register A status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LOVRS ,Load overrun status" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow status" "No overflow,Overflow"
|
|
group.long 0x7C++0x07
|
|
line.long 0x00 "GPT_IMR,GPT Interrupt Mask Register"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " TCLKS ,TCLK status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " TIOAS ,TIOA status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " TIOBS ,TIOB status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,Load register B status" "Disable,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,Load register A status" "Disable,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,Compare register C status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status" "Disabled,Enabled"
|
|
line.long 0x04 "GPT_CV,GPT Counter Value"
|
|
hexmask.long.word 0x04 0.--15. 1. " CV[15:0] ,Counter value"
|
|
rgroup.long 0x84++0x07
|
|
line.long 0x00 "GPT_RA,GPT Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value"
|
|
line.long 0x04 "GPT_RB,GPT Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GPT_RC,GPT Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value"
|
|
width 11.
|
|
tree.end
|
|
tree "Channel 1"
|
|
base ad:0xFFE1C100
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GPT_PMSR,GPT Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " GPT ,General Purpose Timer clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "GPT_CR,GPT Control Register"
|
|
bitfld.long 0x00 3. " SWTRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 2. " CLKDIS ,Counter clock disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CLKEN ,Counter clock enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(d:0xFFE1C100+0x64)&0x0x8000))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Capture Mode"
|
|
bitfld.long 0x00 18.--19. " LDRB[1:0] ,Load RB" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA[1:0] ,Load RA" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB as external trigger" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG[1:0] ,External trigger edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " LDBDIS ,Load RB disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Load RB stops counter" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Waveform Mode"
|
|
bitfld.long 0x00 30.--31. " BSWTRG[1:0] ,TIOB software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT[1:0] ,TIOB External event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 26.--27. " BCPC[1:0] ,TIOB compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 24.--25. " BCBP[1:0] ,TIOB compare B" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " ASWTRG[1:0] ,TIOA software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 20.--21. " AEEVT[1:0] ,TIOA external event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC[1:0] ,TIOA compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 16.--17. " ACPA[1:0] ,TIOA compare A" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ENETRG ,Enable external trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External event" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Compare RC disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " CPCSTOP ,Compare RC stops the counter" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "GPT_CSR,GPT Clear Status Register"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 6. " LDRBS ,Load Register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " LDRAS ,Load Register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow Interrupt" "No effect,Clear"
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "GPT_SR,GPT Status Register"
|
|
bitfld.long 0x00 18. " TCLKS ,TCLK status" "Change detected,No change"
|
|
bitfld.long 0x00 17. " TIOAS ,TIOA status" "Change detected,No change"
|
|
bitfld.long 0x00 16. " TIOBS ,TIOB status" "Change detected,No change"
|
|
bitfld.long 0x00 10. " MTIOB ,TIOB mirror" "Input,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MTIOA ,TIOA mirror" "Input,Undefined"
|
|
bitfld.long 0x00 8. " CLKSTA ,Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger status" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " LDRBS ,Load register B status" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LDRAS ,Load register A status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LOVRS ,Load overrun status" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow status" "No overflow,Overflow"
|
|
group.long 0x7C++0x07
|
|
line.long 0x00 "GPT_IMR,GPT Interrupt Mask Register"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " TCLKS ,TCLK status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " TIOAS ,TIOA status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " TIOBS ,TIOB status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,Load register B status" "Disable,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,Load register A status" "Disable,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,Compare register C status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status" "Disabled,Enabled"
|
|
line.long 0x04 "GPT_CV,GPT Counter Value"
|
|
hexmask.long.word 0x04 0.--15. 1. " CV[15:0] ,Counter value"
|
|
rgroup.long 0x84++0x07
|
|
line.long 0x00 "GPT_RA,GPT Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value"
|
|
line.long 0x04 "GPT_RB,GPT Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GPT_RC,GPT Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value"
|
|
width 11.
|
|
tree.end
|
|
tree "Channel 2"
|
|
base ad:0xFFE1C200
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "GPT_PMSR,GPT Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " GPT ,General Purpose Timer clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "GPT_CR,GPT Control Register"
|
|
bitfld.long 0x00 3. " SWTRG ,Software trigger" "No effect,Trigger"
|
|
bitfld.long 0x00 2. " CLKDIS ,Counter clock disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " CLKEN ,Counter clock enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(d:0xFFE1C200+0x64)&0x0x8000))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Capture Mode"
|
|
bitfld.long 0x00 18.--19. " LDRB[1:0] ,Load RB" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 16.--17. " LDRA[1:0] ,Load RA" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " ABETRG ,TIOA or TIOB as external trigger" "TIOB,TIOA"
|
|
bitfld.long 0x00 8.--9. " ETRGEDG[1:0] ,External trigger edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " LDBDIS ,Load RB disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " LDBSTOP ,Load RB stops counter" "Not stopped,Stopped"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "GPT_MR,GPT Mode Register in Waveform Mode"
|
|
bitfld.long 0x00 30.--31. " BSWTRG[1:0] ,TIOB software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 28.--29. " BEEVT[1:0] ,TIOB External event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 26.--27. " BCPC[1:0] ,TIOB compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 24.--25. " BCBP[1:0] ,TIOB compare B" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " ASWTRG[1:0] ,TIOA software trigger" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 20.--21. " AEEVT[1:0] ,TIOA external event" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 18.--19. " ACPC[1:0] ,TIOA compare C" "None,Set,Clear,Toggle"
|
|
bitfld.long 0x00 16.--17. " ACPA[1:0] ,TIOA compare A" "None,Set,Clear,Toggle"
|
|
textline " "
|
|
bitfld.long 0x00 15. " WAVE ,Waveform" "Capture,Waveform"
|
|
bitfld.long 0x00 14. " CPCTRG ,Compare RC trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " ENETRG ,Enable external trigger" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " EEVT ,External event" "TIOB,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " EEVTEDG ,External event edge" "None,Rising edge,Falling edge,Each edge"
|
|
bitfld.long 0x00 7. " CPCDIS ,Compare RC disables clock" "Not disabled,Disabled"
|
|
bitfld.long 0x00 6. " CPCSTOP ,Compare RC stops the counter" "Not stopped,Stopped"
|
|
bitfld.long 0x00 4.--5. " BURST[1:0] ,Burst" "None,XC0,XC1,XC2"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CLKI ,Clock inverter" "Normal,Inverted"
|
|
bitfld.long 0x00 0.--2. " CLKS[2:0] ,Clock select" "PCLK/2,PCLK/8,PCLK/32,PCLK/128,PCLK/1024,XC0,XC1,XC2"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "GPT_CSR,GPT Clear Status Register"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 6. " LDRBS ,Load Register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 5. " LDRAS ,Load Register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " LOVRS ,Load Overrun Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow Interrupt" "No effect,Clear"
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "GPT_SR,GPT Status Register"
|
|
bitfld.long 0x00 18. " TCLKS ,TCLK status" "Change detected,No change"
|
|
bitfld.long 0x00 17. " TIOAS ,TIOA status" "Change detected,No change"
|
|
bitfld.long 0x00 16. " TIOBS ,TIOB status" "Change detected,No change"
|
|
bitfld.long 0x00 10. " MTIOB ,TIOB mirror" "Input,Undefined"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MTIOA ,TIOA mirror" "Input,Undefined"
|
|
bitfld.long 0x00 8. " CLKSTA ,Clock Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " ETRGS ,External trigger status" "Not detected,Detected"
|
|
bitfld.long 0x00 6. " LDRBS ,Load register B status" "Not loaded,Loaded"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LDRAS ,Load register A status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 4. " CPCS ,Compare register C status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 1. " LOVRS ,Load overrun status" "No overrun,Overrun"
|
|
bitfld.long 0x00 0. " COVFS ,Counter overflow status" "No overflow,Overflow"
|
|
group.long 0x7C++0x07
|
|
line.long 0x00 "GPT_IMR,GPT Interrupt Mask Register"
|
|
setclrfld.long 0x00 18. -0x08 18. -0x04 18. " TCLKS ,TCLK status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " TIOAS ,TIOA status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " TIOBS ,TIOB status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " ETRGS ,External trigger status" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " LDRBS ,Load register B status" "Disable,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " LDRAS ,Load register A status" "Disable,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CPCS ,Compare register C status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CPBS ,Compare register B status" "Not occurred,Occurred"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CPAS ,Compare register A status" "Not occurred,Occurred"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LOVRS ,Load overrun status" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " COVFS ,Counter overflow status" "Disabled,Enabled"
|
|
line.long 0x04 "GPT_CV,GPT Counter Value"
|
|
hexmask.long.word 0x04 0.--15. 1. " CV[15:0] ,Counter value"
|
|
rgroup.long 0x84++0x07
|
|
line.long 0x00 "GPT_RA,GPT Register A"
|
|
hexmask.long.word 0x00 0.--15. 1. " RA ,Register A value"
|
|
line.long 0x04 "GPT_RB,GPT Register B"
|
|
hexmask.long.word 0x04 0.--15. 1. " RB ,Register B value"
|
|
group.long 0x8C++0x03
|
|
line.long 0x00 "GPT_RC,GPT Register C"
|
|
hexmask.long.word 0x00 0.--15. 1. " RC ,Register C value"
|
|
width 11.
|
|
tree.end
|
|
tree "Multi Channel Control"
|
|
base ad:0xFFE1C300
|
|
width 7.
|
|
wgroup.long 0x300++0x03
|
|
line.long 0x00 "GPT_BCR,GPT Block Control Register"
|
|
bitfld.long 0x00 1. " TCSYNC ,Synchronization bit" "No effect,Reset"
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
group.long 0x304++0x03
|
|
line.long 0x00 "GPT_BMR,GPT Block Mode Register"
|
|
bitfld.long 0x00 4.--5. " TC2XC2S ,TCK2 XC2 selection" "TCLK2,None,TIOA0,TIOA1"
|
|
bitfld.long 0x00 2.--3. " TC1XC1S ,TCK1 XC1 selection" "TCLK1,None,TIOA0,TIOA2"
|
|
bitfld.long 0x00 0.--1. " TC0XC0S ,TCK0 XC0 selection" "TCLK0,None,TIOA1,TIOA2"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "GIC (Generic Interrupt Controller)"
|
|
base ad:0xFFFF0000
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR")
|
|
width 11.
|
|
tree "Source Mode Registers"
|
|
group.long 0xEF00++0xFF
|
|
line.long 0x0 "GIC_SMR0,GIC Source Mode"
|
|
bitfld.long 0x0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "GIC_SMR1,GIC Source Mode"
|
|
bitfld.long 0x4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "GIC_SMR2,GIC Source Mode"
|
|
bitfld.long 0x8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "GIC_SMR3,GIC Source Mode"
|
|
bitfld.long 0xC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "GIC_SMR4,GIC Source Mode"
|
|
bitfld.long 0x10 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x10 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x10 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "GIC_SMR5,GIC Source Mode"
|
|
bitfld.long 0x14 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x14 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x14 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "GIC_SMR6,GIC Source Mode"
|
|
bitfld.long 0x18 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x18 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x18 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "GIC_SMR7,GIC Source Mode"
|
|
bitfld.long 0x1C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x1C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x1C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "GIC_SMR8,GIC Source Mode"
|
|
bitfld.long 0x20 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x20 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x20 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "GIC_SMR9,GIC Source Mode"
|
|
bitfld.long 0x24 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x24 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x24 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "GIC_SMR10,GIC Source Mode"
|
|
bitfld.long 0x28 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x28 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x28 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "GIC_SMR11,GIC Source Mode"
|
|
bitfld.long 0x2C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x2C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x2C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "GIC_SMR12,GIC Source Mode"
|
|
bitfld.long 0x30 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x30 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x30 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "GIC_SMR13,GIC Source Mode"
|
|
bitfld.long 0x34 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x34 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x34 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "GIC_SMR14,GIC Source Mode"
|
|
bitfld.long 0x38 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x38 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x38 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "GIC_SMR15,GIC Source Mode"
|
|
bitfld.long 0x3C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x3C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x3C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "GIC_SMR16,GIC Source Mode"
|
|
bitfld.long 0x40 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x40 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x40 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "GIC_SMR17,GIC Source Mode"
|
|
bitfld.long 0x44 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x44 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x44 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x48 "GIC_SMR18,GIC Source Mode"
|
|
bitfld.long 0x48 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x48 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x48 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "GIC_SMR19,GIC Source Mode"
|
|
bitfld.long 0x4C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x50 "GIC_SMR20,GIC Source Mode"
|
|
bitfld.long 0x50 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x50 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x50 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "GIC_SMR21,GIC Source Mode"
|
|
bitfld.long 0x54 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x54 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x54 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x58 "GIC_SMR22,GIC Source Mode"
|
|
bitfld.long 0x58 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x58 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x58 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "GIC_SMR23,GIC Source Mode"
|
|
bitfld.long 0x5C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x5C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x5C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x60 "GIC_SMR24,GIC Source Mode"
|
|
bitfld.long 0x60 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x60 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x60 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x64 "GIC_SMR25,GIC Source Mode"
|
|
bitfld.long 0x64 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x64 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x64 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x68 "GIC_SMR26,GIC Source Mode"
|
|
bitfld.long 0x68 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x68 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x68 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "GIC_SMR27,GIC Source Mode"
|
|
bitfld.long 0x6C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x6C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x6C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x70 "GIC_SMR28,GIC Source Mode"
|
|
bitfld.long 0x70 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x70 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x70 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x74 "GIC_SMR29,GIC Source Mode"
|
|
bitfld.long 0x74 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x74 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x74 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x78 "GIC_SMR30,GIC Source Mode"
|
|
bitfld.long 0x78 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x78 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x78 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x7C "GIC_SMR31,GIC Source Mode"
|
|
bitfld.long 0x7C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x7C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x7C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x80 "GIC_SMR32,GIC Source Mode"
|
|
bitfld.long 0x80 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x80 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x80 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x84 "GIC_SMR33,GIC Source Mode"
|
|
bitfld.long 0x84 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x84 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x84 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x88 "GIC_SMR34,GIC Source Mode"
|
|
bitfld.long 0x88 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x88 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x88 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8C "GIC_SMR35,GIC Source Mode"
|
|
bitfld.long 0x8C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x90 "GIC_SMR36,GIC Source Mode"
|
|
bitfld.long 0x90 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x90 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x90 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x94 "GIC_SMR37,GIC Source Mode"
|
|
bitfld.long 0x94 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x94 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x94 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x98 "GIC_SMR38,GIC Source Mode"
|
|
bitfld.long 0x98 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x98 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x98 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x9C "GIC_SMR39,GIC Source Mode"
|
|
bitfld.long 0x9C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x9C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x9C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA0 "GIC_SMR40,GIC Source Mode"
|
|
bitfld.long 0xA0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA4 "GIC_SMR41,GIC Source Mode"
|
|
bitfld.long 0xA4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA8 "GIC_SMR42,GIC Source Mode"
|
|
bitfld.long 0xA8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xAC "GIC_SMR43,GIC Source Mode"
|
|
bitfld.long 0xAC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xAC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xAC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB0 "GIC_SMR44,GIC Source Mode"
|
|
bitfld.long 0xB0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB4 "GIC_SMR45,GIC Source Mode"
|
|
bitfld.long 0xB4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB8 "GIC_SMR46,GIC Source Mode"
|
|
bitfld.long 0xB8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xBC "GIC_SMR47,GIC Source Mode"
|
|
bitfld.long 0xBC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xBC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xBC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC0 "GIC_SMR48,GIC Source Mode"
|
|
bitfld.long 0xC0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC4 "GIC_SMR49,GIC Source Mode"
|
|
bitfld.long 0xC4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC8 "GIC_SMR50,GIC Source Mode"
|
|
bitfld.long 0xC8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xCC "GIC_SMR51,GIC Source Mode"
|
|
bitfld.long 0xCC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xCC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xCC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD0 "GIC_SMR52,GIC Source Mode"
|
|
bitfld.long 0xD0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD4 "GIC_SMR53,GIC Source Mode"
|
|
bitfld.long 0xD4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD8 "GIC_SMR54,GIC Source Mode"
|
|
bitfld.long 0xD8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xDC "GIC_SMR55,GIC Source Mode"
|
|
bitfld.long 0xDC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xDC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xDC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE0 "GIC_SMR56,GIC Source Mode"
|
|
bitfld.long 0xE0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE4 "GIC_SMR57,GIC Source Mode"
|
|
bitfld.long 0xE4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE8 "GIC_SMR58,GIC Source Mode"
|
|
bitfld.long 0xE8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xEC "GIC_SMR59,GIC Source Mode"
|
|
bitfld.long 0xEC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xEC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xEC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF0 "GIC_SMR60,GIC Source Mode"
|
|
bitfld.long 0xF0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF4 "GIC_SMR61,GIC Source Mode"
|
|
bitfld.long 0xF4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF8 "GIC_SMR62,GIC Source Mode"
|
|
bitfld.long 0xF8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xFC "GIC_SMR63,GIC Source Mode"
|
|
bitfld.long 0xFC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xFC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xFC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
group.long 0xF000++0xFF
|
|
line.long 0x0 "GIC_SVR0,GIC Source Vector"
|
|
hexmask.long 0x0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4 "GIC_SVR1,GIC Source Vector"
|
|
hexmask.long 0x4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8 "GIC_SVR2,GIC Source Vector"
|
|
hexmask.long 0x8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC "GIC_SVR3,GIC Source Vector"
|
|
hexmask.long 0xC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x10 "GIC_SVR4,GIC Source Vector"
|
|
hexmask.long 0x10 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x14 "GIC_SVR5,GIC Source Vector"
|
|
hexmask.long 0x14 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x18 "GIC_SVR6,GIC Source Vector"
|
|
hexmask.long 0x18 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x1C "GIC_SVR7,GIC Source Vector"
|
|
hexmask.long 0x1C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x20 "GIC_SVR8,GIC Source Vector"
|
|
hexmask.long 0x20 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x24 "GIC_SVR9,GIC Source Vector"
|
|
hexmask.long 0x24 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x28 "GIC_SVR10,GIC Source Vector"
|
|
hexmask.long 0x28 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x2C "GIC_SVR11,GIC Source Vector"
|
|
hexmask.long 0x2C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x30 "GIC_SVR12,GIC Source Vector"
|
|
hexmask.long 0x30 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x34 "GIC_SVR13,GIC Source Vector"
|
|
hexmask.long 0x34 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x38 "GIC_SVR14,GIC Source Vector"
|
|
hexmask.long 0x38 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x3C "GIC_SVR15,GIC Source Vector"
|
|
hexmask.long 0x3C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x40 "GIC_SVR16,GIC Source Vector"
|
|
hexmask.long 0x40 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x44 "GIC_SVR17,GIC Source Vector"
|
|
hexmask.long 0x44 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x48 "GIC_SVR18,GIC Source Vector"
|
|
hexmask.long 0x48 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4C "GIC_SVR19,GIC Source Vector"
|
|
hexmask.long 0x4C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x50 "GIC_SVR20,GIC Source Vector"
|
|
hexmask.long 0x50 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x54 "GIC_SVR21,GIC Source Vector"
|
|
hexmask.long 0x54 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x58 "GIC_SVR22,GIC Source Vector"
|
|
hexmask.long 0x58 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x5C "GIC_SVR23,GIC Source Vector"
|
|
hexmask.long 0x5C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x60 "GIC_SVR24,GIC Source Vector"
|
|
hexmask.long 0x60 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x64 "GIC_SVR25,GIC Source Vector"
|
|
hexmask.long 0x64 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x68 "GIC_SVR26,GIC Source Vector"
|
|
hexmask.long 0x68 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x6C "GIC_SVR27,GIC Source Vector"
|
|
hexmask.long 0x6C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x70 "GIC_SVR28,GIC Source Vector"
|
|
hexmask.long 0x70 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x74 "GIC_SVR29,GIC Source Vector"
|
|
hexmask.long 0x74 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x78 "GIC_SVR30,GIC Source Vector"
|
|
hexmask.long 0x78 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x7C "GIC_SVR31,GIC Source Vector"
|
|
hexmask.long 0x7C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x80 "GIC_SVR32,GIC Source Vector"
|
|
hexmask.long 0x80 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x84 "GIC_SVR33,GIC Source Vector"
|
|
hexmask.long 0x84 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x88 "GIC_SVR34,GIC Source Vector"
|
|
hexmask.long 0x88 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8C "GIC_SVR35,GIC Source Vector"
|
|
hexmask.long 0x8C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x90 "GIC_SVR36,GIC Source Vector"
|
|
hexmask.long 0x90 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x94 "GIC_SVR37,GIC Source Vector"
|
|
hexmask.long 0x94 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x98 "GIC_SVR38,GIC Source Vector"
|
|
hexmask.long 0x98 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x9C "GIC_SVR39,GIC Source Vector"
|
|
hexmask.long 0x9C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA0 "GIC_SVR40,GIC Source Vector"
|
|
hexmask.long 0xA0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA4 "GIC_SVR41,GIC Source Vector"
|
|
hexmask.long 0xA4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA8 "GIC_SVR42,GIC Source Vector"
|
|
hexmask.long 0xA8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xAC "GIC_SVR43,GIC Source Vector"
|
|
hexmask.long 0xAC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB0 "GIC_SVR44,GIC Source Vector"
|
|
hexmask.long 0xB0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB4 "GIC_SVR45,GIC Source Vector"
|
|
hexmask.long 0xB4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB8 "GIC_SVR46,GIC Source Vector"
|
|
hexmask.long 0xB8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xBC "GIC_SVR47,GIC Source Vector"
|
|
hexmask.long 0xBC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC0 "GIC_SVR48,GIC Source Vector"
|
|
hexmask.long 0xC0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC4 "GIC_SVR49,GIC Source Vector"
|
|
hexmask.long 0xC4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC8 "GIC_SVR50,GIC Source Vector"
|
|
hexmask.long 0xC8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xCC "GIC_SVR51,GIC Source Vector"
|
|
hexmask.long 0xCC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD0 "GIC_SVR52,GIC Source Vector"
|
|
hexmask.long 0xD0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD4 "GIC_SVR53,GIC Source Vector"
|
|
hexmask.long 0xD4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD8 "GIC_SVR54,GIC Source Vector"
|
|
hexmask.long 0xD8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xDC "GIC_SVR55,GIC Source Vector"
|
|
hexmask.long 0xDC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE0 "GIC_SVR56,GIC Source Vector"
|
|
hexmask.long 0xE0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE4 "GIC_SVR57,GIC Source Vector"
|
|
hexmask.long 0xE4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE8 "GIC_SVR58,GIC Source Vector"
|
|
hexmask.long 0xE8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xEC "GIC_SVR59,GIC Source Vector"
|
|
hexmask.long 0xEC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF0 "GIC_SVR60,GIC Source Vector"
|
|
hexmask.long 0xF0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF4 "GIC_SVR61,GIC Source Vector"
|
|
hexmask.long 0xF4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF8 "GIC_SVR62,GIC Source Vector"
|
|
hexmask.long 0xF8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xFC "GIC_SVR63,GIC Source Vector"
|
|
hexmask.long 0xFC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
tree.end
|
|
rgroup.long 0xF100++0x0B
|
|
line.long 0x00 "GIC_IVR,GIC Interrupt Vector"
|
|
hexmask.long 0x00 0.--31. 1. " IRQV[31:0] ,Interrupt Vector Address"
|
|
line.long 0x04 "GIC_FVR,GIC FIQ Vector"
|
|
hexmask.long 0x04 0.--31. 1. " FIQV[31:0] ,FIQ Vector Address"
|
|
line.long 0x08 "GIC_ISR,GIC Interrupt Status"
|
|
hexmask.long 0x08 0.--5. 1. " IRQID[5:0] ,Current IRQ Identifier"
|
|
group.long 0xF10C++0x0F
|
|
line.long 0x00 "GIC_IPR0,GIC Interrupt Pending 0"
|
|
setclrfld.long 0x00 31. 0x14 31. 0x1C 31. " GPIO2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x14 30. 0x1C 30. " GPIO1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x14 29. 0x1C 29. " GPIO0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x14 28. 0x1C 28. " LDMA ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x14 27. 0x1C 27. " GPT0CH2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x14 26. 0x1C 26. " GPT0CH1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 25. 0x14 25. 0x1C 25. " STT ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x14 24. 0x1C 24. " SPI1 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x14 22. 0x1C 22. " SWIRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x14 20. 0x1C 20. " USART0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x14 18. 0x1C 18. " CAPT0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x14 15. 0x1C 15. " CAN1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x14 14. 0x1C 14. " UART1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 13. 0x14 13. 0x1C 13. " I2C0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x14 12. 0x1C 12. " UART0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x14 11. 0x1C 11. " ST1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x14 10. 0x1C 10. " ST0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x14 9. 0x1C 9. " GPT0CH0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x14 8. 0x1C 8. " CAN0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x14 7. 0x1C 7. " WD ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x14 6. 0x1C 6. " SPI0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x14 5. 0x1C 5. " ADC0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x14 4. 0x1C 4. " PWM0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x14 3. 0x1C 3. " IFC ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x14 2. 0x1C 2. " LVD ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 1. 0x14 1. 0x1C 1. " STOP_MODE ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x14 0. 0x1C 0. " DFC ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x04 "GIC_IPR1,GIC Interrupt Pending 1"
|
|
setclrfld.long 0x04 31. 0x18 31. 0x20 31. " SWIRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x18 30. 0x20 30. " SWIRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x18 29. 0x20 29. " SWIRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x18 28. 0x20 28. " SWIRQ3 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x18 27. 0x20 27. " STABLE ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 19. 0x18 19. 0x20 19. " IRQ11 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x18 18. 0x20 18. " IRQ10 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x18 17. 0x20 17. " IRQ9 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 16. 0x18 16. 0x20 16. " IRQ8 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x18 15. 0x20 15. " IRQ7 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x18 14. 0x20 14. " IRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 13. 0x18 13. 0x20 13. " IRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 12. 0x18 12. 0x20 12. " IRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x18 11. 0x20 11. " IRQ3 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x18 10. 0x20 10. " IRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x18 9. 0x20 9. " IRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 8. 0x18 8. 0x20 8. " IRQ0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 7. 0x18 7. 0x20 7. " SWIRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x18 4. 0x20 4. " SMC3 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x18 3. 0x20 3. " SMC2 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 2. 0x18 2. 0x20 2. " SMC1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 1. 0x18 1. 0x20 1. " SMC0 ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x08 "GIC_IMR0,GIC Interrupt Mask 0"
|
|
setclrfld.long 0x08 31. 0x2C 31. 0x24 31. " GPIO2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x2C 30. 0x24 30. " GPIO1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x2C 29. 0x24 29. " GPIO0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x2C 28. 0x24 28. " LDMA ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 27. 0x2C 27. 0x24 27. " GPT0CH2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x2C 26. 0x24 26. " GPT0CH1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 25. 0x2C 25. 0x24 25. " STT ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x2C 24. 0x24 24. " SPI1 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 22. 0x2C 22. 0x24 22. " SWIRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x2C 21. 0x24 21. " I2C1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x2C 20. 0x24 20. " USART0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x2C 18. 0x24 18. " CAPT0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 15. 0x2C 15. 0x24 15. " CAN1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x2C 14. 0x24 14. " UART1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 13. 0x2C 13. 0x24 13. " I2C0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x2C 12. 0x24 12. " UART0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 11. 0x2C 11. 0x24 11. " ST1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x2C 10. 0x24 10. " ST0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x2C 9. 0x24 9. " GPT0CH0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x2C 8. 0x24 8. " CAN0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x2C 7. 0x24 7. " WD ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x2C 6. 0x24 6. " SPI0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x2C 5. 0x24 5. " ADC0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x2C 4. 0x24 4. " PWM0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 3. 0x2C 3. 0x24 3. " IFC ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x2C 2. 0x24 2. " LVD ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 1. 0x2C 1. 0x24 1. " STOP_MODE ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x2C 0. 0x24 0. " DFC ,Interrupt mask" "Disabled,Enabled"
|
|
line.long 0x0C "GIC_IMR1,GIC Interrupt Mask 1"
|
|
setclrfld.long 0x0C 31. 0x30 31. 0x28 31. " SWIRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 30. 0x30 30. 0x28 30. " SWIRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 29. 0x30 29. 0x28 29. " SWIRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 28. 0x30 28. 0x28 28. " SWIRQ3 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 27. 0x30 27. 0x28 27. " STABLE ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 19. 0x30 19. 0x28 19. " IRQ11 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 18. 0x30 18. 0x28 18. " IRQ10 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 17. 0x30 17. 0x28 17. " IRQ9 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 16. 0x30 16. 0x28 16. " IRQ8 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 15. 0x30 15. 0x28 15. " IRQ7 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 14. 0x30 14. 0x28 14. " IRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 13. 0x30 13. 0x28 13. " IRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 12. 0x30 12. 0x28 12. " IRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 11. 0x30 11. 0x28 11. " IRQ3 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 10. 0x30 10. 0x28 10. " IRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 9. 0x30 9. 0x28 9. " IRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 8. 0x30 8. 0x28 8. " IRQ0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 7. 0x30 7. 0x28 7. " SWIRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 4. 0x30 4. 0x28 4. " SMC3 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 3. 0x30 3. 0x28 3. " SMC2 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 2. 0x30 2. 0x28 2. " SMC1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 1. 0x30 1. 0x28 1. " SMC0 ,Interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0xF11C++0x03
|
|
line.long 0x00 "GIC_CISR,GIC Core Interrupt Status"
|
|
bitfld.long 0x00 1. " NIRQ ,nIRQ Status" "Inactive,Active"
|
|
bitfld.long 0x00 0. " NFIQ ,nFIQ Status" "Inactive,Active"
|
|
wgroup.long 0xF140++0x03
|
|
line.long 0x00 "GIC_EOICR,GIC End of Interrupt Command"
|
|
group.long 0xF144++0x03
|
|
line.long 0x00 "GIC_SPU,GIC Spurious Vector"
|
|
hexmask.long 0x00 0.--31. 1. " SPUVECT[31:0] ,Spurious Interrupt Vector Handler Address"
|
|
width 11.
|
|
elif (cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
width 11.
|
|
tree "Source Mode Registers"
|
|
group.long 0xEF00++0xFF
|
|
line.long 0x0 "GIC_SMR0,GIC Source Mode"
|
|
bitfld.long 0x0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "GIC_SMR1,GIC Source Mode"
|
|
bitfld.long 0x4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "GIC_SMR2,GIC Source Mode"
|
|
bitfld.long 0x8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "GIC_SMR3,GIC Source Mode"
|
|
bitfld.long 0xC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "GIC_SMR4,GIC Source Mode"
|
|
bitfld.long 0x10 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x10 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x10 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "GIC_SMR5,GIC Source Mode"
|
|
bitfld.long 0x14 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x14 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x14 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "GIC_SMR6,GIC Source Mode"
|
|
bitfld.long 0x18 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x18 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x18 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "GIC_SMR7,GIC Source Mode"
|
|
bitfld.long 0x1C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x1C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x1C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "GIC_SMR8,GIC Source Mode"
|
|
bitfld.long 0x20 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x20 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x20 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "GIC_SMR9,GIC Source Mode"
|
|
bitfld.long 0x24 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x24 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x24 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "GIC_SMR10,GIC Source Mode"
|
|
bitfld.long 0x28 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x28 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x28 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "GIC_SMR11,GIC Source Mode"
|
|
bitfld.long 0x2C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x2C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x2C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "GIC_SMR12,GIC Source Mode"
|
|
bitfld.long 0x30 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x30 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x30 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "GIC_SMR13,GIC Source Mode"
|
|
bitfld.long 0x34 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x34 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x34 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "GIC_SMR14,GIC Source Mode"
|
|
bitfld.long 0x38 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x38 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x38 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "GIC_SMR15,GIC Source Mode"
|
|
bitfld.long 0x3C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x3C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x3C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "GIC_SMR16,GIC Source Mode"
|
|
bitfld.long 0x40 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x40 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x40 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "GIC_SMR17,GIC Source Mode"
|
|
bitfld.long 0x44 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x44 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x44 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x48 "GIC_SMR18,GIC Source Mode"
|
|
bitfld.long 0x48 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x48 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x48 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "GIC_SMR19,GIC Source Mode"
|
|
bitfld.long 0x4C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x50 "GIC_SMR20,GIC Source Mode"
|
|
bitfld.long 0x50 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x50 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x50 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "GIC_SMR21,GIC Source Mode"
|
|
bitfld.long 0x54 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x54 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x54 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x58 "GIC_SMR22,GIC Source Mode"
|
|
bitfld.long 0x58 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x58 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x58 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "GIC_SMR23,GIC Source Mode"
|
|
bitfld.long 0x5C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x5C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x5C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x60 "GIC_SMR24,GIC Source Mode"
|
|
bitfld.long 0x60 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x60 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x60 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x64 "GIC_SMR25,GIC Source Mode"
|
|
bitfld.long 0x64 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x64 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x64 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x68 "GIC_SMR26,GIC Source Mode"
|
|
bitfld.long 0x68 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x68 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x68 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "GIC_SMR27,GIC Source Mode"
|
|
bitfld.long 0x6C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x6C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x6C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x70 "GIC_SMR28,GIC Source Mode"
|
|
bitfld.long 0x70 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x70 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x70 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x74 "GIC_SMR29,GIC Source Mode"
|
|
bitfld.long 0x74 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x74 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x74 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x78 "GIC_SMR30,GIC Source Mode"
|
|
bitfld.long 0x78 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x78 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x78 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x7C "GIC_SMR31,GIC Source Mode"
|
|
bitfld.long 0x7C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x7C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x7C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x80 "GIC_SMR32,GIC Source Mode"
|
|
bitfld.long 0x80 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x80 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x80 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x84 "GIC_SMR33,GIC Source Mode"
|
|
bitfld.long 0x84 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x84 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x84 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x88 "GIC_SMR34,GIC Source Mode"
|
|
bitfld.long 0x88 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x88 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x88 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8C "GIC_SMR35,GIC Source Mode"
|
|
bitfld.long 0x8C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x90 "GIC_SMR36,GIC Source Mode"
|
|
bitfld.long 0x90 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x90 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x90 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x94 "GIC_SMR37,GIC Source Mode"
|
|
bitfld.long 0x94 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x94 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x94 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x98 "GIC_SMR38,GIC Source Mode"
|
|
bitfld.long 0x98 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x98 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x98 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x9C "GIC_SMR39,GIC Source Mode"
|
|
bitfld.long 0x9C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x9C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x9C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA0 "GIC_SMR40,GIC Source Mode"
|
|
bitfld.long 0xA0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA4 "GIC_SMR41,GIC Source Mode"
|
|
bitfld.long 0xA4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA8 "GIC_SMR42,GIC Source Mode"
|
|
bitfld.long 0xA8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xAC "GIC_SMR43,GIC Source Mode"
|
|
bitfld.long 0xAC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xAC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xAC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB0 "GIC_SMR44,GIC Source Mode"
|
|
bitfld.long 0xB0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB4 "GIC_SMR45,GIC Source Mode"
|
|
bitfld.long 0xB4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB8 "GIC_SMR46,GIC Source Mode"
|
|
bitfld.long 0xB8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xBC "GIC_SMR47,GIC Source Mode"
|
|
bitfld.long 0xBC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xBC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xBC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC0 "GIC_SMR48,GIC Source Mode"
|
|
bitfld.long 0xC0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC4 "GIC_SMR49,GIC Source Mode"
|
|
bitfld.long 0xC4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC8 "GIC_SMR50,GIC Source Mode"
|
|
bitfld.long 0xC8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xCC "GIC_SMR51,GIC Source Mode"
|
|
bitfld.long 0xCC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xCC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xCC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD0 "GIC_SMR52,GIC Source Mode"
|
|
bitfld.long 0xD0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD4 "GIC_SMR53,GIC Source Mode"
|
|
bitfld.long 0xD4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD8 "GIC_SMR54,GIC Source Mode"
|
|
bitfld.long 0xD8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xDC "GIC_SMR55,GIC Source Mode"
|
|
bitfld.long 0xDC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xDC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xDC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE0 "GIC_SMR56,GIC Source Mode"
|
|
bitfld.long 0xE0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE4 "GIC_SMR57,GIC Source Mode"
|
|
bitfld.long 0xE4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE8 "GIC_SMR58,GIC Source Mode"
|
|
bitfld.long 0xE8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xEC "GIC_SMR59,GIC Source Mode"
|
|
bitfld.long 0xEC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xEC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xEC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF0 "GIC_SMR60,GIC Source Mode"
|
|
bitfld.long 0xF0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF4 "GIC_SMR61,GIC Source Mode"
|
|
bitfld.long 0xF4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF8 "GIC_SMR62,GIC Source Mode"
|
|
bitfld.long 0xF8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xFC "GIC_SMR63,GIC Source Mode"
|
|
bitfld.long 0xFC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xFC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xFC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
group.long 0xF000++0xFF
|
|
line.long 0x0 "GIC_SVR0,GIC Source Vector"
|
|
hexmask.long 0x0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4 "GIC_SVR1,GIC Source Vector"
|
|
hexmask.long 0x4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8 "GIC_SVR2,GIC Source Vector"
|
|
hexmask.long 0x8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC "GIC_SVR3,GIC Source Vector"
|
|
hexmask.long 0xC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x10 "GIC_SVR4,GIC Source Vector"
|
|
hexmask.long 0x10 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x14 "GIC_SVR5,GIC Source Vector"
|
|
hexmask.long 0x14 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x18 "GIC_SVR6,GIC Source Vector"
|
|
hexmask.long 0x18 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x1C "GIC_SVR7,GIC Source Vector"
|
|
hexmask.long 0x1C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x20 "GIC_SVR8,GIC Source Vector"
|
|
hexmask.long 0x20 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x24 "GIC_SVR9,GIC Source Vector"
|
|
hexmask.long 0x24 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x28 "GIC_SVR10,GIC Source Vector"
|
|
hexmask.long 0x28 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x2C "GIC_SVR11,GIC Source Vector"
|
|
hexmask.long 0x2C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x30 "GIC_SVR12,GIC Source Vector"
|
|
hexmask.long 0x30 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x34 "GIC_SVR13,GIC Source Vector"
|
|
hexmask.long 0x34 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x38 "GIC_SVR14,GIC Source Vector"
|
|
hexmask.long 0x38 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x3C "GIC_SVR15,GIC Source Vector"
|
|
hexmask.long 0x3C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x40 "GIC_SVR16,GIC Source Vector"
|
|
hexmask.long 0x40 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x44 "GIC_SVR17,GIC Source Vector"
|
|
hexmask.long 0x44 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x48 "GIC_SVR18,GIC Source Vector"
|
|
hexmask.long 0x48 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4C "GIC_SVR19,GIC Source Vector"
|
|
hexmask.long 0x4C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x50 "GIC_SVR20,GIC Source Vector"
|
|
hexmask.long 0x50 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x54 "GIC_SVR21,GIC Source Vector"
|
|
hexmask.long 0x54 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x58 "GIC_SVR22,GIC Source Vector"
|
|
hexmask.long 0x58 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x5C "GIC_SVR23,GIC Source Vector"
|
|
hexmask.long 0x5C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x60 "GIC_SVR24,GIC Source Vector"
|
|
hexmask.long 0x60 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x64 "GIC_SVR25,GIC Source Vector"
|
|
hexmask.long 0x64 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x68 "GIC_SVR26,GIC Source Vector"
|
|
hexmask.long 0x68 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x6C "GIC_SVR27,GIC Source Vector"
|
|
hexmask.long 0x6C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x70 "GIC_SVR28,GIC Source Vector"
|
|
hexmask.long 0x70 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x74 "GIC_SVR29,GIC Source Vector"
|
|
hexmask.long 0x74 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x78 "GIC_SVR30,GIC Source Vector"
|
|
hexmask.long 0x78 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x7C "GIC_SVR31,GIC Source Vector"
|
|
hexmask.long 0x7C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x80 "GIC_SVR32,GIC Source Vector"
|
|
hexmask.long 0x80 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x84 "GIC_SVR33,GIC Source Vector"
|
|
hexmask.long 0x84 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x88 "GIC_SVR34,GIC Source Vector"
|
|
hexmask.long 0x88 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8C "GIC_SVR35,GIC Source Vector"
|
|
hexmask.long 0x8C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x90 "GIC_SVR36,GIC Source Vector"
|
|
hexmask.long 0x90 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x94 "GIC_SVR37,GIC Source Vector"
|
|
hexmask.long 0x94 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x98 "GIC_SVR38,GIC Source Vector"
|
|
hexmask.long 0x98 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x9C "GIC_SVR39,GIC Source Vector"
|
|
hexmask.long 0x9C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA0 "GIC_SVR40,GIC Source Vector"
|
|
hexmask.long 0xA0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA4 "GIC_SVR41,GIC Source Vector"
|
|
hexmask.long 0xA4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA8 "GIC_SVR42,GIC Source Vector"
|
|
hexmask.long 0xA8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xAC "GIC_SVR43,GIC Source Vector"
|
|
hexmask.long 0xAC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB0 "GIC_SVR44,GIC Source Vector"
|
|
hexmask.long 0xB0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB4 "GIC_SVR45,GIC Source Vector"
|
|
hexmask.long 0xB4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB8 "GIC_SVR46,GIC Source Vector"
|
|
hexmask.long 0xB8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xBC "GIC_SVR47,GIC Source Vector"
|
|
hexmask.long 0xBC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC0 "GIC_SVR48,GIC Source Vector"
|
|
hexmask.long 0xC0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC4 "GIC_SVR49,GIC Source Vector"
|
|
hexmask.long 0xC4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC8 "GIC_SVR50,GIC Source Vector"
|
|
hexmask.long 0xC8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xCC "GIC_SVR51,GIC Source Vector"
|
|
hexmask.long 0xCC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD0 "GIC_SVR52,GIC Source Vector"
|
|
hexmask.long 0xD0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD4 "GIC_SVR53,GIC Source Vector"
|
|
hexmask.long 0xD4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD8 "GIC_SVR54,GIC Source Vector"
|
|
hexmask.long 0xD8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xDC "GIC_SVR55,GIC Source Vector"
|
|
hexmask.long 0xDC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE0 "GIC_SVR56,GIC Source Vector"
|
|
hexmask.long 0xE0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE4 "GIC_SVR57,GIC Source Vector"
|
|
hexmask.long 0xE4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE8 "GIC_SVR58,GIC Source Vector"
|
|
hexmask.long 0xE8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xEC "GIC_SVR59,GIC Source Vector"
|
|
hexmask.long 0xEC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF0 "GIC_SVR60,GIC Source Vector"
|
|
hexmask.long 0xF0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF4 "GIC_SVR61,GIC Source Vector"
|
|
hexmask.long 0xF4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF8 "GIC_SVR62,GIC Source Vector"
|
|
hexmask.long 0xF8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xFC "GIC_SVR63,GIC Source Vector"
|
|
hexmask.long 0xFC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
tree.end
|
|
rgroup.long 0xF100++0x0B
|
|
line.long 0x00 "GIC_IVR,GIC Interrupt Vector"
|
|
hexmask.long 0x00 0.--31. 1. " IRQV[31:0] ,Interrupt Vector Address"
|
|
line.long 0x04 "GIC_FVR,GIC FIQ Vector"
|
|
hexmask.long 0x04 0.--31. 1. " FIQV[31:0] ,FIQ Vector Address"
|
|
line.long 0x08 "GIC_ISR,GIC Interrupt Status"
|
|
hexmask.long 0x08 0.--5. 1. " IRQID[5:0] ,Current IRQ Identifier"
|
|
group.long 0xF10C++0x0F
|
|
line.long 0x00 "GIC_IPR0,GIC Interrupt Pending 0"
|
|
setclrfld.long 0x00 31. 0x14 31. 0x1C 31. " GPIO2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x14 30. 0x1C 30. " GPIO1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x14 29. 0x1C 29. " GPIO0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x14 28. 0x1C 28. " LDMA ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 27. 0x14 27. 0x1C 27. " GPT0CH2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x14 26. 0x1C 26. " GPT0CH1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 25. 0x14 25. 0x1C 25. " STT ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x14 24. 0x1C 24. " SPI1 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 23. 0x14 23. 0x1C 23. " ST2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x14 22. 0x1C 22. " SWIRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x14 21. 0x1C 21. " I2C1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x14 20. 0x1C 20. " USART0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x14 19. 0x1C 19. " CAPT1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x14 18. 0x1C 18. " CAPT0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x14 17. 0x1C 17. " CAN3 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x14 16. 0x1C 16. " CAN2 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 15. 0x14 15. 0x1C 15. " CAN1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x14 14. 0x1C 14. " UART1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 13. 0x14 13. 0x1C 13. " I2C0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x14 12. 0x1C 12. " UART0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 11. 0x14 11. 0x1C 11. " ST1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x14 10. 0x1C 10. " ST0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x14 9. 0x1C 9. " GPT0CH0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x14 8. 0x1C 8. " CAN0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x14 7. 0x1C 7. " WD ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x14 6. 0x1C 6. " SPI0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x14 5. 0x1C 5. " ADC0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x14 4. 0x1C 4. " PWM0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 3. 0x14 3. 0x1C 3. " IFC ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x14 2. 0x1C 2. " LVD ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 1. 0x14 1. 0x1C 1. " STOP_MODE ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x14 0. 0x1C 0. " DFC ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x04 "GIC_IPR1,GIC Interrupt Pending 1"
|
|
setclrfld.long 0x04 31. 0x18 31. 0x20 31. " SWIRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x18 30. 0x20 30. " SWIRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x18 29. 0x20 29. " SWIRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x18 28. 0x20 28. " STABLE ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x18 27. 0x20 27. " IRQ19 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x18 26. 0x20 26. " IRQ18 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 25. 0x18 25. 0x20 25. " IRQ17 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x18 24. 0x20 24. " IRQ16 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 23. 0x18 23. 0x20 23. " IRQ15 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x18 22. 0x20 22. " IRQ14 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x18 21. 0x20 21. " IRQ13 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x18 20. 0x20 20. " IRQ12 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x18 19. 0x20 19. " IRQ11 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x18 18. 0x20 18. " IRQ10 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x18 17. 0x20 17. " IRQ9 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x18 16. 0x20 16. " IRQ8 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 15. 0x18 15. 0x20 15. " IRQ7 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x18 14. 0x20 14. " IRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 13. 0x18 13. 0x20 13. " IRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x18 12. 0x20 12. " IRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 11. 0x18 11. 0x20 11. " IRQ3 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x18 10. 0x20 10. " IRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x18 9. 0x20 9. " IRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x18 8. 0x20 8. " IRQ0 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x18 7. 0x20 7. " SWIRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x18 6. 0x20 6. " SMC5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x18 5. 0x20 5. " SMC4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x18 4. 0x20 4. " SMC3 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x18 3. 0x20 3. " SMC2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x18 2. 0x20 2. " SMC1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 1. 0x18 1. 0x20 1. " SMC0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x18 0. 0x20 0. " GPIO3 ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x08 "GIC_IMR0,GIC Interrupt Mask 0"
|
|
setclrfld.long 0x08 31. 0x2C 31. 0x24 31. " GPIO2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x2C 30. 0x24 30. " GPIO1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x2C 29. 0x24 29. " GPIO0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x2C 28. 0x24 28. " LDMA ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 27. 0x2C 31. 0x24 31. " GPT0CH2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x2C 26. 0x24 26. " GPT0CH1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 25. 0x2C 25. 0x24 25. " STT ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x2C 24. 0x24 24. " SPI1 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 23. 0x2C 23. 0x24 23. " ST2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x2C 22. 0x24 22. " SWIRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x2C 21. 0x24 21. " I2C1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x2C 20. 0x24 20. " USART0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x2C 19. 0x24 19. " CAPT1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x2C 18. 0x24 18. " CAPT0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x2C 17. 0x24 17. " CAN3 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x2C 16. 0x24 16. " CAN2 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 15. 0x2C 15. 0x24 15. " CAN1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x2C 14. 0x24 14. " UART1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 13. 0x2C 13. 0x24 13. " I2C0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x2C 12. 0x24 12. " UART0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 11. 0x2C 11. 0x24 11. " ST1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x2C 10. 0x24 10. " ST0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x2C 9. 0x24 9. " GPT0CH0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x2C 8. 0x24 8. " CAN0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x2C 7. 0x24 7. " WD ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x2C 6. 0x24 6. " SPI0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x2C 5. 0x24 5. " ADC0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x2C 4. 0x24 4. " PWM0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 3. 0x2C 3. 0x24 3. " IFC ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x2C 2. 0x24 2. " LVD ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 1. 0x2C 1. 0x24 1. " STOP_MODE ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x2C 0. 0x24 0. " DFC ,Interrupt mask" "Disabled,Enabled"
|
|
line.long 0x0C "GIC_IMR1,GIC Interrupt Mask 1"
|
|
setclrfld.long 0x0C 31. 0x30 31. 0x28 31. " SWIRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 30. 0x30 30. 0x28 30. " SWIRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 29. 0x30 29. 0x28 29. " SWIRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 28. 0x30 28. 0x28 28. " STABLE ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 27. 0x30 27. 0x28 27. " IRQ19 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 26. 0x30 26. 0x28 26. " IRQ18 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 25. 0x30 25. 0x28 25. " IRQ17 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 24. 0x30 24. 0x28 24. " IRQ16 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 23. 0x30 23. 0x28 23. " IRQ15 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 22. 0x30 22. 0x28 22. " IRQ14 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 21. 0x30 21. 0x28 21. " IRQ13 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 20. 0x30 20. 0x28 20. " IRQ12 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 19. 0x30 19. 0x28 19. " IRQ11 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 18. 0x30 18. 0x28 18. " IRQ10 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 17. 0x30 17. 0x28 17. " IRQ9 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 16. 0x30 16. 0x28 16. " IRQ8 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 15. 0x30 15. 0x28 15. " IRQ7 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 14. 0x30 14. 0x28 14. " IRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 13. 0x30 13. 0x28 13. " IRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 12. 0x30 12. 0x28 12. " IRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 11. 0x30 11. 0x28 11. " IRQ3 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 10. 0x30 10. 0x28 10. " IRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 9. 0x30 9. 0x28 9. " IRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 8. 0x30 8. 0x28 8. " IRQ0 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 7. 0x30 7. 0x28 7. " SWIRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 6. 0x30 6. 0x28 6. " SMC5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 5. 0x30 5. 0x28 5. " SMC4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 4. 0x30 4. 0x28 4. " SMC3 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 3. 0x30 3. 0x28 3. " SMC2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 2. 0x30 2. 0x28 2. " SMC1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 1. 0x30 1. 0x28 1. " SMC0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 0. 0x30 0. 0x28 0. " GPIO3 ,Interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0xF11C++0x03
|
|
line.long 0x00 "GIC_CISR,GIC Core Interrupt Status"
|
|
bitfld.long 0x00 1. " NFIQ ,nFIQ Status" "Inactive,Active"
|
|
bitfld.long 0x00 0. " NIRQ ,nIRQ Status" "Inactive,Active"
|
|
wgroup.long 0xF140++0x23
|
|
line.long 0x00 "GIC_EOICR,GIC End of Interrupt Command"
|
|
group.long 0xF144++0x03
|
|
line.long 0x00 "GIC_SPU,GIC Spurious Vector"
|
|
hexmask.long 0x00 0.--31. 1. " SPUVECT[31:0] ,Spurious Interrupt Vector Handler Address"
|
|
width 11.
|
|
else
|
|
width 11.
|
|
tree "Source Mode Registers"
|
|
group.long 0xEF00++0xFF
|
|
line.long 0x0 "GIC_SMR0,GIC Source Mode"
|
|
bitfld.long 0x0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "GIC_SMR1,GIC Source Mode"
|
|
bitfld.long 0x4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "GIC_SMR2,GIC Source Mode"
|
|
bitfld.long 0x8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "GIC_SMR3,GIC Source Mode"
|
|
bitfld.long 0xC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "GIC_SMR4,GIC Source Mode"
|
|
bitfld.long 0x10 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x10 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x10 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "GIC_SMR5,GIC Source Mode"
|
|
bitfld.long 0x14 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x14 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x14 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "GIC_SMR6,GIC Source Mode"
|
|
bitfld.long 0x18 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x18 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x18 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "GIC_SMR7,GIC Source Mode"
|
|
bitfld.long 0x1C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x1C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x1C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x20 "GIC_SMR8,GIC Source Mode"
|
|
bitfld.long 0x20 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x20 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x20 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "GIC_SMR9,GIC Source Mode"
|
|
bitfld.long 0x24 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x24 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x24 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x28 "GIC_SMR10,GIC Source Mode"
|
|
bitfld.long 0x28 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x28 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x28 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "GIC_SMR11,GIC Source Mode"
|
|
bitfld.long 0x2C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x2C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x2C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x30 "GIC_SMR12,GIC Source Mode"
|
|
bitfld.long 0x30 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x30 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x30 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "GIC_SMR13,GIC Source Mode"
|
|
bitfld.long 0x34 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x34 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x34 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x38 "GIC_SMR14,GIC Source Mode"
|
|
bitfld.long 0x38 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x38 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x38 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "GIC_SMR15,GIC Source Mode"
|
|
bitfld.long 0x3C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x3C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x3C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x40 "GIC_SMR16,GIC Source Mode"
|
|
bitfld.long 0x40 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x40 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x40 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "GIC_SMR17,GIC Source Mode"
|
|
bitfld.long 0x44 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x44 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x44 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x48 "GIC_SMR18,GIC Source Mode"
|
|
bitfld.long 0x48 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x48 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x48 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "GIC_SMR19,GIC Source Mode"
|
|
bitfld.long 0x4C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x4C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x4C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x50 "GIC_SMR20,GIC Source Mode"
|
|
bitfld.long 0x50 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x50 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x50 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "GIC_SMR21,GIC Source Mode"
|
|
bitfld.long 0x54 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x54 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x54 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x58 "GIC_SMR22,GIC Source Mode"
|
|
bitfld.long 0x58 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x58 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x58 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "GIC_SMR23,GIC Source Mode"
|
|
bitfld.long 0x5C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x5C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x5C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x60 "GIC_SMR24,GIC Source Mode"
|
|
bitfld.long 0x60 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x60 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x60 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x64 "GIC_SMR25,GIC Source Mode"
|
|
bitfld.long 0x64 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x64 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x64 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x68 "GIC_SMR26,GIC Source Mode"
|
|
bitfld.long 0x68 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x68 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x68 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "GIC_SMR27,GIC Source Mode"
|
|
bitfld.long 0x6C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x6C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x6C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x70 "GIC_SMR28,GIC Source Mode"
|
|
bitfld.long 0x70 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x70 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x70 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x74 "GIC_SMR29,GIC Source Mode"
|
|
bitfld.long 0x74 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x74 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x74 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x78 "GIC_SMR30,GIC Source Mode"
|
|
bitfld.long 0x78 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x78 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x78 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x7C "GIC_SMR31,GIC Source Mode"
|
|
bitfld.long 0x7C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x7C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x7C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x80 "GIC_SMR32,GIC Source Mode"
|
|
bitfld.long 0x80 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x80 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x80 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x84 "GIC_SMR33,GIC Source Mode"
|
|
bitfld.long 0x84 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x84 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x84 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x88 "GIC_SMR34,GIC Source Mode"
|
|
bitfld.long 0x88 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x88 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x88 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8C "GIC_SMR35,GIC Source Mode"
|
|
bitfld.long 0x8C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x8C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x8C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x90 "GIC_SMR36,GIC Source Mode"
|
|
bitfld.long 0x90 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x90 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x90 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x94 "GIC_SMR37,GIC Source Mode"
|
|
bitfld.long 0x94 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x94 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x94 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x98 "GIC_SMR38,GIC Source Mode"
|
|
bitfld.long 0x98 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x98 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x98 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0x9C "GIC_SMR39,GIC Source Mode"
|
|
bitfld.long 0x9C 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0x9C 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0x9C 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA0 "GIC_SMR40,GIC Source Mode"
|
|
bitfld.long 0xA0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA4 "GIC_SMR41,GIC Source Mode"
|
|
bitfld.long 0xA4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA8 "GIC_SMR42,GIC Source Mode"
|
|
bitfld.long 0xA8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xA8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xA8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xAC "GIC_SMR43,GIC Source Mode"
|
|
bitfld.long 0xAC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xAC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xAC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB0 "GIC_SMR44,GIC Source Mode"
|
|
bitfld.long 0xB0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB4 "GIC_SMR45,GIC Source Mode"
|
|
bitfld.long 0xB4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB8 "GIC_SMR46,GIC Source Mode"
|
|
bitfld.long 0xB8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xB8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xB8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xBC "GIC_SMR47,GIC Source Mode"
|
|
bitfld.long 0xBC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xBC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xBC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC0 "GIC_SMR48,GIC Source Mode"
|
|
bitfld.long 0xC0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC4 "GIC_SMR49,GIC Source Mode"
|
|
bitfld.long 0xC4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC8 "GIC_SMR50,GIC Source Mode"
|
|
bitfld.long 0xC8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xC8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xC8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xCC "GIC_SMR51,GIC Source Mode"
|
|
bitfld.long 0xCC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xCC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xCC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD0 "GIC_SMR52,GIC Source Mode"
|
|
bitfld.long 0xD0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD4 "GIC_SMR53,GIC Source Mode"
|
|
bitfld.long 0xD4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD8 "GIC_SMR54,GIC Source Mode"
|
|
bitfld.long 0xD8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xD8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xD8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xDC "GIC_SMR55,GIC Source Mode"
|
|
bitfld.long 0xDC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xDC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xDC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE0 "GIC_SMR56,GIC Source Mode"
|
|
bitfld.long 0xE0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE4 "GIC_SMR57,GIC Source Mode"
|
|
bitfld.long 0xE4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE8 "GIC_SMR58,GIC Source Mode"
|
|
bitfld.long 0xE8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xE8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xE8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xEC "GIC_SMR59,GIC Source Mode"
|
|
bitfld.long 0xEC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xEC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xEC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF0 "GIC_SMR60,GIC Source Mode"
|
|
bitfld.long 0xF0 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF0 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF0 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF4 "GIC_SMR61,GIC Source Mode"
|
|
bitfld.long 0xF4 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF4 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF4 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF8 "GIC_SMR62,GIC Source Mode"
|
|
bitfld.long 0xF8 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xF8 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xF8 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
line.long 0xFC "GIC_SMR63,GIC Source Mode"
|
|
bitfld.long 0xFC 4.--5. " SRCTYP[1:0] ,Interrupt Source Type" "Low level,Negative edge,High level,Positive edge"
|
|
bitfld.long 0xFC 3. " SDI ,Select destination interrupt nFIQ or nIRQ" "nIRQ,nFIQ"
|
|
bitfld.long 0xFC 0.--2. " PRIOR[2:0] ,Priority level" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "Source Vector Registers"
|
|
group.long 0xF000++0xFF
|
|
line.long 0x0 "GIC_SVR0,GIC Source Vector"
|
|
hexmask.long 0x0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4 "GIC_SVR1,GIC Source Vector"
|
|
hexmask.long 0x4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8 "GIC_SVR2,GIC Source Vector"
|
|
hexmask.long 0x8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC "GIC_SVR3,GIC Source Vector"
|
|
hexmask.long 0xC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x10 "GIC_SVR4,GIC Source Vector"
|
|
hexmask.long 0x10 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x14 "GIC_SVR5,GIC Source Vector"
|
|
hexmask.long 0x14 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x18 "GIC_SVR6,GIC Source Vector"
|
|
hexmask.long 0x18 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x1C "GIC_SVR7,GIC Source Vector"
|
|
hexmask.long 0x1C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x20 "GIC_SVR8,GIC Source Vector"
|
|
hexmask.long 0x20 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x24 "GIC_SVR9,GIC Source Vector"
|
|
hexmask.long 0x24 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x28 "GIC_SVR10,GIC Source Vector"
|
|
hexmask.long 0x28 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x2C "GIC_SVR11,GIC Source Vector"
|
|
hexmask.long 0x2C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x30 "GIC_SVR12,GIC Source Vector"
|
|
hexmask.long 0x30 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x34 "GIC_SVR13,GIC Source Vector"
|
|
hexmask.long 0x34 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x38 "GIC_SVR14,GIC Source Vector"
|
|
hexmask.long 0x38 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x3C "GIC_SVR15,GIC Source Vector"
|
|
hexmask.long 0x3C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x40 "GIC_SVR16,GIC Source Vector"
|
|
hexmask.long 0x40 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x44 "GIC_SVR17,GIC Source Vector"
|
|
hexmask.long 0x44 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x48 "GIC_SVR18,GIC Source Vector"
|
|
hexmask.long 0x48 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x4C "GIC_SVR19,GIC Source Vector"
|
|
hexmask.long 0x4C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x50 "GIC_SVR20,GIC Source Vector"
|
|
hexmask.long 0x50 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x54 "GIC_SVR21,GIC Source Vector"
|
|
hexmask.long 0x54 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x58 "GIC_SVR22,GIC Source Vector"
|
|
hexmask.long 0x58 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x5C "GIC_SVR23,GIC Source Vector"
|
|
hexmask.long 0x5C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x60 "GIC_SVR24,GIC Source Vector"
|
|
hexmask.long 0x60 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x64 "GIC_SVR25,GIC Source Vector"
|
|
hexmask.long 0x64 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x68 "GIC_SVR26,GIC Source Vector"
|
|
hexmask.long 0x68 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x6C "GIC_SVR27,GIC Source Vector"
|
|
hexmask.long 0x6C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x70 "GIC_SVR28,GIC Source Vector"
|
|
hexmask.long 0x70 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x74 "GIC_SVR29,GIC Source Vector"
|
|
hexmask.long 0x74 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x78 "GIC_SVR30,GIC Source Vector"
|
|
hexmask.long 0x78 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x7C "GIC_SVR31,GIC Source Vector"
|
|
hexmask.long 0x7C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x80 "GIC_SVR32,GIC Source Vector"
|
|
hexmask.long 0x80 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x84 "GIC_SVR33,GIC Source Vector"
|
|
hexmask.long 0x84 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x88 "GIC_SVR34,GIC Source Vector"
|
|
hexmask.long 0x88 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x8C "GIC_SVR35,GIC Source Vector"
|
|
hexmask.long 0x8C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x90 "GIC_SVR36,GIC Source Vector"
|
|
hexmask.long 0x90 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x94 "GIC_SVR37,GIC Source Vector"
|
|
hexmask.long 0x94 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x98 "GIC_SVR38,GIC Source Vector"
|
|
hexmask.long 0x98 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0x9C "GIC_SVR39,GIC Source Vector"
|
|
hexmask.long 0x9C 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA0 "GIC_SVR40,GIC Source Vector"
|
|
hexmask.long 0xA0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA4 "GIC_SVR41,GIC Source Vector"
|
|
hexmask.long 0xA4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xA8 "GIC_SVR42,GIC Source Vector"
|
|
hexmask.long 0xA8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xAC "GIC_SVR43,GIC Source Vector"
|
|
hexmask.long 0xAC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB0 "GIC_SVR44,GIC Source Vector"
|
|
hexmask.long 0xB0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB4 "GIC_SVR45,GIC Source Vector"
|
|
hexmask.long 0xB4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xB8 "GIC_SVR46,GIC Source Vector"
|
|
hexmask.long 0xB8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xBC "GIC_SVR47,GIC Source Vector"
|
|
hexmask.long 0xBC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC0 "GIC_SVR48,GIC Source Vector"
|
|
hexmask.long 0xC0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC4 "GIC_SVR49,GIC Source Vector"
|
|
hexmask.long 0xC4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xC8 "GIC_SVR50,GIC Source Vector"
|
|
hexmask.long 0xC8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xCC "GIC_SVR51,GIC Source Vector"
|
|
hexmask.long 0xCC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD0 "GIC_SVR52,GIC Source Vector"
|
|
hexmask.long 0xD0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD4 "GIC_SVR53,GIC Source Vector"
|
|
hexmask.long 0xD4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xD8 "GIC_SVR54,GIC Source Vector"
|
|
hexmask.long 0xD8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xDC "GIC_SVR55,GIC Source Vector"
|
|
hexmask.long 0xDC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE0 "GIC_SVR56,GIC Source Vector"
|
|
hexmask.long 0xE0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE4 "GIC_SVR57,GIC Source Vector"
|
|
hexmask.long 0xE4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xE8 "GIC_SVR58,GIC Source Vector"
|
|
hexmask.long 0xE8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xEC "GIC_SVR59,GIC Source Vector"
|
|
hexmask.long 0xEC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF0 "GIC_SVR60,GIC Source Vector"
|
|
hexmask.long 0xF0 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF4 "GIC_SVR61,GIC Source Vector"
|
|
hexmask.long 0xF4 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xF8 "GIC_SVR62,GIC Source Vector"
|
|
hexmask.long 0xF8 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
line.long 0xFC "GIC_SVR63,GIC Source Vector"
|
|
hexmask.long 0xFC 0.--31. 1. " VECT[31:0] ,Interrupt Handler Address"
|
|
tree.end
|
|
rgroup.long 0xF100++0x0B
|
|
line.long 0x00 "GIC_IVR,GIC Interrupt Vector"
|
|
hexmask.long 0x00 0.--31. 1. " IRQV[31:0] ,Interrupt Vector Address"
|
|
line.long 0x04 "GIC_FVR,GIC FIQ Vector"
|
|
hexmask.long 0x04 0.--31. 1. " FIQV[31:0] ,FIQ Vector Address"
|
|
line.long 0x08 "GIC_ISR,GIC Interrupt Status"
|
|
hexmask.long 0x08 0.--5. 1. " IRQID[5:0] ,Current IRQ Identifier"
|
|
group.long 0xF10C++0x0F
|
|
line.long 0x00 "GIC_IPR0,GIC Interrupt Pending 0"
|
|
setclrfld.long 0x00 30. 0x14 30. 0x1C 30. " GPIO1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x14 29. 0x1C 29. " GPIO0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x14 28. 0x1C 28. " LDMA ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x14 27. 0x1C 27. " GPT0CH2 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 26. 0x14 26. 0x1C 26. " GPT0CH1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 25. 0x14 25. 0x1C 25. " STT ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x14 24. 0x1C 24. " SPI1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x14 22. 0x1C 22. " SWIRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 20. 0x14 20. 0x1C 20. " USART0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 13. 0x14 13. 0x1C 13. " I2C0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x14 12. 0x1C 12. " UART0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x14 11. 0x1C 11. " ST1 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x14 10. 0x1C 10. " ST0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x14 9. 0x1C 9. " GPT0CH0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x14 8. 0x1C 8. " CAN0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 7. 0x14 7. 0x1C 7. " WD ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 6. 0x14 6. 0x1C 6. " SPI0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x14 5. 0x1C 5. " ADC0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x14 4. 0x1C 4. " PWM0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x14 3. 0x1C 3. " IFC ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 2. 0x14 2. 0x1C 2. " LVD ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 1. 0x14 1. 0x1C 1. " STOP_MODE ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x04 "GIC_IPR1,GIC Interrupt Pending 1"
|
|
setclrfld.long 0x04 31. 0x18 31. 0x20 31. " SWIRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x18 30. 0x20 30. " SWIRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x18 29. 0x20 29. " SWIRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x18 28. 0x20 28. " STABLE ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 27. 0x18 27. 0x20 27. " IRQ19 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x18 17. 0x20 17. " IRQ9 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x18 16. 0x20 16. " IRQ8 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x18 15. 0x20 15. " IRQ7 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 14. 0x18 14. 0x20 14. " IRQ6 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 13. 0x18 13. 0x20 13. " IRQ5 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x18 12. 0x20 12. " IRQ4 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x18 11. 0x20 11. " IRQ3 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 10. 0x18 10. 0x20 10. " IRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x18 9. 0x20 9. " IRQ1 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x18 8. 0x20 8. " IRQ0 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 7. 0x18 7. 0x20 7. " SWIRQ2 ,Interrupt pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 3. 0x18 3. 0x20 3. " PWM3 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x18 2. 0x20 2. " PWM2 ,Interrupt pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 1. 0x18 1. 0x20 1. " PWM1 ,Interrupt pending" "Not pending,Pending"
|
|
line.long 0x08 "GIC_IMR0,GIC Interrupt Mask 0"
|
|
setclrfld.long 0x08 30. 0x2C 30. 0x24 30. " GPIO1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x2C 29. 0x24 29. " GPIO0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x2C 28. 0x24 28. " LDMA ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x2C 27. 0x24 27. " GPT0CH2 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 26. 0x2C 26. 0x24 26. " GPT0CH1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 25. 0x2C 25. 0x24 25. " STT ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x2C 24. 0x24 24. " SPI1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x2C 22. 0x24 22. " SWIRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 20. 0x2C 20. 0x24 20. " USART0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 13. 0x2C 13. 0x24 13. " I2C0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x2C 12. 0x24 12. " UART0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x2C 11. 0x24 11. " ST1 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 10. 0x2C 10. 0x24 10. " ST0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x2C 9. 0x24 9. " GPT0CH0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x2C 8. 0x24 8. " CAN0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 7. 0x2C 7. 0x24 7. " WD ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 6. 0x2C 6. 0x24 6. " SPI0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x2C 5. 0x24 5. " ADC0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x2C 4. 0x24 4. " PWM0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x2C 3. 0x24 3. " IFC ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 2. 0x2C 2. 0x24 2. " LVD ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x08 1. 0x2C 1. 0x24 1. " STOP_MODE ,Interrupt mask" "Disabled,Enabled"
|
|
line.long 0x0C "GIC_IMR1,GIC Interrupt Mask 1"
|
|
setclrfld.long 0x0C 31. 0x30 31. 0x28 31. " SWIRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 30. 0x30 30. 0x28 30. " SWIRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 29. 0x30 29. 0x28 29. " SWIRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 28. 0x30 28. 0x28 28. " SWIRQ3 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 27. 0x30 27. 0x28 27. " STABLE ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 17. 0x30 17. 0x28 17. " IRQ9 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 16. 0x30 16. 0x28 16. " IRQ8 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 15. 0x30 15. 0x28 15. " IRQ7 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 14. 0x30 14. 0x28 14. " IRQ6 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 13. 0x30 13. 0x28 13. " IRQ5 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 12. 0x30 12. 0x28 12. " IRQ4 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 11. 0x30 11. 0x28 11. " IRQ3 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 10. 0x30 10. 0x28 10. " IRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 9. 0x30 9. 0x28 9. " IRQ1 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 8. 0x30 8. 0x28 8. " IRQ0 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 7. 0x30 7. 0x28 7. " SWIRQ2 ,Interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0C 3. 0x30 3. 0x28 3. " PWM3 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 2. 0x30 2. 0x28 2. " PWM2 ,Interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x0C 1. 0x30 1. 0x28 1. " PWM1 ,Interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0xF11C++0x03
|
|
line.long 0x00 "GIC_CISR,GIC Core Interrupt Status"
|
|
bitfld.long 0x00 1. " NFIQ ,nFIQ Status" "Inactive,Active"
|
|
bitfld.long 0x00 0. " NIRQ ,nIRQ Status" "Inactive,Active"
|
|
wgroup.long 0xF120++0x03
|
|
line.long 0x00 "GIC_EOICR,GIC End of Interrupt Command"
|
|
group.long 0xF144++0x03
|
|
line.long 0x00 "GIC_SPU,GIC Spurious Vector"
|
|
hexmask.long 0x00 0.--31. 1. " SPUVECT[31:0] ,Spurious Interrupt Vector Handler Address"
|
|
width 11.
|
|
endif
|
|
tree.end
|
|
tree "IOCONF (I/O Configuration)"
|
|
base ad:0xFFE2C000
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR")
|
|
width 6.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MR0,IO Configuration Mode Register 0"
|
|
bitfld.long 0x00 31. " PIO0_7_F3EN ,Third function on pin PIO0_7" "Disabled,Enabled"
|
|
bitfld.long 0x00 28. " PIO0_7_PUENB ,Pull-up on pin PIO0_7" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. " PIO0_6_F3EN ,Third function on pin PIO0_6" "Disabled,Enabled"
|
|
bitfld.long 0x00 24. " PIO0_6_PUENB ,Pull-up on pin PIO0_6" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 23. " PIO0_5_F3EN ,Third function on pin PIO0_5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " PIO0_5_PUENB ,Pull-up on pin PIO0_5" "Enabled,Disabled"
|
|
bitfld.long 0x00 19. " PIO0_4_F3EN ,Third function on pin PIO0_4" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " PIO0_4_PUENB ,Pull-up on pin PIO0_4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIO0_3_F3EN ,Third function on pin PIO0_3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PIO0_3_PUENB ,Pull-up on pin PIO0_3" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " PIO0_2_F3EN ,Third function on pin PIO0_2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PIO0_2_PUENB ,Pull-up on pin PIO0_2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PIO0_1_F3EN ,Third function on pin PIO0_1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PIO0_1_PUENB ,Pull-up on pin PIO0_1" "Enabled,Disabled"
|
|
bitfld.long 0x00 3. " PIO0_0_F3EN ,Third function on pin PIO0_0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " PIO0_0_PUENB ,Pull-up on pin PIO0_0" "Enabled,Disabled"
|
|
line.long 0x04 "MR1,IO Configuration Mode Register 1"
|
|
bitfld.long 0x04 31. " PIO0_15_F3EN ,Third function on pin PIO0_15" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " PIO0_15_PUENB ,Pull-up on pin PIO0_15" "Enabled,Disabled"
|
|
bitfld.long 0x04 27. " PIO0_14_F3EN ,Third function on pin PIO0_14" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PIO0_14_PUENB ,Pull-up on pin PIO0_14" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PIO0_13_F3EN ,Third function on pin PIO0_13" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PIO0_13_PUENB ,Pull-up on pin PIO0_13" "Enabled,Disabled"
|
|
bitfld.long 0x04 19. " PIO0_12_F3EN ,Third function on pin PIO0_12" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PIO0_12_PUENB ,Pull-up on pin PIO0_12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PIO0_11_F3EN ,Third function on pin PIO0_11" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " PIO0_11_PUENB ,Pull-up on pin PIO0_11" "Enabled,Disabled"
|
|
bitfld.long 0x04 11. " PIO0_10_F3EN ,Third function on pin PIO0_10" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PIO0_10_PUENB ,Pull-up on pin PIO0_710" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PIO0_9_F3EN ,Third function on pin PIO0_9" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " PIO0_9_PUENB ,Pull-up on pin PIO0_9" "Enabled,Disabled"
|
|
bitfld.long 0x04 3. " PIO0_8_F3EN ,Third function on pin PIO0_8" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PIO0_8_PUENB ,Pull-up on pin PIO0_8" "Enabled,Disabled"
|
|
line.long 0x08 "MR2,IO Configuration Mode Register 2"
|
|
bitfld.long 0x08 31. " PIO0_23_F3EN ,Third function on pin PIO0_23" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " PIO0_22_F3EN ,Third function on pin PIO0_22" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " PIO0_21_F3EN ,Third function on pin PIO0_21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PIO0_21_PUENB ,Pull-up 21" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PIO0_20_F3EN ,Third function on pin PIO0_20" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PIO0_20_PUENB ,Pull-up on pin PIO0_20" "Enabled,Disabled"
|
|
bitfld.long 0x08 15. " PIO0_19_F3EN ,Third function on pin PIO0_19" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PIO0_19_PUENB ,Pull-up on pin PIO0_19" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PIO0_18_F3EN ,Third function on pin PIO0_18" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " PIO0_18_PUENB ,Pull-up on pin PIO0_18" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " PIO0_17_F3EN ,Third function on pin PIO0_17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " PIO0_17_PUENB ,Pull-up on pin PIO0_17" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PIO0_16_F3EN ,Third function on pin PIO0_16" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PIO0_16_PUENB ,Pull-up on pin PIO0_16" "Enabled,Disabled"
|
|
line.long 0x0C "MR3,IO Configuration Mode Register 3"
|
|
bitfld.long 0x0C 7. " PIO0_25_F3EN ,Third function on pin PIO0_25" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " PIO0_24_F3EN ,Third function on pin PIO0_24" "Disabled,Enabled"
|
|
line.long 0x10 "MR4,IO Configuration Mode Register 4"
|
|
bitfld.long 0x10 31. " PIO1_7_F3EN ,Third function on pin PIO1_7" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " PIO1_6_F3EN ,Third function on pin PIO1_6" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " PIO1_5_F3EN ,Third function on pin PIO1_5" "Disabled,Enabled"
|
|
bitfld.long 0x10 19. " PIO1_4_F3EN ,Third function on pin PIO1_4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " PIO1_3_F3EN ,Third function on pin PIO1_3" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " PIO1_2_F3EN ,Third function on pin PIO1_2" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " PIO1_1_F3EN ,Third function on pin PIO1_1" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " PIO1_0_F3EN ,Third function on pin PIO1_0" "Disabled,Enabled"
|
|
line.long 0x14 "MR5,IO Configuration Mode Register 5"
|
|
bitfld.long 0x14 31. " PIO1_15_F3EN ,Third function on pin PIO1_15" "Disabled,Enabled"
|
|
bitfld.long 0x14 27. " PIO1_14_F3EN ,Third function on pin PIO1_14" "Disabled,Enabled"
|
|
bitfld.long 0x14 23. " PIO1_13_F3EN ,Third function on pin PIO1_13" "Disabled,Enabled"
|
|
bitfld.long 0x14 19. " PIO1_12_F3EN ,Third function on pin PIO1_12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 15. " PIO1_11_F3EN ,Third function on pin PIO1_11" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " PIO1_10_F3EN ,Third function on pin PIO1_10" "Disabled,Enabled"
|
|
bitfld.long 0x14 7. " PIO1_9_F3EN ,Third function on pin PIO1_9" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " PIO1_8_F3EN ,Third function on pin PIO1_8" "Disabled,Enabled"
|
|
line.long 0x18 "MR6,IO Configuration Mode Register 6"
|
|
bitfld.long 0x18 31. " PIO1_23_F3EN ,Third function on pin PIO1_23" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " PIO1_22_F3EN ,Third function on pin PIO1_22" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " PIO1_21_F3EN ,Third function on pin PIO1_21" "Disabled,Enabled"
|
|
bitfld.long 0x18 19. " PIO1_20_F3EN ,Third function on pin PIO1_20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 15. " PIO1_19_F3EN ,Third function on pin PIO1_19" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " PIO1_18_F3EN ,Third function on pin PIO1_18" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " PIO1_17_F3EN ,Third function on pin PIO1_17" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " PIO1_16_F3EN ,Third function on pin PIO1_16" "Disabled,Enabled"
|
|
line.long 0x1C "MR7,IO Configuration Mode Register 7"
|
|
bitfld.long 0x1c 31. " PIO1_31_F3EN ,Third function on pin PIO1_31" "Disabled,Enabled"
|
|
bitfld.long 0x1c 27. " PIO1_30_F3EN ,Third function on pin PIO1_30" "Disabled,Enabled"
|
|
bitfld.long 0x1c 23. " PIO1_29_F3EN ,Third function on pin PIO1_29" "Disabled,Enabled"
|
|
bitfld.long 0x1c 19. " PIO1_28_F3EN ,Third function on pin PIO1_28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x1c 15. " PIO1_27_F3EN ,Third function on pin PIO1_27" "Disabled,Enabled"
|
|
bitfld.long 0x1c 11. " PIO1_26_F3EN ,Third function on pin PIO1_26" "Disabled,Enabled"
|
|
bitfld.long 0x1c 7. " PIO1_25_F3EN ,Third function on pin PIO1_25" "Disabled,Enabled"
|
|
bitfld.long 0x1c 3. " PIO1_24_F3EN ,Third function on pin PIO1_24" "Disabled,Enabled"
|
|
group.long 0x20++0x1B
|
|
line.long 0x00 "MR8,IO Configuration Mode Register 8"
|
|
bitfld.long 0x00 31. " PIO2_7_F3EN ,Third function on pin PIO2_7" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PIO2_6_F3EN ,Third function on pin PIO2_6" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PIO2_5_F3EN ,Third function on pin PIO2_5" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PIO2_4_F3EN ,Third function on pin PIO2_4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIO2_3_F3EN ,Third function on pin PIO2_3" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PIO2_2_F3EN ,Third function on pin PIO2_2" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PIO2_1_F3EN ,Third function on pin PIO2_1" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PIO2_0_F3EN ,Third function on pin PIO2_0" "Disabled,Enabled"
|
|
line.long 0x04 "MR9,IO Configuration Mode Register 9"
|
|
bitfld.long 0x04 31. " PIO2_15_F3EN ,Third function on pin PIO2_15" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " PIO2_14_F3EN ,Third function on pin PIO2_14" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " PIO2_13_F3EN ,Third function on pin PIO2_13" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " PIO2_12_F3EN ,Third function on pin PIO2_12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PIO2_11_F3EN ,Third function on pin PIO2_11" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " PIO2_10_F3EN ,Third function on pin PIO2_10" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PIO2_9_F3EN ,Third function on pin PIO2_9" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " PIO2_8_F3EN ,Third function on pin PIO2_8" "Disabled,Enabled"
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MR15,Wake-Up Interrupt Selection Register"
|
|
bitfld.long 0x00 24.--28. " STOP_WU3[4:0] ,External wake up interrupt 3 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 16.--20. " STOP_WU2[4:0] ,External wake up interrupt 2 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 8.--12. " STOP_WU1[4:0] ,External wake up interrupt 1 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 0.--4. " STOP_WU0[4:0] ,External wake up interrupt 0 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ19,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
line.long 0x04 "MR16,LVD Reset and Interrupt Enable Register"
|
|
bitfld.long 0x04 1. " LVD_INT_EN ,Low Voltage Detector Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LVD_RST_EN ,Low Voltage Detector reset" "Disabled,Enabled"
|
|
width 11.
|
|
elif (cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
width 6.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MR0,IO Configuration Mode Register 0"
|
|
bitfld.long 0x00 28. " PIO0_7_PUENB ,Pull-up on pin PIO0_7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PIO0_6_PUENB ,Pull-up on pin PIO0_6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PIO0_5_PUENB ,Pull-up on pin PIO0_5" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PIO0_4_PUENB ,Pull-up on pin PIO0_4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIO0_3_F3EN ,Third function on pin PIO0_3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PIO0_3_PUENB ,Pull-up on pin PIO0_3" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " PIO0_2_F3EN ,Third function on pin PIO0_2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PIO0_2_PUENB ,Pull-up on pin PIO0_2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PIO0_1_PUENB ,Pull-up on pin PIO0_1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PIO0_0_PUENB ,Pull-up on pin PIO0_0" "Enabled,Disabled"
|
|
line.long 0x04 "MR1,IO Configuration Mode Register 1"
|
|
bitfld.long 0x04 31. " PIO0_15_F3EN ,Third function on pin PIO0_15" "Disabled,Enabled"
|
|
bitfld.long 0x04 28. " PIO0_15_PUENB ,Pull-up on pin PIO0_15" "Enabled,Disabled"
|
|
bitfld.long 0x04 27. " PIO0_14_F3EN ,Third function on pin PIO0_14" "Disabled,Enabled"
|
|
bitfld.long 0x04 24. " PIO0_14_PUENB ,Pull-up on pin PIO0_14" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 23. " PIO0_13_F3EN ,Third function on pin PIO0_13" "Disabled,Enabled"
|
|
bitfld.long 0x04 20. " PIO0_13_PUENB ,Pull-up on pin PIO0_13" "Enabled,Disabled"
|
|
bitfld.long 0x04 19. " PIO0_12_F3EN ,Third function on pin PIO0_12" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " PIO0_12_PUENB ,Pull-up on pin PIO0_12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PIO0_11_F3EN ,Third function on pin PIO0_11" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " PIO0_11_PUENB ,Pull-up on pin PIO0_11" "Enabled,Disabled"
|
|
bitfld.long 0x04 11. " PIO0_10_F3EN ,Third function on pin PIO0_10" "Disabled,Enabled"
|
|
bitfld.long 0x04 8. " PIO0_10_PUENB ,Pull-up on pin PIO0_710" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 7. " PIO0_9_F3EN ,Third function on pin PIO0_9" "Disabled,Enabled"
|
|
bitfld.long 0x04 4. " PIO0_9_PUENB ,Pull-up on pin PIO0_9" "Enabled,Disabled"
|
|
bitfld.long 0x04 3. " PIO0_8_F3EN ,Third function on pin PIO0_8" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " PIO0_8_PUENB ,Pull-up on pin PIO0_8" "Enabled,Disabled"
|
|
line.long 0x08 "MR2,IO Configuration Mode Register 2"
|
|
bitfld.long 0x08 27. " PIO0_22_F3EN ,Third function on pin PIO0_22" "Disabled,Enabled"
|
|
bitfld.long 0x08 24. " PIO0_22_PUENB ,Pull-up on pin PIO0_22" "Enabled,Disabled"
|
|
bitfld.long 0x08 23. " PIO0_21_F3EN ,Third function on pin PIO0_21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20. " PIO0_21_PUENB ,Pull-up 21" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 19. " PIO0_20_F3EN ,Third function on pin PIO0_20" "Disabled,Enabled"
|
|
bitfld.long 0x08 16. " PIO0_20_PUENB ,Pull-up on pin PIO0_20" "Enabled,Disabled"
|
|
bitfld.long 0x08 15. " PIO0_19_F3EN ,Third function on pin PIO0_19" "Disabled,Enabled"
|
|
bitfld.long 0x08 12. " PIO0_19_PUENB ,Pull-up on pin PIO0_19" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " PIO0_18_F3EN ,Third function on pin PIO0_18" "Disabled,Enabled"
|
|
bitfld.long 0x08 8. " PIO0_18_PUENB ,Pull-up on pin PIO0_18" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " PIO0_17_F3EN ,Third function on pin PIO0_17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " PIO0_17_PUENB ,Pull-up on pin PIO0_17" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " PIO0_16_F3EN ,Third function on pin PIO0_16" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PIO0_16_PUENB ,Pull-up on pin PIO0_16" "Enabled,Disabled"
|
|
line.long 0x0C "MR3,IO Configuration Mode Register 3"
|
|
bitfld.long 0x0C 28. " PIO1_7_PUENB ,Pull-up on pin PIO1_7" "Enabled,Disabled"
|
|
bitfld.long 0x0C 24. " PIO1_6_PUENB ,Pull-up on pin PIO1_6" "Enabled,Disabled"
|
|
bitfld.long 0x0C 23. " PIO1_5_F3EN ,Third function on pin PIO1_5" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " PIO1_5_PUENB ,Pull-up on pin PIO1_5" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " PIO1_4_F3EN ,Third function on pin PIO1_4" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " PIO1_4_PUENB ,Pull-up on pin PIO1_4" "Enabled,Disabled"
|
|
bitfld.long 0x0C 15. " PIO1_3_F3EN ,Third function on pin PIO1_3" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " PIO1_3_PUENB ,Pull-up on pin PIO1_3" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " PIO1_2_F3EN ,Third function on pin PIO1_2" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " PIO1_2_PUENB ,Pull-up on pin PIO1_2" "Enabled,Disabled"
|
|
bitfld.long 0x0C 7. " PIO1_1_F3EN ,Third function on pin PIO1_1" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " PIO1_1_PUENB ,Pull-up on pin PIO1_1" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " PIO1_0_F3EN ,Third function on pin PIO1_0" "Disabled,Enabled"
|
|
bitfld.long 0x0C 0. " PIO1_0_PUENB ,Pull-up on pin PIO1_0" "Enabled,Disabled"
|
|
line.long 0x10 "MR4,IO Configuration Mode Register 4"
|
|
bitfld.long 0x10 15. " PIO1_11_F3EN ,Third function on pin PIO1_11" "Disabled,Enabled"
|
|
bitfld.long 0x10 12. " PIO1_11_PUENB ,Pull-up on pin PIO1_11" "Enabled,Disabled"
|
|
bitfld.long 0x10 11. " PIO1_10_F3EN ,Third function on pin PIO1_10" "Disabled,Enabled"
|
|
bitfld.long 0x10 8. " PIO1_10_PUENB ,Pull-up on pin PIO1_10" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 4. " PIO1_9_PUENB ,Pull-up on pin PIO1_9" "Enabled,Disabled"
|
|
bitfld.long 0x10 0. " PIO1_8_PUENB ,Pull-up on pin PIO1_8" "Enabled,Disabled"
|
|
line.long 0x14 "MR5,IO Configuration Mode Register 5"
|
|
bitfld.long 0x14 31. " PIO1_19_F3EN ,Third function on pin PIO1_19" "Disabled,Enabled"
|
|
bitfld.long 0x14 27. " PIO1_18_F3EN ,Third function on pin PIO1_18" "Disabled,Enabled"
|
|
bitfld.long 0x14 23. " PIO1_17_F3EN ,Third function on pin PIO1_17" "Disabled,Enabled"
|
|
bitfld.long 0x14 19. " PIO1_16_F3EN ,Third function on pin PIO1_16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 15. " PIO1_15_F3EN ,Third function on pin PIO1_15" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " PIO1_14_F3EN ,Third function on pin PIO1_14" "Disabled,Enabled"
|
|
bitfld.long 0x14 7. " PIO1_13_F3EN ,Third function on pin PIO1_13" "Disabled,Enabled"
|
|
bitfld.long 0x14 3. " PIO1_12_F3EN ,Third function on pin PIO1_12" "Disabled,Enabled"
|
|
line.long 0x18 "MR6,IO Configuration Mode Register 6"
|
|
bitfld.long 0x18 31. " PIO1_27_F3EN ,Third function on pin PIO1_27" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " PIO1_26_F3EN ,Third function on pin PIO1_26" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " PIO1_25_F3EN ,Third function on pin PIO1_25" "Disabled,Enabled"
|
|
bitfld.long 0x18 19. " PIO1_24_F3EN ,Third function on pin PIO1_24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 15. " PIO1_23_F3EN ,Third function on pin PIO1_23" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " PIO1_22_F3EN ,Third function on pin PIO1_22" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " PIO1_21_F3EN ,Third function on pin PIO1_21" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " PIO1_20_F3EN ,Third function on pin PIO1_20" "Disabled,Enabled"
|
|
line.long 0x1C "MR7,IO Configuration Mode Register 7"
|
|
bitfld.long 0x1C 15. " PIO1_31_F3EN ,Third function on pin PIO1_31" "Disabled,Enabled"
|
|
bitfld.long 0x1C 11. " PIO1_30_F3EN ,Third function on pin PIO1_30" "Disabled,Enabled"
|
|
bitfld.long 0x1C 7. " PIO1_29_F3EN ,Third function on pin PIO1_29" "Disabled,Enabled"
|
|
bitfld.long 0x1C 3. " PIO1_28_F3EN ,Third function on pin PIO1_28" "Disabled,Enabled"
|
|
group.long 0x20++0x1B
|
|
line.long 0x00 "MR8,IO Configuration Mode Register 8"
|
|
bitfld.long 0x00 31. " PIO2_7_F3EN ,Third function on pin PIO2_7" "Disabled,Enabled"
|
|
bitfld.long 0x00 27. " PIO2_6_F3EN ,Third function on pin PIO2_6" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " PIO2_5_F3EN ,Third function on pin PIO2_5" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " PIO2_4_F3EN ,Third function on pin PIO2_4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIO2_3_F3EN ,Third function on pin PIO2_3" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " PIO2_2_F3EN ,Third function on pin PIO2_2" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " PIO2_1_F3EN ,Third function on pin PIO2_1" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PIO2_0_F3EN ,Third function on pin PIO2_0" "Disabled,Enabled"
|
|
line.long 0x04 "MR9,IO Configuration Mode Register 9"
|
|
bitfld.long 0x04 31. " PIO2_15_F3EN ,Third function on pin PIO2_15" "Disabled,Enabled"
|
|
bitfld.long 0x04 27. " PIO2_14_F3EN ,Third function on pin PIO2_14" "Disabled,Enabled"
|
|
bitfld.long 0x04 23. " PIO2_13_F3EN ,Third function on pin PIO2_13" "Disabled,Enabled"
|
|
bitfld.long 0x04 19. " PIO2_12_F3EN ,Third function on pin PIO2_12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " PIO2_11_F3EN ,Third function on pin PIO2_11" "Disabled,Enabled"
|
|
bitfld.long 0x04 11. " PIO2_10_F3EN ,Third function on pin PIO2_10" "Disabled,Enabled"
|
|
bitfld.long 0x04 7. " PIO2_9_F3EN ,Third function on pin PIO2_9" "Disabled,Enabled"
|
|
bitfld.long 0x04 3. " PIO2_8_F3EN ,Third function on pin PIO2_8" "Disabled,Enabled"
|
|
line.long 0x08 "MR10,IO Configuration Mode Register 10"
|
|
bitfld.long 0x08 31. " PIO2_23_F3EN ,Third function on pin PIO2_23" "Disabled,Enabled"
|
|
bitfld.long 0x08 27. " PIO2_22_F3EN ,Third function on pin PIO2_22" "Disabled,Enabled"
|
|
bitfld.long 0x08 23. " PIO2_21_F3EN ,Third function on pin PIO2_21" "Disabled,Enabled"
|
|
bitfld.long 0x08 19. " PIO2_20_F3EN ,Third function on pin PIO2_20" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 15. " PIO2_19_F3EN ,Third function on pin PIO2_19" "Disabled,Enabled"
|
|
bitfld.long 0x08 11. " PIO2_18_F3EN ,Third function on pin PIO2_18" "Disabled,Enabled"
|
|
bitfld.long 0x08 7. " PIO2_17_F3EN ,Third function on pin PIO2_17" "Disabled,Enabled"
|
|
bitfld.long 0x08 3. " PIO2_16_F3EN ,Third function on pin PIO2_16" "Disabled,Enabled"
|
|
line.long 0x0C "MR11,IO Configuration Mode Register 11"
|
|
bitfld.long 0x0C 31. " PIO3_7_F3EN ,Third function on pin PIO3_7" "Disabled,Enabled"
|
|
bitfld.long 0x0C 27. " PIO3_6_F3EN ,Third function on pin PIO3_6" "Disabled,Enabled"
|
|
bitfld.long 0x0C 23. " PIO3_5_F3EN ,Third function on pin PIO3_5" "Disabled,Enabled"
|
|
bitfld.long 0x0C 19. " PIO3_4_F3EN ,Third function on pin PIO3_4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PIO3_3_F3EN ,Third function on pin PIO3_3" "Disabled,Enabled"
|
|
bitfld.long 0x0C 11. " PIO3_2_F3EN ,Third function on pin PIO3_2" "Disabled,Enabled"
|
|
bitfld.long 0x0C 7. " PIO3_1_F3EN ,Third function on pin PIO3_1" "Disabled,Enabled"
|
|
bitfld.long 0x0C 3. " PIO3_0_F3EN ,Third function on pin PIO3_0" "Disabled,Enabled"
|
|
line.long 0x10 "MR12,IO Configuration Mode Register 12"
|
|
bitfld.long 0x10 31. " PIO3_15_F3EN ,Third function on pin PIO2_15" "Disabled,Enabled"
|
|
bitfld.long 0x10 27. " PIO3_14_F3EN ,Third function on pin PIO2_14" "Disabled,Enabled"
|
|
bitfld.long 0x10 23. " PIO3_13_F3EN ,Third function on pin PIO2_13" "Disabled,Enabled"
|
|
bitfld.long 0x10 19. " PIO3_12_F3EN ,Third function on pin PIO2_12" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 15. " PIO3_11_F3EN ,Third function on pin PIO2_11" "Disabled,Enabled"
|
|
bitfld.long 0x10 11. " PIO3_10_F3EN ,Third function on pin PIO2_10" "Disabled,Enabled"
|
|
bitfld.long 0x10 7. " PIO3_9_F3EN ,Third function on pin PIO2_9" "Disabled,Enabled"
|
|
bitfld.long 0x10 3. " PIO3_8_F3EN ,Third function on pin PIO2_8" "Disabled,Enabled"
|
|
line.long 0x14 "MR13,IO Configuration Mode Register 13"
|
|
bitfld.long 0x14 31. " PIO3_23_F3EN ,Third function on pin PIO3_23" "Disabled,Enabled"
|
|
bitfld.long 0x14 30. " PIO3_23_DH ,Current on pin PIO3_23" "2mA,30mA"
|
|
bitfld.long 0x14 28. " PIO3_23_PUENB ,Pull-up on pin PIO3_23" "Enabled,Disabled"
|
|
bitfld.long 0x14 27. " PIO3_22_F3EN ,Third function on pin PIO3_22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 26. " PIO3_22_DH ,Current on pin PIO3_22" "2mA,30mA"
|
|
bitfld.long 0x14 24. " PIO3_22_PUENB ,Pull-up on pin PIO3_22" "Enabled,Disabled"
|
|
bitfld.long 0x14 23. " PIO3_21_F3EN ,Third function on pin PIO3_21" "Disabled,Enabled"
|
|
bitfld.long 0x14 22. " PIO3_21_DH ,Current on pin PIO3_21" "2mA,30mA"
|
|
textline " "
|
|
bitfld.long 0x14 20. " PIO3_21_PUENB ,Pull-up on pin PIO3_21" "Enabled,Disabled"
|
|
bitfld.long 0x14 19. " PIO3_20_F3EN ,Third function on pin PIO3_20" "Disabled,Enabled"
|
|
bitfld.long 0x14 18. " PIO3_20_DH ,Current on pin PIO3_20" "2mA,30mA"
|
|
bitfld.long 0x14 16. " PIO3_20_PUENB ,Pull-up on pin PIO3_20" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x14 15. " PIO3_19_F3EN ,Third function on pin PIO3_19" "Disabled,Enabled"
|
|
bitfld.long 0x14 14. " PIO3_19_DH ,Current on pin PIO3_19" "2mA,30mA"
|
|
bitfld.long 0x14 12. " PIO3_19_PUENB ,Pull-up on pin PIO3_19" "Enabled,Disabled"
|
|
bitfld.long 0x14 11. " PIO3_18_F3EN ,Third function on pin PIO3_18" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 10. " PIO3_18_DH ,Current on pin PIO3_18" "2mA,30mA"
|
|
bitfld.long 0x14 8. " PIO3_18_PUENB ,Pull-up on pin PIO3_18" "Enabled,Disabled"
|
|
bitfld.long 0x14 7. " PIO3_17_F3EN ,Third function on pin PIO3_17" "Disabled,Enabled"
|
|
bitfld.long 0x14 6. " PIO3_17_DH ,Current on pin PIO3_17" "2mA,30mA"
|
|
textline " "
|
|
bitfld.long 0x14 4. " PIO3_17_PUENB ,Pull-up on pin PIO3_17" "Enabled,Disabled"
|
|
bitfld.long 0x14 3. " PIO3_16_F3EN ,Third function on pin PIO3_16" "Disabled,Enabled"
|
|
bitfld.long 0x14 2. " PIO3_16_DH ,Current on pin PIO3_16" "2mA,30mA"
|
|
bitfld.long 0x14 0. " PIO3_16_PUENB ,Pull-up on pin PIO3_16" "Enabled,Disabled"
|
|
line.long 0x18 "MR14,IO Configuration Mode Register 14"
|
|
bitfld.long 0x18 31. " PIO3_31_F3EN ,Third function on pin PIO3_31" "Disabled,Enabled"
|
|
bitfld.long 0x18 30. " PIO3_31_DH ,Current on pin PIO3_31" "2mA,30mA"
|
|
bitfld.long 0x18 28. " PIO3_31_PUENB ,Pull-up on pin PIO3_31" "Enabled,Disabled"
|
|
bitfld.long 0x18 27. " PIO3_30_F3EN ,Third function on pin PIO3_30" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 26. " PIO3_30_DH ,Current on pin PIO3_30" "2mA,30mA"
|
|
bitfld.long 0x18 24. " PIO3_30_PUENB ,Pull-up on pin PIO3_30" "Enabled,Disabled"
|
|
bitfld.long 0x18 23. " PIO3_29_F3EN ,Third function on pin PIO3_29" "Disabled,Enabled"
|
|
bitfld.long 0x18 22. " PIO3_29_DH ,Current on pin PIO3_29" "2mA,30mA"
|
|
textline " "
|
|
bitfld.long 0x18 20. " PIO3_29_PUENB ,Pull-up on pin PIO3_29" "Enabled,Disabled"
|
|
bitfld.long 0x18 19. " PIO3_28_F3EN ,Third function on pin PIO3_28" "Disabled,Enabled"
|
|
bitfld.long 0x18 18. " PIO3_28_DH ,Current on pin PIO3_28" "2mA,30mA"
|
|
bitfld.long 0x18 16. " PIO3_28_PUENB ,Pull-up on pin PIO3_28" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x18 15. " PIO3_27_F3EN ,Third function on pin PIO3_27" "Disabled,Enabled"
|
|
bitfld.long 0x18 14. " PIO3_27_DH ,Current on pin PIO3_27" "2mA,30mA"
|
|
bitfld.long 0x18 12. " PIO3_27_PUENB ,Pull-up on pin PIO3_27" "Enabled,Disabled"
|
|
bitfld.long 0x18 11. " PIO3_26_F3EN ,Third function on pin PIO3_26" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 10. " PIO3_26_DH ,Current on pin PIO3_26" "2mA,30mA"
|
|
bitfld.long 0x18 8. " PIO3_26_PUENB ,Pull-up on pin PIO3_26" "Enabled,Disabled"
|
|
bitfld.long 0x18 7. " PIO3_25_F3EN ,Third function on pin PIO3_25" "Disabled,Enabled"
|
|
bitfld.long 0x18 6. " PIO3_25_DH ,Current on pin PIO3_25" "2mA,30mA"
|
|
textline " "
|
|
bitfld.long 0x18 4. " PIO3_25_PUENB ,Pull-up on pin PIO3_25" "Enabled,Disabled"
|
|
bitfld.long 0x18 3. " PIO3_24_F3EN ,Third function on pin PIO3_24" "Disabled,Enabled"
|
|
bitfld.long 0x18 2. " PIO3_24_DH ,Current on pin PIO3_24" "2mA,30mA"
|
|
bitfld.long 0x18 0. " PIO3_24_PUENB ,Pull-up on pin PIO3_24" "Enabled,Disabled"
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MR15,Wake-Up Interrupt Selection Register"
|
|
bitfld.long 0x00 24.--28. " STOP_WU3[4:0] ,External wake up interrupt 3 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 16.--20. " STOP_WU2[4:0] ,External wake up interrupt 2 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 8.--12. " STOP_WU1[4:0] ,External wake up interrupt 1 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 0.--4. " STOP_WU0[4:0] ,External wake up interrupt 0 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
line.long 0x04 "MR16,LVD Reset and Interrupt Enable Register"
|
|
bitfld.long 0x04 1. " LVD_INT_EN ,Low Voltage Detector Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LVD_RST_EN ,Low Voltage Detector reset" "Disabled,Enabled"
|
|
width 11.
|
|
else
|
|
width 6.
|
|
group.long 0x00++0x1F
|
|
line.long 0x00 "MR0,IO Configuration Mode Register 0"
|
|
bitfld.long 0x00 28. " PIO0_7_PUENB ,Pull-up on pin PIO0_7" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " PIO0_6_PUENB ,Pull-up on pin PIO0_6" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " PIO0_5_PUENB ,Pull-up on pin PIO0_5" "Enabled,Disabled"
|
|
bitfld.long 0x00 16. " PIO0_4_PUENB ,Pull-up on pin PIO0_4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " PIO0_3_F3EN ,Third function on pin PIO0_3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " PIO0_3_PUENB ,Pull-up on pin PIO0_3" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " PIO0_2_F3EN ,Third function on pin PIO0_2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PIO0_2_PUENB ,Pull-up on pin PIO0_2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PIO0_1_F3EN ,Third function on pin PIO0_1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " PIO0_1_PUENB ,Pull-up on pin PIO0_1" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " PIO0_0_PUENB ,Pull-up on pin PIO0_0" "Enabled,Disabled"
|
|
line.long 0x04 "MR1,IO Configuration Mode Register 1"
|
|
bitfld.long 0x04 28. " PIO0_15_PUENB ,Pull-up on pin PIO0_15" "Enabled,Disabled"
|
|
bitfld.long 0x04 24. " PIO0_14_PUENB ,Pull-up on pin PIO0_14" "Enabled,Disabled"
|
|
bitfld.long 0x04 20. " PIO0_13_PUENB ,Pull-up on pin PIO0_13" "Enabled,Disabled"
|
|
bitfld.long 0x04 16. " PIO0_12_PUENB ,Pull-up on pin PIO0_12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 12. " PIO0_11_PUENB ,Pull-up on pin PIO0_11" "Enabled,Disabled"
|
|
bitfld.long 0x04 8. " PIO0_10_PUENB ,Pull-up on pin PIO0_710" "Enabled,Disabled"
|
|
bitfld.long 0x04 4. " PIO0_9_PUENB ,Pull-up on pin PIO0_9" "Enabled,Disabled"
|
|
bitfld.long 0x04 0. " PIO0_8_PUENB ,Pull-up on pin PIO0_8" "Enabled,Disabled"
|
|
line.long 0x08 "MR2,IO Configuration Mode Register 2"
|
|
bitfld.long 0x08 28. " PIO0_23_PUENB ,Pull-up on pin PIO0_23" "Enabled,Disabled"
|
|
bitfld.long 0x08 24. " PIO0_22_PUENB ,Pull-up on pin PIO0_22" "Enabled,Disabled"
|
|
bitfld.long 0x08 20. " PIO0_21_PUENB ,Pull-up 21" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 16. " PIO0_20_PUENB ,Pull-up on pin PIO0_20" "Enabled,Disabled"
|
|
bitfld.long 0x08 12. " PIO0_19_PUENB ,Pull-up on pin PIO0_19" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " PIO0_18_PUENB ,Pull-up on pin PIO0_18" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " PIO0_17_F3EN ,Third function on pin PIO0_17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4. " PIO0_17_PUENB ,Pull-up on pin PIO0_17" "Enabled,Disabled"
|
|
bitfld.long 0x08 3. " PIO0_16_F3EN ,Third function on pin PIO0_16" "Disabled,Enabled"
|
|
bitfld.long 0x08 0. " PIO0_16_PUENB ,Pull-up on pin PIO0_16" "Enabled,Disabled"
|
|
line.long 0x0C "MR3,IO Configuration Mode Register 3"
|
|
bitfld.long 0x0C 28. " PIO0_31_PUENB ,Pull-up on pin PIO0_31" "Disabled,Enabled"
|
|
bitfld.long 0x0C 24. " PIO0_30_PUENB ,Pull-up on pin PIO0_30" "Disabled,Enabled"
|
|
bitfld.long 0x0C 20. " PIO0_29_PUENB ,Pull-up on pin PIO0_29" "Disabled,Enabled"
|
|
bitfld.long 0x0C 16. " PIO0_28_PUENB ,Pull-up on pin PIO0_28" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " PIO0_27_F3EN ,Third function on pin PIO0_27" "Disabled,Enabled"
|
|
bitfld.long 0x0C 12. " PIO0_27_PUENB ,Pull-up on pin PIO0_27" "Enabled,Disabled"
|
|
bitfld.long 0x0C 11. " PIO0_26_F3EN ,Third function on pin PIO0_26" "Disabled,Enabled"
|
|
bitfld.long 0x0C 8. " PIO0_26_PUENB ,Pull-up on pin PIO0_26" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " PIO0_25_F3EN ,Third function on pin PIO0_25" "Disabled,Enabled"
|
|
bitfld.long 0x0C 4. " PIO0_25_PUENB ,Pull-up on pin PIO0_25" "Enabled,Disabled"
|
|
bitfld.long 0x0C 0. " PIO0_24_PUENB ,Pull-up on pin PIO0_24" "Enabled,Disabled"
|
|
line.long 0x10 "MR4,IO Configuration Mode Register 4"
|
|
bitfld.long 0x10 28. " PIO1_7_PUENB ,Pull-up on pin PIO1_7" "Enabled,Disabled"
|
|
bitfld.long 0x10 24. " PIO1_6_PUENB ,Pull-up on pin PIO1_6" "Enabled,Disabled"
|
|
bitfld.long 0x10 20. " PIO1_5_PUENB ,Pull-up on pin PIO1_5" "Enabled,Disabled"
|
|
bitfld.long 0x10 16. " PIO1_4_PUENB ,Pull-up on pin PIO1_4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x10 12. " PIO1_3_PUENB ,Pull-up on pin PIO1_3" "Enabled,Disabled"
|
|
bitfld.long 0x10 8. " PIO1_2_PUENB ,Pull-up on pin PIO1_2" "Enabled,Disabled"
|
|
bitfld.long 0x10 4. " PIO1_1_PUENB ,Pull-up on pin PIO1_1" "Enabled,Disabled"
|
|
bitfld.long 0x10 0. " PIO1_0_PUENB ,Pull-up on pin PIO1_0" "Enabled,Disabled"
|
|
line.long 0x14 "MR5,IO Configuration Mode Register 5"
|
|
bitfld.long 0x14 31. " PIO1_15_F3EN ,Third function on pin PIO1_15" "Disabled,Enabled"
|
|
bitfld.long 0x14 27. " PIO1_14_F3EN ,Third function on pin PIO1_14" "Disabled,Enabled"
|
|
bitfld.long 0x14 23. " PIO1_13_F3EN ,Third function on pin PIO1_13" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 19. " PIO1_12_F3EN ,Third function on pin PIO1_12" "Disabled,Enabled"
|
|
bitfld.long 0x14 15. " PIO1_11_F3EN ,Third function on pin PIO1_11" "Disabled,Enabled"
|
|
bitfld.long 0x14 11. " PIO1_10_F3EN ,Third function on pin PIO1_10" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x14 8. " PIO1_10_PUENB ,Pull-up on pin PIO1_10" "Enabled,Disabled"
|
|
bitfld.long 0x14 4. " PIO1_9_PUENB ,Pull-up on pin PIO1_9" "Enabled,Disabled"
|
|
bitfld.long 0x14 0. " PIO1_8_PUENB ,Pull-up on pin PIO1_8" "Enabled,Disabled"
|
|
line.long 0x18 "MR6,IO Configuration Mode Register 6"
|
|
bitfld.long 0x18 31. " PIO1_23_F3EN ,Third function on pin PIO1_27" "Disabled,Enabled"
|
|
bitfld.long 0x18 27. " PIO1_22_F3EN ,Third function on pin PIO1_26" "Disabled,Enabled"
|
|
bitfld.long 0x18 23. " PIO1_21_F3EN ,Third function on pin PIO1_25" "Disabled,Enabled"
|
|
bitfld.long 0x18 19. " PIO1_20_F3EN ,Third function on pin PIO1_24" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x18 15. " PIO1_19_F3EN ,Third function on pin PIO1_23" "Disabled,Enabled"
|
|
bitfld.long 0x18 11. " PIO1_18_F3EN ,Third function on pin PIO1_22" "Disabled,Enabled"
|
|
bitfld.long 0x18 7. " PIO1_17_F3EN ,Third function on pin PIO1_21" "Disabled,Enabled"
|
|
bitfld.long 0x18 3. " PIO1_16_F3EN ,Third function on pin PIO1_20" "Disabled,Enabled"
|
|
line.long 0x1C "MR7,IO Configuration Mode Register 7"
|
|
bitfld.long 0x1C 11. " PIO1_36_F3EN ,Third function on pin PIO1_30" "Disabled,Enabled"
|
|
bitfld.long 0x1C 7. " PIO1_25_F3EN ,Third function on pin PIO1_29" "Disabled,Enabled"
|
|
bitfld.long 0x1C 3. " PIO1_24_F3EN ,Third function on pin PIO1_28" "Disabled,Enabled"
|
|
group.long 0x3C++0x07
|
|
line.long 0x00 "MR15,Wake-Up Interrupt Selection Register"
|
|
bitfld.long 0x00 24.--28. " STOP_WU3[4:0] ,External wake up interrupt 3 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 16.--20. " STOP_WU2[4:0] ,External wake up interrupt 2 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 8.--12. " STOP_WU1[4:0] ,External wake up interrupt 1 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
bitfld.long 0x00 0.--4. " STOP_WU0[4:0] ,External wake up interrupt 0 selection" "IRQ0,IRQ1,IRQ2,IRQ3,IRQ4,IRQ5,IRQ6,IRQ7,IRQ8,IRQ9,IRQ10,IRQ11,IRQ12,IRQ13,IRQ14,IRQ15,IRQ16,IRQ17,IRQ18,IRQ29,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected,Not selected"
|
|
line.long 0x04 "MR16,LVD Reset and Interrupt Enable Register"
|
|
bitfld.long 0x04 1. " LVD_INT_EN ,Low Voltage Detector Interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " LVD_RST_EN ,Low Voltage Detector reset" "Disabled,Enabled"
|
|
width 11.
|
|
endif
|
|
tree.end
|
|
tree "I2C (Inter-Integrated Circuit)"
|
|
tree "I2C0"
|
|
base ad:0xFFE50000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "I2C0_PMSR,I2C0 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Disabled,Enabled"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " I2C0 ,I2C0 clock" "Disabled,Enabled"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "I2C0_CR,I2C0 Control Register"
|
|
bitfld.long 0x00 8. " ENA ,I2C0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SI ,I2C0 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " STA ,I2C0 start" "Slave mode,Master mode"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STO ,I2C0 stop" "No STOP,STOP"
|
|
bitfld.long 0x00 1. " AA ,I2C0 acknowledge" "No ACK,ACK"
|
|
bitfld.long 0x00 0. " SWRST ,I2C0 software reset" "No effect,Reset"
|
|
line.long 0x04 "I2C0_MR,I2C0 Mode Register"
|
|
bitfld.long 0x04 12. " FAST ,Fast mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x04 0.--11. 1. " PRV[11:0] ,Pre-scalar value"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "I2C0_SR,I2C0 status code"
|
|
bitfld.long 0x00 3.--7. " SR[4:0] ,I2C0 status code" "Bus error,START,REPEAT START,WRITE sent/ACK received,WRITE sent/ACK not received,Data byte sent/ACK received,Data byte sent/ACK not received,Arbitration lost,Slave and Read sent/ACK received,Slave and Read sent/ACK not received,Data byte received/ACK returned,Data byte received/No ACK returned,Own Slave address +W received/ACK returned,Arbitration lost,General Call Address received,Arbitration lost,Addressed with own address/ACK returned,Addressed with own address/ACK not returned,Addressed by general call address/ACK returned,Addressed by general call address/ACK not returned,Stop condition/repeated start condition received,Own Slave address + R received/ACK returned,Arbitration lost,Data transmitted/ACK received,Data transmitted/ACK not received,Last data transmitted,Reserved,Reserved,Reserved,Reserved,Reserved,No revelant state information"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "I2C0_IMR,I2C0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SI ,SI interrupt mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0B
|
|
line.long 0x00 "I2C0_DAT,I2C0 Serial Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAT[7:0] ,I2C data"
|
|
line.long 0x04 "I2C0_ADR,I2C0 Serial Slave Address Register"
|
|
hexmask.long.byte 0x04 1.--7. 0x02 " ADR[6:0] ,I2C0 address"
|
|
bitfld.long 0x04 0. " GC ,General call" "Disabled,Enabled"
|
|
line.long 0x08 "I2C0_THOLD,I2C0 Hold/Setup Delay Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DL[7:0] ,Hold/setup delay"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR"||cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
tree "I2C1"
|
|
base ad:0xFFE54000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "I2C1_PMSR,I2C1 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Disabled,Enabled"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " I2C1 ,I2C1 clock" "Disabled,Enabled"
|
|
group.long 0x60++0x07
|
|
line.long 0x00 "I2C1_CR,I2C1 Control Register"
|
|
bitfld.long 0x00 8. " ENA ,I2C1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SI ,I2C1 interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " STA ,I2C1 start" "Slave mode,Master mode"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STO ,I2C1 stop" "No STOP,STOP"
|
|
bitfld.long 0x00 1. " AA ,I2C1 acknowledge" "No ACK,ACK"
|
|
bitfld.long 0x00 0. " SWRST ,I2C1 software reset" "No effect,Reset"
|
|
line.long 0x04 "I2C1_MR,I2C1 Mode Register"
|
|
bitfld.long 0x04 12. " FAST ,Fast mode" "Disabled,Enabled"
|
|
hexmask.long.word 0x04 0.--11. 1. " PRV[11:0] ,Pre-scalar value"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "I2C1_SR,I2C1 status code"
|
|
bitfld.long 0x00 3.--7. " SR[4:0] ,I2C1 status code" "Bus error,START,REPEAT START,WRITE sent/ACK received,WRITE sent/ACK not received,Data byte sent/ACK received,Data byte sent/ACK not received,Arbitration lost,Slave and Read sent/ACK received,Slave and Read sent/ACK not received,Data byte received/ACK returned,Data byte received/No ACK returned,Own Slave address +W received/ACK returned,Arbitration lost,General Call Address received,Arbitration lost,Addressed with own address/ACK returned,Addressed with own address/ACK not returned,Addressed by general call address/ACK returned,Addressed by general call address/ACK not returned,Stop condition/repeated start condition received,Own Slave address + R received/ACK returned,Arbitration lost,Data transmitted/ACK received,Data transmitted/ACK not received,Last data transmitted,Reserved,Reserved,Reserved,Reserved,Reserved,No revelant state information"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "I2C1_IMR,I2C1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " SI ,SI interrupt mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0B
|
|
line.long 0x00 "I2C1_DAT,I2C1 Serial Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DAT[7:0] ,I2C data"
|
|
line.long 0x04 "I2C1_ADR,I2C1 Serial Slave Address Register"
|
|
hexmask.long.byte 0x04 1.--7. 0x02 " ADR[6:0] ,I2C1 address"
|
|
bitfld.long 0x04 0. " GC ,General call" "Disabled,Enabled"
|
|
line.long 0x08 "I2C1_THOLD,I2C1 Hold/Setup Delay Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DL[7:0] ,Hold/setup delay"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "IFC (Interleave Program Flash Memory)"
|
|
base ad:0xFFE04000
|
|
width 10.
|
|
rgroup.long 0x58++0x03
|
|
line.long 0x00 "IFC_PMSR,IFC Power Management Status Register"
|
|
hexmask.long 0x00 4.--29. 1. " IPICODE[25:0] ,IP identifier code"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "IFC_CR,IFC Control Register"
|
|
sif (cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
bitfld.long 0x00 26.--31. " SECTOR[5:0] ,Sector Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
else
|
|
bitfld.long 0x00 26.--30. " SECTOR[4:0] ,Sector Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
endif
|
|
hexmask.long.byte 0x00 8.--15. 1. " CRKEY[7:0] ,Key for the write access into the IFC_CR Register"
|
|
bitfld.long 0x00 2. " CE ,Chip Erase" "No effect,Erase"
|
|
bitfld.long 0x00 1. " SE ,Sector Erase" "No effect,Erase"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "IFC_MR,IFC Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " BA[7:0] ,Interleave Flash controller Base Address"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MRKEY[7:0] ,Key for the write access into the IFC_MR Register"
|
|
bitfld.long 0x00 7. " WPR ,Write and Erase Protection" "Allowed,Not allowed"
|
|
bitfld.long 0x00 4. " STANDEN ,Standby mode enable" "Disabled,Enabled"
|
|
sif (cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ"||cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR")
|
|
textline " "
|
|
bitfld.long 0x00 2. " SPEEDMODE ,Speed mode" "Normal mode,High speed mode"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "IFC_CSR,IFC Clear Status"
|
|
bitfld.long 0x00 2. " DACCESS ,Denied access" "No effect,Clear"
|
|
bitfld.long 0x00 1. " ENDERASE ,End of erase cycle" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ENDWR ,End of write cycle" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "IFC_SR,IFC Status Register"
|
|
bitfld.long 0x00 8. " BUSY ,Flash busy (status bit)" "Not busy,Busy"
|
|
bitfld.long 0x00 2. " DACCESS ,Denied access" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " ENDERASE ,End of chip or sector erase" "Not completed,Completed"
|
|
bitfld.long 0x00 0. " ENDWR ,End of write cycle" "Not completed,Completed"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "IFC_IMR,IFC Interrupt Mask"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DACCESS ,Denied access interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ENDERASE ,End of erase interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ENDWR ,End of write interrupt" "Disabled,Enabled"
|
|
width 11.
|
|
tree.end
|
|
tree "IRC (Internal RAM Controller)"
|
|
base ad:0xFFFF0000
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "IRC_MR,IRC Mode Register"
|
|
hexmask.long.word 0x00 20.--31. 0x10 " BA[11:0] ,Base Address"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR"||cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
tree "LCDC (LCD Controller)"
|
|
base ad:0xFFE58000
|
|
width 11.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LCD_PMSR,LCD Power Management Status Register"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " LCD ,LCD Clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "LCD_CR,LCD Control Register"
|
|
bitfld.long 0x00 31. " LCD_EN ,LCD Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " BIASCKT_SEL ,BIAS Circuit Select" "Internal,External"
|
|
bitfld.long 0x00 15. " VLCD_SEL ,VLCD Select" "External,Internal"
|
|
bitfld.long 0x00 7. " IVLC0_SEL ,VLC0 Level Select" "IVLC0=0.6 VLCD,IVLC0=VLCD"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "LCD_MR,LCD Mode Register"
|
|
bitfld.long 0x00 4.--5. " LCD_FREQ[1:0] ,LCD Frequency" "62.5 Hz,125 Hz,250 Hz,500 Hz"
|
|
bitfld.long 0x00 0.--2. " OP_MODE[2:0] ,Operating Bias and Duty Mode" "1/4 Duty;1/3 bias mode,1/3 Duty;1/3 Bias Mode,1/3 Duty;1/2 Bias Mode,1/2 Duty;1/2 Bias Mode,Static Mode,?..."
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "LCD_SR,LCD Status Register"
|
|
bitfld.long 0x00 31. " LCD_EN ,LCD Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 23. " BIASCKT_SEL ,BIAS Circuit Select" "Internal,External"
|
|
bitfld.long 0x00 15. " VLCD_SEL ,VLCD Select" "External,Internal"
|
|
bitfld.long 0x00 7. " IVLC0_SEL ,IVLC0 Level Select" "IVLC0=0.6 VLCD,IVLC0=VLCD"
|
|
group.long 0x80++0x03
|
|
line.long 0x00 "LCD_CLKDIVR,LCD_CLKDIVR"
|
|
hexmask.long.word 0x00 0.--15. 1. " DIVVAL[15:0] ,LCD Clock dividing value"
|
|
group.long 0x90++0x13
|
|
line.long 0x00 "LCD_DM0,LCD Display Memory 0 Register"
|
|
bitfld.long 0x00 31. " SEG7_COM3 ,LCD Segment7 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 30. " SEG7_COM2 ,LCD Segment7 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 29. " SEG7_COM1 ,LCD Segment7 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 28. " SEG7_COM0 ,LCD Segment7 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 27. " SEG6_COM3 ,LCD Segment6 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 26. " SEG6_COM2 ,LCD Segment6 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 25. " SEG6_COM1 ,LCD Segment6 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 24. " SEG6_COM0 ,LCD Segment6 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SEG5_COM3 ,LCD Segment5 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 22. " SEG5_COM2 ,LCD Segment5 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 21. " SEG5_COM1 ,LCD Segment5 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 20. " SEG5_COM0 ,LCD Segment5 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 19. " SEG4_COM3 ,LCD Segment4 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 18. " SEG4_COM2 ,LCD Segment4 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 17. " SEG4_COM1 ,LCD Segment4 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 16. " SEG4_COM0 ,LCD Segment4 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SEG3_COM3 ,LCD Segment3 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 14. " SEG3_COM2 ,LCD Segment3 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 13. " SEG3_COM1 ,LCD Segment3 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 12. " SEG3_COM0 ,LCD Segment3 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SEG2_COM3 ,LCD Segment2 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 10. " SEG2_COM2 ,LCD Segment2 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 9. " SEG2_COM1 ,LCD Segment2 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 8. " SEG2_COM0 ,LCD Segment2 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SEG1_COM3 ,LCD Segment1 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 6. " SEG1_COM2 ,LCD Segment1 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 5. " SEG1_COM1 ,LCD Segment1 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 4. " SEG1_COM0 ,LCD Segment1 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SEG0_COM3 ,LCD Segment0 for COM3" "Off state,On state"
|
|
bitfld.long 0x00 2. " SEG0_COM2 ,LCD Segment0 for COM2" "Off state,On state"
|
|
bitfld.long 0x00 1. " SEG0_COM1 ,LCD Segment0 for COM1" "Off state,On state"
|
|
bitfld.long 0x00 0. " SEG0_COM0 ,LCD Segment0 for COM0" "Off state,On state"
|
|
line.long 0x04 "LCD_DM1,LCD Display Memory 1 Register"
|
|
bitfld.long 0x04 31. " SEG15_COM3 ,LCD Segment15 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 30. " SEG15_COM2 ,LCD Segment15 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 29. " SEG15_COM1 ,LCD Segment15 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 28. " SEG15_COM0 ,LCD Segment15 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 27. " SEG14_COM3 ,LCD Segment14 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 26. " SEG14_COM2 ,LCD Segment14 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 25. " SEG14_COM1 ,LCD Segment14 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 24. " SEG14_COM0 ,LCD Segment14 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 23. " SEG13_COM3 ,LCD Segment13 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 22. " SEG13_COM2 ,LCD Segment13 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 21. " SEG13_COM1 ,LCD Segment13 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 20. " SEG13_COM0 ,LCD Segment13 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 19. " SEG12_COM3 ,LCD Segment12 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 18. " SEG12_COM2 ,LCD Segment12 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 17. " SEG12_COM1 ,LCD Segment12 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 16. " SEG12_COM0 ,LCD Segment12 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 15. " SEG11_COM3 ,LCD Segment11 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 14. " SEG11_COM2 ,LCD Segment11 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 13. " SEG11_COM1 ,LCD Segment11 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 12. " SEG11_COM0 ,LCD Segment11 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 11. " SEG10_COM3 ,LCD Segment10 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 10. " SEG10_COM2 ,LCD Segment10 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 9. " SEG10_COM1 ,LCD Segment10 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 8. " SEG10_COM0 ,LCD Segment10 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 7. " SEG9_COM3 ,LCD Segment9 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 6. " SEG9_COM2 ,LCD Segment9 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 5. " SEG9_COM1 ,LCD Segment9 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 4. " SEG9_COM0 ,LCD Segment9 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x04 3. " SEG8_COM3 ,LCD Segment8 for COM3" "Off state,On state"
|
|
bitfld.long 0x04 2. " SEG8_COM2 ,LCD Segment8 for COM2" "Off state,On state"
|
|
bitfld.long 0x04 1. " SEG8_COM1 ,LCD Segment8 for COM1" "Off state,On state"
|
|
bitfld.long 0x04 0. " SEG8_COM0 ,LCD Segment8 for COM0" "Off state,On state"
|
|
line.long 0x08 "LCD_DM2,LCD Display Memory 2 Register"
|
|
bitfld.long 0x08 31. " SEG23_COM3 ,LCD Segment23 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 30. " SEG23_COM2 ,LCD Segment23 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 29. " SEG23_COM1 ,LCD Segment23 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 28. " SEG23_COM0 ,LCD Segment23 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 27. " SEG22_COM3 ,LCD Segment22 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 26. " SEG22_COM2 ,LCD Segment22 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 25. " SEG22_COM1 ,LCD Segment22 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 24. " SEG22_COM0 ,LCD Segment22 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 23. " SEG21_COM3 ,LCD Segment21 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 22. " SEG21_COM2 ,LCD Segment21 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 21. " SEG21_COM1 ,LCD Segment21 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 20. " SEG21_COM0 ,LCD Segment21 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 19. " SEG20_COM3 ,LCD Segment20 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 18. " SEG20_COM2 ,LCD Segment20 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 17. " SEG20_COM1 ,LCD Segment20 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 16. " SEG20_COM0 ,LCD Segment20 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 15. " SEG19_COM3 ,LCD Segment19 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 14. " SEG19_COM2 ,LCD Segment19 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 13. " SEG19_COM1 ,LCD Segment19 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 12. " SEG19_COM0 ,LCD Segment19 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 11. " SEG18_COM3 ,LCD Segment18 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 10. " SEG18_COM2 ,LCD Segment18 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 9. " SEG18_COM1 ,LCD Segment18 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 8. " SEG18_COM0 ,LCD Segment18 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 7. " SEG17_COM3 ,LCD Segment17 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 6. " SEG17_COM2 ,LCD Segment17 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 5. " SEG17_COM1 ,LCD Segment17 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 4. " SEG17_COM0 ,LCD Segment17 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x08 3. " SEG16_COM3 ,LCD Segment16 for COM3" "Off state,On state"
|
|
bitfld.long 0x08 2. " SEG16_COM2 ,LCD Segment16 for COM2" "Off state,On state"
|
|
bitfld.long 0x08 1. " SEG16_COM1 ,LCD Segment16 for COM1" "Off state,On state"
|
|
bitfld.long 0x08 0. " SEG16_COM0 ,LCD Segment16 for COM0" "Off state,On state"
|
|
line.long 0x0C "LCD_DM3,LCD Display Memory 3 Register"
|
|
sif (cpu()!="S3F4A1HJ"&&cpu()!="S3F4A1HR")
|
|
bitfld.long 0x0C 31. " SEG31_COM3 ,LCD Segment31 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 30. " SEG31_COM2 ,LCD Segment31 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 29. " SEG31_COM1 ,LCD Segment31 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 28. " SEG31_COM0 ,LCD Segment31 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 27. " SEG30_COM3 ,LCD Segment30 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 26. " SEG30_COM2 ,LCD Segment30 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 25. " SEG30_COM1 ,LCD Segment30 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 24. " SEG30_COM0 ,LCD Segment30 for COM0" "Off state,On state"
|
|
textline " "
|
|
endif
|
|
bitfld.long 0x0C 23. " SEG29_COM3 ,LCD Segment29 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 22. " SEG29_COM2 ,LCD Segment29 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 21. " SEG29_COM1 ,LCD Segment29 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 20. " SEG29_COM0 ,LCD Segment29 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 19. " SEG28_COM3 ,LCD Segment28 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 18. " SEG28_COM2 ,LCD Segment28 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 17. " SEG28_COM1 ,LCD Segment28 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 16. " SEG28_COM0 ,LCD Segment28 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 15. " SEG27_COM3 ,LCD Segment27 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 14. " SEG27_COM2 ,LCD Segment27 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 13. " SEG27_COM1 ,LCD Segment27 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 12. " SEG27_COM0 ,LCD Segment27 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 11. " SEG26_COM3 ,LCD Segment26 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 10. " SEG26_COM2 ,LCD Segment26 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 9. " SEG26_COM1 ,LCD Segment26 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 8. " SEG26_COM0 ,LCD Segment26 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 7. " SEG25_COM3 ,LCD Segment25 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 6. " SEG25_COM2 ,LCD Segment25 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 5. " SEG25_COM1 ,LCD Segment25 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 4. " SEG25_COM0 ,LCD Segment25 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x0C 3. " SEG24_COM3 ,LCD Segment24 for COM3" "Off state,On state"
|
|
bitfld.long 0x0C 2. " SEG24_COM2 ,LCD Segment24 for COM2" "Off state,On state"
|
|
bitfld.long 0x0C 1. " SEG24_COM1 ,LCD Segment24 for COM1" "Off state,On state"
|
|
bitfld.long 0x0C 0. " SEG24_COM0 ,LCD Segment24 for COM0" "Off state,On state"
|
|
sif (cpu()!="S3F4A1HJ"&&cpu()!="S3F4A1HR")
|
|
line.long 0x10 "LCD_DM4,LCD Display Memory 4 Register"
|
|
bitfld.long 0x10 31. " SEG39_COM3 ,LCD Segment39 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 30. " SEG39_COM2 ,LCD Segment39 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 29. " SEG39_COM1 ,LCD Segment39 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 28. " SEG39_COM0 ,LCD Segment39 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 27. " SEG38_COM3 ,LCD Segment38 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 26. " SEG38_COM2 ,LCD Segment38 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 25. " SEG38_COM1 ,LCD Segment38 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 24. " SEG38_COM0 ,LCD Segment38 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 23. " SEG37_COM3 ,LCD Segment37 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 22. " SEG37_COM2 ,LCD Segment37 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 21. " SEG37_COM1 ,LCD Segment37 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 20. " SEG37_COM0 ,LCD Segment37 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 19. " SEG36_COM3 ,LCD Segment36 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 18. " SEG36_COM2 ,LCD Segment36 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 17. " SEG36_COM1 ,LCD Segment36 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 16. " SEG36_COM0 ,LCD Segment36 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 15. " SEG35_COM3 ,LCD Segment35 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 14. " SEG35_COM2 ,LCD Segment35 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 13. " SEG35_COM1 ,LCD Segment35 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 12. " SEG35_COM0 ,LCD Segment35 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 11. " SEG34_COM3 ,LCD Segment34 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 10. " SEG34_COM2 ,LCD Segment34 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 9. " SEG34_COM1 ,LCD Segment34 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 8. " SEG34_COM0 ,LCD Segment34 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 7. " SEG33_COM3 ,LCD Segment33 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 6. " SEG33_COM2 ,LCD Segment33 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 5. " SEG33_COM1 ,LCD Segment33 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 4. " SEG33_COM0 ,LCD Segment33 for COM0" "Off state,On state"
|
|
textline " "
|
|
bitfld.long 0x10 3. " SEG32_COM3 ,LCD Segment32 for COM3" "Off state,On state"
|
|
bitfld.long 0x10 2. " SEG32_COM2 ,LCD Segment32 for COM2" "Off state,On state"
|
|
bitfld.long 0x10 1. " SEG32_COM1 ,LCD Segment32 for COM1" "Off state,On state"
|
|
bitfld.long 0x10 0. " SEG32_COM0 ,LCD Segment32 for COM0" "Off state,On state"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree "LDMA (Lite Direct Memory Access)"
|
|
base ad:0xFFFF8000
|
|
width 13.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "LDMA_PMSR,LDMA Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not halted,Halted"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "LDMA_CR,LDMA Control Register"
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "LDMA_SR,LDMA Status Register"
|
|
sif (cpu()!="S3F4A1HJ"&&cpu()!="S3F4A1HR")
|
|
bitfld.long 0x00 7. " CH7_IT ,Channel 7 interrupt" "No interrupt,Interrupt"
|
|
endif
|
|
bitfld.long 0x00 6. " CH6_IT ,Channel 6 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " CH5_IT ,Channel 5 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 4. " CH4_IT ,Channel 4 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CH3_IT ,Channel 3 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 2. " CH2_IT ,Channel 2 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 1. " CH1_IT ,Channel 1 interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " CH0_IT ,Channel 0 interrupt" "No interrupt,Interrupt"
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "LDMA_IMR,LDMA Interrupt Mask Register"
|
|
sif (cpu()!="S3F4A1HJ"&&cpu()!="S3F4A1HR")
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " CH7_IT ,Channel 7 interrupt" "Disabled,Enabled"
|
|
endif
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " CH6_IT ,Channel 6 interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " CH5_IT ,Channel 5 interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " CH4_IT ,Channel 4 interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " CH3_IT ,Channel 3 interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CH2_IT ,Channel 2 interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CH1_IT ,Channel 1 interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CH0_IT ,Channel 0 interrupt" "Disabled,Enabled"
|
|
tree "Channel 0"
|
|
wgroup.long 0++0x03
|
|
line.long 0x00 "LDMA_CR0,LDMA Channel 0 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 0" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+0)))&0x100)==0x00)
|
|
group.long (0x04+0)++0x03
|
|
line.long 0x00 "LDMA_MR0,LDMA Channel 0 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 0"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+0)++0x03
|
|
line.long 0x00 "LDMA_MR0,LDMA Channel 0 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 0"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+0)++0x03
|
|
line.long 0x00 "LDMA_CSR0,LDMA Channel 0 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 0 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 0 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 0 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+0)++0x03
|
|
line.long 0x00 "LDMA_SR0,LDMA Channel 0 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 0 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 0 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 0 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 0 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+0)++0x03
|
|
line.long 0x00 "LDMA_IMR0,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 0 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 0 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 0 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*0)))&0x100)==0x00)
|
|
group.long (0x1C+0)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR0,LDMA Channel 0 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR0,LDMA Channel 0 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR0,LDMA Channel 0 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+0)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR0,LDMA Channel 0 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR0,LDMA Channel 0 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR0,LDMA Channel 0 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 1"
|
|
wgroup.long 1++0x03
|
|
line.long 0x00 "LDMA_CR1,LDMA Channel 1 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 1" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 1" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+1)))&0x100)==0x00)
|
|
group.long (0x04+1)++0x03
|
|
line.long 0x00 "LDMA_MR1,LDMA Channel 1 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 1"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+1)++0x03
|
|
line.long 0x00 "LDMA_MR1,LDMA Channel 1 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 1"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+1)++0x03
|
|
line.long 0x00 "LDMA_CSR1,LDMA Channel 1 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 1 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 1 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 1 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+1)++0x03
|
|
line.long 0x00 "LDMA_SR1,LDMA Channel 1 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 1 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 1 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 1 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+1)++0x03
|
|
line.long 0x00 "LDMA_IMR1,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 1 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 1 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 1 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*1)))&0x100)==0x00)
|
|
group.long (0x1C+1)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR1,LDMA Channel 1 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR1,LDMA Channel 1 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR1,LDMA Channel 1 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+1)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR1,LDMA Channel 1 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR1,LDMA Channel 1 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR1,LDMA Channel 1 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 2"
|
|
wgroup.long 2++0x03
|
|
line.long 0x00 "LDMA_CR2,LDMA Channel 2 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 2" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 2" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+2)))&0x100)==0x00)
|
|
group.long (0x04+2)++0x03
|
|
line.long 0x00 "LDMA_MR2,LDMA Channel 2 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 2"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+2)++0x03
|
|
line.long 0x00 "LDMA_MR2,LDMA Channel 2 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 2"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+2)++0x03
|
|
line.long 0x00 "LDMA_CSR2,LDMA Channel 2 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 2 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 2 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 2 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+2)++0x03
|
|
line.long 0x00 "LDMA_SR2,LDMA Channel 2 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 2 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 2 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 2 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 2 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+2)++0x03
|
|
line.long 0x00 "LDMA_IMR2,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 2 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 2 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 2 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*2)))&0x100)==0x00)
|
|
group.long (0x1C+2)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR2,LDMA Channel 2 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR2,LDMA Channel 2 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR2,LDMA Channel 2 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+2)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR2,LDMA Channel 2 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR2,LDMA Channel 2 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR2,LDMA Channel 2 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 3"
|
|
wgroup.long 3++0x03
|
|
line.long 0x00 "LDMA_CR3,LDMA Channel 3 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 3" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 3" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+3)))&0x100)==0x00)
|
|
group.long (0x04+3)++0x03
|
|
line.long 0x00 "LDMA_MR3,LDMA Channel 3 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 3"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+3)++0x03
|
|
line.long 0x00 "LDMA_MR3,LDMA Channel 3 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 3"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+3)++0x03
|
|
line.long 0x00 "LDMA_CSR3,LDMA Channel 3 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 3 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 3 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 3 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+3)++0x03
|
|
line.long 0x00 "LDMA_SR3,LDMA Channel 3 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 3 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 3 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 3 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 3 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+3)++0x03
|
|
line.long 0x00 "LDMA_IMR3,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 3 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 3 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 3 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*3)))&0x100)==0x00)
|
|
group.long (0x1C+3)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR3,LDMA Channel 3 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR3,LDMA Channel 3 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR3,LDMA Channel 3 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+3)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR3,LDMA Channel 3 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR3,LDMA Channel 3 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR3,LDMA Channel 3 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 4"
|
|
wgroup.long 4++0x03
|
|
line.long 0x00 "LDMA_CR4,LDMA Channel 4 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 4" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 4" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+4)))&0x100)==0x00)
|
|
group.long (0x04+4)++0x03
|
|
line.long 0x00 "LDMA_MR4,LDMA Channel 4 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 4"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+4)++0x03
|
|
line.long 0x00 "LDMA_MR4,LDMA Channel 4 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 4"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+4)++0x03
|
|
line.long 0x00 "LDMA_CSR4,LDMA Channel 4 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 4 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 4 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 4 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+4)++0x03
|
|
line.long 0x00 "LDMA_SR4,LDMA Channel 4 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 4 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 4 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 4 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+4)++0x03
|
|
line.long 0x00 "LDMA_IMR4,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 4 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 4 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 4 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*4)))&0x100)==0x00)
|
|
group.long (0x1C+4)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR4,LDMA Channel 4 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR4,LDMA Channel 4 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR4,LDMA Channel 4 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+4)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR4,LDMA Channel 4 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR4,LDMA Channel 4 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR4,LDMA Channel 4 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 5"
|
|
wgroup.long 5++0x03
|
|
line.long 0x00 "LDMA_CR5,LDMA Channel 5 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 5" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 5" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+5)))&0x100)==0x00)
|
|
group.long (0x04+5)++0x03
|
|
line.long 0x00 "LDMA_MR5,LDMA Channel 5 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 5"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+5)++0x03
|
|
line.long 0x00 "LDMA_MR5,LDMA Channel 5 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 5"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+5)++0x03
|
|
line.long 0x00 "LDMA_CSR5,LDMA Channel 5 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 5 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 5 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 5 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+5)++0x03
|
|
line.long 0x00 "LDMA_SR5,LDMA Channel 5 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 5 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 5 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 5 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 5 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+5)++0x03
|
|
line.long 0x00 "LDMA_IMR5,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 5 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 5 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 5 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*5)))&0x100)==0x00)
|
|
group.long (0x1C+5)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR5,LDMA Channel 5 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR5,LDMA Channel 5 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR5,LDMA Channel 5 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+5)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR5,LDMA Channel 5 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR5,LDMA Channel 5 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR5,LDMA Channel 5 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 6"
|
|
wgroup.long 6++0x03
|
|
line.long 0x00 "LDMA_CR6,LDMA Channel 6 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 6" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 6" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+6)))&0x100)==0x00)
|
|
group.long (0x04+6)++0x03
|
|
line.long 0x00 "LDMA_MR6,LDMA Channel 6 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 6"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+6)++0x03
|
|
line.long 0x00 "LDMA_MR6,LDMA Channel 6 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 6"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+6)++0x03
|
|
line.long 0x00 "LDMA_CSR6,LDMA Channel 6 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 6 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 6 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 6 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+6)++0x03
|
|
line.long 0x00 "LDMA_SR6,LDMA Channel 6 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 6 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 6 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 6 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 6 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+6)++0x03
|
|
line.long 0x00 "LDMA_IMR6,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 6 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 6 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 6 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*6)))&0x100)==0x00)
|
|
group.long (0x1C+6)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR6,LDMA Channel 6 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR6,LDMA Channel 6 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR6,LDMA Channel 6 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+6)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR6,LDMA Channel 6 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR6,LDMA Channel 6 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR6,LDMA Channel 6 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
tree "Channel 7"
|
|
wgroup.long 7++0x03
|
|
line.long 0x00 "LDMA_CR7,LDMA Channel 7 Control Register"
|
|
bitfld.long 0x00 2. " LCHDIS ,Disable LDMA channel 7" "No effect,Disable"
|
|
bitfld.long 0x00 1. " LCHEN ,Enable LDMA channel 7" "No effect,Enable"
|
|
if (((d.l(ad:0xFFFF8000+(0x0C+7)))&0x100)==0x00)
|
|
group.long (0x04+7)++0x03
|
|
line.long 0x00 "LDMA_MR7,LDMA Channel 7 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 7"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
else
|
|
rgroup.long (0x04+7)++0x03
|
|
line.long 0x00 "LDMA_MR7,LDMA Channel 7 Mode Register"
|
|
hexmask.long.byte 0x00 8.--12. 1. " CHREADY[4:0] ,Defines which CHRDY signal is valid for channel 7"
|
|
bitfld.long 0x00 5.--6. " LDMA_SIZE[1:0] ,Unit of the transfer" "Byte,Halfword,Word,?..."
|
|
bitfld.long 0x00 4. " TRIG ,Trigger type" "Software,Hardware"
|
|
bitfld.long 0x00 3. " DEST_INCR ,Increase destination address" "Not increased,Increased"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SRC_INCR ,Increase source address" "Not increased,Increased"
|
|
bitfld.long 0x00 1. " DEST ,Destination bus for data transfer" "Peripheral,Memory"
|
|
bitfld.long 0x00 0. " SRC ,Source bus for data transfer" "Peripheral,Memory"
|
|
endif
|
|
wgroup.long (0x08+7)++0x03
|
|
line.long 0x00 "LDMA_CSR7,LDMA Channel 7 Interrupt Clear Status Register"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 7 destination error" "No effect,Clear"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 7 source error" "No effect,Clear"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 7 transfer finished" "No effect,Clear"
|
|
rgroup.long (0x0C+7)++0x03
|
|
line.long 0x00 "LDMA_SR7,LDMA Channel 7 Status Register"
|
|
bitfld.long 0x00 8. " CHEN ,LDMA channel 7 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " DEST_ERROR ,LDMA channel 7 destination error" "No error,Error"
|
|
bitfld.long 0x00 1. " SRC_ERROR ,LDMA channel 7 source error" "No error,Error"
|
|
bitfld.long 0x00 0. " LDMA_END ,LDMA channel 7 transfer finished" "Not finished,Finished"
|
|
group.long (0x18+7)++0x03
|
|
line.long 0x00 "LDMA_IMR7,LDMA Channel $ Interrupt Mask Register"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " DEST_ERROR ,LDMA channel 7 destination error" "Not masked,Masked"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SRC_ERROR ,LDMA channel 7 source error" "Not masked,Masked"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " LDMA_END ,LDMA channel 7 transfer finished" "Not masked,Masked"
|
|
if (((d.l(ad:0xFFFF8000+(0x10C+0x80*7)))&0x100)==0x00)
|
|
group.long (0x1C+7)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR7,LDMA Channel 7 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR7,LDMA Channel 7 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR7,LDMA Channel 7 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
else
|
|
rgroup.long (0x1C+7)++0x0B
|
|
line.long 0x00 "LDMA_ASRCR7,LDMA Channel 7 Source Address Register"
|
|
hexmask.long 0x00 0.--31. 1. " SRC_ADD[31:0] ,Source address"
|
|
line.long 0x04 "LDMA_ADSTR7,LDMA Channel 7 Destination Address Register"
|
|
hexmask.long 0x04 0.--31. 1. " DEST_ADD[31:0] ,destination address"
|
|
line.long 0x08 "LDMA_CNTR7,LDMA Channel 7 Transfer Counter"
|
|
hexmask.long.word 0x08 0.--15. 1. " DATA_CNT[15:0] ,Number of data to be transferred"
|
|
endif
|
|
tree.end
|
|
width 11.
|
|
tree.end
|
|
tree "PWM (Pulse Width Modulation)"
|
|
tree "PWM0"
|
|
base ad:0xFFE08000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PWM_PMSR,PWM Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug" "PWM not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PWM ,PWM Clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PWM_CR,PWM Control Register"
|
|
bitfld.long 0x00 10. " PWMDIS1 ,PWM Disable Channel Number 1" "No effect,Disable"
|
|
bitfld.long 0x00 9. " PWMEN1 ,PWM Enable Channel Number 1" "No effect,Enable"
|
|
bitfld.long 0x00 2. " PWMDIS0 ,PWM Disable Channel Number 0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " PWMEN0 ,PWM Enable Channel Number 0" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,PWM Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PWM_MR,PWM Mode Register"
|
|
bitfld.long 0x00 13. " PL1 ,Pulse Level for PWM Channel 1" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 8.--12. " PRESCAL1 ,Counter Clock Prescalar for PWM Channel 1" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
bitfld.long 0x00 5. " PL0 ,Pulse Level for PWM Channel 0" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 0.--4. " PRESCAL0 ,Counter Clock Prescalar for PWM Channel 0" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PWM_CSR,PWM Clear Status Register"
|
|
bitfld.long 0x00 9. " PEND1 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PSTA1 ,Pulse Start Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PEND0 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Pulse Start Interrupt" "No effect,Clear"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "PWM_SR,PWM Status Register"
|
|
in
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PWM_IMR,PWM Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PEND1 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PSTA1 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "PWM_DLY_0,PWM Delay Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x04 "PWM_PUL_0,PWM Pulse Register 0"
|
|
hexmask.long.word 0x04 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x08 "PWM_DLY_1,PWM Delay Register 1"
|
|
hexmask.long.word 0x08 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is active"
|
|
line.long 0x0C "PWM_PUL_1,PWM Pulse Register 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is active"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A2FJ"||cpu()=="S3F4A2FR")
|
|
tree "PWM1"
|
|
base ad:0xFFE8C000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PWM_PMSR,PWM Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug" "PWM not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PWM ,PWM Clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PWM_CR,PWM Control Register"
|
|
bitfld.long 0x00 10. " PWMDIS1 ,PWM Disable Channel Number 1" "No effect,Disable"
|
|
bitfld.long 0x00 9. " PWMEN1 ,PWM Enable Channel Number 1" "No effect,Enable"
|
|
bitfld.long 0x00 2. " PWMDIS0 ,PWM Disable Channel Number 0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " PWMEN0 ,PWM Enable Channel Number 0" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,PWM Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PWM_MR,PWM Mode Register"
|
|
bitfld.long 0x00 13. " PL1 ,Pulse Level for PWM Channel 1" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 8.--12. " PRESCAL1 ,Counter Clock Prescalar for PWM Channel 1" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
bitfld.long 0x00 5. " PL0 ,Pulse Level for PWM Channel 0" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 0.--4. " PRESCAL0 ,Counter Clock Prescalar for PWM Channel 0" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PWM_CSR,PWM Clear Status Register"
|
|
bitfld.long 0x00 9. " PEND1 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PSTA1 ,Pulse Start Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PEND0 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Pulse Start Interrupt" "No effect,Clear"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "PWM_SR,PWM Status Register"
|
|
in
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PWM_IMR,PWM Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PEND1 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PSTA1 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "PWM_DLY_0,PWM Delay Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x04 "PWM_PUL_0,PWM Pulse Register 0"
|
|
hexmask.long.word 0x04 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x08 "PWM_DLY_1,PWM Delay Register 1"
|
|
hexmask.long.word 0x08 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is active"
|
|
line.long 0x0C "PWM_PUL_1,PWM Pulse Register 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is active"
|
|
width 11.
|
|
tree.end
|
|
tree "PWM2"
|
|
base ad:0xFFE90000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PWM_PMSR,PWM Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug" "PWM not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PWM ,PWM Clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PWM_CR,PWM Control Register"
|
|
bitfld.long 0x00 10. " PWMDIS1 ,PWM Disable Channel Number 1" "No effect,Disable"
|
|
bitfld.long 0x00 9. " PWMEN1 ,PWM Enable Channel Number 1" "No effect,Enable"
|
|
bitfld.long 0x00 2. " PWMDIS0 ,PWM Disable Channel Number 0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " PWMEN0 ,PWM Enable Channel Number 0" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,PWM Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PWM_MR,PWM Mode Register"
|
|
bitfld.long 0x00 13. " PL1 ,Pulse Level for PWM Channel 1" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 8.--12. " PRESCAL1 ,Counter Clock Prescalar for PWM Channel 1" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
bitfld.long 0x00 5. " PL0 ,Pulse Level for PWM Channel 0" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 0.--4. " PRESCAL0 ,Counter Clock Prescalar for PWM Channel 0" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PWM_CSR,PWM Clear Status Register"
|
|
bitfld.long 0x00 9. " PEND1 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PSTA1 ,Pulse Start Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PEND0 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Pulse Start Interrupt" "No effect,Clear"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "PWM_SR,PWM Status Register"
|
|
in
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PWM_IMR,PWM Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PEND1 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PSTA1 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "PWM_DLY_0,PWM Delay Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x04 "PWM_PUL_0,PWM Pulse Register 0"
|
|
hexmask.long.word 0x04 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x08 "PWM_DLY_1,PWM Delay Register 1"
|
|
hexmask.long.word 0x08 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is active"
|
|
line.long 0x0C "PWM_PUL_1,PWM Pulse Register 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is active"
|
|
width 11.
|
|
tree.end
|
|
tree "PWM3"
|
|
base ad:0xFFE94000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "PWM_PMSR,PWM Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug" "PWM not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PWM ,PWM Clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "PWM_CR,PWM Control Register"
|
|
bitfld.long 0x00 10. " PWMDIS1 ,PWM Disable Channel Number 1" "No effect,Disable"
|
|
bitfld.long 0x00 9. " PWMEN1 ,PWM Enable Channel Number 1" "No effect,Enable"
|
|
bitfld.long 0x00 2. " PWMDIS0 ,PWM Disable Channel Number 0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " PWMEN0 ,PWM Enable Channel Number 0" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,PWM Software Reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "PWM_MR,PWM Mode Register"
|
|
bitfld.long 0x00 13. " PL1 ,Pulse Level for PWM Channel 1" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 8.--12. " PRESCAL1 ,Counter Clock Prescalar for PWM Channel 1" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
bitfld.long 0x00 5. " PL0 ,Pulse Level for PWM Channel 0" "Pulse low,Pulse high"
|
|
bitfld.long 0x00 0.--4. " PRESCAL0 ,Counter Clock Prescalar for PWM Channel 0" "2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768,65536,131072,262144,524288,1048576,2097152,4194304,8388608,16777216,33554432,67108864,134217728,268435456,536870912,1073741824,2147483648,4294967296"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "PWM_CSR,PWM Clear Status Register"
|
|
bitfld.long 0x00 9. " PEND1 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 8. " PSTA1 ,Pulse Start Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 1. " PEND0 ,Pulse End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Pulse Start Interrupt" "No effect,Clear"
|
|
hgroup.long 0x70++0x03
|
|
hide.long 0x00 "PWM_SR,PWM Status Register"
|
|
in
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "PWM_IMR,PWM Interrupt Mask Register"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PEND1 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " PSTA1 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Pulse End Interrupt" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Pulse Start Interrupt" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "PWM_DLY_0,PWM Delay Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x04 "PWM_PUL_0,PWM Pulse Register 0"
|
|
hexmask.long.word 0x04 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is inactive"
|
|
line.long 0x08 "PWM_DLY_1,PWM Delay Register 1"
|
|
hexmask.long.word 0x08 0.--15. 1. " DELAY ,Numbers of counter cycles during which the output is active"
|
|
line.long 0x0C "PWM_PUL_1,PWM Pulse Register 1"
|
|
hexmask.long.word 0x0c 0.--15. 1. " PULSE ,Numbers of counter cycles during which the output is active"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "SPI16 (Serial Peripheral Interface 16-bit)"
|
|
base ad:0xFFE60000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SPI_PMSR,SPI Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Disabled,Enabled"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SPI ,SPI clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SPI_CR,SPI Control Register"
|
|
bitfld.long 0x00 2. " SPIDIS ,SPI disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SPIEN ,SPI enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,SPI software reset" "No effect,Reset"
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x00)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS[7:0] ,Delay between chip selects"
|
|
bitfld.long 0x00 16.--19. " PCS[3:0] ,Peripheral chip select" "14,13,14,11,14,13,14,7,14,13,14,11,14,13,14,Forbidden"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFEN ,Mode Fault detection enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIV32 ,Clock selection" "PCLK,PCLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly connected,Connected to a 4 to 16 decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
elif (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x00)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x04)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS[7:0] ,Delay between chip selects"
|
|
bitfld.long 0x00 16.--19. " PCS[3:0] ,Peripheral chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFEN ,Mode Fault detection enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIV32 ,Clock selection" "PCLK,PCLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly connected,Connected to a 4 to 16 decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
elif (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x02)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x04)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS[7:0] ,Delay between chip selects"
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFEN ,Mode Fault detection enable/disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " DIV32 ,Clock selection" "PCLK,PCLK/32"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly connected,Connected to a 4 to 16 decoder"
|
|
bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
elif (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x02)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DLYBCS[7:0] ,Delay between chip selects"
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MODFEN ,Mode Fault detection enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIV32 ,Clock selection" "PCLK,PCLK/32"
|
|
bitfld.long 0x00 2. " PCSDEC ,Chip select decode" "Directly connected,Connected to a 4 to 16 decoder"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PS ,Peripheral selection" "Fixed,Variable"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SPI_CSR,SPI Clear Status Register"
|
|
bitfld.long 0x00 6. " ENDTRANS ,Clear End of Transfer" "No effect,Clear"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode fault error" "No effect,Clear"
|
|
else
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SPI_CSR,SPI Clear Status Register"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No effect,Clear"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "SPI_SR,SPI Status Register"
|
|
bitfld.long 0x00 9. " BUSY ,SPI Busy in Master mode" "Not busy,Busy"
|
|
bitfld.long 0x00 8. " ENS ,SPI Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ENDTRANS ,Clear End of Transfer" "No transfer/In progress,End"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode fault error " "Not detected,Detected"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full" "Not received,Received"
|
|
else
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "SPI_SR,SPI Status Register"
|
|
bitfld.long 0x00 8. " ENS ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No overrun,Overrun occured"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty" "Not transfered,Transfered"
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full" "Not received,Received"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "SPI_IMR,SPI Interrupt Mask Register"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " ENDTRANS ,Clear End of Transfer" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF ,Mode fault error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,Transmit data register empty interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Disabled,Enabled"
|
|
else
|
|
rgroup.long 0x7C++0x03
|
|
line.long 0x00 "SPI_IMR,SPI Interrupt Mask Register"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,Transmit data register empty interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)
|
|
group.long 0x2080++0x03
|
|
line.long 0x00 "SPI_RDR,SPI Receive Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS[3:0] ,Peripheral chip select status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD[15:0] ,Receive data"
|
|
else
|
|
group.long 0x2080++0x03
|
|
line.long 0x00 "SPI_RDR,SPI Receive Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RD[15:0] ,Receive data"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x02)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x00)
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "SPI_TDR,SPI Transmit Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS[3:0] ,Peripheral chip select" "14,13,14,11,14,13,14,7,14,13,14,11,14,13,14,Forbidden"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD[15:0] ,Transmit data"
|
|
elif (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)&&(((d.l(ad:0xFFE60000+0x64))&0x02)==0x02)&&(((d.l(ad:0xFFE60000+0x64))&0x04)==0x04)
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "SPI_TDR,SPI Transmit Data Register"
|
|
bitfld.long 0x00 16.--19. " PCS[3:0] ,Peripheral chip select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD[15:0] ,Transmit data"
|
|
else
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "SPI_TDR,SPI Transmit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TD[15:0] ,Transmit data"
|
|
endif
|
|
if (((d.l(ad:0xFFE60000+0x64))&0x01)==0x01)
|
|
group.long 0x90++0x0F
|
|
line.long 0x0 "SPI_SSR0,SPI Slave Select Register 0"
|
|
hexmask.long.byte 0x0 24.--31. 1. " DLYBCT[7:0] ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x0 16.--23. 1. " DLYBS[7:0] ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x0 8.--15. 1. " SCBR[7:0] ,Serial Clock Baud Rate"
|
|
bitfld.long 0x0 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x0 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0x0 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0x4 "SPI_SSR1,SPI Slave Select Register 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. " DLYBCT[7:0] ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x4 16.--23. 1. " DLYBS[7:0] ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x4 8.--15. 1. " SCBR[7:0] ,Serial Clock Baud Rate"
|
|
bitfld.long 0x4 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x4 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0x4 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0x8 "SPI_SSR2,SPI Slave Select Register 2"
|
|
hexmask.long.byte 0x8 24.--31. 1. " DLYBCT[7:0] ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0x8 16.--23. 1. " DLYBS[7:0] ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0x8 8.--15. 1. " SCBR[7:0] ,Serial Clock Baud Rate"
|
|
bitfld.long 0x8 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x8 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0x8 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0xC "SPI_SSR3,SPI Slave Select Register 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. " DLYBCT[7:0] ,Delay Between Consecutive Transfers"
|
|
hexmask.long.byte 0xC 16.--23. 1. " DLYBS[7:0] ,Delay Before SPCK"
|
|
textline " "
|
|
hexmask.long.byte 0xC 8.--15. 1. " SCBR[7:0] ,Serial Clock Baud Rate"
|
|
bitfld.long 0xC 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0xC 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0xC 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
else
|
|
group.long 0x90++0x0F
|
|
line.long 0x0 "SPI_SSR0,SPI Slave Select Register 0"
|
|
bitfld.long 0x0 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x0 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x0 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0x4 "SPI_SSR1,SPI Slave Select Register 1"
|
|
bitfld.long 0x4 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x4 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x4 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0x8 "SPI_SSR2,SPI Slave Select Register 2"
|
|
bitfld.long 0x8 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x8 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0x8 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
group.long 0x90++0x0F
|
|
line.long 0xC "SPI_SSR3,SPI Slave Select Register 3"
|
|
bitfld.long 0xC 4.--7. " BITS[3:0] ,Bits Per Transfer" "8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0xC 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
textline " "
|
|
bitfld.long 0xC 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
tree "SPI8 (Serial Peripheral Interface 8-bit)"
|
|
base ad:0xFFE10000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SPI_PMSR,SPI Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Disabled,Enabled"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SPI ,SPI clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SPI_CR,SPI Control Register"
|
|
bitfld.long 0x00 2. " SPIDIS ,SPI disable" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SPIEN ,SPI enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,SPI software reset" "No effect,Reset"
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " MODFEN ,Mode Fault detection enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DIV32 ,Clock selection" "PCLK,PCLK/32"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SPI_MR,SPI Mode Register"
|
|
bitfld.long 0x00 7. " LLB ,Local loop back" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " MSTR ,Master/Slave selection" "Slave,Master"
|
|
endif
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SPI_CSR,SPI Clear Status Register"
|
|
bitfld.long 0x00 6. " ENDTRANS ,Clear End of Transfer" "No effect,Clear"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No effect,Clear"
|
|
bitfld.long 0x00 2. " MODF ,Mode fault error" "No effect,Clear"
|
|
else
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SPI_CSR,SPI Clear Status Register"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No effect,Clear"
|
|
endif
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "SPI_SR,SPI Status Register"
|
|
bitfld.long 0x00 9. " BUSY ,SPI Busy in Master mode" "Not busy,Busy"
|
|
bitfld.long 0x00 8. " ENS ,SPI Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " ENDTRANS ,Clear End of Transfer" "No transfer/In progress,End"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode fault error " "Not detected,Detected"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty" "Not transferred,Transferred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full" "Not received,Received"
|
|
else
|
|
rgroup.long 0x2070++0x03
|
|
line.long 0x00 "SPI_SR,SPI Status Register"
|
|
bitfld.long 0x00 8. " ENS ,SPI Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error" "No overrun,Overrun"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty" "Not transferred,Transferred"
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full" "Not received,Received"
|
|
endif
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
wgroup.long 0x74++0x07
|
|
line.long 0x00 "SPI_IER,SPI Interrupt Enable Register"
|
|
bitfld.long 0x00 6. " ENDTRANS ,Clear End of Transfer" "No effect,Enabled"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error interrupt enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MODF ,Mode fault error interrupt enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty interrupt enable" "No effect,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full interrupt enable" "No effect,Enabled"
|
|
line.long 0x04 "SPI_IDR,SPI Interrupt Disable Register"
|
|
bitfld.long 0x04 6. " ENDTRANS ,Clear End of Transfer" "No effect,Disabled"
|
|
bitfld.long 0x04 3. " OVRE ,Overrun error interrupt disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 2. " MODF ,Mode fault error interrupt disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " TDRE ,Transmit data register empty interrupt disable" "No effect,Disabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " RDRF ,Receive data register full interrupt disable" "No effect,Disabled"
|
|
else
|
|
wgroup.long 0x74++0x07
|
|
line.long 0x00 "SPI_IER,SPI Interrupt Enable Register"
|
|
bitfld.long 0x00 3. " OVRE ,Overrun error interrupt enable" "No effect,Enabled"
|
|
bitfld.long 0x00 1. " TDRE ,Transmit data register empty interrupt enable" "No effect,Enabled"
|
|
bitfld.long 0x00 0. " RDRF ,Receive data register full interrupt enable" "No effect,Enabled"
|
|
line.long 0x04 "SPI_IDR,SPI Interrupt Disable Register"
|
|
bitfld.long 0x04 3. " OVRE ,Overrun error interrupt disable" "No effect,Disabled"
|
|
bitfld.long 0x04 1. " TDRE ,Transmit data register empty interrupt disable" "No effect,Disabled"
|
|
bitfld.long 0x04 0. " RDRF ,Receive data register full interrupt disable" "No effect,Disabled"
|
|
endif
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SPI_IMR,SPI Interrupt Mask Register"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " ENDTRANS ,Clear End of Transfer" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " MODF ,Mode fault error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,Transmit data register empty interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Disabled,Enabled"
|
|
else
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SPI_IMR,SPI Interrupt Mask Register"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TDRE ,Transmit data register empty interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RDRF ,Receive data register full interrupt mask" "Disabled,Enabled"
|
|
endif
|
|
rgroup.long 0x80++0x03
|
|
line.long 0x00 "SPI_RDR,SPI Receive Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RD[7:0] ,Receive data"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "SPI_TDR,SPI Transmit Data Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TD[7:0] ,Transmit data"
|
|
if (((d.l(ad:0xFFE10000+0x64))&0x01)==0x01)
|
|
group.long 0x90++0x0F
|
|
line.long 0x00 "SPI_SSR,SPI Slave Select Register"
|
|
bitfld.long 0x00 24.--25. " DLYBS[1:0] ,Delay Before SPCK" "0.5,1,2,4"
|
|
bitfld.long 0x00 16.--17. " DLYBCT[1:0] ,Delay between Consecutive Transfers" "0.5,1,2,4"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SCBR[7:0] ,Serial Clock Baud Rate"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " BITS[2:0] ,Bits Per Transfer" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0x00 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
else
|
|
group.long 0x90++0x0F
|
|
line.long 0x00 "SPI_SSR,SPI Slave Select Register"
|
|
bitfld.long 0x00 4.--6. " BITS[2:0] ,Bits Per Transfer" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 1. " NCPHA ,Clock Phase" "Changed/captured,Captured/changed"
|
|
bitfld.long 0x00 0. " CPOL ,Clock Polarity" "Zero,One"
|
|
endif
|
|
width 11.
|
|
tree.end
|
|
tree "ST (Simple Timer)"
|
|
tree "ST0 (asynchronous)"
|
|
base ad:0xFFE20000
|
|
width 9.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ST0_PMSR,ST0 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ST0 ,Simple Timer Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "ST0_CR,ST0 Control Register"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Simple Timer Channel 1 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Simple Timer Channel 0 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 9. " CHEN1 ,Simple Timer Channel 1 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 8. " CHEN0 ,Simple Timer Channel 0 Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST0 ,ST0 Software Reset" "No reset,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "ST0_CSR,ST0 Clear Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 24. " CHLD0 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHEND1 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHEND0 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "ST0_SR,ST0 Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 24. " CHLD0 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Channel Disable Status" "No effect,Reset"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Channel Disable Status" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CHENS1 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CHENS0 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CHEND1 ,Channel End Status" "Not ended,Ended"
|
|
bitfld.long 0x00 0. " CHEND0 ,Channel End Status" "Not ended,Ended"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ST0_IMR,ST0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CHLD1 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CHLD0 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CHDIS1 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CHDIS0 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CHEND1 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CHEND0 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "ST0_PR0,ST0 Channel 0 Prescalar Register"
|
|
hexmask.long.word 0x00 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x00 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " PRESCALAR ,Channel 0 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x04 "ST0_CT0,ST0 Channel 0 Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOAD ,Channel 0 Preload Value"
|
|
line.long 0x08 "ST0_PR1,ST0 Channel 1 Prescalar Register"
|
|
hexmask.long.word 0x08 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x08 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " PRESCALAR ,Channel 1 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x0c "ST0_CT1,ST0 Channel 1 Counter Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " LOAD ,Channel 1 Preload Value"
|
|
rgroup.long 0x200++0x07
|
|
line.long 0x00 "ST0_CCV0,ST0 Current Counter Value 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Current Counter Value 0 Register"
|
|
line.long 0x04 "ST0_CCV1,ST0 Current Counter Value 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Current Counter Value 1 Register"
|
|
width 11.
|
|
tree.end
|
|
tree "ST1 (synchronous)"
|
|
base ad:0xFFE24000
|
|
width 9.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ST1_PMSR,ST1 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ST1 ,Simple Timer Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "ST1_CR,ST1 Control Register"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Simple Timer Channel 1 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Simple Timer Channel 0 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 9. " CHEN1 ,Simple Timer Channel 1 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 8. " CHEN0 ,Simple Timer Channel 0 Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST1 ,ST1 Software Reset" "No reset,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "ST1_CSR,ST1 Clear Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 24. " CHLD0 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHEND1 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHEND0 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "ST1_SR,ST1 Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 24. " CHLD0 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Channel Disable Status" "No effect,Reset"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Channel Disable Status" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CHENS1 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CHENS0 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CHEND1 ,Channel End Status" "Not ended,Ended"
|
|
bitfld.long 0x00 0. " CHEND0 ,Channel End Status" "Not ended,Ended"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ST1_IMR,ST1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CHLD1 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CHLD0 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CHDIS1 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CHDIS0 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CHEND1 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CHEND0 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "ST1_PR0,ST1 Channel 0 Prescalar Register"
|
|
hexmask.long.word 0x00 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x00 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " PRESCALAR ,Channel 0 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x04 "ST1_CT0,ST1 Channel 0 Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOAD ,Channel 0 Preload Value"
|
|
line.long 0x08 "ST1_PR1,ST1 Channel 1 Prescalar Register"
|
|
hexmask.long.word 0x08 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x08 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " PRESCALAR ,Channel 1 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x0c "ST1_CT1,ST1 Channel 1 Counter Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " LOAD ,Channel 1 Preload Value"
|
|
rgroup.long 0x200++0x07
|
|
line.long 0x00 "ST1_CCV0,ST1 Current Counter Value 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Current Counter Value 0 Register"
|
|
line.long 0x04 "ST1_CCV1,ST1 Current Counter Value 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Current Counter Value 1 Register"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A0KR"||cpu()=="S3F4A0KJ")
|
|
tree "ST2 (synchronous)"
|
|
base ad:0xFFE5C000
|
|
width 9.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "ST2_PMSR,ST2 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " ST2 ,Simple Timer Clock Status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "ST2_CR,ST2 Control Register"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Simple Timer Channel 1 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Simple Timer Channel 0 Disable" "No effect,Disable"
|
|
bitfld.long 0x00 9. " CHEN1 ,Simple Timer Channel 1 Enable" "No effect,Enable"
|
|
bitfld.long 0x00 8. " CHEN0 ,Simple Timer Channel 0 Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST2 ,ST2 Software Reset" "No reset,Reset"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "ST2_CSR,ST2 Clear Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 24. " CHLD0 ,Clear Channel Load Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Clear Channel Disable Interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CHEND1 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
bitfld.long 0x00 0. " CHEND0 ,Clear Channel End Interrupt" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "ST2_SR,ST2 Status Register"
|
|
bitfld.long 0x00 25. " CHLD1 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 24. " CHLD0 ,Channel Load Status" "Not loaded,Loaded"
|
|
bitfld.long 0x00 17. " CHDIS1 ,Channel Disable Status" "No effect,Reset"
|
|
bitfld.long 0x00 16. " CHDIS0 ,Channel Disable Status" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 9. " CHENS1 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CHENS0 ,Channel Enable Status" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " CHEND1 ,Channel End Status" "Not ended,Ended"
|
|
bitfld.long 0x00 0. " CHEND0 ,Channel End Status" "Not ended,Ended"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "ST2_IMR,ST2 Interrupt Mask Register"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " CHLD1 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " CHLD0 ,Channel Load Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. -0x08 17. -0x04 17. " CHDIS1 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. -0x08 16. -0x04 16. " CHDIS0 ,Channel Disable Interrupt Mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CHEND1 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " CHEND0 ,Channel End Interrupt Mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x00 "ST2_PR0,ST2 Channel 0 Prescalar Register"
|
|
hexmask.long.word 0x00 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x00 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " PRESCALAR ,Channel 0 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x04 "ST2_CT0,ST2 Channel 0 Counter Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " LOAD ,Channel 0 Preload Value"
|
|
line.long 0x08 "ST2_PR1,ST2 Channel 1 Prescalar Register"
|
|
hexmask.long.word 0x08 8.--18. 1. " SYSCAL ,Module Clock Prescalar Value"
|
|
bitfld.long 0x08 4. " AUTOREL ,Auto Reload" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--3. " PRESCALAR ,Channel 1 Prescalar" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
|
|
line.long 0x0c "ST2_CT1,ST2 Channel 1 Counter Register"
|
|
hexmask.long.word 0x0c 0.--15. 1. " LOAD ,Channel 1 Preload Value"
|
|
rgroup.long 0x200++0x07
|
|
line.long 0x00 "ST2_CCV0,ST2 Current Counter Value 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " COUNT ,Current Counter Value 0 Register"
|
|
line.long 0x04 "ST2_CCV1,ST2 Current Counter Value 1"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT ,Current Counter Value 1 Register"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "SFM (Special Function Module)"
|
|
base ad:0xFFFE4000
|
|
width 10.
|
|
rgroup.long 0x00++0x0B
|
|
line.long 0x00 "SFM_CIDR,SFM Chip Identifier Register"
|
|
hexmask.long.byte 0x00 28.--31. 1. " VER[3:0] ,Version"
|
|
hexmask.long.word 0x00 12.--27. 1. " PN[15:0] ,Part Number"
|
|
hexmask.long.word 0x00 1.--11. 1. " MC[10:0] ,Manufacturer Code"
|
|
line.long 0x04 "SFM_ARCR,SFM Architecture Register"
|
|
bitfld.long 0x04 17. " IRAME ,Internal RAM exists" "Not available,Available"
|
|
bitfld.long 0x04 16. " BOOT ,Memory BOOT" "External,Internal"
|
|
bitfld.long 0x04 15. " NVDE ,Non Volatile Data Memory Exists" "Not available,Available"
|
|
bitfld.long 0x04 12.--14. " NVDT[2:0] ,Non Volatile Data Memory Type" "ROM,EEPROM,FLASH,FRAM,?..."
|
|
textline " "
|
|
bitfld.long 0x04 11. " NVPE ,Non volatile Program Memory Exists" "Not available,Available"
|
|
bitfld.long 0x04 8.--10. " NVPT[2:0] ,Non Volatile Program Memory Type" "ROM,EEPROM,FLASH,FRAM,?..."
|
|
bitfld.long 0x04 0.--1. " ARC[1:0] ,Architecture" "ARM7TDMI,ARM926EJS,ARM946ES,?..."
|
|
line.long 0x08 "SFM_MSR,SFM Memory Size Register"
|
|
hexmask.long.byte 0x08 16.--23. 1. " IRAMS[7:0] ,Internal RAM Size"
|
|
hexmask.long.byte 0x08 8.--15. 1. " NVDMS[7:0] ,Non Volatile Data Memory Size"
|
|
hexmask.long.byte 0x08 0.--7. 1. " NVPMS[7:0] ,Non Volatile Program Memory Size"
|
|
width 11.
|
|
tree.end
|
|
tree "STT (Stamp Timer)"
|
|
base ad:0xFFE30000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "STT_PMSR,STT Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not halted,Halted"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "STT_CR,STT Control Register"
|
|
bitfld.long 0x00 4. " ALARMDIS ,STT alarm disable" "No effect,Disable"
|
|
bitfld.long 0x00 3. " ALARMEN ,STT alarm enable" "No effect,Enable"
|
|
bitfld.long 0x00 2. " CNTDIS ,STT counter disable" "No effect,Disable"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNTEN ,STT counter enable" "No effect,Enable"
|
|
bitfld.long 0x00 0. " SWRST ,STT software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "STT_MR,STT Mode Register"
|
|
bitfld.long 0x00 0. " CNTRST ,Counter Reset" "Reset at 0xA8BFFFFF,Reset at 0xFFFFFFFF"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "STT_CSR,STT Clear Status Register"
|
|
bitfld.long 0x00 4. " ALARMDIS ,Clear alarm disabled" "No effect,Clear"
|
|
bitfld.long 0x00 3. " ALARMEN ,Clear alarm enabled" "No effect,Clear"
|
|
bitfld.long 0x00 2. " CNTDIS ,Clear counter disabled" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " CNTEN ,Clear counter enabled" "No effect,Clear"
|
|
bitfld.long 0x00 0. " ALARM ,Clear alarm interrupt" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "STT_SR,STT Status Register"
|
|
bitfld.long 0x00 9. " ALARMENS ,Alarm enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " CNTENS ,Counter enable status" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " WSEC ,Write Counter" "Not occurred,Occurred"
|
|
bitfld.long 0x00 4. " ALARMDIS ,Alarm disabled interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ALARMEN ,Alarm enabled interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 2. " CNTDIS ,Counter disabled interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " CNTEN ,Counter enabled interrupt" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ALARM ,Alarm interrupt" "Not occurred,Occurred"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "STT_IMR,STT Interrupt Mask Register"
|
|
setclrfld.long 0x00 4. -0x08 4. -0x04 4. " ALARMDIS ,Alarm interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " ALARMEN ,Alarm interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " CNTDIS ,Counter interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " CNTEN ,Counter interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " ALARM ,Alarm interrupt mask" "Disabled,Enabled"
|
|
group.long 0x80++0x07
|
|
line.long 0x00 "STT_CNT,STT Seconds Register"
|
|
hexmask.long 0x00 0.--31. 1. " COUNT[31:0] ,Counter registers"
|
|
line.long 0x04 "STT_ALR,STT Alarm Register"
|
|
hexmask.long 0x04 0.--31. 1. " ALARMREG[31:0] ,Alarm register"
|
|
width 11.
|
|
tree.end
|
|
tree "SMC (Stepper Motor Controller)"
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR"||cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "SMC0"
|
|
base ad:0xFFE74000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC0_PMSR,SMC0 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC0 ,SMC0 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC0_CR,SMC0 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC0DIS ,Disable SMC0" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC0EN ,Enable SMC0" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC0 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC0_MR,SMC0 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC0FM ,SMC0 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC0_CSR,SMC0 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC0_SR,SMC0 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC0ENS , SMC0 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC0_IMR,SMC0 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC0_DLY0,SMC0 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC0_PUL0,SMC0 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC0_DLY1,SMC0 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC0_PUL1,SMC0 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE74000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC0_TPR,SMC0 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC0_TPR,SMC0 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC0_CPR,SMC0 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
tree "SMC1"
|
|
base ad:0xFFE78000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC1_PMSR,SMC1 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC1 ,SMC1 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC1_CR,SMC1 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC1DIS ,Disable SMC1" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC1EN ,Enable SMC1" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC1 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC1_MR,SMC1 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC1FM ,SMC1 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC1_CSR,SMC1 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC1_SR,SMC1 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC1ENS , SMC1 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC1_IMR,SMC1 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC1_DLY0,SMC1 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC1_PUL0,SMC1 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC1_DLY1,SMC1 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC1_PUL1,SMC1 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE78000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC1_TPR,SMC1 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC1_TPR,SMC1 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC1_CPR,SMC1 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
tree "SMC2"
|
|
base ad:0xFFE7C000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC2_PMSR,SMC2 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC2 ,SMC2 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC2_CR,SMC2 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC2DIS ,Disable SMC2" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC2EN ,Enable SMC2" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC2 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC2_MR,SMC2 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC2FM ,SMC2 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC2_CSR,SMC2 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC2_SR,SMC2 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC2ENS , SMC2 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC2_IMR,SMC2 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC2_DLY0,SMC2 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC2_PUL0,SMC2 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC2_DLY1,SMC2 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC2_PUL1,SMC2 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE7C000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC2_TPR,SMC2 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC2_TPR,SMC2 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC2_CPR,SMC2 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
tree "SMC3"
|
|
base ad:0xFFE80000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC3_PMSR,SMC3 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC3 ,SMC3 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC3_CR,SMC3 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC3DIS ,Disable SMC3" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC3EN ,Enable SMC3" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC3 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC3_MR,SMC3 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC3FM ,SMC3 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC3_CSR,SMC3 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC3_SR,SMC3 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC3ENS , SMC3 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC3_IMR,SMC3 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC3_DLY0,SMC3 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC3_PUL0,SMC3 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC3_DLY1,SMC3 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC3_PUL1,SMC3 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE80000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC3_TPR,SMC3 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC3_TPR,SMC3 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC3_CPR,SMC3 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "SMC4"
|
|
base ad:0xFFE84000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC4_PMSR,SMC4 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC4 ,SMC4 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC4_CR,SMC4 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC4DIS ,Disable SMC4" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC4EN ,Enable SMC4" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC4 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC4_MR,SMC4 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC4FM ,SMC4 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC4_CSR,SMC4 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC4_SR,SMC4 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC4ENS , SMC4 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC4_IMR,SMC4 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC4_DLY0,SMC4 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC4_PUL0,SMC4 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC4_DLY1,SMC4 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC4_PUL1,SMC4 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE84000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC4_TPR,SMC4 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC4_TPR,SMC4 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC4_CPR,SMC4 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
tree "SMC5"
|
|
base ad:0xFFE88000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "SMC5_PMSR,SMC5 Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,Version number"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " SMC5 ,SMC5 clock" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "SMC5_CR,SMC5 Control Register"
|
|
bitfld.long 0x00 11. " PWMSTP1 ,Stop PWM channel 1" "No effect,Stop"
|
|
bitfld.long 0x00 10. " PWMSTT1 ,Start PWM channel 1" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 9. " PWMSTP0 ,Stop PWM channel 0" "No effect,Stop"
|
|
bitfld.long 0x00 8. " PWMSTT0 ,Start PWM channel 0" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MSTP ,Motor stop" "No effect,Stop"
|
|
bitfld.long 0x00 4. " MSTT ,Motor start" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SMC5DIS ,Disable SMC5" "No effect,Disable"
|
|
bitfld.long 0x00 1. " SMC5EN ,Enable SMC5" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,SMC5 software reset" "No effect,Reset"
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "SMC5_MR,SMC5 Mode Register"
|
|
bitfld.long 0x00 31. " PL1 ,Pulse on channel 1" "Low,High"
|
|
bitfld.long 0x00 30. " PL0 ,Pulse on channel 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " DM[2:0] ,Driving method" "One phase on,Two phase on,Half stepping,Cosinus/Sinus microstepping,High torque microstepping,?..."
|
|
bitfld.long 0x00 19.--20. " NMSQ[1:0] ,Number of microstep by sinusoid quarter" "2,4,8,16"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " NCM[2:0] ,Number of PWM cycle by microstep" "1,2,4,8,16,32,64,128"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SDIV[7:0] ,Sub clock divider"
|
|
textline " "
|
|
bitfld.long 0x00 7. " SMC5FM ,SMC5 functional mode" "PWM generator,Stepper motor controller"
|
|
bitfld.long 0x00 6. " CONT ,Continuous mode" "Target,Continuous"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRESCAL[4:0] ,Clock prescalar" "PCLK,PCLK/2,PCLK/4,PCLK/8,PCLK/16,PCLK/32,PCLK/64,PCLK/128,PCLK/256,PCLK/512,PCLK/1024,PCLK/2048,PCLK/4096,PCLK/8192,PCLK/16384,PCLK/32768,PCLK/65536,PCLK/131072,PCLK/262144,PCLK/524288,PCLK/1048576,PCLK/2097152,PCLK/4194304,PCLK/8388608,PCLK/16777216,PCLK/33554432,PCLK/67108864,PCLK/134217728,PCLK/268435456,PCLK/536870912,PCLK/1073741824,PCLK/2147483648"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "SMC5_CSR,SMC5 Clear Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No effect,Clear"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PEND1 ,Clear pulse end interrupt on channel 1" "No effect,Clear"
|
|
bitfld.long 0x00 2. " PSTA1 ,Clear pulse start interrupt on channel 1" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 1. " PEND0 ,Clear pulse end interrupt on channel 0" "No effect,Clear"
|
|
bitfld.long 0x00 0. " PSTA0 ,Clear pulse start interrupt on channel 0" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "SMC5_SR,SMC5 Status Register"
|
|
bitfld.long 0x00 10. " CPO ,Current Position Overflow" "No overflow,Overflow"
|
|
bitfld.long 0x00 9. " PR ,Position Reached" "Not reached,Reached"
|
|
textline " "
|
|
bitfld.long 0x00 8. " SMC5ENS , SMC5 module enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " PEND1 ,Pulse end interrupt on channel 1" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 2. " PSTA1 , Pulse start interrupt on channel 1" "Not started,Started"
|
|
bitfld.long 0x00 1. " PEND0 , Pulse end interrupt on channel 0" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.long 0x00 0. " PSTA0 , Pulse start interrupt on channel 0" "Not started,Started"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "SMC5_IMR,SMC5 Interrupt Mask Register"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " CPO ,Current Position Overflow interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " PR ,Position Reached interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 3. -0x08 3. -0x04 3. " PEND1 ,Clear pulse end interrupt on channel 1 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " PSTA1 ,Clear pulse start interrupt on channel 1 mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " PEND0 ,Clear pulse end interrupt on channel 0 mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " PSTA0 ,Clear pulse start interrupt on channel 0 mask" "Disabled,Enabled"
|
|
group.long 0x80++0x0F
|
|
line.long 0x0 "SMC5_DLY0,SMC5 Delay Register 0"
|
|
hexmask.long.byte 0x0 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x0+0x04 "SMC5_PUL0,SMC5 Pulse Register 0"
|
|
hexmask.long.byte 0x0+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
line.long 0x8 "SMC5_DLY1,SMC5 Delay Register 1"
|
|
hexmask.long.byte 0x8 0.--7. 1. " DELAY[7:0] ,Delay width"
|
|
line.long 0x8+0x04 "SMC5_PUL1,SMC5 Pulse Register 1"
|
|
hexmask.long.byte 0x8+0x04 0.--7. 1. " PULSE[7:0] ,Pulse width"
|
|
if (((d.l(ad:0xFFE88000+0x64)&0x20))==0x00)
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC5_TPR,SMC5 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
else
|
|
group.long 0x98++0x03
|
|
line.long 0x00 "SMC5_TPR,SMC5 Target Position Register"
|
|
bitfld.long 0x00 15. " DIR_SIGN ,Direction or sign" "Forward,Reverse"
|
|
hexmask.long.word 0x00 0.--14. 1. " RP[14:0] ,Requested position"
|
|
endif
|
|
rgroup.long 0x9C++0x03
|
|
line.long 0x00 "SMC5_CPR,SMC5 Current Position Register"
|
|
bitfld.long 0x00 15. " NEG ,Negative position" "Positive,Negative"
|
|
hexmask.long.word 0x00 0.--14. 1. " CP[14:0] ,Current position"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "USART (UNIVERSAL SYNC/ASYNC RECEIVER/TRANSMITTER)"
|
|
tree "UART0"
|
|
base ad:0xFFE28000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "US_PMSR,USART Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,IP identifier code"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " USART ,USART clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "US_CR,USART Control Register"
|
|
bitfld.long 0x00 17. " STRESP ,Start Response" "No effect,Send"
|
|
bitfld.long 0x00 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x00 11. " STTT0 ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(ad:0xFFE28000+0x64)&0x64))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "US_CSR,USART Clear Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "No effect,Clear"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ENDTX ,End of transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of reception" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "Not detected,Detected"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Idle flag" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No idle,Idle"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Character waiting,No character"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not ready,Ready"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "US_IMR,USART Interrupt Mask Register"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " WAKEUP ,Wake Up interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CHECKSUM ,Check Sum interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " IPERROR ,Identity Parity Error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " BITERROR ,Bit Error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " NOTRESP ,Not Responding error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " ENDMESS ,End of Message interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " ENDHEADER ,End of Header interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " IDLE ,Idle interrupt interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY ,Transmitter empty interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT ,Receiver time-out interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE ,Parity error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME ,Framing error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK ,Break received/end interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY ,Transmitter ready interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY ,Receiver ready interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0x2080++0x03
|
|
line.long 0x00 "US_RHR,USART Receiver Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXCHR[8:0] ,Received character"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR[8:0] ,Character to be transmitted"
|
|
group.long 0x88++0x0B
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD[15:0] ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO[15:0] ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG[7:0] ,Time-guard Value"
|
|
if (((d.l(ad:0xFFE28000+0x64))&0x80000)==0x00)
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " IDENTIFIER[5:4] ,Number of data field" "2,2,4,8"
|
|
else
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--5. " IDENTIFIER[5:0] ,LIN identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be transmitted"
|
|
line.long 0x04 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be transmitted"
|
|
rgroup.long 0xA0++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be received"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK[4:0] ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 11.
|
|
tree.end
|
|
sif (cpu()=="S3F4A1HJ"||cpu()=="S3F4A1HR"||cpu()=="S3F4A0KJ"||cpu()=="S3F4A0KR")
|
|
tree "UART1"
|
|
base ad:0xFFE34000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "US_PMSR,USART Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,IP identifier code"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " USART ,USART clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "US_CR,USART Control Register"
|
|
bitfld.long 0x00 17. " STRESP ,Start Response" "No effect,Send"
|
|
bitfld.long 0x00 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x00 11. " STTT0 ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(ad:0xFFE34000+0x64)&0x64))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "US_CSR,USART Clear Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "No effect,Clear"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ENDTX ,End of transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of reception" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "Not detected,Detected"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Idle flag" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No idle,Idle"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Character waiting,No character"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not ready,Ready"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "US_IMR,USART Interrupt Mask Register"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " WAKEUP ,Wake Up interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CHECKSUM ,Check Sum interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " IPERROR ,Identity Parity Error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " BITERROR ,Bit Error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " NOTRESP ,Not Responding error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " ENDMESS ,End of Message interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " ENDHEADER ,End of Header interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " IDLE ,Idle interrupt interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY ,Transmitter empty interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT ,Receiver time-out interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE ,Parity error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME ,Framing error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK ,Break received/end interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY ,Transmitter ready interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY ,Receiver ready interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0x2080++0x03
|
|
line.long 0x00 "US_RHR,USART Receiver Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXCHR[8:0] ,Received character"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR[8:0] ,Character to be transmitted"
|
|
group.long 0x88++0x0B
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD[15:0] ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO[15:0] ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG[7:0] ,Time-guard Value"
|
|
if (((d.l(ad:0xFFE34000+0x64))&0x80000)==0x00)
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " IDENTIFIER[5:4] ,Number of data field" "2,2,4,8"
|
|
else
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--5. " IDENTIFIER[5:0] ,LIN identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be transmitted"
|
|
line.long 0x04 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be transmitted"
|
|
rgroup.long 0xA0++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be received"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK[4:0] ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 11.
|
|
tree.end
|
|
endif
|
|
tree "USART0"
|
|
base ad:0xFFE38000
|
|
width 10.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "US_PMSR,USART Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,PWM freezed"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,IP identifier code"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " USART ,USART clock status" "Disabled,Enabled"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "US_CR,USART Control Register"
|
|
bitfld.long 0x00 17. " STRESP ,Start Response" "No effect,Send"
|
|
bitfld.long 0x00 16. " STHEADER ,Start Header" "No effect,Send"
|
|
bitfld.long 0x00 12. " SENDA ,Send Address" "No effect,Send"
|
|
bitfld.long 0x00 11. " STTT0 ,Start Time-out" "No effect,Start"
|
|
textline " "
|
|
bitfld.long 0x00 10. " STPBRK ,Stop Break" "No effect,Stop"
|
|
bitfld.long 0x00 9. " STTBRK ,Start Break" "No effect,Start"
|
|
bitfld.long 0x00 7. " TXDIS ,Transmitter disabled" "No effect,Disable"
|
|
bitfld.long 0x00 6. " TXEN ,Transmitter Enable" "No effect,Enable"
|
|
textline " "
|
|
bitfld.long 0x00 5. " RXDIS ,Receiver Disable" "No effect,Disable"
|
|
bitfld.long 0x00 4. " RXEN ,Receiver Enable" "No effect,Enable"
|
|
bitfld.long 0x00 3. " RSTTX ,Reset Transmitter" "No effect,Reset"
|
|
bitfld.long 0x00 2. " RSTRX ,Reset Receiver" "No effect,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " SWRST ,Software reset" "No effect,Reset"
|
|
if (((d.l(ad:0xFFE38000+0x64)&0x64))==0x00)
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,1.5,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x64++0x03
|
|
line.long 0x00 "US_MR,USART Mode Register"
|
|
bitfld.long 0x00 19. " LIN2_0 ,Select the LIN protocol release" "LIN 1.2,LIN 2.0"
|
|
bitfld.long 0x00 18. " CLKO ,Clock output select" "Pin not driven,Pin driven"
|
|
bitfld.long 0x00 17. " MODE9 ,9-bit character length" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " SMCARDPT ,Smart Card protocol" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " CHMODE[1:0] ,Channel mode" "Normal mode,Automatic echo,Local loopback,Remote loopback"
|
|
bitfld.long 0x00 12.--13. " NBSTOP[1:0] ,Number of stop bits" "1,Reserved,2,?..."
|
|
bitfld.long 0x00 9.--11. " PAR[2:0] ,Parity type" "Even parity,Odd Parity,Parity forced to 0,Parity forced to 1,No parity,No parity,Multi-drop mode,Multi-drop mode"
|
|
bitfld.long 0x00 8. " SYNC ,Synchronous mode select" "Asynchronous Mode,Synchronous Mode"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CHRL[1:0] ,Character length" "5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " CLKS[1:0] ,Clock selection (baud rate generator input clock)" "PCLK,PCLK/8,External clock,External clock"
|
|
bitfld.long 0x00 1.--3. " SENDTIME[2:0] ,Maximum number of repetitions a character has to be transmitted" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0. " LIN ,Local Interconnect Network mode" "Disabled,Enabled"
|
|
endif
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "US_CSR,USART Clear Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "No effect,Clear"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "No effect,Clear"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "No effect,Clear"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "No effect,Clear"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "No effect,Clear"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "No effect,Clear"
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "No effect,Clear"
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No effect,Clear"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "No effect,Clear"
|
|
bitfld.long 0x00 4. " ENDTX ,End of transmission" "No effect,Clear"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ENDRX ,End of reception" "No effect,Clear"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "US_SR,USART Status Register"
|
|
bitfld.long 0x00 30. " WAKEUP ,Wake Up" "Not detected,Detected"
|
|
bitfld.long 0x00 29. " CHECKSUM ,Check Sum" "Not detected,Detected"
|
|
bitfld.long 0x00 28. " IPERROR ,Identity Parity Error" "Not detected,Detected"
|
|
bitfld.long 0x00 27. " BITERROR ,Bit Error" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 26. " NOTRESP ,Not Responding error" "Not detected,Detected"
|
|
bitfld.long 0x00 25. " ENDMESS ,End of Message" "Not occurred,Occurred"
|
|
bitfld.long 0x00 24. " ENDHEADER ,End of Header" "Not occurred,Occurred"
|
|
bitfld.long 0x00 11. " IDLEFLAG ,Idle flag" "Received,Not received"
|
|
textline " "
|
|
bitfld.long 0x00 10. " IDLE ,Idle interrupt" "No idle,Idle"
|
|
bitfld.long 0x00 9. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 8. " TIMEOUT ,Receiver time-out" "Not occurred,Occurred"
|
|
bitfld.long 0x00 7. " PARE ,Parity error" "Not false,False"
|
|
textline " "
|
|
bitfld.long 0x00 6. " FRAME ,Framing error" "No error,Error"
|
|
bitfld.long 0x00 5. " OVRE ,Overrun error" "Not transferred,Transferred"
|
|
bitfld.long 0x00 2. " RXBRK ,Break received/end" "Not detected,Detected"
|
|
bitfld.long 0x00 1. " TXRDY ,Transmitter ready" "Character waiting,No character"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXRDY ,Receiver ready" "Not ready,Ready"
|
|
group.long 0x7C++0x03
|
|
line.long 0x00 "US_IMR,USART Interrupt Mask Register"
|
|
setclrfld.long 0x00 30. -0x08 30. -0x04 30. " WAKEUP ,Wake Up interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. -0x08 29. -0x04 29. " CHECKSUM ,Check Sum interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. -0x08 28. -0x04 28. " IPERROR ,Identity Parity Error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. -0x08 27. -0x04 27. " BITERROR ,Bit Error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 26. -0x08 26. -0x04 26. " NOTRESP ,Not Responding error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 25. -0x08 25. -0x04 25. " ENDMESS ,End of Message interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. -0x08 24. -0x04 24. " ENDHEADER ,End of Header interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. -0x08 10. -0x04 10. " IDLE ,Idle interrupt interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 9. -0x08 9. -0x04 9. " TXEMPTY ,Transmitter empty interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. -0x08 8. -0x04 8. " TIMEOUT ,Receiver time-out interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 7. -0x08 7. -0x04 7. " PARE ,Parity error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. -0x08 6. -0x04 6. " FRAME ,Framing error interrupt mask" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 5. -0x08 5. -0x04 5. " OVRE ,Overrun error interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. -0x08 2. -0x04 2. " RXBRK ,Break received/end interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " TXRDY ,Transmitter ready interrupt mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " RXRDY ,Receiver ready interrupt mask" "Disabled,Enabled"
|
|
rgroup.long 0x2080++0x03
|
|
line.long 0x00 "US_RHR,USART Receiver Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " RXCHR[8:0] ,Received character"
|
|
wgroup.long 0x84++0x03
|
|
line.long 0x00 "US_THR,USART Transmit Holding Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " TXCHR[8:0] ,Character to be transmitted"
|
|
group.long 0x88++0x0B
|
|
line.long 0x00 "US_BRGR,USART Baud Rate Generator Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " CD[15:0] ,Clock Divider"
|
|
line.long 0x04 "US_RTOR,USART Receiver Time-Out Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " TO[15:0] ,Time-out value"
|
|
line.long 0x08 "US_TTGR,USART Transmit Time-Guard Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " TG[7:0] ,Time-guard Value"
|
|
if (((d.l(ad:0xFFE38000+0x64))&0x80000)==0x00)
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 4.--5. " IDENTIFIER[5:4] ,Number of data field" "2,2,4,8"
|
|
else
|
|
group.long 0x94++0x03
|
|
line.long 0x00 "US_LIR,USART LIN Identifier Register"
|
|
hexmask.long.word 0x00 16.--29. 1. " WAKE_UP_TIME[13:0] ,Wake up time for the LIN2.0 release"
|
|
bitfld.long 0x00 9. " CHK_SEL ,Checksum selection" "Classic,Enhanced"
|
|
bitfld.long 0x00 6.--8. " NDATA[2:0] ,Number of data field for the LIN2.0 release" "1,2,3,4,5,6,7,8"
|
|
bitfld.long 0x00 0.--5. " IDENTIFIER[5:0] ,LIN identifier" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
|
|
endif
|
|
group.long 0x98++0x07
|
|
line.long 0x00 "US_DFWR0,USART Data Field Write 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be transmitted"
|
|
line.long 0x04 "US_DFWR1,USART Data Field Write 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be transmitted"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be transmitted"
|
|
rgroup.long 0xA0++0x07
|
|
line.long 0x00 "US_DFRR0,USART Data Field Read 0 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " DATA3[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DATA2[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 8.--15. 1. " DATA1[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x00 0.--7. 1. " DATA0[7:0] ,LINs byte field to be received"
|
|
line.long 0x04 "US_DFRR1,USART Data Field Read 1 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " DATA7[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 16.--23. 1. " DATA6[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 8.--15. 1. " DATA5[7:0] ,LINs byte field to be received"
|
|
hexmask.long.byte 0x04 0.--7. 1. " DATA4[7:0] ,LINs byte field to be received"
|
|
group.long 0xA8++0x03
|
|
line.long 0x00 "US_SBLR,USART Synchronous Break Length Register"
|
|
bitfld.long 0x00 0.--4. " SYNC_BRK[4:0] ,Synchronous break length" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
width 11.
|
|
tree.end
|
|
tree.end
|
|
tree "WD (Watchdog)"
|
|
base ad:0xFFE14000
|
|
width 9.
|
|
group.long 0x58++0x03
|
|
line.long 0x00 "WD_PMSR,WD Power Management Status Register"
|
|
setclrfld.long 0x00 31. -0x08 31. -0x04 31. " DBGEN ,Debug mode" "Not influenced,Influenced"
|
|
hexmask.long 0x00 4.--29. 1. " IPIDCODE[25:0] ,IP identifier code"
|
|
wgroup.long 0x60++0x03
|
|
line.long 0x00 "WD_CR,WD Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " RSTKEY[15:0] ,Restart Key"
|
|
group.long 0x64++0x07
|
|
line.long 0x00 "WD_MR,WD Mode Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " CKEY[7:0] ,Clock Access Key"
|
|
hexmask.long.word 0x00 8.--23. 1. " PCV[15:0] ,Preload Counter Value"
|
|
bitfld.long 0x00 0.--2. " WDPDIV[2:0] ,WD Clock Divider" "LFCLK/2,LFCLK/4,LFCLK/8,LFCLK/16,LFCLK/32,LFCLK/128,LFCLK/256,LFCLK/512"
|
|
line.long 0x04 "WD_OMR,WD Overflow Mode Register"
|
|
hexmask.long.word 0x04 4.--15. 1. " OKEY[11:0] ,Overflow Access Key"
|
|
bitfld.long 0x04 1. " RSTEN ,Reset Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 0. " WDEN ,Watchdog Enable" "Disabled,Enabled"
|
|
wgroup.long 0x6C++0x03
|
|
line.long 0x00 "WD_CSR,WD Clear Status Register"
|
|
bitfld.long 0x00 1. " WDOVF ,Watchdog Overflow Clear" "No effect,Clear"
|
|
bitfld.long 0x00 0. " WDPEND ,Watchdog Pending Clear" "No effect,Clear"
|
|
rgroup.long 0x70++0x03
|
|
line.long 0x00 "WD_SR,WD Status Register"
|
|
bitfld.long 0x00 9. " CLEAR_STATUS ,Clear Status" "No reset,Reset"
|
|
bitfld.long 0x00 8. " PENDING ,Watchdog Pending Status" "Over window,Equal or less window"
|
|
bitfld.long 0x00 1. " WDOVF ,Watchdog Overflow" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 0. " WDPEND ,Watchdog Pending" "Not pending,Pending"
|
|
group.long 0x7C++0x0B
|
|
line.long 0x00 "WD_IMR,WD Interrupt Mask Register"
|
|
setclrfld.long 0x00 1. -0x08 1. -0x04 1. " WDOVF ,Watchdog Overflow Interrupt Mask" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. -0x08 0. -0x04 0. " WDPEND ,Watchdog Pending Interrupt Mask" "Disabled,Enabled"
|
|
rgroup.long 0x80++0x07
|
|
line.long 0x00 "WD_PWR,WD Pending Window Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " PWKEY[7:0] ,Pending Window Access Key"
|
|
hexmask.long.word 0x00 8.--23. 1. " PWL[15:0] ,Pending Window Length"
|
|
bitfld.long 0x00 0. " RSTALW ,Restart Allowed" "Every time,Within window"
|
|
line.long 0x04 "WD_CTR,WD Counter Test Register"
|
|
bitfld.long 0x04 16. " RESET ,Watchdog counter resetting" "Not occurred/achieved,Pending"
|
|
hexmask.long.word 0x04 0.--15. 1. " COUNT[15:0] ,Counter"
|
|
width 11.
|
|
tree.end
|
|
textline ""
|