1477 lines
94 KiB
Plaintext
1477 lines
94 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: S3C3410xx On-Chip Peripherals
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; @Props: Released
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; @Author: GAC
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; @Changelog: 2005-08-19 GAC
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; @Manufacturer: SAMSUNG - Samsung Semiconductor
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; @Core: ARM7TDMI
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pers3c3410xx.per 17452 2024-02-06 13:06:55Z kwisniewski $
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config 16. 8.
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width 0x0b
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base ad:0x07ff0000
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tree "System Manager"
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group 0x1000++0x03
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line.long 0x00 "SYSCFG0,System Configuration Register"
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bitfld.long 0x00 20.--21. " MT1 ,Memory Type 1" "ROM/Flash/SRAM,FP DRAM,EDO DRAM,Synchronous DRAM"
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bitfld.long 0x00 18.--19. " MT0 ,Memory Type 0" "ROM/Flash/SRAM,FP DRAM,EDO DRAM,Synchronous DRAM"
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bitfld.long 0x00 17. " AME ,Address Mux Enable" "Normal,Multiplexed"
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bitfld.long 0x00 15.--16. " CM ,Cache Mode" "Half,Full,Disabled,Not used"
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textline " "
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hexmask.long 0x00 4.--14. 0x010000 " SFRSA ,SYSCFG Address (SFRs Start Address)"
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bitfld.long 0x00 2. " WE ,Write Buffer Enable" "Disabled,Enabled"
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bitfld.long 0x00 1. " CE ,Cache Enable" "Disabled,Enabled"
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bitfld.long 0x00 0. " ST ,Stall Enable" "Disabled,Enabled"
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group 0x2000++0x17
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line.long 0x00 "BANKCON0,Bank 0 timing control register (for ROM/Flash)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x00 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x00 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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line.long 0x04 "BANKCON1,Bank 1 timing control register (for ROM/Flash/SRAM)"
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hexmask.long 0x04 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x04 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x04 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x04 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x04 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x04 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x04 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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line.long 0x08 "BANKCON2,Bank 2 timing control register (for ROM/Flash/SRAM)"
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hexmask.long 0x08 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x08 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x08 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x08 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x08 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x08 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x08 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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line.long 0x0c "BANKCON3,Bank 3 timing control register (for ROM/Flash/SRAM)"
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hexmask.long 0x0c 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x0c 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x0c 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x0c 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x0c 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x0c 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x0c 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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line.long 0x10 "BANKCON4,Bank 4 timing control register (for ROM/Flash/SRAM)"
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hexmask.long 0x10 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x10 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x10 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x10 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x10 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x10 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x10 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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line.long 0x14 "BANKCON5,Bank 5 timing control register (for ROM/Flash/SRAM)"
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hexmask.long 0x14 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x14 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x14 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x14 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x14 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x14 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x14 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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if (((data.long(d:(0x07ff0000+0x1000)))&0x0c0000)==0x00)
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group 0x2018++0x03
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line.long 0x00 "BANKCON6,Bank 6 timing control register (ROM/SRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x00 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x00 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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elif ((((data.long(d:(0x07ff0000+0x1000)))&0x0c0000)==0x040000)||(((data.long(d:(0x07ff0000+0x1000)))&0x0c0000)==0x080000))
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group 0x2018++0x03
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line.long 0x00 "BANKCON6,Bank 6 timing control register (FP DRAM/EDO DRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 8.--9. " TRP ,RAS Pre-charge Time" "1 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 7. " TRC ,RAS to CAS Delay Time" "1 Clock,2 Clock"
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textline " "
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bitfld.long 0x00 4.--6. " TCAS ,CAS Pulse Width" "1 Clock,2 Clock,3 Clock,4 Clock,5 Clock,Not used,Not used,Disabled"
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bitfld.long 0x00 3. " TCP ,CAS Pre-charge Time" "1 Clock,2 Clock"
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bitfld.long 0x00 1.--2. " CAN ,Column Address Number for DRAM (FP and EDO DRAM)" "8-bit,9-bit,10-bit,11-bit"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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elif (((data.long(d:(0x07ff0000+0x1000)))&0x0c0000)==0x0c0000)
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group 0x2018++0x03
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line.long 0x00 "BANKCON6,Bank 6 timing control register (Synchronous DRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 8.--9. " TRP ,RAS Pre-charge Time" "1 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 7. " TRC ,RAS to CAS Delay Time" "1 Clock,2 Clock"
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textline " "
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bitfld.long 0x00 1.--2. " CAN ,Column Address Number of SDRAM" "8-bit,9-bit,10-bit,11-bit"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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endif
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if (((data.long(d:(0x07ff0000+0x1000)))&0x300000)==0x00)
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group 0x201c++0x03
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line.long 0x00 "BANKCON7,Bank 7 timing control register (ROM/SRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 7.--8. " TACP ,Determine the number of Page mode access cycle at page mode" "5 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 4.--6. " TACC ,Determine the number of Access Cycle" "Disabled,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,10 Clock"
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textline " "
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bitfld.long 0x00 3. " SM ,SRAM Mode" "Ordinary,x16 type SRAM"
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bitfld.long 0x00 1.--2. " PMC ,Determines the page mode configuration for ROM access" "1 Data,4 Data,8 Data,16 Data"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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elif ((((data.long(d:(0x07ff0000+0x1000)))&0x300000)==0x100000)||(((data.long(d:(0x07ff0000+0x1000)))&0x300000)==0x200000))
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group 0x201c++0x03
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line.long 0x00 "BANKCON7,Bank 7 timing control register (FP DRAM/EDO DRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 8.--9. " TRP ,RAS Pre-charge Time" "1 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 7. " TRC ,RAS to CAS Delay Time" "1 Clock,2 Clock"
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textline " "
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bitfld.long 0x00 4.--6. " TCAS ,CAS Pulse Width" "1 Clock,2 Clock,3 Clock,4 Clock,5 Clock,Not used,Not used,Disabled"
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bitfld.long 0x00 3. " TCP ,CAS Pre-charge Time" "1 Clock,2 Clock"
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bitfld.long 0x00 1.--2. " CAN ,Column Address Number for DRAM (FP and EDO DRAM)" "8-bit,9-bit,10-bit,11-bit"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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elif (((data.long(d:(0x07ff0000+0x1000)))&0x300000)==0x300000)
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group 0x201c++0x03
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line.long 0x00 "BANKCON7,Bank 7 timing control register (Synchronous DRAM)"
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hexmask.long 0x00 21.--31. 0x010000 " EAP ,Memory Bank End Address Pointer"
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hexmask.long 0x00 10.--20. 0x010000 " BAP ,Memory Bank Base Address Pointer"
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bitfld.long 0x00 8.--9. " TRP ,RAS Pre-charge Time" "1 Clock,2 Clock,3 Clock,4 Clock"
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bitfld.long 0x00 7. " TRC ,RAS to CAS Delay Time" "1 Clock,2 Clock"
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textline " "
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bitfld.long 0x00 1.--2. " CAN ,Column Address Number of SDRAM" "8-bit,9-bit,10-bit,11-bit"
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bitfld.long 0x00 0. " DBW ,Data Bus Width" "8-bit,16-bit"
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endif
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group 0x2020++0x03
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line.long 0x00 "REFCON,DRAM Refresh Control Register"
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bitfld.long 0x00 16. " TCSR ,CAS Set-up Time" "1 Clock,2 Clock"
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bitfld.long 0x00 13.--15. " TCH ,CAS Hold Time" "1 Clock,2 Clock,3 Clock,4 Clock,5 Clock,Not used,Not used,Not used"
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bitfld.long 0x00 12. " REN ,Refresh Enable" "Disabled,Enabled"
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hexmask.long.word 0x00 1.--11. 1. " RC ,Refresh Interval (Refresh Count)"
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textline " "
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bitfld.long 0x00 0. " VSMR ,Validity of Special Memory Register (SMR)" "Not accessible,Accessible"
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group 0x2030++0x0f
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line.long 0x00 "EXTCON0,Extra device control register 0"
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bitfld.long 0x00 11.--13. " TACC ,Access Times (nOE low time)" "0 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,8 Clock"
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bitfld.long 0x00 8.--10. " TCOH ,Hold Time of nECS after nOE" "0 Clock,0 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock"
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bitfld.long 0x00 2.--4. " TCOS ,Set-up Time of nECS before nOE" "0 Clock,1 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock"
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bitfld.long 0x00 0.--1. " DW ,Data Bus Width" "Disabled,8-bit,16-bit,Not used"
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line.long 0x04 "EXTCON1,Extra device control register 1"
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bitfld.long 0x04 11.--13. " TACC ,Access Times (nOE low time)" "0 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock,8 Clock"
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bitfld.long 0x04 8.--10. " TCOH ,Hold Time of nECS after nOE" "0 Clock,0 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock"
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bitfld.long 0x04 2.--4. " TCOS ,Set-up Time of nECS before nOE" "0 Clock,1 Clock,2 Clock,3 Clock,4 Clock,5 Clock,6 Clock,7 Clock"
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bitfld.long 0x04 0.--1. " DW ,Data Bus Width" "Disabled,8-bit,16-bit,Not used"
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line.word 0x0e "EXTPORT,External port data register"
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tree "External Chip Selection Data Registers 0"
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tree "External Chip Selection Data Registers 0 0-31"
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group 0x202C++0x01
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line.word 0x00 "EXTDAT0_00,Extra chip selection data register 0_00"
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group 0x206C++0x01
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line.word 0x00 "EXTDAT0_01,Extra chip selection data register 0_01"
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group 0x20AC++0x01
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line.word 0x00 "EXTDAT0_02,Extra chip selection data register 0_02"
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group 0x20EC++0x01
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line.word 0x00 "EXTDAT0_03,Extra chip selection data register 0_03"
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group 0x212C++0x01
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line.word 0x00 "EXTDAT0_04,Extra chip selection data register 0_04"
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group 0x216C++0x01
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line.word 0x00 "EXTDAT0_05,Extra chip selection data register 0_05"
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group 0x21AC++0x01
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line.word 0x00 "EXTDAT0_06,Extra chip selection data register 0_06"
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group 0x21EC++0x01
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line.word 0x00 "EXTDAT0_07,Extra chip selection data register 0_07"
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group 0x222C++0x01
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line.word 0x00 "EXTDAT0_08,Extra chip selection data register 0_08"
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group 0x226C++0x01
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line.word 0x00 "EXTDAT0_09,Extra chip selection data register 0_09"
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group 0x22AC++0x01
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line.word 0x00 "EXTDAT0_10,Extra chip selection data register 0_10"
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group 0x22EC++0x01
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line.word 0x00 "EXTDAT0_11,Extra chip selection data register 0_11"
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group 0x232C++0x01
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line.word 0x00 "EXTDAT0_12,Extra chip selection data register 0_12"
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group 0x236C++0x01
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line.word 0x00 "EXTDAT0_13,Extra chip selection data register 0_13"
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group 0x23AC++0x01
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line.word 0x00 "EXTDAT0_14,Extra chip selection data register 0_14"
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group 0x23EC++0x01
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line.word 0x00 "EXTDAT0_15,Extra chip selection data register 0_15"
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group 0x242C++0x01
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line.word 0x00 "EXTDAT0_16,Extra chip selection data register 0_16"
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group 0x246C++0x01
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line.word 0x00 "EXTDAT0_17,Extra chip selection data register 0_17"
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group 0x24AC++0x01
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line.word 0x00 "EXTDAT0_18,Extra chip selection data register 0_18"
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group 0x24EC++0x01
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line.word 0x00 "EXTDAT0_19,Extra chip selection data register 0_19"
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group 0x252C++0x01
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line.word 0x00 "EXTDAT0_20,Extra chip selection data register 0_20"
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group 0x256C++0x01
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line.word 0x00 "EXTDAT0_21,Extra chip selection data register 0_21"
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group 0x25AC++0x01
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line.word 0x00 "EXTDAT0_22,Extra chip selection data register 0_22"
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group 0x25EC++0x01
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line.word 0x00 "EXTDAT0_23,Extra chip selection data register 0_23"
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group 0x262C++0x01
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line.word 0x00 "EXTDAT0_24,Extra chip selection data register 0_24"
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group 0x266C++0x01
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line.word 0x00 "EXTDAT0_25,Extra chip selection data register 0_25"
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group 0x26AC++0x01
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line.word 0x00 "EXTDAT0_26,Extra chip selection data register 0_26"
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group 0x26EC++0x01
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line.word 0x00 "EXTDAT0_27,Extra chip selection data register 0_27"
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group 0x272C++0x01
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line.word 0x00 "EXTDAT0_28,Extra chip selection data register 0_28"
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group 0x276C++0x01
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line.word 0x00 "EXTDAT0_29,Extra chip selection data register 0_29"
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group 0x27AC++0x01
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line.word 0x00 "EXTDAT0_30,Extra chip selection data register 0_30"
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group 0x27EC++0x01
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line.word 0x00 "EXTDAT0_31,Extra chip selection data register 0_31"
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tree.end
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tree "External Chip Selection Data Registers 0 32-63"
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group 0x282C++0x01
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line.word 0x00 "EXTDAT0_32,Extra chip selection data register 0_32"
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group 0x286C++0x01
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line.word 0x00 "EXTDAT0_33,Extra chip selection data register 0_33"
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group 0x28AC++0x01
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line.word 0x00 "EXTDAT0_34,Extra chip selection data register 0_34"
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group 0x28EC++0x01
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line.word 0x00 "EXTDAT0_35,Extra chip selection data register 0_35"
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group 0x292C++0x01
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line.word 0x00 "EXTDAT0_36,Extra chip selection data register 0_36"
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group 0x296C++0x01
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line.word 0x00 "EXTDAT0_37,Extra chip selection data register 0_37"
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group 0x29AC++0x01
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line.word 0x00 "EXTDAT0_38,Extra chip selection data register 0_38"
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group 0x29EC++0x01
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line.word 0x00 "EXTDAT0_39,Extra chip selection data register 0_39"
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group 0x2A2C++0x01
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line.word 0x00 "EXTDAT0_40,Extra chip selection data register 0_40"
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group 0x2A6C++0x01
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line.word 0x00 "EXTDAT0_41,Extra chip selection data register 0_41"
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group 0x2AAC++0x01
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line.word 0x00 "EXTDAT0_42,Extra chip selection data register 0_42"
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group 0x2AEC++0x01
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line.word 0x00 "EXTDAT0_43,Extra chip selection data register 0_43"
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group 0x2B2C++0x01
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line.word 0x00 "EXTDAT0_44,Extra chip selection data register 0_44"
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group 0x2B6C++0x01
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line.word 0x00 "EXTDAT0_45,Extra chip selection data register 0_45"
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group 0x2BAC++0x01
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line.word 0x00 "EXTDAT0_46,Extra chip selection data register 0_46"
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group 0x2BEC++0x01
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line.word 0x00 "EXTDAT0_47,Extra chip selection data register 0_47"
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group 0x2C2C++0x01
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line.word 0x00 "EXTDAT0_48,Extra chip selection data register 0_48"
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group 0x2C6C++0x01
|
|
line.word 0x00 "EXTDAT0_49,Extra chip selection data register 0_49"
|
|
group 0x2CAC++0x01
|
|
line.word 0x00 "EXTDAT0_50,Extra chip selection data register 0_50"
|
|
group 0x2CEC++0x01
|
|
line.word 0x00 "EXTDAT0_51,Extra chip selection data register 0_51"
|
|
group 0x2D2C++0x01
|
|
line.word 0x00 "EXTDAT0_52,Extra chip selection data register 0_52"
|
|
group 0x2D6C++0x01
|
|
line.word 0x00 "EXTDAT0_53,Extra chip selection data register 0_53"
|
|
group 0x2DAC++0x01
|
|
line.word 0x00 "EXTDAT0_54,Extra chip selection data register 0_54"
|
|
group 0x2DEC++0x01
|
|
line.word 0x00 "EXTDAT0_55,Extra chip selection data register 0_55"
|
|
group 0x2E2C++0x01
|
|
line.word 0x00 "EXTDAT0_56,Extra chip selection data register 0_56"
|
|
group 0x2E6C++0x01
|
|
line.word 0x00 "EXTDAT0_57,Extra chip selection data register 0_57"
|
|
group 0x2EAC++0x01
|
|
line.word 0x00 "EXTDAT0_58,Extra chip selection data register 0_58"
|
|
group 0x2EEC++0x01
|
|
line.word 0x00 "EXTDAT0_59,Extra chip selection data register 0_59"
|
|
group 0x2F2C++0x01
|
|
line.word 0x00 "EXTDAT0_60,Extra chip selection data register 0_60"
|
|
group 0x2F6C++0x01
|
|
line.word 0x00 "EXTDAT0_61,Extra chip selection data register 0_61"
|
|
group 0x2FAC++0x01
|
|
line.word 0x00 "EXTDAT0_62,Extra chip selection data register 0_62"
|
|
group 0x2FEC++0x01
|
|
line.word 0x00 "EXTDAT0_63,Extra chip selection data register 0_63"
|
|
tree.end
|
|
tree.end
|
|
tree "External Chip Selection Data Registers 1"
|
|
tree "External Chip Selection Data Registers 1 0-31"
|
|
group 0x202E++0x01
|
|
line.word 0x00 "EXTDAT1_00,Extra chip selection data register 1_00"
|
|
group 0x206E++0x01
|
|
line.word 0x00 "EXTDAT1_01,Extra chip selection data register 1_01"
|
|
group 0x20AE++0x01
|
|
line.word 0x00 "EXTDAT1_02,Extra chip selection data register 1_02"
|
|
group 0x20EE++0x01
|
|
line.word 0x00 "EXTDAT1_03,Extra chip selection data register 1_03"
|
|
group 0x212E++0x01
|
|
line.word 0x00 "EXTDAT1_04,Extra chip selection data register 1_04"
|
|
group 0x216E++0x01
|
|
line.word 0x00 "EXTDAT1_05,Extra chip selection data register 1_05"
|
|
group 0x21AE++0x01
|
|
line.word 0x00 "EXTDAT1_06,Extra chip selection data register 1_06"
|
|
group 0x21EE++0x01
|
|
line.word 0x00 "EXTDAT1_07,Extra chip selection data register 1_07"
|
|
group 0x222E++0x01
|
|
line.word 0x00 "EXTDAT1_08,Extra chip selection data register 1_08"
|
|
group 0x226E++0x01
|
|
line.word 0x00 "EXTDAT1_09,Extra chip selection data register 1_09"
|
|
group 0x22AE++0x01
|
|
line.word 0x00 "EXTDAT1_10,Extra chip selection data register 1_10"
|
|
group 0x22EE++0x01
|
|
line.word 0x00 "EXTDAT1_11,Extra chip selection data register 1_11"
|
|
group 0x232E++0x01
|
|
line.word 0x00 "EXTDAT1_12,Extra chip selection data register 1_12"
|
|
group 0x236E++0x01
|
|
line.word 0x00 "EXTDAT1_13,Extra chip selection data register 1_13"
|
|
group 0x23AE++0x01
|
|
line.word 0x00 "EXTDAT1_14,Extra chip selection data register 1_14"
|
|
group 0x23EE++0x01
|
|
line.word 0x00 "EXTDAT1_15,Extra chip selection data register 1_15"
|
|
group 0x242E++0x01
|
|
line.word 0x00 "EXTDAT1_16,Extra chip selection data register 1_16"
|
|
group 0x246E++0x01
|
|
line.word 0x00 "EXTDAT1_17,Extra chip selection data register 1_17"
|
|
group 0x24AE++0x01
|
|
line.word 0x00 "EXTDAT1_18,Extra chip selection data register 1_18"
|
|
group 0x24EE++0x01
|
|
line.word 0x00 "EXTDAT1_19,Extra chip selection data register 1_19"
|
|
group 0x252E++0x01
|
|
line.word 0x00 "EXTDAT1_20,Extra chip selection data register 1_20"
|
|
group 0x256E++0x01
|
|
line.word 0x00 "EXTDAT1_21,Extra chip selection data register 1_21"
|
|
group 0x25AE++0x01
|
|
line.word 0x00 "EXTDAT1_22,Extra chip selection data register 1_22"
|
|
group 0x25EE++0x01
|
|
line.word 0x00 "EXTDAT1_23,Extra chip selection data register 1_23"
|
|
group 0x262E++0x01
|
|
line.word 0x00 "EXTDAT1_24,Extra chip selection data register 1_24"
|
|
group 0x266E++0x01
|
|
line.word 0x00 "EXTDAT1_25,Extra chip selection data register 1_25"
|
|
group 0x26AE++0x01
|
|
line.word 0x00 "EXTDAT1_26,Extra chip selection data register 1_26"
|
|
group 0x26EE++0x01
|
|
line.word 0x00 "EXTDAT1_27,Extra chip selection data register 1_27"
|
|
group 0x272E++0x01
|
|
line.word 0x00 "EXTDAT1_28,Extra chip selection data register 1_28"
|
|
group 0x276E++0x01
|
|
line.word 0x00 "EXTDAT1_29,Extra chip selection data register 1_29"
|
|
group 0x27AE++0x01
|
|
line.word 0x00 "EXTDAT1_30,Extra chip selection data register 1_30"
|
|
group 0x27EE++0x01
|
|
line.word 0x00 "EXTDAT1_31,Extra chip selection data register 1_31"
|
|
tree.end
|
|
tree "External Chip Selection Data Registers 1 32-63"
|
|
group 0x282E++0x01
|
|
line.word 0x00 "EXTDAT1_32,Extra chip selection data register 1_32"
|
|
group 0x286E++0x01
|
|
line.word 0x00 "EXTDAT1_33,Extra chip selection data register 1_33"
|
|
group 0x28AE++0x01
|
|
line.word 0x00 "EXTDAT1_34,Extra chip selection data register 1_34"
|
|
group 0x28EE++0x01
|
|
line.word 0x00 "EXTDAT1_35,Extra chip selection data register 1_35"
|
|
group 0x292E++0x01
|
|
line.word 0x00 "EXTDAT1_36,Extra chip selection data register 1_36"
|
|
group 0x296E++0x01
|
|
line.word 0x00 "EXTDAT1_37,Extra chip selection data register 1_37"
|
|
group 0x29AE++0x01
|
|
line.word 0x00 "EXTDAT1_38,Extra chip selection data register 1_38"
|
|
group 0x29EE++0x01
|
|
line.word 0x00 "EXTDAT1_39,Extra chip selection data register 1_39"
|
|
group 0x2A2E++0x01
|
|
line.word 0x00 "EXTDAT1_40,Extra chip selection data register 1_40"
|
|
group 0x2A6E++0x01
|
|
line.word 0x00 "EXTDAT1_41,Extra chip selection data register 1_41"
|
|
group 0x2AAE++0x01
|
|
line.word 0x00 "EXTDAT1_42,Extra chip selection data register 1_42"
|
|
group 0x2AEE++0x01
|
|
line.word 0x00 "EXTDAT1_43,Extra chip selection data register 1_43"
|
|
group 0x2B2E++0x01
|
|
line.word 0x00 "EXTDAT1_44,Extra chip selection data register 1_44"
|
|
group 0x2B6E++0x01
|
|
line.word 0x00 "EXTDAT1_45,Extra chip selection data register 1_45"
|
|
group 0x2BAE++0x01
|
|
line.word 0x00 "EXTDAT1_46,Extra chip selection data register 1_46"
|
|
group 0x2BEE++0x01
|
|
line.word 0x00 "EXTDAT1_47,Extra chip selection data register 1_47"
|
|
group 0x2C2E++0x01
|
|
line.word 0x00 "EXTDAT1_48,Extra chip selection data register 1_48"
|
|
group 0x2C6E++0x01
|
|
line.word 0x00 "EXTDAT1_49,Extra chip selection data register 1_49"
|
|
group 0x2CAE++0x01
|
|
line.word 0x00 "EXTDAT1_50,Extra chip selection data register 1_50"
|
|
group 0x2CEE++0x01
|
|
line.word 0x00 "EXTDAT1_51,Extra chip selection data register 1_51"
|
|
group 0x2D2E++0x01
|
|
line.word 0x00 "EXTDAT1_52,Extra chip selection data register 1_52"
|
|
group 0x2D6E++0x01
|
|
line.word 0x00 "EXTDAT1_53,Extra chip selection data register 1_53"
|
|
group 0x2DAE++0x01
|
|
line.word 0x00 "EXTDAT1_54,Extra chip selection data register 1_54"
|
|
group 0x2DEE++0x01
|
|
line.word 0x00 "EXTDAT1_55,Extra chip selection data register 1_55"
|
|
group 0x2E2E++0x01
|
|
line.word 0x00 "EXTDAT1_56,Extra chip selection data register 1_56"
|
|
group 0x2E6E++0x01
|
|
line.word 0x00 "EXTDAT1_57,Extra chip selection data register 1_57"
|
|
group 0x2EAE++0x01
|
|
line.word 0x00 "EXTDAT1_58,Extra chip selection data register 1_58"
|
|
group 0x2EEE++0x01
|
|
line.word 0x00 "EXTDAT1_59,Extra chip selection data register 1_59"
|
|
group 0x2F2E++0x01
|
|
line.word 0x00 "EXTDAT1_60,Extra chip selection data register 1_60"
|
|
group 0x2F6E++0x01
|
|
line.word 0x00 "EXTDAT1_61,Extra chip selection data register 1_61"
|
|
group 0x2FAE++0x01
|
|
line.word 0x00 "EXTDAT1_62,Extra chip selection data register 1_62"
|
|
group 0x2FEE++0x01
|
|
line.word 0x00 "EXTDAT1_63,Extra chip selection data register 1_63"
|
|
tree.end
|
|
tree.end
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
tree "DMA 0"
|
|
group (0x3000+0x0c)++0x03
|
|
line.long 0x00 "DMACON0,DMA 0 control register"
|
|
bitfld.long 0x00 15. " DM ,Demand Mode" "Normal,Demand"
|
|
bitfld.long 0x00 14. " CM ,Continuous Mode" "Normal,Continuous"
|
|
bitfld.long 0x00 12.--13. " TW ,Transfer Width" "8-bit,16-bit,32-bit,Not used"
|
|
bitfld.long 0x00 11. " SB ,Single/Block Mode" "Single,Block"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BT ,4 Burst Enable" "Normal,4 Burst"
|
|
bitfld.long 0x00 8. " SI ,Stop Interrupt Enable" "Not generated,Generated"
|
|
bitfld.long 0x00 7. " SF ,Source Address Fix" "Increased/Decreased,Not changed"
|
|
bitfld.long 0x00 6. " DF ,Destination Address Fix" "Increased/Decreased,Not changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SD ,Source Address Direction" "Increased,Decreased"
|
|
bitfld.long 0x00 4. " DD ,Destination Address Direction" "Increased,Decreased"
|
|
bitfld.long 0x00 2.--3. " MODE ,Mode Select" "Software,0DREQ0,UART,SIO and Timer"
|
|
bitfld.long 0x00 1. " BS ,BUSY Status" "Idle,Started"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RE ,Run Enable" "Disabled,Enabled"
|
|
group 0x3000++0x0b
|
|
line.long 0x00 "DMASRC0,DMA 0 source address register"
|
|
hexmask.long 0x00 0.--26. 1. " ISADMA0 ,Initial source address for DMA0"
|
|
line.long 0x04 "DMADST0,DMA 0 destination address register"
|
|
hexmask.long 0x04 0.--26. 1. " IDADMA0 ,Initial destination address for DMA0"
|
|
line.long 0x08 "DMACNT0,DMA 0 transfer count register"
|
|
hexmask.long 0x08 0.--26. 1. " NDMAT ,Number of DMA transfer"
|
|
tree.end
|
|
tree "DMA 1"
|
|
group (0x4000+0x0c)++0x03
|
|
line.long 0x00 "DMACON1,DMA 1 control register"
|
|
bitfld.long 0x00 15. " DM ,Demand Mode" "Normal,Demand"
|
|
bitfld.long 0x00 14. " CM ,Continuous Mode" "Normal,Continuous"
|
|
bitfld.long 0x00 12.--13. " TW ,Transfer Width" "8-bit,16-bit,32-bit,Not used"
|
|
bitfld.long 0x00 11. " SB ,Single/Block Mode" "Single,Block"
|
|
textline " "
|
|
bitfld.long 0x00 9. " BT ,4 Burst Enable" "Normal,4 Burst"
|
|
bitfld.long 0x00 8. " SI ,Stop Interrupt Enable" "Not generated,Generated"
|
|
bitfld.long 0x00 7. " SF ,Source Address Fix" "Increased/Decreased,Not changed"
|
|
bitfld.long 0x00 6. " DF ,Destination Address Fix" "Increased/Decreased,Not changed"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SD ,Source Address Direction" "Increased,Decreased"
|
|
bitfld.long 0x00 4. " DD ,Destination Address Direction" "Increased,Decreased"
|
|
bitfld.long 0x00 2.--3. " MODE ,Mode Select" "Software,1DREQ0,UART,SIO and Timer"
|
|
bitfld.long 0x00 1. " BS ,BUSY Status" "Idle,Started"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RE ,Run Enable" "Disabled,Enabled"
|
|
group 0x4000++0x0b
|
|
line.long 0x00 "DMASRC1,DMA 1 source address register"
|
|
hexmask.long 0x00 0.--26. 1. " ISADMA1 ,Initial source address for DMA1"
|
|
line.long 0x04 "DMADST1,DMA 1 destination address register"
|
|
hexmask.long 0x04 0.--26. 1. " IDADMA1 ,Initial destination address for DMA1"
|
|
line.long 0x08 "DMACNT1,DMA 1 transfer count register"
|
|
hexmask.long 0x08 0.--26. 1. " NDMAT ,Number of DMA transfer"
|
|
tree.end
|
|
tree.end
|
|
tree "I/O Ports"
|
|
tree "Port 0"
|
|
group 0xb000++0x00
|
|
line.byte 0x00 "PDAT0,Port 0 data register"
|
|
bitfld.byte 0x00 7. " P0.7 ,Port 0.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P0.6 ,Port 0.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P0.5 ,Port 0.5 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P0.4 ,Port 0.4 port data bit" "Low,High"
|
|
bitfld.byte 0x00 3. " P0.3 ,Port 0.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P0.2 ,Port 0.2 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P0.1 ,Port 0.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P0.0 ,Port 0.0 port data bit" "Low,High"
|
|
group 0xb010++0x01
|
|
line.word 0x00 "PCON0,Port 0 control register"
|
|
bitfld.word 0x00 9.--10. " P0.7 ,Port 0 Pin 7 Configuration" "Schmitt input/EINT0,C-MOS output,C-MOS nWREXP output,?..."
|
|
bitfld.word 0x00 7.--8. " P0.6 ,Port 0 Pin 6 Configuration" "Schmitt input/TCAP4,C-MOS output,C-MOS PWM1/TOUT4 output,?..."
|
|
bitfld.word 0x00 5.--6. " P0.5 ,Port 0 Pin 5 Configuration" "Schmitt input/TCAP3,C-MOS output,C-MOS PWM0/TOUT3 output,?..."
|
|
textline " "
|
|
bitfld.word 0x00 4. " P0.4 ,Port 0 Pin 4 Configuration" "Schmitt input/TCLK4,C-MOS output"
|
|
bitfld.word 0x00 3. " P0.3 ,Port 0 Pin 3 Configuration" "Schmitt input/TCLK3,C-MOS output"
|
|
bitfld.word 0x00 2. " P0.2 ,Port 0 Pin 2 Configuration" "Schmitt input/TCAP2/TCLK2,C-MOS output"
|
|
textline " "
|
|
bitfld.word 0x00 1. " P0.1 ,Port 0 Pin 1 Configuration" "Schmitt input/TCAP1/TCLK1,C-MOS output"
|
|
bitfld.word 0x00 0. " P0.0 ,Port 0 Pin 0 Configuration" "Schmitt input/TCAP0/TCLK0,C-MOS output"
|
|
group 0xb028++0x00
|
|
line.byte 0x00 "PUR0,Port 0 pull-up control register"
|
|
bitfld.byte 0x00 7. " P0.7 ,Pull-up resistor 7 of Port 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P0.6 ,Pull-up resistor 6 of Port 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P0.5 ,Pull-up resistor 5 of Port 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " P0.4 ,Pull-up resistor 4 of Port 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " P0.3 ,Pull-up resistor 3 of Port 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P0.2 ,Pull-up resistor 2 of Port 0 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " P0.1 ,Pull-up resistor 1 of Port 0 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P0.0 ,Pull-up resistor 0 of Port 0 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 1"
|
|
group 0xb001++0x00
|
|
line.byte 0x00 "PDAT1,Port 1 data register"
|
|
bitfld.byte 0x00 7. " P1.7 ,Port 1.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P1.6 ,Port 1.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P1.5 ,Port 1.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P1.4 ,Port 1.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1.3 ,Port 1.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P1.2 ,Port 1.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P1.1 ,Port 1.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P1.0 ,Port 1.0 port data bit" "Low,High"
|
|
group 0xb012++0x01
|
|
line.word 0x00 "PCON1,Port 1 control register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " MP1 ,Setting the Port 1 mode"
|
|
bitfld.word 0x00 7. " P1.7 ,Setting bit 7 of Port 1" "Input/EINT7,C-MOS output"
|
|
bitfld.word 0x00 6. " P1.6 ,Setting bit 6 of Port 1" "Input/EINT6,C-MOS output"
|
|
bitfld.word 0x00 5. " P1.5 ,Setting bit 5 of Port 1" "Input/EINT5,C-MOS output"
|
|
textline " "
|
|
bitfld.word 0x00 4. " P1.4 ,Setting bit 4 of Port 1" "Input/EINT4,C-MOS output"
|
|
bitfld.word 0x00 3. " P1.3 ,Setting bit 3 of Port 1" "Schmitt input,C-MOS output"
|
|
bitfld.word 0x00 2. " P1.2 ,Setting bit 2 of Port 1" "Schmitt input,C-MOS output"
|
|
bitfld.word 0x00 1. " P1.1 ,Setting bit 1 of Port 1" "Schmitt input,C-MOS output"
|
|
textline " "
|
|
bitfld.word 0x00 0. " P1.0 ,Setting bit 0 of Port 1" "Schmitt input,C-MOS output"
|
|
group 0xb029++0x00
|
|
line.byte 0x00 "PDR1,Port 1 pull-down control register"
|
|
bitfld.byte 0x00 7. " P1.7 ,Pull-down resistor 7 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P1.6 ,Pull-down resistor 6 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P1.5 ,Pull-down resistor 5 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P1.4 ,Pull-down resistor 4 of Port 1 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P1.3 ,Pull-down resistor 3 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P1.2 ,Pull-down resistor 2 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P1.1 ,Pull-down resistor 1 of Port 1 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P1.0 ,Pull-down resistor 0 of Port 1 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 2"
|
|
group 0xb002++0x00
|
|
line.byte 0x00 "PDAT2,Port 2 data register"
|
|
bitfld.byte 0x00 7. " P2.7 ,Port 2.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P2.6 ,Port 2.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P2.5 ,Port 2.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P2.4 ,Port 2.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2.3 ,Port 2.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P2.2 ,Port 2.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P2.1 ,Port 2.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P2.0 ,Port 2.0 port data bit" "Low,High"
|
|
group 0xb014++0x01
|
|
line.word 0x00 "PCON2,Port 2 control register"
|
|
bitfld.word 0x00 14.--15. " P2.7 ,Port 2 pin 7 configuration" "Input/EINT1,C-MOS output,nECS0,?..."
|
|
bitfld.word 0x00 12.--13. " P2.6 ,Port 2 pin 6 configuration" "C-MOS input,C-MOS output,nCS7/nRAS1/nSCS1,?..."
|
|
bitfld.word 0x00 10.--11. " P2.5 ,Port 2 pin 5 configuration" "C-MOS input,C-MOS output,nCS6/nRAS0/nSCS0,?..."
|
|
bitfld.word 0x00 8.--9. " P2.4 ,Port 2 pin 4 configuration" "C-MOS input,C-MOS output,nCS5,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " P2.3 ,Port 2 pin 3 configuration" "C-MOS input,C-MOS output,nCS4,?..."
|
|
bitfld.word 0x00 4.--5. " P2.2 ,Port 2 pin 2 configuration" "C-MOS input,C-MOS output,nCS3,?..."
|
|
bitfld.word 0x00 2.--3. " P2.1 ,Port 2 pin 1 configuration" "C-MOS input,C-MOS output,nCS2,?..."
|
|
bitfld.word 0x00 0.--1. " P2.0 ,Port 2 pin 0 configuration" "C-MOS input,C-MOS output,nCS1,?..."
|
|
group 0xb02a++0x00
|
|
line.byte 0x00 "PUR2,Port 2 pull-up control register"
|
|
bitfld.byte 0x00 7. " P2.7 ,Pull-up resistor 7 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P2.6 ,Pull-up resistor 6 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P2.5 ,Pull-up resistor 5 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P2.4 ,Pull-up resistor 4 of Port 2 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P2.3 ,Pull-up resistor 3 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P2.2 ,Pull-up resistor 2 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P2.1 ,Pull-up resistor 1 of Port 2 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P2.0 ,Pull-up resistor 0 of Port 2 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 3"
|
|
group 0xb003++0x00
|
|
line.byte 0x00 "PDAT3,Port 3 data register"
|
|
bitfld.byte 0x00 7. " P3.7 ,Port 3.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P3.6 ,Port 3.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P3.5 ,Port 3.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P3.4 ,Port 3.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3.3 ,Port 3.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P3.2 ,Port 3.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P3.1 ,Port 3.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P3.0 ,Port 3.0 port data bit" "Low,High"
|
|
group 0xb016++0x01
|
|
line.word 0x00 "PCON3,Port 3 control register"
|
|
bitfld.word 0x00 14.--15. " P3.7 ,Port 3 pin 7 configuration" "C-MOS input/EINT2,C-MOS output,nECS1,?..."
|
|
bitfld.word 0x00 12.--13. " P3.6 ,Port 3 pin 6 configuration" "C-MOS input,C-MOS output,Clock output for SDRAM,?..."
|
|
bitfld.word 0x00 10.--11. " P3.5 ,Port 3 pin 5 configuration" "C-MOS input,C-MOS output,SCKE,?..."
|
|
bitfld.word 0x00 8.--9. " P3.4 ,Port 3 pin 4 configuration" "C-MOS input,C-MOS output,nWE,?..."
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " P3.3 ,Port 3 pin 3 configuration" "C-MOS input,C-MOS output,nCAS1/nSCAS,?..."
|
|
bitfld.word 0x00 4.--5. " P3.2 ,Port 3 pin 2 configuration" "C-MOS input,C-MOS output,nCAS0/nSRAS/,?..."
|
|
bitfld.word 0x00 2.--3. " P3.1 ,Port 3 pin 1 configuration" "C-MOS input,C-MOS output,nWBE1/DQM1/nBE0,?..."
|
|
bitfld.word 0x00 0.--1. " P3.0 ,Port 3 pin 0 configuration" "C-MOS input,C-MOS output,nWBE0/DQM0/nBE0,?..."
|
|
group 0xb02b++0x00
|
|
line.byte 0x00 "PUR3,Port 3 pull-up control register"
|
|
bitfld.byte 0x00 7. " P3.7 ,Pull-up resistor 7 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P3.6 ,Pull-up resistor 6 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P3.5 ,Pull-up resistor 5 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P3.4 ,Pull-up resistor 4 of Port 3 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P3.3 ,Pull-up resistor 3 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P3.2 ,Pull-up resistor 2 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P3.1 ,Pull-up resistor 1 of Port 3 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P3.0 ,Pull-up resistor 0 of Port 3 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 4"
|
|
group 0xb004++0x00
|
|
line.byte 0x00 "PDAT4,Port 4 data register"
|
|
bitfld.byte 0x00 7. " P4.7 ,Port 4.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P4.6 ,Port 4.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P4.5 ,Port 4.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P4.4 ,Port 4.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4.3 ,Port 4.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P4.2 ,Port 4.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P4.1 ,Port 4.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P4.0 ,Port 4.0 port data bit" "Low,High"
|
|
group 0xb018++0x01
|
|
line.word 0x00 "PCON4,Port 4 control register"
|
|
bitfld.word 0x00 14.--15. " P4.7 ,Port 4 pin 7 configuration" "C-MOS input,C-MOS output,A23,D15"
|
|
bitfld.word 0x00 12.--13. " P4.6 ,Port 4 pin 6 configuration" "C-MOS input,C-MOS output,A22,D14"
|
|
bitfld.word 0x00 10.--11. " P4.5 ,Port 4 pin 5 configuration" "C-MOS input,C-MOS output,A21,D13"
|
|
bitfld.word 0x00 8.--9. " P4.4 ,Port 4 pin 4 configuration" "C-MOS input,C-MOS output,A20,D12"
|
|
textline " "
|
|
bitfld.word 0x00 6.--7. " P4.3 ,Port 4 pin 3 configuration" "C-MOS input,C-MOS output,A19,D11"
|
|
bitfld.word 0x00 4.--5. " P4.2 ,Port 4 pin 2 configuration" "C-MOS input,C-MOS output,A18,D10"
|
|
bitfld.word 0x00 2.--3. " P4.1 ,Port 4 pin 1 configuration" "C-MOS input,C-MOS output,A17,D9"
|
|
bitfld.word 0x00 0.--1. " P4.0 ,Port 4 pin 0 configuration" "C-MOS input,C-MOS output,A16,D8"
|
|
group 0xb02c++0x00
|
|
line.byte 0x00 "PDR4,Port 4 pull-down control register"
|
|
bitfld.byte 0x00 7. " P4.7 ,Pull-down resistor 7 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P4.6 ,Pull-down resistor 6 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P4.5 ,Pull-down resistor 5 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P4.4 ,Pull-down resistor 4 of Port 4 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P4.3 ,Pull-down resistor 3 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P4.2 ,Pull-down resistor 2 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P4.1 ,Pull-down resistor 1 of Port 4 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P4.0 ,Pull-down resistor 0 of Port 4 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 5"
|
|
group 0xb005++0x00
|
|
line.byte 0x00 "PDAT5,Port 5 data register"
|
|
bitfld.byte 0x00 7. " P5.7 ,Port 5.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P5.6 ,Port 5.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P5.5 ,Port 5.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P5.4 ,Port 5.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5.3 ,Port 5.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P5.2 ,Port 5.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P5.1 ,Port 5.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P5.0 ,Port 5.0 port data bit" "Low,High"
|
|
group 0xb01c++0x03
|
|
line.long 0x00 "PCON5,Port 5 control register"
|
|
bitfld.long 0x00 14.--16. " P5.7 ,Port 5 pin 7 configuration" "Schmitt input,C-MOS output,Reserved,N-ch OD output,Reserved,C-MOS serial output,Reserved,N-ch OD serial output"
|
|
bitfld.long 0x00 12.--13. " P5.6 ,Port 5 pin 6 configuration" "Schmitt input/URXD,C-MOS output,N-ch OD output,?..."
|
|
bitfld.long 0x00 10.--11. " P5.5 ,Port 5 pin 5 configuration" "C-MOS input,C-MOS output,Serial clock,?..."
|
|
bitfld.long 0x00 8.--9. " P5.4 ,Port 5 pin 4 configuration" "C-MOS input,C-MOS output,Serial data,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " P5.3 ,Port 5 pin 3 configuration" "C-MOS input,C-MOS output,nDACK1,?..."
|
|
bitfld.long 0x00 4.--5. " P5.2 ,Port 5 pin 2 configuration" "C-MOS input,C-MOS output,nDREQ1,?..."
|
|
bitfld.long 0x00 2.--3. " P5.1 ,Port 5 pin 1 configuration" "C-MOS input,C-MOS output,nDACK0,?..."
|
|
bitfld.long 0x00 0.--1. " P5.0 ,Port 5 pin 0 configuration" "C-MOS input,C-MOS output,nDREQ0,?..."
|
|
group 0xb02d++0x00
|
|
line.byte 0x00 "PUR5,Port 5 pull-up control register"
|
|
bitfld.byte 0x00 7. " P5.7 ,Pull-up resistor 7 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P5.6 ,Pull-up resistor 6 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P5.5 ,Pull-up resistor 5 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P5.4 ,Pull-up resistor 4 of Port 5 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P5.3 ,Pull-up resistor 3 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P5.2 ,Pull-up resistor 2 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P5.1 ,Pull-up resistor 1 of Port 5 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P5.0 ,Pull-up resistor 0 of Port 5 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 6"
|
|
group 0xb006++0x00
|
|
line.byte 0x00 "PDAT6,Port 6 data register"
|
|
bitfld.byte 0x00 7. " P6.7 ,Port 6.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P6.6 ,Port 6.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P6.5 ,Port 6.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P6.4 ,Port 6.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6.3 ,Port 6.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P6.2 ,Port 6.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P6.1 ,Port 6.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P6.0 ,Port 6.0 port data bit" "Low,High"
|
|
group 0xb020++0x03
|
|
line.long 0x00 "PCON6,Port 6 control register"
|
|
bitfld.long 0x00 18. " P6.7 ,Port 6 pin 7 configuration" "Schmitt input/EINT3,C-MOS output"
|
|
bitfld.long 0x00 15.--17. " P6.6 ,Port 6 pin 6 configuration" "Schmitt input,C-MOS output,N-ch OD output,Reserved,Reserved,C-MOS SIOTXD1,N-ch OD SIOTXD1,?..."
|
|
bitfld.long 0x00 12.--14. " P6.5 ,Port 6 pin 5 configuration" "Schmitt input/SIOCLK1,C-MOS output,N-ch OD output,Reserved,Reserved,C-MOS SIOCLK1,N-ch OD SIOCLK1,?..."
|
|
bitfld.long 0x00 10.--11. " P6.4 ,Port 6 pin 4 configuration" "Schmitt input/SIORXD1,C-MOS output,N-ch OD output,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " P6.3 ,Port 6 pin 3 configuration" "Schmitt input,C-MOS output,nWAIT input,nSIORDY input/output"
|
|
bitfld.long 0x00 5.--7. " P6.2 ,Port 6 pin 2 configuration" "Schmitt input,C-MOS output,N-ch OD output,Reserved,Reserved,C-MOS SIOTXD0,N-ch OD SIOTXD0,?..."
|
|
bitfld.long 0x00 2.--4. " P6.1 ,Port 6 pin 1 configuration" "Schmitt input/SIOCLK0,C-MOS output,N-ch OD output,Reserved,Reserved,C-MOS SIOCLK0,N-ch OD SIOCLK0,?..."
|
|
bitfld.long 0x00 0.--1. " P6.0 ,Port 6 pin 0 configuration" "Schmitt input/SIORXD0,C-MOS output,N-ch OD output,?..."
|
|
group 0xb02e++0x00
|
|
line.byte 0x00 "PUR6,Port 6 pull-up control register"
|
|
bitfld.byte 0x00 7. " P6.7 ,Pull-up resistor 7 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P6.6 ,Pull-up resistor 6 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P6.5 ,Pull-up resistor 5 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P6.4 ,Pull-up resistor 4 of Port 6 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P6.3 ,Pull-up resistor 3 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P6.2 ,Pull-up resistor 2 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P6.1 ,Pull-up resistor 1 of Port 6 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P6.0 ,Pull-up resistor 0 of Port 6 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 7"
|
|
group 0xb007++0x00
|
|
line.byte 0x00 "PDAT7,Port 7 data register"
|
|
bitfld.byte 0x00 7. " P7.7 ,Port 7.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P7.6 ,Port 7.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P7.5 ,Port 7.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P7.4 ,Port 7.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7.3 ,Port 7.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P7.2 ,Port 7.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P7.1 ,Port 7.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P7.0 ,Port 7.0 port data bit" "Low,High"
|
|
group 0xb00b++0x00
|
|
line.byte 0x00 "P7BR,Port 7 buffer register"
|
|
group 0xb024++0x01
|
|
line.word 0x00 "PCON7,Port 7 control register"
|
|
bitfld.word 0x00 11. " HNS ,Time source of High nibble real time output" "T0,T3"
|
|
bitfld.word 0x00 10. " LNS ,Time source of Low nibble real time output" "T0,T3"
|
|
bitfld.word 0x00 8.--9. " RTO ,Setting port 7 as real time output" "General I/O,Low nibble,High nibble,Byte"
|
|
bitfld.word 0x00 7. " P7.7_RP7 ,Port 7 pin 7 configuration" "C-MOS input,C-MOS output"
|
|
textline " "
|
|
bitfld.word 0x00 6. " P7.6_RP6 ,Port 7 pin 6 configuration" "C-MOS input,C-MOS output"
|
|
bitfld.word 0x00 5. " P7.5_RP5 ,Port 7 pin 5 configuration" "C-MOS input,C-MOS output"
|
|
bitfld.word 0x00 4. " P7.4_RP4 ,Port 7 pin 4 configuration" "C-MOS input,C-MOS output"
|
|
bitfld.word 0x00 3. " P7.3_RP3 ,Port 7 pin 3 configuration" "C-MOS input,C-MOS output"
|
|
textline " "
|
|
bitfld.word 0x00 2. " P7.2_RP2 ,Port 7 pin 2 configuration" "C-MOS input,C-MOS output"
|
|
bitfld.word 0x00 1. " P7.1_RP1 ,Port 7 pin 1 configuration" "C-MOS input,C-MOS output"
|
|
bitfld.word 0x00 0. " P7.0_RP0 ,Port 7 pin 0 configuration" "C-MOS input,C-MOS output"
|
|
group 0xb02f++0x00
|
|
line.byte 0x00 "PUR7,Port 7 pull-up control register"
|
|
bitfld.byte 0x00 7. " P7.7 ,Pull-up resistor 7 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P7.6 ,Pull-up resistor 6 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P7.5 ,Pull-up resistor 5 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P7.4 ,Pull-up resistor 4 of Port 7 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P7.3 ,Pull-up resistor 3 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P7.2 ,Pull-up resistor 2 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P7.1 ,Pull-up resistor 1 of Port 7 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P7.0 ,Pull-up resistor 0 of Port 7 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 8"
|
|
rgroup 0xb008++0x00
|
|
line.byte 0x00 "PDAT8,Port 8 data register"
|
|
bitfld.byte 0x00 7. " P8.7 ,Port 8.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P8.6 ,Port 8.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P8.5 ,Port 8.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P8.4 ,Port 8.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8.3 ,Port 8.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P8.2 ,Port 8.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P8.1 ,Port 8.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P8.0 ,Port 8.0 port data bit" "Low,High"
|
|
group 0xb026++0x00
|
|
line.byte 0x00 "PCON8,Port 8 control register"
|
|
bitfld.byte 0x00 7. " P8.7 ,Port 8 pin 7 configuration" "C-MOS input/EINT,AIN7"
|
|
bitfld.byte 0x00 6. " P8.6 ,Port 8 pin 6 configuration" "C-MOS input/EINT,AIN6"
|
|
bitfld.byte 0x00 5. " P8.5 ,Port 8 pin 5 configuration" "C-MOS input/EINT,AIN5"
|
|
bitfld.byte 0x00 4. " P8.4 ,Port 8 pin 4 configuration" "C-MOS input/EINT,AIN4"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8.3 ,Port 8 pin 3 configuration" "C-MOS input,AIN3"
|
|
bitfld.byte 0x00 2. " P8.2 ,Port 8 pin 2 configuration" "C-MOS input,AIN2"
|
|
bitfld.byte 0x00 1. " P8.1 ,Port 8 pin 1 configuration" "C-MOS input,AIN1"
|
|
bitfld.byte 0x00 0. " P8.0 ,Port 8 pin 0 configuration" "C-MOS input,AIN0"
|
|
group 0xb03c++0x00
|
|
line.byte 0x00 "PUR8,Port 8 pull-up control register"
|
|
bitfld.byte 0x00 7. " P8.7 ,Pull-up resistor 7 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " P8.6 ,Pull-up resistor 6 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " P8.5 ,Pull-up resistor 5 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " P8.4 ,Pull-up resistor 4 of Port 8 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P8.3 ,Pull-up resistor 3 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " P8.2 ,Pull-up resistor 2 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " P8.1 ,Pull-up resistor 1 of Port 8 enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " P8.0 ,Pull-up resistor 0 of Port 8 enable" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Port 9"
|
|
group 0xb009++0x00
|
|
line.byte 0x00 "PDAT9,Port 9 data register"
|
|
bitfld.byte 0x00 7. " P9.7 ,Port 9.7 port data bit" "Low,High"
|
|
bitfld.byte 0x00 6. " P9.6 ,Port 9.6 port data bit" "Low,High"
|
|
bitfld.byte 0x00 5. " P9.5 ,Port 9.5 port data bit" "Low,High"
|
|
bitfld.byte 0x00 4. " P9.4 ,Port 9.4 port data bit" "Low,High"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " P9.3 ,Port 9.3 port data bit" "Low,High"
|
|
bitfld.byte 0x00 2. " P9.2 ,Port 9.2 port data bit" "Low,High"
|
|
bitfld.byte 0x00 1. " P9.1 ,Port 9.1 port data bit" "Low,High"
|
|
bitfld.byte 0x00 0. " P9.0 ,Port 9.0 port data bit" "Low,High"
|
|
group 0xb027++0x00
|
|
line.byte 0x00 "PCON9,Port 9 control register"
|
|
bitfld.byte 0x00 1. " P9.1 ,Port 9 pin 1 configuration" "LCD line output,C-MOS output"
|
|
bitfld.byte 0x00 0. " P9.0 ,Port 9 pin 0 configuration" "LCD clock output,C-MOS output"
|
|
tree.end
|
|
tree "Common Registers"
|
|
group 0xB031++0x00
|
|
line.byte 0x00 "EINTPND,External interrupt pending register"
|
|
bitfld.byte 0x00 3. " EINT7 ,External interrupt (EINT7) pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 2. " EINT6 ,External interrupt (EINT6) pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 1. " EINT5 ,External interrupt (EINT5) pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 0. " EINT4 ,External interrupt (EINT4) pending" "Not pending,Pending"
|
|
group 0xB032++0x01
|
|
line.word 0x00 "EINTCON,External interrupt control register"
|
|
bitfld.word 0x00 11. " EINT11 ,Setting external interrupt enable of EINT11" "Disabled,Enabled"
|
|
bitfld.word 0x00 10. " EINT10 ,Setting external interrupt enable of EINT10" "Disabled,Enabled"
|
|
bitfld.word 0x00 9. " EINT9 ,Setting external interrupt enable of EINT9" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " EINT8 ,Setting external interrupt enable of EINT8" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " EINT7 ,Setting external interrupt enable of EINT7" "Disabled,Enabled"
|
|
bitfld.word 0x00 6. " EINT6 ,Setting external interrupt enable of EINT6" "Disabled,Enabled"
|
|
bitfld.word 0x00 5. " EINT5 ,Setting external interrupt enable of EINT5" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " EINT4 ,Setting external interrupt enable of EINT4" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " EINT3 ,Setting external interrupt enable of EINT3" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " EINT2 ,Setting external interrupt enable of EINT2" "Disabled,Enabled"
|
|
bitfld.word 0x00 1. " EINT1 ,Setting external interrupt enable of EINT1" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " EINT0 ,Setting external interrupt enable of EINT0" "Disabled,Enabled"
|
|
group 0xB034++0x03
|
|
line.long 0x00 "EINTMOD,External interrupt mode register"
|
|
bitfld.long 0x00 30.--31. " EINT11 ,External interrupt 11 mode" "Falling edge,Rising edge,High level,Low level"
|
|
bitfld.long 0x00 28.--29. " EINT10 ,External interrupt 10 mode" "Falling edge,Rising edge,High level,Low level"
|
|
bitfld.long 0x00 26.--27. " EINT9 ,External interrupt 9 mode" "Falling edge,Rising edge,High level,Low level"
|
|
bitfld.long 0x00 24.--25. " EINT8 ,External interrupt 8 mode" "Falling edge,Rising edge,High level,Low level"
|
|
textline " "
|
|
bitfld.long 0x00 21.--23. " EINT7 ,External interrupt 7 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 18.--20. " EINT6 ,External interrupt 6 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 15.--17. " EINT5 ,External interrupt 5 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 12.--14. " EINT4 ,External interrupt 4 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
textline " "
|
|
bitfld.long 0x00 9.--11. " EINT3 ,External interrupt 3 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 6.--8. " EINT2 ,External interrupt 2 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 3.--5. " EINT1 ,External interrupt 1 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
bitfld.long 0x00 0.--2. " EINT0 ,External interrupt 0 mode" "Falling edge,Rising edge,High level,Low level,Both edges,?..."
|
|
tree.end
|
|
tree.end
|
|
tree "Timers (16-BIT TIMERS & 8-BIT TIMERS)"
|
|
tree "Timer 0"
|
|
group 0x9000++0x01
|
|
line.word 0x00 "TDAT0,Timer 0 data register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,Determine the data value for Timer 0"
|
|
group 0x9002++0x00
|
|
line.byte 0x00 "TPRE0,Timer 0 prescaler register"
|
|
hexmask.byte 0x00 0.--7. 1. " Pre_scale ,Determines pre-scale value for Timer 0"
|
|
group 0x9003++0x00
|
|
line.byte 0x00 "TCON0,Timer 0 control register"
|
|
bitfld.byte 0x00 7. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " CL ,Timer Counter Clear" "No effect,Cleared"
|
|
bitfld.byte 0x00 3.--5. " OMS ,Timer Operating Mode Selection" "Interval,Match & overflow,Match & DMA,Reserved,Capture on falling edge,Capture on rising edge,Capture on both edges,?..."
|
|
bitfld.byte 0x00 2. " ICS ,Timer Input Clock Selection" "Internal,External"
|
|
rgroup 0x9006++0x01
|
|
line.word 0x00 "TCNT0,Timer 0 counter register"
|
|
hexmask.word 0x00 0.--15. 1. " CV ,Contains the current timer's count value during the normal operation"
|
|
tree.end
|
|
tree "Timer 1"
|
|
group 0x9010++0x03
|
|
line.word 0x00 "TDAT1,Timer 1 data register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,Determine the data value for Timer 1"
|
|
line.byte 0x02 "TPRE1,Timer 1 prescaler register"
|
|
hexmask.byte 0x02 0.--7. 1. " Pre_scale ,Determines pre-scale value for Timer 1"
|
|
line.byte 0x03 "TCON1,Timer 1 control register"
|
|
bitfld.byte 0x03 7. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x03 6. " CL ,Timer Counter Clear" "No effect,Cleared"
|
|
bitfld.byte 0x03 3.--5. " OMS ,Timer Operating Mode Selection" "Interval,Match & overflow,Match & DMA,Reserved,Capture on falling edge,Capture on rising edge,Capture on both edges,?..."
|
|
bitfld.byte 0x03 2. " ICS ,Timer Input Clock Selection" "Internal,External"
|
|
rgroup 0x9016++0x01
|
|
line.word 0x00 "TCNT1,Timer 1 counter register"
|
|
hexmask.word 0x00 0.--15. 1. " CV ,Contains the current timer's count value during the normal operation"
|
|
tree.end
|
|
tree "Timer 2"
|
|
group 0x9020++0x03
|
|
line.word 0x00 "TDAT2,Timer 2 data register"
|
|
hexmask.word 0x00 0.--15. 1. " Data ,Determine the data value for Timer 2"
|
|
line.byte 0x02 "TPRE2,Timer 2 prescaler register"
|
|
hexmask.byte 0x02 0.--7. 1. " Pre_scale ,Determines pre-scale value for Timer 2"
|
|
line.byte 0x03 "TCON2,Timer 2 control register"
|
|
bitfld.byte 0x03 7. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x03 6. " CL ,Timer Counter Clear" "No effect,Cleared"
|
|
bitfld.byte 0x03 3.--5. " OMS ,Timer Operating Mode Selection" "Interval,Match & overflow,Match & DMA,Reserved,Capture on falling edge,Capture on rising edge,Capture on both edges,?..."
|
|
bitfld.byte 0x03 2. " ICS ,Timer Input Clock Selection" "Internal,External"
|
|
rgroup 0x9026++0x01
|
|
line.word 0x00 "TCNT2,Timer 2 counter register"
|
|
hexmask.word 0x00 0.--15. 1. " CV ,Contains the current timer's count value during the normal operation"
|
|
tree.end
|
|
tree "Timer 3"
|
|
group 0x9031++0x02
|
|
line.byte 0x00 "TDAT3,Timer 3 data register"
|
|
hexmask.byte 0x00 0.--7. 1. " TDATA ,Timer data for Timer 3"
|
|
line.byte 0x01 "TPRE3,Timer 3 prescaler register"
|
|
hexmask.byte 0x01 0.--7. 1. " Pre_scale ,Determines pre-scale value for Timer 3"
|
|
line.byte 0x02 "TCON3,Timer 3 control register"
|
|
bitfld.byte 0x02 7. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " CL ,Timer Counter Clear" "No effect,Cleared"
|
|
bitfld.byte 0x02 3.--5. " OMS ,Timer Operating Mode Selection" "Interval,PWM,Match & DMA,Reserved,Capture on falling edge,Capture on rising edge,Capture on both edges,?..."
|
|
bitfld.byte 0x02 2. " ICS ,Timer Input Clock Selection" "Internal,External"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--1. " CD ,Clock Divider of Internal Clock Source" "1/16,1/8,1/4,1/2"
|
|
rgroup 0x9037++0x00
|
|
line.byte 0x00 "TCNT3,Timer 3 counter register"
|
|
hexmask.byte 0x00 0.--7. 1. " CV ,Contains the current timer's count value during the normal operation"
|
|
tree.end
|
|
tree "Timer 4"
|
|
group 0x9041++0x02
|
|
line.byte 0x00 "TDAT4,Timer 4 data register"
|
|
hexmask.byte 0x00 0.--7. 1. " TDATA ,Timer data for Timer 4"
|
|
line.byte 0x01 "TPRE4,Timer 4 prescaler register"
|
|
hexmask.byte 0x01 0.--7. 1. " Pre_scale ,Determines pre-scale value for Timer 4"
|
|
line.byte 0x02 "TCON4,Timer 4 control register"
|
|
bitfld.byte 0x02 7. " TEN ,Timer Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x02 6. " CL ,Timer Counter Clear" "No effect,Cleared"
|
|
bitfld.byte 0x02 3.--5. " OMS ,Timer Operating Mode Selection" "Interval,PWM,Match & DMA,Reserved,Capture on falling edge,Capture on rising edge,Capture on both edges,?..."
|
|
bitfld.byte 0x02 2. " ICS ,Timer Input Clock Selection" "Internal,External"
|
|
textline " "
|
|
bitfld.byte 0x02 0.--1. " CD ,Clock Divider of Internal Clock Source" "1/16,1/8,1/4,1/2"
|
|
rgroup 0x9047++0x00
|
|
line.byte 0x00 "TCNT4,Timer 4 counter register"
|
|
hexmask.byte 0x00 0.--7. 1. " CV ,Contains the current timer's count value during the normal operation"
|
|
group 0x904f++0x00
|
|
line.byte 0x00 "TFCON,FIFO control register of Timer 4"
|
|
bitfld.byte 0x00 4.--5. " FR ,FIFO Repeat" "No effect,1 repeat,3 repeats,7 repeats"
|
|
bitfld.byte 0x00 2.--3. " FTL ,FIFO Trigger Level" "Empty,1 byte,2 byte,4 byte"
|
|
bitfld.byte 0x00 1. " FCL ,FIFO Reset" "Normal,Cleared"
|
|
bitfld.byte 0x00 0. " FEN ,FIFO Enable" "Disabled,Enabled"
|
|
rgroup 0x904e++0x00
|
|
line.byte 0x00 "TFSTAT,FIFO status register of Timer 4"
|
|
bitfld.byte 0x00 3. " FF ,FIFO Full" "Not full,Full"
|
|
bitfld.byte 0x00 0.--2. " FC ,FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group 0x9048++0x03
|
|
line.long 0x00 "TFW4,Timer 4 FIFO register at word"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TDATA3 ,Timer data 3 for Timer 4"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TDATA2 ,Timer data 2 for Timer 4"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TDATA1 ,Timer data 1 for Timer 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TDATA0 ,Timer data 0 for Timer 4"
|
|
tree.end
|
|
tree.end
|
|
tree "UART (Universal Asynchronous Receiver and Transmitter)"
|
|
group 0x5003++0x04
|
|
line.byte 0x00 "ULCON,UART line control register"
|
|
bitfld.byte 0x00 6. " IRM ,Infra-Red Mode" "Normal,Infra-Red"
|
|
bitfld.byte 0x00 3.--5. " PMD ,Parity Mode" "No parity,No parity,No parity,No parity,Odd,Even,?..."
|
|
bitfld.byte 0x00 2. " SB ,Number of Stop Bit" "1 bit,2 bits"
|
|
bitfld.byte 0x00 0.--1. " WL ,Word Length" "5-bit,6-bit,7-bit,8-bit"
|
|
line.byte 0x04 "UCON,UART control register"
|
|
bitfld.byte 0x04 7. " RXTOEL ,Rx Time Out Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x04 6. " RSIE ,Rx Status Interrupt Enable" "Not generated,Generated"
|
|
bitfld.byte 0x04 5. " LBM ,Loop Back Mode" "Normal,Loopback"
|
|
bitfld.byte 0x04 4. " SBS ,Send Break Signal" "No effect,Sent"
|
|
textline " "
|
|
bitfld.byte 0x04 2.--3. " TM ,Transmit Mode" "Disabled,IRQ/Polling,DMA0 req,DMA1 req"
|
|
bitfld.byte 0x04 0.--1. " RM ,Receive Mode" "Disabled,IRQ/Polling,DMA0 req,DMA1 req"
|
|
rgroup 0x500b++0x00
|
|
line.byte 0x00 "USTAT,UART status register"
|
|
bitfld.byte 0x00 7. " TSE ,Transmit Shift Register Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 6. " TFE ,Transmit FIFO Empty / Transmit Holding Register Empty" "Not empty,Empty"
|
|
bitfld.byte 0x00 5. " RFDR ,Receive FIFO Data Ready / Receive Buffer Data Ready" "Not ready,Ready"
|
|
bitfld.byte 0x00 4. " RTO ,Receiver Time Out" "Not generated,Generated"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " BD ,Break Detect" "Not received,Received"
|
|
bitfld.byte 0x00 2. " FE ,Frame Error" "No error,Error"
|
|
bitfld.byte 0x00 1. " PE ,Parity Error" "No error,Error"
|
|
bitfld.byte 0x00 0. " OE ,Overrun Error" "No error,Error"
|
|
group 0x500f++0x00
|
|
line.byte 0x00 "UFCON,UART FIFO control register"
|
|
bitfld.byte 0x00 6.--7. " TFTL ,Transmit FIFO Trigger Level for Interrupt Generation" "Empty,2 byte,4 byte,6 byte"
|
|
bitfld.byte 0x00 4.--5. " RFTL ,Receive FIFO Trigger Level for Interrupt Generation" "2 byte,4 byte,6 byte,8 byte"
|
|
bitfld.byte 0x00 2. " TFR ,Transmit FIFO Reset" "Normal mode,Reset"
|
|
bitfld.byte 0x00 1. " RFR ,Receive FIFO Reset" "Normal mode,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " FE ,FIFO Enable" "Disabled,Enabled"
|
|
rgroup 0x5012++0x01
|
|
line.word 0x00 "UFSTAT,UART FIFO status register"
|
|
bitfld.word 0x00 8. " EIF ,Error in FIFO" "All valid,Not all valid"
|
|
bitfld.word 0x00 7. " TFF ,Transmit FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 6. " RFF ,Receive FIFO Full" "Not full,Full"
|
|
bitfld.word 0x00 3.--5. " TFC ,Transmit FIFO Count" "Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes"
|
|
textline " "
|
|
bitfld.word 0x00 0.--2. " RFC ,Receive FIFO Count" "Empty,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes"
|
|
group 0x5014++0x03
|
|
line.long 0x00 "UTXH,UART transmit FIFO register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " TXDATA3 ,Transmit data 3 for UART"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TXDATA2 ,Transmit data 2 for UART"
|
|
hexmask.long.byte 0x00 8.--15. 1. " TXDATA1 ,Transmit data 1 for UART"
|
|
hexmask.long.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data 0 for UART"
|
|
group 0x5018++0x03
|
|
hide.long 0x00 "URXH,UART receive FIFO register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RXDATA3 ,Receive data 3 for UART"
|
|
in
|
|
hexmask.long.byte 0x00 16.--23. 1. " RXDATA2 ,Receive data 2 for UART"
|
|
in
|
|
hexmask.long.byte 0x00 8.--15. 1. " RXDATA1 ,Receive data 1 for UART"
|
|
in
|
|
hexmask.long.byte 0x00 0.--7. 1. " RXDATA0 ,Receive data 0 for UART"
|
|
in
|
|
group 0x501e++0x01
|
|
line.word 0x00 "UBRDIV,Baud rate divisor register for UART"
|
|
hexmask.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
|
|
tree.end
|
|
tree "SIO (Synchronous I/O)"
|
|
tree "SIO 0"
|
|
group 0x6000++0x03
|
|
line.byte 0x00 "ITVCNT0,SIO 0 interval counter register"
|
|
hexmask.byte 0x00 0.--7. 1. " CV , Count value"
|
|
line.byte 0x01 "SBRDR0,SIO 0 baud rate prescaler register"
|
|
hexmask.byte 0x01 0.--7. 1. " Pre_scale ,Pre-scale value for generating the baud rate"
|
|
line.byte 0x02 "SIODAT0,SIO 0 data register"
|
|
hexmask.byte 0x02 0.--7. 1. " SIODATA ,SIO Data"
|
|
line.byte 0x03 "SIOCON0,SIO 0 control register"
|
|
bitfld.byte 0x03 7. " CS ,SIO Clock Source Selection" "Internal,External"
|
|
bitfld.byte 0x03 6. " DD ,Data Direction" "MSB,LSB"
|
|
bitfld.byte 0x03 5. " TRS ,Transmit/Receive Selection" "Receive,Transmit/Receive"
|
|
bitfld.byte 0x03 4. " CES ,Clock Edge Select" "Falling,Rising"
|
|
textline " "
|
|
bitfld.byte 0x03 3. " SB ,SIO Start" "No effect,Cleared and started"
|
|
bitfld.byte 0x03 2. " HSE ,Hand-Shaking Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0.--1. " MODE ,SIO Mode Selection" "Disabled,SIO int,DMA0 req,DMA1 req"
|
|
tree.end
|
|
tree "SIO 1"
|
|
group 0x7000++0x03
|
|
line.byte 0x00 "ITVCNT1,SIO 1 interval counter register"
|
|
hexmask.byte 0x00 0.--7. 1. " CV , Count value"
|
|
line.byte 0x01 "SBRDR1,SIO 1 baud rate prescaler register"
|
|
hexmask.byte 0x01 0.--7. 1. " Pre_scale ,Pre-scale value for generating the baud rate"
|
|
line.byte 0x02 "SIODAT1,SIO 1 data register"
|
|
hexmask.byte 0x02 0.--7. 1. " SIODATA ,SIO Data"
|
|
line.byte 0x03 "SIOCON1,SIO 1 control register"
|
|
bitfld.byte 0x03 7. " CS ,SIO Clock Source Selection" "Internal,External"
|
|
bitfld.byte 0x03 6. " DD ,Data Direction" "MSB,LSB"
|
|
bitfld.byte 0x03 5. " TRS ,Transmit/Receive Selection" "Receive,Transmit/Receive"
|
|
bitfld.byte 0x03 4. " CES ,Clock Edge Select" "Falling,Rising"
|
|
textline " "
|
|
bitfld.byte 0x03 3. " SB ,SIO Start" "No effect,Cleared and started"
|
|
bitfld.byte 0x03 2. " HSE ,Hand-Shaking Mode Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x03 0.--1. " MODE ,SIO Mode Selection" "Disabled,SIO int,DMA0 req,DMA1 req"
|
|
tree.end
|
|
tree.end
|
|
tree "Interrupt Controller"
|
|
group 0xc000++0x0b
|
|
line.long 0x00 "INTMOD,Interrupt mode register"
|
|
bitfld.long 0x00 31. " EINT11 ,External interrupt 11 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " EINT10 ,External interrupt 10 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " EINT9 ,External interrupt 9 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 28. " EINT8 ,External interrupt 8 mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_ADC ,ADC interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " EINT4/5/6/7 ,External interrupt 4/5/6/7 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 25. " EINT3 ,External interrupt 3 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " EINT2 ,External interrupt 2 mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INT_TF ,Timer 4 FIFO interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 22. " INT_RTCT ,RTC time interrupt (SEC/MIN/HOUR) mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " INT_RTCA ,RTC alarm interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " INT_IIC ,IIC interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_SIO1 ,SIO 1 interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " INT_SIO0 ,SIO 0 interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " INT_BT ,Basic Timer interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 16. " INT_TMC4 ,Timer 4 match/capture interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_TOF4 ,Timer 4 overflow interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " INT_TMC3 ,Timer 3 match/capture interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " INT_TOF3 ,Timer 3 overflow interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 12. " INT_TMC2 ,Timer 2 match/capture interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_TOF2 ,Timer 2 overflow interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 10. " INT_TMC1 ,Timer 1 match/capture interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " INT_TOF1 ,Timer 1 overflow interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " INT_TMC0 ,Timer 0 match/capture interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INT_TOF0 ,Timer 0 overflow interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 6. " INT_DMA1 ,DMA1 interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " INT_DMA0 ,DMA0 interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 4. " INT_UERR ,UART error interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_UTX ,UART transmit interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " INT_URX ,UART receive interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 1. " EINT1 ,External interrupt 1 mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " EINT0 ,External interrupt 0 mode" "IRQ,FIQ"
|
|
line.long 0x04 "INTPND,Interrupt pending register"
|
|
bitfld.long 0x04 31. " EINT11 ,External interrupt 11 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 30. " EINT10 ,External interrupt 10 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 29. " EINT9 ,External interrupt 9 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 28. " EINT8 ,External interrupt 8 request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 27. " INT_ADC ,ADC interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 26. " EINT4/5/6/7 ,External interrupt 4/5/6/7 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 25. " EINT3 ,External interrupt 3 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 24. " EINT2 ,External interrupt 2 request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 23. " INT_TF ,Timer 4 FIFO interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 22. " INT_RTCT ,RTC time interrupt (SEC/MIN/HOUR) request status" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " INT_RTCA ,RTC alarm interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 20. " INT_IIC ,IIC interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 19. " INT_SIO1 ,SIO 1 interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " INT_SIO0 ,SIO 0 interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 17. " INT_BT ,Basic Timer interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " INT_TMC4 ,Timer 4 match/capture interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 15. " INT_TOF4 ,Timer 4 overflow interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 14. " INT_TMC3 ,Timer 3 match/capture interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " INT_TOF3 ,Timer 3 overflow interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " INT_TMC2 ,Timer 2 match/capture interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 11. " INT_TOF2 ,Timer 2 overflow interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " INT_TMC1 ,Timer 1 match/capture interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " INT_TOF1 ,Timer 1 overflow interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 8. " INT_TMC0 ,Timer 0 match/capture interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 7. " INT_TOF0 ,Timer 0 overflow interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " INT_DMA1 ,DMA1 interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 5. " INT_DMA0 ,DMA0 interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " INT_UERR ,UART error interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 3. " INT_UTX ,UART transmit interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 2. " INT_URX ,UART receive interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x04 1. " EINT1 ,External interrupt 1 request status" "Not requested,Requested"
|
|
bitfld.long 0x04 0. " EINT0 ,External interrupt 0 request status" "Not requested,Requested"
|
|
line.long 0x08 "INTMSK,Interrupt mask register"
|
|
bitfld.long 0x08 31. " EINT11 ,External interrupt 11 request enable" "Masked,Available"
|
|
bitfld.long 0x08 30. " EINT10 ,External interrupt 10 request enable" "Masked,Available"
|
|
bitfld.long 0x08 29. " EINT9 ,External interrupt 9 request enable" "Masked,Available"
|
|
bitfld.long 0x08 28. " EINT8 ,External interrupt 8 request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 27. " INT_ADC ,ADC interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 26. " EINT4/5/6/7 ,External interrupt 4/5/6/7 request enable" "Masked,Available"
|
|
bitfld.long 0x08 25. " EINT3 ,External interrupt 3 request enable" "Masked,Available"
|
|
bitfld.long 0x08 24. " EINT2 ,External interrupt 2 request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 23. " INT_TF ,Timer 4 FIFO interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 22. " INT_RTCT ,RTC time interrupt (SEC/MIN/HOUR) request enable" "Masked,Available"
|
|
bitfld.long 0x08 21. " INT_RTCA ,RTC alarm interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 20. " INT_IIC ,IIC interrupt request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 19. " INT_SIO1 ,SIO 1 interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 18. " INT_SIO0 ,SIO 0 interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 17. " INT_BT ,Basic Timer interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 16. " INT_TMC4 ,Timer 4 match/capture interrupt request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 15. " INT_TOF4 ,Timer 4 overflow interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 14. " INT_TMC3 ,Timer 3 match/capture interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 13. " INT_TOF3 ,Timer 3 overflow interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 12. " INT_TMC2 ,Timer 2 match/capture interrupt request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 11. " INT_TOF2 ,Timer 2 overflow interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 10. " INT_TMC1 ,Timer 1 match/capture interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 9. " INT_TOF1 ,Timer 1 overflow interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 8. " INT_TMC0 ,Timer 0 match/capture interrupt request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 7. " INT_TOF0 ,Timer 0 overflow interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 6. " INT_DMA1 ,DMA1 interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 5. " INT_DMA0 ,DMA0 interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 4. " INT_UERR ,UART error interrupt request enable" "Masked,Available"
|
|
textline " "
|
|
bitfld.long 0x08 3. " INT_UTX ,UART transmit interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 2. " INT_URX ,UART receive interrupt request enable" "Masked,Available"
|
|
bitfld.long 0x08 1. " EINT1 ,External interrupt 1 request enable" "Masked,Available"
|
|
bitfld.long 0x08 0. " EINT0 ,External interrupt 0 request enable" "Masked,Available"
|
|
group 0xc00c++0x1f
|
|
line.long 0x00 "INTPRI0,Interrupt priority register 0"
|
|
bitfld.long 0x00 29.--31. " EN ,Interrupt priority enable" "Disabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled,Enabled"
|
|
bitfld.long 0x00 24.--28. " PRIORITY3 ,The priority number for interrupt request source 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 16.--20. " PRIORITY2 ,The priority number for interrupt request source 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 8.--12. " PRIORITY1 ,The priority number for interrupt request source 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 0.--4. " PRIORITY0 ,The priority number for interrupt request source 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x04 "INTPRI1,Interrupt priority register 1"
|
|
bitfld.long 0x04 24.--28. " PRIORITY7 ,The priority number for interrupt request source 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 16.--20. " PRIORITY6 ,The priority number for interrupt request source 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 8.--12. " PRIORITY5 ,The priority number for interrupt request source 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x04 0.--4. " PRIORITY4 ,The priority number for interrupt request source 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x08 "INTPRI2,Interrupt priority register 2"
|
|
bitfld.long 0x08 24.--28. " PRIORITY11 ,The priority number for interrupt request source 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 16.--20. " PRIORITY10 ,The priority number for interrupt request source 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 8.--12. " PRIORITY9 ,The priority number for interrupt request source 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x08 0.--4. " PRIORITY8 ,The priority number for interrupt request source 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x0c "INTPRI3,Interrupt priority register 3"
|
|
bitfld.long 0x0c 24.--28. " PRIORITY15 ,The priority number for interrupt request source 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 16.--20. " PRIORITY14 ,The priority number for interrupt request source 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 8.--12. " PRIORITY13 ,The priority number for interrupt request source 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x0c 0.--4. " PRIORITY12 ,The priority number for interrupt request source 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x10 "INTPRI4,Interrupt priority register 4"
|
|
bitfld.long 0x10 24.--28. " PRIORITY19 ,The priority number for interrupt request source 19" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 16.--20. " PRIORITY18 ,The priority number for interrupt request source 18" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 8.--12. " PRIORITY17 ,The priority number for interrupt request source 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x10 0.--4. " PRIORITY16 ,The priority number for interrupt request source 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x14 "INTPRI5,Interrupt priority register 5"
|
|
bitfld.long 0x14 24.--28. " PRIORITY23 ,The priority number for interrupt request source 23" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 16.--20. " PRIORITY22 ,The priority number for interrupt request source 22" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 8.--12. " PRIORITY21 ,The priority number for interrupt request source 21" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x14 0.--4. " PRIORITY20 ,The priority number for interrupt request source 20" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x18 "INTPRI6,Interrupt priority register 6"
|
|
bitfld.long 0x18 24.--28. " PRIORITY27 ,The priority number for interrupt request source 27" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 16.--20. " PRIORITY26 ,The priority number for interrupt request source 26" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 8.--12. " PRIORITY25 ,The priority number for interrupt request source 25" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x18 0.--4. " PRIORITY24 ,The priority number for interrupt request source 24" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
line.long 0x1c "INTPRI7,Interrupt priority register 7"
|
|
bitfld.long 0x1c 24.--28. " PRIORITY31 ,The priority number for interrupt request source 31" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 16.--20. " PRIORITY30 ,The priority number for interrupt request source 30" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 8.--12. " PRIORITY29 ,The priority number for interrupt request source 29" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x1c 0.--4. " PRIORITY28 ,The priority number for interrupt request source 28" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "ADC (A/D Converter)"
|
|
group 0x8002++0x01
|
|
line.word 0x00 "ADCCON,A/D Converter control register"
|
|
bitfld.word 0x00 8. " FLAG ,A/D converter state flag" "In process,Stopped"
|
|
bitfld.word 0x00 7. " MODE ,Conversion Mode" "10-bit,8-bit"
|
|
bitfld.word 0x00 6. " STBY ,Standby Mode" "Normal operation,Power down"
|
|
bitfld.word 0x00 4.--5. " CLKSEL ,Clock Source" "MCLK/16,MCLK/8,MCLK/4,MCLK/2"
|
|
textline " "
|
|
bitfld.word 0x00 1.--3. " ASEL ,Analog Input Select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
bitfld.word 0x00 0. " ADEN ,A/D Conversion Enable" "Stopped,Started"
|
|
if (((data.word(sd:(0x07ff0000+0x8002)))&0x80)==0x00)
|
|
group 0x8006++0x01
|
|
line.word 0x00 "ADCDAT,A/D Converter data register"
|
|
hexmask.word 0x00 0.--9. 1. " DATA ,A/D converter output"
|
|
else
|
|
group 0x8006++0x01
|
|
line.word 0x00 "ADCDAT,A/D Converter data register"
|
|
hexmask.word 0x00 2.--9. 1. " DATA ,A/D converter output"
|
|
endif
|
|
tree.end
|
|
tree "Basic Timer & Watchdog Timer"
|
|
group 0xa002++0x01
|
|
line.word 0x00 "BTCON,Basic Timer control register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " WDTE ,Watchdog Timer Enable"
|
|
bitfld.word 0x00 2.--3. " CS ,Clock Source Select" "Fin/2^13,Fin/2^12,Fin/2^11,Fin/2^9"
|
|
bitfld.word 0x00 1. " BTC ,Basic Timer Clear" "No effect,Cleared"
|
|
bitfld.word 0x00 0. " WDTC ,Watchdog Timer Clear" "No effect,Cleared"
|
|
rgroup 0xa007++0x00
|
|
line.byte 0x00 "BTCNT,Basic Timer count register"
|
|
hexmask.byte 0x00 0.--7. 1. " CV ,Count value"
|
|
tree.end
|
|
tree "IIC (IIC-BUS INTERFACE)"
|
|
group 0xe000++0x05
|
|
line.byte 0x00 "IICCON,IIC-bus control register"
|
|
bitfld.byte 0x00 7. " RESET ,The IIC bus controller reset" "No effect,Reset"
|
|
bitfld.byte 0x00 5. " BE ,IIC-Bus Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " ACKE ,Acknowledge Enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2.--3. " MS ,Mode Selection" "Slave receive,Slave transmit,Master receive,Master transmit"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " BSSF ,Busy Signal Status Flag" "Stopped,Started"
|
|
line.byte 0x01 "IICSTAT,IIC-bus status register"
|
|
bitfld.byte 0x01 4. " INTFLAG ,Interrupt Pending Flag" "Not pending/Cleared,Pending/N/A"
|
|
bitfld.byte 0x01 3. " ASF ,Arbitration Status Flag" "Not failed,Failed"
|
|
bitfld.byte 0x01 2. " MACSF ,Master Address Call Status Flag" "Start/Stop,Slave addr matched IICADD"
|
|
bitfld.byte 0x01 1. " GCSF ,General Call Status Flag" "Start/Stop,Issued"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " LRBSF ,Last-received Bit Status Flag" "Not acknowledged,Acknowledged"
|
|
line.byte 0x02 "IICDS,IIC-Bus transmit/receive data shift register"
|
|
hexmask.byte 0x02 0.--7. 1. " DS ,Data Shift"
|
|
line.byte 0x03 "IICADD,IIC-Bus transmit/receive address register"
|
|
hexmask.byte 0x03 1.--7. 1. " SA ,Slave Address"
|
|
line.byte 0x04 "IICPS,IIC-Bus Prescaler register"
|
|
hexmask.byte 0x04 0.--7. 1. " PS ,Prescaler Value"
|
|
line.byte 0x05 "IICPCNT,IIC-Bus Prescaler Counter register"
|
|
hexmask.byte 0x05 0.--7. 1. " PCNT ,Prescaler Counter Value"
|
|
tree.end
|
|
tree "Power Management"
|
|
group 0xd003++0x00
|
|
line.byte 0x00 "SYSCON,System control register"
|
|
bitfld.byte 0x00 6. " GIE ,Global Interrupt Enable" "Not requested,Requested"
|
|
bitfld.byte 0x00 3.--5. " CS ,Clock Select" "MCLK/16,MCLK/8,MCLK/2,MCLK,MCLK/1024,?..."
|
|
bitfld.byte 0x00 2. " DMA_IDLE ,DMA IDLE Control" "Normal operation,DMA_IDLE"
|
|
bitfld.byte 0x00 1. " IDLE ,IDLE Control" "Normal operation,IDLE"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " STOP ,STOP Control" "Normal operation,STOP"
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
group 0xa013++0x00
|
|
line.byte 0x00 "RTCCON,RTC control register"
|
|
bitfld.byte 0x00 3. " CLKRST ,RTC clock count reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " CNTSEL ,BCD count select" "Merged,Separated"
|
|
bitfld.byte 0x00 1. " CLKSEL ,BCD clock select" "XTAL 1/2^15,XTAL"
|
|
bitfld.byte 0x00 0. " RTCEN ,RTC read/write enable" "Disabled,Enabled"
|
|
group 0xa012++0x00
|
|
line.byte 0x00 "RTCALM,RTC alarm control register"
|
|
bitfld.byte 0x00 6. " ALMEN ,Alarm global enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " YEAREN ,Year alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 4. " MONREN ,Month alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " DAYEN ,Day alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " HOUREN ,Hour alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " MINEN ,Minute alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SECEN ,Second alarm enable" "Disabled,Enabled"
|
|
group 0xa033++0x00
|
|
line.byte 0x00 "ALMSEC,Alarm second data register"
|
|
bitfld.byte 0x00 4.--6. " ,BCD value for alarm second from 0 to 5" "0,1,2,3,4,5,X,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm second from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
group 0xa032++0x00
|
|
line.byte 0x00 "ALMMIN,Alarm minute data register"
|
|
bitfld.byte 0x00 4.--6. " ,BCD value for alarm minute from 0 to 5" "0,1,2,3,4,5,X,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm minute from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
if (((data.byte(sd:(0x07ff0000+0xa031)))&0x30)==0x20)
|
|
group 0xa031++0x00
|
|
line.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for alarm hour from 0 to 2" "0,1,2,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm hour from 0 to 3" "0,1,2,3,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa031++0x00
|
|
line.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for alarm hour from 0 to 2" "0,1,2,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm hour from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
if (((data.byte(sd:(0x07ff0000+0xa037)))&0x30)==0x30)
|
|
group 0xa037++0x00
|
|
line.byte 0x00 "ALMDAY,Alarm day data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for alarm day, from 0 to 28, 29, 30, 31 from 0 to 3" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm day, from 0 to 28, 29, 30, 31 from 0 to 1" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa037++0x00
|
|
line.byte 0x00 "ALMDAY,Alarm day data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for alarm day, from 0 to 28, 29, 30, 31 from 0 to 3" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm day, from 0 to 28, 29, 30, 31 from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
if (((data.byte(sd:(0x07ff0000+0xa036)))&0x10)==0x10)
|
|
group 0xa036++0x00
|
|
line.byte 0x00 "ALMMON,Alarm month data register"
|
|
bitfld.byte 0x00 4. " ,BCD value for alarm month from 0 to 1" "0,1"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm month from 0 to 2" "0,1,2,X,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa036++0x00
|
|
line.byte 0x00 "ALMMON,Alarm month data register"
|
|
bitfld.byte 0x00 4. " ,BCD value for alarm month from 0 to 1" "0,1"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for alarm month from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
group 0xa035++0x00
|
|
line.byte 0x00 "ALMYEAR,Alarm year data register"
|
|
hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year from 00 to 99"
|
|
group 0xa023++0x00
|
|
line.byte 0x00 "BCDSEC,BCD second data register"
|
|
bitfld.byte 0x00 4.--6. " ,BCD value for second from 0 to 5" "0,1,2,3,4,5,X,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for second from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
group 0xa022++0x00
|
|
line.byte 0x00 "BCDMIN,BCD minute data register"
|
|
bitfld.byte 0x00 4.--6. " ,BCD value for minute from 0 to 5" "0,1,2,3,4,5,X,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for minute from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
if (((data.byte(sd:(0x07ff0000+0xa021)))&0x30)==0x20)
|
|
group 0xa021++0x00
|
|
line.byte 0x00 "BCDHOUR,BCD hour data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for hour from 0 to 2" "0,1,2,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for hour from 0 to 3" "0,1,2,3,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa021++0x00
|
|
line.byte 0x00 "BCDHOUR,BCD hour data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for hour from 0 to 2" "0,1,2,X"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for hour from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
if (((data.byte(sd:(0x07ff0000+0xa027)))&0x30)==0x30)
|
|
group 0xa027++0x00
|
|
line.byte 0x00 "BCDDAY,BCD day data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for hour from 0 to 3" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for hour from 0 to 1" "0,1,X,X,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa027++0x00
|
|
line.byte 0x00 "BCDDAY,BCD day data register"
|
|
bitfld.byte 0x00 4.--5. " ,BCD value for hour from 0 to 3" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for hour from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
group 0xa020++0x00
|
|
line.byte 0x00 "BCDDATE,BCD date data register"
|
|
bitfld.byte 0x00 0.--2. " DATEDATA ,BCD value for date from 1 to 7" "0,1,2,3,4,5,6,7"
|
|
if (((data.byte(sd:(0x07ff0000+0xa026)))&0x10)==0x10)
|
|
group 0xa026++0x00
|
|
line.byte 0x00 "BCDMON,BCD month data register"
|
|
bitfld.byte 0x00 4. " ,BCD value for month from 0 to 1" "0,1"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for month from 0 to 2" "0,1,2,X,X,X,X,X,X,X,X,X,X,X,X,X"
|
|
else
|
|
group 0xa026++0x00
|
|
line.byte 0x00 "BCDMON,BCD month data register"
|
|
bitfld.byte 0x00 4. " ,BCD value for month from 0 to 1" "0,1"
|
|
bitfld.byte 0x00 0.--3. " ,BCD value for month from 0 to 9" "0,1,2,3,4,5,6,7,8,9,X,X,X,X,X,X"
|
|
endif
|
|
group 0xa025++0x00
|
|
line.byte 0x00 "BCDYEAR,BCD year data register"
|
|
hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year from 00 to 99"
|
|
group 0xa010++0x01
|
|
line.byte 0x00 "RINTPND,RTC time interrupt pending register"
|
|
bitfld.byte 0x00 3. " INT_DAY ,RTC DAY interrupt pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 2. " INT_HOUR ,RTC HOUR interrupt pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 1. " INT_MIN ,RTC MIN interrupt pending" "Not pending,Pending"
|
|
bitfld.byte 0x00 0. " INT_SEC ,RTC SEC interrupt pending" "Not pending,Pending"
|
|
line.byte 0x01 "RINTCON,RTC time interrupt control register"
|
|
bitfld.byte 0x01 3. " INT_DAY ,Setting RTC Time interrupt enable of DAY" "Disabled,Enabled"
|
|
bitfld.byte 0x01 2. " INT_HOUR ,Setting RTC Time interrupt enable of HOUR" "Disabled,Enabled"
|
|
bitfld.byte 0x01 1. " INT_MIN ,Setting RTC Time interrupt enable of MIN" "Disabled,Enabled"
|
|
bitfld.byte 0x01 0. " INT_SEC ,Setting RTC Time interrupt enable of SEC" "Disabled,Enabled"
|
|
tree.end
|
|
width 8.
|
|
group ice:0x8--0x0d "Watchpoint 0"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
group ice:0x10--0x15 "Watchpoint 1"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
textline ""
|