9229 lines
569 KiB
Plaintext
9229 lines
569 KiB
Plaintext
; --------------------------------------------------------------------------------
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; @Title: S3C2410X, S3C2412X, S3C2413X On-Chip Peripherals
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; @Props: Released
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; @Author: KAM
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; @Changelog: 2006-08-03 KAM
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; @Manufacturer: SAMSUNG - Samsung Semiconductor
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; @Doc: um_s3c2410s_rev12_030428.pdf (2003-04-28); S3C2412X.pdf (2005.06)
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; S3C2413X.pdf
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; @Core: ARM920T, ARM926EJ-S
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; @Chip: S3C2410X
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; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pers3c241xx.per 7592 2017-02-18 13:54:14Z askoncej $
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config 16. 8.
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width 0x0b
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base ad:0x00000000
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sif ((cpu()=="S3C2410X")||(cpu()=="S3C2412X")||(cpu()=="S3C2413X"))
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tree "ARM Core Registers"
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sif (cpu()=="S3C2410X")
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width 8.
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tree "ID Registers"
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group c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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group c15:0x0100--0x0100
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line.long 0x0 "CTR,Cache Type"
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bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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tree.end
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tree "MMU Control and Configuration"
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width 8.
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group c15:0x1--0x1
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 31. " iA ,Asynchronous Clocking Select" "0,1"
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bitfld.long 0x0 30. " nF ,nFastBus Select" "0,1"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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textline " "
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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textline " "
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group c15:0x0002--0x0002
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line.long 0x0 "TTBR,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x5--0x5
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x105--0x105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x6--0x6
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line.long 0x0 "DFAR,Data Fault Address Register"
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group c15:0x106--0x106
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line.long 0x0 "IFAR,Instruction Fault Address Register"
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textline " "
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group c15:0x000d--0x000d
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line.long 0x0 "FCSEPID,FCSE Process ID"
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tree.end
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tree "Cache Control and Configuration"
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group c15:0x9--0x9
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line.long 0x0 "DCACHE,Data Cache Lockdown"
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group c15:0x109--0x109
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line.long 0x0 "ICACHE,Instruction Cache Lockdown"
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group c15:0x11d--0x11d
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line.long 0x0 "ICINDEX,Instruction Cache Index"
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group c15:0x11e--0x11e
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line.long 0x0 "DCINDEX,Data Cache Index"
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group c15:0x0f--0x0f
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line.long 0x0 "TEST,Test State"
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tree.end
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tree "ICEbreaker"
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width 8.
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group ice:0x0--0x5 "Debug Control"
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line.long 0x0 "DBGCTRL,Debug Control Register"
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bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
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bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
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textline " "
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bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
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bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
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bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x4 "DBGSTAT,Debug Status Register"
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bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,1"
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bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
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bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
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bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
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bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
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line.long 0x8 "VECTOR,Vector Catch Register"
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bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
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bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
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bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
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bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
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bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
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bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
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bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
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line.long 0x10 "COMCTRL,Debug Communication Control Register"
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bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
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bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
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bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
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line.long 0x14 "COMDATA,Debug Communication Data Register"
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group ice:0x8--0x0d "Watchpoint 0"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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group ice:0x10--0x15 "Watchpoint 1"
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line.long 0x0 "AV,Address Value"
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line.long 0x4 "AM,Address Mask"
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line.long 0x8 "DV,Data Value"
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line.long 0x0c "DM,Data Mask"
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line.long 0x10 "CV,Control Value"
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bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
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bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
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bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
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bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
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bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
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bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
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bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
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bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
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line.long 0x14 "CM,Control Mask"
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bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
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bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
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bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
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bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
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bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
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bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
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bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
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tree.end
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elif ((cpu()=="S3C2412X")||(cpu()=="S3C2413X"))
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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width 8.
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tree "ID Registers"
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group c15:0x0000--0x0000
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line.long 0x0 "MIDR,Identity Code"
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hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer"
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hexmask.long.byte 0x0 20.--23. 0x1 " SPEC ,Specification Revision"
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hexmask.long.byte 0x0 16.--19. 0x1 " ARCH ,Architecture Version"
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hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
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hexmask.long.byte 0x0 0.--3. 0x01 " REV ,Layout Revision"
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group c15:0x0100--0x0100
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line.long 0x0 "CTR,Cache Type"
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bitfld.long 0x0 25.--28. " CLASS ,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
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bitfld.long 0x0 24. " H ,Cache Havardness" "no,yes"
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textline " "
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bitfld.long 0x0 18.--21. " DSIZE ,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 15.--17. " DASS ,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 14. " DM ,Data Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 12.--13. " DLENGTH ,Data Cache Line Length" "2,4,8,16"
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textline " "
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bitfld.long 0x0 6.--9. " ISIZE ,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
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bitfld.long 0x0 3.--5. " IASS ,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
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bitfld.long 0x0 2. " IM ,Instruction Cache Multiplier Bit" "0,1"
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bitfld.long 0x0 0.--1. " ILENGTH ,Instruction Cache Line Length" "2,4,8,16"
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group c15:0x0200--0x0200
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line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
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bitfld.long 0x0 16. " DP ,Data TCM Present" "no,yes"
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bitfld.long 0x0 0. " IP ,Instruction TCM Present" "no,yes"
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tree.end
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tree "MMU Control and Configuration"
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width 8.
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group c15:0x0001--0x0001
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line.long 0x0 "CR,Control Register"
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bitfld.long 0x0 15. " L4 ,Configure Loading TBIT" "Enable,Disable"
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bitfld.long 0x0 14. " RR ,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
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bitfld.long 0x0 13. " V ,Location of Exception Vectors" "0x00000000,0xFFFF0000"
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textline " "
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bitfld.long 0x0 12. " I ,Instruction Cache" "Disable,Enable"
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bitfld.long 0x0 9. " R ,ROM Protection" "Disable,Enable"
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bitfld.long 0x0 8. " S ,System Protection" "Disable,Enable"
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bitfld.long 0x0 7. " B ,Endianism" "Little,Big"
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textline " "
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bitfld.long 0x0 2. " C ,Data Cache" "Disable,Enable"
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bitfld.long 0x0 1. " A ,Alignment Fault Checking" "Disable,Enable"
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bitfld.long 0x0 0. " M ,MMU" "Disable,Enable"
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textline " "
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group c15:0x0002--0x0002
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line.long 0x0 "TTBR,Translation Table Base Register"
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hexmask.long 0x0 14.--31. 0x4000 " TTBA ,Translation Table Base Address"
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textline " "
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group c15:0x3--0x3
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line.long 0x0 "DACR,Domain Access Control Register"
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bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager"
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textline " "
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bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager"
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bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager"
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textline " "
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group c15:0x0005--0x0005
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line.long 0x0 "DFSR,Data Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0105--0x0105
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line.long 0x0 "IFSR,Instruction Fault Status Register"
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bitfld.long 0x0 0x4--0x7 " DOMAIN ,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x0 0x0--0x3 " STATUS ,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
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group c15:0x0006--0x0006
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line.long 0x0 "DFAR,Data Fault Address Register"
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textline " "
|
|
group c15:0x000a--0x000a
|
|
line.long 0x0 "TLBR,TLB Lockdown Register"
|
|
bitfld.long 0x0 26.--28. " VICTIM ,Victim" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0. " P ,P bit" "0,1"
|
|
textline " "
|
|
group c15:0x000d--0x000d
|
|
line.long 0x0 "FCSEPID,FCSE Process ID"
|
|
group c15:0x010d--0x010d
|
|
line.long 0x0 "CONTEXT,Context ID"
|
|
tree.end
|
|
tree "Cache Control and Configuration"
|
|
group c15:0x0009--0x0009
|
|
line.long 0x0 "DCACHE,Data Cache Lockdown"
|
|
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
|
|
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
|
|
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
|
|
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
|
|
group c15:0x0109--0x0109
|
|
line.long 0x0 "ICACHE,Instruction Cache Lockdown"
|
|
bitfld.long 0x0 3. " LWAY3 ,L bit for WAY 3" "0,1"
|
|
bitfld.long 0x0 2. " LWAY2 ,L bit for WAY 2" "0,1"
|
|
bitfld.long 0x0 1. " LWAY1 ,L bit for WAY 1" "0,1"
|
|
bitfld.long 0x0 0. " LWAY0 ,L bit for WAY 0" "0,1"
|
|
tree.end
|
|
tree "TCM Control and Configuration"
|
|
group c15:0x0019--0x0019
|
|
line.long 0x0 "DTCM,Data TCM Region Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
|
|
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
|
|
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
|
|
group c15:0x0119--0x0119
|
|
line.long 0x0 "ITCM,Instruction TCM Region Register"
|
|
hexmask.long 0x0 12.--31. 0x1000 " BASE ,Base Address"
|
|
bitfld.long 0x0 2.--5. " SIZE ,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
|
|
bitfld.long 0x0 0. " ENABLE ,Enable Bit" "disable,enable"
|
|
tree.end
|
|
tree "Test and Debug"
|
|
group c15:0x000f--0x000f
|
|
line.long 0x0 "DOVRR,Debug Override Register"
|
|
bitfld.long 0x0 19. " TCALL ,Test and clean all" "disable,enable"
|
|
bitfld.long 0x0 18. " DTLBMISS ,Abort Data TLB Miss" "no abort,abort"
|
|
bitfld.long 0x0 17. " ITLBMISS ,Abort Instruction TLB Miss" "no abort,abort"
|
|
textline " "
|
|
bitfld.long 0x0 16. " PREFETCH ,NC Instruction Prefetching" "enable,disable"
|
|
bitfld.long 0x0 15. " CLOCKGATE ,Block Level Clock Gating" "enable,disable"
|
|
bitfld.long 0x0 14. " NCBSTORE ,NCB Stores" "disable,enable"
|
|
bitfld.long 0x0 13. " MMU/DC ,MMU disable DCache Enabled Behaviour" "NCNB,WT"
|
|
group c15:0x001f--0x001f
|
|
line.long 0x0 "ADDRESS,Debug/Test Address"
|
|
;wgroup c15:0x402f--0x402f
|
|
; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
|
|
;wgroup c15:0x403f--0x403f
|
|
; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
|
|
;wgroup c15:0x404f--0x404f
|
|
; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
|
|
;wgroup c15:0x405f--0x405f
|
|
; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
|
|
;wgroup c15:0x407f--0x407f
|
|
; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
|
|
;wgroup c15:0x412f--0x412f
|
|
; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
|
|
;wgroup c15:0x413f--0x413f
|
|
; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
|
|
;wgroup c15:0x414f--0x414f
|
|
; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
|
|
;wgroup c15:0x415f--0x415f
|
|
; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
|
|
;wgroup c15:0x417f--0x417f
|
|
; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
|
|
group c15:0x101f--0x101f
|
|
line.long 0x0 "TRACE,Trace Control"
|
|
bitfld.long 0x0 2. " FIQ ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
|
|
bitfld.long 0x0 1. " IRQ ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
|
|
group c15:0x700f--0x700f
|
|
line.long 0x0 "CACHE,Cache Debug Control"
|
|
bitfld.long 0x0 2. " DWT ,Disable Writeback (force WT)" "writeback,write-through"
|
|
bitfld.long 0x0 1. " DIL ,Disable ICache Linefill" "enable,disable"
|
|
bitfld.long 0x0 0. " DDL ,Disable DCache Linefill" "enable,disable"
|
|
group c15:0x701f--0x701f
|
|
line.long 0x0 "MMU,MMU Debug Control"
|
|
bitfld.long 0x0 7. " TLBMI ,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
|
|
bitfld.long 0x0 6. " TLBMD ,Disable Main TLB Matching for Data Accesses" "enable,disable"
|
|
bitfld.long 0x0 5. " TLBLI ,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
|
|
bitfld.long 0x0 4. " TLBLD ,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
|
|
textline " "
|
|
bitfld.long 0x0 3. " TLBMMI ,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
|
|
bitfld.long 0x0 2. " TLBMMD ,Disable Micro TLB Matching for Data Accesses" "enable,disable"
|
|
bitfld.long 0x0 1. " TLBMLI ,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
|
|
bitfld.long 0x0 0. " TLBMLD ,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
|
|
group c15:0x002f--0x002f
|
|
line.long 0x0 "REMAP,Memory Region Remap"
|
|
bitfld.long 0x0 14.--15. " IWB ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 12.--13. " IWT ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 10.--11. " INCB ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 8.--9. " INCNB ," "NCNB,NCB,WT,WB"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " DWB ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 4.--5. " DWT ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 2.--3. " DNCB ," "NCNB,NCB,WT,WB"
|
|
bitfld.long 0x0 0.--1. " DNCNB ," "NCNB,NCB,WT,WB"
|
|
tree.end
|
|
tree "ICEbreaker"
|
|
width 8.
|
|
group ice:0x0--0x5 "Debug Control"
|
|
line.long 0x0 "DBGCTRL,Debug Control Register"
|
|
bitfld.long 0x0 0x5 " ICE ,EmbeddedICE Disable" "enabled,disabled"
|
|
bitfld.long 0x0 0x4 " MONITOR ,Monitor Mode Enable" "disabled,enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0x3 " STEP ,Single Step" "disabled,enabled"
|
|
bitfld.long 0x0 0x2 " INTDIS ,Interrupts Disable" "enabled,disabled"
|
|
bitfld.long 0x0 0x1 " DBGRQ ,Debug Request" "no,yes"
|
|
bitfld.long 0x0 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
|
|
line.long 0x4 "DBGSTAT,Debug Status Register"
|
|
bitfld.long 0x4 0x6--0x9 " MOE ,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
|
|
bitfld.long 0x4 0x5 " IJBIT ,IJBIT" "0,java"
|
|
bitfld.long 0x4 0x4 " ITBIT ,ITBIT" "0,thumb"
|
|
bitfld.long 0x4 0x3 " SYSCOMP ,SYSCOMP" "0,1"
|
|
bitfld.long 0x4 0x2 " IFEN ,Interrupts Enable" "disabled,enabled"
|
|
bitfld.long 0x4 0x1 " DBGRQ ,Debug Request" "no,yes"
|
|
bitfld.long 0x4 0x0 " DBGACK ,Debug Acknowledge" "no,yes"
|
|
line.long 0x8 "VECTOR,Vector Catch Register"
|
|
bitfld.long 0x8 0x7 " FIQ ,FIQ" "dis,ena"
|
|
bitfld.long 0x8 0x6 " IRQ ,IRQ" "dis,ena"
|
|
bitfld.long 0x8 0x4 " D_ABO ,D_ABORT" "dis,ena"
|
|
bitfld.long 0x8 0x3 " P_ABO ,P_ABORT" "dis,ena"
|
|
bitfld.long 0x8 0x2 " SWI ,SWI" "dis,ena"
|
|
bitfld.long 0x8 0x1 " UND ,UNDEF" "dis,ena"
|
|
bitfld.long 0x8 0x0 " RES ,RESET" "dis,ena"
|
|
line.long 0x10 "COMCTRL,Debug Communication Control Register"
|
|
bitfld.long 0x10 28.--31. " VERSION ,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
|
|
bitfld.long 0x10 0x1 " WRITE ,Write Register Free" "idle,pend"
|
|
bitfld.long 0x10 0x0 " READ ,Read Register Free" "idle,pend"
|
|
line.long 0x14 "COMDATA,Debug Communication Data Register"
|
|
group ice:0x8--0x0d "Watchpoint 0"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,W"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
group ice:0x10--0x15 "Watchpoint 1"
|
|
line.long 0x0 "AV,Address Value"
|
|
line.long 0x4 "AM,Address Mask"
|
|
line.long 0x8 "DV,Data Value"
|
|
line.long 0x0c "DM,Data Mask"
|
|
line.long 0x10 "CV,Control Value"
|
|
bitfld.long 0x10 0x8 " ENABLE ,Global Enable for Watchpoint 1" "DIS,ENA"
|
|
bitfld.long 0x10 0x7 " RANGE ,Assert RANGEOUT Signal" "0 ,1"
|
|
bitfld.long 0x10 0x6 " CHAIN ,Connect to Watchpoint 0" "0 ,1"
|
|
bitfld.long 0x10 0x5 " EXTERN ,Depentend from EXTERN Signal" "0 ,1"
|
|
bitfld.long 0x10 0x4 " nTRANS ,CPU Mode" "User,no User"
|
|
bitfld.long 0x10 0x3 " nOPC ,Op Fetch" "Inst,Data"
|
|
bitfld.long 0x10 0x1--0x2 " MAS ,Access Size" "Byte,Word,Long,Res"
|
|
bitfld.long 0x10 0x0 " nRW ,Read/Write" "R ,w"
|
|
line.long 0x14 "CM,Control Mask"
|
|
bitfld.long 0x14 0x7 " RANGE ,Assert RANGEOUT Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x6 " CHAIN ,Connect to Watchpoint 0" "ENA,DIS"
|
|
bitfld.long 0x14 0x5 " EXTERN ,Depentend from EXTERN Signal" "ENA,DIS"
|
|
bitfld.long 0x14 0x4 " nTRANS ,CPU Mode" "ENA,DIS "
|
|
bitfld.long 0x14 0x3 " nOPC ,Op Fetch" "ENA ,DIS"
|
|
bitfld.long 0x14 0x1--0x2 " MAS ,Access Size" "ENA ,Res,Res,DIS"
|
|
bitfld.long 0x14 0x0 " nRW ,Read/Write" "ENA,DIS"
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
endif
|
|
width 0xb
|
|
tree.end
|
|
tree "External Bus Interface (EBI)"
|
|
base ad:0x48800000
|
|
sif (cpu()=="S3C2413X")
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "EBIPR,Bus Priority Decision Register"
|
|
bitfld.long 0x00 0.--2. " EBIPR ,Priority order" "One->NAND->CF,One->CF->NAND,NAND->One->CF,CF->One->NAND,NAND->CF->One,CF->NAND->One,?..."
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "BANK_CFG,Bank Configuration Register"
|
|
bitfld.long 0x00 7. " BANK7CONF ,Bank 7 configuration" "NAND/SRAM,SDRAM"
|
|
bitfld.long 0x00 6. " BANK6CONF ,Bank 6 configuration" "NAND/SRAM,SDRAM"
|
|
bitfld.long 0x00 5. " BANK5CONF ,Bank 5 configuration" "NAND/SRAM,CF"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BANK4CONF ,Bank 4 configuration" "NAND/SRAM,CF"
|
|
bitfld.long 0x00 3. " BANK3CONF ,Bank 3 configuration" "NAND/SRAM,NANDFlash"
|
|
bitfld.long 0x00 2. " BANK2CONF ,Bank 2 configuration" "NAND/SRAM,NANDFlash"
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
width 10.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "EBIPR,Bus Priority Decision Register"
|
|
bitfld.long 0x00 0.--2. " EBIPR ,Priority order" "SRAM->NAND->CF,SRAM->CF->NAND,NAND->SRAM->CF,CF->SRAM->NAND,NAND->CF->SRAM,CF->NAND->SRAM,?..."
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "BANK_CFG,Bank Configuration Register"
|
|
bitfld.long 0x00 7. " BANK7CONF ,Bank 7 configuration" "SRAM,SDRAM"
|
|
bitfld.long 0x00 6. " BANK6CONF ,Bank 6 configuration" "SRAM,SDRAM"
|
|
bitfld.long 0x00 5. " BANK5CONF ,Bank 5 configuration" "SRAM,CF"
|
|
textline " "
|
|
bitfld.long 0x00 4. " BANK4CONF ,Bank 4 configuration" "SRAM,CF"
|
|
bitfld.long 0x00 3. " BANK3CONF ,Bank 3 configuration" "SRAM,NANDFlash"
|
|
bitfld.long 0x00 2. " BANK2CONF ,Bank 2 configuration" "SRAM,NANDFlash"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Mobile DRAM Controller"
|
|
base ad:0x48000000
|
|
sif (cpu()=="S3C2413X")
|
|
width 10.
|
|
if (((d.l(ad:(0x48000000+0x04)))&0x80000000)==0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
|
|
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
|
|
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MEMCFG ,External memory configuration" "SDR,MSDR,?..."
|
|
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
|
|
else
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
|
|
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
|
|
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MEMCFG ,External memory configuration" "SDR,MSDR,?..."
|
|
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "BANKCON1,Mobile DRAM Control Register"
|
|
bitfld.long 0x00 31. " BUSY ,DRAM controller status" "IDLE,BUSY"
|
|
bitfld.long 0x00 5. " AP ,Auto pre-charge control" "Enabled,Disabled"
|
|
bitfld.long 0x00 0.--1. " INIT ,DRAM initialization control" "Normal,PALL,MRS,EMRS"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "BANKCON2,Mobile DRAM Timing Control Register"
|
|
bitfld.long 0x00 20.--23. " tRAS ,Row active time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
|
|
bitfld.long 0x00 16.--19. " tRC ,Row cycle time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
|
|
bitfld.long 0x00 4.--5. " CASLAT ,CAS latency control" "Reserved,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " tRCD ,RAS to CAS delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 0.--1. " tRP ,Row pre-charge time" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "BANKCON3,Mobile DRAM (E)MRS Register"
|
|
bitfld.long 0x00 30.--31. " BA ,Bank address for EMRS" "00,01,10,11"
|
|
bitfld.long 0x00 21.--22. " DS ,DS(Drive Strength) for EMRS" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. " PASR ,PASR(Partial Array Self Refresh) for EMRS" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " BA ,Bank address for MRS" "00,01,10,11"
|
|
bitfld.long 0x00 4.--6. " CASLAT ,CAS latency for MRS" "Reserved,1 clock,2 clocks,3 clocks,?..."
|
|
bitfld.long 0x00 3. " BRTYPE ,DRAM burst type" "Sequential,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BRLEN ,Burst length" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "REFRESH,Mobile DRAM Refresh Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REFCYC ,DRAM refresh cycle"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "TIMEOUT,Write Buffer Time Out Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Write buffer time-out delay time"
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
width 10.
|
|
if (((d.l(ad:(0x48000000+0x04)))&0x80000000)==0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
|
|
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
|
|
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MEMCFG ,External memory configuration" "SDR,MSDR,?..."
|
|
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
|
|
else
|
|
rgroup.long 0x00++0x3
|
|
line.long 0x00 "BANKCFG,Mobile DRAM Configuration Register"
|
|
bitfld.long 0x00 17.--18. " RASBW0 ,Bit width of RAS address of Bank 0" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 14.--15. " RASBW1 ,Bit width of RAS address of Bank 1" "11-bit,12-bit,13-bit,14-bit"
|
|
bitfld.long 0x00 11.--12. " CASBW0 ,Bit width of CAS address of Bank 0" "8-bit,9-bit,10-bit,11-bit"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " CASBW1 ,Bit width of CAS address of Bank 1" "8-bit,9-bit,10-bit,11-bit"
|
|
bitfld.long 0x00 6.--7. " ADDRCFG0 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
bitfld.long 0x00 4.--5. " ADDRCFG1 ,Memory address configuration" "{BA/RAS/CAS},{RAS/BA/CAS},?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MEMCFG ,External memory configuration" "SDR,MSDR,?..."
|
|
bitfld.long 0x00 0. " BW ,External memory data bus width" "32-bit,16-bit"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "BANKCON1,Mobile DRAM Control Register"
|
|
bitfld.long 0x00 31. " BUSY ,DRAM controller status" "IDLE,BUSY"
|
|
bitfld.long 0x00 6. " WBUF ,Write buffer control" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " AP ,Auto pre-charge control" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 4. " PWRDN ,SDRAM power down control" "Not supported,Supported"
|
|
bitfld.long 0x00 0.--1. " INIT ,DRAM initialization control" "Normal,PALL,MRS,EMRS"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "BANKCON2,Mobile DRAM Timing Control Register"
|
|
bitfld.long 0x00 20.--23. " tRAS ,Row active time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
|
|
bitfld.long 0x00 16.--19. " tRC ,Row cycle time" "1-clock,2-clock,3-clock,4-clock,5-clock,6-clock,7-clock,8-clock,9-clock,10-clock,11-clock,12-clock,13-clock,14-clock,15-clock,16-clock"
|
|
bitfld.long 0x00 4.--5. " CASLAT ,CAS latency control" "Reserved,1 clock,2 clocks,3 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " tRCD ,RAS to CAS delay" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
bitfld.long 0x00 0.--1. " tRP ,Row pre-charge time" "1 clock,2 clocks,3 clocks,4 clocks"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "BANKCON3,Mobile DRAM (E)MRS Register"
|
|
bitfld.long 0x00 30.--31. " BA ,Bank address for EMRS" "00,01,10,11"
|
|
bitfld.long 0x00 21.--22. " DS ,DS(Drive Strength) for EMRS" "0,1,2,3"
|
|
bitfld.long 0x00 16.--18. " PASR ,PASR(Partial Array Self Refresh) for EMRS" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " BA ,Bank address for MRS" "00,01,10,11"
|
|
bitfld.long 0x00 4.--6. " CASLAT ,CAS latency for MRS" "Reserved,1 clock,2 clocks,3 clocks,?..."
|
|
bitfld.long 0x00 3. " BRTYPE ,DRAM burst type" "Sequential,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BRLEN ,Burst length" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "REFRESH,Mobile DRAM Refresh Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " REFCYC ,DRAM refresh cycle"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "TIMEOUT,Write Buffer Time Out Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " TIMEOUT ,Write buffer time-out delay time"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
sif ((cpu()=="S3C2412X")||(cpu()=="S3C2413X"))
|
|
tree.open "SSMC"
|
|
base ad:0x4f000000
|
|
width 15.
|
|
tree "Bank 0"
|
|
group.long 0x0++0x3
|
|
line.long 0x00 "SMBIDCYR0,Bank0 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x0+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR0,Bank0 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x0+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR0,Bank0 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x0+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR0,Bank0 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x0+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR0,Bank0 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x0+0x14)++0x3
|
|
line.long 0x00 "SMBCR0,Bank0 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0x0+0x18)++0x3
|
|
line.long 0x00 "SMBSR0,Bank0 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0x0+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR0,Bank0 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 1"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "SMBIDCYR1,Bank1 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x20+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR1,Bank1 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x20+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR1,Bank1 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x20+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR1,Bank1 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x20+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR1,Bank1 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x20+0x14)++0x3
|
|
line.long 0x00 "SMBCR1,Bank1 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0x20+0x18)++0x3
|
|
line.long 0x00 "SMBSR1,Bank1 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0x20+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR1,Bank1 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 2"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "SMBIDCYR2,Bank2 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x40+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR2,Bank2 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x40+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR2,Bank2 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x40+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR2,Bank2 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x40+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR2,Bank2 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x40+0x14)++0x3
|
|
line.long 0x00 "SMBCR2,Bank2 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0x40+0x18)++0x3
|
|
line.long 0x00 "SMBSR2,Bank2 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0x40+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR2,Bank2 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 3"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "SMBIDCYR3,Bank3 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x60+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR3,Bank3 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x60+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR3,Bank3 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x60+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR3,Bank3 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x60+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR3,Bank3 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x60+0x14)++0x3
|
|
line.long 0x00 "SMBCR3,Bank3 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0x60+0x18)++0x3
|
|
line.long 0x00 "SMBSR3,Bank3 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0x60+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR3,Bank3 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 4"
|
|
group.long 0x80++0x3
|
|
line.long 0x00 "SMBIDCYR4,Bank4 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x80+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR4,Bank4 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x80+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR4,Bank4 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0x80+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR4,Bank4 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x80+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR4,Bank4 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0x80+0x14)++0x3
|
|
line.long 0x00 "SMBCR4,Bank4 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0x80+0x18)++0x3
|
|
line.long 0x00 "SMBSR4,Bank4 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0x80+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR4,Bank4 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 5"
|
|
group.long 0xA0++0x3
|
|
line.long 0x00 "SMBIDCYR5,Bank5 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xA0+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR5,Bank5 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xA0+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR5,Bank5 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xA0+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR5,Bank5 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xA0+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR5,Bank5 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xA0+0x14)++0x3
|
|
line.long 0x00 "SMBCR5,Bank5 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0xA0+0x18)++0x3
|
|
line.long 0x00 "SMBSR5,Bank5 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0xA0+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR5,Bank5 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 6"
|
|
group.long 0xC0++0x3
|
|
line.long 0x00 "SMBIDCYR6,Bank6 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xC0+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR6,Bank6 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xC0+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR6,Bank6 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xC0+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR6,Bank6 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xC0+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR6,Bank6 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xC0+0x14)++0x3
|
|
line.long 0x00 "SMBCR6,Bank6 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0xC0+0x18)++0x3
|
|
line.long 0x00 "SMBSR6,Bank6 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0xC0+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR6,Bank6 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Bank 7"
|
|
group.long 0xE0++0x3
|
|
line.long 0x00 "SMBIDCYR7,Bank7 Idle Cycle Control Register"
|
|
bitfld.long 0x00 0.--3. " IDCY ,Idle or turnaround cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xE0+0x4)++0x3
|
|
line.long 0x00 "SMBWSTRDR7,Bank7 Read Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTRD ,Read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xE0+0x8)++0x3
|
|
line.long 0x00 "SMBWSTWRR7,Bank7 Write Wait State Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTWR ,Write wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
group.long (0xE0+0xc)++0x3
|
|
line.long 0x00 "SMBWSTOENR7,Bank7 Output Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTOEN ,Output enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xE0+0x10)++0x3
|
|
line.long 0x00 "SMBWSTWENR7,Bank7 Write Enable Assertion Delay Control Register"
|
|
bitfld.long 0x00 0.--3. " WSTWEN ,Write enable assertion delay from chip select assertion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long (0xE0+0x14)++0x3
|
|
line.long 0x00 "SMBCR7,Bank7 Control Register"
|
|
bitfld.long 0x00 21. " BIWriteEn ,SMBAA signal during write operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 20. " AddrValidWriteEn ,SMADDRVALID during write operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " BurstLenWrite ,Burst transfer length" "4-transfer,8-transfer,Reserved,Continous"
|
|
bitfld.long 0x00 17. " SyncWritDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 16. " BMWrite ,Burst mode write" "Nonburst,Burst"
|
|
bitfld.long 0x00 14. " WrapRead ,Wrapping burst feature from external memory enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " BIReadEn ,SMBAA signal during read operations" "SMBAA=1,Active for sync read access"
|
|
textline " "
|
|
bitfld.long 0x00 12. " AddrValidReadEn ,SMADDRVALID during read operations" "High,Active for sync/async write access"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " BurstLenRead ,Burst transfer length" "4-transfer,8-transfer,16-transfer,Continous"
|
|
bitfld.long 0x00 9. " SyncReadDev ,Synchronous access capable device connected" "Asynchronous,Synchronous"
|
|
textline " "
|
|
bitfld.long 0x00 8. " BMRead ,Burst mode read and asynchronous page mode" "Nonburst,Burst"
|
|
bitfld.long 0x00 6. " SMBLSPOL ,Polarity of signal nSMBLS" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " MW ,Memory width" "8-bit,16-bit,32-bit,?..."
|
|
bitfld.long 0x00 3. " WP ,Write protect" "Not protected,Protected"
|
|
textline " "
|
|
bitfld.long 0x00 2. " WaitEn ,External memory controller wait signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " WaitPol ,Polarity of external wait input for activation" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RBLE ,Read byte lane enable" "Deasserted,Asserted"
|
|
group.long (0xE0+0x18)++0x3
|
|
line.long 0x00 "SMBSR7,Bank7 Status Register"
|
|
bitfld.long 0x00 0. " WaitToutErr ,External wait timeout error flag/Write Protect Clear" "No error/No effect,Error/Cleared"
|
|
group.long (0xE0+0x1c)++0x3
|
|
line.long 0x00 "SMBWSTBRDR7,Bank7 Burst Read Wait Delay Control Register"
|
|
bitfld.long 0x00 0.--4. " WSTBRD ,Burst read wait state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
tree.end
|
|
tree "Control And Status"
|
|
width 8.
|
|
rgroup.long 0x200++0x3
|
|
line.long 0x00 "SSMCSR,SROMC Status Register"
|
|
bitfld.long 0x00 0. " WaitStatus ,External wait status" "Deasserted,Asserted"
|
|
group.long 0x204++0x3
|
|
line.long 0x00 "SSMCCR,SROMC Control Register"
|
|
bitfld.long 0x00 1.--2. " MemClkRatio ,SMMEMClk to HCLK ratio" "HCLK,HCLK/2,HCLK/3,?..."
|
|
bitfld.long 0x00 0. " SMClockEn ,CMCLK enable" "Disabled,Enabled"
|
|
tree.end
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif (cpu()=="S3C2410X")
|
|
tree "Memory Controller"
|
|
base ad:0x48000000
|
|
group 0x0000++0x3
|
|
line.long 0x00 "BWSCON,Bus width and wait status control register"
|
|
bitfld.long 0x00 31. " ST7 ,SRAM for using UB/LB for bank 7" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 30. " WS7 ,WAIT status for bank 7" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--29. " DW7 ,Data bus width for bank 7" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 27. " ST6 ,SRAM for using UB/LB for bank 6" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 26. " WS6 ,WAIT status for bank 6" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--25. " DW6 ,Data bus width for bank 6" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " ST5 ,SRAM for using UB/LB for bank 5" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 22. " WS5 ,WAIT status for bank 5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--21. " DW5 ,Data bus width for bank 5" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 19. " ST4 ,SRAM for using UB/LB for bank 4" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 18. " WS4 ,WAIT status for bank 4" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--17. " DW4 ,Data bus width for bank 4" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 15. " ST3 ,SRAM for using UB/LB for bank 3" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 14. " WS3 ,WAIT status for bank 3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--13. " DW3 ,Data bus width for bank 3" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 11. " ST2 ,SRAM for using UB/LB for bank 2" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 10. " WS2 ,WAIT status for bank 2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--9. " DW2 ,Data bus width for bank 2" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " ST1 ,SRAM for using UB/LB for bank 1" "No UB/LB,UB/LB"
|
|
bitfld.long 0x00 6. " WS1 ,WAIT status for bank 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--5. " DW1 ,Data bus width for bank 1" "8-bit,16-bit,32-bit,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1.--2. " DW0 ,Data bus width for bank 0" "Reserved,16-bit,32-bit,?..."
|
|
group 0x0004++0x1b "BANK CONTROL REGISTER(BANKCONN:nGCS0-nGCS5)"
|
|
line.long 0x0 "BANKCON0,Bank 0 control register"
|
|
bitfld.long 0x0 13.--14. " TACS ,Address set-up time before nGCS0" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x0 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x0 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x0 4.--5. " TCAH ,Address hold time after nGCS0" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x0 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
line.long 0x4 "BANKCON1,Bank 1 control register"
|
|
bitfld.long 0x4 13.--14. " TACS ,Address set-up time before nGCS1" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x4 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x4 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x4 4.--5. " TCAH ,Address hold time after nGCS1" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x4 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0x4 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
line.long 0x8 "BANKCON2,Bank 2 control register"
|
|
bitfld.long 0x8 13.--14. " TACS ,Address set-up time before nGCS2" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x8 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x8 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x8 4.--5. " TCAH ,Address hold time after nGCS2" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x8 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0x8 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
line.long 0xC "BANKCON3,Bank 3 control register"
|
|
bitfld.long 0xC 13.--14. " TACS ,Address set-up time before nGCS3" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0xC 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0xC 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0xC 4.--5. " TCAH ,Address hold time after nGCS3" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0xC 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0xC 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
line.long 0x10 "BANKCON4,Bank 4 control register"
|
|
bitfld.long 0x10 13.--14. " TACS ,Address set-up time before nGCS4" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x10 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x10 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0x10 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x10 4.--5. " TCAH ,Address hold time after nGCS4" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x10 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0x10 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
line.long 0x14 "BANKCON5,Bank 5 control register"
|
|
bitfld.long 0x14 13.--14. " TACS ,Address set-up time before nGCS5" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x14 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x14 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
textline " "
|
|
bitfld.long 0x14 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x14 4.--5. " TCAH ,Address hold time after nGCS5" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x14 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
textline " "
|
|
bitfld.long 0x14 0.--1. " PMC ,Page mode configuration" "1 data,4 data,8 data,16 data"
|
|
if (((data.long(ad:0x4800001c))&0x18000)==0x00)
|
|
group 0x001c++0x3
|
|
line.long 0x00 "BANKCON6,Bank 6 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
bitfld.long 0x00 13.--14. " TACS ,Address set-up time before nGCS6" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x00 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
bitfld.long 0x00 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x00 4.--5. " TCAH ,Address hold time after nGCS6" "0 clock,1 clock,2 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
bitfld.long 0x00 0.--1. " PMC ,Page mode configuration" "1 data,4 consecutive accesses,8 consecutive accesses,16 consecutive accesses"
|
|
elif (((data.long(ad:0x4800001c))&0x18000)==0x18000)
|
|
group 0x001c++0x3
|
|
line.long 0x00 "BANKCON6,Bank 6 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
bitfld.long 0x00 2.--3. " TRCD ,RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..."
|
|
bitfld.long 0x00 0.--1. " SCAN ,Column address number" "8-bit,9-bit,10-bit,?..."
|
|
else
|
|
group 0x001c++0x3
|
|
line.long 0x00 "BANKCON6,Bank 6 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
endif
|
|
if (((data.long(ad:0x48000020))&0x18000)==0x00)
|
|
group 0x0020++0x3
|
|
line.long 0x00 "BANKCON7,Bank 7 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank7" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
bitfld.long 0x00 13.--14. " TACS ,Address set-up time before nGCS7" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x00 11.--12. " TCOS ,Chip selection set-up time before nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " TACC ,Access cycle" "1 clock,2 clocks,3 clocks,4 clocks,6 clocks,8 clocks,10 clocks,14 clocks"
|
|
bitfld.long 0x00 6.--7. " TCOH ,Chip selection hold time after nOE" "0 clock,1 clock,2 clocks,4 clocks"
|
|
bitfld.long 0x00 4.--5. " TCAH ,Address hold time after nGCS7" "0 clock,1 clock,2 clocks,4 clocks"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TACP ,Page mode access cycle at Page mode" "2 clocks,3 clocks,4 clocks,6 clocks"
|
|
bitfld.long 0x00 0.--1. " PMC ,Page mode configuration" "1 data,4 consecutive accesses,8 consecutive accesses,16 consecutive accesses"
|
|
elif (((data.long(ad:0x48000020))&0x18000)==0x18000)
|
|
group 0x0020++0x3
|
|
line.long 0x00 "BANKCON7,Bank 7 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank7" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
bitfld.long 0x00 2.--3. " TRCD ,RAS to CAS delay" "2 clocks,3 clocks,4 clocks,?..."
|
|
bitfld.long 0x00 0.--1. " SCAN ,Column address number" "8-bit,9-bit,10-bit,?..."
|
|
else
|
|
group 0x0020++0x3
|
|
line.long 0x00 "BANKCON7,Bank 7 control register"
|
|
bitfld.long 0x00 15.--16. " MT ,Determine the memory type for bank6" "ROM or SRAM,Reserved,Reserved,Sync DRAM"
|
|
endif
|
|
group 0x0024++0x3 "REFRESH CONTROL REGISTER"
|
|
line.long 0x00 "REFRESH,SDRAM refresh control register"
|
|
bitfld.long 0x00 23. " REFEN ,SDRAM Refresh Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22. " TREFMD ,SDRAM Refresh Mode" "Auto,Self"
|
|
bitfld.long 0x00 20.--21. " TRP ,SDRAM RAS pre-charge Time" "2 clocks,3 clocks,4 clocks,Not supported"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " TSRC ,SDRAM Semi Row Cycle Time" "4 clocks,5 clocks,6 clocks,7 clocks"
|
|
hexmask.long.word 0x00 0.--10. 1. " REFCNT ,SDRAM refresh count value"
|
|
group 0x0028++0x3 "BANKSIZE REGISTER"
|
|
line.long 0x00 "BANKSIZE,Flexible bank size register"
|
|
bitfld.long 0x00 7. " BURST_EN ,ARM core burst operation enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " SCKE_EN ,SDRAM power down mode enable control by SCKE" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " SCLK_EN ,SCLK enabled during SDRAM access cycle for reducing power consumption" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " BK76MAP ,Bank6/7 memory map" "32MB/32MB,64MB/64MB,128MB/128MB,Reserved,2MB/2MB,4MB/4MB,8MB/8MB,16MB/16MB"
|
|
group 0x002c++0x7 "SDRAM MODE REGISTER SET REGISTER"
|
|
line.long 0x00 "MRSRB6,Mode register set register bank6"
|
|
bitfld.long 0x00 9. " WBL ,Write burst length" "Burst,?..."
|
|
bitfld.long 0x00 7.--8. " TM ,Test mode" "Test mode,?..."
|
|
bitfld.long 0x00 4.--6. " CL ,CAS latency" "1 clock,Reserved,2 clocks,3 clocks,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3. " BT ,Burst type" "Sequential,?..."
|
|
bitfld.long 0x00 0.--2. " BL ,Burst length" "1,?..."
|
|
line.long 0x04 "MRSRB7,Mode register set register bank7"
|
|
bitfld.long 0x04 9. " WBL ,Write burst length" "Burst,?..."
|
|
bitfld.long 0x04 7.--8. " TM ,Test mode" "Test mode,?..."
|
|
bitfld.long 0x04 4.--6. " CL ,CAS latency" "1 clock,Reserved,2 clocks,3 clocks,?..."
|
|
textline " "
|
|
bitfld.long 0x04 3. " BT ,Burst type" "Sequential,?..."
|
|
bitfld.long 0x04 0.--2. " BL ,Burst length" "1,?..."
|
|
tree.end
|
|
endif
|
|
tree "NAND Flash Controller"
|
|
base ad:0x4e000000
|
|
sif (cpu()=="S3C2410X")
|
|
group 0x0000++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash configuration"
|
|
bitfld.long 0x00 15. " ENABLE ,NAND Flash controller enable/disable" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " INIECC ,Initialize ECC decoder/encoder" "Not initialized,Initialized"
|
|
bitfld.long 0x00 11. " NFMCEN ,NAND Flash Memory nFCE control" "Active,Inactive"
|
|
bitfld.long 0x00 8.--10. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 0.--2. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
|
|
group 0x0004++0xb
|
|
line.long 0x00 "NFCMD,NAND flash command set register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " COMMAND ,NAND Flash memory command value"
|
|
line.long 0x04 "NFADDR,NAND flash address set register"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ADDRESS ,NAND Flash memory address value"
|
|
line.long 0x08 "NFDATA,NAND flash data set register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " DATA ,NAND Flash memory data value"
|
|
rgroup 0x0010++0x7
|
|
line.long 0x00 "NFSTAT,NAND Flash operation status"
|
|
bitfld.long 0x00 0. " RNB ,NAND Flash memory status" "Busy,Ready"
|
|
line.long 0x04 "NFECC,NAND Flash ECC (Error Correction Code) register"
|
|
hexmask.long.byte 0x04 16.--23. 1. " ECC2 ,Error Correction Code #2"
|
|
hexmask.long.byte 0x04 8.--15. 1. " ECC1 ,Error Correction Code #1"
|
|
hexmask.long.byte 0x04 0.--7. 1. " ECC0 ,Error Correction Code #0"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 12.
|
|
if (((d.l(ad:0x4e000000))&0x8)==0x0)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 31. " NANDBoot ,NAND boot" "Not boot,Boot"
|
|
bitfld.long 0x00 30. " ECCClkCon ,Clock control for 4-bit ECC Engine" "> 66 MHz,< 66 MHz"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ECCType ,ECC Type Selection" "SLC,MLC"
|
|
bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page"
|
|
bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "256 Bytes/page,512 Bytes/page"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "3 cycle,4 cycle"
|
|
bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "NFCONF,NAND Flash Configuration Register"
|
|
bitfld.long 0x00 31. " NANDBoot ,NAND boot" "Not boot,Boot"
|
|
bitfld.long 0x00 30. " ECCClkCon ,Clock control for 4-bit ECC engine" "> 66 MHz,< 66 MHz"
|
|
textline " "
|
|
bitfld.long 0x00 24. " ECCType ,ECC type selection" "SLC,MLC"
|
|
bitfld.long 0x00 12.--14. " TACLS ,CLE & ALE duration setting value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " TWRPH0 ,TWRPH0 duration setting value" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 4.--6. " TWRPH1 ,TWRPH1 duration setting value" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 3. " AdvFlash ,Advanced NAND flash memory for auto-booting" "256/512 Bytes/page,1024/2048 Bytes/page"
|
|
bitfld.long 0x00 2. " PageSize ,NAND flash memory page size for auto-booting" "1024 Bytes/page,2048 Bytes/page"
|
|
textline " "
|
|
bitfld.long 0x00 1. " AddrCycle ,NAND flash memory address cycle for auto-booting" "4 cycle,5 cycle"
|
|
bitfld.long 0x00 0. " BusWidth ,NAND flash memory I/O bus width for auto-booting and general access" "8-bit,16-bit"
|
|
endif
|
|
if (((d.l(ad:(0x4e000000+0x4)))&0x01)==0x01)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "NFCONT,NAND Flash Control Register"
|
|
bitfld.long 0x00 18. " ECCDir ,4-bit ECC encoding/decoding control" "Decoding,Encoding"
|
|
bitfld.long 0x00 17. " LockTight ,Lock-tight configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SoftLock ,Soft lock configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EnbECCEncINT ,4-bit ECC encoding completion interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EnbECCDecINT ,4-bit ECC decoding completion interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RnB_TransMode ,RnB transition detection configuration" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MainECCLock ,Lock main area ECC generation" "Unlocked,Locked"
|
|
bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Ulocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " InitMECC ,Initialized main area ECC decoder/encoder" "Not initialized,Initialized"
|
|
bitfld.long 0x00 4. " InitSECC ,Initialized spare area ECC decoder/encoder" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Reg_nCE1 ,NAND flash memory nGCS[3] signal control" "Low,High"
|
|
bitfld.long 0x00 1. " Reg_nCE0 ,NAND flash memory nGCS[0/2] signal control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "NFCONT,NAND Flash Control Register"
|
|
bitfld.long 0x00 18. " ECCDir ,4-bit ECC encoding/decoding control" "Decoding,Encoding"
|
|
bitfld.long 0x00 17. " LockTight ,Lock-tight configuration" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " SoftLock ,Soft lock configuration" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " EnbECCEncINT ,4-bit ECC encoding completion interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " EnbECCDecINT ,4-bit ECC decoding completion interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " EnbIllegalAccINT ,Illegal access interrupt control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " EnbRnBINT ,RnB status input signal transition interrupt control" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " RnB_TransMode ,RnB transition fetection configuration" "Rising edge,Falling edge"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MainECCLock ,Lock main area ECC generation" "Unlocked,Locked"
|
|
bitfld.long 0x00 6. " SpareECCLock ,Lock spare area ECC generation" "Ulocked,Locked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " InitMECC ,Initialized main area ECC decoder/encoder" "Not initialized,Initialized"
|
|
bitfld.long 0x00 4. " InitSECC ,Initialized spare area ECC decoder/encoder" "Not initialized,Initialized"
|
|
textline " "
|
|
bitfld.long 0x00 2. " Reg_nCE1 ,NAND flash memory nGCS[3] signal control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " MODE ,NAND flash controller operating mode" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "NFCMMD,NAND Flash Command Set Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NFCMMD ,NAND flash memory command value"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "NFADDR,NAND Flash Address Set Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " NFADDR ,NAND flash memory address value"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "NFDATA,NAND Flash Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " NFDATA ,NAND flash read/program data value for I/O"
|
|
if (((d.l(ad:0x4e000000))&0x1)==0x1)
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ECCData1_1 ,2nd ECC for I/O[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ECCData1_0 ,2nd ECC for I/O[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ECCData0_1 ,1st ECC for I/O[15:8]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ECCData0_0 ,1st ECC for I/O[7:0]"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ECCData3_1 ,4th ECC for I/O[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ECCData3_0 ,4th ECC for I/O[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ECCData2_1 ,3rd ECC for I/O[15:8]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ECCData2_0 ,3rd ECC for I/O[7:0]"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "NFSECCD,NAND Flash ECC Register For Spare Area Data Data Read"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SECCData1_1 ,2nd spare ECC for I/O[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SECCData1_0 ,2nd spare ECC for I/O[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SECCData0_1 ,1st ECC spare for I/O[15:8]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SECCData0_0 ,1st spare ECC for I/O[7:0]"
|
|
else
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "NFMECCD0,NAND Flash ECC 1st And 2nd Register For Main Data Read"
|
|
hexmask.long.byte 0x00 24.--31. 1. " ECCData3 ,ECC3 for I/O[7:0]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " ECCData2 ,ECC2 for I/O[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " ECCData1 ,ECC1 for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " ECCData0 ,ECC0 for I/O[7:0]"
|
|
hgroup.long 0x18++0x3
|
|
hide.long 0x00 "NFMECCD1,NAND Flash ECC 3rd And 4th Register For Main Data Read"
|
|
group.long 0x1c++0x3
|
|
textline " "
|
|
line.long 0x00 "NFSECCD,NAND Flash ECC Register For Spare Area Data Data Read"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SECCData1 ,2nd spare ECC for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SECCData0 ,1st spare ECC for I/O[7:0]"
|
|
textline " "
|
|
endif
|
|
if (((d.l(ad:(0x4e000000+0x4)))&0x20000)==0x0)
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of block erase operation"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "NFEBLK,NAND Flash Programmable End Block Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x00 8.--15. 1. " EBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " EBLK_ADDR0 ,1st block address of block erase operation"
|
|
else
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "NFSBLK,NAND Flash Programmable Start Block Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x00 8.--15. 1. " SBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " SBLK_ADDR0 ,1st block address of block erase operation"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x00 "NFEBLK,NAND Flash Programmable End Block Address"
|
|
hexmask.long.byte 0x00 16.--23. 1. " EBLK_ADDR2 ,3rd block address of block erase operation"
|
|
hexmask.long.byte 0x00 8.--15. 1. " EBLK_ADDR1 ,2nd block address of block erase operation"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " EBLK_ADDR0 ,1st block address of block erase operation"
|
|
endif
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "NFSTAT,NAND Flash Operation Status Register"
|
|
eventfld.long 0x00 7. " ECCEncDone ,4-bit ECC encoding finished" "Not finished,Finished"
|
|
eventfld.long 0x00 6. " ECCDecDone ,4-bit ECC decoding finished" "Not finished,Finished"
|
|
textline " "
|
|
bitfld.long 0x00 5. " IllegalAccess ,Illegal access" "Not detected,Detected"
|
|
eventfld.long 0x00 4. " RnB_TransDetect ,RnB low to high transition occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 3. " NCE[1] ,nCE[1] output status" "Low,High"
|
|
bitfld.long 0x00 2. " NCE[0] ,nCE[0] output status" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RnB ,RnB input status" "Busy,Ready"
|
|
if (((d.l(ad:0x4e000000))&0x1000000)==0x00)
|
|
rgroup.long 0x2c++0x3
|
|
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
bitfld.long 0x00 21.--24. " SErrorDataNo ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 18.--20. " SErrorBitNo ,Number of error bit in spare area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 7.--17. 1. " MErrorDataNo ,Number of error data in main area"
|
|
bitfld.long 0x00 4.--6. " MErrorBitNo ,Number of error bit in data area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " SpareError ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area"
|
|
bitfld.long 0x00 0.--1. " MainError ,Main area data fail error occurred" "No error,1-bit,Multiple,Area"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
|
|
bitfld.long 0x00 21.--24. " SErrorDataNo ,Number of error data in spare area" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 18.--20. " SErrorBitNo ,Number of error bit in spare area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
hexmask.long.word 0x00 7.--17. 1. " MErrorDataNo ,Number of error data in main area"
|
|
bitfld.long 0x00 4.--6. " MErrorBitNo ,Number of error bit in data area" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " SpareError ,Spare area bit fail error occurred" "No error,1-bit,Multiple,Area"
|
|
bitfld.long 0x00 0.--1. " MainError ,Main area data fail error occurred" "No error,1-bit,Multiple,Area"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "NFMECC0,SLC NAND Flash ECC Status Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MECC0_3 ,ECC3 for data[7:0]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MECC0_2 ,ECC2 for data[7:0]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MECC0_1 ,ECC1 for data[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MECC0_0 ,ECC0 for data[7:0]"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "NFMECC1,SLC NAND Flash ECC Status Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MECC1_3 ,ECC3 for data[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MECC1_2 ,ECC2 for data[15:8]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MECC1_1 ,ECC1 for data[15:8]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MECC1_0 ,ECC0 for data[15:8]"
|
|
else
|
|
rgroup.long 0x2c++0x3
|
|
line.long 0x00 "NFECCERR0,NAND Flash ECC Error Status Register For I/O [7:0]"
|
|
bitfld.long 0x00 31. " ECCBusy ,ECC busy" "Idle,Busy"
|
|
bitfld.long 0x00 30. " ECCReady ,ECC ready" "Not ready,Ready"
|
|
textline " "
|
|
bitfld.long 0x00 29. " FreePage ,Page value" "Not 'FF','FF'"
|
|
bitfld.long 0x00 26.--28. " MLC_MECCError ,4-bit ECC decoding result" "No error,1-bit,2-bit,3-bit,4-bit,Uncorrectable,?..."
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--25. 1. " 2ndBitErrLoc ,Error byte location of 2nd bit error"
|
|
hexmask.long.word 0x00 0.--9. 1. " 1stBitErrLoc ,Error byte location of 1st bit error"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "NFECCERR1,NAND Flash ECC Error Status Register For I/O [15:8]"
|
|
hexmask.long.word 0x00 16.--25. 1. " 4thBitErrLoc ,Error byte location of 4th bit error"
|
|
hexmask.long.word 0x00 0.--9. 1. " 3rdBitErrLoc ,Error byte location of 3rd bit error"
|
|
textline " "
|
|
textline " "
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x00 "NFMECC0,MLC NAND Flash ECC Status Register 0"
|
|
hexmask.long.byte 0x00 24.--31. 1. " MECC1_3 ,ECC3 data[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " MECC1_2 ,ECC2 data[15:8]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " MECC1_1 ,ECC1 data[15:8]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " MECC1_0 ,ECC0 data[15:8]"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x00 "NFMECC1,MLC NAND Flash ECC Status Register 1"
|
|
hexmask.long.byte 0x00 16.--23. 1. " 7thPar ,7th check parity generated from main area"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " 6thPar ,6th check parity generated from main area"
|
|
hexmask.long.byte 0x00 0.--7. 1. " 5thPar ,5th check parity generated from main area"
|
|
endif
|
|
rgroup.long 0x3c++0x3
|
|
line.long 0x00 "NFSECC,NAND Flash ECC Register For I/O[15:0]"
|
|
hexmask.long.byte 0x00 24.--31. 1. " SECC1_1 ,Spare area ECC1 status for I/O[15:8]"
|
|
hexmask.long.byte 0x00 16.--23. 1. " SECC1_0 ,Spare area ECC0 status for I/O[15:8]"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " SECC0_1 ,Spare area ECC1 status for I/O[7:0]"
|
|
hexmask.long.byte 0x00 0.--7. 1. " SECC0_0 ,Spare area ECC0 status for I/O[7:0]"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "NFMLCBITPT,NAND Flash 4-bit ECC error pattern register for data[7:0]"
|
|
hexmask.long.byte 0x00 24.--31. 1. " 4thErrBitPat ,4th error bit pattern"
|
|
hexmask.long.byte 0x00 16.--23. 1. " 3rdErrBitPat ,3rd error bit pattern"
|
|
textline " "
|
|
hexmask.long.byte 0x00 8.--15. 1. " 2ndErrBitPat ,2nd error bit pattern"
|
|
hexmask.long.byte 0x00 0.--7. 1. " 1stErrBitPat ,1st error bit pattern"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="S3C2410X")
|
|
tree "Clock & Power Management"
|
|
base ad:0x4c000000
|
|
group 0x0000++0xb
|
|
line.long 0x00 "LOCKTIME,PLL lock time count register"
|
|
hexmask.long.word 0x00 12.--23. 1. " U_LTIME ,UPLL lock time count value for UCLK"
|
|
hexmask.long.word 0x00 0.--11. 1. " M_LTIME ,MPLL lock time count value for FCLK, HCLK, and PCLK"
|
|
line.long 0x04 "MPLLCON,MPLL configuration register"
|
|
hexmask.long.byte 0x04 12.--19. 1. " MDIV ,Main divider control"
|
|
hexmask.long.byte 0x04 4.--9. 1. " PDIV ,Pre-divider control"
|
|
hexmask.long.byte 0x04 0.--1. 1. " SDIV ,Post divider control"
|
|
line.long 0x08 "UPLLCON,UPLL configuration register"
|
|
hexmask.long.byte 0x08 12.--19. 1. " MDIV ,Main divider control"
|
|
hexmask.long.byte 0x08 4.--9. 1. " PDIV ,Pre-divider control"
|
|
hexmask.long.byte 0x08 0.--1. 1. " SDIV ,Post divider control"
|
|
group 0x000c++0x3
|
|
line.long 0x00 "CLKCON,Clock generator control register"
|
|
bitfld.long 0x00 18. " SPI ,Control PCLK into SPI block" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " IIS ,Control PCLK into IIS block" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " IIC ,Control PCLK into IIC block" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ADC ,Control PCLK into ADC block" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " RTC ,Control PCLK into RTC block" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " GPIO ,Control PCLK into GPIO block" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " UART2 ,Control PCLK into UART2 block" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " UART1 ,Control PCLK into UART1 block" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " UART0 ,Control PCLK into UART0 block" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SDI ,Control PCLK into SDI block" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " PWMTIMER ,Control HCLK into PWMTIMER block" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " USB_DEV ,Control HCLK into USB device block" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USB_HOST ,Control HCLK into USB device block" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " LCDC ,Control HCLK into LCDC block" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " NAND ,Control HCLK into NAND Flash Controller block" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " POWER_OFF ,Control Power Off mode of S3C2410" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " IDLE ,Enter IDLE mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " SM_BIT ,Special mode" "Disabled,Enabled"
|
|
if (((data.long(ad:0x4c000010))&0x10)==0x10)
|
|
group 0x0010++0x3
|
|
line.long 0x00 "CLKSLOW,Slow clock control register"
|
|
bitfld.long 0x00 7. " UCLK_ON ,OCLK on/off" "On,Off"
|
|
bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off"
|
|
bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow"
|
|
textline " "
|
|
bitfld.long 0x00 0.--2. " SLOW_VAL ,Divider value for the slow clock" "0,1,2,3,4,5,6,7"
|
|
else
|
|
group 0x0010++0x3
|
|
line.long 0x00 "CLKSLOW,Slow clock control register"
|
|
bitfld.long 0x00 7. " UCLK_ON ,OCLK on/off" "On,Off"
|
|
bitfld.long 0x00 5. " MPLL_OFF ,PLL on/off" "On,Off"
|
|
bitfld.long 0x00 4. " SLOW_BIT ,Slow mode" "Normal,Slow"
|
|
textline " "
|
|
endif
|
|
group 0x0014++0x3
|
|
line.long 0x00 "CLKDIVN,Clock divider control register"
|
|
bitfld.long 0x00 1. " HDIVN ,HCLK divider" "FCLK,FCLK/2"
|
|
bitfld.long 0x00 0. " PDIVN ,PCLK divider" "HCLK,HCLK/2"
|
|
tree.end
|
|
endif
|
|
tree "System Controller"
|
|
base ad:0x4c000000
|
|
sif (cpu()=="S3C2413X")
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LOCKTIME,MPLL/UPLL Lock Time Count Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " U_LTIME ,UPLL lock time count value for UCLK"
|
|
hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL lock time count value for ARMCLK/HCLK/PCLK"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "MPLLCON,MPLL Configuration Register"
|
|
bitfld.long 0x00 20. " ONOFF ,MPLL on/fff" "On,Off"
|
|
hexmask.long.byte 0x00 12.--19. 1. " MDIV ,Main divider value"
|
|
bitfld.long 0x00 4.--9. " PDIV ,Pre-divider value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDIV ,Post-divider value" "1,2,3,4"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UPLLCON,UPLL Configuration Register"
|
|
bitfld.long 0x00 20. " ONOFF ,UPLL on/off" "On,Off"
|
|
hexmask.long.byte 0x00 12.--19. 1. " MDIV ,Main divider value"
|
|
bitfld.long 0x00 4.--9. " PDIV ,Pre-divider value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDIV ,Post-divider value" "1,2,3,4"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "CLKCON,Clock Generator Control Register"
|
|
bitfld.long 0x00 28. " WDT ,Enable/disable PCLK into watchdog timer" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. " SPI ,Enable/disable PCLK into SPI block" "Enabled,Disabled"
|
|
bitfld.long 0x00 26. " I2S ,Enable/disable PCLK into I2S block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I2S ,Enable/disable PCLK into I2C block" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " ADC ,Enable/disable PCLK into ADC block" "Enabled,Disabled"
|
|
bitfld.long 0x00 23. " RTC ,Enable/disable PCLK into RTC block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPIO ,Enable/disable PCLK into GPIO block" "Enabled,Disabled"
|
|
bitfld.long 0x00 21. " UART0 ,Enable/disable PCLK into UART0 channel" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " UART1 ,Enable/disable PCLK into UART1 channel" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " UART2 ,Enable/disable PCLK into UART2 channel" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " SDI ,Enable/disable PCLK into SDI block" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " PWM ,Enable/disable PCLK into PWM timer block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " USBD ,Enable/disable PCLK into USB device interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 15. " CAMCLK ,Enable/disable PCLK into CAMERA clock" "Enabled,Disabled"
|
|
bitfld.long 0x00 14. " UARTCLK ,Enable/disable PCLK into UART clock" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2SCLK ,Enable/disable PCLK into CODE clock into I2S block" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " USBH48M ,Enable/disable 48MHz clock into USB host interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " USBD48M ,Enable/disable 48MHz clock into USB device interface block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HCLKX1_2 ,Enable/disable HCLK/2 clock into memory controller block" "Enabled,Disabled"
|
|
bitfld.long 0x00 9. " HCLKX2 ,Enable/disable HCLK x 2 clock into memory controller block" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " SDRAM ,Enable/disable HCLK into memory controller block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBH ,Enable/disable HCLK into USB host interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " LCDC ,Enable/disable HCLK into LCD controller block" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " NFC ,Enable/disable HCLK into NAND flash controller block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMA0 ,Enable/disable HCLK into DMA Channel 0" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " DMA1 ,Enable/disable HCLK into DMA Channel 1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " DMA2 ,Enable/disable into DMA Channel 2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA3 ,Enable/disable into DMA Channel 3" "Enabled,Disabled"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "CLKDIVN,Clock Divider Control Register"
|
|
bitfld.long 0x00 16.--19. " CAMCLKDIV ,CAM clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 12.--15. " I2SCLKDIV ,I2S clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 8.--11. " UARTCLKDIV ,UART clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USB48DIV ,48MHz clock divider ratio" "1,1/2"
|
|
bitfld.long 0x00 5. " HALFHCLK ,HCLK clock divider for SSMC" "HCLK,HCLK/2"
|
|
bitfld.long 0x00 4. " DVS ,Enable/disable DVS (Dynamic Voltage Scalling)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMDIV ,ARM clock divider ratio" "System clock,System clock/2"
|
|
bitfld.long 0x00 2. " PCLKDIV ,PCLK clock divider ratio" "HCLK,HCLK/2"
|
|
bitfld.long 0x00 0.--1. " HCLKDIV ,HCLK clock divider ratio" "00,01,10,11"
|
|
width 12.
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "CLKSRC,Clock Source Control Register"
|
|
bitfld.long 0x00 14.--15. " SELEREF ,EREFCLK selection" "OM[4],Reserved,External osc,External clock"
|
|
bitfld.long 0x00 12.--13. " SELUREF ,UREFCLK source selection" "OM[4],Reserved,External osc,External clock"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SELCAM ,CAMSRCCLK source selection" "USYSCLK,HCLK"
|
|
bitfld.long 0x00 10. " SELUSB ,USBSRCCLK source selection" "USYSCLK,HCLK"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SELI2S ,I2SSYSCLK source selection" "EREFCLK,FOUTMPLL"
|
|
bitfld.long 0x00 8. " SELUART ,UARTSYSCLK source selection" "EREFCLK,FOUTMPLL"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SELUPLL ,USYSCLK selection" "FINUPLL,FOUTUPLL"
|
|
bitfld.long 0x00 4. " SELMPLL ,MSYSCLK selection" "MDIVCLK,FOUTMPLL"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SELEXTDIV ,MDIVCLK selection" "MREFCLK,Div by EXTCLKDIV"
|
|
bitfld.long 0x00 0.--2. " EXTCLKDIV ,External clock divider ratio" "0,2,4,6,8,10,12,14"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "OSCSET,Oscillator Stabilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " XTALWAIT ,Crystal oscillator settle-down wait time"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "PWRMODECON,Power Management Mode Register"
|
|
bitfld.long 0x00 16. " MODESTOP ,STOP mode enabled" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " MODESLEEP ,SLEEP mode"
|
|
width 12.
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PWRCFG,Power Management Configuration Register"
|
|
bitfld.long 0x00 31. " EINT_WAKE_MASK[31] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " EINT_WAKE_MASK[30] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EINT_WAKE_MASK[29] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " EINT_WAKE_MASK[28] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EINT_WAKE_MASK[27] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " EINT_WAKE_MASK[26] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EINT_WAKE_MASK[25] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " EINT_WAKE_MASK[24] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EINT_WAKE_MASK[23] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " EINT_WAKE_MASK[22] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EINT_WAKE_MASK[21] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " EINT_WAKE_MASK[20] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EINT_WAKE_MASK[19] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " EINT_WAKE_MASK[18] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT_WAKE_MASK[17] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " EINT_WAKE_MASK[16] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ESLEEP_CFG ,Enable wakeup source in sleep mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " NFRESET_CFG ,Reset configuration when internal reset is generated" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RTC_CFG ,Configure RTC alarm interrupt wakeup mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6.--7. " STANDBYWFI ,STANDBYWFI signal configuration" "Ignored,IDLE mode,STOP mode,SLEEP mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " BATF_CFG ,nBATT_FLT operation configuration" "Ignored,Reserved,SLEEP mode,?..."
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "SWRSTCON,Software Reset Control Register"
|
|
hexmask.long 0x00 0.--31. 1. " SWRST ,Software reset value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "RSTCON,Reset Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RSTCNT ,Force internal and external reset active"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PWRSETCNT ,Force internal and external reset active"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ENDIAN,System Endian Configuration Register"
|
|
bitfld.long 0x00 0. " ENDIAN ,Configure system endian" "Little,Big"
|
|
group.long 0x70++0xf
|
|
line.long 0x00 "INFORM0,User Defined Information Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x04 "INFORM1,User Defined Information Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x08 "INFORM2,User Defined Information Register 2"
|
|
hexmask.long 0x08 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x0c "INFORM3,User Defined Information Register 3"
|
|
hexmask.long 0x0c 0.--31. 1. " DATA ,User specific word data"
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
width 12.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LOCKTIME,MPLL/UPLL Lock Time Count Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " U_LTIME ,UPLL lock time count value for UCLK"
|
|
hexmask.long.word 0x00 0.--15. 1. " M_LTIME ,MPLL lock time count value for ARMCLK/HCLK/PCLK"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "MPLLCON,MPLL Configuration Register"
|
|
bitfld.long 0x00 20. " ONOFF ,MPLL on/fff" "On,Off"
|
|
hexmask.long.byte 0x00 12.--19. 1. " MDIV ,Main divider value"
|
|
bitfld.long 0x00 4.--9. " PDIV ,Pre-divider value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDIV ,Post-divider value" "1,2,3,4"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UPLLCON,UPLL Configuration Register"
|
|
bitfld.long 0x00 20. " ONOFF ,UPLL on/off" "On,Off"
|
|
hexmask.long.byte 0x00 12.--19. 1. " MDIV ,Main divider value"
|
|
bitfld.long 0x00 4.--9. " PDIV ,Pre-divider value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " SDIV ,Post-divider value" "1,2,3,4"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "CLKCON,Clock Generator Control Register"
|
|
bitfld.long 0x00 28. " WDT ,Enable/disable PCLK into watchdog timer" "Enabled,Disabled"
|
|
bitfld.long 0x00 27. " SPI ,Enable/disable PCLK into SPI block" "Enabled,Disabled"
|
|
bitfld.long 0x00 26. " I2S ,Enable/disable PCLK into I2S block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 25. " I2S ,Enable/disable PCLK into I2C block" "Enabled,Disabled"
|
|
bitfld.long 0x00 24. " ADC ,Enable/disable PCLK into ADC block" "Enabled,Disabled"
|
|
bitfld.long 0x00 23. " RTC ,Enable/disable PCLK into RTC block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 22. " GPIO ,Enable/disable PCLK into GPIO block" "Enabled,Disabled"
|
|
bitfld.long 0x00 21. " UART0 ,Enable/disable PCLK into UART0 channel" "Enabled,Disabled"
|
|
bitfld.long 0x00 20. " UART1 ,Enable/disable PCLK into UART1 channel" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 19. " UART2 ,Enable/disable PCLK into UART2 channel" "Enabled,Disabled"
|
|
bitfld.long 0x00 18. " SDI ,Enable/disable PCLK into SDI block" "Enabled,Disabled"
|
|
bitfld.long 0x00 17. " PWM ,Enable/disable PCLK into PWM timer block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " USBD ,Enable/disable PCLK into USB device interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 14. " UARTCLK ,Enable/disable PCLK into UART clock" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 13. " I2SCLK ,Enable/disable PCLK into CODE clock into I2S block" "Enabled,Disabled"
|
|
bitfld.long 0x00 12. " USBH48M ,Enable/disable 48MHz clock into USB host interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 11. " USBD48M ,Enable/disable 48MHz clock into USB device interface block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " HCLKX1_2 ,Enable/disable HCLK/2 clock into memory controller block" "Enabled,Disabled"
|
|
bitfld.long 0x00 8. " SDRAM ,Enable/disable HCLK into memory controller block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USBH ,Enable/disable HCLK into USB host interface block" "Enabled,Disabled"
|
|
bitfld.long 0x00 5. " LCDC ,Enable/disable HCLK into LCD controller block" "Enabled,Disabled"
|
|
bitfld.long 0x00 4. " NFC ,Enable/disable HCLK into NAND flash controller block" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " DMA0 ,Enable/disable HCLK into DMA Channel 0" "Enabled,Disabled"
|
|
bitfld.long 0x00 2. " DMA1 ,Enable/disable HCLK into DMA Channel 1" "Enabled,Disabled"
|
|
bitfld.long 0x00 1. " DMA2 ,Enable/disable into DMA Channel 2" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " DMA3 ,Enable/disable into DMA Channel 3" "Enabled,Disabled"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "CLKDIVN,Clock Divider Control Register"
|
|
bitfld.long 0x00 12.--15. " I2SCLKDIV ,I2S clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 8.--11. " UARTCLKDIV ,UART clock divider ratio" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 6. " USB48DIV ,48MHz clock divider ratio" "1,1/2"
|
|
bitfld.long 0x00 5. " HALFHCLK ,HCLK clock divider for SSMC" "HCLK,HCLK/2"
|
|
bitfld.long 0x00 4. " DVS ,Enable/disable DVS (Dynamic Voltage Scalling)" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARMDIV ,ARM clock divider ratio" "System clock,System clock/2"
|
|
bitfld.long 0x00 2. " PCLKDIV ,PCLK clock divider ratio" "HCLK,HCLK/2"
|
|
bitfld.long 0x00 0.--1. " HCLKDIV ,HCLK clock divider ratio" "00,01,10,11"
|
|
width 12.
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "CLKSRC,Clock Source Control Register"
|
|
bitfld.long 0x00 14.--15. " SELEREF ,EREFCLK selection" "OM[4],Reserved,External osc,External clock"
|
|
bitfld.long 0x00 12.--13. " SELUREF ,UREFCLK source selection" "OM[4],Reserved,External osc,External clock"
|
|
textline " "
|
|
bitfld.long 0x00 11. " SELCAM ,CAMSRCCLK source selection" "USYSCLK,HCLK"
|
|
bitfld.long 0x00 10. " SELUSB ,USBSRCCLK source selection" "USYSCLK,HCLK"
|
|
textline " "
|
|
bitfld.long 0x00 9. " SELI2S ,I2SSYSCLK source selection" "EREFCLK,FOUTMPLL"
|
|
bitfld.long 0x00 8. " SELUART ,UARTSYSCLK source selection" "EREFCLK,FOUTMPLL"
|
|
textline " "
|
|
bitfld.long 0x00 5. " SELUPLL ,USYSCLK selection" "FINUPLL,FOUTUPLL"
|
|
bitfld.long 0x00 4. " SELMPLL ,MSYSCLK selection" "MDIVCLK,FOUTMPLL"
|
|
textline " "
|
|
bitfld.long 0x00 3. " SELEXTDIV ,MDIVCLK selection" "MREFCLK,Div by EXTCLKDIV"
|
|
bitfld.long 0x00 0.--2. " EXTCLKDIV ,External clock divider ratio" "0,2,4,6,8,10,12,14"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "OSCSET,Oscillator Stabilization Control Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " XTALWAIT ,Crystal oscillator settle-down wait time"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "PWRMODECON,Power Management Mode Register"
|
|
bitfld.long 0x00 16. " MODESTOP ,STOP mode enabled" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 0.--15. 1. " MODESLEEP ,SLEEP mode"
|
|
width 12.
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "PWRCFG,Power Management Configuration Register"
|
|
bitfld.long 0x00 31. " EINT_WAKE_MASK[31] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " EINT_WAKE_MASK[30] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 29. " EINT_WAKE_MASK[29] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 28. " EINT_WAKE_MASK[28] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 27. " EINT_WAKE_MASK[27] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " EINT_WAKE_MASK[26] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " EINT_WAKE_MASK[25] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " EINT_WAKE_MASK[24] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 23. " EINT_WAKE_MASK[23] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " EINT_WAKE_MASK[22] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " EINT_WAKE_MASK[21] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " EINT_WAKE_MASK[20] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " EINT_WAKE_MASK[19] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " EINT_WAKE_MASK[18] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT_WAKE_MASK[17] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " EINT_WAKE_MASK[16] ,External interrupt wake-up mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " ESLEEP_CFG ,Enable wakeup source in sleep mode" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " NFRESET_CFG ,Reset configuration when internal reset is generated" "Reset,No reset"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RTC_CFG ,Configure RTC alarm interrupt wakeup mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6.--7. " STANDBYWFI ,STANDBYWFI signal configuration" "Ignored,IDLE mode,STOP mode,SLEEP mode"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " BATF_CFG ,nBATT_FLT operation configuration" "Ignored,Reserved,SLEEP mode,?..."
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "SWRSTCON,Software Reset Control Register"
|
|
hexmask.long 0x00 0.--31. 1. " SWRST ,Software reset value"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "RSTCON,Reset Control Register"
|
|
hexmask.long.byte 0x00 8.--15. 1. " RSTCNT ,Force internal and external reset active"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PWRSETCNT ,Force internal and external reset active"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ENDIAN,System Endian Configuration Register"
|
|
bitfld.long 0x00 0. " ENDIAN ,Configure system endian" "Little,Big"
|
|
group.long 0x70++0xf
|
|
line.long 0x00 "INFORM0,User Defined Information Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x04 "INFORM1,User Defined Information Register 1"
|
|
hexmask.long 0x04 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x08 "INFORM2,User Defined Information Register 2"
|
|
hexmask.long 0x08 0.--31. 1. " DATA ,User specific word data"
|
|
line.long 0x0c "INFORM3,User Defined Information Register 3"
|
|
hexmask.long 0x0c 0.--31. 1. " DATA ,User specific word data"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.open "DMA Controller"
|
|
sif (cpu()=="S3C2410X")
|
|
tree "DMA Channel 0"
|
|
base ad:0x4b000000
|
|
group 0x0000++0x3
|
|
line.long 0x00 "DISRC0,DMA 0 initial source register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
group 0x0004++0x3
|
|
line.long 0x00 "DISRCC0,DMA 0 initial source control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of source" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
group 0x0008++0x3
|
|
line.long 0x00 "DIDST0,DMA 0 initial destination register"
|
|
hexmask.long 0x00 0.--30. 1. " D_ADDR ,Base address of destination data to transfer"
|
|
group 0x000c++0x3
|
|
line.long 0x00 "DIDSTC0,DMA 0 initial destination control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of destination" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
if (((data.long(ad:(0x4b000000+0x10)))&0x00800000)==0x00800000)
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON0,DMA 0 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
else
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON0,DMA 0 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
endif
|
|
rgroup 0x0014++0x3
|
|
line.long 0x00 "DSTAT0,DMA 0 count register"
|
|
bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count"
|
|
rgroup 0x0018++0x3
|
|
line.long 0x00 "DCSRC0,DMA 0 currents source register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
|
|
rgroup 0x001c++0x3
|
|
line.long 0x00 "DCDST0,DMA 0 currents destination register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
|
|
group 0x0020++0x3
|
|
line.long 0x00 "DMASKTRIG0,DMA 0 mask trigger register"
|
|
bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request"
|
|
tree.end
|
|
tree "DMA Channel 1"
|
|
base ad:0x4b000040
|
|
group 0x0000++0x3
|
|
line.long 0x00 "DISRC1,DMA 1 initial source register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
group 0x0004++0x3
|
|
line.long 0x00 "DISRCC1,DMA 1 initial source control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of source" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
group 0x0008++0x3
|
|
line.long 0x00 "DIDST1,DMA 1 initial destination register"
|
|
hexmask.long 0x00 0.--30. 1. " D_ADDR ,Base address of destination data to transfer"
|
|
group 0x000c++0x3
|
|
line.long 0x00 "DIDSTC1,DMA 1 initial destination control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of destination" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
if (((data.long(ad:(0x4b000040+0x10)))&0x00800000)==0x00800000)
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON1,DMA 1 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
else
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON1,DMA 1 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
endif
|
|
rgroup 0x0014++0x3
|
|
line.long 0x00 "DSTAT1,DMA 1 count register"
|
|
bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count"
|
|
rgroup 0x0018++0x3
|
|
line.long 0x00 "DCSRC1,DMA 1 currents source register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
|
|
rgroup 0x001c++0x3
|
|
line.long 0x00 "DCDST1,DMA 1 currents destination register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
|
|
group 0x0020++0x3
|
|
line.long 0x00 "DMASKTRIG1,DMA 1 mask trigger register"
|
|
bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request"
|
|
tree.end
|
|
tree "DMA Channel 2"
|
|
base ad:0x4b000080
|
|
group 0x0000++0x3
|
|
line.long 0x00 "DISRC2,DMA 2 initial source register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
group 0x0004++0x3
|
|
line.long 0x00 "DISRCC2,DMA 2 initial source control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of source" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
group 0x0008++0x3
|
|
line.long 0x00 "DIDST2,DMA 2 initial destination register"
|
|
hexmask.long 0x00 0.--30. 1. " D_ADDR ,Base address of destination data to transfer"
|
|
group 0x000c++0x3
|
|
line.long 0x00 "DIDSTC2,DMA 2 initial destination control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of destination" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
if (((data.long(ad:(0x4b000080+0x10)))&0x00800000)==0x00800000)
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON2,DMA 2 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
else
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON2,DMA 2 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
endif
|
|
rgroup 0x0014++0x3
|
|
line.long 0x00 "DSTAT2,DMA 2 count register"
|
|
bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count"
|
|
rgroup 0x0018++0x3
|
|
line.long 0x00 "DCSRC2,DMA 2 currents source register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
|
|
rgroup 0x001c++0x3
|
|
line.long 0x00 "DCDST2,DMA 2 currents destination register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
|
|
group 0x0020++0x3
|
|
line.long 0x00 "DMASKTRIG2,DMA 2 mask trigger register"
|
|
bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request"
|
|
tree.end
|
|
tree "DMA Channel 3"
|
|
base ad:0x4b0000c0
|
|
group 0x0000++0x3
|
|
line.long 0x00 "DISRC3,DMA 3 initial source register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
group 0x0004++0x3
|
|
line.long 0x00 "DISRCC3,DMA 3 initial source control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of source" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
group 0x0008++0x3
|
|
line.long 0x00 "DIDST3,DMA 3 initial destination register"
|
|
hexmask.long 0x00 0.--30. 1. " D_ADDR ,Base address of destination data to transfer"
|
|
group 0x000c++0x3
|
|
line.long 0x00 "DIDSTC3,DMA 3 initial destination control register"
|
|
bitfld.long 0x00 1. " LOC ,Select the location of destination" "AHB,APB"
|
|
bitfld.long 0x00 0. " INC ,Select the address increment" "Increment,Fixed"
|
|
if (((data.long(ad:(0x4b0000c0+0x10)))&0x00800000)==0x00800000)
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON3,DMA 3 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
bitfld.long 0x00 24.--26. " HWSRCSEL ,DMA request source for each DMA" "nXDREQ0,UART0,SDI,Timer,USB dev EP1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
else
|
|
group 0x0010++0x3
|
|
line.long 0x00 "DCON3,DMA 3 control register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand mode of Handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization" "PLCK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,Enable/Disable the interrupt setting for CURR_TC" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Tansfer size of an atomic transfer" "Unit,Burst"
|
|
bitfld.long 0x00 27. " SERVMODE ,Single service mode or Whole service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 23. " SWHW_SEL ,DMA source between software and hardware" "Software,Hardware"
|
|
bitfld.long 0x00 22. " RELOAD ,Set the reload on/off option" "On,Off"
|
|
bitfld.long 0x00 20.--21. " DSZ ,Data size to be transferred" "Byte,Half word,Word,?..."
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Initial transfer count"
|
|
endif
|
|
rgroup 0x0014++0x3
|
|
line.long 0x00 "DSTAT3,DMA 3 count register"
|
|
bitfld.long 0x00 20.--21. " STAT ,Status of this DMA controller" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current value of transfer count"
|
|
rgroup 0x0018++0x3
|
|
line.long 0x00 "DCSRC3,DMA 3 currents source register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
|
|
rgroup 0x001c++0x3
|
|
line.long 0x00 "DCDST3,DMA 3 currents destination register"
|
|
hexmask.long 0x00 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
|
|
group 0x0020++0x3
|
|
line.long 0x00 "DMASKTRIG3,DMA 3 mask trigger register"
|
|
bitfld.long 0x00 2. " STOP ,Stop the DMA operation" "No effect,Stopped"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel on/off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,Trigger the DMA channel in S/W request mode" "Normal,S/W request"
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
base ad:0x4b000000
|
|
width 12.
|
|
tree "Channel 0"
|
|
group.long 0x0++0xf
|
|
line.long 0x00 "DISRC0,DMA0 Initial Source Register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
line.long 0x04 "DISRCC0,DMA0 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
|
|
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
|
|
line.long 0x08 "DIDST0,DMA0 Initial Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
|
|
line.long 0x0c "DIDSTC0,DMA0 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
|
|
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
|
|
if (((d.l(ad:(0x4b000000+0x0+0x10)))&0x10000000)==0x10000000)
|
|
group.long (0x0+0x10)++0x3
|
|
line.long 0x00 "DCON0,DMA0 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
bitfld.long 0x00 24. " APBANI ,APB address not incremented" "Incremented,Fixed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
else
|
|
group.long (0x0+0x10)++0x3
|
|
line.long 0x00 "DCON0,DMA0 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
endif
|
|
rgroup.long (0x0+0x14)++0xb
|
|
line.long 0x00 "DSTAT0,DMA0 Count Register"
|
|
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
|
|
line.long 0x04 "DCSRC0,DMA0 Current Source Register"
|
|
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA0"
|
|
line.long 0x08 "DCDST0,DMA0 Current Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA0"
|
|
group.long (0x0+0x20)++0x7
|
|
line.long 0x00 "DMASKTRIG0,DMA0 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
|
|
line.long 0x04 "DMAREQSEL0,DMA0 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,SDMMC,Reserved,Reserved,USB_EP1,USP_EP2,USB_EP3,USB_EP4,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],?..."
|
|
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
|
|
tree.end
|
|
tree "Channel 1"
|
|
group.long 0x40++0xf
|
|
line.long 0x00 "DISRC1,DMA1 Initial Source Register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
line.long 0x04 "DISRCC1,DMA1 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
|
|
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
|
|
line.long 0x08 "DIDST1,DMA1 Initial Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
|
|
line.long 0x0c "DIDSTC1,DMA1 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
|
|
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
|
|
if (((d.l(ad:(0x4b000000+0x40+0x10)))&0x10000000)==0x10000000)
|
|
group.long (0x40+0x10)++0x3
|
|
line.long 0x00 "DCON1,DMA1 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
bitfld.long 0x00 24. " APBANI ,APB address not incremented" "Incremented,Fixed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
else
|
|
group.long (0x40+0x10)++0x3
|
|
line.long 0x00 "DCON1,DMA1 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
endif
|
|
rgroup.long (0x40+0x14)++0xb
|
|
line.long 0x00 "DSTAT1,DMA1 Count Register"
|
|
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
|
|
line.long 0x04 "DCSRC1,DMA1 Current Source Register"
|
|
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA1"
|
|
line.long 0x08 "DCDST1,DMA1 Current Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA1"
|
|
group.long (0x40+0x20)++0x7
|
|
line.long 0x00 "DMASKTRIG1,DMA1 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
|
|
line.long 0x04 "DMAREQSEL1,DMA1 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,SDMMC,Reserved,Reserved,USB_EP1,USP_EP2,USB_EP3,USB_EP4,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],?..."
|
|
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
|
|
tree.end
|
|
tree "Channel 2"
|
|
group.long 0x80++0xf
|
|
line.long 0x00 "DISRC2,DMA2 Initial Source Register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
line.long 0x04 "DISRCC2,DMA2 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
|
|
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
|
|
line.long 0x08 "DIDST2,DMA2 Initial Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
|
|
line.long 0x0c "DIDSTC2,DMA2 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
|
|
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
|
|
if (((d.l(ad:(0x4b000000+0x80+0x10)))&0x10000000)==0x10000000)
|
|
group.long (0x80+0x10)++0x3
|
|
line.long 0x00 "DCON2,DMA2 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
bitfld.long 0x00 24. " APBANI ,APB address not incremented" "Incremented,Fixed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
else
|
|
group.long (0x80+0x10)++0x3
|
|
line.long 0x00 "DCON2,DMA2 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
endif
|
|
rgroup.long (0x80+0x14)++0xb
|
|
line.long 0x00 "DSTAT2,DMA2 Count Register"
|
|
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
|
|
line.long 0x04 "DCSRC2,DMA2 Current Source Register"
|
|
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA2"
|
|
line.long 0x08 "DCDST2,DMA2 Current Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA2"
|
|
group.long (0x80+0x20)++0x7
|
|
line.long 0x00 "DMASKTRIG2,DMA2 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
|
|
line.long 0x04 "DMAREQSEL2,DMA2 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,SDMMC,Reserved,Reserved,USB_EP1,USP_EP2,USB_EP3,USB_EP4,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],?..."
|
|
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
|
|
tree.end
|
|
tree "Channel 3"
|
|
group.long 0xC0++0xf
|
|
line.long 0x00 "DISRC3,DMA3 Initial Source Register"
|
|
hexmask.long 0x00 0.--30. 1. " S_ADDR ,Base address of source data to transfer"
|
|
line.long 0x04 "DISRCC3,DMA3 Initial Source Control Register"
|
|
bitfld.long 0x04 1. " LOC ,Source location" "AHB,APB"
|
|
bitfld.long 0x04 0. " INC ,Address increment" "Incremented,Fixed"
|
|
line.long 0x08 "DIDST3,DMA3 Initial Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " D_ADDR ,Base address of source data to transfer"
|
|
line.long 0x0c "DIDSTC3,DMA3 Initial Destination Control Register"
|
|
bitfld.long 0x0c 1. " LOC ,Destination location" "AHB,APB"
|
|
bitfld.long 0x0c 0. " INC ,Address increment" "Incremented,Fixed"
|
|
if (((d.l(ad:(0x4b000000+0xC0+0x10)))&0x10000000)==0x10000000)
|
|
group.long (0xC0+0x10)++0x3
|
|
line.long 0x00 "DCON3,DMA3 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
bitfld.long 0x00 24. " APBANI ,APB address not incremented" "Incremented,Fixed"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
else
|
|
group.long (0xC0+0x10)++0x3
|
|
line.long 0x00 "DCON3,DMA3 Control Register"
|
|
bitfld.long 0x00 31. " DMD_HS ,Demand / handshake mode" "Demand,Handshake"
|
|
bitfld.long 0x00 30. " SYNC ,DREQ/DACK synchronization mode" "PCLK,HCLK"
|
|
bitfld.long 0x00 29. " INT ,CURR_TC interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 28. " TSZ ,Transfer size of atomic transfer" "Unit,Burst 4"
|
|
bitfld.long 0x00 27. " SERVMODE ,Service mode" "Single,Whole"
|
|
textline " "
|
|
bitfld.long 0x00 22. " RELOAD ,Reload on/off" "On,Off"
|
|
bitfld.long 0x00 20.--21. " C ,Data size" "Byte,Half word,Word,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " TC ,Transfer count"
|
|
endif
|
|
rgroup.long (0xC0+0x14)++0xb
|
|
line.long 0x00 "DSTAT3,DMA3 Count Register"
|
|
bitfld.long 0x00 20.--21. " STAT ,DMA controller status" "Ready,Busy,?..."
|
|
hexmask.long.tbyte 0x00 0.--19. 1. " CURR_TC ,Current transfer count value"
|
|
line.long 0x04 "DCSRC3,DMA3 Current Source Register"
|
|
hexmask.long 0x04 0.--30. 1. " CURR_SRC ,Current source address for DMA3"
|
|
line.long 0x08 "DCDST3,DMA3 Current Destination Register"
|
|
hexmask.long 0x08 0.--30. 1. " CURR_DST ,Current destination address for DMA3"
|
|
group.long (0xC0+0x20)++0x7
|
|
line.long 0x00 "DMASKTRIG3,DMA3 Mask Trigger Register"
|
|
bitfld.long 0x00 2. " STOP ,DMA stop" "Low,High"
|
|
bitfld.long 0x00 1. " ON_OFF ,DMA channel On/Off" "Off,On"
|
|
bitfld.long 0x00 0. " SW_TRIG ,DMA trigger in S/W request mode" "Not requested,Requested"
|
|
line.long 0x04 "DMAREQSEL3,DMA3 Request Selection Register"
|
|
bitfld.long 0x04 1.--5. " HWSRCSEL ,DMA request source" "SPI_0_TX,SPI_0_RX,SPI_1_TX,SPI_1_RX,I2S_TX,I2S_RX,Reserved,Reserved,Reserved,PWM,SDMMC,Reserved,Reserved,USB_EP1,USP_EP2,USB_EP3,USB_EP4,nXDREQ0,nXDREQ1,UART_0[0],UART_0[1],UART_1[0],UART_1[1],UART_2[0],UART_2[1],?..."
|
|
bitfld.long 0x04 0. " SWHW_SEL ,DMA source select" "S/W request,HWSRCSEL"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "I/O Ports"
|
|
base ad:0x56000000
|
|
sif (cpu()=="S3C2410X")
|
|
tree "Port A"
|
|
group 0x00++0x7
|
|
line.long 0x00 "GPACON,Configure the pins of port A"
|
|
bitfld.long 0x0 22. " GPA22 ,Pin22 mode" "Output,nFCE"
|
|
bitfld.long 0x0 21. " GPA21 ,Pin21 mode" "Output,nRSTOUT"
|
|
bitfld.long 0x0 20. " GPA20 ,Pin20 mode" "Output,nFRE"
|
|
bitfld.long 0x0 19. " GPA19 ,Pin19 mode" "Output,nFWE"
|
|
textline " "
|
|
bitfld.long 0x0 18. " GPA18 ,Pin18 mode" "Output,ALE"
|
|
bitfld.long 0x0 17. " GPA17 ,Pin17 mode" "Output,CLE"
|
|
bitfld.long 0x0 16. " GPA16 ,Pin16 mode" "Output,nGCS5"
|
|
bitfld.long 0x0 15. " GPA15 ,Pin15 mode" "Output,nGCS4"
|
|
textline " "
|
|
bitfld.long 0x0 14. " GPA14 ,Pin14 mode" "Output,nGCS3"
|
|
bitfld.long 0x0 13. " GPA13 ,Pin13 mode" "Output,nGCS2"
|
|
bitfld.long 0x0 12. " GPA12 ,Pin12 mode" "Output,nGCS1"
|
|
bitfld.long 0x0 11. " GPA11 ,Pin11 mode" "Output,ADDR26"
|
|
textline " "
|
|
bitfld.long 0x0 10. " GPA10 ,Pin10 mode" "Output,ADDR25"
|
|
bitfld.long 0x0 9. " GPA9 ,Pin9 mode" "Output,ADDR24"
|
|
bitfld.long 0x0 8. " GPA8 ,Pin8 mode" "Output,ADDR23"
|
|
bitfld.long 0x0 7. " GPA7 ,Pin7 mode" "Output,ADDR22"
|
|
textline " "
|
|
bitfld.long 0x0 6. " GPA6 ,Pin6 mode" "Output,ADDR21"
|
|
bitfld.long 0x0 5. " GPA5 ,Pin5 mode" "Output,ADDR20"
|
|
bitfld.long 0x0 4. " GPA4 ,Pin4 mode" "Output,ADDR19"
|
|
bitfld.long 0x0 3. " GPA3 ,Pin3 mode" "Output,ADDR18"
|
|
textline " "
|
|
bitfld.long 0x0 2. " GPA2 ,Pin2 mode" "Output,ADDR17"
|
|
bitfld.long 0x0 1. " GPA1 ,Pin1 mode" "Output,ADDR16"
|
|
bitfld.long 0x0 0. " GPA0 ,Pin0 mode" "Output,ADDR0"
|
|
line.long 0x04 "GPADAT,The data register for port A"
|
|
hexmask.long.tbyte 0x04 0.--22. 1. " GPA[22:0] ,Port A data"
|
|
tree.end
|
|
tree "Port B"
|
|
group 0x10++0xb
|
|
line.long 0x00 "GPBCON,Configure the pins of port B"
|
|
bitfld.long 0x00 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,?..."
|
|
bitfld.long 0x00 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,?..."
|
|
bitfld.long 0x00 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,?..."
|
|
bitfld.long 0x00 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,?..."
|
|
bitfld.long 0x00 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,?..."
|
|
bitfld.long 0x00 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK0,?..."
|
|
bitfld.long 0x00 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..."
|
|
bitfld.long 0x00 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..."
|
|
bitfld.long 0x00 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..."
|
|
line.long 0x04 "GPBDAT,The data register for port B"
|
|
hexmask.long.word 0x04 0.--10. 1. " GPB ,Port B data"
|
|
line.long 0x08 "GPBUP,Pull-up disable register for port B"
|
|
bitfld.long 0x08 10. " GPB10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPB9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPB8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " GPB7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " GPB6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPB5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPB4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
bitfld.long 0x08 3. " GPB3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " GPB2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPB1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPB0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port C"
|
|
group 0x20++0xb
|
|
line.long 0x00 "GPCCON,Configure the pins of port C"
|
|
bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..."
|
|
bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..."
|
|
bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..."
|
|
bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..."
|
|
bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..."
|
|
bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..."
|
|
bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCDVF2,?..."
|
|
bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCDVF1,?..."
|
|
bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCDVF0,?..."
|
|
bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..."
|
|
bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..."
|
|
bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..."
|
|
bitfld.long 0x00 0.--1. " GPC0 ,Pin0 mode" "Input,Output,LEND,?..."
|
|
line.long 0x04 "GPCDAT,The data register for port C"
|
|
hexmask.long.word 0x04 0.--15. 1. " GPC ,Port C data"
|
|
line.long 0x08 "GPCUP,Pull-up disable register for port C"
|
|
bitfld.long 0x08 15. " GPC15 ,Pull-up disable for pin15" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " GPC14 ,Pull-up disable for pin14" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " GPC13 ,Pull-up disable for pin13" "Enabled,Disabled"
|
|
bitfld.long 0x08 12. " GPC12 ,Pull-up disable for pin12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPC11 ,Pull-up disable for pin11" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " GPC10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPC9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPC8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPC7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
bitfld.long 0x08 6. " GPC6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPC5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPC4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPC3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " GPC2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPC1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPC0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port D"
|
|
group 0x30++0xb
|
|
line.long 0x00 "GPDCON,Configure the pins of port D"
|
|
bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,nSS0"
|
|
bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,nSS1"
|
|
bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..."
|
|
bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..."
|
|
bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,?..."
|
|
bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,?..."
|
|
bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..."
|
|
bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..."
|
|
bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..."
|
|
bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..."
|
|
bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..."
|
|
bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,?..."
|
|
bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,?..."
|
|
line.long 0x04 "GPDDAT,The data register for port D"
|
|
hexmask.long.word 0x04 0.--10. 1. " GPD ,Port D data"
|
|
line.long 0x08 "GPDUP,Pull-up disable register for port D"
|
|
bitfld.long 0x08 15. " GPD15 ,Pull-up disable for pin15" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " GPD14 ,Pull-up disable for pin14" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " GPD13 ,Pull-up disable for pin13" "Enabled,Disabled"
|
|
bitfld.long 0x08 12. " GPD12 ,Pull-up disable for pin12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPD11 ,Pull-up disable for pin11" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " GPD10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPD9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPD8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPD7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
bitfld.long 0x08 6. " GPD6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPD5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPD4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPD3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " GPD2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPD1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPD0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port E"
|
|
group 0x40++0xb
|
|
line.long 0x00 "GPECON,Configure the pins of port E"
|
|
bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..."
|
|
bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..."
|
|
bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..."
|
|
bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..."
|
|
bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SDDAT3,?..."
|
|
bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SDDAT2,?..."
|
|
bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SDDAT1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SDDAT0,?..."
|
|
bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SDCMD,?..."
|
|
bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SDCLK,?..."
|
|
bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SSDO,I2SSDI"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SSDI,nSS0"
|
|
bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,?..."
|
|
bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,?..."
|
|
bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,?..."
|
|
line.long 0x04 "GPEDAT,The data register for port E"
|
|
hexmask.long.word 0x04 0.--15. 1. " GPE ,Port E data"
|
|
line.long 0x08 "GPEUP,Pull-up disable register for port E"
|
|
bitfld.long 0x08 15. " GPE15 ,Pull-up disable for pin15" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " GPE14 ,Pull-up disable for pin14" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " GPE13 ,Pull-up disable for pin13" "Enabled,Disabled"
|
|
bitfld.long 0x08 12. " GPE12 ,Pull-up disable for pin12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPE11 ,Pull-up disable for pin11" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " GPE10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPE9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPE8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPE7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
bitfld.long 0x08 6. " GPE6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPE5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPE4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPE3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " GPE2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPE1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPE0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port F"
|
|
group 0x50++0xb
|
|
line.long 0x00 "GPFCON,Configure the pins of port F"
|
|
bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..."
|
|
bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..."
|
|
bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..."
|
|
bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..."
|
|
bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..."
|
|
bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..."
|
|
bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..."
|
|
line.long 0x04 "GPFDAT,The data register for port F"
|
|
hexmask.long.byte 0x04 0.--7. 1. " GPF ,Port F data"
|
|
line.long 0x08 "GPFUP,Pull-up disable register for port F"
|
|
bitfld.long 0x08 7. " GPF7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
bitfld.long 0x08 6. " GPF6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPF5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPF4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPF3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " GPF2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPF1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPF0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port G"
|
|
group 0x60++0xb
|
|
line.long 0x00 "GPGCON,Configure the pins of port G"
|
|
bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,nYPON"
|
|
bitfld.long 0x00 28.--29. " GPG14 ,Pin14 mode" "Input,Output,EINT22,YMON"
|
|
bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,nXPON"
|
|
bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,XMON"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,TCLK1"
|
|
bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,?..."
|
|
bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,?..."
|
|
bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,SPICLK1"
|
|
bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,SPIMOSI1"
|
|
bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,SPIMISO1"
|
|
bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,LCD_PWREN"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,nSS1"
|
|
bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,nSS0"
|
|
bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..."
|
|
bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..."
|
|
line.long 0x04 "GPGDAT,The data register for port G"
|
|
hexmask.long.word 0x04 0.--15. 1. " GPG ,Port G data"
|
|
line.long 0x08 "GPGUP,Pull-up disable register for port G"
|
|
bitfld.long 0x08 15. " GPG15 ,Pull-up disable for pin15" "Enabled,Disabled"
|
|
bitfld.long 0x08 14. " GPG14 ,Pull-up disable for pin14" "Enabled,Disabled"
|
|
bitfld.long 0x08 13. " GPG13 ,Pull-up disable for pin13" "Enabled,Disabled"
|
|
bitfld.long 0x08 12. " GPG12 ,Pull-up disable for pin12" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 11. " GPG11 ,Pull-up disable for pin11" "Enabled,Disabled"
|
|
bitfld.long 0x08 10. " GPG10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPG9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPG8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 7. " GPG7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
bitfld.long 0x08 6. " GPG6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPG5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPG4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 3. " GPG3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
bitfld.long 0x08 2. " GPG2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPG1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPG0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port H"
|
|
group 0x70++0xb
|
|
line.long 0x00 "GPHCON,Configure the pins of port H"
|
|
bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,CLKOUT1,?..."
|
|
bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,CLKOUT0,?..."
|
|
bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,UCLK,?..."
|
|
bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD2,nCTS1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD2,nRTS1"
|
|
bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD1,?..."
|
|
bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD1,?..."
|
|
bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD0,?..."
|
|
bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,nRTS0,?..."
|
|
bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,nCTS0,?..."
|
|
line.long 0x04 "GPHDAT,The data register for port H"
|
|
hexmask.long.word 0x04 0.--10. 1. " GPH ,Port H data"
|
|
line.long 0x08 "GPHUP,Pull-up disable register for port H"
|
|
bitfld.long 0x08 10. " GPH10 ,Pull-up disable for pin10" "Enabled,Disabled"
|
|
bitfld.long 0x08 9. " GPH9 ,Pull-up disable for pin9" "Enabled,Disabled"
|
|
bitfld.long 0x08 8. " GPH8 ,Pull-up disable for pin8" "Enabled,Disabled"
|
|
bitfld.long 0x08 7. " GPH7 ,Pull-up disable for pin7" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 6. " GPH6 ,Pull-up disable for pin6" "Enabled,Disabled"
|
|
bitfld.long 0x08 5. " GPH5 ,Pull-up disable for pin5" "Enabled,Disabled"
|
|
bitfld.long 0x08 4. " GPH4 ,Pull-up disable for pin4" "Enabled,Disabled"
|
|
bitfld.long 0x08 3. " GPH3 ,Pull-up disable for pin3" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x08 2. " GPH2 ,Pull-up disable for pin2" "Enabled,Disabled"
|
|
bitfld.long 0x08 1. " GPH1 ,Pull-up disable for pin1" "Enabled,Disabled"
|
|
bitfld.long 0x08 0. " GPH0 ,Pull-up disable for pin0" "Enabled,Disabled"
|
|
tree.end
|
|
group 0x80++0x7 "MISCELLANEOUS CONTROL REGISTER"
|
|
line.long 0x00 "MISCCR,Miscellaneous control register"
|
|
bitfld.long 0x00 19. " NEN_SCKE ,Used to protect SDRAM during the Power_OFF" "Normal,L level"
|
|
bitfld.long 0x00 18. " NEN_SCLK1 ,Used to protect SDRAM during the Power_OFF" "SCLK,L level"
|
|
bitfld.long 0x00 17. " NEN_SCLK0 ,Used to protect SDRAM during the Power_OFF" "SCLK,L level"
|
|
textline " "
|
|
bitfld.long 0x00 16. " NRSTCON ,nRSTOUT software control" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " USBSUSPND1 ,USB Port 1 mode" "Normal,Suspended"
|
|
bitfld.long 0x00 12. " USBSUSPND0 ,USB Port 0 mode" "Normal,Suspended"
|
|
textline " "
|
|
bitfld.long 0x00 8.--10. " CLKSEL1 ,CLKOUT1 output singnal source" "MPLL CLK,UPLL CLK,FCLK,HCLK,PCLK,DCLK1,?..."
|
|
bitfld.long 0x00 4.--6. " CLKSEL0 ,CLKOUT0 output singnal source" "MPLL CLK,UPLL CLK,FLCK,HCLK,PCLK,DCLK0,?..."
|
|
bitfld.long 0x00 3. " USBPAD ,Use pads related USB for USB device or host" "Device,Host"
|
|
textline " "
|
|
bitfld.long 0x00 2. " MEM_HZ_CON ," "Hi-Z,Previous State"
|
|
bitfld.long 0x00 1. " SPUCR_L ,DATA[15:0] port pull-up resister" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " SPUCR_H ,DATA[31:16] port pull-up resister" "Enabled,Disabled"
|
|
line.long 0x04 "DCLKCON,DCLK0/1 control register"
|
|
hexmask.long.byte 0x04 24.--27. 1. " DCLK1CMP ,DCLK1 Compare value clock toggle value"
|
|
bitfld.long 0x04 20.--23. " DCLK1DIV ,DCLK1 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,?..."
|
|
bitfld.long 0x04 17. " DCLK1SELCK ,Select DCLK1 source clock" "PCLK,UCLK"
|
|
textline " "
|
|
bitfld.long 0x04 16. " DCLK1EN ,DCLK1 Enable" "Disabled,Enabled"
|
|
hexmask.long.byte 0x04 8.--11. 1. " DCLK0CMP ,DCLK0 Compare value clock toggle value"
|
|
bitfld.long 0x04 4.--7. " DCLK0DIV ,DCLK0 Divide value" "SRCCLK,SRCCLK/2,SRCCLK/3,SRCCLK/4,SRCCLK/5,SRCCLK/6,SRCCLK/7,SRCCLK/8,?..."
|
|
textline " "
|
|
bitfld.long 0x04 1. " DCLK0SELCK ,Select DCLK0 source clock" "PCLK,UCLK"
|
|
bitfld.long 0x04 0. " DCLK0EN ,DCLK0 Enable" "Disabled,Enabled"
|
|
group 0x88++0xb "EXTERNAL INTERRUPT REGISTERS"
|
|
line.long 0x00 "EXTINT0,External interrupt control register 0"
|
|
bitfld.long 0x00 28.--30. " EINT7 ,Set the signaling method of the EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x00 24.--26. " EINT6 ,Set the signaling method of the EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x00 20.--22. " EINT5 ,Set the signaling method of the EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x00 16.--18. " EINT4 ,Set the signaling method of the EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x00 12.--14. " EINT3 ,Set the signaling method of the EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x00 8.--10. " EINT2 ,Set the signaling method of the EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " EINT1 ,Set the signaling method of the EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x00 0.--2. " EINT0 ,Set the signaling method of the EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
line.long 0x04 "EXTINT1,External interrupt control register 1"
|
|
bitfld.long 0x04 28.--30. " EINT15 ,Set the signaling method of the EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x04 24.--26. " EINT14 ,Set the signaling method of the EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x04 20.--22. " EINT13 ,Set the signaling method of the EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x04 16.--18. " EINT12 ,Set the signaling method of the EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x04 12.--14. " EINT11 ,Set the signaling method of the EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x04 8.--10. " EINT10 ,Set the signaling method of the EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x04 4.--6. " EINT9 ,Set the signaling method of the EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x04 0.--2. " EINT8 ,Set the signaling method of the EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
line.long 0x08 "EXTINT2,External interrupt control register 2"
|
|
bitfld.long 0x08 31. " FLTEN23 ,Filter Enable for EINT23" "Disabled,Enabled"
|
|
bitfld.long 0x08 28.--30. " EINT23 ,Set the signaling method of the EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x08 27. " FLTEN22 ,Filter Enable for EINT22" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 24.--26. " EINT22 ,Set the signaling method of the EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x08 23. " FLTEN21 ,Filter Enable for EINT21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20.--22. " EINT21 ,Set the signaling method of the EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x08 19. " FLTEN20 ,Filter Enable for EINT20" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--18. " EINT20 ,Set the signaling method of the EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x08 15. " FLTEN19 ,Filter Enable for EINT19" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 12.--14. " EINT19 ,Set the signaling method of the EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x08 11. " FLTEN18 ,Filter Enable for EINT18" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " EINT18 ,Set the signaling method of the EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
textline " "
|
|
bitfld.long 0x08 7. " FLTEN17 ,Filter Enable for EINT17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--6. " EINT17 ,Set the signaling method of the EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
bitfld.long 0x08 3. " FLTEN16 ,Filter Enable for EINT16" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x08 0.--2. " EINT16 ,Set the signaling method of the EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edge,Both edge"
|
|
hgroup 0x94++0x7
|
|
hide.long 0x00 "EINTFLT0,?..."
|
|
hide.long 0x04 "EINTFTL1,?..."
|
|
group 0x9c++0x7
|
|
line.long 0x00 "EINTFLT2,External interrupt control register 2"
|
|
bitfld.long 0x00 31. " FLTCLK19 ,Filter clock of EINT19" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 8.--14. 1. " EINTFLT18 ,Filter width of EINT18"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16"
|
|
line.long 0x04 "EINTFLT3,External interrupt control register 3"
|
|
bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTCLK20 ,Filter clock of EINT20" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20"
|
|
group 0xa4++0x7
|
|
line.long 0x00 "EINTMASK,External interrupt mask register"
|
|
bitfld.long 0x00 23. " EINT23 ,External Interrupt 23" "Enabled,Masked"
|
|
bitfld.long 0x00 22. " EINT22 ,External Interrupt 22" "Enabled,Masked"
|
|
bitfld.long 0x00 21. " EINT21 ,External Interrupt 21" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EINT20 ,External Interrupt 20" "Enabled,Masked"
|
|
bitfld.long 0x00 19. " EINT19 ,External Interrupt 19" "Enabled,Masked"
|
|
bitfld.long 0x00 18. " EINT18 ,External Interrupt 18" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT17 ,External Interrupt 17" "Enabled,Masked"
|
|
bitfld.long 0x00 16. " EINT16 ,External Interrupt 16" "Enabled,Masked"
|
|
bitfld.long 0x00 15. " EINT15 ,External Interrupt 15" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT14 ,External Interrupt 14" "Enabled,Masked"
|
|
bitfld.long 0x00 13. " EINT13 ,External Interrupt 13" "Enabled,Masked"
|
|
bitfld.long 0x00 12. " EINT12 ,External Interrupt 12" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EINT11 ,External Interrupt 11" "Enabled,Masked"
|
|
bitfld.long 0x00 10. " EINT10 ,External Interrupt 10" "Enabled,Masked"
|
|
bitfld.long 0x00 9. " EINT9 ,External Interrupt 9" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EINT8 ,External Interrupt 8" "Enabled,Masked"
|
|
bitfld.long 0x00 7. " EINT7 ,External Interrupt 7" "Enabled,Masked"
|
|
bitfld.long 0x00 6. " EINT6 ,External Interrupt 6" "Enabled,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT5 ,External Interrupt 5" "Enabled,Masked"
|
|
bitfld.long 0x00 4. " EINT4 ,External Interrupt 4" "Enabled,Masked"
|
|
line.long 0x04 "EINTPEND,External interrupt pending register"
|
|
bitfld.long 0x04 23. " EINT23 ,External Interrupt 23" "Not requested,Requested"
|
|
bitfld.long 0x04 22. " EINT22 ,External Interrupt 22" "Not requested,Requested"
|
|
bitfld.long 0x04 21. " EINT21 ,External Interrupt 21" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 20. " EINT20 ,External Interrupt 20" "Not requested,Requested"
|
|
bitfld.long 0x04 19. " EINT19 ,External Interrupt 19" "Not requested,Requested"
|
|
bitfld.long 0x04 18. " EINT18 ,External Interrupt 18" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 17. " EINT17 ,External Interrupt 17" "Not requested,Requested"
|
|
bitfld.long 0x04 16. " EINT16 ,External Interrupt 16" "Not requested,Requested"
|
|
bitfld.long 0x04 15. " EINT15 ,External Interrupt 15" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 14. " EINT14 ,External Interrupt 14" "Not requested,Requested"
|
|
bitfld.long 0x04 13. " EINT13 ,External Interrupt 13" "Not requested,Requested"
|
|
bitfld.long 0x04 12. " EINT12 ,External Interrupt 12" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 11. " EINT11 ,External Interrupt 11" "Not requested,Requested"
|
|
bitfld.long 0x04 10. " EINT10 ,External Interrupt 10" "Not requested,Requested"
|
|
bitfld.long 0x04 9. " EINT9 ,External Interrupt 9" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 8. " EINT8 ,External Interrupt 8" "Not requested,Requested"
|
|
bitfld.long 0x04 7. " EINT7 ,External Interrupt 7" "Not requested,Requested"
|
|
bitfld.long 0x04 6. " EINT6 ,External Interrupt 6" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x04 5. " EINT5 ,External Interrupt 5" "Not requested,Requested"
|
|
bitfld.long 0x04 4. " EINT4 ,External Interrupt 4" "Not requested,Requested"
|
|
rgroup 0xac++0x07 "GENERAL, STATUS REGISTER"
|
|
line.long 0x00 "GSTATUS0,External pin status"
|
|
bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High"
|
|
bitfld.long 0x00 2. " NCON ,Status of NCON pin" "Low,High"
|
|
bitfld.long 0x00 1. " RNB ,Status of R/nB pin" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 0. " nBATT_FLT ,Status of nBATT_FLT pin" "Low,High"
|
|
line.long 0x04 "GSTATUS1,Chip ID"
|
|
hexmask.long 0x04 0.--31. 1. " CHIP_ID ,Chip ID"
|
|
group 0xb4++0xb
|
|
line.long 0x00 "GSTATUS2,Reset status"
|
|
eventfld.long 0x00 2. " WDTRST ,Watchdog reset" "No reset,Reset"
|
|
eventfld.long 0x00 1. " OFFRST ,Power_OFF reset" "No reset,Reset"
|
|
eventfld.long 0x00 0. " PWRST ,Power on reset" "No reset,Reset"
|
|
line.long 0x04 "GSTATUS3,Inform register"
|
|
hexmask.long 0x04 0.--31. 1. " INFORM ,"
|
|
line.long 0x08 "GSTATUS4,Infrom register"
|
|
hexmask.long 0x08 0.--31. 1. " INFORM ,"
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
tree "Port A"
|
|
width 8.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "GPACON,Port A Control Register"
|
|
bitfld.long 0x0 21. " GPA21 ,Pin21 mode" "Output,nRSTOUT"
|
|
bitfld.long 0x0 20. " GPA20 ,Pin20 mode" "Output,nFRE"
|
|
textline " "
|
|
bitfld.long 0x0 19. " GPA19 ,Pin19 mode" "Output,nFWE"
|
|
bitfld.long 0x0 18. " GPA18 ,Pin18 mode" "Output,ALE"
|
|
bitfld.long 0x0 17. " GPA17 ,Pin17 mode" "Output,CLE"
|
|
textline " "
|
|
bitfld.long 0x0 16. " GPA16 ,Pin16 mode" "Output,nGCS5"
|
|
bitfld.long 0x0 15. " GPA15 ,Pin15 mode" "Output,nGCS4"
|
|
bitfld.long 0x0 14. " GPA14 ,Pin14 mode" "Output,nGCS3"
|
|
textline " "
|
|
bitfld.long 0x0 13. " GPA13 ,Pin13 mode" "Output,nGCS2"
|
|
bitfld.long 0x0 12. " GPA12 ,Pin12 mode" "Output,nGCS1"
|
|
bitfld.long 0x0 11. " GPA11 ,Pin11 mode" "Output,ADDR26"
|
|
textline " "
|
|
bitfld.long 0x0 10. " GPA10 ,Pin10 mode" "Output,ADDR25"
|
|
bitfld.long 0x0 9. " GPA9 ,Pin9 mode" "Output,ADDR24"
|
|
bitfld.long 0x0 8. " GPA8 ,Pin8 mode" "Output,ADDR23"
|
|
textline " "
|
|
bitfld.long 0x0 7. " GPA7 ,Pin7 mode" "Output,ADDR22"
|
|
bitfld.long 0x0 6. " GPA6 ,Pin6 mode" "Output,ADDR21"
|
|
bitfld.long 0x0 5. " GPA5 ,Pin5 mode" "Output,ADDR20"
|
|
textline " "
|
|
bitfld.long 0x0 4. " GPA4 ,Pin4 mode" "Output,ADDR19"
|
|
bitfld.long 0x0 3. " GPA3 ,Pin3 mode" "Output,ADDR18"
|
|
bitfld.long 0x0 2. " GPA2 ,Pin2 mode" "Output,ADDR17"
|
|
textline " "
|
|
bitfld.long 0x0 1. " GPA1 ,Pin1 mode" "Output,ADDR16"
|
|
bitfld.long 0x0 0. " GPA0 ,Pin0 mode" "Output,ADDR0"
|
|
line.long 0x04 "GPDAT,Port A Data Register"
|
|
bitfld.long 0x4 21. " GPA21 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 20. " GPA20 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 19. " GPA19 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 18. " GPA18 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 17. " GPA17 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 16. " GPA16 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 15. " GPA15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPA14 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 13. " GPA13 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 12. " GPA12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPA11 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 10. " GPA10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPA9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPA8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPA7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPA6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPA5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPA4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPA3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPA2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPA1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPA0 ,Pin state" "Low,High"
|
|
tree.end
|
|
tree "Port B"
|
|
width 11.
|
|
group.long 0x10++0xf
|
|
line.long 0x00 "GPBCON,Port B Control Register"
|
|
bitfld.long 0x0 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,?..."
|
|
bitfld.long 0x0 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,?..."
|
|
bitfld.long 0x0 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,ATA_DMARQ"
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,ATA_NDMACK"
|
|
bitfld.long 0x0 12.--13. "GPB6 ,Pin6 mode" "Input,Output,nXBREQ,?..."
|
|
bitfld.long 0x0 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK0,?..."
|
|
bitfld.long 0x0 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..."
|
|
bitfld.long 0x0 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..."
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..."
|
|
bitfld.long 0x0 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..."
|
|
line.long 0x04 "GPBDAT,Port B Data Register"
|
|
bitfld.long 0x4 10. " GPB10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPB9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPB8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPB7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPB6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPB5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPB4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPB3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPB2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPB1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPB0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPBDN,Port B Pull-down Control Register"
|
|
bitfld.long 0x8 10. " GPB10 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 9. " GPB9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPB8 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " GPB7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPB6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPB5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPB4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPB3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPB2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPB1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPB0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPBSLPCON,Sleep Mode Configuration Register For Port B Register"
|
|
bitfld.long 0xc 20.--21. " GPB10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 18.--19. " GPB9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 16.--17. " GPB8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 14.--15. " GPB7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 12.--13. " GPB6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 10.--11. " GPB5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 8.--9. " GPB4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 6.--7. " GPB3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 4.--5. " GPB2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 2.--3. " GPB1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 0.--1. " GPB0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port C"
|
|
width 11.
|
|
group.long 0x20++0xf
|
|
line.long 0x00 "GPCCON,Port C Control Register"
|
|
bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..."
|
|
bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..."
|
|
bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..."
|
|
bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..."
|
|
bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..."
|
|
bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..."
|
|
bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCDVF2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCDVF1,?..."
|
|
bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCDVF0,?..."
|
|
bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..."
|
|
bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..."
|
|
bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..."
|
|
line.long 0x04 "GPCDAT,Port C Data Register"
|
|
bitfld.long 0x4 15. " GPC15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPC14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPC13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPC12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPC11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPC10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPC9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPC8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPC7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPC6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPC5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPC4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPC3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPC2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPC1 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPCDN,Port C Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPC15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPC14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPC13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPC12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPC11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPC10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPC9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPC8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPC7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPC6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPC5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPC4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPC3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPC2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPC1 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPCSLPCON,Sleep Mode Configuration Register For Port C Register"
|
|
bitfld.long 0xc 30.--31. " GPC15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPC14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPC13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPC12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPC11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPC10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPC9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPC8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPC7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPC6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPC5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPC4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPC3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPC2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPC1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port D"
|
|
width 11.
|
|
group.long 0x30++0xf
|
|
line.long 0x00 "GPDCON,Port D Control Register"
|
|
bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,nSS0"
|
|
bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,nSS1"
|
|
bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..."
|
|
bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..."
|
|
bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,SPICLK1"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,SPIMOSI1"
|
|
bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,SPIMISO1"
|
|
bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..."
|
|
bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..."
|
|
bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..."
|
|
bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..."
|
|
bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,?..."
|
|
line.long 0x04 "GPDDAT,Port D Data Register"
|
|
bitfld.long 0x4 15. " GPD15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPD14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPD13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPD12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPD11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPD10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPD9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPD8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPD7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPD6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPD5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPD4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPD3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPD2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPD1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPD0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPDDN,Port D Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPD15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPD14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPD13 ,Pull-down function Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPD12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPD11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPD10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPD9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPD8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPD7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPD6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPD5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPD4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPD3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPD2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPD1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPD0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPDSLPCON,Sleep Mode Configuration Register For Port D Register"
|
|
bitfld.long 0xc 30.--31. " GPD15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPD14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPD13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPD12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPD11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPD10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPD9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPD8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPD7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPD6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPD5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPD4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPD3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPD2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPD1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPD0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port E"
|
|
width 11.
|
|
group.long 0x40++0xf
|
|
line.long 0x00 "GPECON,Port E Control Register"
|
|
bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..."
|
|
bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..."
|
|
bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..."
|
|
bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..."
|
|
bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SDDAT3,?..."
|
|
bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SDDAT2,?..."
|
|
bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SDDAT1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SDDAT0,?..."
|
|
bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SDCMD,?..."
|
|
bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SDCLK,?..."
|
|
bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SSDO,I2SSDI"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SSDI,nSS0"
|
|
bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,?..."
|
|
bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,?..."
|
|
bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,?..."
|
|
line.long 0x04 "GPEDAT,Port E Data Register"
|
|
bitfld.long 0x4 15. " GPE15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPE14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPE13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPE12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPE11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPE10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPE9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPE8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPE7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPE6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPE5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPE4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPE3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPE2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPE1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPE0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPEDN,Port E Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPE15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPE14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPE13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPE12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPE11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPE10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPE9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPE8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPE7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPE6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPE5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPE4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPE3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPE2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPE1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPE0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPESLPCON,Sleep Mode Configuration Register For Port E Register"
|
|
bitfld.long 0xc 30.--31. " GPE15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPE14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPE13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPE12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPE11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPE10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPE9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPE8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPE7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPE6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPE5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPE4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPE3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPE2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPE1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPE0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port F"
|
|
width 8.
|
|
group.long 0x50++0xb
|
|
line.long 0x00 "GPFCON,Port F Control Register"
|
|
bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..."
|
|
bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..."
|
|
bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..."
|
|
bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..."
|
|
bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..."
|
|
bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..."
|
|
line.long 0x04 "GPFDAT,Port F Data Register"
|
|
bitfld.long 0x4 7. " GPF7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPF6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPF5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPF4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPF3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPF2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPF1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPF0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPFDN,Port F Pull-down Control Register"
|
|
bitfld.long 0x8 7. " GPF7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPF6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPF5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPF4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPF3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPF2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPF1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPF0 ,Pull-down function disable" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port G"
|
|
width 11.
|
|
group.long 0x60++0xf
|
|
line.long 0x00 "GPGCON,Port G Control Register"
|
|
bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,?..."
|
|
bitfld.long 0x00 28.--29. " GPG14 ,Pin14 mode" "Input,Output,EINT22,?..."
|
|
bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,?..."
|
|
bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,TCLK1"
|
|
bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,nCTS1"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,nRTS1"
|
|
bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..."
|
|
bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,SPICLK1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,SPIMOSI1"
|
|
bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,SPIMISO1"
|
|
bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,nSS1"
|
|
bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,nSS0"
|
|
bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,ATA_NRESET"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,ATA_INTRQ"
|
|
line.long 0x04 "GPGDAT,Port G Data Register"
|
|
bitfld.long 0x4 15. " GPG15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPG14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPG13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPG12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPG11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPG10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPG9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPG8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPG7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPG6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPG5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPG4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPG3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPG2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPG1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPG0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPGDN,Port G Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPG15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPG14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPG13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPG12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPG11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPG10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPG9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPG8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPG7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPG6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPG5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPG4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPG3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPG2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPG1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPG0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPGSLPCON,Sleep Mode Configuration Register For Port G Register"
|
|
bitfld.long 0xc 30.--31. " GPG15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPG14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPG13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPG12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPG11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPG10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPG9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPG8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPG7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPG6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPG5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPG4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPG3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPG2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPG1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPG0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port H"
|
|
width 11.
|
|
group.long 0x70++0xf
|
|
line.long 0x00 "GPHCON,Port H Control Register"
|
|
bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,CLKOUT1,?..."
|
|
bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,CLKOUT0,?..."
|
|
bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,UEXTCLK,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD2,nCTS1"
|
|
bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD2,nRTS1"
|
|
bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD1,?..."
|
|
bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,nRTS0,?..."
|
|
bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,nCTS0,?..."
|
|
line.long 0x04 "GPHDAT,Port H Data Register"
|
|
bitfld.long 0x4 10. " GPH10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPH9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPH8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPH7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPH6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPH5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPH4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPH3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPH2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPH1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPH0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPHDN,Port H Pull-down Control Register"
|
|
bitfld.long 0x8 10. " GPH10 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 9. " GPH9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPH8 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " GPH7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPH6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPH5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPH4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPH3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPH2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPH1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPH0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPHSLPCON,Sleep Mode Configuration Register For Port H Register"
|
|
bitfld.long 0xc 20.--21. " GPH10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 18.--19. " GPH9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 16.--17. " GPH8 ,Sleep mode onfiguration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 14.--15. " GPH7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 12.--13. " GPH6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 10.--11. " GPH5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 8.--9. " GPH4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 6.--7. " GPH3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 4.--5. " GPH2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 2.--3. " GPH1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 0.--1. " GPH0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Miscellaneous Registers"
|
|
width 9.
|
|
group.long 0x90++0x3 "Miscellaneous Registers"
|
|
line.long 0x00 "MISCCR,Miscellaneous control register"
|
|
bitfld.long 0x00 19. " nEN_SCKE ,Used to protect SSMC during Power_OFF" "SCLK,L level"
|
|
bitfld.long 0x00 18. " nEN_nSCLK ,Used to protect SDRAM during Power_OFF" "SCLK,L level"
|
|
bitfld.long 0x00 17. " nEN_SCLK ,Used to protect SDRAM during Power_OFF" "SCLK,L level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " USBSUSPND1 ,USB port 1 mode" "Normal,Suspended"
|
|
bitfld.long 0x00 12. " USBSUSPND0 ,USB port 0 mode" "Normal,Suspended"
|
|
bitfld.long 0x00 8.--10. " CLKSEL1 ,CLKOUT1 output signal source" "CLK,UPLL,FCLK,HCLK,PCLK,DCLK1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " CLKSEL0 ,CLKOUT0 output signal source" "MPLL,UPLL,RTC,HCLK,PCLK,DCLK0,?..."
|
|
bitfld.long 0x00 3. " USBPAD ,USB pad selection" "Device,Host"
|
|
bitfld.long 0x00 2. " SPUCR2 ,DQS[1:0] port pull-up resistor" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPUCR_H ,DATA[31:16] port pull-up resistor" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " SPUCR_L ,Data[15:0] port pull-up resistor" "Enabled,Disabled"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "DCLKCON,DCLK0/1 Control Register"
|
|
bitfld.long 0x00 24.--27. " DCLK1CMP ,DCLK1 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " DCLK1DIV ,DCLK1 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 17. " DCLK1SelCK ,Select DCLK1 source clock" "PCLK,UCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DCLK1EN ,DCLK1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DCLK0CMP ,DCLK0 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DCLK0DIV ,DCLK0 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCLK0SelCK ,Select DCLK0 source clock" "PCLK,UCLK"
|
|
bitfld.long 0x00 0. " DCLK0EN ,DCLK0 enable" "Disabled,Enabled"
|
|
width 9.
|
|
group.long 0x98++0xb "External Interrupt Control Registers"
|
|
line.long 0x00 "EXTINT0,External Interrupt Control Register 0"
|
|
bitfld.long 0x00 31. " FLTEN7 ,Filter enable for EINT7" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " EINT7 ,Signalling method of EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FLTEN6 ,Filter enable for EINT6" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " EINT6 ,Signalling method of EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN5 ,Filter enable for EINT5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--22. " EINT5 ,Signalling method of EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FLTEN4 ,Filter enable for EINT4" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " EINT4 ,Signalling method of EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3 ,Filter enable for EINT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " EINT3 ,Signalling method of EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FLTEN2 ,Filter enable for EINT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " EINT2 ,Signalling method of EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1 ,Filter enable for EINT1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " EINT1 ,Signalling method of EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FLTEN0 ,Filter enable for EINT0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " EINT0 ,Signalling method of EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
line.long 0x04 "EXTINT1,External Interrupt Control Register 1"
|
|
bitfld.long 0x04 31. " FLTEN15 ,Filter enable for EINT15" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--30. " EINT15 ,Signalling method of EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 27. " FLTEN14 ,Filter enable for EINT14" "Disabled,Enabled"
|
|
bitfld.long 0x04 24.--26. " EINT14 ,Signalling method of EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FLTEN13 ,Filter enable for EINT13" "Disabled,Enabled"
|
|
bitfld.long 0x04 20.--22. " EINT13 ,Signalling method of EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FLTEN12 ,Filter enable for EINT12" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--18. " EINT12 ,Signalling method of EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTEN11 ,Filter enable for EINT11" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--14. " EINT11 ,Signalling method of EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FLTEN10 ,Filter enable for EINT10" "Disabled,Enabled"
|
|
bitfld.long 0x04 8.--10. " EINT10 ,Signalling method of EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTEN9 ,Filter enable for EINT9" "Disabled,Enabled"
|
|
bitfld.long 0x04 4.--6. " EINT9 ,Signalling method of EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FLTEN8 ,Filter enable for EINT8" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " EINT8 ,Signalling method of EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
line.long 0x08 "EXTINT2,External Interrupt Control Register 2"
|
|
bitfld.long 0x08 31. " FLTEN23 ,Filter enable for EINT23" "Disabled,Enabled"
|
|
bitfld.long 0x08 28.--30. " EINT23 ,Signalling method of EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 27. " FLTEN22 ,Filter enable for EINT22" "Disabled,Enabled"
|
|
bitfld.long 0x08 24.--26. " EINT22 ,Signalling method of EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 23. " FLTEN21 ,Filter enable for EINT21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20.--22. " EINT21 ,Signalling method of EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 19. " FLTEN20 ,Filter enable for EINT20" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--18. " EINT20 ,Signalling method of EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 15. " FLTEN19 ,Filter enable for EINT19" "Disabled,Enabled"
|
|
bitfld.long 0x08 12.--14. " EINT19 ,Signalling method of EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FLTEN18 ,Filter enable for EINT18" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " EINT18 ,Signalling method of EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 7. " FLTEN17 ,Filter enable for EINT17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--6. " EINT17 ,Signalling method of EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FLTEN16 ,Filter enable for EINT16" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " EINT16 ,Signalling method of EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
width 9.
|
|
hgroup.long 0xa4++0x7 "External Interrupt Filter Registers"
|
|
hide.long 0x00 "EINTFLT0,?..."
|
|
hide.long 0x04 "EINTFLT1,?..."
|
|
group.long 0xac++0x7
|
|
line.long 0x00 "EINTFLT2,External Interrupt Control Register 2"
|
|
bitfld.long 0x00 31. " FLTCLK19 ,Filter clock of EINT19" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 8.--14. 1. " EINTFLT17 ,Filter width of EINT17"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16"
|
|
line.long 0x04 "EINTFLT3,External Interrupt Control Register 3"
|
|
bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTCLK20 ,Filter Clock Of EINT20" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20"
|
|
width 9.
|
|
group.long 0xb4++0x3 "External Interrupt Mask Register"
|
|
line.long 0x00 "EINTMASK,External Interrupt Mask Register"
|
|
bitfld.long 0x00 23. " EINT23 ,External interrupt 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " EINT22 ,External interrupt 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " EINT21 ,External interrupt 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EINT20 ,External interrupt 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " EINT19 ,External interrupt 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " EINT18 ,External interrupt 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT17 ,External interrupt 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " EINT16 ,External interrupt 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " EINT3 ,External interrupt 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EINT2 ,External interrupt 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " EINT1 ,External interrupt 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " EINT0 ,External interrupt 0 mask" "Not masked,Masked"
|
|
width 9.
|
|
group.long 0xb8++0x3 "External Interrupt Pending Register"
|
|
line.long 0x00 "EINTPEND,External Interrupt Pending Register"
|
|
bitfld.long 0x00 23. " EINT23 ,External interrupt 23 request" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " EINT22 ,External interrupt 22 request" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " EINT21 ,External interrupt 21 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EINT20 ,External interrupt 20 request" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " EINT19 ,External interrupt 19 request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " EINT18 ,External interrupt 18 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT17 ,External interrupt 17 request" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " EINT16 ,External interrupt 16 request" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 request" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 request" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 request" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " EINT3 ,External interrupt 3 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EINT2 ,External interrupt 2 request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " EINT1 ,External interrupt 1 request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,External interrupt 0 request" "Not requested,Requested"
|
|
width 9.
|
|
rgroup.long 0xbc++0x7 "General Status Registers"
|
|
line.long 0x00 "GSTATUS0,External Pin Status Register"
|
|
bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High"
|
|
bitfld.long 0x00 1. " RnB ,Status of R/nB pin" "Low,High"
|
|
bitfld.long 0x00 0. " nBATT_FLT ,Status of nBATT_FLT pin" "Low,High"
|
|
line.long 0x04 "GSTATUS1,Chip ID Register"
|
|
hexmask.long 0x04 0.--31. 1. " CHIP_ID ,Chip ID"
|
|
group.long 0xc4++0xf
|
|
line.long 0x00 "GSTATUS2,Inform Register"
|
|
hexmask.long 0x00 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x04 "GSTATUS3,Inform Register"
|
|
hexmask.long 0x04 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x08 "GSTATUS4,Inform Register"
|
|
hexmask.long 0x08 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x0c "GSTATUS5,Inform Register"
|
|
hexmask.long 0x0c 0.--31. 1. " Inform ,Data value"
|
|
width 9.
|
|
group.long 0xd4++0x3 "Memory Control Registers"
|
|
line.long 0x00 "MSTCON,Memory Stop Control Register"
|
|
bitfld.long 0x00 19. " MST_SCKE ,SCKE pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 18. " MST_nSCK ,nSCK pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MST_SCK ,SCK pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 14. " MST_nRSTOUT ,nRSTOUT pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 12. " MST_WAIT ,nWAIT pin status in stop mode" "Previous,Output low"
|
|
bitfld.long 0x00 11. " MST_RnB ,RnB pin status in stop mode" "Previous,Output low"
|
|
textline " "
|
|
bitfld.long 0x00 10. " MST_NFC ,NAND flash I/F pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 9. " MST_nOE ,nOE pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 8. " MST_nWE ,nWE pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 7. " MST_BE ,BE pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 6. " MST_SDR ,nSRAS/nSCAS pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 5. " MST_CS ,nGCS[7:0] pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 4. " MST_ADDR ,ADDR pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 0.--1. " MST_DATA ,nGCS[7] pin status in stop mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
group.long 0xd8++0x3
|
|
line.long 0x00 "MSLCON,Memory Sleep Control Register"
|
|
bitfld.long 0x00 30.--31. " MST_SCKE ,SCKE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 26.--27. " MST_SCK ,SCK pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
textline " "
|
|
bitfld.long 0x00 21. " MST_nRSTOUT ,nRSTOUT pin status in sleep mode" "Output low,Output high"
|
|
bitfld.long 0x00 19. " MST_WAIT ,nWAIT pin status in sleep mode" "Input,Output low"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MST_RnB ,RnB pin status in sleep mode" "Input,Output low"
|
|
bitfld.long 0x00 16.--17. " MST_NFC ,NAND flash controller pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MST_nOE ,nOE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 12.--13. " MST_nWE ,nWE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MST_BE ,BE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-stete"
|
|
bitfld.long 0x00 8.--9. " MST_SDR ,nSCAS/nSRAS pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MST_CS ,nGCS pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 4.--5. " MST_ADDR ,ADDR pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " MST_DATA ,DATA pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
width 9.
|
|
group.long 0xdc++0x3 "Drive Strength Control"
|
|
line.long 0x00 "DSC0,Strength Control Register 0"
|
|
bitfld.long 0x00 31. " nEN_DSC ,Enable drive strength control" "Enabled,Disabled"
|
|
bitfld.long 0x00 24.--25. " DSC_CS7 ,nGCS7 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 22.--23. " DSC_CS6 ,nGCS6 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " DCS_CS5 ,nGCS5 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 18.--19. " DCS_CS4 ,nGCS4 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 16.--17. " DCS_CS3 ,nGCS3 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " DCS_CS2 ,nGCS2 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 12.--13. " DCS_CS1 ,nGCS1 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 10.--11. " DCS_CS0 ,nGCS0 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DCS_ADR ,Address bus drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 6.--7. " DCS_DATA3 ,DATA[31:24] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 4.--5. " DCS_DATA2 ,DATA[23:16] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " DCS_DATA1 ,DATA[15:8] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 0.--1. " DSC_DATA0 ,DATA[7:0] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
group.long 0xe0++0x3
|
|
line.long 0x00 "DSC1,Strength Control Register 1"
|
|
bitfld.long 0x00 14.--15. " DSC_WOE ,nWE/nOE drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 12.--13. " DSC_BE ,nBE[3:0] drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 10.--11. " DSC_NFC ,NAND flash control drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DCS_SDR ,nSRAS/nSCAS drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 6.--7. " DSC_SCKE ,SCKE drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 0.--1. " DSC_SCK ,SCLK drive strength" "10mA,8mA,6mA,4mA"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2413X")
|
|
tree "Port A"
|
|
width 8.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "GPACON,Port A Control Register"
|
|
bitfld.long 0x0 22. " GPA22 ,Pin22 mode" "Output,SMAVD"
|
|
bitfld.long 0x0 21. " GPA21 ,Pin21 mode" "Output,nRSTOUT"
|
|
bitfld.long 0x0 20. " GPA20 ,Pin20 mode" "Output,nFRE"
|
|
textline " "
|
|
bitfld.long 0x0 19. " GPA19 ,Pin19 mode" "Output,nFWE"
|
|
bitfld.long 0x0 18. " GPA18 ,Pin18 mode" "Output,ALE"
|
|
bitfld.long 0x0 17. " GPA17 ,Pin17 mode" "Output,CLE"
|
|
textline " "
|
|
bitfld.long 0x0 16. " GPA16 ,Pin16 mode" "Output,nGCS5"
|
|
bitfld.long 0x0 15. " GPA15 ,Pin15 mode" "Output,nGCS4"
|
|
bitfld.long 0x0 14. " GPA14 ,Pin14 mode" "Output,nGCS3"
|
|
textline " "
|
|
bitfld.long 0x0 13. " GPA13 ,Pin13 mode" "Output,nGCS2"
|
|
bitfld.long 0x0 12. " GPA12 ,Pin12 mode" "Output,nGCS1"
|
|
bitfld.long 0x0 11. " GPA11 ,Pin11 mode" "Output,ADDR26"
|
|
textline " "
|
|
bitfld.long 0x0 10. " GPA10 ,Pin10 mode" "Output,ADDR25"
|
|
bitfld.long 0x0 9. " GPA9 ,Pin9 mode" "Output,ADDR24"
|
|
bitfld.long 0x0 8. " GPA8 ,Pin8 mode" "Output,ADDR23"
|
|
textline " "
|
|
bitfld.long 0x0 7. " GPA7 ,Pin7 mode" "Output,ADDR22"
|
|
bitfld.long 0x0 6. " GPA6 ,Pin6 mode" "Output,ADDR21"
|
|
bitfld.long 0x0 5. " GPA5 ,Pin5 mode" "Output,ADDR20"
|
|
textline " "
|
|
bitfld.long 0x0 4. " GPA4 ,Pin4 mode" "Output,ADDR19"
|
|
bitfld.long 0x0 3. " GPA3 ,Pin3 mode" "Output,ADDR18"
|
|
bitfld.long 0x0 2. " GPA2 ,Pin2 mode" "Output,ADDR17"
|
|
textline " "
|
|
bitfld.long 0x0 1. " GPA1 ,Pin1 mode" "Output,ADDR16"
|
|
bitfld.long 0x0 0. " GPA0 ,Pin0 mode" "Output,ADDR0"
|
|
line.long 0x04 "GPDAT,Port A Data Register"
|
|
bitfld.long 0x4 22. " GPA22 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 21. " GPA21 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 20. " GPA20 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 19. " GPA19 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 18. " GPA18 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 17. " GPA17 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 16. " GPA16 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 15. " GPA15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPA14 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 13. " GPA13 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 12. " GPA12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPA11 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 10. " GPA10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPA9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPA8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPA7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPA6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPA5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPA4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPA3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPA2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPA1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPA0 ,Pin state" "Low,High"
|
|
tree.end
|
|
tree "Port B"
|
|
width 11.
|
|
group.long 0x10++0xf
|
|
line.long 0x00 "GPBCON,Port B Control Register"
|
|
bitfld.long 0x0 20.--21. " GPB10 ,Pin10 mode" "Input,Output,nXDREQ0,?..."
|
|
bitfld.long 0x0 18.--19. " GPB9 ,Pin9 mode" "Input,Output,nXDACK0,?..."
|
|
bitfld.long 0x0 16.--17. " GPB8 ,Pin8 mode" "Input,Output,nXDREQ1,?..."
|
|
textline " "
|
|
bitfld.long 0x0 14.--15. " GPB7 ,Pin7 mode" "Input,Output,nXDACK1,?..."
|
|
bitfld.long 0x0 12.--13. " GPB6 ,Pin6 mode" "Input,Output,nXBREQ,?..."
|
|
bitfld.long 0x0 10.--11. " GPB5 ,Pin5 mode" "Input,Output,nXBACK,?..."
|
|
textline " "
|
|
bitfld.long 0x0 8.--9. " GPB4 ,Pin4 mode" "Input,Output,TCLK0,?..."
|
|
bitfld.long 0x0 6.--7. " GPB3 ,Pin3 mode" "Input,Output,TOUT3,?..."
|
|
bitfld.long 0x0 4.--5. " GPB2 ,Pin2 mode" "Input,Output,TOUT2,?..."
|
|
textline " "
|
|
bitfld.long 0x0 2.--3. " GPB1 ,Pin1 mode" "Input,Output,TOUT1,?..."
|
|
bitfld.long 0x0 0.--1. " GPB0 ,Pin0 mode" "Input,Output,TOUT0,?..."
|
|
line.long 0x04 "GPBDAT,Port B Data Register"
|
|
bitfld.long 0x4 10. " GPB10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPB9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPB8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPB7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPB6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPB5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPB4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPB3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPB2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPB1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPB0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPBDN,Port B Pull-down Control Register"
|
|
bitfld.long 0x8 10. " GPB10 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 9. " GPB9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPB8 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " GPB7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPB6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPB5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPB4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPB3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPB2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPB1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPB0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPBSLPCON,Sleep Mode Configuration Register For Port B Register"
|
|
bitfld.long 0xc 20.--21. " GPB10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 18.--19. " GPB9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 16.--17. " GPB8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 14.--15. " GPB7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 12.--13. " GPB6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 10.--11. " GPB5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 8.--9. " GPB4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 6.--7. " GPB3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 4.--5. " GPB2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 2.--3. " GPB1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 0.--1. " GPB0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port C"
|
|
width 11.
|
|
group.long 0x20++0xf
|
|
line.long 0x00 "GPCCON,Port C Control Register"
|
|
bitfld.long 0x00 30.--31. " GPC15 ,Pin15 mode" "Input,Output,VD[7],?..."
|
|
bitfld.long 0x00 28.--29. " GPC14 ,Pin14 mode" "Input,Output,VD[6],?..."
|
|
bitfld.long 0x00 26.--27. " GPC13 ,Pin13 mode" "Input,Output,VD[5],?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPC12 ,Pin12 mode" "Input,Output,VD[4],?..."
|
|
bitfld.long 0x00 22.--23. " GPC11 ,Pin11 mode" "Input,Output,VD[3],?..."
|
|
bitfld.long 0x00 20.--21. " GPC10 ,Pin10 mode" "Input,Output,VD[2],?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPC9 ,Pin9 mode" "Input,Output,VD[1],?..."
|
|
bitfld.long 0x00 16.--17. " GPC8 ,Pin8 mode" "Input,Output,VD[0],?..."
|
|
bitfld.long 0x00 14.--15. " GPC7 ,Pin7 mode" "Input,Output,LCDVF2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPC6 ,Pin6 mode" "Input,Output,LCDVF1,?..."
|
|
bitfld.long 0x00 10.--11. " GPC5 ,Pin5 mode" "Input,Output,LCDVF0,?..."
|
|
bitfld.long 0x00 8.--9. " GPC4 ,Pin4 mode" "Input,Output,VM,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPC3 ,Pin3 mode" "Input,Output,VFRAME,?..."
|
|
bitfld.long 0x00 4.--5. " GPC2 ,Pin2 mode" "Input,Output,VLINE,?..."
|
|
bitfld.long 0x00 2.--3. " GPC1 ,Pin1 mode" "Input,Output,VCLK,?..."
|
|
line.long 0x04 "GPCDAT,Port C Data Register"
|
|
bitfld.long 0x4 15. " GPC15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPC14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPC13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPC12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPC11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPC10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPC9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPC8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPC7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPC6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPC5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPC4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPC3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPC2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPC1 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPCDN,Port C Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPC15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPC14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPC13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPC12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPC11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPC10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPC9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPC8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPC7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPC6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPC5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPC4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPC3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPC2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPC1 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPCSLPCON,Sleep Mode Configuration Register For Port C Register"
|
|
bitfld.long 0xc 30.--31. " GPC15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPC14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPC13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPC12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPC11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPC10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPC9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPC8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPC7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPC6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPC5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPC4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPC3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPC2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPC1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port D"
|
|
width 11.
|
|
group.long 0x30++0xf
|
|
line.long 0x00 "GPDCON,Port D Control Register"
|
|
bitfld.long 0x00 30.--31. " GPD15 ,Pin15 mode" "Input,Output,VD23,nSS0"
|
|
bitfld.long 0x00 28.--29. " GPD14 ,Pin14 mode" "Input,Output,VD22,nSS1"
|
|
bitfld.long 0x00 26.--27. " GPD13 ,Pin13 mode" "Input,Output,VD21,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPD12 ,Pin12 mode" "Input,Output,VD20,?..."
|
|
bitfld.long 0x00 22.--23. " GPD11 ,Pin11 mode" "Input,Output,VD19,?..."
|
|
bitfld.long 0x00 20.--21. " GPD10 ,Pin10 mode" "Input,Output,VD18,SPICLK1"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPD9 ,Pin9 mode" "Input,Output,VD17,SPIMOSI1"
|
|
bitfld.long 0x00 16.--17. " GPD8 ,Pin8 mode" "Input,Output,VD16,SPIMISO1"
|
|
bitfld.long 0x00 14.--15. " GPD7 ,Pin7 mode" "Input,Output,VD15,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPD6 ,Pin6 mode" "Input,Output,VD14,?..."
|
|
bitfld.long 0x00 10.--11. " GPD5 ,Pin5 mode" "Input,Output,VD13,?..."
|
|
bitfld.long 0x00 8.--9. " GPD4 ,Pin4 mode" "Input,Output,VD12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPD3 ,Pin3 mode" "Input,Output,VD11,?..."
|
|
bitfld.long 0x00 4.--5. " GPD2 ,Pin2 mode" "Input,Output,VD10,?..."
|
|
bitfld.long 0x00 2.--3. " GPD1 ,Pin1 mode" "Input,Output,VD9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " GPD0 ,Pin0 mode" "Input,Output,VD8,?..."
|
|
line.long 0x04 "GPDDAT,Port D Data Register"
|
|
bitfld.long 0x4 15. " GPD15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPD14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPD13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPD12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPD11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPD10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPD9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPD8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPD7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPD6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPD5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPD4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPD3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPD2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPD1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPD0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPDDN,Port D Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPD15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPD14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPD13 ,Pull-down function Disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPD12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPD11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPD10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPD9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPD8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPD7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPD6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPD5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPD4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPD3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPD2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPD1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPD0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPDSLPCON,Sleep Mode Configuration Register For Port D Register"
|
|
bitfld.long 0xc 30.--31. " GPD15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPD14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPD13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPD12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPD11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPD10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPD9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPD8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPD7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPD6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPD5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPD4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPD3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPD2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPD1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPD0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port E"
|
|
width 11.
|
|
group.long 0x40++0xf
|
|
line.long 0x00 "GPECON,Port E Control Register"
|
|
bitfld.long 0x00 30.--31. " GPE15 ,Pin15 mode" "Input,Output,IICSDA,?..."
|
|
bitfld.long 0x00 28.--29. " GPE14 ,Pin14 mode" "Input,Output,IICSCL,?..."
|
|
bitfld.long 0x00 26.--27. " GPE13 ,Pin13 mode" "Input,Output,SPICLK0,?..."
|
|
bitfld.long 0x00 24.--25. " GPE12 ,Pin12 mode" "Input,Output,SPIMOSI0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " GPE11 ,Pin11 mode" "Input,Output,SPIMISO0,?..."
|
|
bitfld.long 0x00 20.--21. " GPE10 ,Pin10 mode" "Input,Output,SDDAT3,?..."
|
|
bitfld.long 0x00 18.--19. " GPE9 ,Pin9 mode" "Input,Output,SDDAT2,?..."
|
|
bitfld.long 0x00 16.--17. " GPE8 ,Pin8 mode" "Input,Output,SDDAT1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPE7 ,Pin7 mode" "Input,Output,SDDAT0,?..."
|
|
bitfld.long 0x00 12.--13. " GPE6 ,Pin6 mode" "Input,Output,SDCMD,?..."
|
|
bitfld.long 0x00 10.--11. " GPE5 ,Pin5 mode" "Input,Output,SDCLK,?..."
|
|
bitfld.long 0x00 8.--9. " GPE4 ,Pin4 mode" "Input,Output,I2SSDO,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPE3 ,Pin3 mode" "Input,Output,I2SSDI,?..."
|
|
bitfld.long 0x00 4.--5. " GPE2 ,Pin2 mode" "Input,Output,CDCLK,?..."
|
|
bitfld.long 0x00 2.--3. " GPE1 ,Pin1 mode" "Input,Output,I2SSCLK,?..."
|
|
bitfld.long 0x00 0.--1. " GPE0 ,Pin0 mode" "Input,Output,I2SLRCK,?..."
|
|
line.long 0x04 "GPEDAT,Port E Data Register"
|
|
bitfld.long 0x4 15. " GPE15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPE14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPE13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPE12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPE11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPE10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPE9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPE8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPE7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPE6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPE5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPE4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPE3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPE2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPE1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPE0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPEDN,Port E Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPE15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPE14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPE13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPE12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPE11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPE10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPE9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPE8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPE7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPE6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPE5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPE4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPE3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPE2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPE1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPE0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPESLPCON,Sleep Mode Configuration Register For Port E Register"
|
|
bitfld.long 0xc 30.--31. " GPE15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPE14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPE13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPE12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPE11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPE10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPE9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPE8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPE7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPE6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPE5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPE4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPE3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPE2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPE1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPE0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port F"
|
|
width 8.
|
|
group.long 0x50++0xb
|
|
line.long 0x00 "GPFCON,Port F Control Register"
|
|
bitfld.long 0x00 14.--15. " GPF7 ,Pin7 mode" "Input,Output,EINT7,?..."
|
|
bitfld.long 0x00 12.--13. " GPF6 ,Pin6 mode" "Input,Output,EINT6,?..."
|
|
bitfld.long 0x00 10.--11. " GPF5 ,Pin5 mode" "Input,Output,EINT5,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " GPF4 ,Pin4 mode" "Input,Output,EINT4,?..."
|
|
bitfld.long 0x00 6.--7. " GPF3 ,Pin3 mode" "Input,Output,EINT3,?..."
|
|
bitfld.long 0x00 4.--5. " GPF2 ,Pin2 mode" "Input,Output,EINT2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " GPF1 ,Pin1 mode" "Input,Output,EINT1,?..."
|
|
bitfld.long 0x00 0.--1. " GPF0 ,Pin0 mode" "Input,Output,EINT0,?..."
|
|
line.long 0x04 "GPFDAT,Port F Data Register"
|
|
bitfld.long 0x4 7. " GPF7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPF6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPF5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPF4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPF3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPF2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPF1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPF0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPFDN,Port F Pull-down Control Register"
|
|
bitfld.long 0x8 7. " GPF7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPF6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPF5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPF4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPF3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPF2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPF1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPF0 ,Pull-down function disable" "Enabled,Disabled"
|
|
tree.end
|
|
tree "Port G"
|
|
width 11.
|
|
group.long 0x60++0xf
|
|
line.long 0x00 "GPGCON,Port G Control Register"
|
|
bitfld.long 0x00 30.--31. " GPG15 ,Pin15 mode" "Input,Output,EINT23,?..."
|
|
bitfld.long 0x00 28.--29. " GPG14 ,Pin14 mode" "Input,Output,EINT22,?..."
|
|
bitfld.long 0x00 26.--27. " GPG13 ,Pin13 mode" "Input,Output,EINT21,?..."
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " GPG12 ,Pin12 mode" "Input,Output,EINT20,?..."
|
|
bitfld.long 0x00 22.--23. " GPG11 ,Pin11 mode" "Input,Output,EINT19,TCLK1"
|
|
bitfld.long 0x00 20.--21. " GPG10 ,Pin10 mode" "Input,Output,EINT18,nCTS1"
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPG9 ,Pin9 mode" "Input,Output,EINT17,nRTS1"
|
|
bitfld.long 0x00 16.--17. " GPG8 ,Pin8 mode" "Input,Output,EINT16,?..."
|
|
bitfld.long 0x00 14.--15. " GPG7 ,Pin7 mode" "Input,Output,EINT15,SPICLK1"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPG6 ,Pin6 mode" "Input,Output,EINT14,SPIMOSI1"
|
|
bitfld.long 0x00 10.--11. " GPG5 ,Pin5 mode" "Input,Output,EINT13,SPIMISO1"
|
|
bitfld.long 0x00 8.--9. " GPG4 ,Pin4 mode" "Input,Output,EINT12,?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPG3 ,Pin3 mode" "Input,Output,EINT11,nSS1"
|
|
bitfld.long 0x00 4.--5. " GPG2 ,Pin2 mode" "Input,Output,EINT10,nSS0"
|
|
bitfld.long 0x00 2.--3. " GPG1 ,Pin1 mode" "Input,Output,EINT9,?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " GPG0 ,Pin0 mode" "Input,Output,EINT8,?..."
|
|
line.long 0x04 "GPGDAT,Port G Data Register"
|
|
bitfld.long 0x4 15. " GPG15 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 14. " GPG14 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 13. " GPG13 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 12. " GPG12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPG11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPG10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPG9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPG8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPG7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPG6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPG5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPG4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPG3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPG2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPG1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPG0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPGDN,Port G Pull-down Control Register"
|
|
bitfld.long 0x8 15. " GPG15 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 14. " GPG14 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 13. " GPG13 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 12. " GPG12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPG11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPG10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPG9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPG8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPG7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPG6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPG5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPG4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPG3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPG2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPG1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPG0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPGSLPCON,Sleep Mode Configuration Register For Port G Register"
|
|
bitfld.long 0xc 30.--31. " GPG15 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 28.--29. " GPG14 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 26.--27. " GPG13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPG12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPG11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPG10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPG9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPG8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPG7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPG6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPG5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPG4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPG3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPG2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPG1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPG0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port H"
|
|
width 11.
|
|
group.long 0x70++0xf
|
|
line.long 0x00 "GPHCON,Port H Control Register"
|
|
bitfld.long 0x00 20.--21. " GPH10 ,Pin10 mode" "Input,Output,CLKOUT1,?..."
|
|
bitfld.long 0x00 18.--19. " GPH9 ,Pin9 mode" "Input,Output,CLKOUT0,?..."
|
|
bitfld.long 0x00 16.--17. " GPH8 ,Pin8 mode" "Input,Output,UEXTCLK,?..."
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " GPH7 ,Pin7 mode" "Input,Output,RXD2,?..."
|
|
bitfld.long 0x00 12.--13. " GPH6 ,Pin6 mode" "Input,Output,TXD2,?..."
|
|
bitfld.long 0x00 10.--11. " GPH5 ,Pin5 mode" "Input,Output,RXD1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " GPH4 ,Pin4 mode" "Input,Output,TXD1,?..."
|
|
bitfld.long 0x00 6.--7. " GPH3 ,Pin3 mode" "Input,Output,RXD0,?..."
|
|
bitfld.long 0x00 4.--5. " GPH2 ,Pin2 mode" "Input,Output,TXD0,?..."
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " GPH1 ,Pin1 mode" "Input,Output,nRTS0,?..."
|
|
bitfld.long 0x00 0.--1. " GPH0 ,Pin0 mode" "Input,Output,nCTS0,?..."
|
|
line.long 0x04 "GPHDAT,Port H Data Register"
|
|
bitfld.long 0x4 10. " GPH10 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 9. " GPH9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPH8 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 7. " GPH7 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 6. " GPH6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPH5 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 4. " GPH4 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 3. " GPH3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPH2 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 1. " GPH1 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 0. " GPH0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPHDN,Port H Pull-down Control Register"
|
|
bitfld.long 0x8 10. " GPH10 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 9. " GPH9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPH8 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 7. " GPH7 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 6. " GPH6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPH5 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 4. " GPH4 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 3. " GPH3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPH2 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 1. " GPH1 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 0. " GPH0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPHSLPCON,Sleep Mode Configuration Register For Port H Register"
|
|
bitfld.long 0xc 20.--21. " GPH10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 18.--19. " GPH9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 16.--17. " GPH8 ,Sleep mode onfiguration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 14.--15. " GPH7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 12.--13. " GPH6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 10.--11. " GPH5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 8.--9. " GPH4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 6.--7. " GPH3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 4.--5. " GPH2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 2.--3. " GPH1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 0.--1. " GPH0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Port J"
|
|
width 11.
|
|
group.long 0x80++0xf
|
|
line.long 0x00 "GPJCON,Port J Control Register"
|
|
bitfld.long 0x00 24.--25. " GPJ12 ,Pin12 mode" "Input,Output,CAMRESET,?..."
|
|
bitfld.long 0x00 22.--23. " GPJ11 ,Pin11 mode" "Input,Output,CAMCLKOUT,?..."
|
|
bitfld.long 0x00 20.--21. " GPJ10 ,Pin10 mode" "Input,Output,CAMHREF,?..."
|
|
textline " "
|
|
bitfld.long 0x00 18.--19. " GPJ9 ,Pin9 mode" "Input,Output,CAMVSYNC,?..."
|
|
bitfld.long 0x00 16.--17. " GPJ8 ,Pin8 mode" "Input,Output,CAMPCLK,?..."
|
|
bitfld.long 0x00 14.--15. " GPJ7 ,Pin7 mode" "Input,Output,CAMDATA[7],?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " GPJ6 ,Pin6 mode" "Input,Output,CAMDATA[6],?..."
|
|
bitfld.long 0x00 10.--11. " GPJ5 ,Pin5 mode" "Input,Output,CAMDATA[5],?..."
|
|
bitfld.long 0x00 8.--9. " GPJ4 ,Pin4 mode" "Input,Output,CAMDATA[4],?..."
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " GPJ3 ,Pin3 mode" "Input,Output,CAMDATA[3],?..."
|
|
bitfld.long 0x00 4.--5. " GPJ2 ,Pin2 mode" "Input,Output,CAMDATA[2],?..."
|
|
bitfld.long 0x00 2.--3. " GPJ1 ,Pin1 mode" "Input,Output,CAMDATA[1],?..."
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " GPJ0 ,Pin0 mode" "Input,Output,CAMDATA[0],?..."
|
|
line.long 0x04 "GPJDAT,Port J Data Register"
|
|
bitfld.long 0x4 12. " GPJ12 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 11. " GPJ11 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 10. " GPJ10 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 9. " GPJ9 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 8. " GPJ8 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 7. " GPJ7 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 6. " GPJ6 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 5. " GPJ5 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 4. " GPJ4 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 3. " GPJ3 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 2. " GPJ2 ,Pin state" "Low,High"
|
|
bitfld.long 0x4 1. " GPJ1 ,Pin state" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x4 0. " GPJ0 ,Pin state" "Low,High"
|
|
line.long 0x08 "GPJDN,Port J Pull-down Control Register"
|
|
bitfld.long 0x8 12. " GPJ12 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 11. " GPJ11 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 10. " GPJ10 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 9. " GPJ9 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 8. " GPJ8 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 7. " GPJ7 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 6. " GPJ6 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 5. " GPJ5 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 4. " GPJ4 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 3. " GPJ3 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 2. " GPJ2 ,Pull-down function disable" "Enabled,Disabled"
|
|
bitfld.long 0x8 1. " GPJ1 ,Pull-down function disable" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x8 0. " GPJ0 ,Pull-down function disable" "Enabled,Disabled"
|
|
width 11.
|
|
line.long 0x0c "GPJSLPCON,Sleep Mode Configuration Register For Port J Register"
|
|
bitfld.long 0xc 26.--27. " GPJ13 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 24.--25. " GPJ12 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 22.--23. " GPJ11 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 20.--21. " GPJ10 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 18.--19. " GPJ9 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 16.--17. " GPJ8 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 14.--15. " GPJ7 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 12.--13. " GPJ6 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 10.--11. " GPJ5 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 8.--9. " GPJ4 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 6.--7. " GPJ3 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 4.--5. " GPJ2 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
textline " "
|
|
bitfld.long 0xc 2.--3. " GPJ1 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
bitfld.long 0xc 0.--1. " GPJ0 ,Sleep mode configuration" "Output low,Output high,Input - Pull-down disable,Input - Pull-down enable"
|
|
tree.end
|
|
tree "Miscellaneous Registers"
|
|
width 9.
|
|
group.long 0x90++0x3 "Miscellaneous Registers"
|
|
line.long 0x00 "MISCCR,Miscellaneous control register"
|
|
bitfld.long 0x00 19. " nEN_SCKE ,Used to protect SSMC during Power_OFF" "SMCLK,L level"
|
|
bitfld.long 0x00 18. " nEN_nSCLK ,Used to protect SDRAM during Power_OFF" "SCLK,L level"
|
|
bitfld.long 0x00 17. " nEN_SCLK ,Used to protect SDRAM during Power_OFF" "SCLK,L level"
|
|
textline " "
|
|
bitfld.long 0x00 13. " USBSUSPND1 ,USB port 1 mode" "Normal,Suspended"
|
|
bitfld.long 0x00 12. " USBSUSPND0 ,USB port 0 mode" "Normal,Suspended"
|
|
bitfld.long 0x00 8.--10. " CLKSEL1 ,CLKOUT1 output signal source" "CLK,UPLL,FCLK,HCLK,PCLK,DCLK1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--6. " CLKSEL0 ,CLKOUT0 output signal source" "MPLL,UPLL,RTC,HCLK,PCLK,DCLK0,?..."
|
|
bitfld.long 0x00 3. " USBPAD ,USB pad selection" "Device,Host"
|
|
bitfld.long 0x00 2. " SPUCR2 ,DQS[1:0] port pull-up resistor" "Enabled,Disabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SPUCR_H ,DATA[31:16] port pull-up resistor" "Enabled,Disabled"
|
|
bitfld.long 0x00 0. " SPUCR_L ,Data[15:0] port pull-up resistor" "Enabled,Disabled"
|
|
group.long 0x94++0x3
|
|
line.long 0x00 "DCLKCON,DCLK0/1 Control Register"
|
|
bitfld.long 0x00 24.--27. " DCLK1CMP ,DCLK1 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 20.--23. " DCLK1DIV ,DCLK1 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
bitfld.long 0x00 17. " DCLK1SelCK ,Select DCLK1 source clock" "PCLK,UCLK"
|
|
textline " "
|
|
bitfld.long 0x00 16. " DCLK1EN ,DCLK1 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--11. " DCLK0CMP ,DCLK0 compare value clock toggle value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 4.--7. " DCLK0DIV ,DCLK0 divide value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DCLK0SelCK ,Select DCLK0 source clock" "PCLK,UCLK"
|
|
bitfld.long 0x00 0. " DCLK0EN ,DCLK0 enable" "Disabled,Enabled"
|
|
width 9.
|
|
group.long 0x98++0xb "External Interrupt Control Registers"
|
|
line.long 0x00 "EXTINT0,External Interrupt Control Register 0"
|
|
bitfld.long 0x00 31. " FLTEN7 ,Filter enable for EINT7" "Disabled,Enabled"
|
|
bitfld.long 0x00 28.--30. " EINT7 ,Signalling method of EINT7" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 27. " FLTEN6 ,Filter enable for EINT6" "Disabled,Enabled"
|
|
bitfld.long 0x00 24.--26. " EINT6 ,Signalling method of EINT6" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTEN5 ,Filter enable for EINT5" "Disabled,Enabled"
|
|
bitfld.long 0x00 20.--22. " EINT5 ,Signalling method of EINT5" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 19. " FLTEN4 ,Filter enable for EINT4" "Disabled,Enabled"
|
|
bitfld.long 0x00 16.--18. " EINT4 ,Signalling method of EINT4" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTEN3 ,Filter enable for EINT3" "Disabled,Enabled"
|
|
bitfld.long 0x00 12.--14. " EINT3 ,Signalling method of EINT3" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 11. " FLTEN2 ,Filter enable for EINT2" "Disabled,Enabled"
|
|
bitfld.long 0x00 8.--10. " EINT2 ,Signalling method of EINT2" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTEN1 ,Filter enable for EINT1" "Disabled,Enabled"
|
|
bitfld.long 0x00 4.--6. " EINT1 ,Signalling method of EINT1" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x00 3. " FLTEN0 ,Filter enable for EINT0" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--2. " EINT0 ,Signalling method of EINT0" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
line.long 0x04 "EXTINT1,External Interrupt Control Register 1"
|
|
bitfld.long 0x04 31. " FLTEN15 ,Filter enable for EINT15" "Disabled,Enabled"
|
|
bitfld.long 0x04 28.--30. " EINT15 ,Signalling method of EINT15" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 27. " FLTEN14 ,Filter enable for EINT14" "Disabled,Enabled"
|
|
bitfld.long 0x04 24.--26. " EINT14 ,Signalling method of EINT14" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FLTEN13 ,Filter enable for EINT13" "Disabled,Enabled"
|
|
bitfld.long 0x04 20.--22. " EINT13 ,Signalling method of EINT13" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 19. " FLTEN12 ,Filter enable for EINT12" "Disabled,Enabled"
|
|
bitfld.long 0x04 16.--18. " EINT12 ,Signalling method of EINT12" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTEN11 ,Filter enable for EINT11" "Disabled,Enabled"
|
|
bitfld.long 0x04 12.--14. " EINT11 ,Signalling method of EINT11" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FLTEN10 ,Filter enable for EINT10" "Disabled,Enabled"
|
|
bitfld.long 0x04 8.--10. " EINT10 ,Signalling method of EINT10" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTEN9 ,Filter enable for EINT9" "Disabled,Enabled"
|
|
bitfld.long 0x04 4.--6. " EINT9 ,Signalling method of EINT9" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x04 3. " FLTEN8 ,Filter enable for EINT8" "Disabled,Enabled"
|
|
bitfld.long 0x04 0.--2. " EINT8 ,Signalling method of EINT8" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
line.long 0x08 "EXTINT2,External Interrupt Control Register 2"
|
|
bitfld.long 0x08 31. " FLTEN23 ,Filter enable for EINT23" "Disabled,Enabled"
|
|
bitfld.long 0x08 28.--30. " EINT23 ,Signalling method of EINT23" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 27. " FLTEN22 ,Filter enable for EINT22" "Disabled,Enabled"
|
|
bitfld.long 0x08 24.--26. " EINT22 ,Signalling method of EINT22" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 23. " FLTEN21 ,Filter enable for EINT21" "Disabled,Enabled"
|
|
bitfld.long 0x08 20.--22. " EINT21 ,Signalling method of EINT21" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 19. " FLTEN20 ,Filter enable for EINT20" "Disabled,Enabled"
|
|
bitfld.long 0x08 16.--18. " EINT20 ,Signalling method of EINT20" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 15. " FLTEN19 ,Filter enable for EINT19" "Disabled,Enabled"
|
|
bitfld.long 0x08 12.--14. " EINT19 ,Signalling method of EINT19" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 11. " FLTEN18 ,Filter enable for EINT18" "Disabled,Enabled"
|
|
bitfld.long 0x08 8.--10. " EINT18 ,Signalling method of EINT18" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 7. " FLTEN17 ,Filter enable for EINT17" "Disabled,Enabled"
|
|
bitfld.long 0x08 4.--6. " EINT17 ,Signalling method of EINT17" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
textline " "
|
|
bitfld.long 0x08 3. " FLTEN16 ,Filter enable for EINT16" "Disabled,Enabled"
|
|
bitfld.long 0x08 0.--2. " EINT16 ,Signalling method of EINT16" "Low level,High level,Falling edge,Falling edge,Rising edge,Rising edge,Both edges,Both edges"
|
|
width 9.
|
|
hgroup.long 0xa4++0x7 "External Interrupt Filter Registers"
|
|
hide.long 0x00 "EINTFLT0,?..."
|
|
hide.long 0x04 "EINTFLT1,?..."
|
|
group.long 0xac++0x7
|
|
line.long 0x00 "EINTFLT2,External Interrupt Control Register 2"
|
|
bitfld.long 0x00 31. " FLTCLK19 ,Filter clock of EINT19" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 24.--30. 1. " EINTFLT19 ,Filter width of EINT19"
|
|
textline " "
|
|
bitfld.long 0x00 23. " FLTCLK18 ,Filter clock of EINT18" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 16.--22. 1. " EINTFLT18 ,Filter width of EINT18"
|
|
textline " "
|
|
bitfld.long 0x00 15. " FLTCLK17 ,Filter clock of EINT17" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 8.--14. 1. " EINTFLT17 ,Filter width of EINT17"
|
|
textline " "
|
|
bitfld.long 0x00 7. " FLTCLK16 ,Filter clock of EINT16" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x00 0.--6. 1. " EINTFLT16 ,Filter width of EINT16"
|
|
line.long 0x04 "EINTFLT3,External Interrupt Control Register 3"
|
|
bitfld.long 0x04 31. " FLTCLK23 ,Filter clock of EINT23" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 24.--30. 1. " EINTFLT23 ,Filter width of EINT23"
|
|
textline " "
|
|
bitfld.long 0x04 23. " FLTCLK22 ,Filter clock of EINT22" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 16.--22. 1. " EINTFLT22 ,Filter width of EINT22"
|
|
textline " "
|
|
bitfld.long 0x04 15. " FLTCLK21 ,Filter clock of EINT21" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 8.--14. 1. " EINTFLT21 ,Filter width of EINT21"
|
|
textline " "
|
|
bitfld.long 0x04 7. " FLTCLK20 ,Filter Clock Of EINT20" "PCLK,EXTCLK/OSC_CLK"
|
|
hexmask.long.byte 0x04 0.--6. 1. " EINTFLT20 ,Filter width of EINT20"
|
|
width 9.
|
|
group.long 0xb4++0x3 "External Interrupt Mask Register"
|
|
line.long 0x00 "EINTMASK,External Interrupt Mask Register"
|
|
bitfld.long 0x00 23. " EINT23 ,External interrupt 23 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 22. " EINT22 ,External interrupt 22 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " EINT21 ,External interrupt 21 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EINT20 ,External interrupt 20 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 19. " EINT19 ,External interrupt 19 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " EINT18 ,External interrupt 18 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT17 ,External interrupt 17 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 16. " EINT16 ,External interrupt 16 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " EINT3 ,External interrupt 3 mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EINT2 ,External interrupt 2 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " EINT1 ,External interrupt 1 mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " EINT0 ,External interrupt 0 mask" "Not masked,Masked"
|
|
width 9.
|
|
group.long 0xb8++0x3 "External Interrupt Pending Register"
|
|
line.long 0x00 "EINTPEND,External Interrupt Pending Register"
|
|
bitfld.long 0x00 23. " EINT23 ,External interrupt 23 request" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " EINT22 ,External interrupt 22 request" "Not requested,Requested"
|
|
bitfld.long 0x00 21. " EINT21 ,External interrupt 21 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 20. " EINT20 ,External interrupt 20 request" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " EINT19 ,External interrupt 19 request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " EINT18 ,External interrupt 18 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " EINT17 ,External interrupt 17 request" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " EINT16 ,External interrupt 16 request" "Not requested,Requested"
|
|
bitfld.long 0x00 15. " EINT15 ,External interrupt 15 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 14. " EINT14 ,External interrupt 14 request" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " EINT13 ,External interrupt 13 request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " EINT12 ,External interrupt 12 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " EINT11 ,External interrupt 11 request" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " EINT10 ,External interrupt 10 request" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " EINT9 ,External interrupt 9 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 8. " EINT8 ,External interrupt 8 request" "Not requested,Requested"
|
|
bitfld.long 0x00 7. " EINT7 ,External interrupt 7 request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " EINT6 ,External interrupt 6 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT5 ,External interrupt 5 request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4 ,External interrupt 4 request" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " EINT3 ,External interrupt 3 request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 2. " EINT2 ,External interrupt 2 request" "Not requested,Requested"
|
|
bitfld.long 0x00 1. " EINT1 ,External interrupt 1 request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,External interrupt 0 request" "Not requested,Requested"
|
|
width 9.
|
|
rgroup.long 0xbc++0x7 "General Status Registers"
|
|
line.long 0x00 "GSTATUS0,External Pin Status Register"
|
|
bitfld.long 0x00 3. " nWAIT ,Status of nWAIT pin" "Low,High"
|
|
bitfld.long 0x00 1. " RnB ,Status of R/nB pin" "Low,High"
|
|
bitfld.long 0x00 0. " nBATT_FLT ,Status of nBATT_FLT pin" "Low,High"
|
|
line.long 0x04 "GSTATUS1,Chip ID Register"
|
|
hexmask.long 0x04 0.--31. 1. " CHIP_ID ,Chip ID"
|
|
group.long 0xc4++0xf
|
|
line.long 0x00 "GSTATUS2,Inform Register"
|
|
hexmask.long 0x00 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x04 "GSTATUS3,Inform Register"
|
|
hexmask.long 0x04 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x08 "GSTATUS4,Inform Register"
|
|
hexmask.long 0x08 0.--31. 1. " Inform ,Data value"
|
|
line.long 0x0c "GSTATUS5,Inform Register"
|
|
hexmask.long 0x0c 0.--31. 1. " Inform ,Data value"
|
|
width 9.
|
|
group.long 0xd4++0x3 "Memory Control Registers"
|
|
line.long 0x00 "MSTCON,Memory Stop Control Register"
|
|
bitfld.long 0x00 19. " MST_SCKE ,SCKE pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 18. " MST_nSCK ,nSCK pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 17. " MST_SCK ,SCK pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 16. " MST_MCLK ,SMCLK pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 15. " MST_SMAVD ,SMAVD pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 14. " MST_nRSTOUT ,nRSTOUT pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 13. " MST_SMBSTWAIT ,SMBSTWAIT pin status in stop mode" "Previous,Output low"
|
|
bitfld.long 0x00 12. " MST_WAIT ,nWAIT pin status in stop mode" "Previous,Output low"
|
|
textline " "
|
|
bitfld.long 0x00 11. " MST_RnB ,RnB pin status in stop mode" "Previous,Output low"
|
|
bitfld.long 0x00 10. " MST_NFC ,NAND flash I/F pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 9. " MST_nOE ,nOE pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 8. " MST_nWE ,nWE pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 7. " MST_BE ,BE pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 6. " MST_SDR ,nSRAS/nSCAS pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 5. " MST_CS ,nGCS[7:0] pin status in stop mode" "Previous,Tri-state"
|
|
bitfld.long 0x00 4. " MST_ADDR ,ADDR pin status in stop mode" "Previous,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MST_DQS ,DQS[1:0] pin status in stop mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
bitfld.long 0x00 0.--1. " MST_DATA ,nGCS[7] pin status in stop mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
group.long 0xd8++0x3
|
|
line.long 0x00 "MSLCON,Memory Sleep Control Register"
|
|
bitfld.long 0x00 30.--31. " MST_SCKE ,SCKE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 28.--29. " MST_nSCK ,nSCK pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " MST_SCK ,SCK pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
bitfld.long 0x00 24.--25. " MST_SMCLK ,SMCLK pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
textline " "
|
|
bitfld.long 0x00 22.--23. " MST_SMAVD ,SMAVD pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 21. " MST_nRSTOUT ,nRSTOUT pin status in sleep mode" "Output low,Output high"
|
|
textline " "
|
|
bitfld.long 0x00 20. " MST_SMBSTWAIT ,SMBSTWAIT pin status in sleep mode" "Input,Output low"
|
|
bitfld.long 0x00 19. " MST_WAIT ,nWAIT pin status in sleep mode" "Input,Output low"
|
|
textline " "
|
|
bitfld.long 0x00 18. " MST_RnB ,RnB pin status in sleep mode" "Input,Output low"
|
|
bitfld.long 0x00 16.--17. " MST_NFC ,NAND flash controller pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " MST_nOE ,nOE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 12.--13. " MST_nWE ,nWE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " MST_BE ,BE pin status in sleep mode" "Output low,Output high,Tri-state,Tri-stete"
|
|
bitfld.long 0x00 8.--9. " MST_SDR ,nSCAS/nSRAS pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " MST_CS ,nGCS pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
bitfld.long 0x00 4.--5. " MST_ADDR ,ADDR pin status in sleep mode" "Output low,Output high,Tri-state,Tri-state"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " MST_DQS ,DQS pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
bitfld.long 0x00 0.--1. " MST_DATA ,DATA pin status in sleep mode" "Output low,Output high,Tri-state,Input pull-up enable"
|
|
width 9.
|
|
group.long 0xdc++0x3 "Drive Strength Control"
|
|
line.long 0x00 "DSC0,Strength Control Register 0"
|
|
bitfld.long 0x00 31. " nEN_DSC ,Enable drive strength control" "Enabled,Disabled"
|
|
bitfld.long 0x00 24.--25. " DSC_CS7 ,nGCS7 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 22.--23. " DSC_CS6 ,nGCS6 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 20.--21. " DCS_CS5 ,nGCS5 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 18.--19. " DCS_CS4 ,nGCS4 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 16.--17. " DCS_CS3 ,nGCS3 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " DCS_CS2 ,nGCS2 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 12.--13. " DCS_CS1 ,nGCS1 drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 10.--11. " DCS_CS0 ,nGCS0 drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 8.--9. " DCS_ADR ,Address bus drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 6.--7. " DCS_DATA3 ,DATA[31:24] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 4.--5. " DCS_DATA2 ,DATA[23:16] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " DCS_DATA1 ,DATA[15:8] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 0.--1. " DSC_DATA0 ,DATA[7:0] I/O drive strength" "10mA,8mA,6mA,4mA"
|
|
group.long 0xe0++0x3
|
|
line.long 0x00 "DSC1,Strength Control Register 1"
|
|
bitfld.long 0x00 18.--19. " DSC_SMAVD ,SMAVD drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 16.--17. " DSC_DQS ,DQS drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 14.--15. " DSC_WOE ,nWE/nOE drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DSC_BE ,nBE[3:0] drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 10.--11. " DSC_NFC ,NAND flash control drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 8.--9. " DCS_SDR ,nSRAS/nSCAS drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " DSC_SCKE ,SCKE drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 4.--5. " DSC_SMCLK ,SMCLK drive strength" "10mA,8mA,6mA,4mA"
|
|
bitfld.long 0x00 2.--3. " DSC_nSCK ,nSCLK drive strength" "10mA,8mA,6mA,4mA"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " DSC_SCK ,SCLK drive strength" "10mA,8mA,6mA,4mA"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "PWM Timer"
|
|
base ad:0x51000000
|
|
sif (cpu()=="S3C2410X")
|
|
group 0x00++0x7
|
|
line.long 0x00 "TCFG0,Two 8-bit prescalers configure register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2, 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,5-MUX & DMA mode selecton register"
|
|
bitfld.long 0x04 20.--23. " DMA_MODE ,Select DMA request channel" "Not selected,Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,?..."
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
|
|
group 0x08++0x3
|
|
line.long 0x00 "TCON,Timer control register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group 0x0c++0xb
|
|
line.long 0x00 "TCNTB0,Timer 0 count buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T0CNT ,Count buffer value for Timer 0"
|
|
line.long 0x04 "TCMPB0,Timer 0 compare buffer register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T0COM ,Compare buffer value for Timer 0"
|
|
line.long 0x08 "TCNTO0,Timer 0 count observation register"
|
|
hexmask.long.word 0x08 0.--15. 1. " T0OBS ,Count observation value for Timer 0"
|
|
group 0x18++0xb
|
|
line.long 0x00 "TCNTB1,Timer 1 count buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T1CNT ,Count buffer value for Timer 1"
|
|
line.long 0x04 "TCMPB1,Timer 1 compare buffer register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T1COM ,Compare buffer value for Timer 1"
|
|
line.long 0x08 "TCNTO1,Timer 1 count observation register"
|
|
hexmask.long.word 0x08 0.--15. 1. " T1OBS ,Count observation value for Timer 1"
|
|
group 0x24++0xb
|
|
line.long 0x00 "TCNTB2,Timer 2 count buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T2CNT ,Count buffer value for Timer 2"
|
|
line.long 0x04 "TCMPB2,Timer 2 compare buffer register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T2COM ,Compare buffer value for Timer 2"
|
|
line.long 0x08 "TCNTO2,Timer 2 count observation register"
|
|
hexmask.long.word 0x08 0.--15. 1. " T2OBS ,Count observation value for Timer 2"
|
|
group 0x30++0xb
|
|
line.long 0x00 "TCNTB3,Timer 3 count buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T3CNT ,Count buffer value for Timer 3"
|
|
line.long 0x04 "TCMPB3,Timer 3 compare buffer register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T3COM ,Compare buffer value for Timer 3"
|
|
line.long 0x08 "TCNTO3,Timer 3 count observation register"
|
|
hexmask.long.word 0x08 0.--15. 1. " T3OBS ,Count observation value for Timer 3"
|
|
group 0x3c++0x7
|
|
line.long 0x00 "TCNTB4,Timer 4 count buffer register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T4CNT ,Count buffer value for Timer 4"
|
|
line.long 0x04 "TCNTO4,Timer 4 count observation register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T4OBS ,Count observation value for Timer 4"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 8.
|
|
group.long 0x00++0x7
|
|
line.long 0x00 "TCFG0,Timer Configuration Register 0"
|
|
hexmask.long.byte 0x00 16.--23. 1. " DZL ,Dead zone length"
|
|
hexmask.long.byte 0x00 8.--15. 1. " PRESC1 ,Prescaler value for Timer 2 3 and 4"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PRESC0 ,Prescaler value for Timer 0 and 1"
|
|
line.long 0x04 "TCFG1,Timer Configuration Register 1"
|
|
bitfld.long 0x04 20.--23. " DMA_MODE ,Select DMA request channel" "Not selected,Timer 0,Timer 1,Timer 2,Timer 3,Timer 4,?..."
|
|
bitfld.long 0x04 16.--19. " MUX4 ,Select MUX input for PWM Timer4" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
bitfld.long 0x04 12.--15. " MUX3 ,Select MUX input for PWM Timer3" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
textline " "
|
|
bitfld.long 0x04 8.--11. " MUX2 ,Select MUX input for PWM Timer2" "1/2,1/4,1/8,1/16,Ext TCLK1,Ext TCLK1,Ext TCLK1,Ext TCLK1,?..."
|
|
bitfld.long 0x04 4.--7. " MUX1 ,Select MUX input for PWM Timer1" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
|
|
bitfld.long 0x04 0.--3. " MUX0 ,Select MUX input for PWM Timer0" "1/2,1/4,1/8,1/16,Ext TCLK0,Ext TCLK0,Ext TCLK0,Ext TCLK0,?..."
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "TCON,Timer Control Register"
|
|
bitfld.long 0x00 22. " T4RON ,Determine auto reload on/off for Timer 4" "One-shot,Interval"
|
|
bitfld.long 0x00 21. " T4MUPD ,Determine the manual update for Timer 4" "No operation,Updated"
|
|
bitfld.long 0x00 20. " T4STR ,Determine start/stop for Timer 4" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 19. " T3RON ,Determine auto reload on/off for Timer 3" "One-shot,Interval"
|
|
bitfld.long 0x00 18. " T3OION ,Determine output inverter on/off for Timer 3" "Off,On"
|
|
bitfld.long 0x00 17. " T3MUPD ,Determine the manual update for Timer 3" "No operation,Updated"
|
|
textline " "
|
|
bitfld.long 0x00 16. " T3STR ,Determine start/stop for Timer 3" "Stopped,Started"
|
|
bitfld.long 0x00 15. " T2RON ,Determine auto reload on/off for Timer 2" "One-shot,Interval"
|
|
bitfld.long 0x00 14. " T2OION ,Determine output inverter on/off for Timer 2" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 13. " T2MUPD ,Determine the manual update for Timer 2" "No operation,Updated"
|
|
bitfld.long 0x00 12. " T2STR ,Determine start/stop for Timer 2" "Stopped,Started"
|
|
bitfld.long 0x00 11. " T1RON ,Determine auto reload on/off for Timer 1" "One-shot,Interval"
|
|
textline " "
|
|
bitfld.long 0x00 10. " T1OION ,Determine the output inverter on/off for Timer1" "Off,On"
|
|
bitfld.long 0x00 9. " T1MUPD ,Determine the manual update for Timer 1" "No operation,Updated"
|
|
bitfld.long 0x00 8. " T1STR ,Determine start/stop for Timer 1" "Stopped,Started"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DZEN ,Determine the dead zone operation" "Disabled,Enabled"
|
|
bitfld.long 0x00 3. " T0RON ,Determine auto reload on/off for Timer 0" "One-shot,Interval"
|
|
bitfld.long 0x00 2. " T0OION ,Determine the output inverter on/off for Timer 0" "Off,On"
|
|
textline " "
|
|
bitfld.long 0x00 1. " T0MUPD ,Determine the manual update for Timer 0" "No operation,Updated"
|
|
bitfld.long 0x00 0. " T0STR ,Determine start/stop for Timer 0" "Stopped,Started"
|
|
group.long 0xC++0x7 "Timer 0"
|
|
line.long 0x00 "TCNTB0,Timer 0 Count Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T0CNT ,Count buffer value for Timer 0"
|
|
line.long 0x04 "TCMPB0,Timer 0 Compare Ruffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T0COM ,Compare buffer value for Timer 0"
|
|
rgroup.long (0xC+0x8)++0x3
|
|
line.long 0x00 "TCNTO0,Timer 0 Count Observation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T0OBS ,Count observation value for Timer 0"
|
|
group.long 0x18++0x7 "Timer 1"
|
|
line.long 0x00 "TCNTB1,Timer 1 Count Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T1CNT ,Count buffer value for Timer 1"
|
|
line.long 0x04 "TCMPB1,Timer 1 Compare Ruffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T1COM ,Compare buffer value for Timer 1"
|
|
rgroup.long (0x18+0x8)++0x3
|
|
line.long 0x00 "TCNTO1,Timer 1 Count Observation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T1OBS ,Count observation value for Timer 1"
|
|
group.long 0x24++0x7 "Timer 2"
|
|
line.long 0x00 "TCNTB2,Timer 2 Count Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T2CNT ,Count buffer value for Timer 2"
|
|
line.long 0x04 "TCMPB2,Timer 2 Compare Ruffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T2COM ,Compare buffer value for Timer 2"
|
|
rgroup.long (0x24+0x8)++0x3
|
|
line.long 0x00 "TCNTO2,Timer 2 Count Observation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T2OBS ,Count observation value for Timer 2"
|
|
group.long 0x30++0x7 "Timer 3"
|
|
line.long 0x00 "TCNTB3,Timer 3 Count Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T3CNT ,Count buffer value for Timer 3"
|
|
line.long 0x04 "TCMPB3,Timer 3 Compare Ruffer Register"
|
|
hexmask.long.word 0x04 0.--15. 1. " T3COM ,Compare buffer value for Timer 3"
|
|
rgroup.long (0x30+0x8)++0x3
|
|
line.long 0x00 "TCNTO3,Timer 3 Count Observation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T3OBS ,Count observation value for Timer 3"
|
|
group.long 0x3c++0x3 "Timer 4"
|
|
line.long 0x00 "TCNTB4,Timer 4 Count Buffer Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T4CNT ,Count buffer value for Timer 4"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x00 "TCNTO4,Timer 4 Count Observation Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " T4OBS ,Count observation value for Timer 4"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.open "UART"
|
|
sif (cpu()=="S3C2410X")
|
|
tree "UART 0"
|
|
base ad:0x50000000
|
|
group 0x00++0x3
|
|
line.long 0x00 "ULCON0,UART channel 0 line control register"
|
|
bitfld.long 0x00 6. " IRDA ,Infra-Red mode" "Normal,IRDA Tx/Rx"
|
|
bitfld.long 0x00 3.--5. " PARMD ,Type of parity generation and checking during UART operations" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits used for end-of-frame signal" "One/frame,Two/frame"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Number of data bits transmitted or received per frame" "5-bits,6-bits,7-bits,8-bits"
|
|
group 0x04++0x3
|
|
line.long 0x00 "UCON0,UART channel 0 control register"
|
|
bitfld.long 0x00 10. " CLKSEL ,Select PCLK or UCLK for the UART baud rate" "PCLK,UCLK"
|
|
bitfld.long 0x00 9. " TXINTT ,Interrupt request type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXINTT ,Interrupt request type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTO ,Enable/Disable Rx time out interrupt when UART FIFO is enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Enable the UART to generate an interrupt upon an exception" "Not generated,Generated"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Break signal"
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit Mode" "Disabled,Interrupt requested,DMA0 requested,?..."
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive Mode" "Disabled,Interrupt requested,DMA0 requested,?..."
|
|
group 0x08++0x3
|
|
line.long 0x00 "UFCON0,UART channel 0 FIFO control register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Trigger level of transmit FIFO" "Empty,4-byte,8-byte,12-byte"
|
|
bitfld.long 0x00 4.--5. " RXTL ,Trigger level of receive FIFO" "4-byte,8-byte,12-byte,16-byte"
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO Reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO Reset" "Normal,Reset"
|
|
bitfld.long 0x00 0. " EN ,FIFO Enable" "Disabled,Enabled"
|
|
if (((data.long(ad:0x5000000c))&0x10)==0x0)
|
|
group 0x0c++0x3
|
|
line.long 0x00 "UMCON0,UART channel 0 Modem control register"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "Inactive,Active"
|
|
else
|
|
group 0x0c++0x3
|
|
line.long 0x00 "UMCON0,UART channel 0 Modem control register"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
endif
|
|
rgroup 0x10++0x3
|
|
line.long 0x00 "UTRSTAT0,UART channel 0 Tx/Rx status register"
|
|
bitfld.long 0x00 2. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBE ,Transmit buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RXBDR ,Receive buffer data ready" "Empty,Ready"
|
|
hgroup 0x14++0x3
|
|
hide.long 0x00 "UERSTAT0,UART channel 0 Rx error status register"
|
|
in
|
|
rgroup 0x18++0x3
|
|
line.long 0x00 "UFSTAT0,UART channel 0 FIFO status register"
|
|
bitfld.long 0x00 9. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 4.--7. 1. " TXCNT ,Number of data in Tx FIFO"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--7. 1. " RXCNT ,Number of data in Rx FIFO"
|
|
rgroup 0x1c++0x3
|
|
line.long 0x00 "UMSTAT0,UART channel 0 Modem status register"
|
|
bitfld.long 0x00 2. " DCTS ,nCTS input to the S3C2410X has changed state since last time read by CPU" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
wgroup 0x20++0x0
|
|
line.byte 0x00 "UTXH0,UART channel 0 transmit buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0"
|
|
;else
|
|
;wgroup 0x23++0x0
|
|
; line.byte 0x00 "UTXH0,UART channel 0 transmit buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0"
|
|
;endif
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
rgroup 0x24++0x0
|
|
line.byte 0x00 "URXH0,UART channel 0 receive buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Receive data for UART0"
|
|
;else
|
|
;rgroup 0x27++0x0
|
|
; line.byte 0x00 "URXH0,UART channel 0 receive buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA0 ,Receive data for UART0"
|
|
;endif
|
|
group 0x28++0x3
|
|
line.long 0x00 "UBRDIV0,Baud rate divisior register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate division value"
|
|
tree.end
|
|
tree "UART 1"
|
|
base ad:0x50004000
|
|
group 0x00++0x3
|
|
line.long 0x00 "ULCON1,UART channel 1 line control register"
|
|
bitfld.long 0x00 6. " IRDA ,Infra-Red mode" "Normal,IRDA Tx/Rx"
|
|
bitfld.long 0x00 3.--5. " PARMD ,Type of parity generation and checking during UART operations" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits used for end-of-frame signal" "One/frame,Two/frame"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Number of data bits transmitted or received per frame" "5-bits,6-bits,7-bits,8-bits"
|
|
group 0x04++0x3
|
|
line.long 0x00 "UCON1,UART channel 1 control register"
|
|
bitfld.long 0x00 10. " CLKSEL ,Select PCLK or UCLK for the UART baud rate" "PCLK,UCLK"
|
|
bitfld.long 0x00 9. " TXINTT ,Interrupt request type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXINTT ,Interrupt request type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTO ,Enable/Disable Rx time out interrupt when UART FIFO is enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Enable the UART to generate an interrupt upon an exception" "Not generated,Generated"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Break signal"
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit Mode" "Disabled,Interrupt requested,Reserved,DMA1 requested"
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive Mode" "Disabled,Interrupt requested,Reserved,DMA1 requested"
|
|
group 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART channel 1 FIFO control register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Trigger level of transmit FIFO" "Empty,4-byte,8-byte,12-byte"
|
|
bitfld.long 0x00 4.--5. " RXTL ,Trigger level of receive FIFO" "4-byte,8-byte,12-byte,16-byte"
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO Reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO Reset" "Normal,Reset"
|
|
bitfld.long 0x00 0. " EN ,FIFO Enable" "Disabled,Enabled"
|
|
if (((data.long(ad:0x5000400c))&0x10)==0x0)
|
|
group 0x0c++0x3
|
|
line.long 0x00 "UMCON1,UART channel 1 Modem control register"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RTS ,Request to Send" "Inactive,Active"
|
|
else
|
|
group 0x0c++0x3
|
|
line.long 0x00 "UMCON1,UART channel 1 Modem control register"
|
|
bitfld.long 0x00 4. " AFC ,Auto Flow Control" "Disabled,Enabled"
|
|
endif
|
|
rgroup 0x10++0x3
|
|
line.long 0x00 "UTRSTAT1,UART channel 1 Tx/Rx status register"
|
|
bitfld.long 0x00 2. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBE ,Transmit buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RXBDR ,Receive buffer data ready" "Empty,Ready"
|
|
hgroup 0x14++0x3
|
|
hide.long 0x00 "UERSTAT1,UART channel 1 Rx error status register"
|
|
in
|
|
rgroup 0x18++0x3
|
|
line.long 0x00 "UFSTAT1,UART channel 1 FIFO status register"
|
|
bitfld.long 0x00 9. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 4.--7. 1. " TXCNT ,Number of data in Tx FIFO"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--7. 1. " RXCNT ,Number of data in Rx FIFO"
|
|
rgroup 0x1c++0x3
|
|
line.long 0x00 "UMSTAT1,UART channel 1 Modem status register"
|
|
bitfld.long 0x00 2. " DCTS ,nCTS input to the S3C2410X has changed state since last time read by CPU" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
wgroup 0x20++0x0
|
|
line.byte 0x00 "UTXH1,UART channel 1 transmit buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1"
|
|
;else
|
|
;wgroup 0x23++0x0
|
|
; line.byte 0x00 "UTXH1,UART channel 1 transmit buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1"
|
|
;endif
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
rgroup 0x24++0x0
|
|
line.byte 0x00 "URXH1,UART channel 1 receive buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Receive data for UART1"
|
|
;else
|
|
;rgroup 0x27++0x0
|
|
; line.byte 0x00 "URXH1,UART channel 1 receive buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA1 ,Receive data for UART1"
|
|
;endif
|
|
group 0x28++0x3
|
|
line.long 0x00 "UBRDIV1,Baud rate divisior register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate division value"
|
|
tree.end
|
|
tree "UART 2"
|
|
base ad:0x50008000
|
|
group 0x00++0x3
|
|
line.long 0x00 "ULCON2,UART channel 2 line control register"
|
|
bitfld.long 0x00 6. " IRDA ,Infra-Red mode" "Normal,IRDA Tx/Rx"
|
|
bitfld.long 0x00 3.--5. " PARMD ,Type of parity generation and checking during UART operations" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits used for end-of-frame signal" "One/frame,Two/frame"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Number of data bits transmitted or received per frame" "5-bits,6-bits,7-bits,8-bits"
|
|
group 0x04++0x3
|
|
line.long 0x00 "UCON2,UART channel 2 control register"
|
|
bitfld.long 0x00 10. " CLKSEL ,Select PCLK or UCLK for the UART baud rate" "PCLK,UCLK"
|
|
bitfld.long 0x00 9. " TXINTT ,Interrupt request type" "Pulse,Level"
|
|
bitfld.long 0x00 8. " RXINTT ,Interrupt request type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RXTO ,Enable/Disable Rx time out interrupt when UART FIFO is enabled" "Disabled,Enabled"
|
|
bitfld.long 0x00 6. " RXESIE ,Enable the UART to generate an interrupt upon an exception" "Not generated,Generated"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback Mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 4. " SBS ,Send Break Signal" "Normal,Break signal"
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit Mode" "Disabled,Interrupt requested,DMA3 requested,?..."
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive Mode" "Disabled,Interrupt requested,DMA3 requested,?..."
|
|
group 0x08++0x3
|
|
line.long 0x00 "UFCON2,UART channel 2 FIFO control register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Trigger level of transmit FIFO" "Empty,4-byte,8-byte,12-byte"
|
|
bitfld.long 0x00 4.--5. " RXTL ,Trigger level of receive FIFO" "4-byte,8-byte,12-byte,16-byte"
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO Reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO Reset" "Normal,Reset"
|
|
bitfld.long 0x00 0. " EN ,FIFO Enable" "Disabled,Enabled"
|
|
rgroup 0x10++0x3
|
|
line.long 0x00 "UTRSTAT2,UART channel 2 Tx/Rx status register"
|
|
bitfld.long 0x00 2. " TXEMPTY ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBE ,Transmit buffer empty" "Not empty,Empty"
|
|
bitfld.long 0x00 0. " RXBDR ,Receive buffer data ready" "Empty,Ready"
|
|
hgroup 0x14++0x3
|
|
hide.long 0x00 "UERSTAT2,UART channel 2 Rx error status register"
|
|
in
|
|
rgroup 0x18++0x3
|
|
line.long 0x00 "UFSTAT2,UART channel 2 FIFO status register"
|
|
bitfld.long 0x00 9. " TXFULL ,Tx FIFO Full" "Not full,Full"
|
|
bitfld.long 0x00 8. " RXFULL ,Rx FIFO Full" "Not full,Full"
|
|
hexmask.long.byte 0x00 4.--7. 1. " TXCNT ,Number of data in Tx FIFO"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--7. 1. " RXCNT ,Number of data in Rx FIFO"
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
wgroup 0x20++0x0
|
|
line.byte 0x00 "UTXH2,UART channel 2 transmit buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2"
|
|
;else
|
|
;wgroup 0x23++0x0
|
|
; line.byte 0x00 "UTXH2,UART channel 2 transmit buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2"
|
|
;endif
|
|
;if(((data.long(ad:0x00000000))&0x0)==0x0)
|
|
rgroup 0x24++0x0
|
|
line.byte 0x00 "URXH2,UART channel 2 receive buffer register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Receive data for UART2"
|
|
;else
|
|
;rgroup 0x27++0x0
|
|
; line.byte 0x00 "URXH2,UART channel 2 receive buffer register"
|
|
; hexmask.byte.byte 0x00 0.--7. 1. " TXDATA2 ,Receive data for UART2"
|
|
;endif
|
|
group 0x28++0x3
|
|
line.long 0x00 "UBRDIV1,Baud rate divisior register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate division value"
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
tree "UART0"
|
|
base ad:0x50000000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON0,UART Channel 0 Line Control Register"
|
|
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
|
|
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON0,UART Channel 0 Control Register"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
|
|
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
|
|
else
|
|
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
|
|
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
textline " "
|
|
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON0,UART Channel 0 FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
|
|
else
|
|
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
|
|
if (((d.l(ad:(0x50000000+0xc)))&0x10)==0x00)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "UMCON0,UART Channel 0 Modem Control Register"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT0,UART Channel 0 Tx/Rx Status Register"
|
|
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT0,UART Channel 0 Rx Error Status Register"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT0,UART Channel 0 FIFO Status Register"
|
|
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "UMSTAT0,UART Channel 0 Modem Status Register"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "UTXH0,UART Channel 0 Transmit Buffer Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA0 ,Transmit data for UART0"
|
|
hgroup.byte 0x24++0x0
|
|
hide.byte 0x00 "URXH0,UART Channel 0 Receive Buffer Register"
|
|
in
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "UBRDIV0,Baud Rate Divisor Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "UDIVSLOT0,Baud Rate Divisor Divisor Register 0"
|
|
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART1"
|
|
base ad:0x50004000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON1,UART Channel 1 Line Control Register"
|
|
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
|
|
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON1,UART Channel 1 Control Register"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,EXTUARTCLK,PCLK,EPLL"
|
|
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
|
|
else
|
|
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
|
|
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
textline " "
|
|
bitfld.long 0x00 4. " SBS ,Send break" "Normal,Break"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON1,UART Channel 1 FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,8-byte,16-byte,32-byte"
|
|
else
|
|
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
|
|
endif
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
|
|
if (((d.l(ad:(0x50004000+0xc)))&0x10)==0x00)
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RTS ,Request to send" "Inactive,Active"
|
|
else
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "UMCON1,UART Channel 1 Modem Control Register"
|
|
bitfld.long 0x00 5.--7. " RTSTL ,RTS trigger level" "63 bytes,56 bytes,48 bytes,40 bytes,32 bytes,24 bytes,16 bytes,8 bytes"
|
|
bitfld.long 0x00 4. " AFC ,Auto flow control" "Disabled,Enabled"
|
|
textline " "
|
|
endif
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT1,UART Channel 1 Tx/Rx Status Register"
|
|
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT1,UART Channel 1 Rx Error Status Register"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT1,UART Channel 1 FIFO Status Register"
|
|
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "UMSTAT1,UART Channel 1 Modem Status Register"
|
|
bitfld.long 0x00 4. " DCTS ,Delta CTS" "Not changed,Changed"
|
|
bitfld.long 0x00 0. " CTS ,Clear to Send" "Not activated,Activated"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "UTXH1,UART Channel 1 Transmit Buffer Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA1 ,Transmit data for UART1"
|
|
hgroup.byte 0x24++0x0
|
|
hide.byte 0x00 "URXH1,UART Channel 1 Receive Buffer Register"
|
|
in
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "UBRDIV1,Baud Rate Divisor Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "UDIVSLOT1,Baud Rate Divisor Divisor Register 1"
|
|
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
|
|
width 0xb
|
|
tree.end
|
|
tree "UART2"
|
|
base ad:0x50008000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ULCON2,UART Channel 2 Line Control Register"
|
|
bitfld.long 0x00 6. " IRDA ,IRDA mode" "Normal,IRDA"
|
|
bitfld.long 0x00 3.--5. " PA ,Parity mode" "No parity,No parity,No parity,No parity,Odd,Even,Forced/checked as 1,Forced/checked as 0"
|
|
textline " "
|
|
bitfld.long 0x00 2. " STOP ,Number of stop bits" "1/frame,2/frame"
|
|
bitfld.long 0x00 0.--1. " WORDLEN ,Word length" "5 bits,6 bits,7 bits,8 bits"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "UCON2,UART Channel 2 Control Register"
|
|
bitfld.long 0x00 10.--11. " CLKSEL ,Clock selection" "PCLK,UEXTCLK,PCLK,UARTCLK"
|
|
bitfld.long 0x00 9. " TXINTTYP ,Tx interrupt type" "Pulse,Level"
|
|
textline " "
|
|
bitfld.long 0x00 8. " RXINTTYP ,Rx interrupt type" "Pulse,Level"
|
|
bitfld.long 0x00 7. " RXTIMEN ,Rx time out enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXESIE ,Rx error status interrupt enable" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 5. " LOOPMD ,Loopback mode" "Normal,Loopback"
|
|
textline " "
|
|
bitfld.long 0x00 2.--3. " TXMD ,Transmit mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
bitfld.long 0x00 0.--1. " RXMD ,Receive mode" "Disabled,Interrupt requested,DMA requested (0),DMA requested (1)"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "UFCON2,UART Channel 2 FIFO Control Register"
|
|
bitfld.long 0x00 6.--7. " TXTL ,Tx FIFO trigger level" "Empty,16-byte,32-byte,48-byte"
|
|
bitfld.long 0x00 4.--5. " RXTL ,Rx FIFO trigger level" "1-byte,16-byte,32-byte,48-byte"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXRST ,Tx FIFO reset" "Normal,Reset"
|
|
bitfld.long 0x00 1. " RXRST ,Rx FIFO reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,FIFO enable" "Disabled,Enabled"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x00 "UTRSTAT2,UART Channel 2 Tx/Rx Status Register"
|
|
bitfld.long 0x00 2. " TXE ,Transmitter empty" "Not empty,Empty"
|
|
bitfld.long 0x00 1. " TXBUFE ,Transmitter buffer empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 0. " RXBUFDR ,Receive buffer data ready" "Not ready,Ready"
|
|
hgroup.long 0x14++0x3
|
|
hide.long 0x00 "UERSTAT2,UART Channel 2 Rx Error Status Register"
|
|
in
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "UFSTAT2,UART Channel 2 FIFO Status Register"
|
|
bitfld.long 0x00 14. " TXFULL ,Tx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 8.--13. 1. " TXCNT ,Tx FIFO count"
|
|
textline " "
|
|
bitfld.long 0x00 6. " RXFULL ,Rx FIFO full" "Not full,Full"
|
|
hexmask.long.byte 0x00 0.--5. 1. " RXCNT ,Rx FIFO count"
|
|
wgroup.byte 0x20++0x0
|
|
line.byte 0x00 "UTXH2,UART Channel 2 Transmit Buffer Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TXDATA2 ,Transmit data for UART2"
|
|
hgroup.byte 0x24++0x0
|
|
hide.byte 0x00 "URXH2,UART Channel 2 Receive Buffer Register"
|
|
in
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "UBRDIV2,Baud Rate Divisor Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " UBRDIV ,Baud rate divisor value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "UDIVSLOT2,Baud Rate Divisor Divisor Register 2"
|
|
hexmask.long.word 0x00 0.--15. 1. " UDIVSLOT ,Select slot where clock generator divide clock source"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree.open "USB"
|
|
sif (cpu()=="S3C2410X")
|
|
tree "USB Host Controller"
|
|
base ad:0x49000000
|
|
width 20.
|
|
group 0x00++0x17 "Control and status group"
|
|
line.long 0x00 "HCREVISION,HcRevision"
|
|
line.long 0x04 "HCCONTROL,HcControl"
|
|
line.long 0x08 "HCCOMMONSTATUS,HcCommonStatus"
|
|
line.long 0x0c "HCINTERRUPTSTATUS,HcInterruptStatus"
|
|
line.long 0x10 "HCINTERRUPTENABLE,HcInterruptEnable"
|
|
line.long 0x14 "HCINTERRUPTDISABLE,HcInterruptDisable"
|
|
group 0x18++0x1b "Memory pointer group"
|
|
line.long 0x00 "HCHCCA,HcHCCA"
|
|
line.long 0x04 "HCPERIODCURRENTED,HcPeriodCurrentED"
|
|
line.long 0x08 "HCCONTROLHEADED,HcControlHeadED"
|
|
line.long 0x0c "HCCONTROLCURRENTED,HcControlCurrentED"
|
|
line.long 0x10 "HCBULKHEADED,HcBulkHeadED"
|
|
line.long 0x14 "HCBULKCURRENTED,HcBulkCurrentED"
|
|
line.long 0x18 "HCDONEHEAD,HcDoneHead"
|
|
group 0x34++0x13 "Frame counter group"
|
|
line.long 0x00 "HCRMINTERVAL,HcRmInterval"
|
|
line.long 0x04 "HCFMREMAINING,HcFmRemaining"
|
|
line.long 0x08 "HCFMNUMBER,HcFmNumber"
|
|
line.long 0x0c "HCPERIODICSTART,HcPeriodicStart"
|
|
line.long 0x10 "HCLSTHRESHOLD,HcLSThreshold"
|
|
group 0x48++0x13 "Root hub group"
|
|
line.long 0x00 "HCRHDESCRIPTORA,HcRhDescriptorA"
|
|
line.long 0x04 "HCRHDESCRIPTORB,HcRhDescriptorB"
|
|
line.long 0x08 "HCRHSTATUS,HcRhStatus"
|
|
line.long 0x0c "HCRHPORTSTATUS1,HcRhPortStatus1"
|
|
line.long 0x10 "HCRHPORTSTATUS2,HcRhPortStatus2"
|
|
tree.end
|
|
tree "USB Device Controller"
|
|
base ad:0x52000000
|
|
width 19.
|
|
group.byte 0x140++0x0
|
|
line.byte 0x00 "FUNC_ADDR_REG,Function address register"
|
|
bitfld.byte 0x00 07. " ADDR_UPDATE ,FUNCTION_ADDR update" "Not updated,Updated"
|
|
hexmask.byte 0x00 00.--06. 1. " FUNCTION_ADDR ,Unique address assigned by host"
|
|
group.byte 0x144++0x0
|
|
line.byte 0x00 "PWR_REG,Power management register"
|
|
bitfld.byte 0x00 07. " ISO_UPDATE ,ISO update" "Not updated,Updated"
|
|
bitfld.byte 0x00 03. " USB_RESET ,USB Reset" "Mo reset,Reset"
|
|
textline " "
|
|
bitfld.byte 0x00 02. " MCU_RESUME ,MCU resume signal" "Not sent,Sent"
|
|
bitfld.byte 0x00 01. " SUSPEND_MODE ,Suspend mode on/off" "On,Off"
|
|
textline " "
|
|
bitfld.byte 0x00 00. " SUSPEND_EN ,Suspend mode enable control bit" "Disabled,Enabled"
|
|
group.byte 0x148++0x0
|
|
line.byte 0x00 "EP_INT_REG,EP interrupt pending/clear register"
|
|
eventfld.byte 0x00 04. " EP4INT ,Endpoint 4 interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x00 03. " EP3INT ,Endpoint 3 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x00 02. " EP2INT ,Endpoint 2 interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x00 01. " EP1INT ,Endpoint 1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x00 00. " EP0INT ,Endpoint 0 interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x158++0x0
|
|
line.byte 0x00 "USB_INT_REG,USB interrupt register"
|
|
bitfld.byte 0x00 02. " RESET_INT ,RESET Interrupt" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 01. " RESUME_INT ,RESUME Interrupt" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 00. " SUSP_INT ,SUSPEND Interrupt" "Not occurred,Occurred"
|
|
group.byte 0x15c++0x0
|
|
line.byte 0x00 "EP_INT_EN_REG,Endpoint interrupt enable register"
|
|
bitfld.byte 0x00 04. " EP4_INT_EN ,EP4 Interrupt Enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 03. " EP3_INT_EN ,EP3 Interrupt Enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 02. " EP2_INT_EN ,EP2 Interrupt Enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 01. " EP1_INT_EN ,EP1 Interrupt Enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 00. " EP0_INT_EN ,EP0 Interrupt Enable bit" "Disabled,Enabled"
|
|
group.byte 0x16c++0x0
|
|
line.byte 0x00 "USB_INT_EN_REG,USB Interrupt enable register"
|
|
bitfld.byte 0x00 02. " RESET_INT_EN ,Reset interrupt enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 00. " SUSPEND_INT_EN ,Suspend interrupt enable bit" "Disabled,Enabled"
|
|
rgroup.byte 0x170++0x0
|
|
line.byte 0x00 "FRAME_NUM1_REG,Frame number 1 register"
|
|
hexmask.byte 0x00 0.--7. 1. " FRAME_NUM1 ,Frame number lower byte value"
|
|
group.byte 0x174++0x0
|
|
line.byte 0x00 "FRAME_NUM2_REG,Frame number 2 register"
|
|
hexmask.byte 0x00 0.--7. 1. " FRAME_NUM2 ,Frame number higher byte value"
|
|
group.byte 0x178++0x0
|
|
line.byte 0x00 "INDEX_REG,Index register"
|
|
hexmask.byte 0x00 0.--7. 1. " INDEX ,Indicate a certain endpoint"
|
|
group.byte 0x1c0++0x0
|
|
line.byte 0x00 "EP0_FIFO_REG,Endpoint0 FIFO register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1c4++0x0
|
|
line.byte 0x00 "EP1_FIFO_REG,Endpoint1 FIFO register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1c8++0x0
|
|
line.byte 0x00 "EP2_FIFO_REG,Endpoint2 FIFO register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1cc++0x0
|
|
line.byte 0x00 "EP3_FIFO_REG,Endpoint3 FIFO register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1d0++0x0
|
|
line.byte 0x00 "EP4_FIFO_REG,Endpoint4 FIFO register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x200++0x0
|
|
line.byte 0x00 "EP1_DMA_CON,EP1 DMA interface control register"
|
|
bitfld.byte 0x00 07. " IN_RUN_OB ,IN_DMA_Run Observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running"
|
|
hexmask.byte 0x00 04.--06. 1. " STATE ,DMA State Monitoring"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DEMAND_MODE ,DMA Demand mode enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 02. " OUT_RUN_OB/OUT_DMA_RUN ,Functionally separated into write and read operation (read)/(write)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 01. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 00. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte 0x204++0x0
|
|
line.byte 0x00 "EP1_DMA_UNIT,EP1 DMA transfer unit counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte 0x208++0x0
|
|
line.byte 0x00 "EP1_DMA_FIFO,EP1 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte 0x20c++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_L0,EP1 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte 0x210++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_MD,EP1 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte 0x214++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_HI,EP1 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x218++0x0
|
|
line.byte 0x00 "EP2_DMA_CON,EP2 DMA interface control register"
|
|
bitfld.byte 0x00 07. " IN_RUN_OB ,IN_DMA_Run Observation (read) / Ignore EP2_DMA_TTC_2 register (write)" "Stopped,Running"
|
|
hexmask.byte 0x00 04.--06. 1. " STATE ,DMA State Monitoring"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DEMAND_MODE ,DMA Demand mode enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 02. " OUT_RUN_OB/OUT_DMA_RUN ,Functionally separated into write and read operation (read)/(write)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 01. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 00. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte 0x21c++0x0
|
|
line.byte 0x00 "EP2_DMA_UNIT,EP2 DMA transfer unit counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte 0x220++0x0
|
|
line.byte 0x00 "EP2_DMA_FIFO,EP2 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte 0x224++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_LO,EP2 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte 0x228++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_MD,EP2 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte 0x22c++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_HI,EP2 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x240++0x0
|
|
line.byte 0x00 "EP3_DMA_CON,EP3 DMA interface control register"
|
|
bitfld.byte 0x00 07. " IN_RUN_OB ,IN_DMA_Run Observation (read) / Ignore EP3_DMA_TTC_3 register (write)" "Stopped,Running"
|
|
hexmask.byte 0x00 04.--06. 1. " STATE ,DMA State Monitoring"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DEMAND_MODE ,DMA Demand mode enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 02. " OUT_RUN_OB/OUT_DMA_RUN ,Functionally separated into write and read operation (read)/(write)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 01. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 00. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte 0x244++0x0
|
|
line.byte 0x00 "EP3_DMA_UNIT,EP3 DMA transfer unit counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte 0x248++0x0
|
|
line.byte 0x00 "EP3_DMA_FIFO,EP3 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte 0x24c++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_LO,EP3 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte 0x250++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_MD,EP3 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte 0x254++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_HI,EP3 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x258++0x0
|
|
line.byte 0x00 "EP4_DMA_CON,EP4 DMA interface control register"
|
|
bitfld.byte 0x00 07. " IN_RUN_OB ,IN_DMA_Run Observation (read) / Ignore EP4_DMA_TTC_4 register (write)" "Stopped,Running"
|
|
hexmask.byte 0x00 04.--06. 1. " STATE ,DMA State Monitoring"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DEMAND_MODE ,DMA Demand mode enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 02. " OUT_RUN_OB/OUT_DMA_RUN ,Functionally separated into write and read operation (read)/(write)" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 01. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 00. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte 0x25c++0x0
|
|
line.byte 0x00 "EP4_DMA_UNIT,EP4 DMA transfer unit counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte 0x260++0x0
|
|
line.byte 0x00 "EP4_DMA_FIFO,EP4 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte 0x264++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_L,EP4 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte 0x268++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_M,EP4 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte 0x26c++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_H,EP4 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x18c++0x0
|
|
line.byte 0x00 "MAXP_REG,Endpoint MAX packet register"
|
|
bitfld.byte 0x00 00.--03. " MAXP ,MAX packet size" "Reserved,8 Byte,16 Byte,Reserved,32 Byte,Reserved,Reserved,Reserved,64 Byte,?..."
|
|
if (((data.byte(ad:0x52000178))&0xff)==0x0)
|
|
group.byte 0x184++0x0
|
|
line.byte 0x00 "EP0_CSR,Endpoint 0 status register"
|
|
bitfld.byte 0x00 07. " SERVICED_SETUP_END ,SETUP_END clear bit" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 06. " SERVICED_OUT_PKT_RDY ,OUT_PKT_RDY clear bit" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 05. " SEND_STALL ,STALL condition" "Finished,Not finished"
|
|
bitfld.byte 0x00 04. " SETUP_END ,Control transfer ends before DATA_END set" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DATA_END ,End of data" "No data end,Data end"
|
|
bitfld.byte 0x00 02. " SENT_STALL ,Control transaction is stopped due to a protocol violation" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 01. " IN_PKT_RDY ,Packet of data written into EP0 FIFO" "Not written,Written"
|
|
bitfld.byte 0x00 00. " OUT_PKT_RDY ,Valid token written to the FIFO" "Not written,Written"
|
|
else
|
|
group.byte 0x184++0x0
|
|
line.byte 0x00 "IN_CSR1_REG,IN END POINT control status register 1"
|
|
bitfld.byte 0x00 06. " CLR_DATA_TOGGLE ," "DATA0/1,DATA0"
|
|
bitfld.byte 0x00 05. " SENT_STALL ,IN token issues a STALL handshake" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.byte 0x00 04. " SEND_STALL ,STALL condition" "Finished,Not finished"
|
|
bitfld.byte 0x00 03. " FIFO_FLUSH ,Packet in Input-related FIFO flush" "Flushed,Not flushed"
|
|
textline " "
|
|
bitfld.byte 0x00 02. " UNDER_RUN ,Underrun" "No underrun,underrun"
|
|
bitfld.byte 0x00 00. " IN_PKT_RDY ,Packet of data written into the FIFO" "Not written,Written"
|
|
endif
|
|
group.byte 0x188++0x0
|
|
line.byte 0x00 "IN_CSR2_REG,IN END POINT control status register 2"
|
|
bitfld.byte 0x00 07. " AUTO_SET ,MAXP data written" "Not written,Written"
|
|
bitfld.byte 0x00 06. " ISO ,Used only for endpoints whose transfer type is programmable" "Bulk mode,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 05. " MODE_IN ,Used only for endpoints whose direction is programmable" "In,Out"
|
|
bitfld.byte 0x00 04. " IN_DMA_INT_EN ,Interrupt when EP1 IN_PKT_RDY condition happens" "Enabled,Disabled"
|
|
group.byte 0x190++0x0
|
|
line.byte 0x00 "OUT_CSR1_REG,EP out control status register 1"
|
|
bitfld.byte 0x00 07. " CLR_DATA_TOGGLE ,Data toggle sequence bit is reset to DATA0" "No reset,Reset"
|
|
bitfld.byte 0x00 06. " SENT_STALL ,OUT token is ended with a STALL handshake" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.byte 0x00 05. " SEND_STALL ,STALL condition handshake" "Not ended,Ended"
|
|
bitfld.byte 0x00 04. " FIFO_FLUSH ,FIFO flush" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.byte 0x00 03. " DATA_ERROR ,Data packet due to be unloaded by the MCU has an error" "No error,Error"
|
|
bitfld.byte 0x00 02. " OVER_RUN ,Core ability to load an OUT ISO token into FIFO" "Able,Not able"
|
|
textline " "
|
|
bitfld.byte 0x00 00. " OUT_PKT_RDY ,Packet of data loaded into the FIFO" "Not loaded,Loaded"
|
|
group.byte 0x194++0x0
|
|
line.byte 0x00 "OUT_CSR2_REG,End Point out control status register 2"
|
|
bitfld.byte 0x00 07. " AUTO_CLR ,MCU reads data from the OUT FIFO" "Not read,Read"
|
|
bitfld.byte 0x00 06. " ISO ,Determine endpoint transfer type" "Bulk mode,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 05. " OUT_DMA_INT_MASK ,Determine whether the interrupt should be issued or not" "Enabled,Disabled"
|
|
rgroup.byte 0x198++0x0
|
|
line.byte 0x00 "OUT_FIFO_CNT1_REG,End Point out write count register 1"
|
|
hexmask.byte 0x00 0.--7. 1. " OUT_CNT_LOW ,Lower byte of write count"
|
|
rgroup.byte 0x19c++0x0
|
|
line.byte 0x00 "OUT_FIFO_CNT2_REG,End Point out write count register 2"
|
|
hexmask.byte 0x00 0.--7. 1. " OUT_CNT_HIGH ,Higher byte of write count"
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
tree "USB Host Controller"
|
|
base ad:0x49000000
|
|
width 22.
|
|
rgroup.long 0x00++0x3 "Control And Status Group"
|
|
line.long 0x0 "HcRevision,BCD Representation Of The Version Of The HCI Specification Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. " REV ,BCD Representation Of The Version Of The HCI Specification"
|
|
group.long 0x04++0x13
|
|
line.long 0x0 "HcControl,HC Operating Modes Register"
|
|
bitfld.long 0x0 10. " RWE ,Remote Wakeup Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 9. " RWC ,Remote Wakeup Connected" "Not connected,Connected"
|
|
textline " "
|
|
bitfld.long 0x0 8. " IR ,Interrupt Routing" "Normal host bus,System Management"
|
|
bitfld.long 0x0 6.--7. " HCFS ,Host Controller Functional State for USB" "Reset,Resume,Operational,Suspend"
|
|
textline " "
|
|
bitfld.long 0x0 5. " BLE ,Bulk List Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 4. " CLE ,Control List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 3. " IE ,Isochronous Enable" "Disabled,Enabled"
|
|
bitfld.long 0x0 2. " PLE ,Periodic List Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x0 0.--1. " CBSR ,Control Bulk Service Ratio" "1:1,2:1,3:1,4:1"
|
|
line.long 0x4 "HcCommandStatus,HC Status Register"
|
|
bitfld.long 0x4 16.--17. " SOC ,Scheduling Overrun Count" "0,1,2,3"
|
|
bitfld.long 0x4 3. " OCR ,Ownership Change Request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x4 2. " BLF ,Bulk List Filled" "Not filled,Filled"
|
|
bitfld.long 0x4 1. " CLF ,Control List Filled" "Not filled,Filled"
|
|
textline " "
|
|
bitfld.long 0x4 0. " HCR ,Host Controller Reset" "No effect,Reset"
|
|
line.long 0x8 "HcInterruptStatus,HC Interrupt Status Register"
|
|
bitfld.long 0x8 30. " OC ,Ownership Change" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 6. " RHSC ,Root Hub Status Change" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 5. " FNO ,Frame Number Overflow" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 4. " UE ,Unrecoverable Error" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 3. " RD ,Resume Detected" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 2. " SF ,Start of Frame" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x8 1. " WDH ,Writeback Done Head" "No interrupt,Interrupt"
|
|
bitfld.long 0x8 0. " SO ,Scheduling Overrun" "No interrupt,Interrupt"
|
|
line.long 0xC "HcInterruptEn/Dis,HC Interrupt Enable/Disable Register"
|
|
setclrfld.long 0xC 31. 0xC 31. 0x10 31. " MIE_set/clr ,Master Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 30. 0xC 30. 0x10 30. " OCMIE_set/clr ,Ownership Change" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 6. 0xC 6. 0x10 6. " RHSCMIE_set/clr ,Root Hub Status Change" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 5. 0xC 5. 0x10 5. " FNOMIE_set/clr ,Frame Number Overflow" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 4. 0xC 4. 0x10 4. " UEMIE_set/clr ,Unrecoverable Error" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 3. 0xC 3. 0x10 3. " RDMIE_set/clr ,Resume Detected" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 2. 0xC 2. 0x10 2. " SFMIE_set/clr ,Start of Frame" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 1. 0xC 1. 0x10 1. " WDHMIE_set/clr ,Writeback Done Head" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0xC 0. 0xC 0. 0x10 0. " SOMIE_set/clr ,Scheduling Overrun" "Disabled,Enabled"
|
|
group.long 0x18++0x3 "Memory Pointer Group"
|
|
line.long 0x0 "HcHCCA,Host Controller Communication Area Physical Address Register"
|
|
hexmask.long 0x0 8.--31. 0x100 " HCCA ,Host Controller Communication Area Base Address"
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "HcPeriodCurrentED,Current Isochronous Or Interrupt Endpoint Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " PCED ,Period Current ED"
|
|
group.long 0x20++0xF
|
|
line.long 0x0 "HcControlHeadED,First Endpoint Of The Control List Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " CHED ,Control Head ED"
|
|
line.long 0x4 "HcControlCurrentED,Current Endpoint Of The Control List Physical Address Register"
|
|
hexmask.long 0x4 4.--31. 0x10 " CCED ,Control Current ED"
|
|
line.long 0x8 "HcBulkHeadED,First Endpoint Of The Bulk List Physical Address Register"
|
|
hexmask.long 0x8 4.--31. 0x10 " BHED ,Bulk Head ED"
|
|
line.long 0xC "HcBulkCurrentED,Current Endpoint Of The Bulk List Physical Address Register"
|
|
hexmask.long 0xC 4.--31. 0x10 " BCED ,Bulk Current ED"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "HcDoneHead,Last Transfer Descriptor Added Physical Address Register"
|
|
hexmask.long 0x0 4.--31. 0x10 " DH ,Done Head"
|
|
group.long 0x34++0x3 "Frame Counter Group"
|
|
line.long 0x0 "HcFmInterval,HC Frame Interval Register"
|
|
bitfld.long 0x0 31. " FIT ,Frame Interval Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x0 16.--30. 1. " FSMPS ,FS Largest Data Packet"
|
|
hexmask.long.word 0x0 0.--13. 1. " FI ,Frame Interval"
|
|
rgroup.long 0x38++0x7
|
|
line.long 0x0 "HcFmRemaining,HC Frame Remaining Register"
|
|
bitfld.long 0x0 31. " FRT ,Frame Remaining Toggle" "Not toggled,Toggled"
|
|
hexmask.long.word 0x0 0.--13. 1. " FR ,Frame Remaining"
|
|
line.long 0x4 "HcFmNumber,HC Frame Number Register"
|
|
hexmask.long.word 0x4 0.--15. 1. " FN ,Frame Number"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "HcPeriodicStart,HC Periodic Start Register"
|
|
hexmask.long.word 0x0 0.--13. 1. " PS ,Periodic Start"
|
|
line.long 0x4 "HcLSThreshold,HC LS Threshold Register"
|
|
hexmask.long.word 0x4 0.--11. 1. " LST ,LS Threshold"
|
|
group.long 0x48++0x13 "Root Hub Group"
|
|
line.long 0x0 "HcRhDescriptorA,HC Root Hub Descriptor A Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,Power On To Power Good Time"
|
|
bitfld.long 0x0 12. " NOCP ,No Over Current Protection" "Protection,No protection"
|
|
textline " "
|
|
bitfld.long 0x0 11. " OCPM ,Over Current Protection Mode" "Collectively,Per-port basis"
|
|
bitfld.long 0x0 10. " DT ,Device Type" "Not compound,Compound"
|
|
textline " "
|
|
bitfld.long 0x0 9. " PSM ,Power Switching Mode" "Global,Individual"
|
|
bitfld.long 0x0 8. " NPS ,No Power Switching" "Switched,Not switched"
|
|
textline " "
|
|
hexmask.long.byte 0x0 0.--7. 1. " NDP ,Number Downstream Ports"
|
|
line.long 0x4 "HcRhDescriptorB,HC Root Hub Descriptor B Register"
|
|
hexmask.long.word 0x4 16.--31. 1. " PPCM ,Port Power Control Mask"
|
|
hexmask.long.word 0x4 0.--15. 1. " DR ,Device Removable"
|
|
line.long 0x8 "HcRhStatus,HC Root Hub Status Register"
|
|
bitfld.long 0x8 31. " CRWE ,Clear Remote Wakeup Enable" "No effect,Cleared"
|
|
textline " "
|
|
eventfld.long 0x8 17. " OCIC ,Over Current Indicator Change" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x8 16. " LPSC ,Local Power Status Change/Set Global Power (read/write)" "Not supported/No effect,Not supported/Turn power on"
|
|
textline " "
|
|
bitfld.long 0x8 15. " DRWE ,Device Remote Wakeup Enable/Set Remote Wakeup Enable (read/write)" "No wakeup/No effect,Wakeup/Set"
|
|
textline " "
|
|
bitfld.long 0x8 1. " OCI ,OverCurrent Indicator" "No overcurrent,Overcurrent"
|
|
textline " "
|
|
bitfld.long 0x8 0. " LPS ,Local Power Status/Clear Global Power (read/write)" "Not supported/No effect,Not supported/Turn power off"
|
|
line.long 0xc "HcRhPortStatus[1],HC Root Hub Port Status 1 Register"
|
|
eventfld.long 0xc 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0xc 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0xc 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0xc 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0xc 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0xc 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
|
|
textline " "
|
|
bitfld.long 0xc 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
|
|
textline " "
|
|
bitfld.long 0xc 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0xc 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
|
|
textline " "
|
|
bitfld.long 0xc 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
|
|
textline " "
|
|
bitfld.long 0xc 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
|
|
textline " "
|
|
bitfld.long 0xc 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
|
|
line.long 0x10 "HcRhPortStatus[2],HC Root Hub Port Status 2 Register"
|
|
eventfld.long 0x10 20. " PRSC ,Port Reset Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x10 19. " OCIC ,Port Over Current Indicator Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x10 18. " PSSC ,Port Suspend Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x10 17. " PESC ,Port Enable Status Change" "Not changed,Changed"
|
|
textline " "
|
|
eventfld.long 0x10 16. " CSC ,Connect Status Change" "Not changed,Changed"
|
|
textline " "
|
|
bitfld.long 0x10 9. " LSDA ,Low Speed Device Attached/Clear Port Power (read/write)" "Full speed/No effect,Low speed/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 8. " PPS ,Port Power Status/Set Port Power (read/write)" "Off/No effect,On/Set"
|
|
textline " "
|
|
bitfld.long 0x10 4. " PRS ,Port Reset Status/Set Port Reset (read/write)" "Inactive/No effect,Active/Set"
|
|
textline " "
|
|
bitfld.long 0x10 3. " POCI ,Port Over Current Indicator/Clear Suspend Status (read/write)" "No overcurrent/No effect,Overcurrent/Clear"
|
|
textline " "
|
|
bitfld.long 0x10 2. " PSS ,Port Suspend Status/Set Port Suspend (read/write)" "Not suspended/No effect,Suspended/Set"
|
|
textline " "
|
|
bitfld.long 0x10 1. " PES ,Port Enable Status/Set Port Enable (read/write)" "Disabled/No effect,Enabled/Set"
|
|
textline " "
|
|
bitfld.long 0x10 0. " CCS ,Current Connect Status/Clear Port Enable (read/write)" "Not connected/No effect,Connected/Clear"
|
|
rgroup.long 0xFC++0x3
|
|
line.long 0x0 "Module_ID/Ver_Rev_ID,Module Version And Reversion ID Register"
|
|
width 0x0B
|
|
tree.end
|
|
tree "USB Device Controller"
|
|
base ad:0x52000000
|
|
width 20.
|
|
group.byte 0x140++0x0
|
|
line.byte 0x00 "FUNC_ADDR_REG,Function Address Register"
|
|
bitfld.byte 0x00 7. " ADDR_UPDATE ,FUNCTION_ADDR update" "Not updated,Updated"
|
|
hexmask.byte 0x00 0.--6. 1. " FUNCTION_ADDR ,Unique address assigned by host"
|
|
group.byte 0x144++0x0
|
|
line.byte 0x00 "PWR_REG,Power Management Register"
|
|
bitfld.byte 0x00 3. " USB_RESET ,USB Reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " MCU_RESUME ,MCU resume signal" "Not sent,Sent"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " SUSPEND_MODE ,Suspend mode on/off" "On,Off"
|
|
bitfld.byte 0x00 0. " SUSPEND_EN ,Suspend mode enable control" "Disabled,Enabled"
|
|
group.byte 0x148++0x0
|
|
line.byte 0x00 "EP_INT_REG,EP Interrupt Pending/Clear Register"
|
|
eventfld.byte 0x00 4. " EP4INT ,Endpoint 4 interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x00 3. " EP3INT ,Endpoint 3 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x00 2. " EP2INT ,Endpoint 2 interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x00 1. " EP1INT ,Endpoint 1 interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x00 0. " EP0INT ,Endpoint 0 interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x158++0x0
|
|
line.byte 0x00 "USB_INT_REG,USB Interrupt Pending/Clear Register"
|
|
eventfld.byte 0x00 2. " RESET_INT ,RESET interrupt" "No interrupt,Interrupt"
|
|
eventfld.byte 0x00 1. " RESUME_INT ,RESUME interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
eventfld.byte 0x00 0. " SUSP_INT ,SUSPEND interrupt" "No interrupt,Interrupt"
|
|
group.byte 0x15c++0x0
|
|
line.byte 0x00 "EP_INT_EN_REG,Endpoint Interrupt Enable Register"
|
|
bitfld.byte 0x00 4. " EP4_INT_EN ,EP4 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " EP3_INT_EN ,EP3 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 2. " EP2_INT_EN ,EP2 interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 1. " EP1_INT_EN ,EP1 interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " EP0_INT_EN ,EP0 interrupt enable" "Disabled,Enabled"
|
|
group.byte 0x16c++0x0
|
|
line.byte 0x00 "USB_INT_EN_REG,USB Interrupt Enable Register"
|
|
bitfld.byte 0x00 2. " RESET_INT_EN ,Reset interrupt enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SUSPEND_INT_EN ,Suspend interrupt enable" "Disabled,Enabled"
|
|
rgroup.byte 0x170++0x0
|
|
line.byte 0x00 "FRAME_NUM1_REG,Frame number 1 register"
|
|
hexmask.byte 0x00 0.--7. 1. " FRAME_NUM1 ,Frame number lower byte value"
|
|
rgroup.byte 0x174++0x0
|
|
line.byte 0x00 "FRAME_NUM2_REG,Frame number 2 register"
|
|
hexmask.byte 0x00 0.--7. 1. " FRAME_NUM2 ,Frame number higher byte value"
|
|
group.byte 0x178++0x0
|
|
line.byte 0x00 "INDEX_REG,Index Register"
|
|
hexmask.byte 0x00 0.--7. 1. " INDEX ,Indicate a certain endpoint"
|
|
if (((d.b(ad:(0x52000000+0x178)))&0xff)==0x00)
|
|
group.byte 0x184++0x0
|
|
line.byte 0x00 "EP0_CSR,Endpoint 0 Status Register"
|
|
bitfld.byte 0x00 7. " SERVICED_SETUP_END ,SETUP_END clear bit" "Not cleared,Cleared"
|
|
bitfld.byte 0x00 6. " SERVICED_OUT_PKT_RDY ,OUT_PKT_RDY clear bit" "Not cleared,Cleared"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " SEND_STALL ,STALL condition" "Finished,Not finished"
|
|
bitfld.byte 0x00 4. " SETUP_END ,Control transfer ends before DATA_END set" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DATA_END ,End of data" "No data end,Data end"
|
|
bitfld.byte 0x00 2. " SENT_STALL ,Control transaction is stopped due to a protocol violation" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IN_PKT_RDY ,Packet of data written into EP0 FIFO" "Not written,Written"
|
|
bitfld.byte 0x00 0. " OUT_PKT_RDY ,Valid token written to the FIFO" "Not written,Written"
|
|
else
|
|
group.byte 0x184++0x0
|
|
line.byte 0x00 "IN_CSR1_REG,IN Endpoint control status register 1"
|
|
bitfld.byte 0x00 6. " CLR_DATA_TOGGLE ,Data Toggle" "DATA0/1,DATA0"
|
|
bitfld.byte 0x00 5. " SENT_STALL ,IN token issues a STALL handshake" "Not issued,Issued"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " SEND_STALL ,STALL condition" "Finished,Not finished"
|
|
bitfld.byte 0x00 3. " FIFO_FLUSH ,Packet in Input-related FIFO flush" "Flushed,Not flushed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " IN_PKT_RDY ,Packet of data written into the FIFO" "Not written,Written"
|
|
endif
|
|
group.byte 0x188++0x0
|
|
line.byte 0x00 "IN_CSR2_REG,IN Endpoint control status register 2"
|
|
bitfld.byte 0x00 7. " AUTO_SET ,MAXP data written" "Not written,Written"
|
|
bitfld.byte 0x00 6. " ISO ,Used only for endpoints whose transfer type is programmable" "Bulk mode,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 5. " MODE_IN ,Used only for endpoints whose direction is programmable" "Out,In"
|
|
bitfld.byte 0x00 4. " IN_DMA_INT_EN ,Interrupt when EP1 IN_PKT_RDY condition happens" "Enabled,Disabled"
|
|
group.byte 0x190++0x0
|
|
line.byte 0x00 "OUT_CSR1_REG,EP Out Control Status Register 1"
|
|
bitfld.byte 0x00 7. " CLR_DATA_TOGGLE ,Data toggle sequence bit is reset to DATA0" "No reset,Reset"
|
|
bitfld.byte 0x00 6. " SENT_STALL ,OUT token is ended with a STALL handshake" "Not ended,Ended"
|
|
textline " "
|
|
bitfld.byte 0x00 5. " SEND_STALL ,STALL condition handshake" "Ended,Not ended"
|
|
bitfld.byte 0x00 4. " FIFO_FLUSH ,FIFO flush" "Not flushed,Flushed"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " OUT_PKT_RDY ,Packet of data loaded into the FIFO" "Not loaded,Loaded"
|
|
group.byte 0x194++0x0
|
|
line.byte 0x00 "OUT_CSR2_REG,Endpoint Out Control Status Register 2"
|
|
bitfld.byte 0x00 7. " AUTO_CLR ,MCU reads data from the OUT FIFO" "Not read,Read"
|
|
bitfld.byte 0x00 6. " ISO ,Determine endpoint transfer type" "Bulk mode,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 5. " OUT_DMA_INT_MASK ,Determine whether the interrupt should be issued or not" "Enabled,Disabled"
|
|
group.byte 0x1c0++0x0
|
|
line.byte 0x00 "EP0_FIFO_REG,Endpoint0 FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1c4++0x0
|
|
line.byte 0x00 "EP1_FIFO_REG,Endpoint1 FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1c8++0x0
|
|
line.byte 0x00 "EP2_FIFO_REG,Endpoint2 FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1cc++0x0
|
|
line.byte 0x00 "EP3_FIFO_REG,Endpoint3 FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x1d0++0x0
|
|
line.byte 0x00 "EP4_FIFO_REG,Endpoint4 FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " FIFO_DATA ,FIFO data value"
|
|
group.byte 0x180++0x0
|
|
line.byte 0x00 "MAXP_REG,Endpoint MAX Packet Register"
|
|
bitfld.byte 0x00 00.--03. " MAXP ,MAX packet size" "Reserved,8 Bytes,16 Bytes,Reserved,32 Bytes,Reserved,Reserved,Reserved,64 Bytes,?..."
|
|
rgroup.byte 0x198++0x0
|
|
line.byte 0x00 "OUT_FIFO_CNT1_REG,Endpoint Out Write Count Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. " OUT_CNT_LOW ,Lower byte of write count"
|
|
rgroup.byte 0x19c++0x0
|
|
line.byte 0x00 "OUT_FIFO_CNT2_REG,Endpoint Out Write Count Register 2"
|
|
hexmask.byte 0x00 0.--7. 1. " OUT_CNT_HIGH ,Higher byte of write count"
|
|
group.byte 0x200++0x0
|
|
line.byte 0x00 "EP1_DMA_CON,EP1 DMA Interface Control Register"
|
|
bitfld.byte 0x00 7. " IN_RUN_OB ,IN_DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running"
|
|
bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte (0x200+0x4)++0x0
|
|
line.byte 0x00 "EP1_DMA_UNIT,EP1 DMA Transfer Unit Counter Base Register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP1_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte (0x200+0x8)++0x0
|
|
line.byte 0x00 "EP1_DMA_FIFO,EP1 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP1_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte (0x200+0xc)++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_L,EP1 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte (0x200+0x10)++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_M,EP1 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP1_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte (0x200+0x14)++0x0
|
|
line.byte 0x00 "EP1_DMA_TTC_H,EP1 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--03. 1. " EP1_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x218++0x0
|
|
line.byte 0x00 "EP2_DMA_CON,EP2 DMA Interface Control Register"
|
|
bitfld.byte 0x00 7. " IN_RUN_OB ,IN_DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running"
|
|
bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte (0x218+0x4)++0x0
|
|
line.byte 0x00 "EP2_DMA_UNIT,EP2 DMA Transfer Unit Counter Base Register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP2_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte (0x218+0x8)++0x0
|
|
line.byte 0x00 "EP2_DMA_FIFO,EP2 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP2_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte (0x218+0xc)++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_L,EP2 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte (0x218+0x10)++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_M,EP2 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP2_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte (0x218+0x14)++0x0
|
|
line.byte 0x00 "EP2_DMA_TTC_H,EP2 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--03. 1. " EP2_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x240++0x0
|
|
line.byte 0x00 "EP3_DMA_CON,EP3 DMA Interface Control Register"
|
|
bitfld.byte 0x00 7. " IN_RUN_OB ,IN_DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running"
|
|
bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte (0x240+0x4)++0x0
|
|
line.byte 0x00 "EP3_DMA_UNIT,EP3 DMA Transfer Unit Counter Base Register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP3_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte (0x240+0x8)++0x0
|
|
line.byte 0x00 "EP3_DMA_FIFO,EP3 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP3_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte (0x240+0xc)++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_L,EP3 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte (0x240+0x10)++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_M,EP3 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP3_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte (0x240+0x14)++0x0
|
|
line.byte 0x00 "EP3_DMA_TTC_H,EP3 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--03. 1. " EP3_TTC_H ,DMA total transfer count value (higher byte)"
|
|
group.byte 0x258++0x0
|
|
line.byte 0x00 "EP4_DMA_CON,EP4 DMA Interface Control Register"
|
|
bitfld.byte 0x00 7. " IN_RUN_OB ,IN_DMA_Run observation (read) / Ignore EP1_DMA_TTC_1 register (write)" "Stopped,Running"
|
|
bitfld.byte 0x00 4.--6. " STATE ,DMA state monitoring" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " DEMAND_MODE ,DMA demand mode enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " OUT_RUN_OB/OUT_DMA_RUN ,OUT DMA run observation" "Stopped,Running"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " IN_DMA_RUN ,Start DMA operation" "Stopped,Running"
|
|
bitfld.byte 0x00 0. " DMA_MODE_EN ,DMA mode" "Interrupt,DMA"
|
|
group.byte (0x258+0x4)++0x0
|
|
line.byte 0x00 "EP4_DMA_UNIT,EP4 DMA Transfer Unit Counter Base Register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP4_UNIT_CNT ,EP DMA transfer unit counter value"
|
|
group.byte (0x258+0x8)++0x0
|
|
line.byte 0x00 "EP4_DMA_FIFO,EP4 DMA transfer FIFO counter base register"
|
|
hexmask.byte 0x00 0.--7. 1. " EP4_FIFO_CNT ,EP DMA transfer FIFO counter value"
|
|
group.byte (0x258+0xc)++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_L,EP4 DMA total transfer counter(lower byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_TTC_L ,DMA total transfer count value (lower byte)"
|
|
group.byte (0x258+0x10)++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_M,EP4 DMA total transfer counter(middle byte)"
|
|
hexmask.byte 0x00 00.--07. 1. " EP4_TTC_M ,DMA total transfer count value (middle byte)"
|
|
group.byte (0x258+0x14)++0x0
|
|
line.byte 0x00 "EP4_DMA_TTC_H,EP4 DMA total transfer counter(higher byte)"
|
|
hexmask.byte 0x00 00.--03. 1. " EP4_TTC_H ,DMA total transfer count value (higher byte)"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Controller"
|
|
base ad:0x4a000000
|
|
sif (cpu()=="S3C2410X")
|
|
width 12.
|
|
group 0x00++0x03
|
|
line.long 0x00 "SRCPND,Source pending register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 09. " INT_WDT ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 08. " INT_TICK ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 07. " nBATT_FLT ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 05. " EINT8_23 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 04. " EINT4_7 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 03. " EINT3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 02. " EINT2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 01. " EINT1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 00. " EINT0 ,Interrupt request status" "Not requested,Requested"
|
|
group 0x04++0x03
|
|
line.long 0x00 "INTMOD,Interrupt mode register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 09. " INT_WDT ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 08. " INT_TICK ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 07. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 05. " EINT8_23 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 04. " EINT4_7 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 03. " EINT3 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 02. " EINT2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 01. " EINT1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 00. " EINT0 ,Interrupt mode" "IRQ,FIQ"
|
|
group 0x08++0x03
|
|
line.long 0x00 "INTMSK,Interrupt mas register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 30. " INT_RTC ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 27. " INT_IIC ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 26. " INT_USBH ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 16. " INT_LCD ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 09. " INT_WDT ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 08. " INT_TICK ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 07. " nBATT_FLT ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 05. " EINT8_23 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 04. " EINT4_7 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 03. " EINT3 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 02. " EINT2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 01. " EINT1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 00. " EINT0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "PRIORITY,IRQ priority control register"
|
|
bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order set" "0-1-2-3-4-5,0-2-3-4-1-5,0-3-4-1-2-5,0-4-1-2-3-5"
|
|
bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order set" "1-2-3-4,2-3-4-1,3-4-1-2,4-1-2-3"
|
|
bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order set" "0-1-2-3-4-5,0-2-3-4-1-5,0-3-4-1-2-5,0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order set" "0-1-2-3-4-5,0-2-3-4-1-5,0-3-4-1-2-5,0-4-1-2-3-5"
|
|
bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order set" "0-1-2-3-4-5,0-2-3-4-1-5,0-3-4-1-2-5,0-4-1-2-3-5"
|
|
bitfld.long 0x00 09.--10. " ARB_SEL1 ,Arbiter 1 group priority order set" "0-1-2-3-4-5,0-2-3-4-1-5,0-3-4-1-2-5,0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 07.--08. " ARB_SEL0 ,Arbiter 0 group priority order set" "1-2-3-4,2-3-4-1,3-4-1-2,4-1-2-3"
|
|
bitfld.long 0x00 06. " ARB_MODE6 ,Arbiter 6 group priority rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 05. " ARB_MODE5 ,Arbiter 5 group priority rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 04. " ARB_MODE4 ,Arbiter 4 group priority rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 03. " ARB_MODE3 ,Arbiter 3 group priority rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 02. " ARB_MODE2 ,Arbiter 2 group priority rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 01. " ARB_MODE1 ,Arbiter 1 group priority rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 00. " ARB_MODE0 ,Arbiter 0 group priority rotate enable" "Disabled,Enabled"
|
|
group 0x10++0x03
|
|
line.long 0x00 "INTPND,Interrupt pending register"
|
|
eventfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 21. " INT_SDI ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 09. " INT_WDT ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 08. " INT_TICK ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 07. " nBATT_FLT ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 05. " EINT8_23 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 04. " EINT4_7 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 03. " EINT3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
eventfld.long 0x00 02. " EINT2 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 01. " EINT1 ,Interrupt request status" "Not requested,Requested"
|
|
eventfld.long 0x00 00. " EINT0 ,Interrupt request status" "Not requested,Requested"
|
|
rgroup 0x14++0x03
|
|
line.long 0x00 "INTOFFSET,Interrupt offset register"
|
|
bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 19. " INT_DMA2 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 18. " INT_DMA1 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 09. " INT_WDT ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 08. " INT_TICK ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 07. " nBATT_FLT ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 05. " EINT8_23 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 04. " EINT4_7 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 03. " EINT3 ,IRQ interrupt request source" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 02. " EINT2 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 01. " EINT1 ,IRQ interrupt request source" "0,1"
|
|
bitfld.long 0x00 00. " EINT0 ,IRQ interrupt request source" "0,1"
|
|
group 0x18++0x03
|
|
line.long 0x00 "SUBSRCPND,SUB SOURCE pending register"
|
|
bitfld.long 0x00 10. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 9. " INT_TC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Interrupt request status" "Not requested,Requested"
|
|
group 0x1c++0x03
|
|
line.long 0x00 "INTSUBMSK,Interrupt sub mask register"
|
|
bitfld.long 0x00 10. " INT_ADC ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 9. " INT_TC ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Determine which interrupt source is masked" "Available,Masked"
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SRCPND,Source Pending Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested"
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTMOD,Interrupt Mode Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ"
|
|
width 11.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked"
|
|
width 11.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "PRIORITY,IRQ Priority Control Register"
|
|
bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 9.--10. " ARB_SEL1 ,Arbiter 1 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " ARB_SEL0 ,Arbiter 0 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3"
|
|
bitfld.long 0x00 6. " ARB_MODE6 ,Arbiter 6 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ARB_MODE5 ,Arbiter 5 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ARB_MODE4 ,Arbiter 4 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARB_MODE3 ,Arbiter 3 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ARB_MODE2 ,Arbiter 2 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ARB_MODE1 ,Arbiter 1 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ARB_MODE0 ,Arbiter 0 group priotiy rotate enable" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "INTPND,Interrupt Request Status Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested"
|
|
width 11.
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "INTOFFSET,Interrupt Offset Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 24. " INT_NAND ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 9. " INT_WDT ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 5. " EINT8_23 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High"
|
|
width 11.
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SUBSRCPND,Sub Source Pending Register"
|
|
bitfld.long 0x00 15. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_CF ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_SDI ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_SPI1_TO ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_SPI0_TO ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_TC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Interrupt request status" "Not requested,Requested"
|
|
width 11.
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register"
|
|
bitfld.long 0x00 15. " INT_SPI1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " INT_CF ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " INT_SDI ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_SPI1_TO ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " INT_SPI0_TO ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " INT_ADC ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_TC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Interrupt mask" "Not masked,Masked"
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2413X")
|
|
width 11.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "SRCPND,Source Pending Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INT_CAMIF ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt request status" "Not requested,Requested"
|
|
width 11.
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "INTMOD,Interrupt Mode Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 6. " INT_CAMIF ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt mode" "IRQ,FIQ"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt mode" "IRQ,FIQ"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt mode" "IRQ,FIQ"
|
|
width 11.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "INTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 6. " INT_CAMIF ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt mask" "Not masked,Masked"
|
|
width 11.
|
|
group.long 0x0c++0x03
|
|
line.long 0x00 "PRIORITY,IRQ Priority Control Register"
|
|
bitfld.long 0x00 19.--20. " ARB_SEL6 ,Arbiter 6 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 17.--18. " ARB_SEL5 ,Arbiter 5 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3"
|
|
textline " "
|
|
bitfld.long 0x00 15.--16. " ARB_SEL4 ,Arbiter 4 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 13.--14. " ARB_SEL3 ,Arbiter 3 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 11.--12. " ARB_SEL2 ,Arbiter 2 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
bitfld.long 0x00 9.--10. " ARB_SEL1 ,Arbiter 1 group priority order" "REQ 0-1-2-3-4-5,REQ 0-2-3-4-1-5,REQ 0-3-4-1-2-5,REQ 0-4-1-2-3-5"
|
|
textline " "
|
|
bitfld.long 0x00 7.--8. " ARB_SEL0 ,Arbiter 0 group priority order" "REQ 1-2-3-4,REQ 2-3-4-1,REQ 3-4-1-2,REQ 4-1-2-3"
|
|
bitfld.long 0x00 6. " ARB_MODE6 ,Arbiter 6 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " ARB_MODE5 ,Arbiter 5 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " ARB_MODE4 ,Arbiter 4 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " ARB_MODE3 ,Arbiter 3 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " ARB_MODE2 ,Arbiter 2 group priotiy rotate enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ARB_MODE1 ,Arbiter 1 group priotiy rotate enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ARB_MODE0 ,Arbiter 0 group priotiy rotate enable" "Disabled,Enabled"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "INTPND,Interrupt Request Status Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 30. " INT_RTC ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 29. " INT_SPI1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 28. " INT_UART0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 27. " INT_IIC ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 26. " INT_USBH ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 24. " INT_NAND ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 23. " INT_UART1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 22. " INT_SPI0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 17. " INT_DMA0 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 16. " INT_LCD ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 15. " INT_UART2 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_WDT ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_TICK ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INT_CAMIF ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EINT8_23 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " EINT4_7 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " EINT3 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " EINT2 ,Interrupt request" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,Interrupt request" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " EINT0 ,Interrupt request" "Not requested,Requested"
|
|
width 11.
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "INTOFFSET,Interrupt Offset Register"
|
|
bitfld.long 0x00 31. " INT_ADC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 30. " INT_RTC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 29. " INT_SPI1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 28. " INT_UART0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 27. " INT_IIC ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 26. " INT_USBH ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 25. " INT_USBD ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 24. " INT_NAND ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 23. " INT_UART1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 22. " INT_SPI0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 21. " INT_SDI_CF ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 20. " INT_DMA3 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " INT_DMA2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 18. " INT_DMA1 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 17. " INT_DMA0 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 16. " INT_LCD ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 15. " INT_UART2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 14. " INT_TIMER4 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_TIMER3 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 12. " INT_TIMER2 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 11. " INT_TIMER1 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INT_TIMER0 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 9. " INT_WDT ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 8. " INT_TICK ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " nBATT_FLT ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 6. " INT_CAMIF ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 5. " EINT8_23 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 4. " EINT4_7 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 3. " EINT3 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 2. " EINT2 ,IRQ interrupt request source" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 1. " EINT1 ,IRQ interrupt request source" "Low,High"
|
|
bitfld.long 0x00 0. " EINT0 ,IRQ interrupt request source" "Low,High"
|
|
width 11.
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "SUBSRCPND,Sub Source Pending Register"
|
|
bitfld.long 0x00 15. " INT_SPI1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 14. " INT_CF ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 13. " INT_SDI ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 12. " INT_SPI1_TO ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 11. " INT_SPI0_TO ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 10. " INT_ADC ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_TC ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Interrupt request status" "Not requested,Requested"
|
|
textline " "
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Interrupt request status" "Not requested,Requested"
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Interrupt request status" "Not requested,Requested"
|
|
width 11.
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "INTSUBMSK,Interrupt Sub Mask Register"
|
|
bitfld.long 0x00 15. " INT_SPI1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 14. " INT_CF ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 13. " INT_SDI ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 12. " INT_SPI1_TO ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 11. " INT_SPI0_TO ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 10. " INT_ADC ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 9. " INT_TC ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 8. " INT_ERR2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 7. " INT_TXD2 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INT_RXD2 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 5. " INT_ERR1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 4. " INT_TXD1 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 3. " INT_RXD1 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " INT_ERR0 ,Interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 1. " INT_TXD0 ,Interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_RXD0 ,Interrupt mask" "Not masked,Masked"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "LCD Controller"
|
|
base ad:0x4d000000
|
|
sif (cpu()=="S3C2410X")
|
|
if (((data.long(ad:0x4d000000))&0x60)==0x60)
|
|
group 0x00++0x13 "LCD CONTROLLER SPECIAL REGISTERS"
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Status of the line counter"
|
|
hexmask.long.word 0x00 08.--17. 1. " CLKVAL ,Determine the rates of VCLK and CLKVAL[9:0]"
|
|
bitfld.long 0x00 07. " MMODE ,Determine the toggle rate of the VM" "Each frame,MVAL"
|
|
textline " "
|
|
bitfld.long 0x00 05.--06. " PNRMODE ,Display mode" "STN 4-bit dual scan,STN 4-bit single scan,STN 8-bit single scan,TFT LCD"
|
|
bitfld.long 0x00 01.--04. " BPPMODE ,BPP (Bits Per Pixel) mode" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,?..."
|
|
bitfld.long 0x00 00. " ENVID ,LCD video output and the logic enable/disable" "Disabled,Enabled"
|
|
line.long 0x04 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.byte 0x04 24.--31. 1. " VBPD ,Vertical back porch"
|
|
hexmask.long.byte 0x04 14.--23. 1. " LINEVAL ,Vertical size of LCD panel"
|
|
hexmask.long.byte 0x04 06.--13. 1. " VFPD ,Vertical front porch"
|
|
textline " "
|
|
hexmask.long.byte 0x04 00.--05. 1. " VSPW ,Vertical sync pulse width"
|
|
line.long 0x08 "LCDCON3,LCD Control 3 Register"
|
|
hexmask.long.byte 0x08 19.--25. 1. " HBPD ,Horizontal back porch"
|
|
hexmask.long.word 0x08 08.--18. 1. " HOZVAL ,Horizontal size of LCD panel"
|
|
hexmask.long.byte 0x08 00.--07. 1. " HFPD ,Horizontal front porch"
|
|
line.long 0x0c "LCDCON4,LCD Control 4 Register"
|
|
hexmask.long.byte 0x0c 00.--07. 1. " HSPW ,Horizontal sync pulse width"
|
|
line.long 0x10 "LCDCON5,LCD Control 5 Register"
|
|
bitfld.long 0x10 15.--16. " VSTATUS ,Vertical Status (read only)" "VSYNC,BACK porch,ACTIVE,FRONT porch"
|
|
bitfld.long 0x10 13.--14. " HSTATUS ,Horizontal Status (read only)" "HSYNC,BACK porch,ACTIVE,FRONT porch"
|
|
bitfld.long 0x10 12. " BPP24BL ,Order of 24 bpp video memory" "LSB,MSB"
|
|
textline " "
|
|
bitfld.long 0x10 11. " FRM565 ,Format of 16 bpp output video data" "5:5:5:1,5:6:5"
|
|
bitfld.long 0x10 10. " INVVCLK ,Polarity of the VCLK active edge" "Falling edge,Rising edge"
|
|
bitfld.long 0x10 09. " INVVLINE ,VLINE/HSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x10 08. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 07. " INVVD ,VD (video data) pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 06. " INVVDEN ,VDEN signal polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x10 05. " INVPWREN ,PWREN signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 04. " INVLEND ,LEND signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 03. " PWREN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 02. " ENLEND ,LEND output signal enable/disable" "Disabled,Enabled"
|
|
bitfld.long 0x10 01. " BSWP ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 00. " HWSWP ,Half-Word swap control bit" "Disabled,Enabled"
|
|
else
|
|
group 0x00++0x13 "LCD CONTROLLER SPECIAL REGISTERS"
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Status of the line counter"
|
|
hexmask.long.word 0x00 08.--17. 1. " CLKVAL ,Determine the rates of VCLK and CLKVAL[9:0]"
|
|
bitfld.long 0x00 07. " MMODE ,Determine the toggle rate of the VM" "Each frame,MVAL"
|
|
textline " "
|
|
bitfld.long 0x00 05.--06. " PNRMODE ,Display mode" "STN 4-bit dual scan,STN 4-bit single scan,STN 8-bit single scan,TFT LCD"
|
|
bitfld.long 0x00 01.--04. " BPPMODE ,BPP (Bits Per Pixel) mode" "1 bpp monochrome,2 bpp 4-level gray,4 bpp 16-level gray,8 bpp color,12 bpp color,?..."
|
|
bitfld.long 0x00 00. " ENVID ,LCD video output and the logic enable/disable" "Disabled,Enabled"
|
|
line.long 0x04 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.word 0x04 14.--23. 1. " LINEVAL ,Vertical size of LCD panel"
|
|
textline " "
|
|
line.long 0x08 "LCDCON3,LCD Control 3 Register"
|
|
bitfld.long 0x08 19.--20. " WDLY ,Delay between VLINE and VCLK by counting the number of the HCLK" "16 HCLK,32 HCLK,48 HCLK,64 HCLK"
|
|
hexmask.long.word 0x08 08.--18. 1. " HOZVAL ,Horizontal size of LCD panel"
|
|
hexmask.long.byte 0x08 00.--07. 1. " LINEBLANK ,Blank time in one horizontal line duration time"
|
|
line.long 0x0c "LCDCON4,LCD Control 4 Register"
|
|
hexmask.long.byte 0x0c 08.--15. 1. " MVAL ,Rate at which VM signal will toggle if MMODE bit is set to logic '1'"
|
|
bitfld.long 0x0c 00.--01. " WLH ,VLINE pulse's high level width by counting number of HCLK" "16 HCLK,32 HCLK,48 HCLK,64 HCLK"
|
|
line.long 0x10 "LCDCON5,LCD Control 5 Register"
|
|
bitfld.long 0x10 10. " INVVCLK ,Polarity of the VCLK active edge" "Falling edge,Rising edge"
|
|
bitfld.long 0x10 09. " INVVLINE ,VLINE/HSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 08. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x10 07. " INVVD ,VD (video data) pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 05. " INVPWREN ,PWREN signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x10 03. " PWREN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 01. " BSWP ,Byte swap control bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 00. " HWSWP ,Half-Word swap control bit" "Disabled,Enabled"
|
|
endif
|
|
group 0x14++0x0b "FRAME BUFFER START ADDRESS REGISTER"
|
|
line.long 0x00 "LCDSADDR1,Frame buffer start address 1 register"
|
|
hexmask.long.word 0x00 21.--29. 1. " LCDBANK ,A[30:22] of bank location for video buffer in system memory"
|
|
hexmask.long.tbyte 0x00 00.--20. 1. " LCDBASEU ,A[21:1] of start address of upper address counter"
|
|
line.long 0x04 "LCDSADDR2,Frame buffer start address 2 register"
|
|
hexmask.long.tbyte 0x04 00.--20. 1. " LCDBASEL ,A[21:1] of start address of lower address counter"
|
|
line.long 0x08 "LCDSADDR3,Virtual screen address set"
|
|
hexmask.long.word 0x08 11.--21. 1. " OFFSIZE ,Virtual screen offset size (the number of half words)"
|
|
hexmask.long.word 0x08 00.--10. 1. " PAGEWIDTH ,Virtual screen page width (the number of half words)"
|
|
if (((data.long(ad:0x4d000000))&0x60)==0x60)
|
|
hgroup 0x20++0xb "LOOKUP TABLE REGISTERS"
|
|
hide.long 0x00 "REDLUT,RED Lookup Table Register"
|
|
hide.long 0x04 "GREENLUT,GREEN Lookup Table Register"
|
|
hide.long 0x08 "BLUELUT,BLUE Lookup Table Register"
|
|
hgroup 0x4c++0x3
|
|
hide.long 0x00 "DITHMODE,Dithering Mode Register"
|
|
else
|
|
group 0x20++0xb "LOOKUP TABLE REGISTERS"
|
|
line.long 0x00 "REDLUT,RED Lookup Table Register"
|
|
hexmask.long 0x00 0.--31. 1. " REDVAL ,Which of the 16 shades will be chosen by each of the 8 possible red combinations"
|
|
line.long 0x04 "GREENLUT,GREEN Lookup Table Register"
|
|
hexmask.long 0x04 0.--31. 1. " GREENVAL ,Which of the 16 shades will be chosen by each of the 8 possible green combinations"
|
|
line.long 0x08 "BLUELUT,BLUE Lookup Table Register"
|
|
hexmask.long.word 0x08 0.--15. 1. " BLUEVAL ,Which of the 16 shades will be chosen by each of the 4 possible blue combinations"
|
|
group 0x4c++0x3
|
|
line.long 0x00 "DITHMODE,Dithering Mode Register"
|
|
hexmask.long.tbyte 0x00 0.--18. 1. " DITHMODE ,Dithering mode"
|
|
endif
|
|
textline ""
|
|
if (((data.long(ad:0x4d000000))&0x60)==0x60)
|
|
group 0x50++0x03
|
|
line.long 0x00 "TPAL,Temporary palette register"
|
|
bitfld.long 0x00 24. " TPALEN ,Temporary palette register enable bit" "Disabled,Enabled"
|
|
hexmask.long.byte 0x00 16.--23. 1. " TPALVALRED ,Temporary palette value register (red)"
|
|
hexmask.long.byte 0x00 08.--15. 1. " TPALVALGREEN ,Temporary palette value register (green)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--07. 1. " TPALVALBLUE ,Temporary palette value register (blue)"
|
|
else
|
|
hgroup 0x50++0x03
|
|
hide.long 0x00 "TPAL,Temporary palette register"
|
|
endif
|
|
group 0x54++0x03
|
|
line.long 0x00 "LCDINTPND,LCD Interrupt Pending Register"
|
|
bitfld.long 0x00 01. " INT_FRSYN ,LCD frame synchronized interrupt pending bit" "Not requested,Requested"
|
|
bitfld.long 0x00 00. " INT_FICNT ,LCD FIFO interrupt pending bit" "Not requested,Requested"
|
|
group 0x58++0x03
|
|
line.long 0x00 "LCDSRCPND,LCD Source Pending Register"
|
|
bitfld.long 0x00 01. " INT_FRSYN ,LCD frame synchronized interrupt source pending bit" "Not requested,Requested"
|
|
bitfld.long 0x00 00. " INT_FICNT ,LCD FIFO interrupt source pending bit" "Not requested,Requested"
|
|
group 0x5c++0x03
|
|
line.long 0x00 "LCDINTMSK,LCD Interrupt Mask Register"
|
|
bitfld.long 0x00 02. " FIWSEL ,Trigger level of LCD FIFO" "4 words,8 words"
|
|
bitfld.long 0x00 01. " INT_FRSYN ,Mask LCD frame synchronized interrupt" "Available,Masked"
|
|
bitfld.long 0x00 00. " INT_FICNT ,Mask LCD FIFO interrupt" "Available,Masked"
|
|
group 0x60++0x03
|
|
line.long 0x00 "LPCSEL,LPC3600 Control Register"
|
|
bitfld.long 0x00 01. " RES_SEL ," "Reserved,240x320"
|
|
bitfld.long 0x00 00. " LPC_EN ,LPC3600 Enable/Disable" "Disabled,Enabled"
|
|
endif
|
|
sif (cpu()=="S3C2412X")
|
|
width 11.
|
|
if ((((d.l(ad:0x4d000000))&0x60)!=0x60)&&(((d.l(ad:0x4d000000))&0x80)==0x80))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STNCOL ,Color or monochrome STN" "Color,Monochrome"
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp,2 bpp,4 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
elif ((((d.l(ad:0x4d000000))&0x60)!=0x60)&&(((d.l(ad:0x4d000000))&0x80)==0x00))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STNCOL ,Color or monochrome STN" "Color,Monochrome"
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp,2 bpp,4 bpp,8 bpp,8 bpp,12 bpp,16 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x4d000000))&0x60)!=0x60)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size"
|
|
textline " "
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "LCDCON3,LCD Control 3 Register"
|
|
hexmask.long.byte 0x00 19.--25. 1. " WDLY ,WDLY (Base on System Clock)"
|
|
hexmask.long.word 0x00 8.--18. 1. " HOZVAL ,LCD horizontal size"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " LINEBLANK ,Line blank (Base on System Clock)"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCDCON4,LCD Control 4 Register"
|
|
bitfld.long 0x00 16.--18. " VMMODE ,VMMODE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MVAL ,Rate at which VM signal toggle"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " WLH ,WLH (Base on System Clock)"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "LCDCON5,LCD Control 5 Register"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising"
|
|
bitfld.long 0x00 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 7. " INVVD ,VD pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 5. " INVPWREN ,PWREN signal polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 3. " PRWEN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " BSWP ,Byte swap control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWSWP ,Half-word swap control" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBPD ,Vertical back porch"
|
|
hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size"
|
|
textline " "
|
|
hexmask.long.byte 0x00 6.--13. 1. " VFPD ,Vertical front porch"
|
|
hexmask.long.byte 0x00 0.--5. 1. " VSPW ,Vertical sync pulse width"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "LCDCON3,LCD Control 3 Register"
|
|
hexmask.long.byte 0x00 19.--25. 1. " HBPD ,Horizontal back porch"
|
|
hexmask.long.word 0x00 8.--18. 1. " HOZVAL ,Horizontal size of LCD panel"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " HFPD ,Horizontal front porch"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCDCON4,LCD Control 4 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HSPW ,HSPW horizontal sync pulse width"
|
|
textline " "
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "LCDCON5,LCD Control 5 Register"
|
|
bitfld.long 0x00 15.--16. " VSTATUS ,Vertical status" "VSYNC,BACK porch,ACTIVE,FRONT porch"
|
|
bitfld.long 0x00 13.--14. " HSTATUS ,Horizontal status" "HSYNC,Back porch,Active,FRONT porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " BPP24BL ,Order of 24 bpp video memory" "LSB valid,MSB valid"
|
|
bitfld.long 0x00 11. " FRM565 ,Format of 16 bpp output video data" "5:5:5:1,5:6:5"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising"
|
|
bitfld.long 0x00 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 7. " INVVD ,VD pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INVVDEN ,VDEN signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 5. " INVPWREN ,PWREN signal polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 4. " INVLEND ,LEND signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 3. " PRWEN ,LCD_PWREN output signal enable/disable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ENLEND ,LEND output signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BSWP ,Byte swap control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWSWP ,Half-word swap control" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCDSADDR1,Frame Buffer Start Address 1 Register"
|
|
hexmask.long.word 0x00 21.--29. 1. " LCDBANK ,Bank location for video buffer"
|
|
hexmask.long 0x00 0.--20. 1. " LCDBASEU ,Start address of upper address counter"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "LCDSADDR2,Frame Buffer Start Address 2 Register"
|
|
hexmask.long 0x00 0.--20. 1. " LCDBASEL ,Start address of lower address counter"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "LCDSADDR3,Frame Buffer Start Address 3 Register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OFFSIZE ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--10. 1. " PAGEWIDTH ,Virtual screen page width"
|
|
if (((d.l(ad:0x4d000000))&0x60)==0x60)
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TPAL,Temporary Palette Register"
|
|
bitfld.long 0x00 24. " TPALEN ,Temporary palett register enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 16.--23. 1. " TPALVAL ,Temporary palette value (RED)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 8.--16. 1. " TPALVAL ,Temporary palette value (GREEN)"
|
|
hexmask.long.tbyte 0x00 0.--7. 1. " TPALVAL ,Temporary palette value (BLUE)"
|
|
else
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x00 "TPAL,Temporary Palette Register"
|
|
endif
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCDINTPND,LCD Interrupt Pending Register"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt pending" "Not pending,Pending"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "LCDSRCPND,LCD Interrupt Source Pending Register"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt source pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt source pending" "Not pending,Pending"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "LCDINTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x00 2. " FIWSEL ,Trigger level of LCD FIFO" "4 words,8 words"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt mask" "Not masked,Masked"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TCONSEL,LPC3600/LCC3600 Control Register"
|
|
bitfld.long 0x00 11. " LCC_TEST2 ,LCC3600 test mode 2" "Low,High"
|
|
bitfld.long 0x00 10. " LCC_TEST1 ,LCC3600 test mode 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCC_SEL5 ,Select STV polarity" "Low,High"
|
|
bitfld.long 0x00 8. " LCC_SEL4 ,Select CPV signal pin 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCC_SEL3 ,Select CPV signal pin 1" "Low,High"
|
|
bitfld.long 0x00 6. " LCC_SEL2 ,Select line/dot inversion" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LCD_SEL1 ,Select DG/normal mode" "Low,High"
|
|
bitfld.long 0x00 4. " LCC_EN ,LCC3600 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPV_SEL ,Select CPV Pulse low width" "Low,High"
|
|
bitfld.long 0x00 2. " MODE_SEL ,Select DE/Sync mode" "Sync,DE"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RES_SEL ,Select output resolution type" "320 x 240,240 x 320"
|
|
bitfld.long 0x00 0. " LPC_EN ,LPC3600 enable" "Disabled,Enabled"
|
|
hgroup.long 0x34++0x7
|
|
hide.long 0x00 "LCDCON6,LCD Control 6 Register"
|
|
hide.long 0x04 "LCDCON7,LCD Control 7 Register"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "LCDCON8,LCD Control 8 Register"
|
|
bitfld.long 0x00 25. " WNSelR[7] ,Red pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 18.--24. 1. " WNSelR[6:0] ,Red dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WNSelG[7] ,Green pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 10.--16. 1. " WNSelG[6:0] ,Green dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WNSelB[7] ,Blue pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 2.--8. 1. " WNSelB[6:0] ,Blue dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WNAIIEn ,RGB pattern dithering control enable with WNSelG[7]" "Enabled,Disabled"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "LCDCON9,LCD Control 9 Register"
|
|
tree "Red Lookup Table"
|
|
width 11.
|
|
group.long 0x44++0x1b
|
|
line.long 0x0 "REDLUT0,Red Lookup Table Register 0"
|
|
hexmask.long 0x0 0.--31. 1. " RLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "REDLUT1,Red Lookup Table Register 1"
|
|
hexmask.long 0x4 0.--31. 1. " RLUT1 ,Table[63:32]"
|
|
line.long 0x8 "REDLUT2,Red Lookup Table Register 2"
|
|
hexmask.long 0x8 0.--31. 1. " RLUT2 ,Table[95:64]"
|
|
line.long 0xC "REDLUT3,Red Lookup Table Register 3"
|
|
hexmask.long 0xC 0.--31. 1. " RLUT3 ,Table[127:96]"
|
|
line.long 0x10 "REDLUT4,Red Lookup Table Register 4"
|
|
hexmask.long 0x10 0.--31. 1. " RLUT4 ,Table[159:128]"
|
|
line.long 0x14 "REDLUT5,Red Lookup Table Register 5"
|
|
hexmask.long 0x14 0.--31. 1. " RLUT5 ,Table[191:160]"
|
|
line.long 0x18 "REDLUT6,Red Lookup Table Register 6"
|
|
hexmask.long 0x18 0.--31. 1. " RLUT6 ,Table[223:192]"
|
|
tree.end
|
|
tree "Green Lookup Table"
|
|
width 11.
|
|
group.long 0x60++0x37
|
|
line.long 0x0 "GREENLUT0 ,Green Lookup Table Register 0 "
|
|
hexmask.long 0x0 0.--31. 1. " GLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "GREENLUT1 ,Green Lookup Table Register 1 "
|
|
hexmask.long 0x4 0.--31. 1. " GLUT1 ,Table[63:32]"
|
|
line.long 0x8 "GREENLUT2 ,Green Lookup Table Register 2 "
|
|
hexmask.long 0x8 0.--31. 1. " GLUT2 ,Table[95:64]"
|
|
line.long 0xC "GREENLUT3 ,Green Lookup Table Register 3 "
|
|
hexmask.long 0xC 0.--31. 1. " GLUT3 ,Table[127:96]"
|
|
line.long 0x10 "GREENLUT4 ,Green Lookup Table Register 4 "
|
|
hexmask.long 0x10 0.--31. 1. " GLUT4 ,Table[159:128]"
|
|
line.long 0x14 "GREENLUT5 ,Green Lookup Table Register 5 "
|
|
hexmask.long 0x14 0.--31. 1. " GLUT5 ,Table[191:160]"
|
|
line.long 0x18 "GREENLUT6 ,Green Lookup Table Register 6 "
|
|
hexmask.long 0x18 0.--31. 1. " GLUT6 ,Table[223:192]"
|
|
line.long 0x1C "GREENLUT7 ,Green Lookup Table Register 7 "
|
|
hexmask.long 0x1C 0.--31. 1. " GLUT7 ,Table[255:224]"
|
|
line.long 0x20 "GREENLUT8 ,Green Lookup Table Register 8 "
|
|
hexmask.long 0x20 0.--31. 1. " GLUT8 ,Table[287:256]"
|
|
line.long 0x24 "GREENLUT9 ,Green Lookup Table Register 9 "
|
|
hexmask.long 0x24 0.--31. 1. " GLUT9 ,Table[319:288]"
|
|
line.long 0x28 "GREENLUT10,Green Lookup Table Register 10"
|
|
hexmask.long 0x28 0.--31. 1. " GLUT10 ,Table[351:320]"
|
|
line.long 0x2C "GREENLUT11,Green Lookup Table Register 11"
|
|
hexmask.long 0x2C 0.--31. 1. " GLUT11 ,Table[383:352]"
|
|
line.long 0x30 "GREENLUT12,Green Lookup Table Register 12"
|
|
hexmask.long 0x30 0.--31. 1. " GLUT12 ,Table[415:384]"
|
|
line.long 0x34 "GREENLUT13,Green Lookup Table Register 13"
|
|
hexmask.long 0x34 0.--31. 1. " GLUT13 ,Table[447:416]"
|
|
tree.end
|
|
tree "Blue Lookup Table"
|
|
width 11.
|
|
group.long 0x98++0x1b
|
|
line.long 0x0 "BLUELUT0,Blue Lookup Table Register 0"
|
|
hexmask.long 0x0 0.--31. 1. " BLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "BLUELUT1,Blue Lookup Table Register 1"
|
|
hexmask.long 0x4 0.--31. 1. " BLUT1 ,Table[63:32]"
|
|
line.long 0x8 "BLUELUT2,Blue Lookup Table Register 2"
|
|
hexmask.long 0x8 0.--31. 1. " BLUT2 ,Table[95:64]"
|
|
line.long 0xC "BLUELUT3,Blue Lookup Table Register 3"
|
|
hexmask.long 0xC 0.--31. 1. " BLUT3 ,Table[127:96]"
|
|
line.long 0x10 "BLUELUT4,Blue Lookup Table Register 4"
|
|
hexmask.long 0x10 0.--31. 1. " BLUT4 ,Table[159:128]"
|
|
line.long 0x14 "BLUELUT5,Blue Lookup Table Register 5"
|
|
hexmask.long 0x14 0.--31. 1. " BLUT5 ,Table[191:160]"
|
|
line.long 0x18 "BLUELUT6,Blue Lookup Table Register 6"
|
|
hexmask.long 0x18 0.--31. 1. " BLUT6 ,Table[223:192]"
|
|
tree.end
|
|
tree "FRC Pattern"
|
|
width 11.
|
|
group.long 0xb4++0xff
|
|
line.long 0x0 "FRCPAT0 ,FRC Pattern Register 0 "
|
|
line.long 0x4 "FRCPAT1 ,FRC Pattern Register 1 "
|
|
line.long 0x8 "FRCPAT2 ,FRC Pattern Register 2 "
|
|
line.long 0xC "FRCPAT3 ,FRC Pattern Register 3 "
|
|
line.long 0x10 "FRCPAT4 ,FRC Pattern Register 4 "
|
|
line.long 0x14 "FRCPAT5 ,FRC Pattern Register 5 "
|
|
line.long 0x18 "FRCPAT6 ,FRC Pattern Register 6 "
|
|
line.long 0x1C "FRCPAT7 ,FRC Pattern Register 7 "
|
|
line.long 0x20 "FRCPAT8 ,FRC Pattern Register 8 "
|
|
line.long 0x24 "FRCPAT9 ,FRC Pattern Register 9 "
|
|
line.long 0x28 "FRCPAT10,FRC Pattern Register 10"
|
|
line.long 0x2C "FRCPAT11,FRC Pattern Register 11"
|
|
line.long 0x30 "FRCPAT12,FRC Pattern Register 12"
|
|
line.long 0x34 "FRCPAT13,FRC Pattern Register 13"
|
|
line.long 0x38 "FRCPAT14,FRC Pattern Register 14"
|
|
line.long 0x3C "FRCPAT15,FRC Pattern Register 15"
|
|
line.long 0x40 "FRCPAT16,FRC Pattern Register 16"
|
|
line.long 0x44 "FRCPAT17,FRC Pattern Register 17"
|
|
line.long 0x48 "FRCPAT18,FRC Pattern Register 18"
|
|
line.long 0x4C "FRCPAT19,FRC Pattern Register 19"
|
|
line.long 0x50 "FRCPAT20,FRC Pattern Register 20"
|
|
line.long 0x54 "FRCPAT21,FRC Pattern Register 21"
|
|
line.long 0x58 "FRCPAT22,FRC Pattern Register 22"
|
|
line.long 0x5C "FRCPAT23,FRC Pattern Register 23"
|
|
line.long 0x60 "FRCPAT24,FRC Pattern Register 24"
|
|
line.long 0x64 "FRCPAT25,FRC Pattern Register 25"
|
|
line.long 0x68 "FRCPAT26,FRC Pattern Register 26"
|
|
line.long 0x6C "FRCPAT27,FRC Pattern Register 27"
|
|
line.long 0x70 "FRCPAT28,FRC Pattern Register 28"
|
|
line.long 0x74 "FRCPAT29,FRC Pattern Register 29"
|
|
line.long 0x78 "FRCPAT30,FRC Pattern Register 30"
|
|
line.long 0x7C "FRCPAT31,FRC Pattern Register 31"
|
|
line.long 0x80 "FRCPAT32,FRC Pattern Register 32"
|
|
line.long 0x84 "FRCPAT33,FRC Pattern Register 33"
|
|
line.long 0x88 "FRCPAT34,FRC Pattern Register 34"
|
|
line.long 0x8C "FRCPAT35,FRC Pattern Register 35"
|
|
line.long 0x90 "FRCPAT36,FRC Pattern Register 36"
|
|
line.long 0x94 "FRCPAT37,FRC Pattern Register 37"
|
|
line.long 0x98 "FRCPAT38,FRC Pattern Register 38"
|
|
line.long 0x9C "FRCPAT39,FRC Pattern Register 39"
|
|
line.long 0xA0 "FRCPAT40,FRC Pattern Register 40"
|
|
line.long 0xA4 "FRCPAT41,FRC Pattern Register 41"
|
|
line.long 0xA8 "FRCPAT42,FRC Pattern Register 42"
|
|
line.long 0xAC "FRCPAT43,FRC Pattern Register 43"
|
|
line.long 0xB0 "FRCPAT44,FRC Pattern Register 44"
|
|
line.long 0xB4 "FRCPAT45,FRC Pattern Register 45"
|
|
line.long 0xB8 "FRCPAT46,FRC Pattern Register 46"
|
|
line.long 0xBC "FRCPAT47,FRC Pattern Register 47"
|
|
line.long 0xC0 "FRCPAT48,FRC Pattern Register 48"
|
|
line.long 0xC4 "FRCPAT49,FRC Pattern Register 49"
|
|
line.long 0xC8 "FRCPAT50,FRC Pattern Register 50"
|
|
line.long 0xCC "FRCPAT51,FRC Pattern Register 51"
|
|
line.long 0xD0 "FRCPAT52,FRC Pattern Register 52"
|
|
line.long 0xD4 "FRCPAT53,FRC Pattern Register 53"
|
|
line.long 0xD8 "FRCPAT54,FRC Pattern Register 54"
|
|
line.long 0xDC "FRCPAT55,FRC Pattern Register 55"
|
|
line.long 0xE0 "FRCPAT56,FRC Pattern Register 56"
|
|
line.long 0xE4 "FRCPAT57,FRC Pattern Register 57"
|
|
line.long 0xE8 "FRCPAT58,FRC Pattern Register 58"
|
|
line.long 0xEC "FRCPAT59,FRC Pattern Register 59"
|
|
line.long 0xF0 "FRCPAT60,FRC Pattern Register 60"
|
|
line.long 0xF4 "FRCPAT61,FRC Pattern Register 61"
|
|
line.long 0xF8 "FRCPAT62,FRC Pattern Register 62"
|
|
line.long 0xFC "FRCPAT63,FRC Pattern Register 63"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
sif (cpu()=="S3C2413X")
|
|
width 11.
|
|
if ((((d.l(ad:0x4d000000))&0x60)!=0x60)&&(((d.l(ad:0x4d000000))&0x80)==0x80))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STNCOL ,Color or monochrome STN" "Color,Monochrome"
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp,2 bpp,4 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
elif ((((d.l(ad:0x4d000000))&0x60)!=0x60)&&(((d.l(ad:0x4d000000))&0x80)==0x00))
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 7. " STNCOL ,Color or monochrome STN" "Color,Monochrome"
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "1 bpp,2 bpp,4 bpp,8 bpp,8 bpp,12 bpp,16 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "LCDCON1,LCD Control 1 Register"
|
|
hexmask.long.word 0x00 18.--27. 1. " LINECNT ,Line counter status"
|
|
hexmask.long.word 0x00 8.--17. 1. " CLKVAL ,VCLK and CLKVAL[9:0] rates"
|
|
textline " "
|
|
bitfld.long 0x00 5.--6. " PNRMODE ,Display mode" "4-bit dual scan STN,4-bit single scan STN,8-bit single scan STN,TFT LCD panel"
|
|
textline " "
|
|
bitfld.long 0x00 1.--4. " BPPMODE ,Bits per pixel mode" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,1 bpp,2 bpp,4 bpp,8 bpp,16 bpp,24 bpp,?..."
|
|
bitfld.long 0x00 0. " ENVID ,LCD video output and logic enable/disable" "Disabled,Enabled"
|
|
endif
|
|
if (((d.l(ad:0x4d000000))&0x60)!=0x60)
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size"
|
|
textline " "
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "LCDCON3,LCD Control 3 Register"
|
|
hexmask.long.byte 0x00 19.--25. 1. " WDLY ,WDLY (Base on System Clock)"
|
|
hexmask.long.word 0x00 8.--18. 1. " HOZVAL ,LCD horizontal size"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " LINEBLANK ,Line blank (Base on System Clock)"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCDCON4,LCD Control 4 Register"
|
|
bitfld.long 0x00 16.--18. " VMMODE ,VMMODE" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x00 8.--15. 1. " MVAL ,Rate at which VM signal toggle"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " WLH ,WLH (Base on System Clock)"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "LCDCON5,LCD Control 5 Register"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising"
|
|
bitfld.long 0x00 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 7. " INVVD ,VD pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 1. " BSWP ,Byte swap control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWSWP ,Half-word swap control" "Disabled,Enabled"
|
|
else
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "LCDCON2,LCD Control 2 Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " VBPD ,Vertical back porch"
|
|
hexmask.long.word 0x00 14.--23. 1. " LINEVAL ,LCD vertical size"
|
|
textline " "
|
|
hexmask.long.byte 0x00 6.--13. 1. " VFPD ,Vertical front porch"
|
|
hexmask.long.byte 0x00 0.--5. 1. " VSPW ,Vertical sync pulse width"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "LCDCON3,LCD Control 3 Register"
|
|
hexmask.long.byte 0x00 19.--25. 1. " HBPD ,Horizontal back porch"
|
|
hexmask.long.word 0x00 8.--18. 1. " HOZVAL ,Horizontal size of LCD panel"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " HFPD ,Horizontal front porch"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "LCDCON4,LCD Control 4 Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " HSPW ,HSPW horizontal sync pulse width"
|
|
textline " "
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "LCDCON5,LCD Control 5 Register"
|
|
bitfld.long 0x00 15.--16. " VSTATUS ,Vertical status" "VSYNC,BACK porch,ACTIVE,FRONT porch"
|
|
bitfld.long 0x00 13.--14. " HSTATUS ,Horizontal status" "HSYNC,Back porch,Active,FRONT porch"
|
|
textline " "
|
|
bitfld.long 0x00 12. " BPP24BL ,Order of 24 bpp video memory" "LSB valid,MSB valid"
|
|
bitfld.long 0x00 11. " FRM565 ,Format of 16 bpp output video data" "5:5:5:1,5:6:5"
|
|
textline " "
|
|
bitfld.long 0x00 10. " INVVCLK ,Polarity of VCLK active edge" "Falling,Rising"
|
|
bitfld.long 0x00 9. " INVVLINE ,VLIN/VSYNC pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 8. " INVVFRAME ,VFRAME/VSYNC pulse polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 7. " INVVD ,VD pulse polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 6. " INVVDEN ,VDEN signal polarity" "Normal,Inverted"
|
|
bitfld.long 0x00 4. " INVLEND ,LEND signal polarity" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ENLEND ,LEND output signal enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " BSWP ,Byte swap control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " HWSWP ,Half-word swap control" "Disabled,Enabled"
|
|
endif
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "LCDSADDR1,Frame Buffer Start Address 1 Register"
|
|
hexmask.long.word 0x00 21.--29. 1. " LCDBANK ,Bank location for video buffer"
|
|
hexmask.long 0x00 0.--20. 1. " LCDBASEU ,Start address of upper address counter"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "LCDSADDR2,Frame Buffer Start Address 2 Register"
|
|
hexmask.long 0x00 0.--20. 1. " LCDBASEL ,Start address of lower address counter"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "LCDSADDR3,Frame Buffer Start Address 3 Register"
|
|
hexmask.long.word 0x00 11.--21. 1. " OFFSIZE ,Virtual screen offset size"
|
|
hexmask.long.word 0x00 0.--10. 1. " PAGEWIDTH ,Virtual screen page width"
|
|
if (((d.l(ad:0x4d000000))&0x60)==0x60)
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "TPAL,Temporary Palette Register"
|
|
bitfld.long 0x00 24. " TPALEN ,Temporary palett register enable" "Disabled,Enabled"
|
|
hexmask.long.tbyte 0x00 16.--23. 1. " TPALVAL ,Temporary palette value (RED)"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 8.--16. 1. " TPALVAL ,Temporary palette value (GREEN)"
|
|
hexmask.long.tbyte 0x00 0.--7. 1. " TPALVAL ,Temporary palette value (BLUE)"
|
|
else
|
|
hgroup.long 0x20++0x3
|
|
hide.long 0x00 "TPAL,Temporary Palette Register"
|
|
endif
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "LCDINTPND,LCD Interrupt Pending Register"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt pending" "Not pending,Pending"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "LCDSRCPND,LCD Interrupt Source Pending Register"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt source pending" "Not pending,Pending"
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt source pending" "Not pending,Pending"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "LCDINTMSK,Interrupt Mask Register"
|
|
bitfld.long 0x00 2. " FIWSEL ,Trigger level of LCD FIFO" "4 words,8 words"
|
|
bitfld.long 0x00 1. " INT_FrSyn ,LCD frame synchronized interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 0. " INT_FiCnt ,LCD FIFO interrupt mask" "Not masked,Masked"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "TCONSEL,LPC3600/LCC3600 Control Register"
|
|
bitfld.long 0x00 11. " LCC_TEST2 ,LCC3600 test mode 2" "Low,High"
|
|
bitfld.long 0x00 10. " LCC_TEST1 ,LCC3600 test mode 1" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 9. " LCC_SEL5 ,Select STV polarity" "Low,High"
|
|
bitfld.long 0x00 8. " LCC_SEL4 ,Select CPV signal pin 0" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 7. " LCC_SEL3 ,Select CPV signal pin 1" "Low,High"
|
|
bitfld.long 0x00 6. " LCC_SEL2 ,Select line/dot inversion" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 5. " LCD_SEL1 ,Select DG/normal mode" "Low,High"
|
|
bitfld.long 0x00 4. " LCC_EN ,LCC3600 enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " CPV_SEL ,Select CPV Pulse low width" "Low,High"
|
|
bitfld.long 0x00 2. " MODE_SEL ,Select DE/Sync mode" "Sync,DE"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RES_SEL ,Select output resolution type" "320 x 240,240 x 320"
|
|
bitfld.long 0x00 0. " LPC_EN ,LPC3600 enable" "Disabled,Enabled"
|
|
hgroup.long 0x34++0x7
|
|
hide.long 0x00 "LCDCON6,LCD Control 6 Register"
|
|
hide.long 0x04 "LCDCON7,LCD Control 7 Register"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "LCDCON8,LCD Control 8 Register"
|
|
bitfld.long 0x00 25. " WNSelR[7] ,Red pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 18.--24. 1. " WNSelR[6:0] ,Red dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 17. " WNSelG[7] ,Green pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 10.--16. 1. " WNSelG[6:0] ,Green dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 9. " WNSelB[7] ,Blue pattern dithering control" "Enabled,Disabled"
|
|
hexmask.long.byte 0x00 2.--8. 1. " WNSelB[6:0] ,Blue dithering pattern select"
|
|
textline " "
|
|
bitfld.long 0x00 1. " WNAIIEn ,RGB pattern dithering control enable with WNSelG[7]" "Enabled,Disabled"
|
|
hgroup.long 0x40++0x3
|
|
hide.long 0x00 "LCDCON9,LCD Control 9 Register"
|
|
tree "Red Lookup Table"
|
|
width 11.
|
|
group.long 0x44++0x1b
|
|
line.long 0x0 "REDLUT0,Red Lookup Table Register 0"
|
|
hexmask.long 0x0 0.--31. 1. " RLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "REDLUT1,Red Lookup Table Register 1"
|
|
hexmask.long 0x4 0.--31. 1. " RLUT1 ,Table[63:32]"
|
|
line.long 0x8 "REDLUT2,Red Lookup Table Register 2"
|
|
hexmask.long 0x8 0.--31. 1. " RLUT2 ,Table[95:64]"
|
|
line.long 0xC "REDLUT3,Red Lookup Table Register 3"
|
|
hexmask.long 0xC 0.--31. 1. " RLUT3 ,Table[127:96]"
|
|
line.long 0x10 "REDLUT4,Red Lookup Table Register 4"
|
|
hexmask.long 0x10 0.--31. 1. " RLUT4 ,Table[159:128]"
|
|
line.long 0x14 "REDLUT5,Red Lookup Table Register 5"
|
|
hexmask.long 0x14 0.--31. 1. " RLUT5 ,Table[191:160]"
|
|
line.long 0x18 "REDLUT6,Red Lookup Table Register 6"
|
|
hexmask.long 0x18 0.--31. 1. " RLUT6 ,Table[223:192]"
|
|
tree.end
|
|
tree "Green Lookup Table"
|
|
width 11.
|
|
group.long 0x60++0x37
|
|
line.long 0x0 "GREENLUT0 ,Green Lookup Table Register 0 "
|
|
hexmask.long 0x0 0.--31. 1. " GLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "GREENLUT1 ,Green Lookup Table Register 1 "
|
|
hexmask.long 0x4 0.--31. 1. " GLUT1 ,Table[63:32]"
|
|
line.long 0x8 "GREENLUT2 ,Green Lookup Table Register 2 "
|
|
hexmask.long 0x8 0.--31. 1. " GLUT2 ,Table[95:64]"
|
|
line.long 0xC "GREENLUT3 ,Green Lookup Table Register 3 "
|
|
hexmask.long 0xC 0.--31. 1. " GLUT3 ,Table[127:96]"
|
|
line.long 0x10 "GREENLUT4 ,Green Lookup Table Register 4 "
|
|
hexmask.long 0x10 0.--31. 1. " GLUT4 ,Table[159:128]"
|
|
line.long 0x14 "GREENLUT5 ,Green Lookup Table Register 5 "
|
|
hexmask.long 0x14 0.--31. 1. " GLUT5 ,Table[191:160]"
|
|
line.long 0x18 "GREENLUT6 ,Green Lookup Table Register 6 "
|
|
hexmask.long 0x18 0.--31. 1. " GLUT6 ,Table[223:192]"
|
|
line.long 0x1C "GREENLUT7 ,Green Lookup Table Register 7 "
|
|
hexmask.long 0x1C 0.--31. 1. " GLUT7 ,Table[255:224]"
|
|
line.long 0x20 "GREENLUT8 ,Green Lookup Table Register 8 "
|
|
hexmask.long 0x20 0.--31. 1. " GLUT8 ,Table[287:256]"
|
|
line.long 0x24 "GREENLUT9 ,Green Lookup Table Register 9 "
|
|
hexmask.long 0x24 0.--31. 1. " GLUT9 ,Table[319:288]"
|
|
line.long 0x28 "GREENLUT10,Green Lookup Table Register 10"
|
|
hexmask.long 0x28 0.--31. 1. " GLUT10 ,Table[351:320]"
|
|
line.long 0x2C "GREENLUT11,Green Lookup Table Register 11"
|
|
hexmask.long 0x2C 0.--31. 1. " GLUT11 ,Table[383:352]"
|
|
line.long 0x30 "GREENLUT12,Green Lookup Table Register 12"
|
|
hexmask.long 0x30 0.--31. 1. " GLUT12 ,Table[415:384]"
|
|
line.long 0x34 "GREENLUT13,Green Lookup Table Register 13"
|
|
hexmask.long 0x34 0.--31. 1. " GLUT13 ,Table[447:416]"
|
|
tree.end
|
|
tree "Blue Lookup Table"
|
|
width 11.
|
|
group.long 0x98++0x1b
|
|
line.long 0x0 "BLUELUT0,Blue Lookup Table Register 0"
|
|
hexmask.long 0x0 0.--31. 1. " BLUT0 ,Table[31:0 ]"
|
|
line.long 0x4 "BLUELUT1,Blue Lookup Table Register 1"
|
|
hexmask.long 0x4 0.--31. 1. " BLUT1 ,Table[63:32]"
|
|
line.long 0x8 "BLUELUT2,Blue Lookup Table Register 2"
|
|
hexmask.long 0x8 0.--31. 1. " BLUT2 ,Table[95:64]"
|
|
line.long 0xC "BLUELUT3,Blue Lookup Table Register 3"
|
|
hexmask.long 0xC 0.--31. 1. " BLUT3 ,Table[127:96]"
|
|
line.long 0x10 "BLUELUT4,Blue Lookup Table Register 4"
|
|
hexmask.long 0x10 0.--31. 1. " BLUT4 ,Table[159:128]"
|
|
line.long 0x14 "BLUELUT5,Blue Lookup Table Register 5"
|
|
hexmask.long 0x14 0.--31. 1. " BLUT5 ,Table[191:160]"
|
|
line.long 0x18 "BLUELUT6,Blue Lookup Table Register 6"
|
|
hexmask.long 0x18 0.--31. 1. " BLUT6 ,Table[223:192]"
|
|
tree.end
|
|
tree "FRC Pattern"
|
|
width 11.
|
|
group.long 0xb4++0xff
|
|
line.long 0x0 "FRCPAT0 ,FRC Pattern Register 0 "
|
|
line.long 0x4 "FRCPAT1 ,FRC Pattern Register 1 "
|
|
line.long 0x8 "FRCPAT2 ,FRC Pattern Register 2 "
|
|
line.long 0xC "FRCPAT3 ,FRC Pattern Register 3 "
|
|
line.long 0x10 "FRCPAT4 ,FRC Pattern Register 4 "
|
|
line.long 0x14 "FRCPAT5 ,FRC Pattern Register 5 "
|
|
line.long 0x18 "FRCPAT6 ,FRC Pattern Register 6 "
|
|
line.long 0x1C "FRCPAT7 ,FRC Pattern Register 7 "
|
|
line.long 0x20 "FRCPAT8 ,FRC Pattern Register 8 "
|
|
line.long 0x24 "FRCPAT9 ,FRC Pattern Register 9 "
|
|
line.long 0x28 "FRCPAT10,FRC Pattern Register 10"
|
|
line.long 0x2C "FRCPAT11,FRC Pattern Register 11"
|
|
line.long 0x30 "FRCPAT12,FRC Pattern Register 12"
|
|
line.long 0x34 "FRCPAT13,FRC Pattern Register 13"
|
|
line.long 0x38 "FRCPAT14,FRC Pattern Register 14"
|
|
line.long 0x3C "FRCPAT15,FRC Pattern Register 15"
|
|
line.long 0x40 "FRCPAT16,FRC Pattern Register 16"
|
|
line.long 0x44 "FRCPAT17,FRC Pattern Register 17"
|
|
line.long 0x48 "FRCPAT18,FRC Pattern Register 18"
|
|
line.long 0x4C "FRCPAT19,FRC Pattern Register 19"
|
|
line.long 0x50 "FRCPAT20,FRC Pattern Register 20"
|
|
line.long 0x54 "FRCPAT21,FRC Pattern Register 21"
|
|
line.long 0x58 "FRCPAT22,FRC Pattern Register 22"
|
|
line.long 0x5C "FRCPAT23,FRC Pattern Register 23"
|
|
line.long 0x60 "FRCPAT24,FRC Pattern Register 24"
|
|
line.long 0x64 "FRCPAT25,FRC Pattern Register 25"
|
|
line.long 0x68 "FRCPAT26,FRC Pattern Register 26"
|
|
line.long 0x6C "FRCPAT27,FRC Pattern Register 27"
|
|
line.long 0x70 "FRCPAT28,FRC Pattern Register 28"
|
|
line.long 0x74 "FRCPAT29,FRC Pattern Register 29"
|
|
line.long 0x78 "FRCPAT30,FRC Pattern Register 30"
|
|
line.long 0x7C "FRCPAT31,FRC Pattern Register 31"
|
|
line.long 0x80 "FRCPAT32,FRC Pattern Register 32"
|
|
line.long 0x84 "FRCPAT33,FRC Pattern Register 33"
|
|
line.long 0x88 "FRCPAT34,FRC Pattern Register 34"
|
|
line.long 0x8C "FRCPAT35,FRC Pattern Register 35"
|
|
line.long 0x90 "FRCPAT36,FRC Pattern Register 36"
|
|
line.long 0x94 "FRCPAT37,FRC Pattern Register 37"
|
|
line.long 0x98 "FRCPAT38,FRC Pattern Register 38"
|
|
line.long 0x9C "FRCPAT39,FRC Pattern Register 39"
|
|
line.long 0xA0 "FRCPAT40,FRC Pattern Register 40"
|
|
line.long 0xA4 "FRCPAT41,FRC Pattern Register 41"
|
|
line.long 0xA8 "FRCPAT42,FRC Pattern Register 42"
|
|
line.long 0xAC "FRCPAT43,FRC Pattern Register 43"
|
|
line.long 0xB0 "FRCPAT44,FRC Pattern Register 44"
|
|
line.long 0xB4 "FRCPAT45,FRC Pattern Register 45"
|
|
line.long 0xB8 "FRCPAT46,FRC Pattern Register 46"
|
|
line.long 0xBC "FRCPAT47,FRC Pattern Register 47"
|
|
line.long 0xC0 "FRCPAT48,FRC Pattern Register 48"
|
|
line.long 0xC4 "FRCPAT49,FRC Pattern Register 49"
|
|
line.long 0xC8 "FRCPAT50,FRC Pattern Register 50"
|
|
line.long 0xCC "FRCPAT51,FRC Pattern Register 51"
|
|
line.long 0xD0 "FRCPAT52,FRC Pattern Register 52"
|
|
line.long 0xD4 "FRCPAT53,FRC Pattern Register 53"
|
|
line.long 0xD8 "FRCPAT54,FRC Pattern Register 54"
|
|
line.long 0xDC "FRCPAT55,FRC Pattern Register 55"
|
|
line.long 0xE0 "FRCPAT56,FRC Pattern Register 56"
|
|
line.long 0xE4 "FRCPAT57,FRC Pattern Register 57"
|
|
line.long 0xE8 "FRCPAT58,FRC Pattern Register 58"
|
|
line.long 0xEC "FRCPAT59,FRC Pattern Register 59"
|
|
line.long 0xF0 "FRCPAT60,FRC Pattern Register 60"
|
|
line.long 0xF4 "FRCPAT61,FRC Pattern Register 61"
|
|
line.long 0xF8 "FRCPAT62,FRC Pattern Register 62"
|
|
line.long 0xFC "FRCPAT63,FRC Pattern Register 63"
|
|
tree.end
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "ADC & Touch Screen Interface"
|
|
base ad:0x58000000
|
|
sif (cpu()=="S3C2410X")
|
|
width 9.
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "ADCCON,ADC control register"
|
|
bitfld.word 0x00 15. " ECFLG ,End of conversion flag (read only)" "Not ended,Ended"
|
|
bitfld.word 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.word.byte 0x00 06.--13. 1. " PRSCVL ,A/D converter prescaler value"
|
|
bitfld.word 0x00 03.--05. " SEL_MUX ,Analog input channel select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
textline " "
|
|
bitfld.word 0x00 02. " STDBM ,Standby mode select" "Normal,Standby"
|
|
bitfld.word 0x00 01. " READ_START ,A/D conversion start by read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 00. " ENABLE_START ,A/D conversion starts by setting this bit" "No operation,Started"
|
|
group.long 0x04++0x3
|
|
line.word 0x00 "ADCTSC,ADC touch screen control register"
|
|
bitfld.word 0x00 07. " YM_SEN ,Output value of YMON" "Hi-Z,GND"
|
|
bitfld.word 0x00 06. " YP_SEN ,Output value of nYPON" "External voltage,AIN7"
|
|
textline " "
|
|
bitfld.word 0x00 05. " XM_SEN ,Output value of XMON" "Hi-Z,GND"
|
|
bitfld.word 0x00 04. " XP_SEN ,Output value of nXPON" "External voltage,AIN7"
|
|
textline " "
|
|
bitfld.word 0x00 03. " PULL_UP ,Pull-up switch enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 02. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Auto"
|
|
textline " "
|
|
bitfld.word 0x00 00.--01. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Waiting"
|
|
group.long 0x08++0x3
|
|
line.word 0x00 "ADCDLY,ADC start or interval delay register"
|
|
hexmask.word 0x00 0.--15. 1. " DELAY ,"
|
|
rgroup.long 0x0c++0x3
|
|
line.word 0x00 "ADCDAT0,ADC conversion data register"
|
|
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
|
|
bitfld.word 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequencing"
|
|
textline " "
|
|
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Waiting"
|
|
hexmask.word 0x00 00.--09. 1. " XPDATA ,X-position conversion data value"
|
|
rgroup.long 0x10++0x3
|
|
line.word 0x00 "ADCDAT1,ADC conversion data register"
|
|
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
|
|
bitfld.word 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequencing"
|
|
textline " "
|
|
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Waiting"
|
|
hexmask.word 0x00 00.--09. 1. " YPDATA ,Y-position conversion data value"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 9.
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "ADCCON,ADC Control Register"
|
|
bitfld.word 0x00 15. " ECFLG ,End of conversion flag" "In progress,Ended"
|
|
bitfld.word 0x00 14. " PRSCEN ,A/D converter prescaler enable" "Disabled,Enabled"
|
|
hexmask.word.byte 0x00 6.--13. 1. " PRSCVL ,A/D converter prescaler value"
|
|
textline " "
|
|
bitfld.word 0x00 3.--5. " SEL_MUX ,Analog input channel select" "AIN0,AIN1,AIN2,AIN3,AIN4,AIN5,AIN6,AIN7"
|
|
bitfld.word 0x00 2. " STDBM ,Standby mode select" "Normal,Standby"
|
|
bitfld.word 0x00 1. " READ_START ,A/D conversion start by read" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 0. " ENABLE_START ,A/D conversion start" "No operation,Started"
|
|
group.long 0x04++0x3
|
|
line.word 0x00 "ADCTSC,ADC Touch Screen Control Register"
|
|
bitfld.word 0x00 7. " YM_SEN ,Output value of YMON" "Low,High"
|
|
bitfld.word 0x00 6. " YP_SEN ,Output value of nYPON" "Low,High"
|
|
bitfld.word 0x00 5. " XM_SEN ,Output value of XMON" "Low,High"
|
|
textline " "
|
|
bitfld.word 0x00 4. " XP_SEN ,Output value of nXPON" "Low,High"
|
|
bitfld.word 0x00 3. " PULL_UP ,Pull-up switch enable" "Enabled,Disabled"
|
|
bitfld.word 0x00 2. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential"
|
|
textline " "
|
|
bitfld.word 0x00 0.--1. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
|
|
group.long 0x08++0x3
|
|
line.word 0x00 "ADCDLY,ADC Start Or Interval Delay Register"
|
|
hexmask.word 0x00 0.--15. 1. " DELAY ,Delay value"
|
|
rgroup.long 0x0c++0x3
|
|
line.word 0x00 "ADCDAT0,ADC Conversion Data Register 0"
|
|
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
|
|
bitfld.word 0x00 14. " AUTO_PST ,Automatic sequencing conversion of X-position and Y-position" "Normal,Sequential"
|
|
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
|
|
textline " "
|
|
hexmask.word 0x00 0.--9. 1. " XPDATA ,X-position conversion data value"
|
|
rgroup.long 0x10++0x3
|
|
line.word 0x00 "ADCDAT1,ADC Conversion Data Register 1"
|
|
bitfld.word 0x00 15. " UPDOWN ,Up or down state of Stylus at Waiting for Interrupt Mode" "Down,Up"
|
|
bitfld.word 0x00 14. " AUTO_PST ,Automatically sequencing conversion of X-position and Y-position" "Normal,Sequential"
|
|
bitfld.word 0x00 12.--13. " XY_PST ,Manual measurement of X-position or Y-position" "No operation,X-position,Y-position,Interrupt"
|
|
textline " "
|
|
hexmask.word 0x00 0.--9. 1. " YPDATA ,Y-position conversion data value"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Real Time Clock"
|
|
base ad:0x57000000
|
|
sif (cpu()=="S3C2410X")
|
|
width 9.
|
|
group.byte 0x40++0x0
|
|
line.byte 0x00 "RTCCON,RTC control register"
|
|
bitfld.byte 0x00 03. " CLKRST ,RTC clock count reset" "No reset,Reset"
|
|
bitfld.byte 0x00 02. " CNTSEL ,BCD count select" "Merge BCD,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 01. " CLKSEL ,BCD clock select" "XTAL 1/(2^15),?..."
|
|
bitfld.byte 0x00 00. " RTCEN ,RTC control enable" "Disabled,Enabled"
|
|
group.byte 0x44++0x0
|
|
line.byte 0x00 "TICNT,Tick time count register"
|
|
bitfld.byte 0x00 07. " TIE ,Tick time interrupt enable" "Disabled,Enabled"
|
|
hexmask.byte 0x00 00.--06. 1. " TTC ,Tick time count value"
|
|
group.byte 0x50++0x0
|
|
line.byte 0x00 "RTCALM,RTC alarm control register"
|
|
bitfld.byte 0x00 06. " ALMEN ,Alarm global enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 05. " YEAREN ,Year alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 04. " MONREN ,Month alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 03. " DATEEN ,Date alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 02. " HOUREN ,Hour alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 01. " MINEN ,Minute alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 00. " SECEN ,Second alarm enable" "Disabled,Enabled"
|
|
if (((data.byte(ad:0x57000050))&0x41)==0x41)
|
|
group.byte 0x54++0x0
|
|
line.byte 0x00 "ALMSEC,Alarm second data register"
|
|
bitfld.byte 0x00 04.--06. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,?..."
|
|
bitfld.byte 0x00 00.--03. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
else
|
|
hgroup.byte 0x54++0x0
|
|
hide.byte 0x00 "ALMSEC,Alarm second data register"
|
|
endif
|
|
if (((data.byte(ad:0x57000050))&0x42)==0x42)
|
|
group.byte 0x58++0x0
|
|
line.byte 0x00 "ALMMIN,Alarm minute data register"
|
|
bitfld.byte 0x00 04.--06. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,?..."
|
|
bitfld.byte 0x00 00.--03. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
else
|
|
hgroup.byte 0x58++0x0
|
|
hide.byte 0x00 "ALMMIN,Alarm minute data register"
|
|
endif
|
|
if ((((data.byte(ad:0x57000050))&0x44)==0x44)&&(((data.byte(ad:0x5700005c))&0x30)==0x20))
|
|
group.byte 0x5c++0x0
|
|
line.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
bitfld.byte 0x00 04.--05. " HOURDATA ,BCD value for alarm hour" "0,1,2,?..."
|
|
bitfld.byte 0x00 00.--03. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,?..."
|
|
elif ((((data.byte(ad:0x57000050))&0x44)==0x44)&&(((data.byte(ad:0x5700005c))&0x30)!=0x20))
|
|
group.byte 0x5c++0x0
|
|
line.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
bitfld.byte 0x00 04.--05. " HOURDATA ,BCD value for alarm hour" "0,1,2,?..."
|
|
bitfld.byte 0x00 00.--03. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
else
|
|
hgroup.byte 0x5c++0x0
|
|
hide.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
endif
|
|
if ((((data.byte(ad:0x57000050))&0x48)==0x48)&&(((data.byte(ad:0x57000060))&0x30)==0x30))
|
|
group.byte 0x60++0x0
|
|
line.byte 0x00 "ALMDATE,Alarm date data register"
|
|
bitfld.byte 0x00 04.--05. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
|
|
bitfld.byte 0x00 00.--03. " DATEDATA ,BCD value for alarm date" "0,1,?..."
|
|
elif ((((data.byte(ad:0x57000050))&0x48)==0x48)&&(((data.byte(ad:0x57000060))&0x30)!=0x30))
|
|
group.byte 0x60++0x0
|
|
line.byte 0x00 "ALMDATE,Alarm date data register"
|
|
bitfld.byte 0x00 04.--05. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
|
|
bitfld.byte 0x00 00.--03. " DATEDATA ,BCD value for alarm date" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
else
|
|
hgroup.byte 0x60++0x0
|
|
hide.byte 0x00 "ALMDATE,Alarm date data register"
|
|
endif
|
|
if ((((data.byte(ad:0x57000050))&0x50)==0x50)&&(((data.byte(ad:0x57000064))&0x10)==0x10))
|
|
group.byte 0x64++0x0
|
|
line.byte 0x00 "ALMMON,Alarm month data register"
|
|
bitfld.byte 0x00 04. " MONDATA ,BCD value for alarm month" "0,1"
|
|
bitfld.byte 0x00 00.--03. " MONDATA ,BCD value for alarm month" "0,1,2,?..."
|
|
elif ((((data.byte(ad:0x57000050))&0x50)==0x50)&&(((data.byte(ad:0x57000064))&0x10)!=0x10))
|
|
group.byte 0x64++0x0
|
|
line.byte 0x00 "ALMMON,Alarm month data register"
|
|
bitfld.byte 0x00 04. " MONDATA ,BCD value for alarm month" "0,1"
|
|
bitfld.byte 0x00 00.--03. " MONDATA ,BCD value for alarm month" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
else
|
|
hgroup.byte 0x64++0x0
|
|
hide.byte 0x00 "ALMMON,Alarm month data register"
|
|
endif
|
|
if (((data.byte(ad:0x57000050))&0x60)==0x60)
|
|
group.byte 0x68++0x0
|
|
line.byte 0x00 "ALMYEAR,Alarm year data register"
|
|
hexmask.byte 0x00 00.--07. 1. " YEARDATA ,BCD value for year"
|
|
else
|
|
hgroup.byte 0x68++0x0
|
|
hide.byte 0x00 "ALMYEAR,Alarm year data register"
|
|
endif
|
|
group.byte 0x6c++0x0
|
|
line.byte 0x00 "RTCRST,RTC round reset register"
|
|
bitfld.byte 0x00 03. " SRSTEN ,Round second reset enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 00.--02. " SECCR ,Round boundary for second carry generation" "Reserved,Reserved,Reserved,>30Sec,>40Sec,>50Sec,?..."
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "BCDSEC,BCD second register"
|
|
bitfld.byte 0x00 04.--06. " SECDATA ,BCD value for second" "0,1,2,3,4,5,?..."
|
|
bitfld.byte 0x00 00.--03. " SECDATA ,BCD value for second" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.byte 0x74++0x0
|
|
line.byte 0x00 "BCDMIN,BCD minute register"
|
|
bitfld.byte 0x00 04.--06. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,?..."
|
|
bitfld.byte 0x00 00.--03. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.byte 0x78++0x0
|
|
line.byte 0x00 "BCDHOUR,BCD hour register"
|
|
bitfld.byte 0x00 04.--05. " HOURDATA ,BCD value for hour" "0,1,2,?..."
|
|
bitfld.byte 0x00 00.--03. " HOURDATA ,BCD value for hour" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.byte 0x7c++0x0
|
|
line.byte 0x00 "BCDDATE,BCD date register"
|
|
bitfld.byte 0x00 04.--05. " DATEDATA ,BCD value for date" "0,1,2,3"
|
|
bitfld.byte 0x00 00.--03. " DATEDATA ,BCD value for date" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.byte 0x80++0x0
|
|
line.byte 0x00 "BCDDAY,BCD a day of the week register"
|
|
bitfld.byte 0x00 00.--02. " DAYDATA ,BCD value for a day of the week" "Reserved,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "BCDMON,BCD month register"
|
|
bitfld.byte 0x00 04. " MONDATA ,BCD value for month" "0,1"
|
|
bitfld.byte 0x00 00.--03. " MONDATA ,BCD value for month" "0,1,2,3,4,5,6,7,8,9,?..."
|
|
group.byte 0x88++0x0
|
|
line.byte 0x00 "BCDYEAR,BCD year register"
|
|
hexmask.byte 0x00 00.--07. 1. " YEARDATA ,BCD value for year"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 9.
|
|
group.byte 0x40++0x0
|
|
line.byte 0x00 "RTCCON,RTC Control Register"
|
|
bitfld.byte 0x00 4. " TICsel ,Tick Time clock select" "1/2048 second,1/32768 second"
|
|
bitfld.byte 0x00 3. " CLRST ,RTC clock count reset" "No reset,Reset"
|
|
bitfld.byte 0x00 2. " CNTSEL ,BCD count select" "Merged,?..."
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CLKSEL ,BCD clock select" "XTAL 1/215,?..."
|
|
bitfld.byte 0x00 0. " RTCEN ,RTC control enable" "Disabled,Enabled"
|
|
group.byte 0x44++0x0
|
|
line.byte 0x00 "TICNT0,Tick Time Count Register 0"
|
|
bitfld.byte 0x00 7. " TICK_INT_EN ,Tick time interrupt enable" "Disabled,Enabled"
|
|
hexmask.byte 0x00 0.--6. 1. " TICK_TIME_CNT0 ,Upper 7bits of 15-bit tick time count value"
|
|
group.byte 0x4c++0x0
|
|
line.byte 0x00 "TICNT1,Tick Time Count Register 1"
|
|
hexmask.byte 0x00 0.--7. 1. " TICK_TIME_CNT1 ,Lower 8bits of 15-bit tick time count value"
|
|
group.byte 0x50++0x0
|
|
line.byte 0x00 "RTCALM,RTC Alarm Control Register"
|
|
bitfld.byte 0x00 7. " XTBSEL ,Clock divider clock select" "1/128 second,?..."
|
|
bitfld.byte 0x00 6. " ALMEN ,Alarm global enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 5. " YEAREN ,Year alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " MONREN ,Month alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 3. " DATEEN ,Date alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " HOUREN ,Hour alarm enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " MINEN ,Minute alarm enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0. " SECEN ,Second alarm enable" "Disabled,Enabled"
|
|
width 9.
|
|
if (((d.b(ad:(0x57000000+0x50)))&0x41)==0x41)
|
|
group.byte 0x54++0x0
|
|
line.byte 0x00 "ALMSEC,Alarm Second Data Register"
|
|
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for alarm second" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
hgroup.byte 0x54++0x0
|
|
hide.byte 0x00 "ALMSEC,Alarm Second Data Register"
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x50)))&0x42)==0x42)
|
|
group.byte 0x58++0x0
|
|
line.byte 0x00 "ALMMIN,Alarm Minute Data Register"
|
|
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for alarm minute" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
hgroup.byte 0x58++0x0
|
|
hide.byte 0x00 "ALMMIN,Alarm Minute Data Register"
|
|
endif
|
|
if ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)==0x20))
|
|
group.byte 0x5c++0x0
|
|
line.byte 0x00 "ALMHOUR,Alarm Hour Data Register"
|
|
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..."
|
|
elif ((((d.b(ad:(0x57000000+0x50)))&0x44)==0x44)&&(((d.b(ad:(0x57000000+0x5c)))&0x30)!=0x20))
|
|
group.byte 0x5c++0x0
|
|
line.byte 0x00 "ALMHOUR,Alarm hour data register"
|
|
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for alarm hour" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for alarm hour" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
hgroup.byte 0x5c++0x0
|
|
hide.byte 0x00 "ALMHOUR,Alarm Hour Data Register"
|
|
endif
|
|
if ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)==0x30))
|
|
group.byte 0x60++0x0
|
|
line.byte 0x00 "ALMDATE,Alarm Date Data Register"
|
|
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for alarm date" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
elif ((((d.b(ad:(0x57000000+0x50)))&0x48)==0x48)&&(((d.b(ad:(0x57000000+0x60)))&0x30)!=0x30))
|
|
group.byte 0x60++0x0
|
|
line.byte 0x00 "ALMDATE,Alarm Date Data Register"
|
|
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for alarm date from 0 to 28/29/30/31" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for alarm date" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
hgroup.byte 0x60++0x0
|
|
hide.byte 0x00 "ALMDATE,Alarm Date Data Register"
|
|
endif
|
|
if ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)==0x10))
|
|
group.byte 0x64++0x0
|
|
line.byte 0x00 "ALMMON,Alarm Month Data Register"
|
|
bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1"
|
|
bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for alarm month" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
|
|
elif ((((d.b(ad:(0x57000000+0x50)))&0x50)==0x50)&&(((d.b(ad:(0x57000000+0x64)))&0x10)!=0x10))
|
|
group.byte 0x64++0x0
|
|
line.byte 0x00 "ALMMON,Alarm Month Data Register"
|
|
bitfld.byte 0x00 4. " MONDATA ,BCD value for alarm month" "0,1"
|
|
bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for alarm month" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
hgroup.byte 0x64++0x0
|
|
hide.byte 0x00 "ALMMON,Alarm Month Data Register"
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x50)))&0x60)==0x60)
|
|
group.byte 0x68++0x0
|
|
line.byte 0x00 "ALMYEAR,Alarm Year Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year"
|
|
else
|
|
hgroup.byte 0x68++0x0
|
|
hide.byte 0x00 "ALMYEAR,Alarm Year Data Register"
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x70)))&0x70)<0x60)
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "BCDSEC,BCD Second Register"
|
|
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for second" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.byte 0x70++0x0
|
|
line.byte 0x00 "BCDSEC,BCD Second Register"
|
|
bitfld.byte 0x00 4.--6. " SECDATA ,BCD value for second" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " SECDATA ,BCD value for second" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x74)))&0x70)<0x60)
|
|
group.byte 0x74++0x0
|
|
line.byte 0x00 "BCDMIN,BCD Minute Register"
|
|
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.byte 0x74++0x0
|
|
line.byte 0x00 "BCDMIN,BCD Minute Register"
|
|
bitfld.byte 0x00 4.--6. " MINDATA ,BCD value for minute" "0,1,2,3,4,5,-,-"
|
|
bitfld.byte 0x00 0.--3. " MINDATA ,BCD value for minute" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x78)))&0x30)==0x20)
|
|
group.byte 0x78++0x0
|
|
line.byte 0x00 "BCDHOUR,BCD Hour Register"
|
|
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "0,1,2,3,-,-,-,-,-,-,-,-,-,?..."
|
|
elif ((((d.b(ad:(0x57000000+0x78)))&0x30)==0x00)||(((d.b(ad:(0x57000000+0x78)))&0x30)==0x10))
|
|
group.byte 0x78++0x0
|
|
line.byte 0x00 "BCDHOUR,BCD Hour Register"
|
|
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.byte 0x78++0x0
|
|
line.byte 0x00 "BCDHOUR,BCD Hour Register"
|
|
bitfld.byte 0x00 4.--5. " HOURDATA ,BCD value for hour" "0,1,2,-"
|
|
bitfld.byte 0x00 0.--3. " HOURDATA ,BCD value for hour" "-,-,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
endif
|
|
if (((d.b(ad:(0x57000000+0x7c)))&0x30)==0x30)
|
|
group.byte 0x7c++0x0
|
|
line.byte 0x00 "BCDDATE,BCD Date Register"
|
|
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for date" "0,1,-,-,-,-,-,-,-,-,-,-,-,?..."
|
|
else
|
|
group.byte 0x7c++0x0
|
|
line.byte 0x00 "BCDDATE,BCD Date Register"
|
|
bitfld.byte 0x00 4.--5. " DATEDATA ,BCD value for date" "0,1,2,3"
|
|
bitfld.byte 0x00 0.--3. " DATEDATA ,BCD value for date" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
endif
|
|
group.byte 0x80++0x0
|
|
line.byte 0x00 "BCDDAY,BCD A Day Of The Week Register"
|
|
bitfld.byte 0x00 0.--2. " DAYDATA ,BCD value for a day of the week" "-,Monday,Tuesday,Wednesday,Thursday,Friday,Saturday,Sunday"
|
|
if (((d.b(ad:(0x57000000+0x84)))&0x10)==0x00)
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "BCDMON,BCD Month Register"
|
|
bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1"
|
|
bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for month" "0,1,2,3,4,5,6,7,8,9,-,-,-,?..."
|
|
else
|
|
group.byte 0x84++0x0
|
|
line.byte 0x00 "BCDMON,BCD Month Register"
|
|
bitfld.byte 0x00 4. " MONDATA ,BCD value for month" "0,1"
|
|
bitfld.byte 0x00 0.--3. " MONDATA ,BCD value for month" "0,1,2,-,-,-,-,-,-,-,-,-,-,?..."
|
|
endif
|
|
group.byte 0x88++0x0
|
|
line.byte 0x00 "BCDYEAR,BCD year register"
|
|
hexmask.byte 0x00 0.--7. 1. " YEARDATA ,BCD value for year"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "Watchdog Timer"
|
|
base ad:0x53000000
|
|
sif (cpu()=="S3C2410X")
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "WTCON,Watchdog timer control register"
|
|
hexmask.word.byte 0x00 08.--15. 1. " PV ,Prescaler Value"
|
|
bitfld.word 0x00 05. " WT ,Watchdog Timer enable bit" "Disabled,Enabled"
|
|
bitfld.word 0x00 03.--04. " CS ,Clock Select-Determine the clock division factor" "16,32,64,128"
|
|
bitfld.word 0x00 02. " IG ,Interrupt Generation" "Disabled,Enabled"
|
|
bitfld.word 0x00 00. " RE ,Reset Enable/Disable" "Disabled,Enabled"
|
|
group.long 0x04++0x3
|
|
line.word 0x00 "WTDAT,Watchdog timer data register"
|
|
hexmask.word 0x00 00.--15. 1. " CRV ,Count value for reload"
|
|
group.long 0x08++0x3
|
|
line.word 0x00 "WTCNT,Watchdog timer count register"
|
|
hexmask.word 0x00 00.--15. 1. " CV ,Current count value of the watchdog timer"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 7.
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "WTCON,Watchdog Timer Control Register"
|
|
hexmask.word.byte 0x00 8.--15. 1. " PV ,Prescaler Value"
|
|
bitfld.word 0x00 5. " WDT ,Watchdog timer enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3.--4. " CLKSEL ,Clock division factor" "16,32,64,128"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INTGEN ,Interrupt generation" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " RSTEN ,Reset enable" "Disabled,Enabled"
|
|
group.long 0x04++0x3
|
|
line.word 0x00 "WTDAT,Watchdog Timer Data Register"
|
|
hexmask.word 0x00 0.--15. 1. " CNTRL ,Count reload value"
|
|
group.long 0x08++0x3
|
|
line.word 0x00 "WTCNT,Watchdog Timer Count Register"
|
|
hexmask.word 0x00 0.--15. 1. " CNTVAL ,Count value"
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="S3C2410X")
|
|
tree "Secure Digital Interface for SDIO(SDI)"
|
|
base ad:0x5a000000
|
|
width 11.
|
|
group 0x00++0x13
|
|
line.long 0x00 "SDICON,R/W SDI control register"
|
|
bitfld.long 0x00 04. " BYTEORDER ,Byte order type" "Type A,Type B"
|
|
bitfld.long 0x00 03. " RCVIOINT ,Receive SDIO Interrupt from card" "Ignored,Received"
|
|
textline " "
|
|
bitfld.long 0x00 02. " RWAITEN ,Read Wait Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 01. " FRST ,FIFO Reset" "Normal,Reset"
|
|
textline " "
|
|
bitfld.long 0x00 00. " ENCLK ,Clock Out Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SDIPRE,SDI baud rate prescaler register"
|
|
hexmask.long.byte 0x04 00.--07. 1. " PV ,Prescaler Value"
|
|
line.long 0x08 "SDICARG,SDI command argument register"
|
|
hexmask.long 0x08 00.--31. 1. " CMDARG , Command Argument"
|
|
line.long 0x0c "SDICCON,SDI command control register"
|
|
bitfld.long 0x0c 12. " ABORTCMD ,Abort command" "Normal,Abort"
|
|
bitfld.long 0x0c 11. " WITHDATA ,Command with Data" "Without,With"
|
|
textline " "
|
|
bitfld.long 0x0c 10. " LONGRSP ,Host receives a 136-bit long response" "Short,Long"
|
|
bitfld.long 0x0c 09. " WAITRSP ,Host waits for a response" "No wait,Wait"
|
|
textline " "
|
|
bitfld.long 0x0c 08. " CMST ,Command Start" "Ready,Start"
|
|
hexmask.long.byte 0x0c 00.--07. 1. " CMDINDEX ,Command index with start 2bit (8bit)"
|
|
line.long 0x10 "SDICSTA,SDI command status register"
|
|
eventfld.long 0x10 12. " RSPCRC ,Response CRC Fail" "Not detected,Failed"
|
|
eventfld.long 0x10 11. " CMDSENT ,Command Sent" "Not detected,Ended"
|
|
textline " "
|
|
eventfld.long 0x10 10. " CMDTOUT ,Command Time Out(64clk)" "Not detected,Timeout"
|
|
eventfld.long 0x10 09. " RSPFIN ,Response Receive End" "Not detected,Ended"
|
|
textline " "
|
|
bitfld.long 0x10 08. " CMDON ,CMD line progress On" "Not detected,In progress"
|
|
hexmask.long 0x10 00.--07. 1. " RSPINDEX ,Response index 6bit with start 2bit (8bit)"
|
|
rgroup 0x14++0xf
|
|
line.long 0x00 "SDIRSP0,SDI response register 0"
|
|
hexmask.long.long 0x00 0.--31. 1. " RESPONSE0 ,Card status[31:0](short)- card status[127:96](long)"
|
|
line.long 0x04 "SDIRSP1,SDI response register 1"
|
|
hexmask.long.byte 0x04 24.--31. 1. " RCRC7 ,CRC7 (with end bit short) card status[95:88](long)"
|
|
hexmask.long.tbyte 0x04 00.--23. 1. " RESPONSE1 ,Unused (short) card status[87:64](long)"
|
|
line.long 0x08 "SDIRSP2,SDI response register 2"
|
|
hexmask.long.long 0x08 0.--31. 1. " RESPONSE2 ,Unused (short), card status[63:32](long)"
|
|
line.long 0x0c "SDIRSP3,SDI response register 3"
|
|
hexmask.long 0x0c 0.--31. 1. " RESPONSE3 ,Unused (short), card status[31:0](long)"
|
|
group 0x24++0xb
|
|
line.long 0x00 "SDIDTIMER,SDI data / busy timer register"
|
|
hexmask.long.word 0x00 00.--15. 1. " DATATIMER ,Data / busy timeout period (0~65535 cycle)"
|
|
line.long 0x04 "SDIBSIZE,SDI block size register"
|
|
hexmask.long.word 0x04 00.--11. 1. " BlkSize ,Block size value (0~4095 byte)"
|
|
line.long 0x08 "SDIDCON,SDI data control register"
|
|
bitfld.long 0x08 21. " PRDTYPE ,SDIO Interrupt Period Type" "2 cycles,More"
|
|
bitfld.long 0x08 20. " TARSP ,Transmit After Response" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x08 19. " RACMD ,Receive After Command" "No,Yes"
|
|
bitfld.long 0x08 18. " BACMD ,Busy After Command" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x08 17. " BLKMODE ,Data transfer mode" "Stream,Block"
|
|
bitfld.long 0x08 16. " WIDEBUS ,Wide bus enable" "Standard bus,Wide bus"
|
|
textline " "
|
|
bitfld.long 0x08 15. " EnDMA ,DMA Enable" "Disabled,Enabled"
|
|
bitfld.long 0x08 14. " STOP ,Stop by force" "Normal,Stop by force"
|
|
textline " "
|
|
bitfld.long 0x08 12.--13. " DATMODE ,Data Transfer Mode" "Ready,Only bus check start,Data receive start,Data transmit start"
|
|
hexmask.long.word 0x08 00.--11. 1. " BlkNum ,Block Number (0~4095)"
|
|
rgroup 0x30++0x3
|
|
line.long 0x00 "SDIDCNT,SDI data remain counter register"
|
|
hexmask.long.word 0x00 12.--23. 1. " BLKNUMCNT ,Remaining block number"
|
|
hexmask.long.word 0x00 00.--11. 1. " BLKCNT ,Remaining data byte of 1 block"
|
|
group 0x34++0x3
|
|
line.long 0x00 "SDIDSTA,SDI data status register"
|
|
eventfld.long 0x00 10. " RWAITREQ ,Read Wait Request Occur" "Not occurred,Occurred"
|
|
eventfld.long 0x00 09. " IOINTDET ,SDIO Interrupt Detect" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 08. " FFFAIL ,FIFO Fail error" "Not detected,Failed"
|
|
eventfld.long 0x00 07. " CRCSTA ,CRC Status Fail" "Not detected,Failed"
|
|
textline " "
|
|
eventfld.long 0x00 06. " DATCRC ,Data Receive CRC Fail" "Not detected,Failed"
|
|
eventfld.long 0x00 05. " DATTOUT ,Data Time Out" "Not detected,Timeout"
|
|
textline " "
|
|
eventfld.long 0x00 04. " DATFIN ,Data Transfer Finish" "Not detected,Detected"
|
|
eventfld.long 0x00 03. " BUSYFIN ,Busy Finish" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 02. " SBITERR ,Start Bit Error" "Not detected,Detected"
|
|
bitfld.long 0x00 01. " TXDATON ,Tx Data progress On" "Not active,In progress"
|
|
textline " "
|
|
bitfld.long 0x00 00. " RXDATON ,Rx Data Progress On" "Not active,In progress"
|
|
rgroup 0x38++0x3
|
|
line.long 0x00 "SDIFSTA,SDI FIFO status register"
|
|
bitfld.long 0x00 13. " TFDET ,FIFO available Detect for Tx" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " RFDET ,FIFO available Detect for Rx" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TFHalf ,Tx FIFO Half Full" "33 <= Tx FIFO <= 64,0 <= Tx FIFO <= 32"
|
|
bitfld.long 0x00 10. " TFEMPTY ,Tx FIFO Empty-Set to 1 whenever Tx FIFO is empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 09. " RFLAST ,Rx FIFO Last Data Ready" "Not ready,Ready"
|
|
bitfld.long 0x00 08. " RFFULL ,Rx FIFO Full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 07. " RFHALF ,Rx FIFO Half Full" "0 <= Rx FIFO <= 31,32 <= Rx FIFO <= 64"
|
|
hexmask.long.byte 0x00 00.--06. 1. " FFCNT ,FIFO Count-Number of data (byte) in FIFO"
|
|
group 0x3c++0x7
|
|
line.long 0x00 "SDIDAT, SDI Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA , Data to be transmitted or received over the SDI channel"
|
|
line.long 0x04 "SDIIMSK,SDI interrupt mask register"
|
|
bitfld.long 0x04 17. " RSPCRC ,Response CRC error interrupt" "Disabled,Enabled"
|
|
bitfld.long 0x04 16. " CMDSENT ,Command sent(without response) Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 15. " CMDTOUT ,Command response timeout Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 14. " RSPEND ,Command response received Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 13. " RWAITREQ ,Read wait request Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 12. " IOINTDET ,SD host receives SDIO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 11. " FFFAIL ,FIFO fail error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " CRCSTA ,CRC status errors Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 09. " DATCRC ,Data CRC fail Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 08. " DATTOUT ,Data timeout Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 07. " DATFIN ,Data counter zero Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 06. " BUSYFIN ,Busy checks complete Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 05. " SBITERR ,Start bit error Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 04. " TFHALF ,Tx FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 03. " TFEMPTY ,Tx FIFO Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 02. " RFLAST ,Rx FIFO Interrupt Enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 01. " RFFULL ,Rx FIFO Full Interrupt Enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 00. " RFHALF ,Rx FIFO Half Interrupt Enable" "Disabled,Enabled"
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
tree "MMC/SD/SDIO Controller"
|
|
base ad:0x5a000000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "SDICON,SDI Control Register"
|
|
bitfld.long 0x00 8. " SDreset ,SDMMC reset" "Normal,Reset"
|
|
bitfld.long 0x00 6.--7. " HoldMgn ,Hold margin" "1/2 PCLK,1 PCLK,3/2 PCLK,2 PCLK"
|
|
textline " "
|
|
bitfld.long 0x00 5. " CTYP ,Clock type" "SD,MMC"
|
|
bitfld.long 0x00 4. " ByteOrder ,Byte order type" "Type A,Type B"
|
|
textline " "
|
|
bitfld.long 0x00 3. " RcvIOInt ,Receive SDIO interrupt from card" "Ignored,Received"
|
|
bitfld.long 0x00 2. " RWaitEn ,Read wait enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENCLK ,Clock out enable" "Disabled,Enabled"
|
|
group.long 0x04++0x3
|
|
line.byte 0x00 "SDIPRE,SDI Baud Rate Prescaler Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PV ,Prescaler value"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "SDICMDARG,SDI Command Argument Register"
|
|
hexmask.long 0x00 0.--31. 1. " CmdArg ,Command argument"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "SDICMDCON,SDI Command Control Register"
|
|
bitfld.long 0x00 12. " AbortCmd ,Abort command" "Normal,Abort"
|
|
bitfld.long 0x00 11. " WithData ,Command with data" "Without,With"
|
|
textline " "
|
|
bitfld.long 0x00 10. " LongRsp ,Response size" "Short,Long"
|
|
bitfld.long 0x00 9. " WaitRsp ,Wait response" "No response,Wait"
|
|
textline " "
|
|
bitfld.long 0x00 8. " CMST ,Command operation start" "Ready,Started"
|
|
hexmask.long.byte 0x00 0.--7. 1. " CmdIndex ,Command Index"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "SDICMDSTA,SDI Command Status Register"
|
|
eventfld.long 0x00 12. " RspCrc ,Response CRC fail" "Not detected,Detected"
|
|
eventfld.long 0x00 11. " CmdSent ,Command sent" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 10. " CmdTout ,Command time out" "Not detected,Detected"
|
|
eventfld.long 0x00 9. " RspFin ,Response receive" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 8. " CmdOn ,CMD line progress on" "Not detected,In progress"
|
|
hexmask.long.byte 0x00 0.--7. 1. " RspIndex ,Response index 6bit with start 2bit(8bit)"
|
|
if (((d.l(ad:(0x5a000000+0xc)))&0x400)==0x400)
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "SDIRSP0,SDI Response Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " Response0 ,Card status[127:96]"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "SDIRSP1,SDI Response Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " Response1 ,Card status[64:95]"
|
|
rgroup.long 0x1c++0x3
|
|
line.long 0x00 "SDIRSP2,SDI Response Register 2"
|
|
hexmask.long 0x00 0.--31. 1. " Response2 ,Card status[63:32]"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x00 "SDIRSP3,SDI Response Register 3"
|
|
hexmask.long 0x00 0.--31. 1. " Response3 ,Card status[31:0]"
|
|
else
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "SDIRSP0,SDI Response Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " Response0 ,Card status[31:0]"
|
|
rgroup.long 0x18++0x3
|
|
line.long 0x00 "SDIRSP1,SDI Response Register 1"
|
|
hexmask.long.byte 0x00 24.--31. 1. " RCRC7 ,CRC7"
|
|
rgroup.long 0x1c++0x3
|
|
hide.long 0x00 "SDIRSP2,SDI Response Register 2"
|
|
rgroup.long 0x20++0x3
|
|
hide.long 0x00 "SDIRSP3,SDI Response Register 3"
|
|
endif
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "SDIDTIMER,SDI Data / Busy Timer Register"
|
|
hexmask.long.tbyte 0x00 0.--22. 1. " DataTimer ,Data / busy timeout period"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "SDIBSIZE,SDI Block Size Register"
|
|
hexmask.long.word 0x00 0.--11. 1. " BlkSize ,Block size value"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "SDIDATCON,SDI Data Control Register"
|
|
bitfld.long 0x00 24. " Burst4 ,Burst4 enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 22.--23. " DataSize ,Date size" "Byte,Halfword,Word,?..."
|
|
textline " "
|
|
bitfld.long 0x00 21. " PrdType ,SDIO interrupt period type" "2 cycles,> 2 cycles"
|
|
bitfld.long 0x00 20. " TARSP ,Transmit after response" "After DatMode,After response"
|
|
textline " "
|
|
bitfld.long 0x00 19. " RACMD ,Receive after command" "After DatMode,After command"
|
|
bitfld.long 0x00 18. " BACMD ,Busy after command" "After DatMode,After command"
|
|
textline " "
|
|
bitfld.long 0x00 17. " BlkMode ,Block mode" "Stream,Block"
|
|
bitfld.long 0x00 16. " WideBus ,Wide bus enable" "Standard,Wide"
|
|
textline " "
|
|
bitfld.long 0x00 15. " EnDMA ,Enable DMA" "Disabled,Enabled"
|
|
bitfld.long 0x00 14. " DTST ,Data transfer start" "Ready,Started"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " DatMode ,Data transfer mode" "No operation,Busy check,Data receive,Data transmit"
|
|
hexmask.long.word 0x00 0.--11. 1. " BlkNum ,Block number"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x00 "SDIDATCNT,SDI Data Remain Counter Register"
|
|
hexmask.long.word 0x00 12.--23. 1. " BlkNumCnt ,Remaining block number"
|
|
hexmask.long.word 0x00 0.--11. 1. " BlkCnt ,Remaining data byte of 1 block"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "SDIDATSTA,SDI Data Status Register"
|
|
eventfld.long 0x00 11. " NoBusy ,No Busy signal" "Not detected,Detected"
|
|
eventfld.long 0x00 10. " RWaitReq ,Read wait request occurred" "Not occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 9. " IOIntDet ,SDIO interrupt detect" "Not detected,Detected"
|
|
eventfld.long 0x00 7. " CrcSta ,CRC status fail" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 6. " DatCrc ,Data receive CRC fail" "Not detected,Detected"
|
|
eventfld.long 0x00 5. " DatTout ,Data time out" "Not detected,Detected"
|
|
textline " "
|
|
eventfld.long 0x00 4. " DatFin ,Data transfer finish" "Not detected,Detected"
|
|
eventfld.long 0x00 3. " BusyFin ,Busy finish" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TxDatOn ,Tx data progress on" "Not active,In progress"
|
|
bitfld.long 0x00 0. " RxDatOn ,Rx data progress on" "Not active,In progress"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "SDIFSTA,SDI FIFO Status Register"
|
|
bitfld.long 0x00 16. " FRST ,FIFO reset" "Normal,Reset"
|
|
bitfld.long 0x00 14.--15. " FFfail ,FIFO fail error" "Not detected,Failed,Failed in last transfer,?..."
|
|
textline " "
|
|
bitfld.long 0x00 13. " TFDET ,FIFO available detect for Tx" "Not detected,Detected"
|
|
bitfld.long 0x00 12. " RFDET ,FIFO available detect for Rx" "Not detected,Detected"
|
|
textline " "
|
|
bitfld.long 0x00 11. " TFHalf ,Tx FIFO half full" "33<=Tx FIFO<=64,0<=Tx FIFO<=32"
|
|
bitfld.long 0x00 10. "TFEmpty ,Tx FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
eventfld.long 0x00 9. " RFLast ,Rx FIFO last data ready" "Not received,Received"
|
|
bitfld.long 0x00 8. " RFFFull ,Rx FIFO full" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 7. " RFHalf ,Rx FIFO half full" "0<=Rx FIFO<=31,32<=Rx FIFO<=64"
|
|
hexmask.long.byte 0x00 0.--6. 1. "FFCNT ,FIFO count"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "SDIINTMSK,SDI Interrupt Mask Register"
|
|
bitfld.long 0x00 18. " NoBusyInt ,NoBusy interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " RspCrcInt ,RspCrc interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 16. " CmdSentInt ,CmeSent interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 15. " CmdToutInt ,CmdTout interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 14. " RspEndInt ,RspEnd interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 13. " RWReqInt ,RwaitReq interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " IntDetInt ,IOIntDet interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 11. " FFfailInt ,FFfail interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 10. " CrcStaInt ,CrcSta interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 9. " DatCrcInt ,DatCrc interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 8. " DatToutInt ,DatTout interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " DatFinInt ,DatFin interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BusyFinInt ,BusyFin interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " TFHalfInt ,TFHalf interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 3. " TFEmptInt ,TFEmpty interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 2. " RFLastInt ,RFLast interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 1. " RFFullInt ,RFFull interrupt enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " RFHalfInt ,RFHalf interrupt enable" "Disabled,Enabled"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "SDIDAT,SDI Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data transmitted or received over SDI Channel"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree "IIC-Bus Interface"
|
|
base ad:0x54000000
|
|
sif (cpu()=="S3C2410X")
|
|
group 0x00++0x03
|
|
line.long 0x00 "IICCON,IIC-Bus control register"
|
|
bitfld.long 0x00 07. " AG ,IIC-bus acknowledge enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 06. " TXCS ,Source clock of IIC-bus transmit clock prescaler selection bit" "fpclk /16,fpclk /512"
|
|
bitfld.long 0x00 05. " TXRXINT ,IIC-Bus Tx/Rx interrupt enable/disable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 04. " IPF ,Interrupt pending flag-IIC-bus Tx/Rx interrupt pending flag(RD/WR)" "Not pending/Clear,Pending/(N/A)"
|
|
textline " "
|
|
hexmask.long.byte 0x00 00.--03. 1. " TCV ,Transmit clock value"
|
|
group 0x04++0x03
|
|
line.long 0x00 "IICSTAT,IIC-Bus control/status register"
|
|
bitfld.long 0x00 06.--07. " MS ,Mode selection" "Slave receive,Slave transmit,Master receive,Master transmit"
|
|
bitfld.long 0x00 05. " BBSS ,IIC-Bus busy signal status bit(RD/WR)" "Not busy/Stop,Busy/Start"
|
|
bitfld.long 0x00 04. " SO ,IIC-bus data output enable/disable bit" "Disabled,Enabled"
|
|
bitfld.long 0x00 03. " ASF ,IIC-bus arbitration procedure status flag bit" "Succesfull,Failed"
|
|
textline " "
|
|
bitfld.long 0x00 02. " AASSF ,IIC-bus address-as-slave status flag bit" "Cleared,IICADD"
|
|
bitfld.long 0x00 01. " AZSF ,IIC-bus address zero status flag bit" "Cleared,0x00000000"
|
|
bitfld.long 0x00 00. " LRSF ,IIC-bus last-received bit status flag bit" "ACK received,ACK not received"
|
|
group 0x08++0x03
|
|
line.long 0x00 "IICADD,IIC-Bus address register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " SA ,7-bit slave address latched from the IIC-bus"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "IICDS,IIC-Bus transmit/receive data shift register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " DS ,Data shift register for IIC-bus Tx/Rx operation"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 9.
|
|
group.long 0x00++0x3
|
|
line.byte 0x00 "IICCON,IIC-Bus Control Register"
|
|
bitfld.byte 0x00 7. " ACKGEN ,Acknowledge generation" "Disabled,Enabled"
|
|
bitfld.byte 0x00 6. " TXCLKSRC ,Tx clock source selection" "fPCLK/16,fPCLK/512"
|
|
bitfld.byte 0x00 5. " TXRXINT ,Tx/Rx interrupt" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 4. " INTPND ,Interrupt pending flag" "Not pending,Pending"
|
|
bitfld.byte 0x00 0.--3. " TCV ,Transmit clock value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
|
|
group.long 0x04++0x3
|
|
line.byte 0x00 "IICSTAT,IIC-Bus Control/Status Register"
|
|
bitfld.byte 0x00 6.--7. " MODE ,Mode selection" "Slave receive,Slave transmit,Master receive,Master transmit"
|
|
bitfld.byte 0x00 5. " BUSY ,Busy signal status" "Not busy,Busy"
|
|
bitfld.byte 0x00 4. " SOUT ,Data output enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " ARBST ,Arbitration status flag" "Successful,Failed"
|
|
bitfld.byte 0x00 2. " ADRSLST ,Address-as-slave status flag" "Cleared,Received"
|
|
bitfld.byte 0x00 1. " ADRZRST ,Address zero status flag" "Cleared,Received"
|
|
textline " "
|
|
bitfld.byte 0x00 0. " LRS ,Last-received bit status flag" "Low,High"
|
|
group.long 0x08++0x3
|
|
line.byte 0x00 "IICADD,IIC-Bus Address Register"
|
|
hexmask.byte 0x00 0.--7. 1. " SLADR , Slave sddress"
|
|
group.long 0x0c++0x3
|
|
line.byte 0x00 "IICDS,IIC-Bus Transmit/Receive Data Shift Register"
|
|
hexmask.byte 0x00 0.--7. 1. " DATASF ,Data shift"
|
|
sif (cpu()=="S3C2416"||cpu()=="S3C2450")
|
|
group.long 0x10++0x3
|
|
line.byte 0x00 "IICLC,IIC Multi-Master Line Control Register"
|
|
bitfld.byte 0x00 2. " FLT_EN ,IIC-Bus filter enable bit" "Disabled,Enabled"
|
|
bitfld.byte 0x00 0.--1. " SDA_O_D ,IIC-Bus line delay lengthj selection bits" "0 clocks,5 clocks,10 clocks,15 clocks"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree "IIS-Bus Interface"
|
|
base ad:0x55000000
|
|
sif (cpu()=="S3C2410X")
|
|
width 9.
|
|
group 0x00++0x03
|
|
line.long 0x00 "IISCON,IIS control register"
|
|
bitfld.long 0x00 08. " LRCI ,Left/Right channel index" "Left,Right"
|
|
bitfld.long 0x00 07. " TFRF ,Transmit FIFO ready flag" "Empty,Not empty"
|
|
bitfld.long 0x00 06. " RFRF ,Receive FIFO ready flag" "Full,Not full"
|
|
bitfld.long 0x00 05. " TDSR ,Transmit DMA service request" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 04. " RDSR ,Receive DMA service request" "Disabled,Enabled"
|
|
bitfld.long 0x00 03. " TCIC ,Transmit channel idle command" "Not idle,Idle"
|
|
bitfld.long 0x00 02. " RCIC ,Receive channel idle command" "Not idle,Idle"
|
|
bitfld.long 0x00 01. " PSC ,IIS prescaler" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 00. " IF ,IIS interface" "Disabled,Enabled"
|
|
group 0x04++0x03
|
|
line.long 0x00 "IISMOD,IIS mode register"
|
|
bitfld.long 0x00 08. " MSM ,Master/slave mode select" "Master,Slave"
|
|
bitfld.long 0x00 06.--07. " TRM ,Transmit/receive mode select" "No transfer,Receive,Transmit,Both"
|
|
bitfld.long 0x00 05. " AL ,Active level of left/right channel" "Low/High,High/Low"
|
|
bitfld.long 0x00 04. " SIF ,Serial interface format" "IIS compatible,MSB jusified"
|
|
textline " "
|
|
bitfld.long 0x00 03. " WIDTH ,Serial data bit per channel" "8-bit,16-bit"
|
|
bitfld.long 0x00 02. " MCF ,Master clock frequency select (fs: sampling frequency)" "256fs,384fs"
|
|
bitfld.long 0x00 00.--01. " SBCF ,Serial bit clock frequency select (fs: sampling frequency)" "16fs,32fs,48fs,N/A"
|
|
group 0x08++0x03
|
|
line.long 0x00 "IISPSR ,IIS prescaler register"
|
|
hexmask.long.byte 0x00 05.--09. 1. " PCA ,Prescaler control A:0-31"
|
|
hexmask.long.byte 0x00 00.--04. 1. " PCB ,Prescaler control B:0-31"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "IISFCON,IIS FIFO interface register"
|
|
bitfld.long 0x00 15. " TFAM ,Transmit FIFO access mode select" "Normal,DMA"
|
|
bitfld.long 0x00 14. " RFAM ,Receive FIFO access mode select" "Normal,DMA"
|
|
bitfld.long 0x00 13. " TXFIFO ,Transmit FIFO" "Disabled,Enabled"
|
|
bitfld.long 0x00 12. " RXFIFO ,Receive FIFO" "Disabled,Enabled"
|
|
textline " "
|
|
hexmask.long.byte 0x00 06.--11. 1. " TXFAC ,Transmit FIFO data count(Read only)"
|
|
hexmask.long.byte 0x00 00.--05. 1. " RXFDC ,Receive FIFO data count(Read only)"
|
|
group 0x10++0x03
|
|
line.long 0x00 "IISFIFO,IIS FIFO register"
|
|
hexmask.long.word 0x00 00.--15. 1. " FENTRY ,Transmit/Receive data for IIS"
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
width 8.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "IISCON,IIS Interface Control Register"
|
|
bitfld.long 0x00 10. " FTXEMPT ,Tx FIFO empty status" "Not empty,Empty"
|
|
bitfld.long 0x00 9. " FRXEMPT ,Rx FIFO empty status" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.long 0x00 8. " FTXFULL ,Tx FIFO full status" "Not full,Full"
|
|
bitfld.long 0x00 7. " FRXFULL ,Rx FIFO full status" "Not full,Full"
|
|
textline " "
|
|
bitfld.long 0x00 6. " TXDMAPAUSE ,Tx DMA operation pause command" "Not paused,Paused"
|
|
bitfld.long 0x00 5. " RXDMAPAUSE ,Rx DMA operation pause command" "Not paused,Paused"
|
|
textline " "
|
|
bitfld.long 0x00 4. " TXCHPAUSE ,Tx channel operation pause command" "Not paused,Paused"
|
|
bitfld.long 0x00 3. " RXCHPAUSE ,Rx channel operation pause command" "Not paused,Paused"
|
|
textline " "
|
|
bitfld.long 0x00 2. " TXDMAACTIVE ,Tx DMA active" "Inactive,Active"
|
|
bitfld.long 0x00 1. " RXDMAACTIVE ,Rx DMA active" "Inactive,Active"
|
|
textline " "
|
|
bitfld.long 0x00 0. " IISACTIVE ,IIS interface active" "Inactive,Active"
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "IISMOD,IIS Interface Mode Register"
|
|
bitfld.long 0x00 10.--11. " IMS ,IIS master/slave mode" "Internal master,External master,Slave,Slave"
|
|
bitfld.long 0x00 8.--9. " TXR ,Transmit or receive mode" "Transmit,Receive,Both,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " LRP ,Left/Right channel clock polarity select" "Low-left/High-right,High-left/Low-right"
|
|
bitfld.long 0x00 5.--6. " SDF ,Serial data format" "IIS,MSB-justified,LSB-justified,?..."
|
|
textline " "
|
|
bitfld.long 0x00 3.--4. " RFS ,IIS root clock frequency" "256 fs,512 fs,384 fs,768 fs"
|
|
bitfld.long 0x00 1.--2. " BFS ,Bit clock frequency" "32 fs,48 fs,16 fs,24 fs"
|
|
textline " "
|
|
bitfld.long 0x00 0. " BLC ,Bit length per channel" "16-bit,8-bit"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "IISFIC,IIS Interface FIFO Control Register"
|
|
bitfld.long 0x00 15. " TFLUSH ,Tx FIFO flush command" "Not flushed,Flushed"
|
|
bitfld.long 0x00 8.--12. " FTXCNT ,Tx FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
textline " "
|
|
bitfld.long 0x00 7. " RFLUSH ,Rx FIFO flush command" "Not flushed,Flushed"
|
|
bitfld.long 0x00 0.--4. " FRXCNT ,Rx FIFO data count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "IISPSR,IIS Interface Clock Divider Control Register"
|
|
bitfld.long 0x00 15. " PSRAEN ,Prescaler A active" "Inactive,Active"
|
|
bitfld.long 0x00 8.--13. " PSVALA ,Prescaler A division value" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64"
|
|
if (((d.l(ad:(0x55000000+0x4)))&0x01)==0x00)
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IISTXD,IIS Interface Transmit Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " IISRXDL ,Left channel Tx FIFO read data"
|
|
hexmask.long.word 0x00 0.--15. 1. " IISRXDR ,Right channel Tx FIFO read data"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "IISRXD,IIS Interface Receive Data Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " IISTXDL ,Left channel Tx FIFO write data"
|
|
hexmask.long.word 0x00 0.--15. 1. " IISTXDR ,Right channel Tx FIFO write data"
|
|
else
|
|
wgroup.long 0x10++0x3
|
|
line.long 0x00 "IISTXD,IIS Interface Transmit Data Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IISRXDL ,Left channel Tx FIFO read data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IISRXDR ,Right channel Tx FIFO read data"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x00 "IISRXD,IIS Interface Receive Data Register"
|
|
hexmask.long.byte 0x00 16.--23. 1. " IISTXDL ,Left channel Tx FIFO write data"
|
|
hexmask.long.byte 0x00 0.--7. 1. " IISTXDR ,Right channel Tx FIFO write data"
|
|
endif
|
|
width 0xb
|
|
endif
|
|
tree.end
|
|
tree.open "SPI Interface"
|
|
base ad:0x59000000
|
|
sif (cpu()=="S3C2410X")
|
|
tree "SPI0"
|
|
group 0x00++0x03
|
|
line.long 0x00 "SPCON0,SPI channel 0 control register"
|
|
bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..."
|
|
bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master"
|
|
bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B"
|
|
bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled"
|
|
group 0x04++0x03
|
|
line.long 0x00 "SPSTA0,SPI channel 0 status register"
|
|
bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not ready,Ready"
|
|
group 0x08++0x03
|
|
line.long 0x00 "SPPIN0,SPI channel 0 pin control register"
|
|
bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive"
|
|
group 0x0c++0x03
|
|
line.long 0x00 "SPPRE0,SPI cannel 0 baud rate prescaler register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value"
|
|
group 0x10++0x03
|
|
line.long 0x00 "SPTDAT0,SPI channel 0 Tx data register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data"
|
|
group 0x14++0x03
|
|
line.long 0x00 "SPRDAT0,SPI channel 0 Rx data register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data"
|
|
tree.end
|
|
tree "SPI1"
|
|
group 0x20++0x03
|
|
line.long 0x00 "SPCON1,SPI channel 1 control register"
|
|
bitfld.long 0x00 05.--06. " SMOD ,SPI Mode Select" "Polling,Interrupt,DMA,?..."
|
|
bitfld.long 0x00 04. " ENSCK ,SCK Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 03. " MSTR ,Master/Slave Select" "Slave,Master"
|
|
bitfld.long 0x00 02. " CPOL ,Clock Polarity Select" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 01. " CPHA ,Clock Phase Select" "Format A,Format B"
|
|
bitfld.long 0x00 00. " TAGD ,Tx Auto Garbage Data mode enable" "Normal,Enabled"
|
|
group 0x24++0x03
|
|
line.long 0x00 "SPSTA1,SPI channel 1 status register"
|
|
bitfld.long 0x00 02. " DCOL ,Data Collision Error Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 01. " MULF ,Multi Master Error Flag" "Not detected,Detected"
|
|
bitfld.long 0x00 00. " REDY ,Transfer Ready Flag" "Not detected,Detected"
|
|
group 0x28++0x03
|
|
line.long 0x00 "SPPIN1,SPI channel 1 pin control register"
|
|
bitfld.long 0x00 02. " ENMUL ,Multi Master error detect Enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 00. " KEEP ,Master Out Keep" "Released,MOSI drive"
|
|
group 0x2c++0x03
|
|
line.long 0x00 "SPPRE1,SPI cannel 1 baud rate prescaler register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " PV ,Prescaler Value"
|
|
group 0x30++0x03
|
|
line.long 0x00 "SPTDAT1,SPI channel 1 Tx data register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " TXDAT ,Tx Data"
|
|
group 0x34++0x03
|
|
line.long 0x00 "SPRDAT1,SPI channel 1 Rx data register"
|
|
hexmask.long.byte 0x00 00.--07. 1. " RXDAT ,Rx Data"
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
tree "SPI0"
|
|
base ad:0x59000000
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "SPCON0,SPI Channel 0 Control Register"
|
|
bitfld.word 0x00 14.--15. " RXFIFORB ,Rx FIFO remaining byte control" "2-byte,4-byte,12-byte,14-byte"
|
|
bitfld.word 0x00 12.--13. " TXFIFORB ,Tx FIFO remaining byte control" "2-byte,4-byte,12-byte,14-byte"
|
|
textline " "
|
|
bitfld.word 0x00 11. " RXFIFORST ,Rx FIFO reset control" "No reset,Reset"
|
|
bitfld.word 0x00 10. " TXFIFORST ,Tx FIFO reset control" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RXFIFOEN ,SPI Rx FIFO enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TXFIFOEN ,SPI Tx FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " DIRC ,Transfer direction" "Tx,Rx"
|
|
bitfld.word 0x00 5.--6. " SMOD ,SPI mode select" "Polling,Interrupt,Buffer DMA Tx,Buffer DMA Rx"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ENSCK ,SCK enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MSTR ,Master/slave" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CPOL ,Clock polarity select" "Active high,Active low"
|
|
bitfld.word 0x00 1. " CPHA ,Clock phase select" "Format A,Format B"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TAGD ,Tx auto garbage data mode enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0x59000000))&0x8)==0x0)
|
|
rgroup.long 0x04++0x3
|
|
line.word 0x00 "SPSTA0,SPI Channel 0 Status Register"
|
|
bitfld.word 0x00 11. " RXFIFOAF ,Rx FIFO almost full" "Not almost full,Almost full"
|
|
bitfld.word 0x00 10. " TXFIFOAE ,Tx FIFO almost empty" "Not almost empty,Almost empty"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RXFIFOFERR ,Rx FIFO full error" "No error,Error"
|
|
bitfld.word 0x00 8. " TXFIFOEERR ,Tx FIFO full error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 7. " RXFIFOFULL ,Rx FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 6. " RXFIFONEMPTY ,Rx FIFO not empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXFIFONFULL ,Tx FIFO not full" "Full,Not full"
|
|
bitfld.word 0x00 4. " TXFIFOEMPTY ,Tx FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 3. " REDY_org ,Transfer ready flag PRE" "Not ready,Ready"
|
|
bitfld.word 0x00 2. " DCOL ,Data collision error flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 0. " REDY ,Transfer ready flag" "Not ready,Ready"
|
|
group.long 0x08++0x3
|
|
line.byte 0x00 "SPPIN0,SPI Channel 0 Pin Control Register"
|
|
bitfld.byte 0x00 2. " ENMUL ,Multi master error detect enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
rgroup.long 0x04++0x3
|
|
line.word 0x00 "SPSTA0,SPI Channel 0 Status Register"
|
|
bitfld.word 0x00 11. " RXFIFOAF ,Rx FIFO almost full" "Not almost full,Almost full"
|
|
bitfld.word 0x00 10. " TXFIFOAE ,Tx FIFO almost empty" "Not almost empty,Almost empty"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 7. " RXFIFOFULL ,Rx FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 6. " RXFIFONEMPTY ,Rx FIFO not empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXFIFONFULL ,Tx FIFO not full" "Full,Not full"
|
|
bitfld.word 0x00 4. " TXFIFOEMPTY ,Tx FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 3. " REDY_org ,Transfer ready flag PRE" "Not ready,Ready"
|
|
bitfld.word 0x00 2. " DCOL ,Data collision error flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 0. " REDY ,Transfer ready flag" "Not ready,Ready"
|
|
group.long 0x08++0x3
|
|
line.byte 0x00 "SPPIN0,SPI Channel 0 Pin Control Register"
|
|
bitfld.byte 0x00 3. " FDCKEN ,Feedback clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ENMUL ,Multi master error detect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CSout , Master mode chip select output" "Active,Inactive"
|
|
bitfld.byte 0x00 0. " KEEP ,Master out keep" "Released,Previous level"
|
|
endif
|
|
group.long 0x0c++0x3
|
|
line.byte 0x00 "SPPRE0,SPI Channel 0 Baud Rate Prescaler Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PV ,Prescaler value"
|
|
if (((d.l(ad:0x59000000))&0x100)==0x0)
|
|
group.long 0x10++0x3
|
|
line.byte 0x00 "SPTDAT0,SPI Channel 0 Tx Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TxDATA ,Transmit data"
|
|
else
|
|
wgroup.long 0x18++0x3
|
|
line.byte 0x00 "SPTXFIFO0,SPI Channel 0 Tx FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TxFIFODATA ,Transmit FIFO data"
|
|
endif
|
|
if (((d.l(ad:0x59000000))&0x200)==0x0)
|
|
rgroup.long 0x14++0x3
|
|
line.byte 0x00 "SPRDAT0,SPI Channel 0 Rx Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " RxDATA ,Receive data"
|
|
else
|
|
hgroup.long 0x1c++0x3
|
|
hide.byte 0x00 "SPRXFIFO0,SPI channel 0 Rx FIFO Register"
|
|
in
|
|
endif
|
|
rgroup.long 0x20++0x3
|
|
hide.byte 0x00 "SPRDATB0,SPI Channel Rx Data Register"
|
|
in
|
|
group.long 0x24++0x3
|
|
line.word 0x00 "SPFIC0,SPI Channel 0 FIFO Interrupt And DMA Control Register"
|
|
bitfld.word 0x00 10.--11. " RXFIFODMACTL ,Rx FIFO DMA control" "Disabled,RxFIFO not empty,RxFIFO almost full,?..."
|
|
bitfld.word 0x00 8.--9. " TXFIFODMACTL ,Tx FIFO DMA control" "Disabled,TxFIFO empty,TxFIFO almost empty,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXFIFOAFIE ,Rx FIFO almost full interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " TXFIFOAFIE ,Tx FIFO almost full interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " RXFIFOFEIE ,Rx FIFO full error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TXFIFOEEIE ,Tx FIFO error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RXFIFOFLIE ,Rx FIFO full interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TXFIFOEMIE ,Tx FIFO empty interrupt enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
tree "SPI1"
|
|
base ad:0x59000100
|
|
width 11.
|
|
group.long 0x00++0x3
|
|
line.word 0x00 "SPCON1,SPI Channel 1 Control Register"
|
|
bitfld.word 0x00 14.--15. " RXFIFORB ,Rx FIFO remaining byte control" "2-byte,4-byte,12-byte,14-byte"
|
|
bitfld.word 0x00 12.--13. " TXFIFORB ,Tx FIFO remaining byte control" "2-byte,4-byte,12-byte,14-byte"
|
|
textline " "
|
|
bitfld.word 0x00 11. " RXFIFORST ,Rx FIFO reset control" "No reset,Reset"
|
|
bitfld.word 0x00 10. " TXFIFORST ,Tx FIFO reset control" "No reset,Reset"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RXFIFOEN ,SPI Rx FIFO enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 8. " TXFIFOEN ,SPI Tx FIFO enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 7. " DIRC ,Transfer direction" "Tx,Rx"
|
|
bitfld.word 0x00 5.--6. " SMOD ,SPI mode select" "Polling,Interrupt,Buffer DMA Tx,Buffer DMA Rx"
|
|
textline " "
|
|
bitfld.word 0x00 4. " ENSCK ,SCK enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 3. " MSTR ,Master/slave" "Slave,Master"
|
|
textline " "
|
|
bitfld.word 0x00 2. " CPOL ,Clock polarity select" "Active high,Active low"
|
|
bitfld.word 0x00 1. " CPHA ,Clock phase select" "Format A,Format B"
|
|
textline " "
|
|
bitfld.word 0x00 0. " TAGD ,Tx auto garbage data mode enable" "Disabled,Enabled"
|
|
if (((d.l(ad:0x59000100))&0x8)==0x0)
|
|
rgroup.long 0x04++0x3
|
|
line.word 0x00 "SPSTA1,SPI Channel 1 Status Register"
|
|
bitfld.word 0x00 11. " RXFIFOAF ,Rx FIFO almost full" "Not almost full,Almost full"
|
|
bitfld.word 0x00 10. " TXFIFOAE ,Tx FIFO almost empty" "Not almost empty,Almost empty"
|
|
textline " "
|
|
bitfld.word 0x00 9. " RXFIFOFERR ,Rx FIFO full error" "No error,Error"
|
|
bitfld.word 0x00 8. " TXFIFOEERR ,Tx FIFO full error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 7. " RXFIFOFULL ,Rx FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 6. " RXFIFONEMPTY ,Rx FIFO not empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXFIFONFULL ,Tx FIFO not full" "Full,Not full"
|
|
bitfld.word 0x00 4. " TXFIFOEMPTY ,Tx FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 3. " REDY_org ,Transfer ready flag PRE" "Not ready,Ready"
|
|
bitfld.word 0x00 2. " DCOL ,Data collision error flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 0. " REDY ,Transfer ready flag" "Not ready,Ready"
|
|
group.long 0x08++0x3
|
|
line.byte 0x00 "SPPIN1,SPI Channel 1 Pin Control Register"
|
|
bitfld.byte 0x00 2. " ENMUL ,Multi master error detect enable" "Disabled,Enabled"
|
|
textline " "
|
|
else
|
|
rgroup.long 0x04++0x3
|
|
line.word 0x00 "SPSTA1,SPI Channel 1 Status Register"
|
|
bitfld.word 0x00 11. " RXFIFOAF ,Rx FIFO almost full" "Not almost full,Almost full"
|
|
bitfld.word 0x00 10. " TXFIFOAE ,Tx FIFO almost empty" "Not almost empty,Almost empty"
|
|
textline " "
|
|
textline " "
|
|
bitfld.word 0x00 7. " RXFIFOFULL ,Rx FIFO full" "Not full,Full"
|
|
bitfld.word 0x00 6. " RXFIFONEMPTY ,Rx FIFO not empty" "Empty,Not empty"
|
|
textline " "
|
|
bitfld.word 0x00 5. " TXFIFONFULL ,Tx FIFO not full" "Full,Not full"
|
|
bitfld.word 0x00 4. " TXFIFOEMPTY ,Tx FIFO empty" "Not empty,Empty"
|
|
textline " "
|
|
bitfld.word 0x00 3. " REDY_org ,Transfer ready flag PRE" "Not ready,Ready"
|
|
bitfld.word 0x00 2. " DCOL ,Data collision error flag" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 0. " REDY ,Transfer ready flag" "Not ready,Ready"
|
|
group.long 0x08++0x3
|
|
line.byte 0x00 "SPPIN1,SPI Channel 1 Pin Control Register"
|
|
bitfld.byte 0x00 3. " FDCKEN ,Feedback clock enable" "Disabled,Enabled"
|
|
bitfld.byte 0x00 2. " ENMUL ,Multi master error detect enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.byte 0x00 1. " CSout , Master mode chip select output" "Active,Inactive"
|
|
bitfld.byte 0x00 0. " KEEP ,Master out keep" "Released,Previous level"
|
|
endif
|
|
group.long 0x0c++0x3
|
|
line.byte 0x00 "SPPRE1,SPI Channel 1 Baud Rate Prescaler Register"
|
|
hexmask.byte 0x00 0.--7. 1. " PV ,Prescaler value"
|
|
if (((d.l(ad:0x59000100))&0x100)==0x0)
|
|
group.long 0x10++0x3
|
|
line.byte 0x00 "SPTDAT1,SPI Channel 1 Tx Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TxDATA ,Transmit data"
|
|
else
|
|
wgroup.long 0x18++0x3
|
|
line.byte 0x00 "SPTXFIFO1,SPI Channel 1 Tx FIFO Register"
|
|
hexmask.byte 0x00 0.--7. 1. " TxFIFODATA ,Transmit FIFO data"
|
|
endif
|
|
if (((d.l(ad:0x59000100))&0x200)==0x0)
|
|
rgroup.long 0x14++0x3
|
|
line.byte 0x00 "SPRDAT1,SPI Channel 1 Rx Data Register"
|
|
hexmask.byte 0x00 0.--7. 1. " RxDATA ,Receive data"
|
|
else
|
|
hgroup.long 0x1c++0x3
|
|
hide.byte 0x00 "SPRXFIFO1,SPI channel 1 Rx FIFO Register"
|
|
in
|
|
endif
|
|
rgroup.long 0x20++0x3
|
|
hide.byte 0x00 "SPRDATB1,SPI Channel Rx Data Register"
|
|
in
|
|
group.long 0x24++0x3
|
|
line.word 0x00 "SPFIC1,SPI Channel 1 FIFO Interrupt And DMA Control Register"
|
|
bitfld.word 0x00 10.--11. " RXFIFODMACTL ,Rx FIFO DMA control" "Disabled,RxFIFO not empty,RxFIFO almost full,?..."
|
|
bitfld.word 0x00 8.--9. " TXFIFODMACTL ,Tx FIFO DMA control" "Disabled,TxFIFO empty,TxFIFO almost empty,?..."
|
|
textline " "
|
|
bitfld.word 0x00 5. " RXFIFOAFIE ,Rx FIFO almost full interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 4. " TXFIFOAFIE ,Tx FIFO almost full interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 3. " RXFIFOFEIE ,Rx FIFO full error interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 2. " TXFIFOEEIE ,Tx FIFO error interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.word 0x00 1. " RXFIFOFLIE ,Rx FIFO full interrupt enable" "Disabled,Enabled"
|
|
bitfld.word 0x00 0. " TXFIFOEMIE ,Tx FIFO empty interrupt enable" "Disabled,Enabled"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
tree.end
|
|
sif (cpu()=="S3C2413X")
|
|
tree "Camera Interface"
|
|
base ad:0x4d800000
|
|
width 16.
|
|
if (((d.l(ad:0x4d800000))&0x20000000)==0x00)
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "CISRCFMT,Input Source Format Register"
|
|
bitfld.long 0x00 31. " ITU601_656n ,ITU-R YCbCr 8-bit mode" "BT.656,BT.601"
|
|
bitfld.long 0x00 30. " UVOffset ,Cb Cr value offset control" "Normal,+128"
|
|
textline " "
|
|
bitfld.long 0x00 29. " In16bit ,ITU-R BT601 YCbCr 16-bit mode enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--28. 1. " SourceHsize ,Source horizontal pixel number"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " Order422 ,Input YCbCr Order Inform For Input 8/16-bit mode" "YCbYCr,YCrYCb,CbYCrY,CrYCbY"
|
|
hexmask.long.word 0x00 0.--12. 1. " SourceVsize ,Source vertical pixel number"
|
|
else
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "CISRCFMT,Input Source Format Register"
|
|
bitfld.long 0x00 31. " ITU601_656n ,ITU-R YCbCr 8-bit mode" "BT.656,BT.601"
|
|
bitfld.long 0x00 30. " UVOffset ,Cb Cr value offset control" "Normal,+128"
|
|
textline " "
|
|
bitfld.long 0x00 29. " In16bit ,ITU-R BT601 YCbCr 16-bit mode enable" "Disabled,Enabled"
|
|
hexmask.long.word 0x00 16.--28. 1. " SourceHsize ,Source horizontal pixel number"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " Order422 ,Input YCbCr order inform for input 8/16-bit mode" "CbCrCbCr,CrCbCrCb,Forbidden,Forbidden"
|
|
hexmask.long.word 0x00 0.--12. 1. " SourceVsize ,Source vertical pixel number"
|
|
endif
|
|
group.long 0x04++0x3
|
|
line.long 0x00 "CIWDOFST,Window Offset Register"
|
|
bitfld.long 0x00 31. " WinOfsEn ,Window offset enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " ClrOvCoFiY ,Clear overlow flag of input CODEC FIFO Y" "Normal,Cleared"
|
|
textline " "
|
|
hexmask.long.word 0x00 16.--26. 1. " WinHorOfst ,Window Horizontal Offset"
|
|
bitfld.long 0x00 15. " ClrOvCoFiCb ,Clear overflow flag of input CODEC FIFO Cb" "Normal,Cleared"
|
|
textline " "
|
|
bitfld.long 0x00 14. " ClrOvCoFiCr ,Clear overflow flag of input CODEC FIFO Cr" "Normal,Cleared"
|
|
hexmask.long.word 0x00 0.--10. 1. " WinVerOfst ,Window vertical offset"
|
|
width 16.
|
|
if (((d.l(ad:0x4d800000))&0xa0000000)==0x80000000)
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "CIGCTRL,Global Control Register"
|
|
bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset"
|
|
bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 27.--28. " TestPattern ,Test pattern" "External camera processor input,Color bar,Horizontal increment,Vertical increment"
|
|
textline " "
|
|
bitfld.long 0x00 26. " InvPolPCLK ,Polarity of PCLK" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " InvPolVSYNC ,Polarity of VSYNC" "Normal,Inverted"
|
|
bitfld.long 0x00 22. " IRQ_Ovfen ,Overflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " Href_mask ,Href during Vsync high mask" "Not masked,Masked"
|
|
else
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "CIGCTRL,Global Control Register"
|
|
bitfld.long 0x00 31. " SwRst ,Camera interface software reset" "No reset,Reset"
|
|
bitfld.long 0x00 30. " CamRst ,External camera processor A reset or power down control" "Low,High"
|
|
textline " "
|
|
textline " "
|
|
bitfld.long 0x00 26. " InvPolPCLK ,Polarity of PCLK" "Normal,Inverted"
|
|
textline " "
|
|
bitfld.long 0x00 25. " InvPolVSYNC ,Polarity of VSYNC" "Normal,Inverted"
|
|
bitfld.long 0x00 22. " IRQ_Ovfen ,Overflow interrupt enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " Href_mask ,Href during Vsync high mask" "Not masked,Masked"
|
|
endif
|
|
width 16.
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "CIDOWSFT2,Window Option Register 2"
|
|
hexmask.long.word 0x00 16.--26. 1. " WinHorOfst2 ,Window horizontal offset 2"
|
|
hexmask.long.word 0x00 0.--10. 1. " WinVerOfst2 ,Window vertival offset2"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "CICOYSA1,Y 1st Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CISOYSA1 ,Frame start address"
|
|
group.long 0x1c++0x3
|
|
line.long 0x00 "CICOYSA2,Y 2nd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOYSA2 ,Frame start address"
|
|
group.long 0x20++0x3
|
|
line.long 0x00 "CICOYSA3,Y 3rd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOYSA3 ,Frame start address"
|
|
group.long 0x24++0x3
|
|
line.long 0x00 "CICOYSA4,Y 4rd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOYSA4 ,Frame start address"
|
|
group.long 0x28++0x3
|
|
line.long 0x00 "CICOCBSA1,Cb 1st Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCBSA1 ,Frame start address"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "CICOCBSA2,Cb 2nd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCBSA2 ,Frame start address"
|
|
group.long 0x30++0x3
|
|
line.long 0x00 "CICOCBSA3,Cb 3rd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCBSA3 ,Frame start address"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "CICOCBSA4,Cb 4th Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCBSA4 ,Frame start address"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "CICOCRSA1,Cr 1st Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCRSA1 ,Frame start address"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "CICOCRSA2,Cr 2nd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCRSA2 ,Frame start address"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "CICOCRSA3,Cr 3rd Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCRSA3 ,Frame start address"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "CICOCRSA4,Cr 4th Frame Start Address For Codec DMA Register"
|
|
hexmask.long 0x00 0.--31. 1. " CICOCRSA4 ,Frame start address"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "CICOTRGFMT,Target Image Format Of Codec DMA Register"
|
|
bitfld.long 0x00 31. " In422_Co ,Codec scaler input image format" "4:2:0,4:2:2"
|
|
bitfld.long 0x00 30. " Ot422_Co ,Codec scaler output image format" "4:2:0,4:2:2"
|
|
textline " "
|
|
bitfld.long 0x00 29. " Interleave_Co ,Interleave on/off" "Off,On"
|
|
hexmask.long.word 0x00 16.--28. 1. " TargetHsize_Co ,Horizontal pixel number of target image for codec DMA"
|
|
textline " "
|
|
bitfld.long 0x00 14.--15. " FlipMd_Co ,Image mirror and rotation for codec DMA" "Normal,X-axis,Y-axis,180 deg rotation"
|
|
hexmask.long.word 0x00 0.--12. 1. " TargetVsize_Co ,Vertical pixel number of target image for codec DMA"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "CICOCTRL,Codec DMA Control Related Register"
|
|
bitfld.long 0x00 19.--23. " Yburst1_Co ,Main burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 14.--18. " Yburst2_Co ,Remained burst length for codec Y frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 9.--13. " Cburst1_Co ,Main burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
bitfld.long 0x00 4.--8. " Cburst2_Co ,Remained burst length for codec Cb/Cr frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
textline " "
|
|
bitfld.long 0x00 2. " LastIRQEn_Co ,Enable last IRQ at the and of frame capture" "Normal,Enabled"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "CICOSCPRERATIO,Codec Pre-Scaler Ratio Control Register"
|
|
bitfld.long 0x00 28.--31. " SHfactor_Co ,Shift factor for codec pre-scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
hexmask.long.byte 0x00 16.--22. 1. " PreHorRatio_Co ,Horizontal ratio of codec pre-scaler"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--6. 1. " PreVerRatio_Co ,Vertical ratio of codec pre-scaler"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "CICOSCPREDST,Codec Pre-Scaler Destination Format"
|
|
hexmask.long.word 0x00 16.--27. 1. " PreDstWidth_Co ,Destination width for codec pre-scaler"
|
|
hexmask.long.word 0x00 0.--11. 1. " PreDstHeight_Co ,Detination height for codec pre-scaler"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "CICOSCCTRL,Codec Main-Scaler Control Register"
|
|
bitfld.long 0x00 31. " ScalerBypass_Co ,Codec scaler bypass" "Not bypassed,Bypassed"
|
|
bitfld.long 0x00 30. " ScaleUp_H_Co ,Horizontal scale up/down flag for codec scaler" "Down,Up"
|
|
textline " "
|
|
bitfld.long 0x00 29. " ScaleUp_V_Co ,Vertical scale up/down flag for codec scaler" "Down,Up"
|
|
hexmask.long.word 0x00 16.--24. 1. " MainHorRatio_Co ,Horizontal scale ratio for codec main-scaler"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " MainVerRatio_Co ,Vertical scale ratio for codec main-scaler"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "CICOTAREA,Codec Pre-Scaper Destination Format Register"
|
|
hexmask.long 0x00 0.--25. 1. " CICOTAREA ,Target area for codec DMA"
|
|
rgroup.long 0x64++0x3
|
|
line.long 0x00 "CICOSTATUS,Codec Path Status Register"
|
|
bitfld.long 0x00 31. " OvFiY_Co ,Overflow state of codec FIFO Y" "No overflow,Overflow"
|
|
bitfld.long 0x00 30. " OvFiCb_Co ,Overflow state of codec FIFO Cb" "No overflow,Overflow"
|
|
textline " "
|
|
bitfld.long 0x00 29. " OvFiCr_Co ,Overflow state of codec FIFO Cr" "No overflow,Overflow"
|
|
bitfld.long 0x00 28. " VSYNC ,Camera VSYNC" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 26.--27. " FrameCnt_Co ,Frame count of codec DMA" "1,2,3,4"
|
|
bitfld.long 0x00 25. " WinOfstEn_Co ,Window offset enable status" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 23.--24. " FlipMd_Co ,Flip mode of codec DMA" "0,1,2,3"
|
|
bitfld.long 0x00 22. " ImgCptEn_CamIf ,Image capture enable of camera interface" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " ImgCptEn_CoSC ,Image capture enable of codec path" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " VSYNC_A ,External camera A VSYNC" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 19. " VSYNC_B ,External camera B VSYNC" "Low,High"
|
|
if (((d.l(ad:(0x4d800000+0xa0)))&0x4000000)==0x0)
|
|
group.long 0xa0++0x3
|
|
line.long 0x00 "CIIMGCPT,Image Capture Enable Command Register"
|
|
bitfld.long 0x00 31. " ImgCptEn ,Camera interface global capture enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " Cpt_CoDMA_Sel ,Codec DMA output format" "RGB 16/24 bit,YCbCr 4:2:2/4:2:0"
|
|
textline " "
|
|
bitfld.long 0x00 25. " Cpt_CoDMA_RGBFMT ,Codec DMA RGB format" "24 bit,16 bit"
|
|
bitfld.long 0x00 24. " Cpt_CoDMA_En ,Capture codec DMA frame control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " Cpt_CoDMA_Mod ,Capture codec DMA mode" "Cpt_CoDMA_Cnt,Cpt_CoDMA_En"
|
|
hexmask.long.byte 0x00 10.--17. 1. " Cpt_CoDMA_Cnt ,Wanted number of frames to be captured"
|
|
else
|
|
group.long 0xa0++0x3
|
|
line.long 0x00 "CIIMGCPT,Image Capture Enable Command Register"
|
|
bitfld.long 0x00 31. " ImgCptEn ,Camera interface global capture enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 26. " Cpt_CoDMA_Sel ,Codec DMA output format" "RGB 16/24 bit,YCbCr 4:2:2/4:2:0"
|
|
textline " "
|
|
bitfld.long 0x00 24. " Cpt_CoDMA_En ,Capture codec DMA frame control" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " Cpt_CoDMA_Mod ,Capture codec DMA mode" "Cpt_CoDMA_Cnt,Cpt_CoDMA_En"
|
|
hexmask.long.byte 0x00 10.--17. 1. " Cpt_CoDMA_Cnt ,Wanted number of frames to be captured"
|
|
endif
|
|
group.long 0xa4++0x3
|
|
line.long 0x00 "CICOCPTSEQ,Codec DMA Capture Sequence Related Register"
|
|
hexmask.long 0x00 0.--31. 1. " CptCoDMA_Seq ,Capture sequence pattern in Codec DMA"
|
|
group.long 0xa8++0x3
|
|
line.long 0x00 "CICOSCOS,Codec Scan Line Offset Related Register"
|
|
hexmask.long.word 0x00 16.--28. 1. " Initial_offset_Co ,Number of skipped pixels for initial offset"
|
|
hexmask.long.word 0x00 0.--12. 1. " Line_offset_Co ,Number of skipped pixels in screen of target image when scan line changed"
|
|
group.long 0xb0++0x3
|
|
line.long 0x00 "CIIMGEFF,Image Effects Related Register"
|
|
bitfld.long 0x00 26.--28. " FIN ,Image effect selection" "Bypassed,Arbitrary Cb/Cr,Negative,Art freeze,Embossing,Silhouette,?..."
|
|
hexmask.long.byte 0x00 13.--20. 1. " PAT_Cb ,PAT_Cb"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--7. 1. " PAT_Cr ,PAT_Cr"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
sif ((cpu()=="S3C2413X")||(cpu()=="S3C2412X"))
|
|
tree "ATA Controller"
|
|
base ad:0x4b800000
|
|
width 17.
|
|
group.long 0x00++0x3
|
|
line.long 0x00 "ATA_CONTROL,ATA Control Register"
|
|
bitfld.long 0x00 1. " Clk_down_ready ,Status for clock down" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " ATA_enable ,ATA enable" "Disabled,Enabled"
|
|
rgroup.long 0x04++0x3
|
|
line.long 0x00 "ATA_STATUS,ATA Status Register"
|
|
bitfld.long 0x00 4. " ATAdev_irq ,ATA interrupt signal line" "Low,High"
|
|
bitfld.long 0x00 3. " ATAdev_iordy ,ATA iordy signal line" "Low,High"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATAdev_dmareq ,ATA dmareq signal line" "Low,High"
|
|
bitfld.long 0x00 0.--1. " Xfr_state ,Transfer state" "Idle,Transfer,Reserved,Wait for completion"
|
|
group.long 0x08++0x3
|
|
line.long 0x00 "ATA_COMMAND,ATA Command Register"
|
|
bitfld.long 0x00 0.--1. " Xfr_command ,ATA transfer command" "Stop,Start,Abort,Continue"
|
|
group.long 0x0c++0x3
|
|
line.long 0x00 "ATA_SWRST,ATA Software Reset"
|
|
bitfld.long 0x00 0. " ATA_swrstn ,Software reset for ATA host" "No reset,Reset"
|
|
group.long 0x10++0x3
|
|
line.long 0x00 "ATA_IRQ,ATA Interrupt Register"
|
|
bitfld.long 0x00 4. " Sbuf_empty_int ,Source buffer empty interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 3. " Tbuf_full_int ,Track buffer half full interrupt" "No interrupt,Interrupt"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATAdev_irq_int ,ATA device interrupt" "No interrupt,Interrupt"
|
|
bitfld.long 0x00 0. " Xfr_done_int ,All data transfer finished interrupt" "No interrupt,Interrupt"
|
|
group.long 0x14++0x3
|
|
line.long 0x00 "ATA_IRQ_MASK,ATA Interrupt Mask Register"
|
|
bitfld.long 0x00 4. " Sbuf_empty_int ,Source buffer empty interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 3. " Tbuf_full_int ,Track buffer half full interrupt mask" "Not masked,Masked"
|
|
textline " "
|
|
bitfld.long 0x00 2. " ATAdev_irq_int ,ATA device interrupt mask" "Not masked,Masked"
|
|
bitfld.long 0x00 0. " Xfr_done_int ,All data transfer finished interrupt mask" "Not masked,Masked"
|
|
group.long 0x18++0x3
|
|
line.long 0x00 "ATA_CFG,ATA Configuration Register"
|
|
bitfld.long 0x00 8. " Sbuf_full_mode ,Continue automatically when source buffer empty" "Continue,Paused"
|
|
bitfld.long 0x00 7. " Tbuf_full_mode ,Continue automatically when source buffer empty" "Continue,Paused"
|
|
textline " "
|
|
bitfld.long 0x00 6. " Byte_swap ,Endian type" "Little,Big"
|
|
bitfld.long 0x00 5. " ATAdev_irq_al ,Device interrupt signal level" "Active high,Active low"
|
|
textline " "
|
|
bitfld.long 0x00 4. " DMA_dir ,DMA transfer direction" "Read,Write"
|
|
bitfld.long 0x00 2.--3. " ATA_class ,ATA transfer class select" "PIO,PIO DMA,?..."
|
|
textline " "
|
|
bitfld.long 0x00 1. " ATA_iordy_en ,IORDY input extend data transfer" "Disabled,Enabled"
|
|
bitfld.long 0x00 0. " ATA_rst ,ATA device reset by host" "No reset,Reset"
|
|
group.long 0x2c++0x3
|
|
line.long 0x00 "ATA_PIO_TIME,ATA PIO Time Register"
|
|
hexmask.long.byte 0x00 12.--19. 1. " PIO_teoc ,PIO timing parameter"
|
|
hexmask.long.byte 0x00 4.--11. 1. " PIO_t2 ,PIO timing parameter"
|
|
textline " "
|
|
bitfld.long 0x00 0.--3. " PIO_t1 ,PIO timing parameter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0x34++0x3
|
|
line.long 0x00 "ATA_XFR_NUM,ATA Data Transfer Number Register"
|
|
hexmask.long 0x00 1.--31. 1. " Xfr_num ,Data transfer number"
|
|
group.long 0x38++0x3
|
|
line.long 0x00 "ATA_XFR_CNT,ATA Data Transfer Count Register"
|
|
hexmask.long 0x00 1.--31. 1. " Xfr_cnt ,Current remaining transfer counter"
|
|
group.long 0x3c++0x3
|
|
line.long 0x00 "ATA_TBUF_START,ATA Tract Buffer Start Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " Track_buffer_start ,Start address of track buffer"
|
|
group.long 0x40++0x3
|
|
line.long 0x00 "ATA_TBUF_SIZE,ATA Tract Buffer Size Register"
|
|
hexmask.long 0x00 5.--31. 1. " Track_buffer_size ,Size of track buffer"
|
|
group.long 0x44++0x3
|
|
line.long 0x00 "ATA_SBUF_START,ATA Source Buffer Start Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " Src_buffer_start ,Start address of source buffer"
|
|
group.long 0x48++0x3
|
|
line.long 0x00 "ATA_SBUF_SIZE,ATA Source Buffer Size Register"
|
|
hexmask.long 0x00 5.--31. 1. " Src_buffer_size ,Size of source buffer"
|
|
group.long 0x4c++0x3
|
|
line.long 0x00 "ATA_CADDR_TBUR,ATA Tract Buffer Current Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " Track_buf_cur_adr ,Current address of track buffer"
|
|
group.long 0x50++0x3
|
|
line.long 0x00 "ATA_CADDR_SBUF,ATA Source Buffer Current Address Register"
|
|
hexmask.long 0x00 2.--31. 0x4 " Src_buf_cur_adr ,Current address of source buffer"
|
|
group.long 0x54++0x3
|
|
line.long 0x00 "ATA_PIO_DTR,ATA PIO 16bit Data Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PIO_dev_dtr ,16-bit PIO data"
|
|
group.long 0x58++0x3
|
|
line.long 0x00 "ATA_PIO_FED,ATA PIO Feature/Error Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_fed ,8-bit PIO device feature/error"
|
|
group.long 0x5c++0x3
|
|
line.long 0x00 "ATA_PIO_SCR,ATA PIO Sector Count Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_scr ,8-bit PIO device sector count"
|
|
group.long 0x60++0x3
|
|
line.long 0x00 "ATA_PIO_LLR,ATA PIO LBA Low Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_llr ,8-bit PIO device LBA low"
|
|
group.long 0x64++0x3
|
|
line.long 0x00 "ATA_PIO_LMR,ATA PIO LBA Middle Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_lmr ,8-bit PIO device LBA middle"
|
|
group.long 0x68++0x3
|
|
line.long 0x00 "ATA_PIO_LHR,ATA PIO LBA High Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_lhr ,8-bit PIO device LBA high"
|
|
group.long 0x6c++0x3
|
|
line.long 0x00 "ATA_PIO_DVR,ATA PIO Device Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_dvr ,8-bit PIO device"
|
|
group.long 0x70++0x3
|
|
line.long 0x00 "ATA_PIO_CSD,ATA PIO Command/Status Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_csd ,8-bit PIO device command/status"
|
|
group.long 0x74++0x3
|
|
line.long 0x00 "ATA_PIO_DAD,ATA PIO Control/Alternate Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " PIO_dev_dad ,8-bit PIO device control/alternate status"
|
|
rgroup.long 0x78++0x3
|
|
line.long 0x00 "ATA_PIO_READY,ATA PIO Ready Register"
|
|
bitfld.long 0x00 1. " Dev_acc_ready ,Host start access to device register" "Not ready,Ready"
|
|
bitfld.long 0x00 0. " PIO_data_ready ,ATA_PIO_DATA register data valid" "Not valid,Valid"
|
|
group.long 0x7c++0x3
|
|
line.long 0x00 "ATA_PIO_RDATA,ATA Read Register"
|
|
hexmask.long.word 0x00 0.--15. 1. " PIO_rdata ,PIO read data"
|
|
rgroup.long 0x90++0x3
|
|
line.long 0x00 "BUS_FIFO_STATUS,Bus FIFO Status Register"
|
|
bitfld.long 0x00 16.--18. " Bus_state ,Bus state" "IDLE,BUSYW,PREP,BUSYR,PAUSER,PAUSEW,?..."
|
|
hexmask.long.byte 0x00 8.--13. 1. " Bus_FIFO_rdpnt ,Bus FIFO read pointer"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " Bus_FIFO_wrpnt ,Bus FIFO write pointer"
|
|
rgroup.long 0x94++0x3
|
|
line.long 0x00 "ATA_FIFO_STATUS,ATA FIFO Status Register"
|
|
bitfld.long 0x00 28.--30. " ATA_state ,PIO read data register while HOST read from ATA device register" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x00 26.--27. " PIO_state ,PIO state" "IDLE,T1,T2,TEOC"
|
|
textline " "
|
|
bitfld.long 0x00 24.--25. " PDMA_state ,PDMA state" "IDLE,T1,T2,TEOC"
|
|
width 0xb
|
|
tree.end
|
|
endif
|
|
else
|
|
wgroup 0x00++0x00
|
|
textline "Please select the appropriate CPU"
|
|
endif
|
|
textline ""
|