28668 lines
1.8 MiB
28668 lines
1.8 MiB
; --------------------------------------------------------------------------------
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; @Title: S32M27 On-Chip Peripherals
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; @Props: Released
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; @Author: DAB, NEJ, KRZ
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; @Changelog: 2022-01-13 DAB
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; 2023-01-12 NEJ
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; 2023-06-16 KRZ
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; 2023-10-26 NEJ
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; 2023-11-13 NEJ
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; @Manufacturer: NXP - NXP Semiconductors
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; @Doc: Generated (TRACE32, build: 164352.), based on:
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; S32M27x.svd (Ver. 1.3)
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; @Core: Cortex-M7F, Cortex-M0+
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; @Chip: S32M274-M7, S32M274-M0+-HSE, S32M276-M7, S32M276-M0+-HSE
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; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
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; --------------------------------------------------------------------------------
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; $Id: pers32m27.per 17035 2023-11-20 15:42:22Z kwisniewski $
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AUTOINDENT.ON CENTER TREE
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ENUMDELIMITER ","
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base ad:0x0
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sif (CORENAME()=="CORTEXM7F")
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tree.close "Core Registers (Cortex-M7F)"
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AUTOINDENT.PUSH
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AUTOINDENT.OFF
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tree "System Control"
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sif COMPonent.AVAILABLE("COREDEBUG")
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base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
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width 12.
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group.long 0x08++0x03
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line.long 0x00 "ACTLR,Auxiliary Control Register"
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bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes"
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bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes"
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bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes"
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textline " "
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bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..."
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bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes"
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textline " "
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bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes"
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bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes"
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bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes"
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textline " "
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bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes"
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bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes"
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bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes"
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textline ""
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group.long 0x10++0x03
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line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
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rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
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bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
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bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
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textline " "
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bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
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group.long 0x14++0x07
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line.long 0x00 "SYST_RVR,SysTick Reload Value Register"
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hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
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line.long 0x04 "SYST_CVR,SysTick Current Value Register"
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rgroup.long 0x1C++0x03
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line.long 0x00 "SYST_CALIB,SysTick Calibration value Register"
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bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
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bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
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hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
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rgroup.long 0xD00++0x03
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line.long 0x00 "CPUID,CPUID Base Register"
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hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer"
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bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..."
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bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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textline " "
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hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
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bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Patch 0,Patch 1,Patch 2,?..."
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group.long 0xD04++0x23
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line.long 0x00 "ICSR,Interrupt Control and State Register"
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bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active"
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setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending"
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textline " "
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rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled"
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rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending"
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hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt"
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textline " "
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rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent"
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hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
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line.long 0x04 "VTOR,Vector Table Offset Register"
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hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address"
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line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
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hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key"
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rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian"
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bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
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textline " "
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bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
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bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear"
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bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset"
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line.long 0x0C "SCR,System Control Register"
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bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
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bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
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bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
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line.long 0x10 "CCR,Configuration and Control Register"
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bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
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bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
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bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment"
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bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored"
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bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled"
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textline " "
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bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled"
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bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled"
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bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled"
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line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
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hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
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hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
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hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
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textline " "
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hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
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line.long 0x18 "SHPR2,System Handler Priority Register 2"
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hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
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hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
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hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
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textline " "
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hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
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line.long 0x1C "SHPR3,System Handler Priority Register 3"
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hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
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hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
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hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
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textline " "
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hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
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line.long 0x20 "SHCSR,System Handler Control and State Register"
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bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled"
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bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled"
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bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled"
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textline " "
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bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending"
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bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending"
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bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending"
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textline " "
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bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending"
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bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active"
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bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active"
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textline " "
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bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active"
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bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active"
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bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active"
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textline " "
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bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active"
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bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active"
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group.byte 0xD28++0x1
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line.byte 0x00 "MMFSR,MemManage Status Register"
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bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
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bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
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bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
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line.byte 0x01 "BFSR,Bus Fault Status Register"
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bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
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bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
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bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
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bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
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bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
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textline " "
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bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
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group.word 0xD2A++0x1
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line.word 0x00 "USAFAULT,Usage Fault Status Register"
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bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
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bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
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bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
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textline " "
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bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
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bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
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bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
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group.long 0xD2C++0x13
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line.long 0x00 "HFSR,HardFault Status Register"
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eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
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eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred"
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eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
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line.long 0x04 "DFSR,Debug Fault Status Register"
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eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred"
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eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred"
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eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
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textline " "
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eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred"
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eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred"
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line.long 0x08 "MMFAR,MemManage Fault Address Register"
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line.long 0x0C "BFAR,BusFault Address Register"
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line.long 0x10 "AFSR,Auxiliary Fault Status Register"
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group.long 0xD88++0x03
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line.long 0x00 "CPACR,Coprocessor Access Control Register"
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bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full"
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bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full"
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bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full"
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bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full"
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bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full"
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bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full"
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bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full"
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textline " "
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bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full"
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wgroup.long 0xF00++0x03
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line.long 0x00 "STIR,Software Triggered Interrupt Register"
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hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
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tree "Memory System"
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width 10.
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rgroup.long 0xD78++0x0B
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line.long 0x00 "CLIDR,Cache Level ID Register"
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bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..."
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bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..."
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bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..."
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textline " "
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bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..."
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bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..."
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bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..."
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textline " "
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bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..."
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bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..."
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bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..."
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line.long 0x04 "CTR,Cache Type Register"
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bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..."
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bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..."
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textline " "
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bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
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line.long 0x08 "CCSIDR,Cache Size ID Register"
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bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported"
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bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported"
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bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported"
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textline " "
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bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported"
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hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1"
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hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1"
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textline " "
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bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512"
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group.long 0xD84++0x03
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line.long 0x00 "CSSELR,Cache Size Selection Register"
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bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..."
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bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction"
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wgroup.long 0xF50++0x03
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line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification"
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wgroup.long 0xF58++0x1F
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line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU"
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line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)"
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line.long 0x08 "DCISW,Data cache invalidate by set/way"
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line.long 0x0C "DCCMVAU,Data cache by address to PoU"
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line.long 0x10 "DCCMVAC,Data cache clean by address to PoC"
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line.long 0x14 "DCCSW,Data cache clean by set/way"
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line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC"
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line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way"
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group.long 0xF90++0x13
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line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register"
|
|
bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB"
|
|
bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled"
|
|
bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled"
|
|
line.long 0x08 "AHBPCR,AHBP control register"
|
|
bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..."
|
|
bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled"
|
|
line.long 0x0C "CACR,L1 Cache Control Register"
|
|
bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled"
|
|
bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes"
|
|
bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled"
|
|
line.long 0x10 "AHBSCR,AHB Slave Control Register"
|
|
bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion"
|
|
bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI"
|
|
group.long 0xFA8++0x03
|
|
line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register"
|
|
bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR"
|
|
bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred"
|
|
bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred"
|
|
group.long 0xFB0++0x03
|
|
line.long 0x00 "IEBR0,Instruction Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB4++0x03
|
|
line.long 0x00 "IEBR1,Instruction Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFB8++0x03
|
|
line.long 0x00 "DEBR0,Data Error bank Register 0"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
group.long 0xFBC++0x03
|
|
line.long 0x00 "DEBR1,Data Error bank Register 1"
|
|
bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3"
|
|
bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable"
|
|
bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data"
|
|
textline " "
|
|
hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM"
|
|
bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked"
|
|
bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid"
|
|
tree.end
|
|
tree "Feature Registers"
|
|
width 10.
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
tree "CoreSight Identification Registers"
|
|
width 6.
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM7F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
newline
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
newline
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x0B
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
newline
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
newline
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
line.long 0x08 "MVFR2,Media and FP Feature Register 2"
|
|
bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..."
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
newline
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
newline
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
newline
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
newline
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
newline
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
newline
|
|
textfld " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
sif (CORENAME()=="CORTEXM0+")
|
|
tree.close "Core Registers (Cortex-M0+)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0x8
|
|
if (CORENAME()=="CORTEXM1")
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "No effect,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
else
|
|
group.long 0x10++0x0b
|
|
line.long 0x00 "STCSR,SysTick Control and Status Register"
|
|
bitfld.long 0x00 16. " COUNTFLAG ,Returns 1 if timer counted to 0" "0,1"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,Always reads as one" "External clock,Processor clock"
|
|
textline " "
|
|
bitfld.long 0x00 1. " TICKINT ,Counting down to 0 " "No SysTick,SysTick"
|
|
bitfld.long 0x00 0. " ENABLE ,Counter enable" "Disabled,Enabled"
|
|
line.long 0x04 "STRVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,Value to load into the STCVR when the counter reaches 0"
|
|
line.long 0x08 "STCVR,SysTick Current Value Register"
|
|
hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Reads return the current value of the SysTick counter"
|
|
endif
|
|
if (CORENAME()=="CORTEXM1")
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Reads as one" "0,1"
|
|
bitfld.long 0x00 30. " SKEW ,Reads as zero" "0,1"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Indicates calibration value is not known"
|
|
else
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "STCR,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the IMPL_DEF reference clock is provided" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
textline " "
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing subject to system clock skew errors"
|
|
endif
|
|
rgroup.long 0xd00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer code"
|
|
hexmask.long.byte 0x00 20.--23. 1. " VARIANT ,Implementation defined variant number"
|
|
textline " "
|
|
hexmask.long.byte 0x00 4.--15. 1. " PARTNO ,Number of processor within family"
|
|
hexmask.long.byte 0x00 0.--3. 1. " REVISION ,Implementation defined revision number"
|
|
group.long 0xd04++0x03
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Setting this bit will activate an NMI" "No effect,Set pending"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set a pending PendSV interrupt" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Clear a pending PendSV interrupt" "No effect,Clear pending"
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set a pending SysTick" "No effect,Set pending"
|
|
textline " "
|
|
bitfld.long 0x00 25. " PENDSVCLR ,Clear a pending SysTick" "No effect,Clear pending"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Pending exception service" "No service,Service"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,External interrupt pending flag" "No interrupt,Interrupt"
|
|
hexmask.long.byte 0x00 12.--17. 1. " VECTPENDING ,Active exception number field"
|
|
textline " "
|
|
hexmask.long.byte 0x00 0.--5. 1. " VECTACTIVET ,Active exception number field"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
group.long 0xd08++0x03
|
|
line.long 0x00 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x00 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
else
|
|
textline " "
|
|
endif
|
|
group.long 0xd0c++0x03
|
|
line.long 0x00 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x00 16.--31. 1. " VECTKEY ,Vector Key"
|
|
bitfld.long 0x00 15. " ENDIANNESS ,Data endianness bit" "Little-endian,Big-endian"
|
|
textline " "
|
|
bitfld.long 0x00 2. " SYSRESETREQ ,System reset setup request" "No effect,Reset"
|
|
bitfld.long 0x00 1. " VECTCLRACTIVE ,Clears all active state information" "No clear,Clear"
|
|
group.long 0xd10++0x03
|
|
line.long 0x00 "SCR,System Control Register"
|
|
bitfld.long 0x00 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x00 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
textline " "
|
|
bitfld.long 0x00 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
rgroup.long 0xd14++0x03
|
|
line.long 0x00 "CCR,Configuration and Control Register"
|
|
bitfld.long 0x00 9. " STKALIGN ,Indicates whether on exception entry all exceptions are entered with 8-byte stack alignment and the context to restore it is saved" "Reserved,Aligned"
|
|
bitfld.long 0x00 3. " UNALIGN_TRP ,Indicates that all unaligned accesses results in a Hard Fault" "Reserved,Trapped"
|
|
group.long 0xd1c++0x0b
|
|
line.long 0x00 "SHPR2,System Handler Priority Register 2"
|
|
bitfld.long 0x00 30.--31. " PRI_11 ,Priority of system handler 11-SVCall" "00,01,10,11"
|
|
line.long 0x04 "SHPR3,System Handler Priority Register 3"
|
|
bitfld.long 0x04 30.--31. " PRI_15 ,Priority of system handler 15-SysTick" "00,01,10,11"
|
|
bitfld.long 0x04 22.--23. " PRI_14 ,Priority of system handler 14- PendSV" "00,01,10,11"
|
|
line.long 0x08 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x08 15. " SVCALLPENDED ,Reads as 1 if SVCall is pending" "Not pending,Pending"
|
|
if (CORENAME()=="CORTEXM0+")
|
|
hgroup.long 0x08++0x03
|
|
hide.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
else
|
|
textline " "
|
|
endif
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit (MPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,?..."
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 8.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RR,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,-,-,-,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller (NVIC)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
tree "Interrupt Enable Registers"
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "SET/CLREN,Interrupt Set/Clear Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "SET/CLRPEN,Interrupt Set/Clear Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
tree.end
|
|
width 6.
|
|
tree "Interrupt Priority Registers"
|
|
group.long 0x400++0x1F
|
|
line.long 0x00 "INT0,Interrupt Priority Register"
|
|
bitfld.long 0x00 30.--31. " IP_3 ,Priority of interrupt 3" "0,1,2,3"
|
|
bitfld.long 0x00 22.--23. " IP_2 ,Priority of interrupt 2" "0,1,2,3"
|
|
bitfld.long 0x00 14.--15. " IP_1 ,Priority of interrupt 1" "0,1,2,3"
|
|
bitfld.long 0x00 6.--7. " IP_0 ,Priority of interrupt 0" "0,1,2,3"
|
|
line.long 0x04 "INT1,Interrupt Priority Register"
|
|
bitfld.long 0x04 30.--31. " IP_7 ,Priority of interrupt 7" "0,1,2,3"
|
|
bitfld.long 0x04 22.--23. " IP_6 ,Priority of interrupt 6" "0,1,2,3"
|
|
bitfld.long 0x04 14.--15. " IP_5 ,Priority of interrupt 5" "0,1,2,3"
|
|
bitfld.long 0x04 6.--7. " IP_4 ,Priority of interrupt 4" "0,1,2,3"
|
|
line.long 0x08 "INT2,Interrupt Priority Register"
|
|
bitfld.long 0x08 30.--31. " IP_11 ,Priority of interrupt 11" "0,1,2,3"
|
|
bitfld.long 0x08 22.--23. " IP_10 ,Priority of interrupt 10" "0,1,2,3"
|
|
bitfld.long 0x08 14.--15. " IP_9 ,Priority of interrupt 9" "0,1,2,3"
|
|
bitfld.long 0x08 6.--7. " IP_8 ,Priority of interrupt 8" "0,1,2,3"
|
|
line.long 0x0C "INT3,Interrupt Priority Register"
|
|
bitfld.long 0x0C 30.--31. " IP_15 ,Priority of interrupt 15" "0,1,2,3"
|
|
bitfld.long 0x0C 22.--23. " IP_14 ,Priority of interrupt 14" "0,1,2,3"
|
|
bitfld.long 0x0C 14.--15. " IP_13 ,Priority of interrupt 13" "0,1,2,3"
|
|
bitfld.long 0x0C 6.--7. " IP_12 ,Priority of interrupt 12" "0,1,2,3"
|
|
line.long 0x10 "INT4,Interrupt Priority Register"
|
|
bitfld.long 0x10 30.--31. " IP_19 ,Priority of interrupt 19" "0,1,2,3"
|
|
bitfld.long 0x10 22.--23. " IP_18 ,Priority of interrupt 18" "0,1,2,3"
|
|
bitfld.long 0x10 14.--15. " IP_17 ,Priority of interrupt 17" "0,1,2,3"
|
|
bitfld.long 0x10 6.--7. " IP_16 ,Priority of interrupt 16" "0,1,2,3"
|
|
line.long 0x14 "INT5,Interrupt Priority Register"
|
|
bitfld.long 0x14 30.--31. " IP_23 ,Priority of interrupt 23" "0,1,2,3"
|
|
bitfld.long 0x14 22.--23. " IP_22 ,Priority of interrupt 22" "0,1,2,3"
|
|
bitfld.long 0x14 14.--15. " IP_21 ,Priority of interrupt 21" "0,1,2,3"
|
|
bitfld.long 0x14 6.--7. " IP_20 ,Priority of interrupt 20" "0,1,2,3"
|
|
line.long 0x18 "INT6,Interrupt Priority Register"
|
|
bitfld.long 0x18 30.--31. " IP_27 ,Priority of interrupt 27" "0,1,2,3"
|
|
bitfld.long 0x18 22.--23. " IP_26 ,Priority of interrupt 26" "0,1,2,3"
|
|
bitfld.long 0x18 14.--15. " IP_25 ,Priority of interrupt 25" "0,1,2,3"
|
|
bitfld.long 0x18 6.--7. " IP_24 ,Priority of interrupt 24" "0,1,2,3"
|
|
line.long 0x1C "INT7,Interrupt Priority Register"
|
|
bitfld.long 0x1C 30.--31. " IP_31 ,Priority of interrupt 31" "0,1,2,3"
|
|
bitfld.long 0x1C 22.--23. " IP_30 ,Priority of interrupt 30" "0,1,2,3"
|
|
bitfld.long 0x1C 14.--15. " IP_29 ,Priority of interrupt 29" "0,1,2,3"
|
|
bitfld.long 0x1C 6.--7. " IP_28 ,Priority of interrupt 28" "0,1,2,3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 0xA
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Data Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,External debug request flag" "No occurred,Occurred"
|
|
eventfld.long 0x00 3. " VCATCH ,Vector catch flag" "No occurred,Occurred"
|
|
textline " "
|
|
eventfld.long 0x00 2. " DWTRAP ,Data Watchpoint flag" "No match,Match"
|
|
textline " "
|
|
eventfld.long 0x00 1. " BKPT ,BKPT flag" "No match,Match"
|
|
eventfld.long 0x00 0. " HALTED ,Halt request flag" "No request,Request"
|
|
if (CORENAME()=="CORTEXM1")
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 18. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
else
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x01)==0x00)
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not completed,Completed"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
textline " "
|
|
textfld " "
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDF0++0x03
|
|
line.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset"
|
|
bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read"
|
|
textline " "
|
|
bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1"
|
|
bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1"
|
|
textline " "
|
|
bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core Lockup Status/Debug Key" "Not locked up,Locked up"
|
|
bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core Sleep Status/Debug Key" "Not sleeping,Sleeping"
|
|
textline " "
|
|
bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted"
|
|
bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register R/W on the Debug Core Register Selector/Debug Key" "Not available,Available"
|
|
textline " "
|
|
bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked"
|
|
bitfld.long 0x00 2. " C_STEP ,Steps the core in halted debug" "Not halted,Halted"
|
|
textline " "
|
|
bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted"
|
|
bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Selector Register"
|
|
bitfld.long 0x00 16. " REGWnR ,Register Read/Write" "Read,Write"
|
|
bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,Current SP,LR,DebugReturnAddress,xPSR Flags,MSP,PSP,Reserved,CONTROL[1]/PRIMASK[0],?..."
|
|
group.long 0xDF8++0x07
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
hexmask.long 0x00 0.--31. 1. " DATA ,Data for reading and writing registers to and from the processor"
|
|
line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x04 24. " DWTENA ,Global enable or disable for the DW unit" "Disabled,Enabled"
|
|
bitfld.long 0x04 10. " VC_HARDERR ,Debug trap on a Hard Fault" "No error,Error"
|
|
textline " "
|
|
bitfld.long 0x04 0. " VC_CORERESET ,Reset Vector Catch" "No reset,Reset"
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Breakpoint Unit (BPU)"
|
|
sif COMPonent.AVAILABLE("BPU")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1))
|
|
width 8.
|
|
group.long 0x00++0x03
|
|
line.long 0x00 "BP_CTRL,Breakpoint Control Register"
|
|
bitfld.long 0x00 4.--7. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1. " KEY ,Key field" "No write,Write"
|
|
bitfld.long 0x00 0. " ENABLE ,Breakpoint unit enable bit" "Disabled,Enabled"
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "B_COMP0,Breakpoint Comparator Registers 0"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 0" "Disabled,Enabled"
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "B_COMP1,Breakpoint Comparator Registers 1"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 1" "Disabled,Enabled"
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "B_COMP2,Breakpoint Comparator Registers 2"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 2" "Disabled,Enabled"
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "B_COMP3,Breakpoint Comparator Registers 3"
|
|
bitfld.long 0x00 30.--31. " BP_MATCH ,Happens when the COMP address is matched" "No matching,Lower halfword,Upper halfword,Both halfwords"
|
|
hexmask.long 0x00 2.--28. 2. " COMP ,Comparison address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare enable for Breakpoint Comparator Register 3" "Disabled,Enabled"
|
|
else
|
|
newline
|
|
textline "BPU component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 14.
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "DW_CTRL,DW Control Register "
|
|
bitfld.long 0x00 28.--31. " NUM_CODE1 ,Number of comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rgroup.long 0x1c++0x03
|
|
line.long 0x00 "DW_PCSR,DW Program Counter Sample Register"
|
|
hexmask.long 0x00 0.--31. 1. " EIASAMPLE ,Execution instruction address sample or 0xFFFFFFFF"
|
|
group.long 0x20++0x0b
|
|
line.long 0x00 "DW_COMP0,DW Comparator Register 0"
|
|
hexmask.long 0x00 0.--31. 1. " COMP1 ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK0,DW Mask Register 0"
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION0,DW Function Register 0"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
group.long 0x30++0x0b
|
|
line.long 0x00 "DW_COMP1,DW Comparator Register 1"
|
|
hexmask.long 0x00 0.--31. 1. " COMP ,Compare against PC or the data address"
|
|
line.long 0x04 "DW_MASK1,DW Mask Register 1 "
|
|
hexmask.long.byte 0x04 0.--4. 1. " MASK ,Mask on data address when matching against COMP"
|
|
line.long 0x08 "DW_FUNCTION1,DW Function Register 1"
|
|
bitfld.long 0x08 24. " MATCHED ,Comparator match" "No match,Match"
|
|
bitfld.long 0x08 0.--3. " FUNCTION , Settings for DW Function Registers" "Disabled,Reserved,Reserved,Reserved,On PC match,Read address,Write address,R/W address,?..."
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
endif
|
|
tree "ADC"
|
|
base ad:0x0
|
|
tree "ADC_0"
|
|
base ad:0x400A0000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Main Configuration"
|
|
bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned"
|
|
newline
|
|
bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion"
|
|
bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion"
|
|
newline
|
|
bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge"
|
|
bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion"
|
|
bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable"
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newline
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bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge"
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bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion"
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newline
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bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable"
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bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion"
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newline
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eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only"
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bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable"
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newline
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bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions"
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eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted"
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newline
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eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted"
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bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated"
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newline
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bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,?"
|
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bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state"
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rgroup.long 0x4++0x3
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line.long 0x0 "MSR,Main Status"
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bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated"
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bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress"
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newline
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bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted"
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bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion"
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|
newline
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bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test"
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bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU"
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newline
|
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hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure"
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bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active"
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newline
|
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bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?"
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group.long 0x10++0x27
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line.long 0x0 "ISR,Interrupt Status"
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eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated"
|
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eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated"
|
|
newline
|
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eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated"
|
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eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated"
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newline
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eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated"
|
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line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs"
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eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete"
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newline
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eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete"
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eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete"
|
|
newline
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eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete"
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eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete"
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line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs"
|
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eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
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eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
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eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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newline
|
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eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
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eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
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eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
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newline
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eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
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eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
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|
newline
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eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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line.long 0xC "CEOCFR2,Channel End Of Conversion Flag For External Inputs"
|
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eventfld.long 0xC 31. "EIEOCF31,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 30. "EIEOCF30,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 29. "EIEOCF29,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 28. "EIEOCF28,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 27. "EIEOCF27,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 26. "EIEOCF26,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 25. "EIEOCF25,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 24. "EIEOCF24,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 23. "EIEOCF23,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 22. "EIEOCF22,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 21. "EIEOCF21,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
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eventfld.long 0xC 20. "EIEOCF20,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
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eventfld.long 0xC 19. "EIEOCF19,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 18. "EIEOCF18,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 17. "EIEOCF17,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 16. "EIEOCF16,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 15. "EIEOCF15,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 14. "EIEOCF14,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 13. "EIEOCF13,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 12. "EIEOCF12,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 11. "EIEOCF11,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 10. "EIEOCF10,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 9. "EIEOCF9,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 8. "EIEOCF8,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 7. "EIEOCF7,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 6. "EIEOCF6,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 5. "EIEOCF5,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 4. "EIEOCF4,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 3. "EIEOCF3,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 2. "EIEOCF2,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 1. "EIEOCF1,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 0. "EIEOCF0,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
line.long 0x10 "IMR,Interrupt Mask"
|
|
bitfld.long 0x10 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x10 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x10 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x10 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x10 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x14 "CIMR0,EOC Interrupt Enable For Precision Inputs"
|
|
bitfld.long 0x14 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x18 "CIMR1,EOC Interrupt Enable For Standard Inputs"
|
|
bitfld.long 0x18 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x1C "CIMR2,EOC Interrupt Enable For External Inputs"
|
|
bitfld.long 0x1C 31. "EIEOCIEN31,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 30. "EIEOCIEN30,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 29. "EIEOCIEN29,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 28. "EIEOCIEN28,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 27. "EIEOCIEN27,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 26. "EIEOCIEN26,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 25. "EIEOCIEN25,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 24. "EIEOCIEN24,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 23. "EIEOCIEN23,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 22. "EIEOCIEN22,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 21. "EIEOCIEN21,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 20. "EIEOCIEN20,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 19. "EIEOCIEN19,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 18. "EIEOCIEN18,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 17. "EIEOCIEN17,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 16. "EIEOCIEN16,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 15. "EIEOCIEN15,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 14. "EIEOCIEN14,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 13. "EIEOCIEN13,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 12. "EIEOCIEN12,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 11. "EIEOCIEN11,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 10. "EIEOCIEN10,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 9. "EIEOCIEN9,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 8. "EIEOCIEN8,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 7. "EIEOCIEN7,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 6. "EIEOCIEN6,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 5. "EIEOCIEN5,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 4. "EIEOCIEN4,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 3. "EIEOCIEN3,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 2. "EIEOCIEN2,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x1C 1. "EIEOCIEN1,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 0. "EIEOCIEN0,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x20 "WTISR,Analog Watchdog Threshold Interrupt Status"
|
|
eventfld.long 0x20 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
newline
|
|
eventfld.long 0x20 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
line.long 0x24 "WTIMR,Analog Watchdog Threshold Interrupt Enable"
|
|
bitfld.long 0x24 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x24 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x24 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x24 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "DMAE,Direct Memory Access Configuration"
|
|
bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read"
|
|
bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs"
|
|
bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered"
|
|
newline
|
|
bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered"
|
|
newline
|
|
bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered"
|
|
newline
|
|
bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered"
|
|
line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs"
|
|
bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
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bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
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bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
line.long 0xC "DMAR2,DMA Request Enable For External Inputs"
|
|
bitfld.long 0xC 31. "EIDMAREN31,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 30. "EIDMAREN30,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 29. "EIDMAREN29,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 28. "EIDMAREN28,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 27. "EIDMAREN27,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 26. "EIDMAREN26,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 25. "EIDMAREN25,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 24. "EIDMAREN24,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 23. "EIDMAREN23,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 22. "EIDMAREN22,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 21. "EIDMAREN21,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 20. "EIDMAREN20,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 19. "EIDMAREN19,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 18. "EIDMAREN18,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 17. "EIDMAREN17,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 16. "EIDMAREN16,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 15. "EIDMAREN15,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 14. "EIDMAREN14,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 13. "EIDMAREN13,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 12. "EIDMAREN12,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 11. "EIDMAREN11,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 10. "EIDMAREN10,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 9. "EIDMAREN9,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 8. "EIDMAREN8,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 7. "EIDMAREN7,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 6. "EIDMAREN6,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 5. "EIDMAREN5,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 4. "EIDMAREN4,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 3. "EIDMAREN3,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 2. "EIDMAREN2,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 1. "EIDMAREN1,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 0. "EIDMAREN0,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x60)++0x3
|
|
line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values"
|
|
hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value"
|
|
repeat.end
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "PSCR,Presampling Control"
|
|
bitfld.long 0x0 5. "PREVAL2,Presampling Voltage Select For External Inputs" "0: VREFL,1: VREFH"
|
|
bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH"
|
|
newline
|
|
bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH"
|
|
bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion"
|
|
line.long 0x4 "PSR0,Presampling Enable For Precision Inputs"
|
|
bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
line.long 0x8 "PSR1,Presampling Enable For Standard Inputs"
|
|
bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
line.long 0xC "PSR2,Presampling Enable For External Inputs"
|
|
bitfld.long 0xC 31. "PRES31,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "PRES30,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 29. "PRES29,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 28. "PRES28,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 27. "PRES27,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 26. "PRES26,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
group.long 0x94++0xB
|
|
line.long 0x0 "CTR0,Conversion Timing For Precision Inputs"
|
|
hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
line.long 0x4 "CTR1,Conversion Timing For Standard Inputs"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
line.long 0x8 "CTR2,Conversion Timing For External Inputs"
|
|
hexmask.long.byte 0x8 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
group.long 0xA4++0xB
|
|
line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs"
|
|
bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs"
|
|
bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
line.long 0x8 "NCMR2,Normal Conversion Enable For External Inputs"
|
|
bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
group.long 0xB4++0xB
|
|
line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs"
|
|
bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected"
|
|
bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected"
|
|
bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected"
|
|
bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected"
|
|
bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected"
|
|
line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs"
|
|
bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
line.long 0x8 "JCMR2,Injected Conversion Enable For External Inputs"
|
|
bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
group.long 0xC4++0x7
|
|
line.long 0x0 "DSDR,Delay Start Of Data Conversion"
|
|
hexmask.long.word 0x0 0.--15. 1. "DSD,Delay"
|
|
line.long 0x4 "PDEDR,Power Down Exit Delay"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PDED,Delay"
|
|
rgroup.long 0x100++0x1F
|
|
line.long 0x0 "PCDR0,Precision Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x4 "PCDR1,Precision Input n Conversion Data"
|
|
bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x8 "PCDR2,Precision Input n Conversion Data"
|
|
bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0xC "PCDR3,Precision Input n Conversion Data"
|
|
bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x10 "PCDR4,Precision Input n Conversion Data"
|
|
bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x14 "PCDR5,Precision Input n Conversion Data"
|
|
bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x18 "PCDR6,Precision Input n Conversion Data"
|
|
bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x1C "PCDR7,Precision Input n Conversion Data"
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bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data"
|
|
repeat 24. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x180)++0x3
|
|
line.long 0x0 "ICDR[$1],Standard Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
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bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
|
repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "ECDR[$1],External Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
|
repeat.end
|
|
group.long 0x2B0++0x3
|
|
line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs"
|
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bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
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bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
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bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
rgroup.long 0x2B4++0x3
|
|
line.long 0x0 "CWSELRPI1,Channel Analog Watchdog Select For Precision Inputs"
|
|
group.long 0x2C0++0xB
|
|
line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs"
|
|
bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs"
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bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs"
|
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bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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group.long 0x2D0++0x1B
|
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line.long 0x0 "CWSELREI0,Channel Analog Watchdog Select For External inputs"
|
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bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
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bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
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line.long 0x4 "CWSELREI1,Channel Analog Watchdog Select For External inputs"
|
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bitfld.long 0x4 28.--29. "WSEL_SI1_15,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 24.--25. "WSEL_SI1_14,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x4 20.--21. "WSEL_SI1_13,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 16.--17. "WSEL_SI1_12,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x4 12.--13. "WSEL_SI1_11,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 8.--9. "WSEL_SI1_10,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x4 4.--5. "WSEL_SI1_9,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 0.--1. "WSEL_SI1_8,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x8 "CWSELREI2,Channel Analog Watchdog Select For External inputs"
|
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bitfld.long 0x8 28.--29. "WSEL_SI2_23,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 24.--25. "WSEL_SI2_22,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x8 20.--21. "WSEL_SI2_21,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 16.--17. "WSEL_SI2_20,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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|
newline
|
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bitfld.long 0x8 12.--13. "WSEL_SI2_19,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 8.--9. "WSEL_SI2_18,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0x8 4.--5. "WSEL_SI2_17,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 0.--1. "WSEL_SI2_16,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0xC "CWSELREI3,Channel Analog Watchdog Select For External inputs"
|
|
bitfld.long 0xC 28.--29. "WSEL_SI3_31,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 24.--25. "WSEL_SI3_30,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0xC 20.--21. "WSEL_SI3_29,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 16.--17. "WSEL_SI3_28,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
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bitfld.long 0xC 12.--13. "WSEL_SI3_27,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 8.--9. "WSEL_SI3_26,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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newline
|
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bitfld.long 0xC 4.--5. "WSEL_SI3_25,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 0.--1. "WSEL_SI3_24,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
line.long 0x10 "CWENR0,Channel Watchdog Enable For Precision Inputs"
|
|
bitfld.long 0x10 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable"
|
|
newline
|
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bitfld.long 0x10 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable"
|
|
newline
|
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bitfld.long 0x10 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable"
|
|
newline
|
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bitfld.long 0x10 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable"
|
|
line.long 0x14 "CWENR1,Channel Watchdog Enable For Standard Inputs"
|
|
bitfld.long 0x14 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
|
|
line.long 0x18 "CWENR2,Channel Watchdog Enable For External Inputs"
|
|
bitfld.long 0x18 31. "CWEN95,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 30. "CWEN94,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 29. "CWEN93,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 28. "CWEN92,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 27. "CWEN91,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 26. "CWEN90,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 25. "CWEN89,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 24. "CWEN88,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 23. "CWEN87,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 22. "CWEN86,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 21. "CWEN85,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 20. "CWEN84,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 19. "CWEN83,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 18. "CWEN82,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 17. "CWEN81,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 16. "CWEN80,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
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bitfld.long 0x18 15. "CWEN79,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 14. "CWEN78,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 13. "CWEN77,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 12. "CWEN76,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 11. "CWEN75,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 10. "CWEN74,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 9. "CWEN73,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 8. "CWEN72,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 7. "CWEN71,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 6. "CWEN70,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 5. "CWEN69,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 4. "CWEN68,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 3. "CWEN67,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 2. "CWEN66,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x18 1. "CWEN65,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
bitfld.long 0x18 0. "CWEN64,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
|
|
group.long 0x2F0++0xB
|
|
line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs"
|
|
eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs"
|
|
eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
line.long 0x8 "AWORR2,Analog Watchdog Out Of Range For External Inputs"
|
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eventfld.long 0x8 31. "AWOR_CH31,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 30. "AWOR_CH30,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 29. "AWOR_CH29,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 28. "AWOR_CH28,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 27. "AWOR_CH27,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 26. "AWOR_CH26,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 25. "AWOR_CH25,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 24. "AWOR_CH24,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 23. "AWOR_CH23,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 22. "AWOR_CH22,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 21. "AWOR_CH21,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 20. "AWOR_CH20,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 19. "AWOR_CH19,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 18. "AWOR_CH18,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 17. "AWOR_CH17,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 16. "AWOR_CH16,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 15. "AWOR_CH15,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 14. "AWOR_CH14,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 13. "AWOR_CH13,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 12. "AWOR_CH12,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 11. "AWOR_CH11,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 10. "AWOR_CH10,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 9. "AWOR_CH9,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 8. "AWOR_CH8,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
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eventfld.long 0x8 7. "AWOR_CH7,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 6. "AWOR_CH6,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 5. "AWOR_CH5,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 4. "AWOR_CH4,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 3. "AWOR_CH3,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 2. "AWOR_CH2,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 1. "AWOR_CH1,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 0. "AWOR_CH0,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
group.long 0x340++0x13
|
|
line.long 0x0 "STCR1,Self-Test Configuration 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C"
|
|
hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S"
|
|
line.long 0x4 "STCR2,Self-Test Configuration 2"
|
|
bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated"
|
|
eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected"
|
|
newline
|
|
bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line"
|
|
newline
|
|
bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line"
|
|
bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line"
|
|
newline
|
|
bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line"
|
|
line.long 0x8 "STCR3,Self-Test Configuration 3"
|
|
bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step"
|
|
line.long 0xC "STBRR,Self-Test Baud Rate"
|
|
bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.."
|
|
hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate"
|
|
line.long 0x10 "STSR1,Self-Test Status 1"
|
|
eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence"
|
|
eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period."
|
|
newline
|
|
eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten"
|
|
eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete"
|
|
eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error"
|
|
eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error"
|
|
newline
|
|
eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error"
|
|
eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error"
|
|
newline
|
|
hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C"
|
|
rgroup.long 0x354++0xB
|
|
line.long 0x0 "STSR2,Self-Test Status 2"
|
|
hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1"
|
|
line.long 0x4 "STSR3,Self-Test Status 3"
|
|
hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2"
|
|
hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0"
|
|
line.long 0x8 "STSR4,Self-Test Status 4"
|
|
hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C"
|
|
rgroup.long 0x370++0x3
|
|
line.long 0x0 "STDR1,Self-Test Conversion Data 1"
|
|
bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten"
|
|
newline
|
|
hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data"
|
|
group.long 0x380++0x3
|
|
line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
group.long 0x388++0x7
|
|
line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2"
|
|
bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value"
|
|
group.long 0x394++0xF
|
|
line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x4 "STAW5R,Self-Test Analog Watchdog C"
|
|
hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register"
|
|
bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3"
|
|
bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1"
|
|
line.long 0xC "CALBISTREG,Control And Calibration Status"
|
|
bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?"
|
|
bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles"
|
|
newline
|
|
rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress"
|
|
bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared."
|
|
newline
|
|
bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples"
|
|
bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable"
|
|
newline
|
|
eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully"
|
|
bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration"
|
|
group.long 0x3A8++0x3
|
|
line.long 0x0 "OFSGNUSR,Offset And Gain User"
|
|
hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User"
|
|
hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User"
|
|
group.long 0x3B4++0x3
|
|
line.long 0x0 "CAL2,Calibration Value 2"
|
|
bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable"
|
|
tree.end
|
|
tree "ADC_1"
|
|
base ad:0x400A4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Main Configuration"
|
|
bitfld.long 0x0 31. "OWREN,Overwrite Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WLSIDE,Write Left-Aligned" "0: Right aligned,1: Left-aligned"
|
|
newline
|
|
bitfld.long 0x0 29. "MODE,Normal Conversion Mode" "0: Single conversion,1: Continuous conversion"
|
|
bitfld.long 0x0 27. "TRGEN,External Trigger Enable" "0: Normal trigger input does not start a conversion,1: Normal trigger input starts a conversion"
|
|
newline
|
|
bitfld.long 0x0 26. "EDGE,External Trigger Edge Selection" "0: Falling edge,1: Rising edge"
|
|
bitfld.long 0x0 25. "XSTRTEN,Auxiliary External Start Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 24. "NSTART,Start Normal Conversion" "0: No effect,1: Starts conversion"
|
|
bitfld.long 0x0 22. "JTRGEN,Injection Trigger Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 21. "JEDGE,Injected Trigger Edge Selection" "0: Falling edge,1: Rising edge"
|
|
bitfld.long 0x0 20. "JSTART,Injected Start" "0: Injected conversion can be started,1: Starts an injected conversion"
|
|
newline
|
|
bitfld.long 0x0 17. "BCTUEN,Body Cross Trigger Unit Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "BCTU_MODE,Body Cross Trigger Unit Mode Select" "0: Only BCTU can trigger conversion,1: All trigger sources can trigger conversion"
|
|
newline
|
|
eventfld.long 0x0 15. "STCL,Self-Test Configuration Lock" "0: Registers are writeable,1: Registers are read-only"
|
|
bitfld.long 0x0 11. "AVGEN,Averaging Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "AVGS,Averaging Select" "0: 4 conversions,1: 8 conversions,2: 16 conversions,3: 32 conversions"
|
|
eventfld.long 0x0 7. "ABORTCHAIN,Abort Chain" "0: Undefined,1: Conversion aborted"
|
|
newline
|
|
eventfld.long 0x0 6. "ABORT,Abort Conversion" "0: Undefined,1: Conversion aborted"
|
|
bitfld.long 0x0 5. "ACKO,Auto Clock Off" "0: Clock always active,1: Clock gated"
|
|
newline
|
|
bitfld.long 0x0 1.--2. "ADCLKSEL,Conversion Clock (AD_clk) Frequency Selection" "0: Module clock frequency,1: Module clock frequency / 2,2: Module clock frequency / 4,?"
|
|
bitfld.long 0x0 0. "PWDN,Power Down" "0: ADC enters a functional state,1: ADC enters Power Down state"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "MSR,Main Status"
|
|
bitfld.long 0x0 31. "CALIBRTD,Calibration Status" "0: Uncalibrated or calibration unsuccessful,1: Calibrated"
|
|
bitfld.long 0x0 24. "NSTART,Normal Conversion Started" "0: Not in progress,1: In progress"
|
|
newline
|
|
bitfld.long 0x0 23. "JABORT,Injected Conversion Aborted" "0: Not aborted,1: Aborted"
|
|
bitfld.long 0x0 20. "JSTART,Injected Conversion Started" "0: Not an injected conversion,1: Injected conversion"
|
|
newline
|
|
bitfld.long 0x0 18. "SELF_TEST_S,Indicates whether an ongoing conversion is for self-test." "0: Not self-test,1: Self-test"
|
|
bitfld.long 0x0 16. "BCTUSTART,BCTU Conversion Started" "0: Conversion was not triggered by BCTU,1: Ongoing conversion was triggered by BCTU"
|
|
newline
|
|
hexmask.long.byte 0x0 9.--15. 1. "CHADDR,Input Under Measure"
|
|
bitfld.long 0x0 5. "ACKO,Auto Clock-Off On" "0: Inactive,1: Active"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "ADCSTATUS,ADC State" "0: Idle,1: Power Down,2: Wait,3: Calibrate,4: Convert,?,6: Done,?"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "ISR,Interrupt Status"
|
|
eventfld.long 0x0 4. "EOBCTU,End Of BCTU Conversion" "0: No EOBCTU interrupt generated,1: EOBCTU interrupt generated"
|
|
eventfld.long 0x0 3. "JEOC,End Of Injected Conversion" "0: No JEOC interrupt generated,1: JEOC interrupt generated"
|
|
newline
|
|
eventfld.long 0x0 2. "JECH,End Of Injected Chain Conversion" "0: No JECH interrupt generated,1: JECH interrupt generated"
|
|
eventfld.long 0x0 1. "EOC,End Of Conversion" "0: No EOC interrupt generated,1: Interrupt generated"
|
|
newline
|
|
eventfld.long 0x0 0. "ECH,End Of Chain Conversion" "0: Indicates no ECH interrupt generated,1: Indicates an ECH interrupt has been generated"
|
|
line.long 0x4 "CEOCFR0,Channel End Of Conversion Flag For Precision Inputs"
|
|
eventfld.long 0x4 7. "PIEOCF7,Precision Input End Of Conversion Flag 7" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x4 6. "PIEOCF6,Precision Input End Of Conversion Flag 6" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x4 5. "PIEOCF5,Precision Input End Of Conversion Flag 5" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x4 4. "PIEOCF4,Precision Input End Of Conversion Flag 4" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x4 3. "PIEOCF3,Precision Input End Of Conversion Flag 3" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x4 2. "PIEOCF2,Precision Input End Of Conversion Flag 2" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x4 1. "PIEOCF1,Precision Input End Of Conversion Flag 1" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x4 0. "PIEOCF0,Precision Input End Of Conversion Flag 0" "0: Conversion not complete,1: Conversion complete"
|
|
line.long 0x8 "CEOCFR1,Channel End Of Conversion Flag For Standard Inputs"
|
|
eventfld.long 0x8 23. "SIEOCF23,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 22. "SIEOCF22,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 21. "SIEOCF21,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 20. "SIEOCF20,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 19. "SIEOCF19,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 18. "SIEOCF18,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 17. "SIEOCF17,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 16. "SIEOCF16,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 15. "SIEOCF15,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 14. "SIEOCF14,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 13. "SIEOCF13,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 12. "SIEOCF12,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 11. "SIEOCF11,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 10. "SIEOCF10,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 9. "SIEOCF9,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 8. "SIEOCF8,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 7. "SIEOCF7,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 6. "SIEOCF6,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 5. "SIEOCF5,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 4. "SIEOCF4,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 3. "SIEOCF3,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 2. "SIEOCF2,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0x8 1. "SIEOCF1,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0x8 0. "SIEOCF0,Standard Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
line.long 0xC "CEOCFR2,Channel End Of Conversion Flag For External Inputs"
|
|
eventfld.long 0xC 31. "EIEOCF31,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 30. "EIEOCF30,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 29. "EIEOCF29,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 28. "EIEOCF28,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 27. "EIEOCF27,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 26. "EIEOCF26,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 25. "EIEOCF25,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 24. "EIEOCF24,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 23. "EIEOCF23,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 22. "EIEOCF22,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 21. "EIEOCF21,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 20. "EIEOCF20,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 19. "EIEOCF19,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 18. "EIEOCF18,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 17. "EIEOCF17,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 16. "EIEOCF16,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 15. "EIEOCF15,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 14. "EIEOCF14,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 13. "EIEOCF13,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 12. "EIEOCF12,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 11. "EIEOCF11,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 10. "EIEOCF10,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 9. "EIEOCF9,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 8. "EIEOCF8,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 7. "EIEOCF7,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 6. "EIEOCF6,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 5. "EIEOCF5,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 4. "EIEOCF4,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 3. "EIEOCF3,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 2. "EIEOCF2,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
newline
|
|
eventfld.long 0xC 1. "EIEOCF1,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
eventfld.long 0xC 0. "EIEOCF0,External Input End Of Conversion Flag" "0: Conversion not complete,1: Conversion complete"
|
|
line.long 0x10 "IMR,Interrupt Mask"
|
|
bitfld.long 0x10 4. "MSKEOBCTU,EOBCTU Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x10 3. "MSKJEOC,JEOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x10 2. "MSKJECH,JECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x10 1. "MSKEOC,EOC Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x10 0. "MSKECH,ECH Interrupt Flag Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x14 "CIMR0,EOC Interrupt Enable For Precision Inputs"
|
|
bitfld.long 0x14 7. "PIEOCIEN7,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 6. "PIEOCIEN6,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 5. "PIEOCIEN5,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 4. "PIEOCIEN4,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 3. "PIEOCIEN3,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 2. "PIEOCIEN2,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x14 1. "PIEOCIEN1,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x14 0. "PIEOCIEN0,Precision Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x18 "CIMR1,EOC Interrupt Enable For Standard Inputs"
|
|
bitfld.long 0x18 23. "SIEOCIEN23,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 22. "SIEOCIEN22,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x18 21. "SIEOCIEN21,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 20. "SIEOCIEN20,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x18 19. "SIEOCIEN19,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x18 18. "SIEOCIEN18,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x18 17. "SIEOCIEN17,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 16. "SIEOCIEN16,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 15. "SIEOCIEN15,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x18 14. "SIEOCIEN14,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 13. "SIEOCIEN13,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 12. "SIEOCIEN12,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x18 11. "SIEOCIEN11,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 10. "SIEOCIEN10,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 9. "SIEOCIEN9,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 8. "SIEOCIEN8,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
|
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bitfld.long 0x18 7. "SIEOCIEN7,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x18 6. "SIEOCIEN6,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 5. "SIEOCIEN5,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 4. "SIEOCIEN4,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 3. "SIEOCIEN3,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 2. "SIEOCIEN2,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x18 1. "SIEOCIEN1,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x18 0. "SIEOCIEN0,Standard Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
line.long 0x1C "CIMR2,EOC Interrupt Enable For External Inputs"
|
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bitfld.long 0x1C 31. "EIEOCIEN31,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 30. "EIEOCIEN30,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
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|
bitfld.long 0x1C 29. "EIEOCIEN29,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x1C 28. "EIEOCIEN28,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x1C 27. "EIEOCIEN27,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 26. "EIEOCIEN26,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 25. "EIEOCIEN25,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x1C 24. "EIEOCIEN24,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 23. "EIEOCIEN23,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
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bitfld.long 0x1C 22. "EIEOCIEN22,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 21. "EIEOCIEN21,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
bitfld.long 0x1C 20. "EIEOCIEN20,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
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bitfld.long 0x1C 19. "EIEOCIEN19,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 18. "EIEOCIEN18,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 17. "EIEOCIEN17,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 16. "EIEOCIEN16,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 15. "EIEOCIEN15,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 14. "EIEOCIEN14,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 13. "EIEOCIEN13,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 12. "EIEOCIEN12,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 11. "EIEOCIEN11,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 10. "EIEOCIEN10,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 9. "EIEOCIEN9,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 8. "EIEOCIEN8,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 7. "EIEOCIEN7,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 6. "EIEOCIEN6,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 5. "EIEOCIEN5,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 4. "EIEOCIEN4,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 3. "EIEOCIEN3,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 2. "EIEOCIEN2,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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newline
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bitfld.long 0x1C 1. "EIEOCIEN1,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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bitfld.long 0x1C 0. "EIEOCIEN0,External Input EOC Interrupt Enable" "0: Interrupt is not flagged,1: Interrupt is flagged"
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line.long 0x20 "WTISR,Analog Watchdog Threshold Interrupt Status"
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eventfld.long 0x20 31. "HAWIF16,High Analog Watchdog Interrupt Flag 16" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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eventfld.long 0x20 30. "LAWIF16,Low Analog Watchdog Interrupt Flag 16" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
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eventfld.long 0x20 29. "HAWIF15,High Analog Watchdog Interrupt Flag 15" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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eventfld.long 0x20 28. "LAWIF15,Low Analog Watchdog Interrupt Flag 15" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
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eventfld.long 0x20 27. "HAWIF14,High Analog Watchdog Interrupt Flag 14" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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eventfld.long 0x20 26. "LAWIF14,Low Analog Watchdog Interrupt Flag 14" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 25. "HAWIF13,High Analog Watchdog Interrupt Flag 13" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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|
eventfld.long 0x20 24. "LAWIF13,Low Analog Watchdog Interrupt Flag 13" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 23. "HAWIF12,High Analog Watchdog Interrupt Flag 12" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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|
eventfld.long 0x20 22. "LAWIF12,Low Analog Watchdog Interrupt Flag 12" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 21. "HAWIF11,High Analog Watchdog Interrupt Flag 11" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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|
eventfld.long 0x20 20. "LAWIF11,Low Analog Watchdog Interrupt Flag 11" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 19. "HAWIF10,High Analog Watchdog Interrupt Flag 10" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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eventfld.long 0x20 18. "LAWIF10,Low Analog Watchdog Interrupt Flag 10" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 17. "HAWIF9,High Analog Watchdog Interrupt Flag 9" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 16. "LAWIF9,Low Analog Watchdog Interrupt Flag 9" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
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eventfld.long 0x20 15. "HAWIF8,High Analog Watchdog Interrupt Flag 8" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 14. "LAWIF8,Low Analog Watchdog Interrupt Flag 8" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 13. "HAWIF7,High Analog Watchdog Interrupt Flag 7" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
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eventfld.long 0x20 12. "LAWIF7,Low Analog Watchdog Interrupt Flag 7" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 11. "HAWIF6,High Analog Watchdog Interrupt Flag 6" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 10. "LAWIF6,Low Analog Watchdog Interrupt Flag 6" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 9. "HAWIF5,High Analog Watchdog Interrupt Flag 5" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 8. "LAWIF5,Low Analog Watchdog Interrupt Flag 5" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 7. "HAWIF4,High Analog Watchdog Interrupt Flag 4" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 6. "LAWIF4,Low Analog Watchdog Interrupt Flag 4" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 5. "HAWIF3,High Analog Watchdog Interrupt Flag 3" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 4. "LAWIF3,Low Analog Watchdog Interrupt Flag 3" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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newline
|
|
eventfld.long 0x20 3. "HAWIF2,High Analog Watchdog Interrupt Flag 2" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 2. "LAWIF2,Low Analog Watchdog Interrupt Flag 2" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
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|
newline
|
|
eventfld.long 0x20 1. "HAWIF1,High Analog Watchdog Interrupt Flag 1" "0: Conversion result is lower than the specified..,1: Conversion result is higher than the specified.."
|
|
eventfld.long 0x20 0. "LAWIF1,Low Analog Watchdog Interrupt Flag 1" "0: Conversion result is greater than the specified..,1: Conversion result is lower than the specified.."
|
|
line.long 0x24 "WTIMR,Analog Watchdog Threshold Interrupt Enable"
|
|
bitfld.long 0x24 7. "HDWIFEN4,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 6. "LAWIFEN4,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x24 5. "HDWIFEN3,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 4. "LAWIFEN3,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
newline
|
|
bitfld.long 0x24 3. "HDWIFEN2,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
bitfld.long 0x24 2. "LAWIFEN2,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
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|
newline
|
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bitfld.long 0x24 1. "HDWIFEN1,High Data Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
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bitfld.long 0x24 0. "LAWIFEN1,Low Analog Watchdog Interrupt Flag Enable n" "0: Interrupt is not flagged,1: Interrupt is flagged"
|
|
group.long 0x40++0xF
|
|
line.long 0x0 "DMAE,Direct Memory Access Configuration"
|
|
bitfld.long 0x0 1. "DCLR,DMA Clear Request" "0: DMA controller acknowledges the request,1: Conversion data register is read"
|
|
bitfld.long 0x0 0. "DMAEN,DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "DMAR0,DMA Request Enable For Precision Inputs"
|
|
bitfld.long 0x4 7. "PIDMAREN7,Precision Input DMA Request Enable 7" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 6. "PIDMAREN6,Precision Input DMA Request Enable 6" "0: Not triggered,1: Triggered"
|
|
newline
|
|
bitfld.long 0x4 5. "PIDMAREN5,Precision Input DMA Request Enable 5" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 4. "PIDMAREN4,Precision Input DMA Request Enable 4" "0: Not triggered,1: Triggered"
|
|
newline
|
|
bitfld.long 0x4 3. "PIDMAREN3,Precision Input DMA Request Enable 3" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 2. "PIDMAREN2,Precision Input DMA Request Enable 2" "0: Not triggered,1: Triggered"
|
|
newline
|
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bitfld.long 0x4 1. "PIDMAREN1,Precision Input DMA Request Enable 1" "0: Not triggered,1: Triggered"
|
|
bitfld.long 0x4 0. "PIDMAREN0,Precision Input DMA Request Enable 0" "0: Not triggered,1: Triggered"
|
|
line.long 0x8 "DMAR1,DMA Request Enable For Standard Inputs"
|
|
bitfld.long 0x8 23. "SIDMAREN23,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 22. "SIDMAREN22,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
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newline
|
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bitfld.long 0x8 21. "SIDMAREN21,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 20. "SIDMAREN20,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 19. "SIDMAREN19,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 18. "SIDMAREN18,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
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bitfld.long 0x8 17. "SIDMAREN17,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 16. "SIDMAREN16,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
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newline
|
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bitfld.long 0x8 15. "SIDMAREN15,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 14. "SIDMAREN14,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 13. "SIDMAREN13,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 12. "SIDMAREN12,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
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bitfld.long 0x8 11. "SIDMAREN11,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 10. "SIDMAREN10,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 9. "SIDMAREN9,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 8. "SIDMAREN8,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 7. "SIDMAREN7,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 6. "SIDMAREN6,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 5. "SIDMAREN5,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 4. "SIDMAREN4,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 3. "SIDMAREN3,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 2. "SIDMAREN2,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
newline
|
|
bitfld.long 0x8 1. "SIDMAREN1,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
bitfld.long 0x8 0. "SIDMAREN0,Standard Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA is request triggered"
|
|
line.long 0xC "DMAR2,DMA Request Enable For External Inputs"
|
|
bitfld.long 0xC 31. "EIDMAREN31,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 30. "EIDMAREN30,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 29. "EIDMAREN29,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 28. "EIDMAREN28,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 27. "EIDMAREN27,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 26. "EIDMAREN26,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 25. "EIDMAREN25,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 24. "EIDMAREN24,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 23. "EIDMAREN23,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 22. "EIDMAREN22,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 21. "EIDMAREN21,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 20. "EIDMAREN20,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 19. "EIDMAREN19,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 18. "EIDMAREN18,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 17. "EIDMAREN17,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 16. "EIDMAREN16,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 15. "EIDMAREN15,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 14. "EIDMAREN14,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 13. "EIDMAREN13,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 12. "EIDMAREN12,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 11. "EIDMAREN11,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 10. "EIDMAREN10,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 9. "EIDMAREN9,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 8. "EIDMAREN8,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 7. "EIDMAREN7,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 6. "EIDMAREN6,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 5. "EIDMAREN5,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 4. "EIDMAREN4,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 3. "EIDMAREN3,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 2. "EIDMAREN2,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
newline
|
|
bitfld.long 0xC 1. "EIDMAREN1,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
bitfld.long 0xC 0. "EIDMAREN0,External Input DMA Request Enable n" "0: DMA request is not triggered,1: DMA request is triggered"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x60)++0x3
|
|
line.long 0x0 "THRHLR[$1],Analog Watchdog Threshold Values"
|
|
hexmask.long.word 0x0 16.--30. 1. "THRH,High Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Low Threshold Value"
|
|
repeat.end
|
|
group.long 0x80++0xF
|
|
line.long 0x0 "PSCR,Presampling Control"
|
|
bitfld.long 0x0 5. "PREVAL2,Presampling Voltage Select For External Inputs" "0: VREFL,1: VREFH"
|
|
bitfld.long 0x0 3. "PREVAL1,Presampling Voltage Select For Standard Inputs" "0: VREFL,1: VREFH"
|
|
newline
|
|
bitfld.long 0x0 1. "PREVAL0,Presampling Voltage Select For Precision Inputs" "0: VREFL,1: VREFH"
|
|
bitfld.long 0x0 0. "PRECONV,Convert Presampled Value" "0: No conversion after presampling,1: Presampling is followed by conversion"
|
|
line.long 0x4 "PSR0,Presampling Enable For Precision Inputs"
|
|
bitfld.long 0x4 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
line.long 0x8 "PSR1,Presampling Enable For Standard Inputs"
|
|
bitfld.long 0x8 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
line.long 0xC "PSR2,Presampling Enable For External Inputs"
|
|
bitfld.long 0xC 31. "PRES31,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "PRES30,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 29. "PRES29,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 28. "PRES28,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 27. "PRES27,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 26. "PRES26,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 25. "PRES25,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 24. "PRES24,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 23. "PRES23,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 22. "PRES22,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 21. "PRES21,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 20. "PRES20,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 19. "PRES19,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 18. "PRES18,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 17. "PRES17,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 16. "PRES16,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 15. "PRES15,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 14. "PRES14,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 13. "PRES13,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 12. "PRES12,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 11. "PRES11,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 10. "PRES10,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 9. "PRES9,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 8. "PRES8,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 7. "PRES7,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 6. "PRES6,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 5. "PRES5,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 4. "PRES4,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 3. "PRES3,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 2. "PRES2,Presampling Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0xC 1. "PRES1,Presampling Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "PRES0,Presampling Enable n" "0: Disable,1: Enable"
|
|
group.long 0x94++0xB
|
|
line.long 0x0 "CTR0,Conversion Timing For Precision Inputs"
|
|
hexmask.long.byte 0x0 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
line.long 0x4 "CTR1,Conversion Timing For Standard Inputs"
|
|
hexmask.long.byte 0x4 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
line.long 0x8 "CTR2,Conversion Timing For External Inputs"
|
|
hexmask.long.byte 0x8 0.--7. 1. "INPSAMP,Input Sample Cycles"
|
|
group.long 0xA4++0xB
|
|
line.long 0x0 "NCMR0,Normal Conversion Enable For Precision Inputs"
|
|
bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input is not selected,1: Input is selected"
|
|
line.long 0x4 "NCMR1,Normal Conversion Enable For Standard Inputs"
|
|
bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
line.long 0x8 "NCMR2,Normal Conversion Enable For External Inputs"
|
|
bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
group.long 0xB4++0xB
|
|
line.long 0x0 "JCMR0,Injected Conversion Enable For Precision Inputs"
|
|
bitfld.long 0x0 7. "CH7,Precision Input To Be Converted" "0: Input 7 is not selected,1: Input 7 is selected"
|
|
bitfld.long 0x0 6. "CH6,Precision Input To Be Converted" "0: Input 6 is not selected,1: Input 6 is selected"
|
|
newline
|
|
bitfld.long 0x0 5. "CH5,Precision Input To Be Converted" "0: Input 5 is not selected,1: Input 5 is selected"
|
|
bitfld.long 0x0 4. "CH4,Precision Input To Be Converted" "0: Input 4 is not selected,1: Input 4 is selected"
|
|
newline
|
|
bitfld.long 0x0 3. "CH3,Precision Input To Be Converted" "0: Input 3 is not selected,1: Input 3 is selected"
|
|
bitfld.long 0x0 2. "CH2,Precision Input To Be Converted" "0: Input 2 is not selected,1: Input 2 is selected"
|
|
newline
|
|
bitfld.long 0x0 1. "CH1,Precision Input To Be Converted" "0: Input 1 is not selected,1: Input 1 is selected"
|
|
bitfld.long 0x0 0. "CH0,Precision Input To Be Converted" "0: Input 0 is not selected,1: Input 0 is selected"
|
|
line.long 0x4 "JCMR1,Injected Conversion Enable For Standard Inputs"
|
|
bitfld.long 0x4 23. "CH55,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 22. "CH54,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 21. "CH53,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 20. "CH52,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 19. "CH51,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 18. "CH50,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 17. "CH49,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 16. "CH48,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 15. "CH47,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 14. "CH46,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 13. "CH45,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 12. "CH44,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 11. "CH43,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 10. "CH42,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 9. "CH41,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 8. "CH40,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 7. "CH39,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 6. "CH38,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 5. "CH37,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 4. "CH36,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 3. "CH35,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 2. "CH34,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x4 1. "CH33,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x4 0. "CH32,Standard Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
line.long 0x8 "JCMR2,Injected Conversion Enable For External Inputs"
|
|
bitfld.long 0x8 31. "CH95,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 30. "CH94,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 29. "CH93,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 28. "CH92,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 27. "CH91,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 26. "CH90,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 25. "CH89,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 24. "CH88,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 23. "CH87,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 22. "CH86,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 21. "CH85,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 20. "CH84,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 19. "CH83,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 18. "CH82,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 17. "CH81,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 16. "CH80,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 15. "CH79,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 14. "CH78,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 13. "CH77,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 12. "CH76,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 11. "CH75,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 10. "CH74,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 9. "CH73,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 8. "CH72,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 7. "CH71,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 6. "CH70,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 5. "CH69,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 4. "CH68,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 3. "CH67,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 2. "CH66,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
newline
|
|
bitfld.long 0x8 1. "CH65,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
bitfld.long 0x8 0. "CH64,External Input To Be Converted" "0: Input n is not selected,1: Input n is selected"
|
|
group.long 0xC4++0x7
|
|
line.long 0x0 "DSDR,Delay Start Of Data Conversion"
|
|
hexmask.long.word 0x0 0.--15. 1. "DSD,Delay"
|
|
line.long 0x4 "PDEDR,Power Down Exit Delay"
|
|
hexmask.long.byte 0x4 0.--7. 1. "PDED,Delay"
|
|
rgroup.long 0x100++0x1F
|
|
line.long 0x0 "PCDR0,Precision Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x4 "PCDR1,Precision Input n Conversion Data"
|
|
bitfld.long 0x4 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x4 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x4 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x8 "PCDR2,Precision Input n Conversion Data"
|
|
bitfld.long 0x8 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x8 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x8 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x8 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0xC "PCDR3,Precision Input n Conversion Data"
|
|
bitfld.long 0xC 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0xC 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0xC 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0xC 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x10 "PCDR4,Precision Input n Conversion Data"
|
|
bitfld.long 0x10 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x10 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x10 0.--15. 1. "CDATA,Conversion Data"
|
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line.long 0x14 "PCDR5,Precision Input n Conversion Data"
|
|
bitfld.long 0x14 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x14 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
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bitfld.long 0x14 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x14 0.--15. 1. "CDATA,Conversion Data"
|
|
line.long 0x18 "PCDR6,Precision Input n Conversion Data"
|
|
bitfld.long 0x18 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x18 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
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bitfld.long 0x18 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x18 0.--15. 1. "CDATA,Conversion Data"
|
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line.long 0x1C "PCDR7,Precision Input n Conversion Data"
|
|
bitfld.long 0x1C 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x1C 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
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bitfld.long 0x1C 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x1C 0.--15. 1. "CDATA,Conversion Data"
|
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repeat 24. (increment 0x0 0x1)(increment 0x0 0x4)
|
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rgroup.long ($2+0x180)++0x3
|
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line.long 0x0 "ICDR[$1],Standard Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
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repeat.end
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "ECDR[$1],External Input n Conversion Data"
|
|
bitfld.long 0x0 19. "VALID,Conversion Data Available" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OVERW,Overwrite Status Flag" "0: No unread data is overwritten,1: Unread data is overwritten"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "RESULT,Conversion Data Type" "0: Normal trigger,1: Injected trigger,2: BCTU trigger,?"
|
|
hexmask.long.word 0x0 0.--15. 1. "CDATA,Conversion Data"
|
|
repeat.end
|
|
group.long 0x2B0++0x3
|
|
line.long 0x0 "CWSELRPI0,Channel Analog Watchdog Select For Precision Inputs"
|
|
bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
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bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
rgroup.long 0x2B4++0x3
|
|
line.long 0x0 "CWSELRPI1,Channel Analog Watchdog Select For Precision Inputs"
|
|
group.long 0x2C0++0xB
|
|
line.long 0x0 "CWSELRSI0,Channel Analog Watchdog Select For Standard Inputs"
|
|
bitfld.long 0x0 28.--29. "WSEL_SI7_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 24.--25. "WSEL_SI6_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "WSEL_SI5_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 16.--17. "WSEL_SI4_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "WSEL_SI3_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 8.--9. "WSEL_SI2_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "WSEL_SI1_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
line.long 0x4 "CWSELRSI1,Channel Analog Watchdog Select For Standard Inputs"
|
|
bitfld.long 0x4 28.--29. "WSEL_SI7_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x4 24.--25. "WSEL_SI6_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "WSEL_SI5_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x4 16.--17. "WSEL_SI4_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "WSEL_SI3_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x4 8.--9. "WSEL_SI2_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "WSEL_SI1_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x4 0.--1. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
line.long 0x8 "CWSELRSI2,Channel Analog Watchdog Select For Standard Inputs"
|
|
bitfld.long 0x8 28.--29. "WSEL_SI7_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x8 24.--25. "WSEL_SI6_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x8 20.--21. "WSEL_SI5_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x8 16.--17. "WSEL_SI4_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x8 12.--13. "WSEL_SI3_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x8 8.--9. "WSEL_SI2_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "WSEL_SI1_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x8 0.--1. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
group.long 0x2D0++0x1B
|
|
line.long 0x0 "CWSELREI0,Channel Analog Watchdog Select For External inputs"
|
|
bitfld.long 0x0 28.--29. "WSEL_SI0_7,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 24.--25. "WSEL_SI0_6,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 20.--21. "WSEL_SI0_5,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 16.--17. "WSEL_SI0_4,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "WSEL_SI0_3,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
bitfld.long 0x0 8.--9. "WSEL_SI0_2,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "WSEL_SI0_1,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x0 0.--1. "WSEL_SI0_0,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x4 "CWSELREI1,Channel Analog Watchdog Select For External inputs"
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bitfld.long 0x4 28.--29. "WSEL_SI1_15,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 24.--25. "WSEL_SI1_14,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 20.--21. "WSEL_SI1_13,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 16.--17. "WSEL_SI1_12,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 12.--13. "WSEL_SI1_11,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 8.--9. "WSEL_SI1_10,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 4.--5. "WSEL_SI1_9,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x4 0.--1. "WSEL_SI1_8,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x8 "CWSELREI2,Channel Analog Watchdog Select For External inputs"
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bitfld.long 0x8 28.--29. "WSEL_SI2_23,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 24.--25. "WSEL_SI2_22,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 20.--21. "WSEL_SI2_21,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 16.--17. "WSEL_SI2_20,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 12.--13. "WSEL_SI2_19,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 8.--9. "WSEL_SI2_18,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 4.--5. "WSEL_SI2_17,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0x8 0.--1. "WSEL_SI2_16,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0xC "CWSELREI3,Channel Analog Watchdog Select For External inputs"
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bitfld.long 0xC 28.--29. "WSEL_SI3_31,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 24.--25. "WSEL_SI3_30,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 20.--21. "WSEL_SI3_29,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 16.--17. "WSEL_SI3_28,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 12.--13. "WSEL_SI3_27,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 8.--9. "WSEL_SI3_26,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 4.--5. "WSEL_SI3_25,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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bitfld.long 0xC 0.--1. "WSEL_SI3_24,Analog Watchdog Selection" "0: Analog watchdog THRHLR0,1: Analog watchdog THRHLR1,2: Analog watchdog THRHLR2,3: Analog watchdog THRHLR3"
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line.long 0x10 "CWENR0,Channel Watchdog Enable For Precision Inputs"
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bitfld.long 0x10 7. "CWEN7,Channel Analog Watchdog Enable 7" "0: Disable,1: Enable"
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bitfld.long 0x10 6. "CWEN6,Channel Analog Watchdog Enable 6" "0: Disable,1: Enable"
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bitfld.long 0x10 5. "CWEN5,Channel Analog Watchdog Enable 5" "0: Disable,1: Enable"
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bitfld.long 0x10 4. "CWEN4,Channel Analog Watchdog Enable 4" "0: Disable,1: Enable"
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bitfld.long 0x10 3. "CWEN3,Channel Analog Watchdog Enable 3" "0: Disable,1: Enable"
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bitfld.long 0x10 2. "CWEN2,Channel Analog Watchdog Enable 2" "0: Disable,1: Enable"
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bitfld.long 0x10 1. "CWEN1,Channel Analog Watchdog Enable 1" "0: Disable,1: Enable"
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bitfld.long 0x10 0. "CWEN0,Channel Analog Watchdog Enable 0" "0: Disable,1: Enable"
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line.long 0x14 "CWENR1,Channel Watchdog Enable For Standard Inputs"
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bitfld.long 0x14 23. "CWEN55,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 22. "CWEN54,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 21. "CWEN53,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 20. "CWEN52,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 19. "CWEN51,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 18. "CWEN50,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 17. "CWEN49,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 16. "CWEN48,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 15. "CWEN47,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 14. "CWEN46,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 13. "CWEN45,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 12. "CWEN44,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 11. "CWEN43,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 10. "CWEN42,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 9. "CWEN41,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 8. "CWEN40,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 7. "CWEN39,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 6. "CWEN38,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 5. "CWEN37,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 4. "CWEN36,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 3. "CWEN35,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 2. "CWEN34,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 1. "CWEN33,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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bitfld.long 0x14 0. "CWEN32,Channel Analog Watchdog Enable For Standard Inputs" "0: Disable,1: Enable"
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line.long 0x18 "CWENR2,Channel Watchdog Enable For External Inputs"
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bitfld.long 0x18 31. "CWEN95,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 30. "CWEN94,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 29. "CWEN93,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 28. "CWEN92,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 27. "CWEN91,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 26. "CWEN90,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 25. "CWEN89,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 24. "CWEN88,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 23. "CWEN87,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 22. "CWEN86,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 21. "CWEN85,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 20. "CWEN84,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 19. "CWEN83,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 18. "CWEN82,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 17. "CWEN81,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 16. "CWEN80,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 15. "CWEN79,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 14. "CWEN78,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 13. "CWEN77,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 12. "CWEN76,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 11. "CWEN75,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 10. "CWEN74,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 9. "CWEN73,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 8. "CWEN72,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 7. "CWEN71,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 6. "CWEN70,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 5. "CWEN69,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 4. "CWEN68,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 3. "CWEN67,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 2. "CWEN66,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 1. "CWEN65,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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bitfld.long 0x18 0. "CWEN64,Channel Analog Watchdog Enable For External Inputs" "0: Disable,1: Enable"
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group.long 0x2F0++0xB
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line.long 0x0 "AWORR0,Analog Watchdog Out Of Range For Precision Inputs"
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eventfld.long 0x0 7. "AWOR_CH7,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 6. "AWOR_CH6,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 5. "AWOR_CH5,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 4. "AWOR_CH4,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 3. "AWOR_CH3,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 2. "AWOR_CH2,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 1. "AWOR_CH1,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x0 0. "AWOR_CH0,Analog Watchdog Out Of Range For Precision Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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line.long 0x4 "AWORR1,Analog Watchdog Out Of Range For Standard Inputs"
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eventfld.long 0x4 23. "AWOR_CH23,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 22. "AWOR_CH22,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 21. "AWOR_CH21,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 20. "AWOR_CH20,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 19. "AWOR_CH19,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 18. "AWOR_CH18,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 17. "AWOR_CH17,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 16. "AWOR_CH16,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 15. "AWOR_CH15,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 14. "AWOR_CH14,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 13. "AWOR_CH13,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 12. "AWOR_CH12,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 11. "AWOR_CH11,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 10. "AWOR_CH10,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 9. "AWOR_CH9,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 8. "AWOR_CH8,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 7. "AWOR_CH7,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 6. "AWOR_CH6,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 5. "AWOR_CH5,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 4. "AWOR_CH4,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 3. "AWOR_CH3,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 2. "AWOR_CH2,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 1. "AWOR_CH1,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x4 0. "AWOR_CH0,Analog Watchdog Out Of Range For Standard Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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line.long 0x8 "AWORR2,Analog Watchdog Out Of Range For External Inputs"
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eventfld.long 0x8 31. "AWOR_CH31,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 30. "AWOR_CH30,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 29. "AWOR_CH29,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 28. "AWOR_CH28,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 27. "AWOR_CH27,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 26. "AWOR_CH26,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 25. "AWOR_CH25,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 24. "AWOR_CH24,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 23. "AWOR_CH23,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 22. "AWOR_CH22,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 21. "AWOR_CH21,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 20. "AWOR_CH20,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 19. "AWOR_CH19,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 18. "AWOR_CH18,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 17. "AWOR_CH17,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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eventfld.long 0x8 16. "AWOR_CH16,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
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|
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eventfld.long 0x8 15. "AWOR_CH15,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 14. "AWOR_CH14,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 13. "AWOR_CH13,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 12. "AWOR_CH12,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 11. "AWOR_CH11,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 10. "AWOR_CH10,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 9. "AWOR_CH9,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 8. "AWOR_CH8,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 7. "AWOR_CH7,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 6. "AWOR_CH6,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 5. "AWOR_CH5,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 4. "AWOR_CH4,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 3. "AWOR_CH3,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 2. "AWOR_CH2,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
newline
|
|
eventfld.long 0x8 1. "AWOR_CH1,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
eventfld.long 0x8 0. "AWOR_CH0,Analog Watchdog Out Of Range For External Inputs" "0: Conversion is within limits,1: Conversion is not within limits"
|
|
group.long 0x340++0x13
|
|
line.long 0x0 "STCR1,Self-Test Configuration 1"
|
|
hexmask.long.byte 0x0 24.--31. 1. "INPSAMP_C,Input Sampling Time Algorithm C"
|
|
hexmask.long.byte 0x0 8.--15. 1. "INPSAMP_S,Input Sampling Time Algorithm S"
|
|
line.long 0x4 "STCR2,Self-Test Configuration 2"
|
|
bitfld.long 0x4 27. "MSKWDSERR,Mask Interrupt Self-Test Watchdog Sequence Error" "0: No interrupt is generated,1: Interrupt is generated"
|
|
eventfld.long 0x4 26. "SERR,Self-Test Error Injection" "0: Error can be injected,1: Error is being injected"
|
|
newline
|
|
bitfld.long 0x4 25. "MSKWDTERR,Mask Interrupt Self-Test Watchdog Timer Error" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 23. "MSKST_EOC,Mask Interrupt Self-Test End Of Conversion" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 18. "MSKWDG_EOA_C,Mask Error Interrupt End Of Algorithm C" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 16. "MSKWDG_EOA_S,Mask Error Interrupt End Of Algorithm S" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 15. "MSKERR_C,Mask Error Interrupt Algorithm C" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 13. "MSKERR_S2,Mask Error Interrupt Algorithm S2" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 12. "MSKERR_S1,Mask Error Interrupt Algorithm S1" "0: No interrupt is generated,1: Interrupt is generated"
|
|
bitfld.long 0x4 11. "MSKERR_S0,Mask Error Interrupt Algorithm S0" "0: No interrupt is generated,1: Interrupt is generated"
|
|
newline
|
|
bitfld.long 0x4 7. "EN,Self-Test Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 4. "FMA_WDSERR,Fault Mapping Self-Test Watchdog Sequence Error" "0: Noncritical fault line,1: Critical fault line"
|
|
newline
|
|
bitfld.long 0x4 3. "FMA_WDTERR,Fault Mapping Self-Test Watchdog Timer Error" "0: Noncritical fault line,1: Critical fault line"
|
|
bitfld.long 0x4 2. "FMA_C,Fault Mapping Algorithm C" "0: Noncritical fault line,1: Critical fault line"
|
|
newline
|
|
bitfld.long 0x4 0. "FMA_S,Fault Mapping Algorithm S" "0: Noncritical fault line,1: Critical fault line"
|
|
line.long 0x8 "STCR3,Self-Test Configuration 3"
|
|
bitfld.long 0x8 8.--9. "ALG,Algorithm Selection" "0,1,2,3"
|
|
hexmask.long.byte 0x8 0.--4. 1. "MSTEP,Algorithm Step"
|
|
line.long 0xC "STBRR,Self-Test Baud Rate"
|
|
bitfld.long 0xC 16.--18. "WDT,Self-Test Watchdog Timer" "0: 8192 conversion clock cycles (~0.1 ms at 80 MHz),1: 39 936 conversion clock cycles (~0.5 ms at 80 MHz),2: 79 872 conversion clock cycles (~1 ms at 80 MHz),3: 159 744 conversion clock cycles (~2 ms at 80 MHz),4: 400 384 conversion clock cycles (~5 ms at 80 MHz),5: 799 744 conversion clock cycles (~10 ms at 80 MHz),6: 1 599 488 conversion clock cycles (~20 ms at 80..,7: 3 999 744 conversion clock cycles (~50 ms at 80.."
|
|
hexmask.long.byte 0xC 0.--7. 1. "BR,Baud Rate"
|
|
line.long 0x10 "STSR1,Self-Test Status 1"
|
|
eventfld.long 0x10 27. "WDSERR,Self-Test Watchdog Sequence Error" "0: Algorithm executed in correct sequence,1: Algorithm did not execute in correct sequence"
|
|
eventfld.long 0x10 25. "WDTERR,Self-Test Watchdog Timer Error" "0: Algorithm finished within the safe time period..,1: Algorithm did not finish within safe time period."
|
|
newline
|
|
eventfld.long 0x10 24. "OVERWR,Self-Test Error Status Overwrite" "0: No self-test error status flag overwritten,1: Self-test error status flag overwritten"
|
|
eventfld.long 0x10 23. "ST_EOC,Self-Test End Of Conversion" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x10 18. "WDG_EOA_C,Self-Test Watchdog End Of Algorithm C" "0: Not complete,1: Complete"
|
|
eventfld.long 0x10 16. "WDG_EOA_S,Self-Test Watchdog End Of Algorithm S" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x10 15. "ERR_C,Error Algorithm C" "0: No error,1: Error"
|
|
eventfld.long 0x10 13. "ERR_S2,Error Algorithm S Step 2" "0: No error,1: Error"
|
|
newline
|
|
eventfld.long 0x10 12. "ERR_S1,Error Algorithm S Step 1" "0: No error,1: Error"
|
|
eventfld.long 0x10 11. "ERR_S0,Error Algorithm S Step 0" "0: No error,1: Error"
|
|
newline
|
|
hexmask.long.byte 0x10 5.--9. 1. "STEP_C,Step Of Algorithm C"
|
|
rgroup.long 0x354++0xB
|
|
line.long 0x0 "STSR2,Self-Test Status 2"
|
|
hexmask.long.word 0x0 0.--14. 1. "DATA0,Conversion Data ERR_S1"
|
|
line.long 0x4 "STSR3,Self-Test Status 3"
|
|
hexmask.long.word 0x4 16.--30. 1. "DATA1,Conversion Data ERR_S2"
|
|
hexmask.long.word 0x4 0.--14. 1. "DATA0,Conversion Data ERR_S0"
|
|
line.long 0x8 "STSR4,Self-Test Status 4"
|
|
hexmask.long.word 0x8 16.--30. 1. "DATA1,Conversion Data ERR_C"
|
|
rgroup.long 0x370++0x3
|
|
line.long 0x0 "STDR1,Self-Test Conversion Data 1"
|
|
bitfld.long 0x0 19. "VALID,Valid Conversion Data" "0: No unread conversion data,1: Unread conversion data is available"
|
|
bitfld.long 0x0 18. "OWERWR,Conversion Data Overwrite Status" "0: Current conversion data not overwritten,1: Current conversion data was overwritten"
|
|
newline
|
|
hexmask.long.word 0x0 0.--14. 1. "TCDATA,Test Channel Conversion Data"
|
|
group.long 0x380++0x3
|
|
line.long 0x0 "STAW0R,Self-Test Analog Watchdog S0"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
group.long 0x388++0x7
|
|
line.long 0x0 "STAW1R,Self-Test Analog Watchdog S1"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x4 "STAW2R,Self-Test Analog Watchdog S2"
|
|
bitfld.long 0x4 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value"
|
|
group.long 0x394++0xF
|
|
line.long 0x0 "STAW4R,Self-Test Analog Watchdog C0"
|
|
bitfld.long 0x0 31. "AWDE,Self-Test Watchdog Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "WDTE,Self-Test Watchdog Timer Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.word 0x0 16.--29. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x0 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x4 "STAW5R,Self-Test Analog Watchdog C"
|
|
hexmask.long.word 0x4 16.--30. 1. "THRH,Higher Threshold Value"
|
|
hexmask.long.word 0x4 0.--14. 1. "THRL,Lower Threshold Value"
|
|
line.long 0x8 "AMSIO,Analog Miscellaneous In/Out register"
|
|
bitfld.long 0x8 17.--18. "HSEN,High-Speed Enable" "0,1,2,3"
|
|
bitfld.long 0x8 16. "CMPCTRL0,Compare Control 0" "0,1"
|
|
line.long 0xC "CALBISTREG,Control And Calibration Status"
|
|
bitfld.long 0xC 29.--31. "RESN,Conversion Resolution" "0: 14-bit resolution,1: 12-bit resolution,2: 10-bit resolution,3: 8-bit resolution,?,?,?,?"
|
|
bitfld.long 0xC 27.--28. "TSAMP,Sample Period In Calibration" "0: 22 conversion clock cycles,1: 8 conversion clock cycles,2: 16 conversion clock cycles,3: 32 conversion clock cycles"
|
|
newline
|
|
rbitfld.long 0xC 15. "C_T_BUSY,Calibration Busy" "0: Calibration can be started,1: Calibration is in progress"
|
|
bitfld.long 0xC 14. "CALSTFUL,Calibration And Self-Test Full Range Comparison" "0: Lowest 11 bits are compared.,1: All 15 bits are compared."
|
|
newline
|
|
bitfld.long 0xC 5.--6. "NR_SMPL,Calibration Averaging Number" "0: 4 samples,1: 8 samples,2: 16 samples,3: 32 samples"
|
|
bitfld.long 0xC 4. "AVG_EN,Calibration Averaging Enable" "0: Disable,1: Enable"
|
|
newline
|
|
eventfld.long 0xC 3. "TEST_FAIL,Calibration Status" "0: Calibration finished successfully or has not..,1: Calibration did not finish successfully"
|
|
bitfld.long 0xC 0. "TEST_EN,Calibration Enable" "0: Wait to start a calibration,1: Start calibration"
|
|
group.long 0x3A8++0x3
|
|
line.long 0x0 "OFSGNUSR,Offset And Gain User"
|
|
hexmask.long.word 0x0 16.--25. 1. "GAIN_USER,Gain User"
|
|
hexmask.long.byte 0x0 0.--7. 1. "OFFSET_USER,Offset User"
|
|
group.long 0x3B4++0x3
|
|
line.long 0x0 "CAL2,Calibration Value 2"
|
|
bitfld.long 0x0 15. "ENX,Enable X" "0: Disable,1: Enable"
|
|
tree.end
|
|
tree.end
|
|
tree "AEC_AE"
|
|
base ad:0x0
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "VERID,AEC Version ID"
|
|
hexmask.long.word 0x0 16.--31. 1. "ID,Unique Identifier"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MAJOR,Major Revision"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Variant"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MINOR,Minor Revision"
|
|
group.word 0x8++0x1
|
|
line.word 0x0 "LOCK_CONTROL,Lock Control"
|
|
hexmask.word.byte 0x0 8.--15. 1. "UNLOCK_KEY,Unlock Key"
|
|
newline
|
|
bitfld.word 0x0 6. "RSTG_CFG_LOCK,Lock Write Access to RSTGEN_CFG" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "IRQ_SET_LOCK,Lock Write Access to IRQ_SET" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CLKG_CFG_LOCK,Lock Write Access to CLKGEN_CFG" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "LPWU_CTL_LOCK,Lock Write Access to LPWU_CONTROL" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "TMON_CHK_LOCK,Temperature Sensor Check Lock" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FWDG_CFG_LOCK,Lock Write Access to Configuration of the FAULT Watchdog" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "AWDG_CFG_LOCK,Lock Write Access to Registers of the Alive Watchdog" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "LPWU_CONTROL,Power Mode Control"
|
|
bitfld.long 0x0 31. "NOIRQ_CFG,No IRQ After Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SW_RST_REQ,Software Reset Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DEEP_SLEEP_REQ,Deep Sleep Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SLEEP_REQ,Sleep Request" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LPTIMER_CFG,LP Timer Configuration"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "EVENTS_STATUS,Event Notifications Status"
|
|
eventfld.word 0x0 15. "FRAMEWIDTH_FL,SPI Framewidth Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 14. "STATERESET_FL,State Machine Reset Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "HVI_AE_SUPPLY_FL,HVI1 Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 9. "HVI_ACTIVE_FL,HVI0 Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "WAKEUP_FL,Wake-up Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 7. "LVD_VDDC_FL,LVD Vddc Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 6. "CAN_INT_FL,CANPHY Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 5. "TEMP_WDG_PHY_FL,Temperature Monitor PHY Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "TEMP_WDG_PMC_FL,Temperature Monitor PMC Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 3. "OCD_VDDE_FL,Over Current Detector Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "LIN_INT_FL,LINPHY Notification Flag" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "EVENTS_ENABLE,Event Notifications Enable"
|
|
bitfld.word 0x0 15. "FRAMEWIDTH_EN,SPI Framewidth Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "STATERESET_EN,State Machine Reset Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "HVI_AE_SUPPLY_EN,HVM1 Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "HVI_ACTIVE_EN,HVM0 Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "WAKEUP_EN,Wake Up Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 7. "LVD_VDDC_EN,LVD VDDC Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 6. "CAN_INT_EN,CANPHY Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 5. "TEMP_WDG_PHY_EN,Temperature Sensor PHY Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "TEMP_WDG_PMC_EN,Temperature Sensor PMC Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "OCD_VDDE_EN,Over Current Detector Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "LIN_INT_EN,LINPHY Notification Enable" "0,1"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "FAULTS_STATUS,Fault Notifications Status"
|
|
eventfld.word 0x0 15. "ALIVE_WDG_FL,Alive Watchdog Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 14. "ILL_TEST_FL,Illegal Test Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 13. "HVD_AE_INTERN_FL,HVD Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "MCU_SUPPLY_FL,MCU Supply Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 11. "EVENT_EXPIRED_FL,Event Expired Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 10. "XFER_ERR_FL,Transfer Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 9. "OBSCHK_ERR_FL,OBSCHK Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "CHKSUM_ERR_FL,Checksum Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 7. "RAW_FAILED_FL,RAW Failed Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "PMC_VLS_FL,PMC VLS Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 3. "DPGA_OC_POS_FL,DPGA OC POS Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "DPGA_OC_NEG_FL,DPGA OC NEG Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "GDU_INT_FL,GDU Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 0. "GDU_FAULT_PROT_FL,GDU Fault Protection Notification Flag" "0,1"
|
|
group.word 0x1C++0x1
|
|
line.word 0x0 "FAULTS_ENABLE,Fault Notifications Enable"
|
|
bitfld.word 0x0 15. "ALIVE_WDG_EN,Alive Watchdog Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "ILL_TEST_EN,Illegal Test Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 13. "HVD_AE_INTERN_EN,HVD Internal Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "MCU_SUPPLY_EN,MCU Supply Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "EVENT_EXPIRED_EN,Event Expired Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "XFER_ERR_EN,Transfer Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "OBSCHK_ERR_EN,OBSCHK Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "CHKSUM_ERR_EN,Checksum Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "RAW_FAILED_EN,RAW Failed Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "PMC_VLS_EN,PMC VLS Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 3. "DPGA_OC_POS_EN,DPGA OC POS Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "DPGA_OC_NEG_EN,DPGA OC NEG Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "GDU_INT_EN,GDU Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "GDU_FAULT_PROT_EN,GDU Fault Protection Notification Enable" "0,1"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "NOTIFS_MONITOR,Monitoring of Notifications"
|
|
eventfld.long 0x0 16. "DPGA_PAR_ERR,Current Parity Value Error" "0,1"
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newline
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eventfld.long 0x0 11. "OTP_MIRROR_PAR_ERR,Current Parity Value Error" "0,1"
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|
newline
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bitfld.long 0x0 10. "OTP_MIRROR_PAR_VAL,Parity Value Of Mirror Registers After Completion Of Otp Boot" "0,1"
|
|
newline
|
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eventfld.long 0x0 9. "RSTG_CFG_PAR_ERR,Current Parity Value Error" "0,1"
|
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newline
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bitfld.long 0x0 8. "RSTG_CFG_PAR_VAL,Current Parity Value" "0,1"
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newline
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eventfld.long 0x0 7. "FAULTS_ENA_PAR_ERR,Current Parity Value Error" "0,1"
|
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newline
|
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bitfld.long 0x0 6. "FAULTS_ENA_PAR_VAL,Current Parity Value" "0,1"
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newline
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eventfld.long 0x0 5. "EVENTS_ENA_PAR_ERR,Current Parity Value Error" "0,1"
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newline
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bitfld.long 0x0 4. "EVENTS_ENA_PAR_VAL,Current Parity Value" "0,1"
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newline
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eventfld.long 0x0 3. "FAULT_WD_CFG_PAR_ERR,Current Parity Value Error" "0,1"
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newline
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bitfld.long 0x0 2. "FAULT_WD_CFG_PAR_VAL,Current Parity Value" "0,1"
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newline
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eventfld.long 0x0 1. "ALIVE_WD_CFG_PAR_ERR,Current Parity Value Error" "0,1"
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newline
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bitfld.long 0x0 0. "ALIVE_WD_CFG_PAR_VAL,Current Parity Value" "0,1"
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line.long 0x4 "IRQ_SET,Set Status Bits"
|
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bitfld.long 0x4 31. "FLT15_SET,Forces Flag Corresponding To Fault 15" "0,1"
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bitfld.long 0x4 30. "FLT14_SET,Forces Flag Corresponding To Fault 14" "0,1"
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bitfld.long 0x4 29. "FLT13_SET,Forces Flag Corresponding To Fault 13" "0,1"
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bitfld.long 0x4 28. "FLT12_SET,Forces Flag Corresponding To Fault 12" "0,1"
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bitfld.long 0x4 27. "FLT11_SET,Forces Flag Corresponding To Fault 11" "0,1"
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bitfld.long 0x4 26. "FLT10_SET,Forces Flag Corresponding To Fault 10" "0,1"
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bitfld.long 0x4 25. "FLT09_SET,Forces Flag Corresponding To Fault 9" "0,1"
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bitfld.long 0x4 24. "FLT08_SET,Forces Flag Corresponding To Fault 8" "0,1"
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bitfld.long 0x4 23. "FLT07_SET,Forces Flag Corresponding To Fault 7" "0,1"
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bitfld.long 0x4 20. "FLT04_SET,Forces Flag Corresponding To Fault 4" "0,1"
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bitfld.long 0x4 19. "FLT03_SET,Forces Flag Corresponding To Fault 3" "0,1"
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bitfld.long 0x4 18. "FLT02_SET,Forces Flag Corresponding To Fault 2" "0,1"
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bitfld.long 0x4 17. "FLT01_SET,Forces Flag Corresponding To Fault 1" "0,1"
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bitfld.long 0x4 16. "FLT00_SET,Forces Flag Corresponding To Fault 0" "0,1"
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bitfld.long 0x4 15. "EVT15_SET,Forces Flag Corresponding to Event 15" "0,1"
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bitfld.long 0x4 14. "EVT14_SET,Forces Flag Corresponding to Event 14" "0,1"
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newline
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bitfld.long 0x4 12. "EVT12_SET,Forces Flag Corresponding To Event 12" "0,1"
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newline
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bitfld.long 0x4 9. "EVT09_SET,Forces Flag Corresponding To Event 9" "0,1"
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newline
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bitfld.long 0x4 8. "EVT08_SET,Forces Flag Corresponding To Event 8" "0,1"
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newline
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bitfld.long 0x4 7. "EVT07_SET,Forces Flag Corresponding To Event 7" "0,1"
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newline
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bitfld.long 0x4 6. "EVT06_SET,Forces Flag Corresponding To Event 6" "0,1"
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newline
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bitfld.long 0x4 5. "EVT05_SET,Forces Flag Corresponding To Event 5" "0,1"
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newline
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bitfld.long 0x4 4. "EVT04_SET,Forces Flag Corresponding To Event 4" "0,1"
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newline
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bitfld.long 0x4 3. "EVT03_SET,Forces Flag Corresponding To Event 3" "0,1"
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newline
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bitfld.long 0x4 2. "EVT02_SET,Forces Flag Corresponding To Event 2" "0,1"
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line.long 0x8 "SAFETY_ENABLE,Safety Enable"
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bitfld.long 0x8 31. "FAULT_ALIVE_WDG_EN,Safe State Enable For FAULT ALIVE_WDG" "0,1"
|
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newline
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bitfld.long 0x8 30. "FAULT_ILL_TEST_EN,Safe State Enable For FAULT ILL_TEST" "0,1"
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newline
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rbitfld.long 0x8 29. "FAULT13_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 28. "FAULT12_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 27. "FAULT11_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 26. "FAULT10_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 25. "FAULT09_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 24. "FAULT08_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 23. "FAULT07_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 22. "FAULT06_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 21. "FAULT05_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 20. "FAULT04_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 19. "FAULT03_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 18. "FAULT02_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 17. "FAULT01_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 16. "FAULT00_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 15. "EVENT15_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 14. "EVENT14_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 13. "EVENT13_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 12. "EVENT12_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 11. "EVENT11_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 10. "EVENT10_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 9. "EVENT09_EN,Not Used" "0,1"
|
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newline
|
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rbitfld.long 0x8 8. "EVENT08_EN,Not Used" "0,1"
|
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newline
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rbitfld.long 0x8 7. "EVENT07_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 6. "EVENT06_EN,Not Used" "0,1"
|
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newline
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rbitfld.long 0x8 5. "EVENT05_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 4. "EVENT04_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 3. "EVENT03_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 2. "EVENT02_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 1. "EVENT01_EN,Not Used" "0,1"
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newline
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rbitfld.long 0x8 0. "EVENT00_EN,Not Used" "0,1"
|
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group.word 0x2C++0x1
|
|
line.word 0x0 "SYSCLK_CHECK,System Clock Check"
|
|
hexmask.word 0x0 7.--15. 1. "VALID_THR_U,Valid System Clock Threshold Range Upper Boundary"
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newline
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hexmask.word.byte 0x0 0.--6. 1. "VALID_THR_L,Valid System Clock Threshold Range Lower Boundary"
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group.word 0x30++0x1
|
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line.word 0x0 "ALIVE_WD_CFG,Alive Watchdog Configuration"
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bitfld.word 0x0 15. "WDW_FAULTREC,Fault Response Configuration" "0: Unserviced watchdog triggers a fault..,1: Unserviced watchdog triggers a device reset"
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newline
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bitfld.word 0x0 14. "WDW_MODE,Watchdog Mode" "0: Simple mode. Expected response is token,1: Challenge mode. Expected response is given by a.."
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newline
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bitfld.word 0x0 8.--9. "WDW_BADRESP,Max Number Of Bad Responses. Access Are Locked" "0: First incorrect response token triggers a fault..,1: One incorrect response token permitted before..,2: Two incorrect response token permitted before..,3: Three incorrect response token permitted before.."
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newline
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bitfld.word 0x0 6.--7. "WDW_DC,Window duty cycle" "0: 0% Closed (feature disabled),1: First 31.25% closed (exact ratio: 1/2-1/4+1/16),2: First 50% closed,3: First 68.75% closed (exact ratio: 1/2+1/4-1/16)"
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newline
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hexmask.word.byte 0x0 0.--3. 1. "WDW_PERIOD,Watchdog Window Duration. Access Are Locked."
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group.word 0x34++0x1
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line.word 0x0 "ALIVE_WD_TOKEN,Alive Watchdog Reference Value"
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hexmask.word 0x0 0.--15. 1. "WD_TOKEN,Token"
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group.word 0x38++0x1
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line.word 0x0 "ALIVE_WD_ANSWER,Alive Watchdog Answer"
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hexmask.word 0x0 0.--15. 1. "WD_ANSWER,Answer"
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group.word 0x3C++0x1
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line.word 0x0 "FAULT_WD_CFG,Fault Watchdog Configuration"
|
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hexmask.word 0x0 0.--11. 1. "TIME_OUT_CFG,Window Period"
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group.long 0x40++0x3
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line.long 0x0 "CLKGEN_CFG,Clock Generator Configuration"
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bitfld.long 0x0 28. "SYSCLK_FREQ_CFG,System Clock Frequency Estimator Configuration" "0,1"
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newline
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hexmask.long.word 0x0 16.--24. 1. "SYSCLK_FREQ_VAL,System Clock Frequency Estimator Result"
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newline
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bitfld.long 0x0 14.--15. "RCOSC_MOD_NBR,RCOSC: number of modulation used for spreading frequency." "0: The modulation of the RCosc change between 2..,1: The modulation of the RCosc change between 4..,2: The modulation of the RCosc change between 8..,3: The modulation of the RCosc change between 16.."
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newline
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bitfld.long 0x0 11.--13. "RCOSC_MOD_FRQ,RCOSC: control frequency of switch for modulation" "0: modulation change at each RCosc cycle,1: modulation change each 2 RCosc cycles,2: modulation change each 4 RCosc cycles,3: modulation change each 8 RCosc cycles,4: modulation change each 16 RCosc cycles,5: modulation change each 32 RCosc cycles,6: modulation change each 64 RCosc cycles,7: modulation change each 128 RCosc cycles"
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newline
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bitfld.long 0x0 10. "RCOSC_MOD_ENA,RCOSC: modulation enable" "0: Disable modulation on RC oscillator,1: Enable modulation on RC oscillator"
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newline
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bitfld.long 0x0 8. "CXPI_CLK_EN,Enable CXPI functional clock" "0,1"
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newline
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hexmask.long.byte 0x0 0.--7. 1. "CLKGEN_CFG,Force Enable Of Clocks"
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group.word 0x44++0x1
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line.word 0x0 "RSTGEN_CFG,Reset Generator Configuration"
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bitfld.word 0x0 15. "NOFLUSH,No Auto Flush" "0,1"
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newline
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hexmask.word 0x0 0.--8. 1. "RSTGEN_CFG,Module Activation"
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group.long 0x48++0x3
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line.long 0x0 "IO_FUNCMUX_CFG,IO Funcmux Configuration"
|
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bitfld.long 0x0 18.--19. "CLKSEL,CLK_MUX_OUT: CLK Selection" "0: CLKOUT=OSC_RC 42 MHz divided by 8,1: CLKOUT=PMC FRO 150kHz,2: CLKOUT=CANPHY clkwuosc 1.25 MHz divided by 8,3: CLKOUT=CANPHY clkosctrx 1.95 MHz divided by 256"
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newline
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bitfld.long 0x0 17. "OUTSEL,CLK_MUX_OUT: OUT Selection" "0: CLKOUT,1: LIN Checking (LINPHY_RX)"
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newline
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bitfld.long 0x0 16. "D2D_EN,CLK_MUX_OUT: D2D Enable" "0: CLK_MUX_OUT Is in tristate,1: CLK_MUX_OUT Pad is enabled"
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newline
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bitfld.long 0x0 12. "VDDE_OCD_EN,Enable Over Current Detection" "0: VDDE Overcurrent detector is disabled,1: VDDE Overcurrent detector is enabled"
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newline
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bitfld.long 0x0 10.--11. "PHY_SEL,VDDE PHY Selection" "0: VDDE Input not used and not driven,1: VDDE Input not used and not driven,2: VDDE Use as input for CANPHY_Tx,3: VDDE Use as input for LINPHY_Tx"
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newline
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bitfld.long 0x0 9. "VDDE_SEL,VDDE Selection" "0: Weak GND,1: Strong VDD"
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newline
|
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bitfld.long 0x0 8. "VDDE_DRV,VDDE Driver" "0: Digital mode VDDE as input depends of PHY_SEL,1: Analog mode VDDE as output depends of VDDE_SEL"
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newline
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bitfld.long 0x0 1.--3. "AMPOUT_SEL,AMPOUT Selection" "0: Hi-Z (analog AMPOUT),1: CANPHY_RX,2: LINPHY_RX,3: CANPHY_WURX,4: Oscillator out (see CLKOUT),5: PWM0,6: PWM2,7: PWM4"
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newline
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bitfld.long 0x0 0. "DPGA_OUT,DPGA out Selection" "0: Digital mode AMPOUT depends of AMPOUT_SEL,1: Analog mode dpga is connected to ampout through.."
|
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group.word 0x60++0x1
|
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line.word 0x0 "LINPHY_CFG,LINPHY Configuration"
|
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bitfld.word 0x0 15. "LINPHY_ENABLE,LINPHY Enable" "0,1"
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newline
|
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bitfld.word 0x0 14. "LIN_CXPI_SEL,Select protocol used on LIN line." "0: Select LIN protocol,1: Select CXPI protocol"
|
|
newline
|
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bitfld.word 0x0 11. "CXPI_BOOST,Configures control of the falling edge." "0: Fast falling edge behavior enabled.,1: Fast falling edge behavior disabled"
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newline
|
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bitfld.word 0x0 10. "CXPI_SLOPE,Configures controlled slope timings" "0: Slope is optimized for LIN operation.,1: Slope is optimized for CXPI operation."
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newline
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bitfld.word 0x0 9. "CXPI_MS,CXPI Slave/Master mode." "0: Device is configured in CXPI master mode.,1: Device is configured in CXPI slave mode."
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newline
|
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bitfld.word 0x0 8. "CXPI_NSLP,CXPI No Sleep" "0: CXPI is in sleep mode.,1: CXPI is in normal mode."
|
|
newline
|
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bitfld.word 0x0 4.--5. "SLEW,Configures The Slew Rate Of LINPHY" "0: Slew rate optimized for Baud-Rate of 20kBIt/s,1: Slew rate optimized for Baud-Rate of 115kbits..,2: Slew rate optimized for Baud-Rate of 10.4kBIt/s,?"
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|
newline
|
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bitfld.word 0x0 3. "ENATXTO,Configures the TX Dominant Timeout Detection Of LINPHY" "0: TX dominant timeout detection disabled,1: TX dominant timeout detection enabled"
|
|
newline
|
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bitfld.word 0x0 2. "ENAWUP,Configures The Wakeup Receiver Of LINPHYs" "0: Wakeup receiver disabled,1: Wakeup receiver enabled"
|
|
newline
|
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bitfld.word 0x0 0.--1. "MODE,Configures The Operating Mode Of LINPHY" "0: Off when ENAWUP=0 or Wake capable when ENAWUP=1,1: Listen only,2: Normal,?"
|
|
group.long 0x64++0x3
|
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line.long 0x0 "LINPHY_MONITOR,LINPHY Monitor"
|
|
bitfld.long 0x0 26. "CXPI_ARBIT_EN,CXPI arbitration lost interrupt enable" "0: CXPI arbitration lost interrupt disabled,1: CXPI_ARBIT_FL causes an interrupt"
|
|
newline
|
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bitfld.long 0x0 25. "CXPI_DOMTIMOUT_EN,CXPI dominant timout Interrupt Enable" "0: CXPI dominant timout Interrupt Disable,1: CXPI_DOMTIMOUT_FL causes an interrupt"
|
|
newline
|
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bitfld.long 0x0 24. "CXPI_WKUP_EN,CXPI Wakeup Interrupt Enable" "0: CXPI wakeup interrupt disabled,1: CXPI_WKUP_FL causes an interrupt"
|
|
newline
|
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rbitfld.long 0x0 22. "CXPI_ARBIT_MON,Status of CXPI arbitration lost" "0: CXPI arbitration is not lost.,1: CXPI arbitration is lost."
|
|
newline
|
|
rbitfld.long 0x0 21. "CXPI_DOMTIMOUT_MON,Status of the CXPI TX Timeout Detector" "0: CXPI dominant timout inactive,1: CXPI dominant timout active"
|
|
newline
|
|
rbitfld.long 0x0 20. "CXPI_WKUP_MON,Status Of The CXPI Wakeup Detector" "0: CXPI wakeup inactive,1: CXPI wakeup active"
|
|
newline
|
|
eventfld.long 0x0 18. "CXPI_ARBIT_FL,CXPI arbitration lost" "0: No CXPI arbitration lost event detected,1: CXPI arbitration lost event detected"
|
|
newline
|
|
eventfld.long 0x0 17. "CXPI_DOMTIMOUT_FL,CXPI TX Timeout Detector" "0: No CXPI TX dominant timeout event detected,1: CXPI TX dominant timeout event detected"
|
|
newline
|
|
eventfld.long 0x0 16. "CXPI_WKUP_FL,CXPI Wakeup" "0: No CXPI wakeup event detected,1: CXPI wakeup event detected"
|
|
newline
|
|
bitfld.long 0x0 11. "LINPHY_ERROR_EN,LIN FSM Error Interrupt Enable" "0: Linphy FSM error interrupt disabled,1: LINPHY_ERROR_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 10. "LINPHY_TXTOSTATE_EN,LIN TX dominant Timeout Interrupt Enable" "0: Linphy dominant timeout interrupt disabled,1: LINPHY_TXTOSTATE_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 9. "LINPHY_SCPSTATE_EN,LIN Short Circuit Interrupt Enable" "0: Linphy short circuit interrupt disabled,1: LINPHY_SCPSTATE_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 8. "LINPHY_WKUP_EN,LIN Wakeup Interrupt Enable" "0: Linphy wakeup interrupt disabled,1: LINPHY_WKUP_FL causes an interrupt"
|
|
newline
|
|
rbitfld.long 0x0 7. "LINPHY_ERROR_MON,Status Of The LIN FSM Error" "0: Error in LIN FSM inactive,1: Error in LIN FSM active"
|
|
newline
|
|
rbitfld.long 0x0 6. "LINPHY_TXTOSTATE_MON,Status Of The LIN TX Dominant Timeout Detector" "0: LIN TX dominant timeout protection inactive,1: LIN TX dominant timeout protection active"
|
|
newline
|
|
rbitfld.long 0x0 5. "LINPHY_SCPSTATE_MON,Status Of The LIN Short Circuit Detector" "0: LIN short circuit protection inactive,1: LIN short circuit protection active"
|
|
newline
|
|
rbitfld.long 0x0 4. "LINPHY_WKUP_MON,Status Of The LIN Wakeup Detector" "0: LIN wakeup inactive,1: LIN wakeup active"
|
|
newline
|
|
eventfld.long 0x0 3. "LINPHY_ERROR_FL,LIN FSM Error" "0: No error in LIN FSM detected,1: Error in LIN FSM detected"
|
|
newline
|
|
eventfld.long 0x0 2. "LINPHY_TXTOSTATE_FL,LIN TX Timeout Detector" "0: No LIN TX dominant timeout event detected,1: LIN TX dominant timeout event detected"
|
|
newline
|
|
eventfld.long 0x0 1. "LINPHY_SCPSTATE_FL,LIN Short Circuit" "0: No LIN short circuit event detected,1: LIN short circuit event detected"
|
|
newline
|
|
eventfld.long 0x0 0. "LINPHY_WKUP_FL,LIN Wakeup" "0: No LIN wakeup event detected,1: LIN wakeup event detected"
|
|
group.word 0x70++0x1
|
|
line.word 0x0 "CANPHY_CFG,CANPHY Configuration"
|
|
bitfld.word 0x0 15. "CANPHY_ENABLE,CANPHY Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "MODE,CANPHY Mode Control" "0: Offline mode,1: Normal mode,?,3: Listen only mode"
|
|
group.word 0x74++0x1
|
|
line.word 0x0 "CANPHY_MONITOR,CANPHY Monitor"
|
|
bitfld.word 0x0 10. "CANPHY_INVALIDSTATE_EN,CANPHY FSM Error Notification Enable" "0: CANPHY FSM error notification disabled,1: CANPHY_INVALIDSTATE_FL triggers a notification"
|
|
newline
|
|
bitfld.word 0x0 9. "CANPHY_TXDOMTIMEDOUT_EN,CANPHY TX Dominant Timeout Notification Enable" "0: CANPHY TX dominant timeout notification disabled,1: CANPHY_TXDOMTIMEDOUT_FL triggers a notification"
|
|
newline
|
|
bitfld.word 0x0 8. "CANPHY_WKUP_EN,CANPHY Wakeup Notification Enable" "0: CANPHY wakeup notification disabled,1: CANPHY_WKUP_FL triggers a notification"
|
|
newline
|
|
rbitfld.word 0x0 6. "CANPHY_INVALIDSTATE_MON,Live Status Of The CANPHY FSM Error" "0: No error in CANPHY FSM,1: Error in CANPHY FSM"
|
|
newline
|
|
rbitfld.word 0x0 5. "CANPHY_TXDOMTIMEDOUT_MON,Live status of the CANPHY TX dominant timeout detector" "0: CANPHY TX dominant timeout protection inactive,1: CANPHY TX dominant timeout protection active"
|
|
newline
|
|
rbitfld.word 0x0 4. "CANPHY_WKUP_MON,Live Status Of The CANPHY Wakeup Detector" "0: CANPHY wakeup inactive,1: CANPHY wakeup active"
|
|
newline
|
|
eventfld.word 0x0 2. "CANPHY_INVALIDSTATE_FL,CANPHY Invalid State" "0: No CANPHY FSM error event detected,1: CANPHY FSM error event detected"
|
|
newline
|
|
eventfld.word 0x0 1. "CANPHY_TXDOMTIMEDOUT_FL,CANPHY TX Dominant Timeout" "0: No CANPHY TX dominant timeout event detected,1: CANPHY TX dominant timeout event detected"
|
|
newline
|
|
eventfld.word 0x0 0. "CANPHY_WKUP_FL,CANPHY Wakeup" "0: No CANPHY wakeup event detected,1: CANPHY wakeup event detected"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "TMON_PHY,Temperature Monitor PHY"
|
|
bitfld.long 0x0 19. "PHY_175_EN,PHY 175degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 18. "PHY_150_EN,PHY 150degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 17. "PHY_125_EN,PHY 125degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 16. "PHY_85_EN,PHY 85degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
rbitfld.long 0x0 11. "PHY_175_MON,PHY Temperature Sensor Is Over 175degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 10. "PHY_150_MON,PHY Temperature Sensor Is Over 150degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 9. "PHY_125_MON,PHY Temperature Sensor Is Over 125degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 8. "PHY_85_MON,PHY Temperature Sensor Is Over 85degree C" "0,1"
|
|
newline
|
|
eventfld.long 0x0 3. "PHY_175_FL,Status flag for temperature crossing over 175degree C This is a sticky-bit implemented as W1C that is set whenever this temperature is reached" "0,1"
|
|
newline
|
|
eventfld.long 0x0 2. "PHY_150_FL,PHY 150degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x0 1. "PHY_125_FL,PHY 125degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x0 0. "PHY_85_FL,PHY 85degree Flag" "0,1"
|
|
line.long 0x4 "TMON_PMC,Temperature Monitor PMC"
|
|
bitfld.long 0x4 19. "PMC_175_EN,PMC 175degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 18. "PMC_150_EN,PMC 150degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 17. "PMC_125_EN,PMC 125degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 16. "PMC_85_EN,PMC 85degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
rbitfld.long 0x4 11. "PMC_175_MON,PMC Temperature Sensor Is Over 175degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 10. "PMC_150_MON,PMC Temperature Sensor Is Over 150degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 9. "PMC_125_MON,PMC Temperature Sensor Is Over 125degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 8. "PMC_85_MON,PMC Temperature Sensor Is Over 85degree C" "0,1"
|
|
newline
|
|
eventfld.long 0x4 3. "PMC_175_FL,PMC 175degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 2. "PMC_150_FL,PMC 150degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 1. "PMC_125_FL,PMC 125degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 0. "PMC_85_FL,PMC 85degree Flag" "0,1"
|
|
group.word 0x88++0x3
|
|
line.word 0x0 "TMON_MONITOR,TMON Monitor"
|
|
bitfld.word 0x0 12. "PMC_SELF_EN,TEMPSENSOR PMC self-test Failure Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 9. "PMC_SELF_MON,TEMPSENSOR Monitor Self-test" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "PMC_SELF_FL,TEMPSENSOR PMC Self-test Failure Status" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "PHY_SELF_EN,TEMPSENSOR PHY Self-test Failure Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "PHY_SELF_MON,TEMPSENSOR Monitor Self-Test" "0,1"
|
|
newline
|
|
eventfld.word 0x0 0. "PHY_SELF_FL,TEMPSENSOR PHY Self-test Failure Status" "0,1"
|
|
line.word 0x2 "TMON_CHECK,TMON Check"
|
|
rbitfld.word 0x2 1. "SELF_ACT,Status Of Self-check Command" "0: Self-check is inactive,1: Self-check is active still running"
|
|
newline
|
|
bitfld.word 0x2 0. "SELF_CMD,Trigger self-test On Both Temp Sensors" "?,1: Trigger a new self-test"
|
|
tree.end
|
|
tree "BCTU"
|
|
base ad:0x40084000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 31. "Software_Reset,Software Reset" "0: Deasserts,1: Asserts"
|
|
bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable (normal operation),1: Disable (low-power operation)"
|
|
newline
|
|
bitfld.long 0x0 29. "FRZ,Debug Freeze" "0: Disables,1: Enables"
|
|
bitfld.long 0x0 26. "GTRGEN,Global Trigger Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 17. "DMA1,Enable ADC1DR DMA" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "DMA0,Enable ADC0DR DMA" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "TRGEN,Trigger Interrupt Request Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 5. "LIST_IEN,CL Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "IEN1,Interrupt Enable For ADC1DR" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "IEN0,Interrupt Enable For ADC0DR" "0: Disable,1: Enable"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "MSR,Module Status"
|
|
bitfld.long 0x0 31. "TRGF_CLR,TRGF Clear" "0: No action,1: Changes to 0"
|
|
bitfld.long 0x0 25. "LIST1_Last_CLR,CL 1 Last Clear" "0: No action,1: Changes to 0"
|
|
newline
|
|
bitfld.long 0x0 24. "LIST0_Last_CLR,CL 0 Last Clear" "0: No action,1: Changes to 0"
|
|
bitfld.long 0x0 21. "DATAOVR1_CLR,DATAOVR1 Clear" "0: No action,1: Changes to 0"
|
|
newline
|
|
bitfld.long 0x0 20. "DATAOVR0_CLR,DATAOVR0 Clear" "0: No action,1: Changes to 0"
|
|
bitfld.long 0x0 17. "NDATA1_CLR,New Data Clear" "0: No action,1: Changes to 0"
|
|
newline
|
|
bitfld.long 0x0 16. "NDATA0_CLR,New Data Clear" "0: No action,1: Changes to 0"
|
|
rbitfld.long 0x0 15. "TRGF,Trigger Flag" "0: No ADC triggered,1: An ADC was triggered"
|
|
newline
|
|
rbitfld.long 0x0 9. "LIST1_Last,CL 1 Last Conversion" "0: Last conversion not complete,1: Last conversion complete"
|
|
rbitfld.long 0x0 8. "LIST0_Last,CL 0 Last Conversion" "0: Last conversion not complete,1: Last conversion complete"
|
|
newline
|
|
rbitfld.long 0x0 5. "DATAOVR1,Data Overrun 1" "0: Data not overwritten,1: Data overwritten"
|
|
rbitfld.long 0x0 4. "DATAOVR0,Data Overrun 0" "0: Data not overwritten,1: Data overwritten"
|
|
newline
|
|
rbitfld.long 0x0 1. "NDATA1,New Data 1" "0: Not available,1: Available"
|
|
rbitfld.long 0x0 0. "NDATA0,New Data 0" "0: Not available,1: Available"
|
|
repeat 48. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x18)++0x3
|
|
line.long 0x0 "TRGCFG_[$1],Trigger Configuration"
|
|
bitfld.long 0x0 31. "LOOP,Loop" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28.--30. "DATA_DEST,Data Destination" "0: ADC-specific data registers,1: FIFO1,2: FIFO2,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 15. "TRIGEN,Trigger Enable" "0: Disable,1: Enable"
|
|
eventfld.long 0x0 14. "TRG_FLAG,Trigger Flag" "0: No action,1: Changes to 0"
|
|
newline
|
|
bitfld.long 0x0 13. "TRS,Trigger Resolution" "0: Single conversion,1: CL conversions"
|
|
bitfld.long 0x0 9. "ADC_SEL1,ADC Select 1" "0: Deselects,1: Selects"
|
|
newline
|
|
bitfld.long 0x0 8. "ADC_SEL0,ADC Select 0" "0: Deselects,1: Selects"
|
|
hexmask.long.byte 0x0 0.--6. 1. "CHANNEL_VALUE_OR_LADDR,Channel or CL Address"
|
|
repeat.end
|
|
group.long 0x228++0xB
|
|
line.long 0x0 "WRPROT,Write Protection"
|
|
hexmask.long.byte 0x0 0.--3. 1. "PROTEC_CODE,Protection Code"
|
|
line.long 0x4 "SFTRGR1,Software Trigger 1"
|
|
bitfld.long 0x4 31. "SFTRG31,Software Trigger 31" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 30. "SFTRG30,Software Trigger 30" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 29. "SFTRG29,Software Trigger 29" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 28. "SFTRG28,Software Trigger 28" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 27. "SFTRG27,Software Trigger 27" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 26. "SFTRG26,Software Trigger 26" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 25. "SFTRG25,Software Trigger 25" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 24. "SFTRG24,Software Trigger 24" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 23. "SFTRG23,Software Trigger 23" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 22. "SFTRG22,Software Trigger 22" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 21. "SFTRG21,Software Trigger 21" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 20. "SFTRG20,Software Trigger 20" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 19. "SFTRG19,Software Trigger 19" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 18. "SFTRG18,Software Trigger 18" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 17. "SFTRG17,Software Trigger 17" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 16. "SFTRG16,Software Trigger 16" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 15. "SFTRG15,Software Trigger 15" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 14. "SFTRG14,Software Trigger 14" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 13. "SFTRG13,Software Trigger 13" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 12. "SFTRG12,Software Trigger 12" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 11. "SFTRG11,Software Trigger 11" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 10. "SFTRG10,Software Trigger 10" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 9. "SFTRG9,Software Trigger 9" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 8. "SFTRG8,Software Trigger 8" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 7. "SFTRG7,Software Trigger 7" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 6. "SFTRG6,Software Trigger 6" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 5. "SFTRG5,Software Trigger 5" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 4. "SFTRG4,Software Trigger 4" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 3. "SFTRG3,Software Trigger 3" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 2. "SFTRG2,Software Trigger 2" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x4 1. "SFTRG1,Software Trigger 1" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x4 0. "SFTRG0,Software Trigger 0" "0: No effect,1: Trigger conversion"
|
|
line.long 0x8 "SFTRGR2,Software Trigger 2"
|
|
bitfld.long 0x8 15. "SFTRG47,Software Trigger 47" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 14. "SFTRG46,Software Trigger 46" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 13. "SFTRG45,Software Trigger 45" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 12. "SFTRG44,Software Trigger 44" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 11. "SFTRG43,Software Trigger 43" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 10. "SFTRG42,Software Trigger 42" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 9. "SFTRG41,Software Trigger 41" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 8. "SFTRG40,Software Trigger 40" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 7. "SFTRG39,Software Trigger 39" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 6. "SFTRG38,Software Trigger 38" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 5. "SFTRG37,Software Trigger 37" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 4. "SFTRG36,Software Trigger 36" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 3. "SFTRG35,Software Trigger 35" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 2. "SFTRG34,Software Trigger 34" "0: No effect,1: Trigger conversion"
|
|
newline
|
|
bitfld.long 0x8 1. "SFTRG33,Software Trigger 33" "0: No effect,1: Trigger conversion"
|
|
bitfld.long 0x8 0. "SFTRG32,Software Trigger 32" "0: No effect,1: Trigger conversion"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x23C)++0x3
|
|
line.long 0x0 "ADCDR[$1],ADCn Result Data"
|
|
hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source"
|
|
hexmask.long.byte 0x0 18.--24. 1. "CH,Channel"
|
|
newline
|
|
bitfld.long 0x0 17. "LIST,List" "0: Single conversion,1: CL"
|
|
bitfld.long 0x0 16. "LAST,Last" "0: Not the last conversion of a CL or not a CL..,1: Last conversion of a CL"
|
|
newline
|
|
hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data"
|
|
repeat.end
|
|
rgroup.long 0x24C++0x3
|
|
line.long 0x0 "LISTSTAR,CL Size Status"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LISTSZ,CL Size"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x250)++0x3
|
|
line.long 0x0 "LISTCHR_[$1],CL Channel Address"
|
|
bitfld.long 0x0 31. "LAST_y,Last Channel" "0: Not last,1: Last channel in CL"
|
|
bitfld.long 0x0 30. "NEXT_CH_WAIT_ON_TRIG_y,Next Channel Wait For Trigger" "0: CL executes continuously,1: CL stops executing"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "ADC_CH_y,ADC Channel Selection"
|
|
bitfld.long 0x0 15. "LAST_y_plus_1,Last Channel Plus 1" "0: Not next-to-last,1: Next-to-last channel in CL"
|
|
newline
|
|
bitfld.long 0x0 14. "NEXT_CH_WAIT_ON_TRIG_y_plus_1,Next Channel Wait For Trigger Plus 1" "0: CL executes continuously,1: CL stops executing"
|
|
hexmask.long.byte 0x0 0.--6. 1. "ADC_CHL_y_plus_1,ADC Channel Selection Plus 1"
|
|
repeat.end
|
|
rgroup.long 0x450++0x7
|
|
line.long 0x0 "FIFO1DR,FIFO Result Data"
|
|
hexmask.long.byte 0x0 25.--31. 1. "TRG_SRC,Trigger Source"
|
|
hexmask.long.byte 0x0 18.--24. 1. "CH,Channel"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3"
|
|
hexmask.long.word 0x0 0.--14. 1. "ADC_DATA,ADC Data"
|
|
line.long 0x4 "FIFO2DR,FIFO Result Data"
|
|
hexmask.long.byte 0x4 25.--31. 1. "TRG_SRC,Trigger Source"
|
|
hexmask.long.byte 0x4 18.--24. 1. "CH,Channel"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "ADC_NUM,ADC Number" "0: ADC 0,1: ADC 1,2: ADC 2,3: ADC 3"
|
|
hexmask.long.word 0x4 0.--14. 1. "ADC_DATA,ADC Data"
|
|
group.long 0x460++0xB
|
|
line.long 0x0 "FIFOCR,FIFO Control"
|
|
bitfld.long 0x0 25. "DMA_EN_FIFO2,FIFO2 DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 24. "DMA_EN_FIFO1,FIFO1 DMA Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 17. "IEN_FIFO2,FIFO2 Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "IEN_FIFO1,FIFO1 Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "FIFOWM,FIFO Watermark Configuration"
|
|
bitfld.long 0x4 8.--10. "WM_FIFO2,FIFO2 Watermark Level" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x4 0.--3. 1. "WM_FIFO1,FIFO1 Watermark Level"
|
|
line.long 0x8 "FIFOERR,FIFO Error/Status"
|
|
eventfld.long 0x8 27. "UNDR_ERR_FIFO2,Underrun Error Flag" "0: No underrun,1: Underrun"
|
|
eventfld.long 0x8 26. "OVR_ERR_FIFO2,Overrun Error Flag" "0: No overrun,1: Overrun"
|
|
newline
|
|
eventfld.long 0x8 25. "UNDR_ERR_FIFO1,Underrun Error Flag" "0: No underrun,1: Underrun"
|
|
eventfld.long 0x8 24. "OVR_ERR_FIFO1,Overrun Error Flag" "0: No overrun,1: Overrun"
|
|
newline
|
|
eventfld.long 0x8 17. "WM_INT_FIFO2,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark"
|
|
eventfld.long 0x8 16. "WM_INT_FIFO1,FIFO Watermark Interrupt Status" "0: Does not exceed watermark,1: Exceeds watermark"
|
|
rgroup.long 0x46C++0x7
|
|
line.long 0x0 "FIFOSR,FIFO Status"
|
|
bitfld.long 0x0 1. "FULL_FIFO2,FIFO Full" "0: Not full,1: Full"
|
|
bitfld.long 0x0 0. "FULL_FIFO1,FIFO Full" "0: Not full,1: Full"
|
|
line.long 0x4 "FIFOCNTR,FIFO Counter"
|
|
hexmask.long.byte 0x4 8.--11. 1. "CNTR_FIFO2,FIFO2 Counter"
|
|
hexmask.long.byte 0x4 0.--4. 1. "CNTR_FIFO1,FIFO1 Counter"
|
|
tree.end
|
|
tree "CMU_FC"
|
|
base ad:0x0
|
|
tree "CMU_0"
|
|
base ad:0x402BC000
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count"
|
|
line.long 0x8 "HTCR,High Threshold Configuration Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold"
|
|
line.long 0xC "LTCR,Low Threshold Configuration Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold"
|
|
line.long 0x10 "SR,Status Register"
|
|
rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running"
|
|
eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred"
|
|
newline
|
|
eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred"
|
|
line.long 0x14 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled"
|
|
tree.end
|
|
tree "CMU_3"
|
|
base ad:0x402BC060
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count"
|
|
line.long 0x8 "HTCR,High Threshold Configuration Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold"
|
|
line.long 0xC "LTCR,Low Threshold Configuration Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold"
|
|
line.long 0x10 "SR,Status Register"
|
|
rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running"
|
|
eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred"
|
|
newline
|
|
eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred"
|
|
line.long 0x14 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled"
|
|
tree.end
|
|
tree "CMU_4"
|
|
base ad:0x402BC080
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count"
|
|
line.long 0x8 "HTCR,High Threshold Configuration Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold"
|
|
line.long 0xC "LTCR,Low Threshold Configuration Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold"
|
|
line.long 0x10 "SR,Status Register"
|
|
rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running"
|
|
eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred"
|
|
newline
|
|
eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred"
|
|
line.long 0x14 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled"
|
|
tree.end
|
|
tree "CMU_5"
|
|
base ad:0x402BC0A0
|
|
group.long 0x0++0x17
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FCE,Frequency Check Enable" "0: Stops frequency checking,1: Starts frequency checking"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference clock count"
|
|
line.long 0x8 "HTCR,High Threshold Configuration Register"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "HFREF,High frequency reference threshold"
|
|
line.long 0xC "LTCR,Low Threshold Configuration Register"
|
|
hexmask.long.tbyte 0xC 0.--23. 1. "LFREF,Low Frequency Reference Threshold"
|
|
line.long 0x10 "SR,Status Register"
|
|
rbitfld.long 0x10 4. "RS,Run Status" "0: Frequency check stopped,1: Frequency check running"
|
|
eventfld.long 0x10 1. "FHH,Frequency higher than high frequency reference threshold event status" "0: No FHH event,1: FHH event occurred"
|
|
newline
|
|
eventfld.long 0x10 0. "FLL,Frequency lower than low frequency reference threshold event status" "0: No FLL event,1: FLL event occurred"
|
|
line.long 0x14 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x14 3. "FHHAIE,Frequency Higher than High Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FHH event interrupt disabled,1: Asynchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 2. "FLLAIE,Frequency Lower than Low Frequency Reference Threshold Asynchronous Interrupt Enable" "0: Asynchronous FLL event interrupt disabled,1: Asynchronous FLL event interrupt enabled"
|
|
newline
|
|
bitfld.long 0x14 1. "FHHIE,Frequency Higher than High Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FHH event interrupt disabled,1: Synchronous FHH event interrupt enabled"
|
|
bitfld.long 0x14 0. "FLLIE,Frequency Lower than Low Frequency Reference Threshold Synchronous Interrupt Enable" "0: Synchronous FLL event interrupt disabled,1: Synchronous FLL event interrupt enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "CMU_FM"
|
|
base ad:0x0
|
|
tree "CMU_1"
|
|
base ad:0x402BC020
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FME,Frequency Meter Enable" "0: Stops frequency metering,1: Starts frequency metering"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count"
|
|
line.long 0x8 "SR,Status Register"
|
|
hexmask.long.tbyte 0x8 8.--31. 1. "MET_CNT,Meter Clock Count"
|
|
rbitfld.long 0x8 4. "RS,Run Status" "0: Frequency meter stopped,1: Frequency meter running"
|
|
eventfld.long 0x8 1. "FMTO,Frequency Meter Time Out" "0,1"
|
|
eventfld.long 0x8 0. "FMC,Frequency Meter Operation Complete" "0,1"
|
|
line.long 0xC "IER,Interrupt Enable Register"
|
|
bitfld.long 0xC 0. "FMCIE,Frequency Meter Complete Interrupt Enable" "0: Frequency Meter complete interrupt is disabled,1: Frequency Meter complete interrupt is enabled"
|
|
tree.end
|
|
tree "CMU_2"
|
|
base ad:0x402BC040
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "GCR,Global Configuration Register"
|
|
bitfld.long 0x0 0. "FME,Frequency Meter Enable" "0: Stops frequency metering,1: Starts frequency metering"
|
|
line.long 0x4 "RCCR,Reference Count Configuration Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "REF_CNT,Reference Clock Count"
|
|
line.long 0x8 "SR,Status Register"
|
|
hexmask.long.tbyte 0x8 8.--31. 1. "MET_CNT,Meter Clock Count"
|
|
rbitfld.long 0x8 4. "RS,Run Status" "0: Frequency meter stopped,1: Frequency meter running"
|
|
eventfld.long 0x8 1. "FMTO,Frequency Meter Time Out" "0,1"
|
|
eventfld.long 0x8 0. "FMC,Frequency Meter Operation Complete" "0,1"
|
|
line.long 0xC "IER,Interrupt Enable Register"
|
|
bitfld.long 0xC 0. "FMCIE,Frequency Meter Complete Interrupt Enable" "0: Frequency Meter complete interrupt is disabled,1: Frequency Meter complete interrupt is enabled"
|
|
tree.end
|
|
tree.end
|
|
tree "CONFIGURATION_GPR"
|
|
base ad:0x4039C000
|
|
rgroup.long 0x1C++0x3
|
|
line.long 0x0 "CONFIG_REG0,General Purpose Configuration 0"
|
|
bitfld.long 0x0 6. "EDB,Hardware Debugger Attached" "0: Debugger not connected,1: Debugger connected"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "CONFIG_REG6,General Purpose Configuration 6"
|
|
bitfld.long 0x0 31. "HL,Hard Lock" "0: Write access to this register is allowed,1: Write access to this register is not allowed"
|
|
bitfld.long 0x0 4. "FLEXIO_CLOCK_GATE,FlexIO Clock Gating" "0: Clock is off (gated),1: Clock is on"
|
|
rgroup.long 0x40++0x3
|
|
line.long 0x0 "CONFIG_CFPRH,Configuration Code Flash Memory Passive Block"
|
|
bitfld.long 0x0 31. "HARD_LOCK,Hard Lock" "0: Write access is allowed,1: Write access is not allowed until next.."
|
|
bitfld.long 0x0 30. "SOFT_LOCK,Soft Lock" "0: Write access is allowed,1: Write access is not allowed"
|
|
hexmask.long.byte 0x0 13.--20. 1. "SECURE_SIZE,Secure Size"
|
|
tree.end
|
|
tree "CRC"
|
|
base ad:0x40380000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DATA,CRC Data"
|
|
hexmask.long.byte 0x0 24.--31. 1. "HU,CRC High Upper Byte"
|
|
hexmask.long.byte 0x0 16.--23. 1. "HL,CRC High Lower Byte"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "LU,CRC Low Upper Byte"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LL,CRC Low Lower Byte"
|
|
line.long 0x4 "GPOLY,CRC Polynomial"
|
|
hexmask.long.word 0x4 16.--31. 1. "HIGH,High Polynomial Half-Word"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOW,Low Polynomial Half-Word"
|
|
line.long 0x8 "CTRL,CRC Control"
|
|
bitfld.long 0x8 30.--31. "TOT,Transpose Type for Writes" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.."
|
|
bitfld.long 0x8 28.--29. "TOTR,Transpose Type for Read" "0: No transposition,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed,3: Only bytes are transposed; no bits in a byte are.."
|
|
newline
|
|
bitfld.long 0x8 26. "FXOR,Complement Read of CRC Data Register" "0: No XOR on reading,1: Inverts or complements the read value of the CRC.."
|
|
bitfld.long 0x8 25. "WAS,Write as Seed" "0: Data values,1: Seed values"
|
|
newline
|
|
bitfld.long 0x8 24. "TCRC,TCRC" "0: 16-bit,1: 32-bit"
|
|
tree.end
|
|
tree "DCM"
|
|
base ad:0x402AC000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "DCMSTAT,DCM Status"
|
|
bitfld.long 0x0 10. "DCMDBGPS,Debug Password Scanning Status" "0: Completed with errors,1: Completed successfully"
|
|
bitfld.long 0x0 9. "DCMOTAS,DCM OTA Scanning Status (valid only when the value of the DCMDONE field is 1)" "0: Completed with errors,1: Completed successfully"
|
|
newline
|
|
bitfld.long 0x0 8. "DCMUTS,DCM Utest DCF Scanning Status (valid only if DCMDONE bit is set)" "0: DCM Utest DCF completed with errors.,1: DCM Utest DCF completed successfully."
|
|
bitfld.long 0x0 4. "DCMLCST,LC Scanning Status" "0: Completed with errors,1: Completed successfully"
|
|
newline
|
|
bitfld.long 0x0 1. "DCMERR,DCM completion with error status (valid only if DCMDONE bit is set)" "0: DCM completed with success.,1: DCM completed with error."
|
|
bitfld.long 0x0 0. "DCMDONE,DCM Scanning Status" "0: Running,1: Completed"
|
|
line.long 0x4 "DCMLCC,LC and LC Control"
|
|
bitfld.long 0x4 4.--6. "DCMRLC,Real LC" "0: FA,1: Pre-FA,2: OEM_PROD,?,?,?,?,7: IN_FIELD"
|
|
bitfld.long 0x4 0.--2. "DCMCLC,Current LC" "0: FA,1: Pre-FA,2: OEM_PROD,?,?,?,?,7: IN_FIELD"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "DCMLCS,LC Scan Status"
|
|
eventfld.long 0x0 29. "DCMLCFE5,Pre-FA Flash Memory Error Check" "0: Successful,1: Failed"
|
|
eventfld.long 0x0 28. "DCMLCE5,Pre-FA ECC Errors" "0: No errors,1: Marking error"
|
|
newline
|
|
eventfld.long 0x0 25.--27. "DCMLCC5,Pre-FA Marking Status" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?"
|
|
eventfld.long 0x0 24. "DCMLCSS5,Pre-FA Scan Status" "0: Successful,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 23. "DCMLCFE4,IN_FIELD Flash Memory Error Check" "0: Successful,1: Failed"
|
|
eventfld.long 0x0 22. "DCMLCE4,IN_FIELD ECC Errors" "0: No errors,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 19.--21. "DCMLCC4,IN_FIELD Marking Status" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?"
|
|
eventfld.long 0x0 18. "DCMLCSS4,IN_FIELD Scan Status" "0: No errors,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 17. "DCMLCFE3,OEM_PROD Flash Memory Error Check" "0: Successful,1: Failed"
|
|
eventfld.long 0x0 16. "DCMLCE3,OEM_PROD ECC Errors" "0: No errors,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 13.--15. "DCMLCC3,OEM_PROD Marking" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?"
|
|
eventfld.long 0x0 12. "DCMLCSS3,OEM_PROD Scan Status" "0: No errors,1: Errors exist"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "DCMMISC,DCM Miscellaneous"
|
|
eventfld.long 0x0 28. "DCMCERS,DCF Client Errors" "0: No errors on any of the DCF clients,1: Atleast one safety DCF client has an error"
|
|
eventfld.long 0x0 11. "DCMDBGE,DCM ECC error on DBG sections" "0: No error on DBG section,1: DBG section error"
|
|
newline
|
|
eventfld.long 0x0 10. "DCMDBGT,DBG Section Error" "0: No error,1: Error exists"
|
|
rgroup.long 0x20++0x3
|
|
line.long 0x0 "DCMDEB,Debug Status and Configuration"
|
|
bitfld.long 0x0 16. "APPDBG_STAT_SOC,Application Debug Status" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 1. "DCM_APPDBG_STAT,DCM Authentication Engine Status" "0: Disabled,1: Enabled"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "DCMEC,DCF Error Count"
|
|
hexmask.long.word 0x0 0.--15. 1. "DCMECT,Error Count"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x30)++0x3
|
|
line.long 0x0 "DCMSRR$1,DCF Scan Report"
|
|
eventfld.long 0x0 29. "DCMDCFT1,Scanning Timeout On Flash Memory" "0: Does not exist,1: Exists"
|
|
eventfld.long 0x0 28. "DCMESD1,Chip Side Error" "0: No errors,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 27. "DCMESF1,Flash Memory Error" "0: No errors,1: Errors exist"
|
|
eventfld.long 0x0 24.--26. "DCMDCFF1,DCF Record Location" "?,?,2: Utest region,?,?,5: Others: Reserved,?,?"
|
|
newline
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "DCMDCFE1,Flash Memory Address"
|
|
repeat.end
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "DCMLCS_2,LC Scan Status 2"
|
|
eventfld.long 0x0 5. "DCMLCFE6,Flash Memory Error Check" "0: Successful,1: Failed"
|
|
eventfld.long 0x0 4. "DCMLCE6,FA ECC Errors" "0: No errors,1: Errors exist"
|
|
newline
|
|
eventfld.long 0x0 1.--3. "DCMLCC6,FA Marking" "0: Not scanned yet,1: Marked as active,2: Marked as inactive,3: Region is erased/virgin,?,5: Marked as inactive by an unknown pattern,6: Scanning timed out,?"
|
|
eventfld.long 0x0 0. "DCMLCSS6,FA Scan Status" "0: No errors,1: Errors exist"
|
|
tree.end
|
|
tree "DCM_GPR"
|
|
base ad:0x402AC000
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "DCMROD1,Read-Only GPR On Destructive Reset 1"
|
|
eventfld.long 0x0 0. "PCU_ISO_STATUS,PCU Input Isolation Status On Previous Standby Entry" "0: No,1: Yes"
|
|
group.long 0x208++0xB
|
|
line.long 0x0 "DCMROD3,Read-Only GPR On Destructive Reset 3"
|
|
eventfld.long 0x0 30. "CM7_0_ICDATA_ECC_ERR,Cortex-M7_0 I-cache Data ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 28. "CM7_0_DCTAG_ECC_ERR,Cortex-M7_0 D-cache Tag ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 26. "CM7_0_DCDATA_ECC_ERR,Cortex-M7_0 D-cache Data Memory ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 25. "PRAM0_ECC_ERR,Multi-Bit ECC Error From PRAM0" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 22. "LC_ERR,Error In Life Cycle Scanning" "0: No error while lifecycle scanning.,1: Error while lifecycle scanning"
|
|
newline
|
|
eventfld.long 0x0 16. "DATA_EDC_ERR,Data EDC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 15. "ADDR_EDC_ERR,Address EDC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 13. "AIPS1_GSKT_ALARM,AIPS1 IAHB Gasket Alarm Status. Read this bit to identify the reason for a fault in case of FCCU NCF 1." "0: No alarm indicated by AIPS1 IAHB gasket.,1: Alarm indicated by AIPS1 IAHB gasket."
|
|
newline
|
|
eventfld.long 0x0 11. "HSE_GSKT_ALARM,HSE IAHB Gasket Alarm Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 8. "SYS_AXBS_ALARM,System AXBS Safety Alarm Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 5. "TCM_GSKT_ALARM,TCM IAHB Gasket Monitor Alarm Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 2. "HSE_LOCKUP,HSE_B Core Lockup Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x0 0. "CM7_0_LOCKUP,Cortex-M7_0 Core Lockup Status" "0: No,1: Yes"
|
|
line.long 0x4 "DCMROD4,Read-Only GPR On Destructive Reset 4"
|
|
eventfld.long 0x4 30. "TEST_ACTIVATION_1_ERR,Accidental Partial Test Activation 1 Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 29. "TEST_ACTIVATION_0_ERR,Accidental Partial Test Activation 0 Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 27. "VDD2P5_GNG_ERR,Go/No-go Indicator For VDD_HV_FLA" "0: Yes,1: No"
|
|
newline
|
|
eventfld.long 0x4 26. "VDD1P1_GNG_ERR,Go/No-go Indicator For VDD1PD1" "0: Yes,1: No"
|
|
newline
|
|
eventfld.long 0x4 25. "FLASH_ECC_ERR,ECC Error From Flash Controller" "0: No ECC error from flash controller.,1: ECC error from flash controller."
|
|
newline
|
|
eventfld.long 0x4 22. "FLASH_SCAN_ERR,Flash Memory Scan Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 21. "FLASH_RST_ERR,Flash Reset Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 20. "FLASH_REF_ERR,Flash Memory Reference Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 19. "FLASH_ADDR_ENC_ERR,Flash Memory Address Encode Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 18. "FLASH_EDC_ERR,Flash Memory EDC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 15. "PF1_DATA_ECC_ERR,Program Flash Memory 1 Data ECC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 14. "PF1_CODE_ECC_ERR,Program Flash Memory 1 Code ECC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 13. "PF0_DATA_ECC_ERR,Program Flash Memory 0 Data ECC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 12. "PF0_CODE_ECC_ERR,Program Flash Memory 0 Code ECC Error Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 11. "HSE_RAM_ECC_ERR,HSE_B RAM Uncorrectable ECC Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 9. "PRAM0_FCCU_ALARM,PRAM0 FCCU Alarm Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 8. "DMA_TCD_RAM_ECC_ERR,eDMA TCD RAM ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 4. "CM7_0_DTCM1_ECC_ERR,Cortex-M7_0 DTCM 1 ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 3. "CM7_0_DTCM0_ECC_ERR,Cortex-M7_0 DTCM 0 ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 2. "CM7_0_ITCM_ECC_ERR,Cortex-M7_0 ITCM ECC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x4 0. "CM7_0_ICTAG_ECC_ERR,Cortex-M7_0 I-cache Tag ECC Error" "0: No,1: Yes"
|
|
line.long 0x8 "DCMROD5,Read-Only GPR On Destructive Reset 5"
|
|
eventfld.long 0x8 22. "HSE_RDATA_EDC_ERR,HSE_B Read Data EDC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 21. "CM7_0_AHBM_RDATA_EDC_ERR,Cortex-M7_0 AHBM Read Data EDC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 20. "CM7_0_AHBP_RDATA_EDC_ERR,Cortex-M7_0 AHBP Read Data EDC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 17. "DMA_RDATA_EDC_ERR,eDMA Read Data EDC Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 13. "DEBUG_ACTIVATION_ERR,Debug Activation Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 12. "MCT_BUS_ERR,MCT Bus Error" "0: No transfer error indicated from MCT.,1: Transfer error indicated from MCT."
|
|
newline
|
|
eventfld.long 0x8 11. "STCU_BIST_USER_CF,STCU2 BIST User Critical Fault (CF)" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 10. "MBIST_ACTIVATION_ERR,MBIST Activation Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 9. "STCU_NCF,STCU2 NCF Result Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 8. "SW_NCF_3,Software NCF3 Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 7. "SW_NCF_2,Software NCF2 Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 6. "SW_NCF_1,Software NCF1 Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 5. "SW_NCF_0,Software NCF 0 Status" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 4. "INTM_3_ERR,INTM_3 Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 3. "INTM_2_ERR,INTM_2 Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 2. "INTM_1_ERR,INTM_1 Error" "0: No,1: Yes"
|
|
newline
|
|
eventfld.long 0x8 1. "INTM_0_ERR,INTM_0 Error" "0: No,1: Yes"
|
|
group.long 0x300++0x43
|
|
line.long 0x0 "DCMROF1,Read-Only GPR On Functional Reset 1"
|
|
line.long 0x4 "DCMROF2,Read-Only GPR On Functional Reset 2"
|
|
hexmask.long 0x4 0.--31. 1. "DCF_SDID0,DCF Client SDID 0 Configuration"
|
|
line.long 0x8 "DCMROF3,Read-Only GPR On Functional Reset 3"
|
|
hexmask.long 0x8 0.--31. 1. "DCF_SDID1,DCF Client SDID 1 Configuration"
|
|
line.long 0xC "DCMROF4,Read-Only GPR On Functional Reset 4"
|
|
hexmask.long 0xC 0.--31. 1. "DCF_SDID2,DCF Client SDID 2 Configuration"
|
|
line.long 0x10 "DCMROF5,Read-Only GPR On Functional Reset 5"
|
|
hexmask.long 0x10 0.--31. 1. "DCF_SDID3,DCF Client SDID 3 Configuration"
|
|
line.long 0x14 "DCMROF6,Read-Only GPR On Functional Reset 6"
|
|
hexmask.long 0x14 0.--31. 1. "DCF_SDID4,DCF Client SDID 4 Configuration"
|
|
line.long 0x18 "DCMROF7,Read-Only GPR On Functional Reset 7"
|
|
hexmask.long 0x18 0.--31. 1. "DCF_SDID5,DCF Client SDID 5 Configuration"
|
|
line.long 0x1C "DCMROF8,Read-Only GPR On Functional Reset 8"
|
|
hexmask.long 0x1C 0.--31. 1. "DCF_SDID6,DCF Client SDID 6 Configuration"
|
|
line.long 0x20 "DCMROF9,Read-Only GPR On Functional Reset 9"
|
|
hexmask.long 0x20 0.--31. 1. "DCF_SDID7,DCF Client SDID 7 Configuration"
|
|
line.long 0x24 "DCMROF10,Read-Only GPR On Functional Reset 10"
|
|
hexmask.long 0x24 0.--31. 1. "DCF_SDID8,DCF Client SDID 8 Configuration"
|
|
line.long 0x28 "DCMROF11,Read-Only GPR On Functional Reset 11"
|
|
hexmask.long 0x28 0.--31. 1. "DCF_SDID9,DCF Client SDID 9 Configuration"
|
|
line.long 0x2C "DCMROF12,Read-Only GPR On Functional Reset 12"
|
|
hexmask.long 0x2C 0.--31. 1. "DCF_SDID10,DCF Client SDID 10 Configuration"
|
|
line.long 0x30 "DCMROF13,Read-Only GPR On Functional Reset 13"
|
|
hexmask.long 0x30 0.--31. 1. "DCF_SDID11,DCF Client SDID 11 Configuration"
|
|
line.long 0x34 "DCMROF14,Read-Only GPR On Functional Reset 14"
|
|
hexmask.long 0x34 0.--31. 1. "DCF_SDID12,DCF Client SDID 12 Configuration"
|
|
line.long 0x38 "DCMROF15,Read-Only GPR On Functional Reset 15"
|
|
hexmask.long 0x38 0.--31. 1. "DCF_SDID13,DCF Client SDID 13 Configuration"
|
|
line.long 0x3C "DCMROF16,Read-Only GPR On Functional Reset 16"
|
|
hexmask.long 0x3C 0.--31. 1. "DCF_SDID14,DCF Client SDID 14 Configuration"
|
|
line.long 0x40 "DCMROF17,Read-Only GPR On Functional Reset 17"
|
|
hexmask.long 0x40 0.--31. 1. "DCF_SDID15,DCF Client SDID 15 Configuration"
|
|
rgroup.long 0x348++0xB
|
|
line.long 0x0 "DCMROF19,Read-Only GPR On Functional Reset 19"
|
|
bitfld.long 0x0 31. "FCCU_EOUT_DEDICATED,FCCU EOUT Status" "0: General purpose supporting all functions,1: Dedicated EOUT pins"
|
|
newline
|
|
bitfld.long 0x0 30. "DCM_DONE,Flash Memory Scanning Status" "0: Incomplete,1: Complete"
|
|
line.long 0x4 "DCMROF20,Read-Only GPR On Functional Reset 20"
|
|
hexmask.long.word 0x4 18.--31. 1. "DCF_DEST_RST_ESC,DCF Destructive Reset Escalation"
|
|
newline
|
|
bitfld.long 0x4 6. "AIPS_IAHB_BYP,Status of AIPS1/2 IAHB gasket as configured in DCF record UTEST_MISC[AIPS_IAHB_BYP]." "0: Register wall enabled.,1: Register wall bypassed."
|
|
newline
|
|
bitfld.long 0x4 0. "POR_WDG_EN,POR Watchdog (POR_WDG) Status" "0: Disabled,1: Enabled"
|
|
line.long 0x8 "DCMROF21,Read-Only GPR On Functional Reset 21"
|
|
bitfld.long 0x8 19.--20. "HSE_CLK_MODE_OPTION,HSE_B Clock Mode Option" "0: Option A,1: Options C D E E2 and F,2: Option B,3: Option B"
|
|
newline
|
|
hexmask.long.tbyte 0x8 0.--17. 1. "DCF_DEST_RST_ESC,DCF Destructive Reset Escalation"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "DCMRWP1,Read Write GPR On POR 1"
|
|
bitfld.long 0x0 23. "SBAF_REC_DIS_DRST,Disable Recovery Mode On Destructive Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "SBAF_REC_DIS_FRST,Disable Recovery Mode On Functional Reset" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "SYS_REC_COUNTER,System Recovery Counter"
|
|
newline
|
|
hexmask.long.byte 0x0 11.--14. 1. "DEST_RESET_COUNT,Destructive Reset Counts"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "POR_WDOG_TRIM,POR_WDG Trim" "0: POR_WDG timeout = 06.25 ms,1: POR_WDG timeout = 12.50 ms,2: POR_WDG timeout = 25.00 ms,3: POR_WDG timeout = 50.00 ms"
|
|
newline
|
|
bitfld.long 0x0 8. "STANBDY_PWDOG_DIS,Standby POR_WDG Disable" "0: Enables,1: Disables"
|
|
newline
|
|
bitfld.long 0x0 3. "CLKOUT_STANDBY,Clockout Standby Expose Over Functional And Destructive Reset" "0: No,1: Yes"
|
|
group.long 0x408++0x3
|
|
line.long 0x0 "DCMRWP3,Read Write GPR On POR 3"
|
|
bitfld.long 0x0 9. "DEST_RST9_AS_IPI,Destructive Reset 9" "0: Destructive reset,1: PLL LOL interrupt"
|
|
group.long 0x504++0x1F
|
|
line.long 0x0 "DCMRWD2,Read Write GPR On Destructive Reset 2"
|
|
bitfld.long 0x0 7. "EOUT_STAT_DUR_STEST,Controls the EOUT state during self-test" "0: High impedance,1: Fault state"
|
|
line.long 0x4 "DCMRWD3,Read Write GPR On Destructive Reset 3"
|
|
bitfld.long 0x4 30. "CM7_0_ICDATA_ECC_ERR_EN,Cortex-M7_0 I-cache ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 28. "CM7_0_DCTAG_ECC_ERR_EN,Cortex-M7_0 D-cache Tag ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 26. "CM7_0_DCDATA_ECC_ERR_EN,Cortex-M7_0 D-cache Data ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 25. "PRAM0_ECC_ERR_EN,PRAM0 ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 22. "LC_ERR_EN,Life Cycle Scanning Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 16. "DATA_EDC_ERR_EN,Data EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 15. "ADDR_EDC_ERR_EN,Address EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 13. "AIPS1_GSKT_ALARM_EN,Enable bit for enabling the fault monitoring at FCCU NCF 1 for the fault: AIPS1 IAHB gasket alarm." "0: No alarm indicated by AIPS1 IAHB gasket.,1: Alarm indicated by AIPS1 IAHB gasket."
|
|
newline
|
|
bitfld.long 0x4 11. "HSE_GSKT_ALARM_EN,HSE_B Gasket Alarm Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 8. "SYS_AXBS_ALARM_EN,System AXBS Alarm Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 5. "TCM_GSKT_ALARM_EN,TCM Gasket Alarm Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x4 0. "CM7_0_LOCKUP_EN,Cortex-M7 Lockup Enable" "0: No,1: Yes"
|
|
line.long 0x8 "DCMRWD4,Read Write GPR On Destructive Reset 4"
|
|
bitfld.long 0x8 30. "TEST_ACTIVATION_1_ERR_EN,Test Activation 1 Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 29. "TEST_ACTIVATION_0_ERR_EN,Test Activation 0 Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 27. "VDD2P5_GNG_ERR_EN,VDD2P5 Go/No-go Error Enable" "0: Clean,1: Unclean"
|
|
newline
|
|
bitfld.long 0x8 26. "VDD1P1_GNG_ERR_EN,VDD1PD1 Go/No-go Error Enable" "0: Clean,1: Unclean"
|
|
newline
|
|
bitfld.long 0x8 24. "FLASH_ACCESS_ERR_EN,Flash Memory Access Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 22. "FLASH_SCAN_ERR_EN,Flash Memory Scanning Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 21. "FLASH_RST_ERR_EN,Flash Memory Reset Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 20. "FLASH_REF_ERR_EN,Flash Memory Reference Error Encode" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 19. "FLASH_ADDR_ENC_ERR_EN,Flash Memory Address Encode Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 18. "FLASH_EDC_ERR_EN,Flash Memory EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 15. "PF1_DATA_ECC_ERR_EN,PF1 Data ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 14. "PF1_CODE_ECC_ERR_EN,PF1 Code ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 13. "PF0_DATA_ECC_ERR_EN,PF0 Data ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 12. "PF0_CODE_ECC_ERR_EN,PF0 Code ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 9. "PRAM0_FCCU_ALARM_EN,PRAM0 FCCU Alarm Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 8. "DMA_TCD_RAM_ECC_ERR_EN,eDMA TCD RAM ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 4. "CM7_0_DTCM1_ECC_ERR_EN,Cortex-M7_0 DTCM 1 ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 3. "CM7_0_DTCM0_ECC_ERR_EN,Cortex-M7_0 DTCM 0 ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 2. "CM7_0_ITCM_ECC_ERR_EN,Cortex-M7 ITCM ECC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0x8 0. "CM7_0_ICTAG_ECC_ERR_EN,Cortex-M7_0 I-cache Tag ECC Error Enable" "0: No,1: Yes"
|
|
line.long 0xC "DCMRWD5,Read Write GPR On Destructive Reset 5"
|
|
bitfld.long 0xC 21. "CM7_0_AHBM_RDATA_EDC_ERR_EN,Cortex-M7_0 AHBM Read Data EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 20. "CM7_0_AHBP_RDATA_EDC_ERR_EN,Cortex-M7_0 AHBP Read Data EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 17. "DMA_RDATA_EDC_ERR_EN,eDMA Read Data EDC Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 13. "DEBUG_ACTIVATION_ERR_EN,Debug Activation Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 12. "MCT_BUS_ERR_EN,MCT Bus Error Enable" "0: No transfer error indicated from MCT.,1: Transfer error indicated from MCT."
|
|
newline
|
|
bitfld.long 0xC 11. "STCU_BIST_USER_CF_EN,STCU2 BIST User CF Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 10. "MBIST_ACTIVATION_ERR_EN,MBIST Activation Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 9. "STCU_NCF_EN,STCU2 NCF Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0xC 8. "SW_NCF_3_EN,Software NCF 3 Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0xC 7. "SW_NCF_2_EN,Software NCF 2 Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0xC 6. "SW_NCF_1_EN,Software NCF 1 Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0xC 5. "SW_NCF_0_EN,Software NCF 0 Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0xC 4. "INTM_3_ERR_EN,INTM 3 Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 3. "INTM_2_ERR_EN,INTM 2 Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 2. "INTM_1_ERR_EN,INTM 1 Error Enable" "0: No,1: Yes"
|
|
newline
|
|
bitfld.long 0xC 1. "INTM_0_ERR_EN,INTM 0 Error Enable" "0: No,1: Yes"
|
|
line.long 0x10 "DCMRWD6,Read Write GPR On Destructive Reset 6"
|
|
bitfld.long 0x10 26. "FLEXCAN2_DBG_DIS_CM7_0,FlexCAN_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 25. "FLEXCAN1_DBG_DIS_CM7_0,FlexCAN_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 24. "FLEXCAN0_DBG_DIS_CM7_0,FlexCAN_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 23. "FLEXIO_DBG_DIS_CM7_0,FlexIO Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 22. "LPI2C1_DBG_DIS_CM7_0,LPI2C_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 21. "LPI2C0_DBG_DIS_CM7_0,LPI2C_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 18. "LPSPI3_DBG_DIS_CM7_0,LPSPI_3 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 17. "LPSPI2_DBG_DIS_CM7_0,LPSPI_2 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 16. "LPSPI1_DBG_DIS_CM7_0,LPSPI_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 15. "LPSPI0_DBG_DIS_CM7_0,LPSPI_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 13. "PIT1_DBG_DIS_CM7_0,PIT_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 12. "PIT0_DBG_DIS_CM7_0,PIT_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 10. "STM0_DBG_DIS_CM7_0,STM_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 8. "SWT0_DBG_DIS_CM7_0,SWT_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 7. "RTC_DBG_DIS_CM7_0,RTC Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 5. "EMIOS1_DBG_DIS_CM7_0,EMIOS1 debug disable bit for CM7_0. Set this bit 1 to disable the debug of IP." "0: eMIOS1 enters debug mode when CM7_0 enters debug..,1: eMIOS1 remains functional and is not impacted.."
|
|
newline
|
|
bitfld.long 0x10 4. "EMIOS0_DBG_DIS_CM7_0,eMIOS_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 3. "LCU1_DBG_DIS_CM7_0,LCU_1 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 2. "LCU0_DBG_DIS_CM7_0,LCU_0 Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 1. "FCCU_DBG_DIS_CM7_0,FCCU Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
newline
|
|
bitfld.long 0x10 0. "EDMA_DBG_DIS_CM7_0,eDMA Debug Disable Cortex-M7_0" "0: Enters Debug mode,1: Remains functional and unimpacted"
|
|
line.long 0x14 "DCMRWD7,Read Write GPR On Destructive Reset 7"
|
|
line.long 0x18 "DCMRWD8,Read Write GPR On Destructive Reset 8"
|
|
line.long 0x1C "DCMRWD9,Read Write GPR On Destructive Reset 9"
|
|
group.long 0x600++0x7
|
|
line.long 0x0 "DCMRWF1,Read Write GPR On Functional Reset 1"
|
|
bitfld.long 0x0 25. "VDD_HV_A_VLT_DVDR_EN,VDD_HV_A Voltage Divider Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x0 24. "VSS_LV_ANMUX_EN,VSS_LV Monitoring Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x0 21.--23. "SUPPLY_MON_SEL,Supply Monitoring Select" "0: VDD_HV_A_DIV,1: VDD_HV_B_DIV,2: VDD_1.5_DIV,3: VDD_2.5_OSC,4: VDD1.1_PD1_HOT_POINT,5: VDD1.1_PD1_COLD_POINT,6: VDD1.1_PLL,7: VDD1.1_PD0"
|
|
newline
|
|
bitfld.long 0x0 20. "SUPPLY_MON_EN,Supply Monitoring Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x0 16. "STANDBY_IO_CONFIG,Standby I/O Configuration" "0: Must be written as 0 before IO configurations..,1: Must be written as 1 after IO configurations are.."
|
|
newline
|
|
bitfld.long 0x0 5. "FCCU_SW_NCF3,FCCU Software NCF 3" "0: Not generated,1: Generated"
|
|
newline
|
|
bitfld.long 0x0 4. "FCCU_SW_NCF2,FCCU Software NCF 2" "0: Not generated,1: Generated"
|
|
newline
|
|
bitfld.long 0x0 3. "FCCU_SW_NCF1,FCCU Software NCF 1" "0: Not generated,1: Generated"
|
|
newline
|
|
bitfld.long 0x0 2. "FCCU_SW_NCF0,FCCU Software NCF 0" "0: Not generated,1: Generated"
|
|
line.long 0x4 "DCMRWF2,Read Write GPR On Functional Reset 2"
|
|
bitfld.long 0x4 16. "HSE_GSKT_BYPASS,HSE_B Gasket Bypass" "0: Not bypassed,1: Bypassed"
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|
newline
|
|
bitfld.long 0x4 5. "PMC_TRIM_RGM_DCF_BYP_STDBY_EXT,PMC Trim MC_RGM DCF Bypass Standby Exit" "0: Not bypassed,1: Bypassed"
|
|
newline
|
|
bitfld.long 0x4 4. "FIRC_TRIM_BYP_STDBY_EXT,FIRC Trim Bypass Standby Exit" "0: Not bypassed,1: Bypassed"
|
|
newline
|
|
bitfld.long 0x4 3. "DCM_SCAN_BYP_STDBY_EXT,DCM Scan Bypass Standby Exit" "0: Not bypassed,1: Bypassed"
|
|
group.long 0x60C++0x7
|
|
line.long 0x0 "DCMRWF4,Read Write GPR On Functional Reset 4"
|
|
bitfld.long 0x0 28. "MUX_MODE_EN_ADC0_P2,Mux Mode Enable ADC0 Precision Channel 2nd" "0: Selects GPIO_8 as the ADC0_P2.,1: Selects GPIO_10 as the ADC0_P2."
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|
newline
|
|
bitfld.long 0x0 17. "CM7_0_CPUWAIT,Cortex-M7_0 CPU Wait" "0: Disables CPUWAIT,1: Enables CPUWAIT"
|
|
newline
|
|
bitfld.long 0x0 16. "GLITCH_FIL_TRG_IN3_BYP,Glitch Filter TRGMUX Input 3 Bypass" "0: Enables,1: Bypasses"
|
|
newline
|
|
bitfld.long 0x0 15. "GLITCH_FIL_TRG_IN2_BYP,Glitch Filter TRGMUX Input 2 Bypass" "0: Enables,1: Bypasses"
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|
newline
|
|
bitfld.long 0x0 14. "GLITCH_FIL_TRG_IN1_BYP,Glitch Filter TRGMUX Input 1 Bypass" "0: Enables,1: Bypasses"
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|
newline
|
|
bitfld.long 0x0 13. "GLITCH_FIL_TRG_IN0_BYP,Glitch Filter TRGMUX Input 0 Bypass" "0: Enables,1: Bypasses"
|
|
newline
|
|
bitfld.long 0x0 12. "MUX_MODE_EN_ADC0_S17,Mux Mode Enable ADC_0 Standard Channel 17" "0: GPIO_75,1: GPIO_44"
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|
newline
|
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bitfld.long 0x0 11. "MUX_MODE_EN_ADC0_S14,Mux Mode Enable ADC_0 Standard Channel 14" "0: GPIO_32,1: GPIO_80"
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|
newline
|
|
bitfld.long 0x0 8. "MUX_MODE_EN_ADC0_S13,Mux Mode Enable ADC_0 Standard Channel 13" "0: GPIO_73,1: GPIO_79"
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|
newline
|
|
bitfld.long 0x0 7. "MUX_MODE_EN_ADC0_S12,Mux Mode Enable ADC_0 Standard Channel 12" "0: GPIO_72,1: GPIO_78"
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|
newline
|
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bitfld.long 0x0 4. "MUX_MODE_EN_ADC1_S15,Mux Mode Enable ADC_1 Standard Channel 15" "0: GPIO_4,1: GPIO_33"
|
|
newline
|
|
bitfld.long 0x0 3. "MUX_MODE_EN_ADC1_S14,Mux Mode Enable ADC_1 Standard Channel 14" "0: GPIO_69,1: GPIO_32"
|
|
newline
|
|
bitfld.long 0x0 2. "MUX_MODE_EN_ADC0_S9,Mux Mode Enable ADC_0 Standard Channel 9" "0: GPIO_1,1: GPIO_46"
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|
newline
|
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bitfld.long 0x0 1. "MUX_MODE_EN_ADC0_S8,Mux Mode Enable ADC_0 Standard Channel 8" "0: GPIO_0,1: GPIO_45"
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|
newline
|
|
bitfld.long 0x0 0. "MUX_MODE_EN_ADC1_S18,Controls the selection of GPIOs to drive ADC1 standard channel 18th." "0: Selects GPIO_70 as the ADC1_S18.,1: Selects GPIO_6 as the ADC1_S18."
|
|
line.long 0x4 "DCMRWF5,Read Write GPR On Functional Reset 5"
|
|
hexmask.long 0x4 1.--31. 1. "BOOT_ADDRESS,Boot Address"
|
|
newline
|
|
bitfld.long 0x4 0. "BOOT_MODE,Boot Mode" "0: Normal,1: Fast Standby"
|
|
group.long 0x700++0xF
|
|
line.long 0x0 "DCMROPP1,Read-Only GPR On PMCPOR Reset 1"
|
|
eventfld.long 0x0 31. "POR_WDG_STAT31,POR_WDG Status 31" "0: Not detected,1: Detected"
|
|
newline
|
|
eventfld.long 0x0 30. "POR_WDG_STAT30,POR_WDG Status 30" "0: Not acknowledged,1: Acknowledged"
|
|
newline
|
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eventfld.long 0x0 29. "POR_WDG_STAT29,POR_WDG Status 29" "0: Active,1: Inactive"
|
|
newline
|
|
eventfld.long 0x0 20. "POR_WDG_STAT20,POR_WDG Status 20" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 17. "POR_WDG_STAT17,POR_WDG Status 17" "0: Inactive,1: Active"
|
|
newline
|
|
eventfld.long 0x0 14. "POR_WDG_STAT14,POR_WDG Status 14" "0: Inactive,1: Active"
|
|
newline
|
|
eventfld.long 0x0 11. "POR_WDG_STAT11,POR_WDG Status 11" "0: Inactive,1: Active"
|
|
newline
|
|
eventfld.long 0x0 10. "POR_WDG_STAT10,POR_WDG Status 10" "0: Inactive,1: Active"
|
|
newline
|
|
eventfld.long 0x0 6. "POR_WDG_STAT6,POR_WDG Status 6" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 5. "POR_WDG_STAT5,POR_WDG Status 5" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 4. "POR_WDG_STAT4,POR_WDG Status 4" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 3. "POR_WDG_STAT3,POR_WDG Status 3" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 2. "POR_WDG_STAT2,POR_WDG Status 2" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 1. "POR_WDG_STAT1,POR_WDG Status 1" "0: Inactive,1: Active"
|
|
newline
|
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eventfld.long 0x0 0. "POR_WDG_STAT0,POR_WDG Status 0" "0: Inactive,1: Active"
|
|
line.long 0x4 "DCMROPP2,Read-Only GPR On PMCPOR Reset 2"
|
|
eventfld.long 0x4 30. "POR_WDG_STAT62,POR_WDG Status 62" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 29. "POR_WDG_STAT61,POR_WDG Status 61" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 20. "POR_WDG_STAT52,POR_WDG Status 52" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 16. "POR_WDG_STAT48,POR_WDG Status 48" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 12. "POR_WDG_STAT44,POR_WDG Status 44" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 9. "POR_WDG_STAT41,POR_WDG Status 41" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 8. "POR_WDG_STAT40,POR_WDG Status 40" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 7. "POR_WDG_STAT39,POR_WDG Status 39" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 6. "POR_WDG_STAT38,POR_WDG Status 38" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 4. "POR_WDG_STAT36,POR_WDG Status 36" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x4 3. "POR_WDG_STAT35,POR_WDG Status 35" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x4 0. "POR_WDG_STAT32,POR_WDG Status 32" "0: 0,1: 1"
|
|
line.long 0x8 "DCMROPP3,Read-Only GPR On PMCPOR Reset 3"
|
|
eventfld.long 0x8 30. "POR_WDG_STAT94,POR_WDG Status 94" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x8 29. "POR_WDG_STAT93,POR_WDG Status 93" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 18. "POR_WDG_STAT82,POR_WDG Status 82" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 17. "POR_WDG_STAT81,POR_WDG Status 81" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 16. "POR_WDG_STAT80,POR_WDG Status 80" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x8 15. "POR_WDG_STAT79,POR_WDG Status 79" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 14. "POR_WDG_STAT78,POR_WDG Status 78" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 12. "POR_WDG_STAT76,POR_WDG Status 76" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 10. "POR_WDG_STAT74,POR_WDG Status 74" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x8 9. "POR_WDG_STAT73,POR_WDG Status 73" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 8. "POR_WDG_STAT72,POR_WDG Status 72" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 6. "POR_WDG_STAT70,POR_WDG Status 70" "0: 0,1: 1"
|
|
newline
|
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eventfld.long 0x8 4. "POR_WDG_STAT68,POR_WDG Status 68" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x8 3. "POR_WDG_STAT67,POR_WDG Status 67" "0: 0,1: 1"
|
|
newline
|
|
eventfld.long 0x8 0. "POR_WDG_STAT64,POR_WDG Status 64" "0: 0,1: 1"
|
|
line.long 0xC "DCMROPP4,Read-Only GPR On PMCPOR Reset 4"
|
|
eventfld.long 0xC 0. "POR_WDG_STAT96,POR_WDG Status 96" "0: Inactive,1: Active"
|
|
tree.end
|
|
tree "DMA_TCD"
|
|
base ad:0x40210000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CH0_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH0_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH0_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH0_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH0_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "TCD0_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x24++0x3
|
|
line.word 0x0 "TCD0_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD0_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "TCD0_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x28++0xB
|
|
line.long 0x0 "TCD0_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD0_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD0_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x34++0x3
|
|
line.word 0x0 "TCD0_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD0_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x36++0x1
|
|
line.word 0x0 "TCD0_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "TCD0_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x3C++0x3
|
|
line.word 0x0 "TCD0_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD0_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x3E++0x1
|
|
line.word 0x0 "TCD0_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x4000++0x13
|
|
line.long 0x0 "CH1_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH1_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH1_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH1_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH1_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x4020++0x3
|
|
line.long 0x0 "TCD1_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x4024++0x3
|
|
line.word 0x0 "TCD1_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD1_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x4028++0x3
|
|
line.long 0x0 "TCD1_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x4028++0xB
|
|
line.long 0x0 "TCD1_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD1_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD1_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x4034++0x3
|
|
line.word 0x0 "TCD1_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD1_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x4036++0x1
|
|
line.word 0x0 "TCD1_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x4038++0x3
|
|
line.long 0x0 "TCD1_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x403C++0x3
|
|
line.word 0x0 "TCD1_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD1_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x403E++0x1
|
|
line.word 0x0 "TCD1_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x8000++0x13
|
|
line.long 0x0 "CH2_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH2_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH2_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH2_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH2_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8020++0x3
|
|
line.long 0x0 "TCD2_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x8024++0x3
|
|
line.word 0x0 "TCD2_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD2_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x8028++0x3
|
|
line.long 0x0 "TCD2_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x8028++0xB
|
|
line.long 0x0 "TCD2_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD2_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD2_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x8034++0x3
|
|
line.word 0x0 "TCD2_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD2_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x8036++0x1
|
|
line.word 0x0 "TCD2_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x8038++0x3
|
|
line.long 0x0 "TCD2_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x803C++0x3
|
|
line.word 0x0 "TCD2_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD2_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x803E++0x1
|
|
line.word 0x0 "TCD2_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0xC000++0x13
|
|
line.long 0x0 "CH3_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH3_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH3_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH3_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH3_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC020++0x3
|
|
line.long 0x0 "TCD3_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0xC024++0x3
|
|
line.word 0x0 "TCD3_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD3_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0xC028++0x3
|
|
line.long 0x0 "TCD3_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0xC028++0xB
|
|
line.long 0x0 "TCD3_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD3_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD3_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0xC034++0x3
|
|
line.word 0x0 "TCD3_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD3_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0xC036++0x1
|
|
line.word 0x0 "TCD3_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0xC038++0x3
|
|
line.long 0x0 "TCD3_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0xC03C++0x3
|
|
line.word 0x0 "TCD3_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD3_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0xC03E++0x1
|
|
line.word 0x0 "TCD3_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x10000++0x13
|
|
line.long 0x0 "CH4_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH4_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH4_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH4_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH4_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10020++0x3
|
|
line.long 0x0 "TCD4_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10024++0x3
|
|
line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10028++0x3
|
|
line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x10028++0xB
|
|
line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD4_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD4_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10034++0x3
|
|
line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10036++0x1
|
|
line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10038++0x3
|
|
line.long 0x0 "TCD4_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x1003C++0x3
|
|
line.word 0x0 "TCD4_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x1003E++0x1
|
|
line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x14000++0x13
|
|
line.long 0x0 "CH5_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH5_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH5_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH5_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH5_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14020++0x3
|
|
line.long 0x0 "TCD5_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x14024++0x3
|
|
line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14028++0x3
|
|
line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x14028++0xB
|
|
line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD5_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD5_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x14034++0x3
|
|
line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x14036++0x1
|
|
line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x14038++0x3
|
|
line.long 0x0 "TCD5_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x1403C++0x3
|
|
line.word 0x0 "TCD5_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x1403E++0x1
|
|
line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x18000++0x13
|
|
line.long 0x0 "CH6_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH6_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH6_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH6_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH6_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18020++0x3
|
|
line.long 0x0 "TCD6_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x18024++0x3
|
|
line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x18028++0x3
|
|
line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x18028++0xB
|
|
line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD6_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD6_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x18034++0x3
|
|
line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x18036++0x1
|
|
line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x18038++0x3
|
|
line.long 0x0 "TCD6_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x1803C++0x3
|
|
line.word 0x0 "TCD6_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x1803E++0x1
|
|
line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x1C000++0x13
|
|
line.long 0x0 "CH7_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH7_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH7_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH7_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH7_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1C020++0x3
|
|
line.long 0x0 "TCD7_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1C024++0x3
|
|
line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1C028++0x3
|
|
line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x1C028++0xB
|
|
line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD7_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD7_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1C034++0x3
|
|
line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1C036++0x1
|
|
line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1C038++0x3
|
|
line.long 0x0 "TCD7_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x1C03C++0x3
|
|
line.word 0x0 "TCD7_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x1C03E++0x1
|
|
line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x20000++0x13
|
|
line.long 0x0 "CH8_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH8_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH8_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH8_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH8_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20020++0x3
|
|
line.long 0x0 "TCD8_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x20024++0x3
|
|
line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x20028++0x3
|
|
line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x20028++0xB
|
|
line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD8_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD8_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x20034++0x3
|
|
line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x20036++0x1
|
|
line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x20038++0x3
|
|
line.long 0x0 "TCD8_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x2003C++0x3
|
|
line.word 0x0 "TCD8_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x2003E++0x1
|
|
line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x24000++0x13
|
|
line.long 0x0 "CH9_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH9_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH9_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH9_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH9_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x24020++0x3
|
|
line.long 0x0 "TCD9_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x24024++0x3
|
|
line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x24028++0x3
|
|
line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x24028++0xB
|
|
line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD9_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD9_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x24034++0x3
|
|
line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x24036++0x1
|
|
line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x24038++0x3
|
|
line.long 0x0 "TCD9_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x2403C++0x3
|
|
line.word 0x0 "TCD9_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x2403E++0x1
|
|
line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x28000++0x13
|
|
line.long 0x0 "CH10_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH10_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH10_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH10_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH10_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28020++0x3
|
|
line.long 0x0 "TCD10_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x28024++0x3
|
|
line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x28028++0x3
|
|
line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x28028++0xB
|
|
line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD10_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD10_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x28034++0x3
|
|
line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x28036++0x1
|
|
line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x28038++0x3
|
|
line.long 0x0 "TCD10_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x2803C++0x3
|
|
line.word 0x0 "TCD10_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x2803E++0x1
|
|
line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
group.long 0x2C000++0x13
|
|
line.long 0x0 "CH11_CSR,Channel Control and Status"
|
|
rbitfld.long 0x0 31. "ACTIVE,Channel Active" "0,1"
|
|
eventfld.long 0x0 30. "DONE,Channel Done" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EBW,Enable Buffered Writes" "0: Buffered writes on system bus disabled,1: Buffered writes on system bus enabled"
|
|
bitfld.long 0x0 2. "EEI,Enable Error Interrupt" "0: Error signal for corresponding channel does not..,1: Assertion of error signal for corresponding.."
|
|
newline
|
|
bitfld.long 0x0 1. "EARQ,Enable Asynchronous DMA Request In Stop Mode For Channel" "0: Disable asynchronous DMA request for the channel,1: Enable asynchronous DMA request for the channel"
|
|
bitfld.long 0x0 0. "ERQ,Enable DMA Request" "0: DMA hardware request signal for corresponding..,1: DMA hardware request signal for corresponding.."
|
|
line.long 0x4 "CH11_ES,Channel Error Status"
|
|
eventfld.long 0x4 31. "ERR,Error In Channel" "0: An error in this channel has not occurred,1: An error in this channel has occurred"
|
|
rbitfld.long 0x4 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
rbitfld.long 0x4 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
rbitfld.long 0x4 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was bus error on source read"
|
|
newline
|
|
rbitfld.long 0x4 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was bus error on destination.."
|
|
line.long 0x8 "CH11_INT,Channel Interrupt Status"
|
|
eventfld.long 0x8 0. "INT,Interrupt Request" "0: Interrupt request for corresponding channel..,1: Interrupt request for corresponding channel active"
|
|
line.long 0xC "CH11_SBR,Channel System Bus"
|
|
bitfld.long 0xC 17.--19. "ATTR,Attribute Output" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 16. "EMI,Enable Master ID Replication" "0: Master ID replication is disabled,1: Master ID replication is enabled"
|
|
newline
|
|
rbitfld.long 0xC 15. "PAL,Privileged Access Level" "0: User protection level for DMA transfers,1: Privileged protection level for DMA transfers"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MID,Master ID"
|
|
line.long 0x10 "CH11_PRI,Channel Priority"
|
|
bitfld.long 0x10 31. "ECP,Enable Channel Preemption" "0: Channel cannot be suspended by a higher-priority..,1: Channel can be temporarily suspended by a.."
|
|
bitfld.long 0x10 30. "DPA,Disable Preempt Ability" "0: Channel can suspend a lower-priority channel,1: Channel cannot suspend any other channel.."
|
|
newline
|
|
bitfld.long 0x10 0.--2. "APL,Arbitration Priority Level" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C020++0x3
|
|
line.long 0x0 "TCD11_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x2C024++0x3
|
|
line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source Address Signed Offset"
|
|
line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source Data Transfer Size" "0: 8-bit,1: 16-bit,2: 32-bit,3: 64-bit,4: 16-byte,5: 32-byte,6: 64-byte,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination Data Transfer Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x2C028++0x3
|
|
line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Transfer Size Without Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
group.long 0x2C028++0xB
|
|
line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Transfer Size with Minor Loop Offsets"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: Minor loop offset not applied to SADDR,1: Minor loop offset applied to SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: Minor loop offset not applied to DADDR,1: Minor loop offset applied to DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,Minor Loop Offset"
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Number of Bytes To Transfer Per Service Request"
|
|
line.long 0x4 "TCD11_SLAST_SDA,TCD Last Source Address Adjustment / Store DADDR Address"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST_SDA,Last Source Address Adjustment / Store DADDR Address"
|
|
line.long 0x8 "TCD11_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x2C034++0x3
|
|
line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x2C036++0x1
|
|
line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x2C038++0x3
|
|
line.long 0x0 "TCD11_DLAST_SGA,TCD Last Destination Address Adjustment / Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLAST_SGA,Last Destination Address Adjustment / Scatter Gather Address"
|
|
group.word 0x2C03C++0x3
|
|
line.word 0x0 "TCD11_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,1: Enable eDMA master high-priority elevation (HPE)..,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "ESDA,Enable Store Destination Address" "0: Ability to store destination address to system..,1: Ability to store destination address to system.."
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable Link When Major Loop Complete" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
newline
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: Current channel's TCD is normal format,1: Current channel's TCD specifies scatter/gather.."
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: No operation,1: Clear the ERQ field to 0 upon major loop.."
|
|
newline
|
|
bitfld.word 0x0 2. "INTHALF,Enable Interrupt If Major Counter Half-complete" "0: Halfway point interrupt disabled,1: Halfway point interrupt enabled"
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable Interrupt If Major count complete" "0: End-of-major loop interrupt disabled,1: End-of-major loop interrupt enabled"
|
|
newline
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel not explicitly started,1: Channel explicitly started via a.."
|
|
line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Major Loop Count (Minor Loop Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x2C03E++0x1
|
|
line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Major Loop Count (Minor Loop Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable Link" "0: Channel-to-channel linking disabled,1: Channel-to-channel linking enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting Major Iteration Count"
|
|
tree.end
|
|
tree "DMAMUX"
|
|
base ad:0x0
|
|
tree "DMAMUX_0"
|
|
base ad:0x40280000
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "CHCFG$1,Channel Configuration"
|
|
bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable"
|
|
bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable"
|
|
hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)"
|
|
repeat.end
|
|
tree.end
|
|
tree "DMAMUX_1"
|
|
base ad:0x40284000
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "CHCFG$1,Channel Configuration"
|
|
bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: Disable,1: Enable"
|
|
bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Disable,1: Enable"
|
|
hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "DPGA_AE"
|
|
base ad:0x140
|
|
group.byte 0x0++0x1
|
|
line.byte 0x0 "INTF,Interrupt Flags"
|
|
eventfld.byte 0x0 5. "BTCFGIF,BTCFG Interrupt Flag" "0: The parity check has been ok since the last..,1: A failure in the parity check was detected since.."
|
|
eventfld.byte 0x0 4. "AMPCFGIF,AMPCFG Interrupt Flag" "0: The parity check has been ok since the last..,1: A failure in the parity check was detected since.."
|
|
newline
|
|
eventfld.byte 0x0 1. "HDIF,High detect interrupt flag" "0: No high voltage condition has been detected..,1: A high voltage condition has been detected since.."
|
|
eventfld.byte 0x0 0. "LDIF,Low detect interrupt flag" "0: No low voltage condition has been detected since..,1: A low voltage condition has been detected since.."
|
|
line.byte 0x1 "INTEN,Interrupt enable"
|
|
bitfld.byte 0x1 5. "BTCFGIE,BTCFG interrupt enable" "0: The interrupt will not be created.,1: The interrupt will be created."
|
|
bitfld.byte 0x1 4. "AMPCFGIE,AMPCFG interrupt enable" "0: The interrupt will not be created.,1: The interrupt will be created."
|
|
newline
|
|
bitfld.byte 0x1 1. "HDIE,High detect interrupt enable" "0: The high detect interrupt flag INTF[HDIF] cannot..,1: The high detect interrupt flag INTF[HDIF] can.."
|
|
bitfld.byte 0x1 0. "LDIE,Low detect interrupt enable" "0: The low detect interrupt flag INTF[LDIF] cannot..,1: The low detect interrupt flag INTF[LDIF] can.."
|
|
rgroup.byte 0x2++0x0
|
|
line.byte 0x0 "STAT,Status"
|
|
bitfld.byte 0x0 5. "BTCFGS,BTCFG status" "0: The count of bits set to 1 in the register is..,1: The count of bits set to 1 in the register is odd."
|
|
bitfld.byte 0x0 4. "AMPCFGS,AMPCFG status" "0: The count of bits set to 1 in the register is..,1: The count of bits set to 1 in the register is odd."
|
|
newline
|
|
bitfld.byte 0x0 1. "HDS,High detect filtered status" "0: No high voltage condition is detected.,1: A high voltage condition is detected so the.."
|
|
bitfld.byte 0x0 0. "LDS,Low detect filtered status" "0: No low voltage condition is detected.,1: A low voltage condition is detected so the.."
|
|
group.byte 0x3++0x0
|
|
line.byte 0x0 "CTRL,Control"
|
|
bitfld.byte 0x0 7. "FSTEN,Functional Self-Test Enable" "0: The functional self-tests cannot be activated.,1: The functional self-tests can be activated."
|
|
bitfld.byte 0x0 5. "VDTEN,Voltage Detector Test Enable" "0: The high and low detectors are in functional mode.,1: If CTRL[FSTEN] is set the functional self-test.."
|
|
newline
|
|
bitfld.byte 0x0 4. "AMPTEN,Amplifier test enable" "0: The amplifier is in functional mode.,1: If CTRL[FSTEN] is set the functional self-test.."
|
|
bitfld.byte 0x0 3. "BIVDEN,Bipolar Voltage Detector Enable" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.byte 0x0 2. "CFGEN,Configuration Mode Enable" "0: The DPGA is in functional mode.,1: The DPGA is in configuration mode."
|
|
bitfld.byte 0x0 1. "VDEN,Voltage Detector Enable" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: The DPGA is disabled all features are turned..,1: The DPGA is enabled all features are used as.."
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "AMPCFG,Amplifier Configuration"
|
|
bitfld.long 0x0 28.--29. "OCMSEL,Output Common Mode Configuration" "0: reference voltage divided by 12,1: reference voltage divided by 6,2: reference voltage divided by 4,3: reference voltage divided by 2"
|
|
hexmask.long.byte 0x0 20.--23. 1. "OFFSEL,Offset compensation configuration"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "GAINSEL,Gain selection" "0: amplify by 8,1: amplify by 16,2: amplify by 24,3: amplify by 32,4: amplify by 40,5: amplify by 50,6: amplify by 65,7: amplify by 80"
|
|
bitfld.long 0x0 11. "IGND,Input Grounded" "0: Functional connection,1: Connection to ground"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ICMCSEL,Input Common Mode Coarse Configuration" "0: no common mode shift,1: common mode shift with 200 uA current out of..,2: common mode shift with 100 uA current out of..,3: common mode shift with 50 uA current out of both.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "ICMFSEL,Input Common Mode Fine Configuration"
|
|
line.long 0x4 "BTCFG,Blanking time configuration"
|
|
bitfld.long 0x4 26.--27. "SELTRG5,Select Trigger 5" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 24.--25. "SELTRG4,Select Trigger 4" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
bitfld.long 0x4 22.--23. "SELTRG3,Select Trigger 3" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 20.--21. "SELTRG2,Select Trigger 2" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
bitfld.long 0x4 18.--19. "SELTRG1,Select Trigger 1" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 16.--17. "SELTRG0,Select Trigger 0" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "BTDUR,Blanking time duration"
|
|
line.long 0x8 "VDCFG,Voltage Detector Configuration"
|
|
hexmask.long.word 0x8 20.--29. 1. "HDFDUR,High Detect Filter Duration"
|
|
hexmask.long.byte 0x8 16.--19. 1. "HDLIM,High Detect Limit"
|
|
newline
|
|
hexmask.long.word 0x8 4.--13. 1. "LDFDUR,Low Detect Filter Duration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "LDLIM,Low Detect Limit"
|
|
tree.end
|
|
tree "EDMA"
|
|
base ad:0x4020C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CSR,Management Page Control"
|
|
rbitfld.long 0x0 31. "ACTIVE,DMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel"
|
|
hexmask.long.byte 0x0 24.--27. 1. "ACTIVE_ID,Active Channel ID"
|
|
newline
|
|
bitfld.long 0x0 9. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer"
|
|
bitfld.long 0x0 8. "ECX,Cancel Transfer With Error" "0: Normal operation,1: Cancel the remaining data transfer"
|
|
newline
|
|
bitfld.long 0x0 7. "GMRC,Global Master ID Replication Control" "0: Master ID replication disabled for all channels,1: Master ID replication available and controlled.."
|
|
bitfld.long 0x0 6. "GCLC,Global Channel Linking Control" "0: Channel linking disabled for all channels,1: Channel linking available and controlled by each.."
|
|
newline
|
|
bitfld.long 0x0 5. "HALT,Halt DMA Operations" "0: Normal operation,1: Stall the start of any new channels"
|
|
bitfld.long 0x0 4. "HAE,Halt After Error" "0: Normal operation,1: Any error causes the HALT field to be set to 1"
|
|
newline
|
|
bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Round-robin channel arbitration disabled,1: Round-robin channel arbitration enabled"
|
|
bitfld.long 0x0 1. "EDBG,Enable Debug" "0: Debug mode disabled,1: Debug mode is enabled."
|
|
rgroup.long 0x4++0xB
|
|
line.long 0x0 "ES,Management Page Error Status"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: No ERR fields are set to 1,1: At least one ERR field is set to 1 indicating a.."
|
|
hexmask.long.byte 0x0 24.--27. 1. "ERRCHN,Error Channel Number or Canceled Channel Number"
|
|
newline
|
|
bitfld.long 0x0 9. "UCE,Uncorrectable TCD Error During Channel Execution" "0: No uncorrectable ECC error,1: Last recorded error was an uncorrectable TCD RAM.."
|
|
bitfld.long 0x0 8. "ECX,Transfer Canceled" "0: No canceled transfers,1: Last recorded entry was a canceled transfer by.."
|
|
newline
|
|
bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error,1: Last recorded error was a configuration error.."
|
|
bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error,1: Last recorded error was a configuration error.."
|
|
bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error,1: The last recorded error was NBYTES equal to zero.."
|
|
bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error,1: Last recorded error was a configuration error.."
|
|
newline
|
|
bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error,1: Last recorded error was a bus error on a source.."
|
|
bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error,1: Last recorded error was a bus error on a.."
|
|
line.long 0x4 "INT,Management Page Interrupt Request Status"
|
|
hexmask.long.word 0x4 0.--11. 1. "INT,Interrupt Request Status"
|
|
line.long 0x8 "HRS,Management Page Hardware Request Status"
|
|
hexmask.long 0x8 0.--31. 1. "HRS,Hardware Request Status"
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "CH_GRPRI[$1],Channel Arbitration Group"
|
|
hexmask.long.byte 0x0 0.--4. 1. "GRPRI,Arbitration Group For Channel n"
|
|
repeat.end
|
|
tree.end
|
|
tree "EIM"
|
|
base ad:0x40258000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "EIMCR,Error Injection Module Configuration Register"
|
|
bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "EICHEN,Error Injection Channel Enable register"
|
|
bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 29. "EICH2EN,Error Injection Channel 2 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 28. "EICH3EN,Error Injection Channel 3 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 27. "EICH4EN,Error Injection Channel 4 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 26. "EICH5EN,Error Injection Channel 5 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 25. "EICH6EN,Error Injection Channel 6 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 24. "EICH7EN,Error Injection Channel 7 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 18. "EICH13EN,Error Injection Channel 13 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 17. "EICH14EN,Error Injection Channel 14 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 16. "EICH15EN,Error Injection Channel 15 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 11. "EICH20EN,Error Injection Channel 20 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 8. "EICH23EN,Error Injection Channel 23 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 6. "EICH25EN,Error Injection Channel 25 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 3. "EICH28EN,Error Injection Channel 28 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
newline
|
|
bitfld.long 0x4 2. "EICH29EN,Error Injection Channel 29 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 1. "EICH30EN,Error Injection Channel 30 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor 0. Word0"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor 0. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD0_WORD2,Error Injection Channel Descriptor 0. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x180++0xB
|
|
line.long 0x0 "EICHD2_WORD0,Error Injection Channel Descriptor 2. Word0"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD2_WORD1,Error Injection Channel Descriptor 2. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD2_WORD2,Error Injection Channel Descriptor 2. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x1C0++0xB
|
|
line.long 0x0 "EICHD3_WORD0,Error Injection Channel Descriptor 3. Word0"
|
|
hexmask.long.word 0x0 18.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD3_WORD1,Error Injection Channel Descriptor 3. Word1"
|
|
hexmask.long.word 0x4 0.--11. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD3_WORD2,Error Injection Channel Descriptor 3. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x200++0x13
|
|
line.long 0x0 "EICHD4_WORD0,Error Injection Channel Descriptor 4. Word0"
|
|
hexmask.long.word 0x0 16.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD4_WORD1,Error Injection Channel Descriptor 4. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD4_WORD2,Error Injection Channel Descriptor 4. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
line.long 0xC "EICHD4_WORD3,Error Injection Channel Descriptor 4. Word3"
|
|
hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11"
|
|
line.long 0x10 "EICHD4_WORD4,Error Injection Channel Descriptor 4. Word4"
|
|
hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15"
|
|
group.long 0x240++0x13
|
|
line.long 0x0 "EICHD5_WORD0,Error Injection Channel Descriptor 5. Word0"
|
|
hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD5_WORD1,Error Injection Channel Descriptor 5. Word1"
|
|
hexmask.long.byte 0x4 0.--7. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD5_WORD2,Error Injection Channel Descriptor 5. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
line.long 0xC "EICHD5_WORD3,Error Injection Channel Descriptor 5. Word3"
|
|
hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11"
|
|
line.long 0x10 "EICHD5_WORD4,Error Injection Channel Descriptor 5. Word4"
|
|
hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15"
|
|
group.long 0x280++0x13
|
|
line.long 0x0 "EICHD6_WORD0,Error Injection Channel Descriptor 6. Word0"
|
|
hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD6_WORD1,Error Injection Channel Descriptor 6. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD6_WORD2,Error Injection Channel Descriptor 6. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
line.long 0xC "EICHD6_WORD3,Error Injection Channel Descriptor 6. Word3"
|
|
hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11"
|
|
line.long 0x10 "EICHD6_WORD4,Error Injection Channel Descriptor 6. Word4"
|
|
hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15"
|
|
group.long 0x2C0++0x13
|
|
line.long 0x0 "EICHD7_WORD0,Error Injection Channel Descriptor 7. Word0"
|
|
hexmask.long 0x0 4.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD7_WORD1,Error Injection Channel Descriptor 7. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD7_WORD2,Error Injection Channel Descriptor 7. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
line.long 0xC "EICHD7_WORD3,Error Injection Channel Descriptor 7. Word3"
|
|
hexmask.long 0xC 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11"
|
|
line.long 0x10 "EICHD7_WORD4,Error Injection Channel Descriptor 7. Word4"
|
|
hexmask.long 0x10 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15"
|
|
group.long 0x440++0xB
|
|
line.long 0x0 "EICHD13_WORD0,Error Injection Channel Descriptor 13. Word0"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD13_WORD1,Error Injection Channel Descriptor 13. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x8 "EICHD13_WORD2,Error Injection Channel Descriptor 13. Word2"
|
|
hexmask.long 0x8 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x480++0x7
|
|
line.long 0x0 "EICHD14_WORD0,Error Injection Channel Descriptor 14. Word0"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD14_WORD1,Error Injection Channel Descriptor 14. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
group.long 0x4C0++0x7
|
|
line.long 0x0 "EICHD15_WORD0,Error Injection Channel Descriptor 15. Word0"
|
|
hexmask.long.byte 0x0 24.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD15_WORD1,Error Injection Channel Descriptor 15. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
group.long 0x604++0x17
|
|
line.long 0x0 "EICHD20_WORD1,Error Injection Channel Descriptor 20. Word1"
|
|
hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x4 "EICHD20_WORD2,Error Injection Channel Descriptor 20. Word2"
|
|
hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
line.long 0x8 "EICHD20_WORD3,Error Injection Channel Descriptor 20. Word3"
|
|
hexmask.long 0x8 0.--31. 1. "B8_11DATA_MASK,Data Mask Bytes 8-11"
|
|
line.long 0xC "EICHD20_WORD4,Error Injection Channel Descriptor 20. Word4"
|
|
hexmask.long 0xC 0.--31. 1. "B12_15DATA_MASK,Data Mask Bytes 12-15"
|
|
line.long 0x10 "EICHD20_WORD5,Error Injection Channel Descriptor 20. Word5"
|
|
hexmask.long 0x10 0.--31. 1. "B16_19DATA_MASK,Data Mask Bytes 16-19"
|
|
line.long 0x14 "EICHD20_WORD6,Error Injection Channel Descriptor 20. Word6"
|
|
hexmask.long 0x14 0.--31. 1. "B20_23DATA_MASK,Data Mask Bytes 20-23"
|
|
group.long 0x6C4++0x7
|
|
line.long 0x0 "EICHD23_WORD1,Error Injection Channel Descriptor 23. Word1"
|
|
hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x4 "EICHD23_WORD2,Error Injection Channel Descriptor 23. Word2"
|
|
hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x744++0x7
|
|
line.long 0x0 "EICHD25_WORD1,Error Injection Channel Descriptor 25. Word1"
|
|
hexmask.long 0x0 0.--27. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
line.long 0x4 "EICHD25_WORD2,Error Injection Channel Descriptor 25. Word2"
|
|
hexmask.long 0x4 0.--31. 1. "B4_7DATA_MASK,Data Mask Bytes 4-7"
|
|
group.long 0x804++0x3
|
|
line.long 0x0 "EICHD28_WORD1,Error Injection Channel Descriptor 28. Word1"
|
|
hexmask.long.tbyte 0x0 0.--23. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
group.long 0x844++0x3
|
|
line.long 0x0 "EICHD29_WORD1,Error Injection Channel Descriptor 29. Word1"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
group.long 0x884++0x3
|
|
line.long 0x0 "EICHD30_WORD1,Error Injection Channel Descriptor 30. Word1"
|
|
hexmask.long.tbyte 0x0 0.--17. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
tree.end
|
|
tree "EMIOS"
|
|
base ad:0x0
|
|
tree "EMIOS_0"
|
|
base ad:0x40088000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 29. "FRZ,Freeze" "0: Exit Freeze state,1: Enter Freeze state"
|
|
newline
|
|
bitfld.long 0x0 28. "GTBE,Global Timebase Enable" "0: Deassert GTBE_OUT,1: Assert GTBE_OUT"
|
|
bitfld.long 0x0 26. "GPREN,Global Prescaler Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "GPRE,Global Prescaler"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "GFLAG,Global Flag"
|
|
bitfld.long 0x0 23. "F23,Mirror of UC 23 FLAG" "0,1"
|
|
bitfld.long 0x0 22. "F22,Mirror of UC 22 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "F21,Mirror of UC 21 FLAG" "0,1"
|
|
bitfld.long 0x0 20. "F20,Mirror of UC 20 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "F19,Mirror of UC 19 FLAG" "0,1"
|
|
bitfld.long 0x0 18. "F18,Mirror of UC 18 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "F17,Mirror of UC 17 FLAG" "0,1"
|
|
bitfld.long 0x0 16. "F16,Mirror of UC 16 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "F15,Mirror of UC 15 FLAG" "0,1"
|
|
bitfld.long 0x0 14. "F14,Mirror of UC 14 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "F13,Mirror of UC 13 FLAG" "0,1"
|
|
bitfld.long 0x0 12. "F12,Mirror of UC 12 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "F11,Mirror of UC 11 FLAG" "0,1"
|
|
bitfld.long 0x0 10. "F10,Mirror of UC 10 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "F9,Mirror of UC 9 FLAG" "0,1"
|
|
bitfld.long 0x0 8. "F8,Mirror of UC 8 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "F7,Mirror of UC 7 FLAG" "0,1"
|
|
bitfld.long 0x0 6. "F6,Mirror of UC 6 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "F5,Mirror of UC 5 FLAG" "0,1"
|
|
bitfld.long 0x0 4. "F4,Mirror of UC 4 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "F3,Mirror of UC 3 FLAG" "0,1"
|
|
bitfld.long 0x0 2. "F2,Mirror of UC 2 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "F1,Mirror of UC 1 FLAG" "0,1"
|
|
bitfld.long 0x0 0. "F0,Mirror of UC 0 FLAG" "0,1"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "OUDIS,Output Update Disable"
|
|
bitfld.long 0x0 23. "OU23,Channel 23 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 22. "OU22,Channel 22 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 21. "OU21,Channel 21 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 20. "OU20,Channel 20 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 19. "OU19,Channel 19 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 18. "OU18,Channel 18 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 17. "OU17,Channel 17 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 16. "OU16,Channel 16 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 15. "OU15,Channel 15 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 14. "OU14,Channel 14 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 13. "OU13,Channel 13 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 12. "OU12,Channel 12 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 11. "OU11,Channel 11 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 10. "OU10,Channel 10 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 9. "OU9,Channel 9 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 8. "OU8,Channel 8 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 7. "OU7,Channel 7 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 6. "OU6,Channel 6 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 5. "OU5,Channel 5 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 4. "OU4,Channel 4 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 3. "OU3,Channel 3 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 2. "OU2,Channel 2 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 1. "OU1,Channel 1 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 0. "OU0,Channel 0 Output Update Disable" "0: Enable,1: Disable"
|
|
line.long 0x4 "UCDIS,Disable Channel"
|
|
bitfld.long 0x4 23. "UCDIS23,Disable UC 23" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 22. "UCDIS22,Disable UC 22" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 21. "UCDIS21,Disable UC 21" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 20. "UCDIS20,Disable UC 20" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 19. "UCDIS19,Disable UC 19" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 18. "UCDIS18,Disable UC 18" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 17. "UCDIS17,Disable UC 17" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 16. "UCDIS16,Disable UC 16" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 15. "UCDIS15,Disable UC 15" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 14. "UCDIS14,Disable UC 14" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 13. "UCDIS13,Disable UC 13" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 12. "UCDIS12,Disable UC 12" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 11. "UCDIS11,Disable UC 11" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 10. "UCDIS10,Disable UC 10" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 9. "UCDIS9,Disable UC 9" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 8. "UCDIS8,Disable UC 8" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 7. "UCDIS7,Disable UC 7" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 6. "UCDIS6,Disable UC 6" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 5. "UCDIS5,Disable UC 5" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 4. "UCDIS4,Disable UC 4" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 3. "UCDIS3,Disable UC 3" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 2. "UCDIS2,Disable UC 2" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 1. "UCDIS1,Disable UC 1" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 0. "UCDIS0,Disable UC 0" "0: Enable,1: Disable"
|
|
group.long 0x20++0x1B
|
|
line.long 0x0 "A0,UC A 0"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B0,UC B 0"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT0,UC Counter 0"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C0,UC Control 0"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S0,UC Status 0"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA0,Alternate Address 0"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_0,UC Control 2 0"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x40++0x1B
|
|
line.long 0x0 "A1,UC A 1"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B1,UC B 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT1,UC Counter 1"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C1,UC Control 1"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S1,UC Status 1"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA1,Alternate Address 1"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_1,UC Control 2 1"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x60++0x1B
|
|
line.long 0x0 "A2,UC A 2"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B2,UC B 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT2,UC Counter 2"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C2,UC Control 2"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S2,UC Status 2"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA2,Alternate Address 2"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_2,UC Control 2 2"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x80++0x1B
|
|
line.long 0x0 "A3,UC A 3"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B3,UC B 3"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT3,UC Counter 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C3,UC Control 3"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S3,UC Status 3"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA3,Alternate Address 3"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_3,UC Control 2 3"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xA0++0x1B
|
|
line.long 0x0 "A4,UC A 4"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B4,UC B 4"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT4,UC Counter 4"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C4,UC Control 4"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S4,UC Status 4"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA4,Alternate Address 4"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_4,UC Control 2 4"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xC0++0x1B
|
|
line.long 0x0 "A5,UC A 5"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B5,UC B 5"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT5,UC Counter 5"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C5,UC Control 5"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S5,UC Status 5"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA5,Alternate Address 5"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_5,UC Control 2 5"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xE0++0x1B
|
|
line.long 0x0 "A6,UC A 6"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B6,UC B 6"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT6,UC Counter 6"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C6,UC Control 6"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S6,UC Status 6"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA6,Alternate Address 6"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_6,UC Control 2 6"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x100++0x1B
|
|
line.long 0x0 "A7,UC A 7"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B7,UC B 7"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT7,UC Counter 7"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C7,UC Control 7"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S7,UC Status 7"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA7,Alternate Address 7"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_7,UC Control 2 7"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x120++0x1B
|
|
line.long 0x0 "A8,UC A 8"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B8,UC B 8"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT8,UC Counter 8"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C8,UC Control 8"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S8,UC Status 8"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA8,Alternate Address 8"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_8,UC Control 2 8"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x140++0x7
|
|
line.long 0x0 "A9,UC A 9"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B9,UC B 9"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x14C++0xF
|
|
line.long 0x0 "C9,UC Control 9"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S9,UC Status 9"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA9,Alternate Address 9"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_9,UC Control 2 9"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x160++0x7
|
|
line.long 0x0 "A10,UC A 10"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B10,UC B 10"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x16C++0xF
|
|
line.long 0x0 "C10,UC Control 10"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S10,UC Status 10"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA10,Alternate Address 10"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_10,UC Control 2 10"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "A11,UC A 11"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B11,UC B 11"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x18C++0xF
|
|
line.long 0x0 "C11,UC Control 11"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S11,UC Status 11"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA11,Alternate Address 11"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_11,UC Control 2 11"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1A0++0x7
|
|
line.long 0x0 "A12,UC A 12"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B12,UC B 12"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1AC++0xF
|
|
line.long 0x0 "C12,UC Control 12"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S12,UC Status 12"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA12,Alternate Address 12"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_12,UC Control 2 12"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1C0++0x7
|
|
line.long 0x0 "A13,UC A 13"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B13,UC B 13"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1CC++0xF
|
|
line.long 0x0 "C13,UC Control 13"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S13,UC Status 13"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA13,Alternate Address 13"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_13,UC Control 2 13"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1E0++0x7
|
|
line.long 0x0 "A14,UC A 14"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B14,UC B 14"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1EC++0xF
|
|
line.long 0x0 "C14,UC Control 14"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S14,UC Status 14"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA14,Alternate Address 14"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_14,UC Control 2 14"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "A15,UC A 15"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B15,UC B 15"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x20C++0xF
|
|
line.long 0x0 "C15,UC Control 15"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S15,UC Status 15"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA15,Alternate Address 15"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_15,UC Control 2 15"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x220++0x1B
|
|
line.long 0x0 "A16,UC A 16"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B16,UC B 16"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT16,UC Counter 16"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C16,UC Control 16"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S16,UC Status 16"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA16,Alternate Address 16"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_16,UC Control 2 16"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x240++0x7
|
|
line.long 0x0 "A17,UC A 17"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B17,UC B 17"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x24C++0xF
|
|
line.long 0x0 "C17,UC Control 17"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S17,UC Status 17"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA17,Alternate Address 17"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_17,UC Control 2 17"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x260++0x7
|
|
line.long 0x0 "A18,UC A 18"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B18,UC B 18"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x26C++0xF
|
|
line.long 0x0 "C18,UC Control 18"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S18,UC Status 18"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA18,Alternate Address 18"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_18,UC Control 2 18"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "A19,UC A 19"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B19,UC B 19"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x28C++0xF
|
|
line.long 0x0 "C19,UC Control 19"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S19,UC Status 19"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA19,Alternate Address 19"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_19,UC Control 2 19"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2A0++0x7
|
|
line.long 0x0 "A20,UC A 20"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B20,UC B 20"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x2AC++0xF
|
|
line.long 0x0 "C20,UC Control 20"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S20,UC Status 20"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA20,Alternate Address 20"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_20,UC Control 2 20"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2C0++0x7
|
|
line.long 0x0 "A21,UC A 21"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B21,UC B 21"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x2CC++0xF
|
|
line.long 0x0 "C21,UC Control 21"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S21,UC Status 21"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA21,Alternate Address 21"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_21,UC Control 2 21"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2E0++0x1B
|
|
line.long 0x0 "A22,UC A 22"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B22,UC B 22"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT22,UC Counter 22"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C22,UC Control 22"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S22,UC Status 22"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA22,Alternate Address 22"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_22,UC Control 2 22"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x300++0x1B
|
|
line.long 0x0 "A23,UC A 23"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B23,UC B 23"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT23,UC Counter 23"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C23,UC Control 23"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S23,UC Status 23"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA23,Alternate Address 23"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_23,UC Control 2 23"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
tree.end
|
|
tree "EMIOS_1"
|
|
base ad:0x4008C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 30. "MDIS,Module Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 29. "FRZ,Freeze" "0: Exit Freeze state,1: Enter Freeze state"
|
|
newline
|
|
bitfld.long 0x0 28. "GTBE,Global Timebase Enable" "0: Deassert GTBE_OUT,1: Assert GTBE_OUT"
|
|
bitfld.long 0x0 26. "GPREN,Global Prescaler Enable" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "GPRE,Global Prescaler"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "GFLAG,Global Flag"
|
|
bitfld.long 0x0 23. "F23,Mirror of UC 23 FLAG" "0,1"
|
|
bitfld.long 0x0 22. "F22,Mirror of UC 22 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "F21,Mirror of UC 21 FLAG" "0,1"
|
|
bitfld.long 0x0 20. "F20,Mirror of UC 20 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "F19,Mirror of UC 19 FLAG" "0,1"
|
|
bitfld.long 0x0 18. "F18,Mirror of UC 18 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "F17,Mirror of UC 17 FLAG" "0,1"
|
|
bitfld.long 0x0 16. "F16,Mirror of UC 16 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "F15,Mirror of UC 15 FLAG" "0,1"
|
|
bitfld.long 0x0 14. "F14,Mirror of UC 14 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "F13,Mirror of UC 13 FLAG" "0,1"
|
|
bitfld.long 0x0 12. "F12,Mirror of UC 12 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "F11,Mirror of UC 11 FLAG" "0,1"
|
|
bitfld.long 0x0 10. "F10,Mirror of UC 10 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "F9,Mirror of UC 9 FLAG" "0,1"
|
|
bitfld.long 0x0 8. "F8,Mirror of UC 8 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "F7,Mirror of UC 7 FLAG" "0,1"
|
|
bitfld.long 0x0 6. "F6,Mirror of UC 6 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "F5,Mirror of UC 5 FLAG" "0,1"
|
|
bitfld.long 0x0 4. "F4,Mirror of UC 4 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "F3,Mirror of UC 3 FLAG" "0,1"
|
|
bitfld.long 0x0 2. "F2,Mirror of UC 2 FLAG" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "F1,Mirror of UC 1 FLAG" "0,1"
|
|
bitfld.long 0x0 0. "F0,Mirror of UC 0 FLAG" "0,1"
|
|
group.long 0x8++0x7
|
|
line.long 0x0 "OUDIS,Output Update Disable"
|
|
bitfld.long 0x0 23. "OU23,Channel 23 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 22. "OU22,Channel 22 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 21. "OU21,Channel 21 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 20. "OU20,Channel 20 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 19. "OU19,Channel 19 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 18. "OU18,Channel 18 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 17. "OU17,Channel 17 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 16. "OU16,Channel 16 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 15. "OU15,Channel 15 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 14. "OU14,Channel 14 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 13. "OU13,Channel 13 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 12. "OU12,Channel 12 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 11. "OU11,Channel 11 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 10. "OU10,Channel 10 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 9. "OU9,Channel 9 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 8. "OU8,Channel 8 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 7. "OU7,Channel 7 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 6. "OU6,Channel 6 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 5. "OU5,Channel 5 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 4. "OU4,Channel 4 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 3. "OU3,Channel 3 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 2. "OU2,Channel 2 Output Update Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 1. "OU1,Channel 1 Output Update Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 0. "OU0,Channel 0 Output Update Disable" "0: Enable,1: Disable"
|
|
line.long 0x4 "UCDIS,Disable Channel"
|
|
bitfld.long 0x4 23. "UCDIS23,Disable UC 23" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 22. "UCDIS22,Disable UC 22" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 21. "UCDIS21,Disable UC 21" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 20. "UCDIS20,Disable UC 20" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 19. "UCDIS19,Disable UC 19" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 18. "UCDIS18,Disable UC 18" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 17. "UCDIS17,Disable UC 17" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 16. "UCDIS16,Disable UC 16" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 15. "UCDIS15,Disable UC 15" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 14. "UCDIS14,Disable UC 14" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 13. "UCDIS13,Disable UC 13" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 12. "UCDIS12,Disable UC 12" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 11. "UCDIS11,Disable UC 11" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 10. "UCDIS10,Disable UC 10" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 9. "UCDIS9,Disable UC 9" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 8. "UCDIS8,Disable UC 8" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 7. "UCDIS7,Disable UC 7" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 6. "UCDIS6,Disable UC 6" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 5. "UCDIS5,Disable UC 5" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 4. "UCDIS4,Disable UC 4" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 3. "UCDIS3,Disable UC 3" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 2. "UCDIS2,Disable UC 2" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x4 1. "UCDIS1,Disable UC 1" "0: Enable,1: Disable"
|
|
bitfld.long 0x4 0. "UCDIS0,Disable UC 0" "0: Enable,1: Disable"
|
|
group.long 0x20++0x1B
|
|
line.long 0x0 "A0,UC A 0"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B0,UC B 0"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT0,UC Counter 0"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C0,UC Control 0"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S0,UC Status 0"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA0,Alternate Address 0"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_0,UC Control 2 0"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "A1,UC A 1"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B1,UC B 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x4C++0xF
|
|
line.long 0x0 "C1,UC Control 1"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S1,UC Status 1"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA1,Alternate Address 1"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_1,UC Control 2 1"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x60++0x7
|
|
line.long 0x0 "A2,UC A 2"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B2,UC B 2"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x6C++0xF
|
|
line.long 0x0 "C2,UC Control 2"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S2,UC Status 2"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA2,Alternate Address 2"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_2,UC Control 2 2"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "A3,UC A 3"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B3,UC B 3"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x8C++0xF
|
|
line.long 0x0 "C3,UC Control 3"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S3,UC Status 3"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA3,Alternate Address 3"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_3,UC Control 2 3"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xA0++0x7
|
|
line.long 0x0 "A4,UC A 4"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B4,UC B 4"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0xAC++0xF
|
|
line.long 0x0 "C4,UC Control 4"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S4,UC Status 4"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA4,Alternate Address 4"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_4,UC Control 2 4"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xC0++0x7
|
|
line.long 0x0 "A5,UC A 5"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B5,UC B 5"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0xCC++0xF
|
|
line.long 0x0 "C5,UC Control 5"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S5,UC Status 5"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA5,Alternate Address 5"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_5,UC Control 2 5"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "A6,UC A 6"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B6,UC B 6"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0xEC++0xF
|
|
line.long 0x0 "C6,UC Control 6"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S6,UC Status 6"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA6,Alternate Address 6"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_6,UC Control 2 6"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "A7,UC A 7"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B7,UC B 7"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x10C++0xF
|
|
line.long 0x0 "C7,UC Control 7"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S7,UC Status 7"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA7,Alternate Address 7"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_7,UC Control 2 7"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x120++0x1B
|
|
line.long 0x0 "A8,UC A 8"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B8,UC B 8"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT8,UC Counter 8"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C8,UC Control 8"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S8,UC Status 8"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA8,Alternate Address 8"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_8,UC Control 2 8"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x140++0x7
|
|
line.long 0x0 "A9,UC A 9"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B9,UC B 9"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x14C++0xF
|
|
line.long 0x0 "C9,UC Control 9"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S9,UC Status 9"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA9,Alternate Address 9"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_9,UC Control 2 9"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x160++0x7
|
|
line.long 0x0 "A10,UC A 10"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B10,UC B 10"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x16C++0xF
|
|
line.long 0x0 "C10,UC Control 10"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S10,UC Status 10"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA10,Alternate Address 10"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_10,UC Control 2 10"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x180++0x7
|
|
line.long 0x0 "A11,UC A 11"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B11,UC B 11"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x18C++0xF
|
|
line.long 0x0 "C11,UC Control 11"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S11,UC Status 11"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA11,Alternate Address 11"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_11,UC Control 2 11"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1A0++0x7
|
|
line.long 0x0 "A12,UC A 12"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B12,UC B 12"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1AC++0xF
|
|
line.long 0x0 "C12,UC Control 12"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S12,UC Status 12"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA12,Alternate Address 12"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_12,UC Control 2 12"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1C0++0x7
|
|
line.long 0x0 "A13,UC A 13"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B13,UC B 13"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1CC++0xF
|
|
line.long 0x0 "C13,UC Control 13"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S13,UC Status 13"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA13,Alternate Address 13"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_13,UC Control 2 13"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x1E0++0x7
|
|
line.long 0x0 "A14,UC A 14"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B14,UC B 14"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x1EC++0xF
|
|
line.long 0x0 "C14,UC Control 14"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S14,UC Status 14"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA14,Alternate Address 14"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_14,UC Control 2 14"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x200++0x7
|
|
line.long 0x0 "A15,UC A 15"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B15,UC B 15"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x20C++0xF
|
|
line.long 0x0 "C15,UC Control 15"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S15,UC Status 15"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA15,Alternate Address 15"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_15,UC Control 2 15"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x220++0x1B
|
|
line.long 0x0 "A16,UC A 16"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B16,UC B 16"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT16,UC Counter 16"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C16,UC Control 16"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S16,UC Status 16"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA16,Alternate Address 16"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_16,UC Control 2 16"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x240++0x7
|
|
line.long 0x0 "A17,UC A 17"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B17,UC B 17"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x24C++0xF
|
|
line.long 0x0 "C17,UC Control 17"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S17,UC Status 17"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA17,Alternate Address 17"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_17,UC Control 2 17"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x260++0x7
|
|
line.long 0x0 "A18,UC A 18"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B18,UC B 18"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x26C++0xF
|
|
line.long 0x0 "C18,UC Control 18"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S18,UC Status 18"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA18,Alternate Address 18"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_18,UC Control 2 18"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x280++0x7
|
|
line.long 0x0 "A19,UC A 19"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B19,UC B 19"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x28C++0xF
|
|
line.long 0x0 "C19,UC Control 19"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S19,UC Status 19"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA19,Alternate Address 19"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_19,UC Control 2 19"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2A0++0x7
|
|
line.long 0x0 "A20,UC A 20"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B20,UC B 20"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x2AC++0xF
|
|
line.long 0x0 "C20,UC Control 20"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S20,UC Status 20"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA20,Alternate Address 20"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_20,UC Control 2 20"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2C0++0x7
|
|
line.long 0x0 "A21,UC A 21"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B21,UC B 21"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
group.long 0x2CC++0xF
|
|
line.long 0x0 "C21,UC Control 21"
|
|
bitfld.long 0x0 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0x0 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0x0 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0x0 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0x0 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0x0 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0x0 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0x0 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0x0 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0x0 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x0 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0x0 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x4 "S21,UC Status 21"
|
|
eventfld.long 0x4 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
rbitfld.long 0x4 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
rbitfld.long 0x4 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
eventfld.long 0x4 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x8 "ALTA21,Alternate Address 21"
|
|
hexmask.long.word 0x8 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0xC "C2_21,UC Control 2 21"
|
|
hexmask.long.byte 0xC 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0xC 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x2E0++0x1B
|
|
line.long 0x0 "A22,UC A 22"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B22,UC B 22"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT22,UC Counter 22"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C22,UC Control 22"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S22,UC Status 22"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA22,Alternate Address 22"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_22,UC Control 2 22"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
group.long 0x300++0x1B
|
|
line.long 0x0 "A23,UC A 23"
|
|
rbitfld.long 0x0 31. "RISE_FALL,Rising and falling edge detection" "0,1"
|
|
hexmask.long.word 0x0 0.--15. 1. "A,A"
|
|
line.long 0x4 "B23,UC B 23"
|
|
hexmask.long.word 0x4 0.--15. 1. "B,B"
|
|
line.long 0x8 "CNT23,UC Counter 23"
|
|
hexmask.long.word 0x8 0.--15. 1. "C,Internal Counter Value"
|
|
line.long 0xC "C23,UC Control 23"
|
|
bitfld.long 0xC 31. "FREN,Freeze Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "ODIS,Output Disable" "0: Enables output pin (the output pin operates..,1: Disables output pin"
|
|
newline
|
|
bitfld.long 0xC 28.--29. "ODISSL,Output Disable Select" "0: 0,1: 1,2: 2,3: 3"
|
|
bitfld.long 0xC 26.--27. "UCPRE,Prescaler" "0: 1,1: 2,2: 3,3: 4"
|
|
newline
|
|
bitfld.long 0xC 25. "UCPREN,Prescaler Enable" "0: Disable (no clock),1: Enable"
|
|
bitfld.long 0xC 24. "DMA,Direct Memory Access" "0: Interrupt request,1: DMA request"
|
|
newline
|
|
hexmask.long.byte 0xC 19.--22. 1. "IF,Input Filter"
|
|
bitfld.long 0xC 18. "FCK,Filter Clock Select" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
bitfld.long 0xC 17. "FEN,Flag Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 13. "FORCMA,Force Match A" "0: No effect,1: Force a match at comparator A"
|
|
newline
|
|
bitfld.long 0xC 12. "FORCMB,Force Match B" "0: No effect,1: Force a match at comparator B"
|
|
bitfld.long 0xC 9.--10. "BSL,Bus Select" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0xC 8. "EDSEL,Edge Selection" "0,1"
|
|
bitfld.long 0xC 7. "EDPOL,Edge Polarity" "0,1"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--6. 1. "MODE,Mode Selection"
|
|
line.long 0x10 "S23,UC Status 23"
|
|
eventfld.long 0x10 31. "OVR,Overrun" "0: No overrun,1: Overrun"
|
|
eventfld.long 0x10 15. "OVFL,Overflow" "0: No overflow,1: Overflow"
|
|
newline
|
|
rbitfld.long 0x10 2. "UCIN,UC Input Pin" "0: Negated,1: Asserted"
|
|
rbitfld.long 0x10 1. "UCOUT,UC Output Pin" "0: Negated,1: Asserted"
|
|
newline
|
|
eventfld.long 0x10 0. "FLAG,Flag" "0: No event,1: Event has occurred"
|
|
line.long 0x14 "ALTA23,Alternate Address 23"
|
|
hexmask.long.word 0x14 0.--15. 1. "ALTA,Alternate Address"
|
|
line.long 0x18 "C2_23,UC Control 2 23"
|
|
hexmask.long.byte 0x18 16.--19. 1. "UCEXTPRE,Extended Prescaler"
|
|
bitfld.long 0x18 14. "UCPRECLK,Prescaler Clock Source" "0: Prescaled clock,1: eMIOS module clock"
|
|
newline
|
|
hexmask.long.byte 0x18 0.--4. 1. "UCRELDEL_INT,Reload Signal Output Delay Interval"
|
|
tree.end
|
|
tree.end
|
|
tree "ERM"
|
|
base ad:0x4025C000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CR0,ERM Configuration Register 0"
|
|
bitfld.long 0x0 31. "ESCIE0,ESCIE0" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.."
|
|
bitfld.long 0x0 30. "ENCIE0,ENCIE0" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.."
|
|
newline
|
|
bitfld.long 0x0 23. "ESCIE2,ESCIE2" "0: Interrupt notification of Memory 2 single-bit..,1: Interrupt notification of Memory 2 single-bit.."
|
|
bitfld.long 0x0 22. "ENCIE2,ENCIE2" "0: Interrupt notification of Memory 2..,1: Interrupt notification of Memory 2.."
|
|
newline
|
|
bitfld.long 0x0 19. "ESCIE3,ESCIE3" "0: Interrupt notification of Memory 3 single-bit..,1: Interrupt notification of Memory 3 single-bit.."
|
|
bitfld.long 0x0 18. "ENCIE3,ENCIE3" "0: Interrupt notification of Memory 3..,1: Interrupt notification of Memory 3.."
|
|
newline
|
|
bitfld.long 0x0 15. "ESCIE4,ESCIE4" "0: Interrupt notification of Memory 4 single-bit..,1: Interrupt notification of Memory 4 single-bit.."
|
|
bitfld.long 0x0 14. "ENCIE4,ENCIE4" "0: Interrupt notification of Memory 4..,1: Interrupt notification of Memory 4.."
|
|
newline
|
|
bitfld.long 0x0 11. "ESCIE5,ESCIE5" "0: Interrupt notification of Memory 5 single-bit..,1: Interrupt notification of Memory 5 single-bit.."
|
|
bitfld.long 0x0 10. "ENCIE5,ENCIE5" "0: Interrupt notification of Memory 5..,1: Interrupt notification of Memory 5.."
|
|
line.long 0x4 "CR1,ERM Configuration Register 1"
|
|
bitfld.long 0x4 23. "ESCIE10,ESCIE10" "0: Interrupt notification of Memory 10 single-bit..,1: Interrupt notification of Memory 10 single-bit.."
|
|
bitfld.long 0x4 22. "ENCIE10,ENCIE10" "0: Interrupt notification of Memory 10..,1: Interrupt notification of Memory 10.."
|
|
newline
|
|
bitfld.long 0x4 19. "ESCIE11,ESCIE11" "0: Interrupt notification of Memory 11 single-bit..,1: Interrupt notification of Memory 11 single-bit.."
|
|
bitfld.long 0x4 18. "ENCIE11,ENCIE11" "0: Interrupt notification of Memory 11..,1: Interrupt notification of Memory 11.."
|
|
newline
|
|
bitfld.long 0x4 15. "ESCIE12,ESCIE12" "0: Interrupt notification of Memory 12 single-bit..,1: Interrupt notification of Memory 12 single-bit.."
|
|
bitfld.long 0x4 14. "ENCIE12,ENCIE12" "0: Interrupt notification of Memory 12..,1: Interrupt notification of Memory 12.."
|
|
line.long 0x8 "CR2,ERM Configuration Register 2"
|
|
bitfld.long 0x8 31. "ESCIE16,ESCIE16" "0: Interrupt notification of Memory 16 single-bit..,1: Interrupt notification of Memory 16 single-bit.."
|
|
bitfld.long 0x8 30. "ENCIE16,ENCIE16" "0: Interrupt notification of Memory 16..,1: Interrupt notification of Memory 16.."
|
|
newline
|
|
bitfld.long 0x8 27. "ESCIE17,ESCIE17" "0: Interrupt notification of Memory 17 single-bit..,1: Interrupt notification of Memory 17 single-bit.."
|
|
bitfld.long 0x8 26. "ENCIE17,ENCIE17" "0: Interrupt notification of Memory 17..,1: Interrupt notification of Memory 17.."
|
|
newline
|
|
bitfld.long 0x8 23. "ESCIE18,ESCIE18" "0: Interrupt notification of Memory 18 single-bit..,1: Interrupt notification of Memory 18 single-bit.."
|
|
bitfld.long 0x8 22. "ENCIE18,ENCIE18" "0: Interrupt notification of Memory 18..,1: Interrupt notification of Memory 18.."
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "SR0,ERM Status Register 0"
|
|
eventfld.long 0x0 31. "SBC0,SBC0" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected."
|
|
eventfld.long 0x0 30. "NCE0,NCE0" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected."
|
|
newline
|
|
eventfld.long 0x0 23. "SBC2,SBC2" "0: No single-bit correction event on Memory 2..,1: Single-bit correction event on Memory 2 detected."
|
|
eventfld.long 0x0 22. "NCE2,NCE2" "0: No non-correctable error event on Memory 2..,1: Non-correctable error event on Memory 2 detected."
|
|
newline
|
|
eventfld.long 0x0 19. "SBC3,SBC3" "0: No single-bit correction event on Memory 3..,1: Single-bit correction event on Memory 3 detected."
|
|
eventfld.long 0x0 18. "NCE3,NCE3" "0: No non-correctable error event on Memory 3..,1: Non-correctable error event on Memory 3 detected."
|
|
newline
|
|
eventfld.long 0x0 15. "SBC4,SBC4" "0: No single-bit correction event on Memory 4..,1: Single-bit correction event on Memory 4 detected."
|
|
eventfld.long 0x0 14. "NCE4,NCE4" "0: No non-correctable error event on Memory 4..,1: Non-correctable error event on Memory 4 detected."
|
|
newline
|
|
eventfld.long 0x0 11. "SBC5,SBC5" "0: No single-bit correction event on Memory 5..,1: Single-bit correction event on Memory 5 detected."
|
|
eventfld.long 0x0 10. "NCE5,NCE5" "0: No non-correctable error event on Memory 5..,1: Non-correctable error event on Memory 5 detected."
|
|
line.long 0x4 "SR1,ERM Status Register 1"
|
|
eventfld.long 0x4 23. "SBC10,SBC10" "0: No single-bit correction event on Memory 10..,1: Single-bit correction event on Memory 10 detected."
|
|
eventfld.long 0x4 22. "NCE10,NCE10" "0: No non-correctable error event on Memory 10..,1: Non-correctable error event on Memory 10 detected."
|
|
newline
|
|
eventfld.long 0x4 19. "SBC11,SBC11" "0: No single-bit correction event on Memory 11..,1: Single-bit correction event on Memory 11 detected."
|
|
eventfld.long 0x4 18. "NCE11,NCE11" "0: No non-correctable error event on Memory 11..,1: Non-correctable error event on Memory 11 detected."
|
|
newline
|
|
eventfld.long 0x4 15. "SBC12,SBC12" "0: No single-bit correction event on Memory 12..,1: Single-bit correction event on Memory 12 detected."
|
|
eventfld.long 0x4 14. "NCE12,NCE12" "0: No non-correctable error event on Memory 12..,1: Non-correctable error event on Memory 12 detected."
|
|
line.long 0x8 "SR2,ERM Status Register 2"
|
|
eventfld.long 0x8 31. "SBC16,SBC16" "0: No single-bit correction event on Memory 16..,1: Single-bit correction event on Memory 16 detected."
|
|
eventfld.long 0x8 30. "NCE16,NCE16" "0: No non-correctable error event on Memory 16..,1: Non-correctable error event on Memory 16 detected."
|
|
newline
|
|
eventfld.long 0x8 27. "SBC17,SBC17" "0: No single-bit correction event on Memory 17..,1: Single-bit correction event on Memory 17 detected."
|
|
eventfld.long 0x8 26. "NCE17,NCE17" "0: No non-correctable error event on Memory 17..,1: Non-correctable error event on Memory 17 detected."
|
|
newline
|
|
eventfld.long 0x8 23. "SBC18,SBC18" "0: No single-bit correction event on Memory 18..,1: Single-bit correction event on Memory 18 detected."
|
|
eventfld.long 0x8 22. "NCE18,NCE18" "0: No non-correctable error event on Memory 18..,1: Non-correctable error event on Memory 18 detected."
|
|
rgroup.long 0x100++0x7
|
|
line.long 0x0 "EAR0,ERM Memory 0 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
line.long 0x4 "SYN0,ERM Memory 0 Syndrome Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
|
|
group.long 0x108++0x3
|
|
line.long 0x0 "CORR_ERR_CNT0,ERM Memory 0 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "CORR_ERR_CNT2,ERM Memory 2 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
group.long 0x138++0x3
|
|
line.long 0x0 "CORR_ERR_CNT3,ERM Memory 3 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
group.long 0x148++0x3
|
|
line.long 0x0 "CORR_ERR_CNT4,ERM Memory 4 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
group.long 0x158++0x3
|
|
line.long 0x0 "CORR_ERR_CNT5,ERM Memory 5 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x1A0++0x7
|
|
line.long 0x0 "EAR10,ERM Memory 10 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
line.long 0x4 "SYN10,ERM Memory 10 Syndrome Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
|
|
group.long 0x1A8++0x3
|
|
line.long 0x0 "CORR_ERR_CNT10,ERM Memory 10 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x1B0++0x7
|
|
line.long 0x0 "EAR11,ERM Memory 11 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
line.long 0x4 "SYN11,ERM Memory 11 Syndrome Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
|
|
group.long 0x1B8++0x3
|
|
line.long 0x0 "CORR_ERR_CNT11,ERM Memory 11 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x1C0++0x7
|
|
line.long 0x0 "EAR12,ERM Memory 12 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
line.long 0x4 "SYN12,ERM Memory 12 Syndrome Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
|
|
group.long 0x1C8++0x3
|
|
line.long 0x0 "CORR_ERR_CNT12,ERM Memory 12 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x200++0x7
|
|
line.long 0x0 "EAR16,ERM Memory 16 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
line.long 0x4 "SYN16,ERM Memory 16 Syndrome Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SYNDROME,SYNDROME"
|
|
group.long 0x208++0x3
|
|
line.long 0x0 "CORR_ERR_CNT16,ERM Memory 16 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x210++0x3
|
|
line.long 0x0 "EAR17,ERM Memory 17 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
group.long 0x218++0x3
|
|
line.long 0x0 "CORR_ERR_CNT17,ERM Memory 17 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
rgroup.long 0x220++0x3
|
|
line.long 0x0 "EAR18,ERM Memory 18 Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
group.long 0x228++0x3
|
|
line.long 0x0 "CORR_ERR_CNT18,ERM Memory 18 Correctable Error Count Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "COUNT,Memory n Correctable Error Count"
|
|
tree.end
|
|
tree "FCCU"
|
|
base ad:0x40384000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,Control"
|
|
bitfld.long 0x0 9. "DEBUG,Debug Mode Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
rbitfld.long 0x0 6.--7. "OPS,Operation Status" "0: Idle,1: In progress,2: Aborted,3: Successful"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "OPR,Operation Run"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "CTRLK,Control Key"
|
|
hexmask.long 0x0 0.--31. 1. "CTRLK,Locked-Operation Control Key"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CFG,Configuration"
|
|
bitfld.long 0x0 24. "FCCU_SET_AFTER_RESET,Fault-Output (EOUT) Activate" "0: Inactive (the EOUT signals are in a..,1: Active (the EOUT signals indicate FCCU's.."
|
|
newline
|
|
bitfld.long 0x0 22.--23. "FCCU_SET_CLEAR,Fault-Output (EOUT) Control" "0: Controlled by the FSM,1: Always low,2: Controlled by the FSM,3: High until a fault occurs on a channel.."
|
|
newline
|
|
bitfld.long 0x0 11. "CM,Fault-Output (EOUT) Configuration-Indication Mode" "0: Different,1: Same"
|
|
newline
|
|
bitfld.long 0x0 9. "PS,Fault-Output (EOUT) Polarity Selection" "0: For the faulty indication EOUT1 is high and..,1: For the faulty indication EOUT1 is low and EOUT0.."
|
|
newline
|
|
bitfld.long 0x0 6.--8. "FOM,Fault-Output (EOUT) Mode" "?,?,2: Bi-Stable,?,?,5: Test 0 (controlled by the EINOUT register; EOUT1..,6: Test 1 (controlled by the EINOUT register; EOUT1..,7: Test 2 (controlled by the EINOUT register; EOUT1.."
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "NCF_CFG0,Non-critical Fault Configuration"
|
|
bitfld.long 0x0 7. "NCFC7,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 6. "NCFC6,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 5. "NCFC5,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 4. "NCFC4,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 3. "NCFC3,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 2. "NCFC2,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 1. "NCFC1,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
newline
|
|
bitfld.long 0x0 0. "NCFC0,Non-critical Fault Configuration n" "0: Hardware-recoverable,1: Software-recoverable"
|
|
group.long 0x4C++0x3
|
|
line.long 0x0 "NCFS_CFG0,Non-critical Fault-State Configuration"
|
|
bitfld.long 0x0 14.--15. "NCFSC7,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 12.--13. "NCFSC6,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "NCFSC5,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "NCFSC4,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "NCFSC3,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "NCFSC2,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "NCFSC1,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "NCFSC0,Non-critical Fault-State Configuration n" "0: Disabled,1: Enabled (rst_sfunc_b) (short),?,3: Disabled"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "NCF_S0,Non-critical Fault Status"
|
|
eventfld.long 0x0 7. "NCFS7,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 6. "NCFS6,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 5. "NCFS5,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 4. "NCFS4,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 3. "NCFS3,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 2. "NCFS2,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 1. "NCFS1,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
newline
|
|
eventfld.long 0x0 0. "NCFS0,Non-critical Fault Status n" "0: No unrecovered fault,1: Unrecovered fault"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "NCFK,Non-critical Fault Key"
|
|
hexmask.long 0x0 0.--31. 1. "NCFK,Non-critical Fault Key"
|
|
line.long 0x4 "NCF_E0,Non-critical Fault Enable"
|
|
bitfld.long 0x4 7. "NCFE7,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "NCFE6,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 5. "NCFE5,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 4. "NCFE4,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 3. "NCFE3,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 2. "NCFE2,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 1. "NCFE1,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 0. "NCFE0,Non-critical Fault Enable n" "0: Disabled,1: Enabled"
|
|
group.long 0xA4++0x3
|
|
line.long 0x0 "NCF_TOE0,Non-critical-Fault Alarm-State Timeout Enable"
|
|
bitfld.long 0x0 7. "NCFTOE7,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 6. "NCFTOE6,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 5. "NCFTOE5,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "NCFTOE4,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "NCFTOE3,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 2. "NCFTOE2,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 1. "NCFTOE1,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 0. "NCFTOE0,Non-critical-Fault Alarm-State Timeout Enable n" "0: Disabled,1: Enabled"
|
|
group.long 0xB4++0xB
|
|
line.long 0x0 "NCF_TO,Non-critical-Fault Alarm-State Timeout Interval"
|
|
hexmask.long 0x0 0.--31. 1. "TO,Non-critical-Fault Alarm-State Timeout Interval"
|
|
line.long 0x4 "CFG_TO,Configuration-State Timeout Interval"
|
|
bitfld.long 0x4 0.--2. "TO,Configuration-State Timeout Interval" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "EINOUT,IO Control"
|
|
rbitfld.long 0x8 5. "EIN1,Error Input 1" "0: Low,1: High"
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|
newline
|
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rbitfld.long 0x8 4. "EIN0,Error Input 0" "0: Low,1: High"
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|
newline
|
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bitfld.long 0x8 1. "EOUT1,EOUT1" "0: force EOUT[1] = 0,1: force EOUT[1] = 1"
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|
newline
|
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bitfld.long 0x8 0. "EOUT0,EOUT0" "0: force EOUT[0] = 0,1: force EOUT[0] = 1"
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|
rgroup.long 0xC0++0x13
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|
line.long 0x0 "STAT,Status"
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|
bitfld.long 0x0 4.--5. "PhysicErrorPin,EOUT Signal States" "0: EOUT1 is low; EOUT0 is low.,1: EOUT1 is low; EOUT0 is high.,2: EOUT1 is high; EOUT0 is low.,3: EOUT1 is high; EOUT0 is high."
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|
newline
|
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bitfld.long 0x0 3. "ESTAT,FCCU Faulty Condition" "0: Not in faulty condition (in non-faulty or..,1: In faulty condition"
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|
newline
|
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bitfld.long 0x0 0.--2. "STATUS,FCCU State" "0: NORMAL,1: CONFIG,2: ALARM,3: FAULT,?,?,?,?"
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|
line.long 0x4 "N2AF_STATUS,Normal-to-Alarm Freeze Status"
|
|
hexmask.long.byte 0x4 0.--7. 1. "NAFS,Normal-to-Alarm Freeze Status"
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|
line.long 0x8 "A2FF_STATUS,Alarm-to-Fault Freeze Status"
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|
bitfld.long 0x8 8.--9. "AF_SRC,Alarm-to-Fault Source" "0: No Alarm-to-Fault-state fault,?,2: Non-critical fault,3: Multiple Alarm-to-Fault-state faults"
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|
newline
|
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hexmask.long.byte 0x8 0.--7. 1. "AFFS,Alarm-to-Fault Freeze Status"
|
|
line.long 0xC "N2FF_STATUS,Normal-to-Fault Freeze Status"
|
|
bitfld.long 0xC 8.--9. "NF_SRC,Normal-to-Fault Source" "0: No Normal-to-Fault-state fault,?,2: Non-critical fault,3: Multiple Normal-to-Fault-state faults"
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|
newline
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hexmask.long.byte 0xC 0.--7. 1. "NFFS,Normal-to-Fault Freeze Status"
|
|
line.long 0x10 "F2AF_STATUS,Fault-to-Alarm Freeze Status"
|
|
hexmask.long.word 0x10 0.--8. 1. "FAFS,Fault-to-Alarm Freeze Status"
|
|
wgroup.long 0xDC++0x3
|
|
line.long 0x0 "NCFF,Non-critical Fault Fake"
|
|
hexmask.long.byte 0x0 0.--6. 1. "FNCFC,FNCFC"
|
|
group.long 0xE0++0x7
|
|
line.long 0x0 "IRQ_STAT,IRQ Status"
|
|
rbitfld.long 0x0 2. "NMI_STAT,NMI Interrupt Status" "0: NMI interrupt is OFF,1: NMI interrupt is ON"
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|
newline
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rbitfld.long 0x0 1. "ALRM_STAT,Alarm Interrupt Status" "0: Alarm interrupt is OFF,1: Alarm interrupt is ON"
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|
newline
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eventfld.long 0x0 0. "CFG_TO_STAT,Configuration-State Timeout Status" "0: No configuration-stat timeout error,1: Configuration-state timeout error"
|
|
line.long 0x4 "IRQ_EN,IRQ Enable"
|
|
bitfld.long 0x4 0. "CFG_TO_IEN,Configuration-State Timeout Interrupt Enable" "0: Configuration-state timeout interrupt disabled,1: Configuration-state timeout interrupt enabled"
|
|
wgroup.long 0xF0++0x7
|
|
line.long 0x0 "TRANS_LOCK,Transient Configuration Lock"
|
|
hexmask.long.word 0x0 0.--8. 1. "TRANSKEY,Transient Configuration Lock"
|
|
line.long 0x4 "PERMNT_LOCK,Permanent Configuration Lock"
|
|
hexmask.long.word 0x4 0.--8. 1. "PERMNTKEY,Permanent Configuration Lock"
|
|
group.long 0xF8++0x7
|
|
line.long 0x0 "DELTA_T,Delta T"
|
|
hexmask.long.word 0x0 0.--13. 1. "DELTA_T,Minimum Fault-Output (EOUT) Timer Interval"
|
|
line.long 0x4 "IRQ_ALARM_EN0,Non-critical Alarm-State Interrupt-Request Enable"
|
|
bitfld.long 0x4 7. "IRQEN7,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 6. "IRQEN6,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 5. "IRQEN5,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 4. "IRQEN4,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 3. "IRQEN3,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 2. "IRQEN2,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 1. "IRQEN1,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 0. "IRQEN0,Non-critical Alarm-State Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
group.long 0x10C++0x3
|
|
line.long 0x0 "NMI_EN0,Non-critical Fault-State Non-maskable-Interrupt-Request Enable"
|
|
bitfld.long 0x0 7. "NMIEN7,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 6. "NMIEN6,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 5. "NMIEN5,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 4. "NMIEN4,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 3. "NMIEN3,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 2. "NMIEN2,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 1. "NMIEN1,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 0. "NMIEN0,Non-critical Fault-State Non-maskable-Interrupt-Request Enable n" "0: Disabled,1: Enabled"
|
|
group.long 0x11C++0x3
|
|
line.long 0x0 "EOUT_SIG_EN0,Non-critical Fault-State EOUT Signaling Enable"
|
|
bitfld.long 0x0 7. "EOUTEN7,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 6. "EOUTEN6,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 5. "EOUTEN5,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 4. "EOUTEN4,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 3. "EOUTEN3,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 2. "EOUTEN2,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 1. "EOUTEN1,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
newline
|
|
bitfld.long 0x0 0. "EOUTEN0,Non-critical Fault-State EOUT Signaling Enable n" "0: In Bi-Stable fault-output mode both EOUT..,1: Both EOUT signaling and FIF assertion are.."
|
|
rgroup.long 0x12C++0x3
|
|
line.long 0x0 "TMR_ALARM,Alarm-State Timer"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Alarm-State Timer Count"
|
|
rgroup.long 0x134++0x7
|
|
line.long 0x0 "TMR_CFG,Configuration-State Timer"
|
|
hexmask.long 0x0 0.--31. 1. "COUNT,Configuration-State Timer Count"
|
|
line.long 0x4 "TMR_ETMR,Fault-Output Timer"
|
|
hexmask.long 0x4 0.--31. 1. "COUNT,Fault-Output Timer Count"
|
|
tree.end
|
|
tree "FIRC"
|
|
base ad:0x402D0000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "Status_Register,Status Register"
|
|
bitfld.long 0x0 0. "STATUS,Status bit for FIRC" "0: FIRC is off or unstable.,1: FIRC is on and stable."
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "STDBY_ENABLE,Standby Enable Register"
|
|
bitfld.long 0x0 0. "STDBY_EN,Enables or disables FIRC in chip's Standby mode." "0: Disabled,1: Enabled"
|
|
tree.end
|
|
tree "FLASH"
|
|
base ad:0x402EC000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PEID,Program and Erase Master/Domain ID"
|
|
bitfld.long 0x0 15. "PECIE,Program/Erase Complete Interrupt Enable" "0: Interrupt request not generated when MCRS[DONE]..,1: Interrupt request generated when MCRS[DONE] is 1"
|
|
newline
|
|
bitfld.long 0x0 12. "WDIE,Watch Dog Interrupt Enable" "0: Watchdog interrupt not enabled,1: Watchdog interrupt enabled"
|
|
bitfld.long 0x0 8. "PGM,Program" "0: Flash memory not executing a program sequence,1: Flash memory executing a program sequence"
|
|
newline
|
|
bitfld.long 0x0 5. "ESS,Erase Size Select" "0: Flash memory erase is on a sector,1: Flash memory erase is on a block"
|
|
bitfld.long 0x0 4. "ERS,Erase" "0: Flash memory not executing an erase sequence,1: Flash memory executing an erase sequence"
|
|
newline
|
|
bitfld.long 0x0 0. "EHV,Enable High Voltage" "0: Flash memory is not enabled to perform a high..,1: Flash memory is enabled to perform a high.."
|
|
line.long 0x4 "MCRS,Module Configuration Status"
|
|
eventfld.long 0x4 31. "EER,ECC Event Error" "0: Reads occurring normally,1: ECC error occurred during a previous read"
|
|
eventfld.long 0x4 30. "SBC,Single Bit Correction" "0: Reads occurring without corrections,1: Single bit correction occurred during a previous.."
|
|
newline
|
|
eventfld.long 0x4 29. "AEE,Address Encode Error" "0: Reads are occurring without address encode..,1: Previous read may be corrupted based on address.."
|
|
eventfld.long 0x4 28. "EEE,EDC after ECC Error" "0: Reads are occurring without EDC after ECC..,1: Previous read may be corrupted based on ECC.."
|
|
newline
|
|
eventfld.long 0x4 25. "RVE,Read Voltage Error" "0: Reads are occurring without voltage issues,1: A previous read may have been corrupted due to.."
|
|
eventfld.long 0x4 24. "RRE,Read Reference Error" "0: Reads occur without reference issues,1: Previous read may be corrupted because of read.."
|
|
newline
|
|
eventfld.long 0x4 20. "RWE,Read-While-Write Event Error" "0: Reads occur normally,1: RWW error occurred during a previous read"
|
|
eventfld.long 0x4 17. "PEP,Program and Erase Protection Error" "0: Program and erase protection errors do not exist,1: Previous program or erase protection error.."
|
|
newline
|
|
eventfld.long 0x4 16. "PES,Program and Erase Sequence Error" "0: Program and erase sequence errors do not exist,1: Previous program or erase sequence encountered.."
|
|
rbitfld.long 0x4 15. "DONE,State Machine Status" "0: Performing a high voltage operation,1: Not executing a high voltage operation"
|
|
newline
|
|
rbitfld.long 0x4 14. "PEG,Program/Erase Good" "0: Program or erase operation failed,1: Program or erase operation successful"
|
|
rbitfld.long 0x4 12. "WDI,Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Program Watchdog Timer has expired."
|
|
newline
|
|
rbitfld.long 0x4 9. "EPEG,ECC Enabled Program/Erase Good" "0: Program or erase operation did not require ECC..,1: Program or erase operation required ECC Enabled.."
|
|
rbitfld.long 0x4 8. "TSPELOCK,UTest NVM Program and Erase Lock" "0: Corresponding sector not locked and may be..,1: Corresponding sector protected from the program.."
|
|
newline
|
|
rbitfld.long 0x4 0. "RE,Reset Error" "0: Reset occurred without errors,1: Reset error encountered"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "MCRE,Extended Module Configuration"
|
|
bitfld.long 0x0 29.--31. "n2M,Number of 2 MB Blocks" "0: Zero 2 MB blocks,1: One 2 MB block,2: Two 2 MB blocks,3: Three 2 MB blocks,4: Four 2 MB blocks,?,?,?"
|
|
bitfld.long 0x0 21.--23. "n1M,Number of 1 MB Blocks" "0: Zero 1 MB blocks,1: One 1 MB block,2: Two 1 MB blocks,3: Three 1 MB blocks,4: Four 1 MB blocks,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "n512K,Number of 512 KB Blocks" "0: Zero 512 KB blocks,1: One 512 KB block,2: Two 512 KB blocks,3: Four 512 KB blocks"
|
|
bitfld.long 0x0 6.--7. "n256K,Number of 256 KB Blocks" "0: Zero 256 KB blocks,1: One 256 KB block,2: Two 256 KB blocks,3: Four 256 KB blocks"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "CTL,Module Control"
|
|
bitfld.long 0x0 15. "RWSL,Read Wait State Lock" "0: RWSC not locked and available for writing,1: RWSC locked and unavailable for writing"
|
|
hexmask.long.byte 0x0 8.--12. 1. "RWSC,Wait State Control"
|
|
line.long 0x4 "ADR,Address"
|
|
bitfld.long 0x4 31. "SAD,UTest NVM Address" "0: Address captured or to be accessed is from the..,1: Address captured or to be accessed is from the.."
|
|
bitfld.long 0x4 24. "A5,Address Region 5" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.."
|
|
newline
|
|
bitfld.long 0x4 21. "A2,Address Region 2" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.."
|
|
bitfld.long 0x4 20. "A1,Address Region 1" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.."
|
|
newline
|
|
bitfld.long 0x4 19. "A0,Address Region 0" "0: Address captured or to be accessed is not from..,1: Address captured or to be accessed is from.."
|
|
hexmask.long.tbyte 0x4 1.--18. 1. "ADDR,Address"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PEADR,Program and Erase Address"
|
|
bitfld.long 0x0 31. "PEASAD,UTest NVM Program and Erase Address" "0: Address accessed is from the main array space,1: Address accessed is from the UTest NVM array space"
|
|
bitfld.long 0x0 24. "PEA5,Program and Erase Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5"
|
|
newline
|
|
bitfld.long 0x0 23. "PEA4,Program and Erase Address Region 4" "0: Address accessed is not from region 4,1: Adrress accessed is from region 4"
|
|
bitfld.long 0x0 22. "PEA3,Program and Erase Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3"
|
|
newline
|
|
bitfld.long 0x0 21. "PEA2,Program and Erase Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2"
|
|
bitfld.long 0x0 20. "PEA1,Program and Erase Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1"
|
|
newline
|
|
bitfld.long 0x0 19. "PEA0,Program and Erase Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0"
|
|
hexmask.long.word 0x0 5.--18. 1. "PEADDR,Program and Erase Address"
|
|
rgroup.long 0x50++0x7
|
|
line.long 0x0 "SPELOCK,Sector Program and Erase Hardware Lock"
|
|
hexmask.long 0x0 0.--31. 1. "SPELOCK,Sector Program and Erase Lock [31:0]"
|
|
line.long 0x4 "SSPELOCK,Super Sector Program and Erase Hardware Lock"
|
|
hexmask.long 0x4 0.--27. 1. "SSPELOCK,Super Sector Program and Erase Lock [27:0]"
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "XSPELOCK,Express Sector Program and Erase Hardware Lock"
|
|
hexmask.long 0x0 0.--31. 1. "XSPELOCK,Express Sector Program and Erase Lock [31:0]"
|
|
line.long 0x4 "XSSPELOCK,Express Super Sector Program and Erase Hardware Lock"
|
|
hexmask.long 0x4 0.--27. 1. "XSSPELOCK,Express Super Sector Program and Erase Lock [27:0]"
|
|
group.long 0x90++0x7
|
|
line.long 0x0 "TMD,Test Mode Disable Password Check"
|
|
hexmask.long 0x0 0.--31. 1. "PWD,Password Challenge"
|
|
line.long 0x4 "UT0,UTest 0"
|
|
bitfld.long 0x4 31. "UTE,UTest Enable" "0: U-Test mode is not enabled.,1: U-Test mode is enabled."
|
|
bitfld.long 0x4 30. "SBCE,Single Bit Correction Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 15. "RRIE,Read Reference Input Enable" "0: Read reference input disabled,1: Read reference input enabled"
|
|
bitfld.long 0x4 14. "AEIE,Address Encode Invert Enable" "0: Address encode invert is disabled,1: Address encode values are inverted based on.."
|
|
newline
|
|
bitfld.long 0x4 13. "EDIE,EDC after ECC Data Input Enable" "0: EDC after ECC data input is disabled,1: Data read is from UD3[EDDATA] and UD5[EDDATAC]"
|
|
bitfld.long 0x4 12. "EIE,ECC Data Input Enable" "0: ECC data input is disabled,1: Data read is from UD0[EDATA] and UD2[EDATAC]"
|
|
newline
|
|
bitfld.long 0x4 9. "NAIBP,Next Array Integrity Break Point" "0: Array integrity state machine is not currently..,1: Array integrity state machine is at a breakpoint"
|
|
bitfld.long 0x4 8. "AIBPE,Array Integrity Break Point Enable" "0: Array integrity breakpoints disabled,1: Array integrity breakpoints enabled during array.."
|
|
newline
|
|
bitfld.long 0x4 6. "AISUS,Array Integrity Suspend" "0: Array integrity sequence not suspended.,1: Array integrity sequence is suspended."
|
|
bitfld.long 0x4 5. "MRE,Margin Read Enable" "0: Margin reads are not enabled.,1: Margin reads are enabled."
|
|
newline
|
|
bitfld.long 0x4 4. "MRV,Margin Read Value" "0: Zero's margin reads are requested.,1: One's margin reads are requested."
|
|
bitfld.long 0x4 2. "AIS,Array Integrity Sequence" "0: Array integrity sequence is proprietary sequence,1: Array integrity sequence is sequential"
|
|
newline
|
|
bitfld.long 0x4 1. "AIE,Array Integrity Enable" "0: Array integrity checks not enabled,1: Array integrity checks enabled"
|
|
rbitfld.long 0x4 0. "AID,Array Integrity Done" "0: Array integrity check ongoing,1: Array integrity check complete"
|
|
repeat 9. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x98)++0x3
|
|
line.long 0x0 "UM[$1],UMISRn"
|
|
hexmask.long 0x0 0.--31. 1. "MISR,MISR[31:0]"
|
|
repeat.end
|
|
group.long 0xBC++0x3
|
|
line.long 0x0 "UM9,UMISR9"
|
|
bitfld.long 0x0 0. "MISR,MISR[288]" "0,1"
|
|
group.long 0xD0++0x23
|
|
line.long 0x0 "UD0,UTest Data 0"
|
|
hexmask.long 0x0 0.--31. 1. "EDATA,ECC Data [31:0]"
|
|
line.long 0x4 "UD1,UTest Data 1"
|
|
hexmask.long 0x4 0.--31. 1. "EDATA,ECC Data [63:32]"
|
|
line.long 0x8 "UD2,UTest Data 2"
|
|
bitfld.long 0x8 27. "ED3,ECC Logic Check Double Word 3" "0,1"
|
|
bitfld.long 0x8 26. "ED2,ECC Logic Check Double Word 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 25. "ED1,ECC Logic Check Double Word 1" "0,1"
|
|
bitfld.long 0x8 24. "ED0,ECC Logic Check Double Word 0" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "EDATAC,ECC Data Check Bits [7:0]"
|
|
line.long 0xC "UD3,UTest Data 3"
|
|
hexmask.long 0xC 0.--31. 1. "EDDATA,EDC After ECC Data [31:0]"
|
|
line.long 0x10 "UD4,UTest Data 4"
|
|
hexmask.long 0x10 0.--31. 1. "EDDATA,EDC After ECC Data [63:31]"
|
|
line.long 0x14 "UD5,UTest Data 5"
|
|
bitfld.long 0x14 27. "EDD3,EDC After ECC Logic Check Double Word 3" "0,1"
|
|
bitfld.long 0x14 26. "EDD2,EDC after ECC Logic Check Double Word 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 25. "EDD1,EDC After ECC Logic Check Double Word 1" "0,1"
|
|
bitfld.long 0x14 24. "EDD0,EDC After ECC Logic Check Double Word 0" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x14 0.--7. 1. "EDDATAC,EDC After ECC Data Check Bits [7:0]"
|
|
line.long 0x18 "UA0,UTest Address 0"
|
|
hexmask.long 0x18 0.--31. 1. "AEI,Address Encode Invert [31:0]"
|
|
line.long 0x1C "UA1,UTest Address 1"
|
|
hexmask.long.tbyte 0x1C 0.--19. 1. "AEI,Address Encode Invert [51:32]"
|
|
line.long 0x20 "XMCR,Express Module Configuration"
|
|
hexmask.long.byte 0x20 16.--23. 1. "XPEID,Express Program Master/Domain ID"
|
|
rbitfld.long 0x20 15. "XDONE,Express State Machine Status" "0: Executing an express program operation,1: Not executing an express program operation"
|
|
newline
|
|
rbitfld.long 0x20 14. "XPEG,Express Program Good" "0: Program operation failed,1: Program operation successful"
|
|
rbitfld.long 0x20 13. "XDOK,Express Data OK" "0: Flash memory not ready to accept writes to the..,1: Writes to DATA registers allowed"
|
|
newline
|
|
rbitfld.long 0x20 12. "XWDI,Express Watch Dog Interrupt" "0: Normal Operation Watchdog Timer has not expired.,1: Express Program Watchdog Timer has expired."
|
|
bitfld.long 0x20 11. "XWDIE,Express Watch Dog Interrupt Enable" "0: Express watchdog interrupt disabled,1: Express watchdog interrupt enabled"
|
|
newline
|
|
rbitfld.long 0x20 9. "XEPEG,Express ECC Enabled Program Good" "0: Program operation did not require ECC-enabled..,1: Program operation required ECC-enabled verifies.."
|
|
bitfld.long 0x20 8. "XPGM,Express Program" "0: Flash memory not executing an express program..,1: Flash memory executing an express program sequence"
|
|
newline
|
|
bitfld.long 0x20 0. "XEHV,Express Enable High Voltage" "0: Flash memory is not enabled to perform an..,1: Flash memory is enabled to perform an express.."
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "XPEADR,Express Program Address"
|
|
bitfld.long 0x0 24. "XPEA5,Express Program Address Region 5" "0: Address accessed is not from region 5,1: Address accessed is from region 5"
|
|
bitfld.long 0x0 23. "XPEA4,Express Program Address Region 4" "0: Address accessed is not from region 4,1: Address accessed is from region 4"
|
|
newline
|
|
bitfld.long 0x0 22. "XPEA3,Express Program Address Region 3" "0: Address accessed is not from region 3,1: Address accessed is from region 3"
|
|
bitfld.long 0x0 21. "XPEA2,Express Program Address Region 2" "0: Address accessed is not from region 2,1: Address accessed is from region 2"
|
|
newline
|
|
bitfld.long 0x0 20. "XPEA1,Express Program Address Region 1" "0: Address accessed is not from region 1,1: Address accessed is from region 1"
|
|
bitfld.long 0x0 19. "XPEA0,Express Program Address Region 0" "0: Address accessed is not from region 0,1: Address accessed is from region 0"
|
|
newline
|
|
hexmask.long.word 0x0 5.--18. 1. "XPEADDR,Express Program Address"
|
|
repeat 32. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "DATA[$1],Program Data"
|
|
hexmask.long 0x0 0.--31. 1. "PDATA,Program Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "FLEXCAN"
|
|
base ad:0x0
|
|
tree "CAN_0"
|
|
base ad:0x40304000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,Legacy RX FIFO Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers"
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode"
|
|
newline
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable"
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode"
|
|
newline
|
|
bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected."
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.."
|
|
newline
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free-Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers"
|
|
line.long 0x4 "RX14MASK,Receive 14 Mask"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Receive 15 Mask"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
|
|
eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun"
|
|
newline
|
|
eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.."
|
|
eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized"
|
|
eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.."
|
|
newline
|
|
eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE"
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting"
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving"
|
|
eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or Legacy RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.."
|
|
newline
|
|
eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or Legacy RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.."
|
|
eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in Legacy RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved"
|
|
eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear Legacy FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.."
|
|
line.long 0x24 "CTRL2,Control 2"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Legacy Receive FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from Legacy RX FIFO or Enhanced..,1: Matching starts from message buffers and.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored"
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick"
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.."
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?"
|
|
bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.."
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,Cyclic Redundancy Check"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,Legacy RX FIFO Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,Legacy RX FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,Legacy RX FIFO Information"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR[$1],Receive Individual Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xAE0++0xF
|
|
line.long 0x0 "MECR,Memory Error Control"
|
|
bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word."
|
|
bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.."
|
|
line.long 0x4 "ERRIAR,Error Injection Address"
|
|
hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High"
|
|
rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3"
|
|
line.long 0x8 "ERRIDPR,Error Injection Data Pattern"
|
|
hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern"
|
|
line.long 0xC "ERRIPPR,Error Injection Parity Pattern"
|
|
hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)"
|
|
hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)"
|
|
rgroup.long 0xAF0++0xB
|
|
line.long 0x0 "RERRAR,Error Report Address"
|
|
bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error"
|
|
bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected"
|
|
line.long 0x4 "RERRDR,Error Report Data"
|
|
hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error"
|
|
line.long 0x8 "RERRSYNR,Error Report Syndrome"
|
|
bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)"
|
|
newline
|
|
bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2"
|
|
newline
|
|
bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1"
|
|
newline
|
|
bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x0 "ERRSR,Error Status"
|
|
eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
group.long 0xBF0++0x17
|
|
line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers"
|
|
hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor"
|
|
hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor"
|
|
line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing"
|
|
hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width"
|
|
hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1"
|
|
line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing"
|
|
hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1"
|
|
line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation"
|
|
bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset"
|
|
eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value"
|
|
line.long 0x10 "FDCTRL,CAN FD Control"
|
|
bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x14 "FDCBT,CAN FD Bit Timing"
|
|
hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
group.long 0xC0C++0xB
|
|
line.long 0x0 "ERFCR,Enhanced RX FIFO Control"
|
|
bitfld.long 0x0 31. "ERFEN,Enhanced RX FIFO enable" "0: Disable,1: Enable"
|
|
hexmask.long.byte 0x0 26.--30. 1. "DMALW,DMA Last Word"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--22. 1. "NEXIF,Number of Extended ID Filter Elements"
|
|
hexmask.long.byte 0x0 8.--13. 1. "NFE,Number of Enhanced RX FIFO Filter Elements"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "ERFWM,Enhanced RX FIFO Watermark"
|
|
line.long 0x4 "ERFIER,Enhanced RX FIFO Interrupt Enable"
|
|
bitfld.long 0x4 31. "ERFUFWIE,Enhanced RX FIFO Underflow Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 30. "ERFOVFIE,Enhanced RX FIFO Overflow Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 29. "ERFWMIIE,Enhanced RX FIFO Watermark Indication Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x4 28. "ERFDAIE,Enhanced RX FIFO Data Available Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0x8 "ERFSR,Enhanced RX FIFO Status"
|
|
eventfld.long 0x8 31. "ERFUFW,Enhanced RX FIFO Underflow Flag" "0: No such occurrence,1: Underflow"
|
|
eventfld.long 0x8 30. "ERFOVF,Enhanced RX FIFO Overflow Flag" "0: No such occurrence,1: Overflow"
|
|
newline
|
|
eventfld.long 0x8 29. "ERFWMI,Enhanced RX FIFO Watermark Indication Flag" "0: No such occurrence,1: Number of messages in FIFO is greater than the.."
|
|
eventfld.long 0x8 28. "ERFDA,Enhanced RX FIFO Data Available Flag" "0: No such occurrence,1: At least one message stored in Enhanced RX FIFO"
|
|
newline
|
|
bitfld.long 0x8 27. "ERFCLR,Enhanced RX FIFO Clear" "0: No effect,1: Clear enhanced RX FIFO content"
|
|
rbitfld.long 0x8 17. "ERFE,Enhanced RX FIFO Empty Flag" "0: Not empty,1: Empty"
|
|
newline
|
|
rbitfld.long 0x8 16. "ERFF,Enhanced RX FIFO Full Flag" "0: Not full,1: Full"
|
|
hexmask.long.byte 0x8 0.--5. 1. "ERFEL,Enhanced RX FIFO Elements"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC30)++0x3
|
|
line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp"
|
|
hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x3000)++0x3
|
|
line.long 0x0 "ERFFEL[$1],Enhanced RX FIFO Filter Element"
|
|
hexmask.long 0x0 0.--31. 1. "FEL,Filter Element Bits"
|
|
repeat.end
|
|
tree.end
|
|
tree "CAN_1"
|
|
base ad:0x40308000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,RX FIFO Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers"
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode"
|
|
newline
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable"
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode"
|
|
newline
|
|
bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected."
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.."
|
|
newline
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free-Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers"
|
|
line.long 0x4 "RX14MASK,Receive 14 Mask"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Receive 15 Mask"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
|
|
eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun"
|
|
newline
|
|
eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.."
|
|
eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized"
|
|
eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.."
|
|
newline
|
|
eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE"
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting"
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving"
|
|
eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.."
|
|
newline
|
|
eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.."
|
|
eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved"
|
|
eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.."
|
|
line.long 0x24 "CTRL2,Control 2"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Receive FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from RX FIFO and continues on..,1: Matching starts from message buffers and.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored"
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick"
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.."
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?"
|
|
bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.."
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,Cyclic Redundancy Check"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,RX FIFO Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,RX FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,RX FIFO Information"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR[$1],Receive Individual Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xAE0++0xF
|
|
line.long 0x0 "MECR,Memory Error Control"
|
|
bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word."
|
|
bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.."
|
|
line.long 0x4 "ERRIAR,Error Injection Address"
|
|
hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High"
|
|
rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3"
|
|
line.long 0x8 "ERRIDPR,Error Injection Data Pattern"
|
|
hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern"
|
|
line.long 0xC "ERRIPPR,Error Injection Parity Pattern"
|
|
hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)"
|
|
hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)"
|
|
rgroup.long 0xAF0++0xB
|
|
line.long 0x0 "RERRAR,Error Report Address"
|
|
bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error"
|
|
bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected"
|
|
line.long 0x4 "RERRDR,Error Report Data"
|
|
hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error"
|
|
line.long 0x8 "RERRSYNR,Error Report Syndrome"
|
|
bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)"
|
|
newline
|
|
bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2"
|
|
newline
|
|
bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1"
|
|
newline
|
|
bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x0 "ERRSR,Error Status"
|
|
eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
group.long 0xBF0++0x17
|
|
line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers"
|
|
hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor"
|
|
hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor"
|
|
line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing"
|
|
hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width"
|
|
hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1"
|
|
line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing"
|
|
hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1"
|
|
line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation"
|
|
bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset"
|
|
eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value"
|
|
line.long 0x10 "FDCTRL,CAN FD Control"
|
|
bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x14 "FDCBT,CAN FD Bit Timing"
|
|
hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC30)++0x3
|
|
line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp"
|
|
hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp"
|
|
repeat.end
|
|
tree.end
|
|
tree "CAN_2"
|
|
base ad:0x4030C000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,RX FIFO Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No request,1: Enter Freeze mode if MCR[FRZ] = 1."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN is in Normal mode Listen-Only mode or..,1: FlexCAN is in Disable mode or Freeze mode."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset,1: Soft reset affects reset registers"
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: Not in Freeze mode prescaler running.,1: In Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: User mode,1: Supervisor mode"
|
|
newline
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: Disable,1: Enable"
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: Not in a low-power mode,1: In a low-power mode"
|
|
newline
|
|
bitfld.long 0x0 17. "SRXDIS,Self-Reception Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 16. "IRMQ,Individual RX Masking and Queue Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 11. "FDEN,CAN FD Operation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected."
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number of the Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Interrupt disabled,1: Interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 12. "LPB,Loopback Mode" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 11. "TWRNMSK,TX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "RWRNMSK,RX Warning Interrupt Mask" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: One sample is used to determine the bit value.,1: Three samples are used to determine the value of.."
|
|
newline
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free-Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,RX Message Buffers Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Global Mask for RX Message Buffers"
|
|
line.long 0x4 "RX14MASK,Receive 14 Mask"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,RX Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Receive 15 Mask"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,RX Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for Fast Bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for Fast Bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Fast Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Fast Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Fast Cyclic Redundancy Check Error Flag" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Fast Form Error Flag" "0: No such occurrence.,1: A form error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Fast Stuffing Error Flag" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
|
|
eventfld.long 0x10 21. "ERROVR,Error Overrun Flag" "0: No overrun,1: Overrun"
|
|
newline
|
|
eventfld.long 0x10 20. "ERRINT_FAST,Fast Error Interrupt Flag" "0: No such occurrence.,1: Error flag set in the data phase of CAN FD.."
|
|
eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt Flag" "0: No such occurrence,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status Flag" "0: Not synchronized,1: Synchronized"
|
|
eventfld.long 0x10 17. "TWRNINT,TX Warning Interrupt Flag" "0: No such occurrence,1: TX error counter changed from less than 96 to.."
|
|
newline
|
|
eventfld.long 0x10 16. "RWRNINT,RX Warning Interrupt Flag" "0: No such occurrence,1: RX error counter changed from less than 96 to.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error Flag" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error Flag" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error Flag" "0: No error,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error Flag" "0: No error,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error Flag" "0: No error,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error Flag" "0: No error,1: Error occurred since last read of this register."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning Flag" "0: No such occurrence.,1: TXERRCNT is 96 or greater."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,RX Error Warning Flag" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,Idle" "0: Not IDLE,1: IDLE"
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: Not transmitting,1: Transmitting"
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN in Reception Flag" "0: Not receiving,1: Receiving"
|
|
eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt Flag" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
eventfld.long 0x10 1. "ERRINT,Error Interrupt Flag" "0: No such occurrence.,1: Indicates setting of any error flag in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt or RX FIFO Overflow" "0: No occurrence of MB7 completing transmission or..,1: MB7 completed transmission or reception or FIFO.."
|
|
newline
|
|
eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt or RX FIFO Warning" "0: No occurrence of MB6 completing transmission or..,1: MB6 completed transmission or reception or FIFO.."
|
|
eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt or Frames available in RX FIFO" "0: No occurrence of completed transmission or..,1: MB5 completed transmission or reception or.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt or Reserved"
|
|
eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt or Clear FIFO bit" "0: MB0 has no occurrence of successfully completed..,1: MB0 has successfully completed transmission or.."
|
|
line.long 0x24 "CTRL2,Control 2"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for Errors Detected in the Data Phase of Fast CAN FD Frames" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 29. "ECRWRE,Error Correction Configuration Register Write Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 28. "WRMFRZ,Write Access to Memory in Freeze Mode" "0: Disable,1: Enable"
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number of Receive FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Transmission Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Message Buffers Reception Priority" "0: Matching starts from RX FIFO and continues on..,1: Matching starts from message buffers and.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Generated,1: Stored"
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable for RX Message Buffers" "0: Disable,1: Enable"
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: CAN bit clock,1: External time tick"
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x24 13. "BTE,Bit Timing Expansion Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: Disable. FlexCAN operates using the non-ISO CAN..,1: Enable. FlexCAN operates using the ISO CAN FD.."
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x24 8.--9. "MBTSBASE,Message Buffer Timestamp Base" "0: TIMER,1: Lower 16 bits of high-resolution timer,2: Upper 16 bits of high-resolution timer,?"
|
|
bitfld.long 0x24 6.--7. "TSTAMPCAP,Timestamp Capture Point" "0: Disabled,1: End of the CAN frame,2: Start of the CAN frame,3: Start of frame for classical CAN frames; res bit.."
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority TX Message Buffer"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Invalid,1: Valid"
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Message Buffer" "0: Message buffer indicated by ESR2[LPTM] is not..,1: At least one message buffer is inactive."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,Cyclic Redundancy Check"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Message Buffer"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,RX FIFO Global Mask"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,RX FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,RX FIFO Information"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Disable,1: Enable"
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR[$1],Receive Individual Mask"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xAE0++0xF
|
|
line.long 0x0 "MECR,Memory Error Control"
|
|
bitfld.long 0x0 31. "ECRWRDIS,Error Configuration Register Write Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 19. "HANCEI_MSK,Host Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 18. "FANCEI_MSK,FlexCAN Access with Non-Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "CEI_MSK,Correctable Errors Interrupt Mask" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "HAERRIE,Host Access Error Injection Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 14. "FAERRIE,FlexCAN Access Error Injection Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "EXTERRIE,Extended Error Injection Enable" "0: Disable. Apply error injection only to the..,1: Enable. Apply error injection to the 64-bit word."
|
|
bitfld.long 0x0 9. "RERRDIS,Error Report Disable" "0: Enable,1: Disable"
|
|
newline
|
|
bitfld.long 0x0 8. "ECCDIS,Error Correction Disable" "0: Enable,1: Disable"
|
|
bitfld.long 0x0 7. "NCEFAFRZ,Non-Correctable Errors in FlexCAN Access Put Device in Freeze Mode" "0: Keep normal operation.,1: Put FlexCAN in Freeze mode (see section 'Freeze.."
|
|
line.long 0x4 "ERRIAR,Error Injection Address"
|
|
hexmask.long.word 0x4 2.--13. 1. "INJADDR_H,Error Injection Address High"
|
|
rbitfld.long 0x4 0.--1. "INJADDR_L,Error Injection Address Low" "0,1,2,3"
|
|
line.long 0x8 "ERRIDPR,Error Injection Data Pattern"
|
|
hexmask.long 0x8 0.--31. 1. "DFLIP,Data Flip Pattern"
|
|
line.long 0xC "ERRIPPR,Error Injection Parity Pattern"
|
|
hexmask.long.byte 0xC 24.--28. 1. "PFLIP3,Parity Flip Pattern for Byte 3 (Most Significant)"
|
|
hexmask.long.byte 0xC 16.--20. 1. "PFLIP2,Parity Flip Pattern for Byte 2"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--12. 1. "PFLIP1,Parity Flip Pattern for Byte 1"
|
|
hexmask.long.byte 0xC 0.--4. 1. "PFLIP0,Parity Flip Pattern for Byte 0 (Least Significant)"
|
|
rgroup.long 0xAF0++0xB
|
|
line.long 0x0 "RERRAR,Error Report Address"
|
|
bitfld.long 0x0 24. "NCE,Non-Correctable Error" "0: Reporting a correctable error,1: Reporting a non-correctable error"
|
|
bitfld.long 0x0 16.--18. "SAID,SAID" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.word 0x0 0.--13. 1. "ERRADDR,Address Where Error Detected"
|
|
line.long 0x4 "RERRDR,Error Report Data"
|
|
hexmask.long 0x4 0.--31. 1. "RDATA,Raw Data Word Read from Memory with Error"
|
|
line.long 0x8 "RERRSYNR,Error Report Syndrome"
|
|
bitfld.long 0x8 31. "BE3,Byte Enabled for Byte 3 (Most Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 24.--28. 1. "SYND3,Error Syndrome for Byte 3 (Most Significant)"
|
|
newline
|
|
bitfld.long 0x8 23. "BE2,Byte Enabled for Byte 2" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 16.--20. 1. "SYND2,Error Syndrome for Byte 2"
|
|
newline
|
|
bitfld.long 0x8 15. "BE1,Byte Enabled for Byte 1" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 8.--12. 1. "SYND1,Error Syndrome for Byte 1"
|
|
newline
|
|
bitfld.long 0x8 7. "BE0,Byte Enabled for Byte 0 (Least Significant)" "0: Byte was not read.,1: Byte was read."
|
|
hexmask.long.byte 0x8 0.--4. 1. "SYND0,Error Syndrome for Byte 0 (Least Significant)"
|
|
group.long 0xAFC++0x3
|
|
line.long 0x0 "ERRSR,Error Status"
|
|
eventfld.long 0x0 19. "HANCEIF,Host Access with Noncorrectable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 18. "FANCEIF,FlexCAN Access with Non-Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 16. "CEIF,Correctable Error Interrupt Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 3. "HANCEIOF,Host Access With Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
newline
|
|
eventfld.long 0x0 2. "FANCEIOF,FlexCAN Access with Non-Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
eventfld.long 0x0 0. "CEIOF,Correctable Error Interrupt Overrun Flag" "0: No errors detected,1: Error detected"
|
|
group.long 0xBF0++0x17
|
|
line.long 0x0 "EPRS,Enhanced CAN Bit Timing Prescalers"
|
|
hexmask.long.word 0x0 16.--25. 1. "EDPRESDIV,Extended Data Phase Prescaler Division Factor"
|
|
hexmask.long.word 0x0 0.--9. 1. "ENPRESDIV,Extended Nominal Prescaler Division Factor"
|
|
line.long 0x4 "ENCBT,Enhanced Nominal CAN Bit Timing"
|
|
hexmask.long.byte 0x4 22.--28. 1. "NRJW,Nominal Resynchronization Jump Width"
|
|
hexmask.long.byte 0x4 12.--18. 1. "NTSEG2,Nominal Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "NTSEG1,Nominal Time Segment 1"
|
|
line.long 0x8 "EDCBT,Enhanced Data Phase CAN Bit Timing"
|
|
hexmask.long.byte 0x8 22.--25. 1. "DRJW,Data Phase Resynchronization Jump Width"
|
|
hexmask.long.byte 0x8 12.--15. 1. "DTSEG2,Data Phase Time Segment 2"
|
|
newline
|
|
hexmask.long.byte 0x8 0.--4. 1. "DTSEG1,Data Phase Segment 1"
|
|
line.long 0xC "ETDC,Enhanced Transceiver Delay Compensation"
|
|
bitfld.long 0xC 31. "ETDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 30. "TDMDIS,Transceiver Delay Measurement Disable" "0: Enable,1: Disable"
|
|
newline
|
|
hexmask.long.byte 0xC 16.--22. 1. "ETDCOFF,Enhanced Transceiver Delay Compensation Offset"
|
|
eventfld.long 0xC 15. "ETDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
newline
|
|
hexmask.long.byte 0xC 0.--7. 1. "ETDCVAL,Enhanced Transceiver Delay Compensation Value"
|
|
line.long 0x10 "FDCTRL,CAN FD Control"
|
|
bitfld.long 0x10 31. "FDRATE,Bit Rate Switch Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
newline
|
|
bitfld.long 0x10 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: 8 bytes,1: 16 bytes,2: 32 bytes,3: 64 bytes"
|
|
bitfld.long 0x10 15. "TDCEN,Transceiver Delay Compensation Enable" "0: Disable,1: Enable"
|
|
newline
|
|
eventfld.long 0x10 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: In range,1: Out of range"
|
|
hexmask.long.byte 0x10 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x10 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x14 "FDCBT,CAN FD Bit Timing"
|
|
hexmask.long.word 0x14 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x14 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x14 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x14 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Message Buffer Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0xC30)++0x3
|
|
line.long 0x0 "HR_TIME_STAMP[$1],High-Resolution Timestamp"
|
|
hexmask.long 0x0 0.--31. 1. "TS,High-Resolution Timestamp"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "FLEXIO"
|
|
base ad:0x40324000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 24.--31. 1. "TRIGGER,Trigger Number"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PIN,Pin Number"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "TIMER,Timer Number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SHIFTER,Shifter Number"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CTRL,FLEXIO Control"
|
|
bitfld.long 0x0 30. "DBGE,Debug Enable" "0: FLEXIO is disabled in Debug modes.,1: FLEXIO is enabled in Debug modes."
|
|
bitfld.long 0x0 2. "FASTACC,Fast Access" "0: Configures for normal register accesses to FLEXIO,1: Configures for fast register accesses to FLEXIO"
|
|
newline
|
|
bitfld.long 0x0 1. "SWRST,Software Reset" "0: Software reset is disabled,1: Software reset is enabled. All FLEXIO registers.."
|
|
bitfld.long 0x0 0. "FLEXEN,FLEXIO Enable" "0: FLEXIO module is disabled.,1: FLEXIO module is enabled."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "PIN,Pin State"
|
|
hexmask.long.word 0x0 0.--15. 1. "PDI,Pin Data Input"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "SHIFTSTAT,Shifter Status"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SSF,Shifter Status Flag"
|
|
line.long 0x4 "SHIFTERR,Shifter Error"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SEF,Shifter Error Flags"
|
|
line.long 0x8 "TIMSTAT,Timer Status"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TSF,Timer Status Flags"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "SHIFTSIEN,Shifter Status Interrupt Enable"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SSIE,Shifter Status Interrupt Enable"
|
|
line.long 0x4 "SHIFTEIEN,Shifter Error Interrupt Enable"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SEIE,Shifter Error Interrupt Enable"
|
|
line.long 0x8 "TIMIEN,Timer Interrupt Enable"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TEIE,Timer Status Interrupt Enable"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "SHIFTSDEN,Shifter Status DMA Enable"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SSDE,Shifter Status DMA Enable"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "TIMERSDEN,Timer Status DMA Enable"
|
|
hexmask.long.byte 0x0 0.--7. 1. "TSDE,Timer Status DMA Enable"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "SHIFTSTATE,Shifter State"
|
|
bitfld.long 0x0 0.--2. "STATE,Current State Pointer" "0,1,2,3,4,5,6,7"
|
|
group.long 0x48++0x2F
|
|
line.long 0x0 "TRGSTAT,Trigger Status"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ETSF,External Trigger Status Flags"
|
|
line.long 0x4 "TRIGIEN,External Trigger Interrupt Enable"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TRIE,External Trigger Interrupt Enable"
|
|
line.long 0x8 "PINSTAT,Pin Status"
|
|
hexmask.long.word 0x8 0.--15. 1. "PSF,Pin Status Flags"
|
|
line.long 0xC "PINIEN,Pin Interrupt Enable"
|
|
hexmask.long.word 0xC 0.--15. 1. "PSIE,Pin Status Interrupt Enable"
|
|
line.long 0x10 "PINREN,Pin Rising Edge Enable"
|
|
hexmask.long.word 0x10 0.--15. 1. "PRE,Pin Rising Edge"
|
|
line.long 0x14 "PINFEN,Pin Falling Edge Enable"
|
|
hexmask.long.word 0x14 0.--15. 1. "PFE,Pin Falling Edge"
|
|
line.long 0x18 "PINOUTD,Pin Output Data"
|
|
hexmask.long.word 0x18 0.--15. 1. "OUTD,Output Data"
|
|
line.long 0x1C "PINOUTE,Pin Output Enable"
|
|
hexmask.long.word 0x1C 0.--15. 1. "OUTE,Output Enable"
|
|
line.long 0x20 "PINOUTDIS,Pin Output Disable"
|
|
hexmask.long.word 0x20 0.--15. 1. "OUTDIS,Output Disable"
|
|
line.long 0x24 "PINOUTCLR,Pin Output Clear"
|
|
hexmask.long.word 0x24 0.--15. 1. "OUTCLR,Output Clear"
|
|
line.long 0x28 "PINOUTSET,Pin Output Set"
|
|
hexmask.long.word 0x28 0.--15. 1. "OUTSET,Output Set"
|
|
line.long 0x2C "PINOUTTOG,Pin Output Toggle"
|
|
hexmask.long.word 0x2C 0.--15. 1. "OUTTOG,Output Toggle"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "SHIFTCTL[$1],Shifter Control N"
|
|
bitfld.long 0x0 24.--26. "TIMSEL,Timer Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of shift clock,1: Shift on negedge of shift clock"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open-drain or bidirectional output..,2: Shifter pin bidirectional output data,3: Shifter pin output"
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINSEL,Shifter Pin Select"
|
|
newline
|
|
bitfld.long 0x0 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
bitfld.long 0x0 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current shifter..,2: Transmit mode. Load SHIFTBUF contents into the..,?,4: Match Store mode. Shifter data is compared to..,5: Match Continuous mode. Shifter data is..,6: State mode. SHIFTBUF contents are used for..,7: Logic mode. SHIFTBUF contents are used for.."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "SHIFTCFG[$1],Shifter Configuration N"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PWIDTH,Parallel Width"
|
|
bitfld.long 0x0 12. "SSIZE,Shifter Size" "0: Shift register is 32-bit.,1: Shift register is 24-bit."
|
|
newline
|
|
bitfld.long 0x0 9. "LATST,Late Store" "0: Shift register stores the pre-shift register..,1: Shift register stores the post-shift register.."
|
|
bitfld.long 0x0 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output"
|
|
newline
|
|
bitfld.long 0x0 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,1: Stop bit disabled for transmitter/receiver/match..,2: Transmitter outputs stop bit value 0 on store.,3: Transmitter outputs stop bit value 1 on store."
|
|
bitfld.long 0x0 0.--1. "SSTART,Shifter Start Bit" "0: Start bit disabled for..,1: Start bit disabled for..,2: Transmitter outputs start bit value 0 before..,3: Transmitter outputs start bit value 1 before.."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "SHIFTBUF[$1],Shifter Buffer N"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUF,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x280)++0x3
|
|
line.long 0x0 "SHIFTBUFBIS[$1],Shifter Buffer N Bit Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBIS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x300)++0x3
|
|
line.long 0x0 "SHIFTBUFBYS[$1],Shifter Buffer N Byte Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBYS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x380)++0x3
|
|
line.long 0x0 "SHIFTBUFBBS[$1],Shifter Buffer N Bit Byte Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBBS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x400)++0x3
|
|
line.long 0x0 "TIMCTL[$1],Timer Control N"
|
|
hexmask.long.byte 0x0 24.--28. 1. "TRGSEL,Trigger Select"
|
|
bitfld.long 0x0 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low"
|
|
newline
|
|
bitfld.long 0x0 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected"
|
|
bitfld.long 0x0 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open-drain or bidirectional output..,2: Timer pin bidirectional output data,3: Timer pin output"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "PINSEL,Timer Pin Select"
|
|
bitfld.long 0x0 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
newline
|
|
bitfld.long 0x0 6. "PININS,Timer Pin Input Select" "0: Timer pin input and output are selected by PINSEL.,1: Timer pin input is selected by PINSEL+1. Timer.."
|
|
bitfld.long 0x0 5. "ONETIM,Timer One Time Operation" "0: The timer enable event is generated as normal.,1: The timer enable event is blocked unless timer.."
|
|
newline
|
|
bitfld.long 0x0 0.--2. "TIMOD,Timer Mode" "0: Timer disabled.,1: Dual 8-bit counters baud mode.,2: Dual 8-bit counters PWM high mode.,3: Single 16-bit counter mode.,4: Single 16-bit counter disable mode.,5: Dual 8-bit counters word mode.,6: Dual 8-bit counters PWM low mode.,7: Single 16-bit input capture mode."
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x480)++0x3
|
|
line.long 0x0 "TIMCFG[$1],Timer Configuration N"
|
|
bitfld.long 0x0 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,2: Timer output is logic one when enabled and on..,3: Timer output is logic zero when enabled and on.."
|
|
bitfld.long 0x0 20.--22. "TIMDEC,Timer Decrement" "0: Decrement counter on FLEXIO clock. Shift clock..,1: Decrement counter on trigger input (both edges).,2: Decrement counter on pin input (both edges).,3: Decrement counter on trigger input (both edges).,4: Decrement counter on FLEXIO clock divided by 16.,5: Decrement counter on FLEXIO clock divided by..,6: Decrement counter on pin input (rising edge).,7: Decrement counter on trigger input (rising.."
|
|
newline
|
|
bitfld.long 0x0 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,1: Timer reset on timer output high.,2: Timer reset on timer pin equal to timer output,3: Timer reset on timer trigger equal to timer output,4: Timer reset on timer pin rising edge,?,6: Timer reset on trigger rising edge,7: Timer reset on trigger rising or falling edge"
|
|
bitfld.long 0x0 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,2: Timer disabled on timer compare (upper 8-bits..,3: Timer disabled on timer compare (upper 8-bits..,4: Timer disabled on pin rising or falling edge,5: Timer disabled on pin rising or falling edge..,6: Timer disabled on trigger falling edge,?"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,2: Timer enabled on Trigger high,3: Timer enabled on Trigger high and Pin high,4: Timer enabled on Pin rising edge,5: Timer enabled on Pin rising edge and Trigger high,6: Timer enabled on Trigger rising edge,7: Timer enabled on Trigger rising or falling edge"
|
|
bitfld.long 0x0 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,2: Stop bit is enabled on timer disable,3: Stop bit is enabled on timer compare and timer.."
|
|
newline
|
|
bitfld.long 0x0 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x500)++0x3
|
|
line.long 0x0 "TIMCMP[$1],Timer Compare N"
|
|
hexmask.long.word 0x0 0.--15. 1. "CMP,Timer Compare Value"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x680)++0x3
|
|
line.long 0x0 "SHIFTBUFNBS[$1],Shifter Buffer N Nibble Byte Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFNBS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x700)++0x3
|
|
line.long 0x0 "SHIFTBUFHWS[$1],Shifter Buffer N Halfword Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFHWS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x780)++0x3
|
|
line.long 0x0 "SHIFTBUFNIS[$1],Shifter Buffer N Nibble Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFNIS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x800)++0x3
|
|
line.long 0x0 "SHIFTBUFOES[$1],Shifter Buffer N Odd Even Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFOES,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "SHIFTBUFEOS[$1],Shifter Buffer N Even Odd Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFEOS,Shift Buffer"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x900)++0x3
|
|
line.long 0x0 "SHIFTBUFHBS[$1],Shifter Buffer N Halfword Byte Swapped"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFHBS,Shift Buffer"
|
|
repeat.end
|
|
tree.end
|
|
tree "FXOSC"
|
|
base ad:0x402D4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CTRL,FXOSC Control Register"
|
|
bitfld.long 0x0 31. "OSC_BYP,Oscillator bypass" "0: Internal oscillator not bypassed,1: Internal oscillator bypassed"
|
|
bitfld.long 0x0 24. "COMP_EN,Comparator enable" "0: Comparator disabled,1: Comparator enabled"
|
|
hexmask.long.byte 0x0 16.--23. 1. "EOCV,End of count value"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "GM_SEL,Crystal overdrive protection"
|
|
bitfld.long 0x0 2. "ALC_D,Automatic level controller enable" "0: Enables automatic level controller,1: Disables automatic level controller"
|
|
bitfld.long 0x0 0. "OSCON,Crystal oscillator power-down control" "0: Disables FXOSC,1: Enables FXOSC"
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "STAT,Oscillator Status Register"
|
|
bitfld.long 0x0 31. "OSC_STAT,Crystal oscillator status" "0: Crystal oscillator is off or on but not stable.,1: Crystal oscillator is on and providing a stable.."
|
|
tree.end
|
|
tree "GDU_AE"
|
|
base ad:0x180
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "INTF,Interrupt Flag"
|
|
eventfld.byte 0x0 7. "HDHVDIF,HD High Voltage Detect Interrupt Flag" "0: HD voltage below the threshold,1: HD voltage above the threshold"
|
|
eventfld.byte 0x0 6. "DHSIF2,Desaturation High-Side 2 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 5. "DHSIF1,Desaturation High-Side 1 Interrupt Flag" "0: No error,1: Error"
|
|
newline
|
|
eventfld.byte 0x0 4. "DHSIF0,Desaturation High-Side 0 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 2. "DLSIF2,Desaturation Low-Side 2 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 1. "DLSIF1,Desaturation Low-Side 1 Interrupt Flag" "0: No error,1: Error"
|
|
newline
|
|
eventfld.byte 0x0 0. "DLSIF0,Desaturation Low-Side 0 Interrupt Flag" "0: No error,1: Error"
|
|
group.byte 0x2++0x0
|
|
line.byte 0x0 "INTEN,Interrupt Enable"
|
|
bitfld.byte 0x0 7. "HDHVDIE,HD High Voltage Detect Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 6. "DHSIE2,Desaturation High-Side Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 5. "DHSIE1,Desaturation High-Side Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.byte 0x0 4. "DHSIE0,Desaturation High-Side 0 Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 2. "DLSIE2,Desaturation Low-Side 2 Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 1. "DLSIE1,Desaturation Low-Side 1 Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.byte 0x0 0. "DLSIE0,Desaturation Low-Side 0 Interrupt Enable" "0: Disables,1: Enables"
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "STAT,Status"
|
|
bitfld.word 0x0 7. "HDHVDS,HD High Voltage Detect Status" "0: HD voltage below the threshold,1: HD voltage above the threshold"
|
|
bitfld.word 0x0 6. "DHSES2,Desaturation High-Side 2 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 5. "DHSES1,Desaturation High-Side 1 Error Status" "0: No error,1: Error"
|
|
newline
|
|
bitfld.word 0x0 4. "DHSES0,Desaturation High-Side 0 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 2. "DLSES2,Desaturation Low-Side 2 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 1. "DLSES1,Desaturation Low-Side 1 Error Status" "0: No error,1: Error"
|
|
newline
|
|
bitfld.word 0x0 0. "DLSES0,Desaturation Low-Side 0 Error Status" "0: No error,1: Error"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "CTL,Control"
|
|
bitfld.word 0x0 7. "CFGEN,Configuration Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 6. "SSTEN,Safe State Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 5. "RWEN,Register Write Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.word 0x0 4. "IRTSW,Iref Trimming by Software" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 3. "DMEN,Delay Measurement Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 2. "BOOSTEN,Boost Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.word 0x0 1. "CPEN,Charge Pump Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 0. "GDUEN,Gate Driver Unit Enable" "0: Disables,1: Enables"
|
|
group.byte 0x8++0x0
|
|
line.byte 0x0 "CFG,Configuration"
|
|
bitfld.byte 0x0 7. "SYNCEN,Synchronization Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 1. "HDHSDIV,HD and High-Side Divider" "0: Low,1: High"
|
|
bitfld.byte 0x0 0. "HDHVDCFG,HD High Voltage Detect" "0: Low voltage,1: High voltage"
|
|
group.byte 0xA++0x0
|
|
line.byte 0x0 "EACFG,Error Reaction"
|
|
bitfld.byte 0x0 2. "DSA,Desaturation Action" "0: Turn off only the desaturated FET.,1: Turn off all FETs"
|
|
bitfld.byte 0x0 1. "OCA,Overcurrent Action" "0: Low-side gate drivers on,1: Low-side gate drivers off"
|
|
bitfld.byte 0x0 0. "HVDA,High Voltage Detection Action" "0: Turn on all low-side gate drivers,1: Turn off all low-side gate drivers"
|
|
group.word 0xC++0x3
|
|
line.word 0x0 "BOOSTCFG,Boost"
|
|
bitfld.word 0x0 8.--10. "BOCL,Boost Current Limit" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 2.--4. "BOCD,Boost Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 0.--1. "BODC,Boost Duty Cycle" "0: 50%,1: 25%,2: 75%,?"
|
|
line.word 0x2 "BTCFG,Blanking Time"
|
|
hexmask.word 0x2 0.--8. 1. "BT,Blanking Time Adjustment"
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "HSSRON,High-Side Slew Rate On"
|
|
hexmask.long.byte 0x0 24.--30. 1. "HSTONT_P2,High-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0x0 16.--22. 1. "HSTONT_P1,High-Side Turn On Time Point 1"
|
|
hexmask.long.byte 0x0 10.--14. 1. "HSTONC_P3,High-Side Turn On Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "HSTONC_P2,High-Side Turn On Current Time Point 2"
|
|
hexmask.long.byte 0x0 0.--4. 1. "HSTONC_P1,High-Side Turn On Current Time Point 1"
|
|
line.long 0x4 "HSSROFF,High-Side Slew Rate Off"
|
|
hexmask.long.byte 0x4 24.--30. 1. "HSTOFFT_P2,High-Side Turn Off Time Point 2"
|
|
hexmask.long.byte 0x4 16.--22. 1. "HSTOFFT_P1,High-Side Turn Off Time Point 1"
|
|
hexmask.long.byte 0x4 10.--14. 1. "HSTOFFC_P3,High-Side Turn Off Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x4 5.--9. 1. "HSTOFFC_P2,High-Side Turn Off Current Time Point 2"
|
|
hexmask.long.byte 0x4 0.--4. 1. "HSTOFFC_P1,High-Side Turn Off Current Time Point 1"
|
|
line.long 0x8 "LSSRON,Low-Side Slew Rate On"
|
|
hexmask.long.byte 0x8 24.--30. 1. "LSTONT_P2,Low-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSTONT_P1,Low-Side Turn On Time Point 1"
|
|
hexmask.long.byte 0x8 10.--14. 1. "LSTONC_P3,Low-Side Turn On Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x8 5.--9. 1. "LSTONC_P2,Low-Side Turn On Current Time Point 2"
|
|
hexmask.long.byte 0x8 0.--4. 1. "LSTONC_P1,Low-Side Turn On Current Time Point 1"
|
|
line.long 0xC "LSSROFF,Low-Side Slew Rate Off"
|
|
hexmask.long.byte 0xC 24.--30. 1. "LSTOFFT_P2,Low-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0xC 16.--22. 1. "LSTOFFT_P1,Low-Side Turn Off Time Point 1"
|
|
hexmask.long.byte 0xC 10.--14. 1. "LSTOFFC_P3,Low-Side Turn Off Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0xC 5.--9. 1. "LSTOFFC_P2,Low-Side Turn Off Current Time Point 2"
|
|
hexmask.long.byte 0xC 0.--4. 1. "LSTOFFC_P1,Low-Side Turn Off Current Time Point 1"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x0 "OFFSDCFG,Off-State Diagnostic"
|
|
bitfld.byte 0x0 6. "OSDPU2,Off-State Diagnostic HS2 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
bitfld.byte 0x0 5. "OSDPU1,Off-State Diagnostic HS1 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
bitfld.byte 0x0 4. "OSDPU0,Off-State Diagnostic HS0 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
newline
|
|
bitfld.byte 0x0 2. "OSDPD2,Off-State Diagnostic HS2 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
bitfld.byte 0x0 1. "OSDPD1,Off-State Diagnostic HS1 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
bitfld.byte 0x0 0. "OSDPD0,Off-State Diagnostic HS0 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "DSCFG,Desaturation Level"
|
|
bitfld.word 0x0 12.--13. "DSFHS,Desaturation Filter High-Side" "0: 200 ns,1: 600 ns,2: 1000 ns,3: 1400 ns"
|
|
bitfld.word 0x0 8.--9. "DSFLS,Desaturation Filter Low-Side" "0: 200 ns,1: 600 ns,2: 1000 ns,3: 1400 ns"
|
|
bitfld.word 0x0 4.--6. "DSLHS,Desaturation Level High-Side" "0: 0.15 V,1: 0.25 V,2: 0.35 V,3: 0.45 V,4: 0.7 V,5: 0.95 V,6: 1.2 V,7: 1.45 V"
|
|
newline
|
|
bitfld.word 0x0 0.--2. "DSLLS,Desaturation Level Low-Side" "0: 0.15 V,1: 0.25 V,2: 0.35 V,3: 0.45 V,4: 0.7 V,5: 0.95 V,6: 1.2 V,7: 1.45 V"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "CPCFG,Charge Pump"
|
|
bitfld.long 0x0 24.--25. "CPCDT,Charge Pump Charge Discharge Timing" "0: 250 ns,1: 500 ns,2: 750 ns,3: 1 us"
|
|
hexmask.long.byte 0x0 16.--21. 1. "CPT,Charge Pump VCP On switch Timing"
|
|
hexmask.long.word 0x0 0.--9. 1. "CPCD,Charge Pump Clock Divider"
|
|
rgroup.word 0x2C++0x1
|
|
line.word 0x0 "DLYMR,Delay Measurement Result"
|
|
bitfld.word 0x0 15. "DATAVAL,Data Valid" "0,1"
|
|
hexmask.word.byte 0x0 0.--6. 1. "DELAY,Delay"
|
|
group.word 0x2E++0x1
|
|
line.word 0x0 "DLYMCFG,Delay Measurement"
|
|
bitfld.word 0x0 3. "EDGESEL,Edge Selection" "0: negedge,1: posedge"
|
|
bitfld.word 0x0 0.--2. "CHSEL,Channel Selection" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "SUPCFG,Startup Configuration"
|
|
bitfld.byte 0x0 0. "SUP,Startup" "0: On,1: Off"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "IRT,Iref Trimming"
|
|
bitfld.long 0x0 19.--21. "IRT1P2,Iref Trimming HG2" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 16.--18. "IRT0P2,Iref Trimming LG2" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 11.--13. "IRT1P1,Iref Trimming HG1" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "IRT0P1,Iref Trimming LG1" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 3.--5. "IRT1P0,Iref Trimming HG0" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 0.--2. "IRT0P0,Iref Trimming LG0" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
tree.end
|
|
tree "HVI_AE"
|
|
base ad:0x200
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "INTF,Interrupt Flags"
|
|
eventfld.long 0x0 17. "DINIF1,Digital Input Interrupt Flag 1" "0: HVI n did not detect an event on its digital..,1: HVI n detected an event on its digital input."
|
|
eventfld.long 0x0 16. "DINIF0,Digital Input Interrupt Flag 0" "0: HVI n did not detect an event on its digital..,1: HVI n detected an event on its digital input."
|
|
newline
|
|
eventfld.long 0x0 8. "HDIF0,High Detect Interrupt Flag 0" "0: VM n did not detect a high voltage since the..,1: VM n detected a high voltage since the last.."
|
|
eventfld.long 0x0 0. "LDIF0,Low Detect Interrupt Flag 0" "0: VM n did not detect a low voltage since the last..,1: VM n detected a low voltage since the last.."
|
|
line.long 0x4 "INTEN,Interrupt Enables"
|
|
bitfld.long 0x4 17. "DINIE1,Digital Input Interrupt Enable 1" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 16. "DINIE0,Digital Input Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 8. "HDIE0,High Detect Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 0. "LDIE0,Low Detect Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STAT,Status"
|
|
bitfld.long 0x0 17. "DINS1,Digital Input Status 1" "0: The digital input is in the inactive state with..,1: The digital input is in the active state with.."
|
|
bitfld.long 0x0 16. "DINS0,Digital Input Status 0" "0: The digital input is in the inactive state with..,1: The digital input is in the active state with.."
|
|
newline
|
|
bitfld.long 0x0 8. "HDS0,High Detect Status 0" "0: The high voltage monitor does not detect a..,1: The high voltage monitor does detect a voltage.."
|
|
bitfld.long 0x0 0. "LDS0,Low Detect Status 0" "0: The low voltage monitor does not detect a..,1: The low voltage monitor does detect a voltage.."
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "GCTRL,Global Control"
|
|
bitfld.long 0x0 3.--4. "AINSEL,Analog Input Selection" "0: The analog output is high ohmic.,1: The buffered input is the analog output signal.,2: The down-divided buffered high voltage input is..,3: The unbuffered input is the analog output signal."
|
|
bitfld.long 0x0 0.--2. "AINEN,Analog Input Enable" "0: HVI0 is driving the analog output.,1: HVI1 is driving the analog output.,?,?,?,?,?,?"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "UCFG0,Unit Configuration 0"
|
|
bitfld.word 0x0 9. "DINPO,Digital Input Polarity" "0: An event is created when the digital input is..,1: An event is created when the digital input is.."
|
|
bitfld.word 0x0 8. "DINEN,Digital Input Enable" "0: Disable the digital input,1: Enable the digital input"
|
|
newline
|
|
bitfld.word 0x0 3.--4. "DIVSEL,Divider Select" "0: Divide input voltage by 2,1: Divide input voltage by 6,2: Divide input voltage by 11,3: Divide input voltage by 16"
|
|
bitfld.word 0x0 2. "PUEN,Pull Up Enable" "0: Disable pull up,1: Enable pull up"
|
|
newline
|
|
bitfld.word 0x0 1. "PDEN,Pull Down Enable" "0: Disable pull down. Voltage Division = 1,1: Enable pull down"
|
|
group.byte 0x16++0x1
|
|
line.byte 0x0 "UCTRL0,Unit Control 0"
|
|
bitfld.byte 0x0 1. "CFGEN,Configuration Enable" "0: instance 0 is out of configuration mode,1: instance 0 is in configuration mode"
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: Disabled. All features of HVI0 are turned-off.,1: Enabled. All features of HVI0 are used as.."
|
|
line.byte 0x1 "VMCFG0,Voltage Monitor Configuration 0"
|
|
bitfld.byte 0x1 7. "VMINSEL,Voltage Monitor Input Select" "0: The high voltage input divided down by the..,1: The sense voltage is monitored."
|
|
bitfld.byte 0x1 5. "HDREFSEL,High Detect Reference Select" "0: Select the lowest reference voltage level (see..,1: Select the highest reference voltage level (see.."
|
|
newline
|
|
bitfld.byte 0x1 2.--3. "LDREFSEL,Low Detect Reference Voltage Select" "0: select the lowest reference voltage level (see..,1: select the second lowest reference voltage level..,2: select the second highest reference voltage..,3: select the highest reference voltage level (see.."
|
|
bitfld.byte 0x1 1. "HDEN,High Detect Enable" "0: Turn off the high voltage detect comparator,1: Enable the high voltage detect comparator"
|
|
newline
|
|
bitfld.byte 0x1 0. "LDEN,Low Detect Enable" "0: Turn off the low voltage detection,1: Enable the low voltage detection"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "UCFG1,Unit Configuration 1"
|
|
bitfld.word 0x0 9. "DINPO,Digital Input Polarity" "0: An event is created when the digital input is..,1: An event is created when the digital input is.."
|
|
bitfld.word 0x0 8. "DINEN,Digital Input Enable" "0: Disable the digital input,1: Enable the digital input"
|
|
newline
|
|
bitfld.word 0x0 3.--4. "DIVSEL,Divider Select" "0: Divide input voltage by 2,1: Divide input voltage by 6,2: Divide input voltage by 11,3: Divide input voltage by 16"
|
|
bitfld.word 0x0 2. "PUEN,Pull Up Enable" "0: Disable pull up,1: Enable pull up"
|
|
newline
|
|
bitfld.word 0x0 1. "PDEN,Pull Down Enable" "0: Disable pull down. Voltage Division = 1,1: Enable pull down"
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x0 "UCTRL1,Unit Control 1"
|
|
bitfld.byte 0x0 1. "CFGEN,Configuration Enable" "0: instance 1 is out of configuration mode,1: instance 1 is in configuration mode"
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: Disabled. All features of HVI1 are turned-off.,1: Enabled. All features of HVI1 are used as.."
|
|
tree.end
|
|
tree "INTM"
|
|
base ad:0x4027C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "INTM_MM,Monitor Mode"
|
|
bitfld.long 0x0 0. "MM,Monitor Mode" "0: Disable,1: Enable"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "INTM_IACK,Interrupt Acknowledge"
|
|
hexmask.long.word 0x0 0.--9. 1. "IRQ,Interrupt Request"
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x4027C008 ad:0x4027C018 ad:0x4027C028 ad:0x4027C038)
|
|
tree "mon[$1]"
|
|
base $2
|
|
group.long ($2)++0xB
|
|
line.long 0x0 "INTM_IRQSEL,Interrupt Request Select for Monitor mon_index"
|
|
hexmask.long.word 0x0 0.--9. 1. "IRQ,Interrupt Request"
|
|
line.long 0x4 "INTM_LATENCY,Interrupt Latency for Monitor mon_index"
|
|
hexmask.long.tbyte 0x4 0.--23. 1. "LAT,Latency"
|
|
line.long 0x8 "INTM_TIMER,Timer for Monitor mon_index"
|
|
hexmask.long.tbyte 0x8 0.--23. 1. "TIMER,Timer"
|
|
rgroup.long ($2+0xC)++0x3
|
|
line.long 0x0 "INTM_STATUS,Status for Monitor mon_index"
|
|
bitfld.long 0x0 0. "STATUS,Monitor status" "0: Did not exceed,1: Exceeded"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "JDC"
|
|
base ad:0x40394000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 16. "JIN_IEN,JIN Interrupt Enable" "0: Setting MSR[JIN_INT] bit does not assert the JIN..,1: Setting MSR[JIN_INT] bit asserts the JIN interrupt"
|
|
bitfld.long 0x0 0. "JOUT_IEN,JOUT Interrupt Enable" "0: Setting MSR[JOUT_INT] bit does not assert the..,1: Setting MSR[JOUT_INT] bit asserts the JOUT.."
|
|
line.long 0x4 "MSR,Module Status Register"
|
|
rbitfld.long 0x4 18. "JIN_RDY,JIN Ready (read only)" "0: Cleared upon software read of JIN_IPS contents..,1: Set when new data is written to the JIN_IPS.."
|
|
eventfld.long 0x4 16. "JIN_INT,JIN Interrupt" "0: Cleared by writing logic 1,1: Set when new data is written to the JIN_IPS.."
|
|
newline
|
|
rbitfld.long 0x4 2. "JOUT_RDY,JOUT Ready (read only)" "0: Cleared upon tool read of JOUT register via JTAG..,1: Set when new data is written to the JOUT_IPS.."
|
|
eventfld.long 0x4 0. "JOUT_INT,JOUT Interrupt" "0: Cleared by writing logic 1,1: Set when JOUT_RDY bit is cleared by tool reading.."
|
|
line.long 0x8 "JOUT_IPS,JTAG Output Data Register"
|
|
hexmask.long 0x8 0.--31. 1. "Data,JOUT_IPS Data"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "JIN_IPS,JTAG Input Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "Data,JIN_IPS data"
|
|
tree.end
|
|
tree "LCU"
|
|
base ad:0x0
|
|
tree "LCU_0"
|
|
base ad:0x40098000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x40098000 ad:0x40098040 ad:0x40098080)
|
|
tree "LC[$1]"
|
|
base $2
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "LC_LUTCTRL$1,LC n Output m LUT Control"
|
|
hexmask.long.word 0x0 0.--15. 1. "LUTCTRL,LUT Control"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "LC_FILT$1,LC n Output m Filter"
|
|
hexmask.long.word 0x0 16.--31. 1. "LUT_RISE_FILT,Rise Filter"
|
|
hexmask.long.word 0x0 0.--15. 1. "LUT_FALL_FILT,Fall Filter"
|
|
repeat.end
|
|
group.long ($2+0x20)++0x17
|
|
line.long 0x0 "LC_INTDMAEN,LC n Interrupt and DMA Enable"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORCE_DMA_EN,Force DMA Enable"
|
|
hexmask.long.byte 0x0 16.--19. 1. "FORCE_INT_EN,Force Interrupt Enable"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "LUT_DMA_EN,LUT DMA Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LUT_INT_EN,LUT Interrupt Enable"
|
|
line.long 0x4 "LC_STS,LC n Status"
|
|
hexmask.long.byte 0x4 8.--11. 1. "FORCESTS,Force Event"
|
|
hexmask.long.byte 0x4 0.--3. 1. "LUT_STS,LUT Event"
|
|
line.long 0x8 "LC_OUTPOL,LC n Output Polarity Control"
|
|
hexmask.long.byte 0x8 0.--3. 1. "OUTPOL,Output Polarity"
|
|
line.long 0xC "LC_FFILT,LC n Force Filter"
|
|
hexmask.long.byte 0xC 28.--31. 1. "COMB_FORCE,Combined Sensed Force Input"
|
|
bitfld.long 0xC 24.--26. "COMB_EN,Combinational Force Path (CFP) Enable" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 16.--18. "FORCE_POL,Force Input Polarity" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 0.--7. 1. "FORCE_FILT,Force Filter"
|
|
line.long 0x10 "LC_FCTRL,LC n Force Control"
|
|
bitfld.long 0x10 30.--31. "SYNC_SEL3,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
bitfld.long 0x10 28.--29. "FORCE_MODE3,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
newline
|
|
hexmask.long.byte 0x10 24.--27. 1. "FORCE_SENSE3,Force Input Sensitivity"
|
|
bitfld.long 0x10 22.--23. "SYNC_SEL2,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "FORCE_MODE2,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
hexmask.long.byte 0x10 16.--19. 1. "FORCE_SENSE2,Force Input Sensitivity"
|
|
newline
|
|
bitfld.long 0x10 14.--15. "SYNC_SEL1,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
bitfld.long 0x10 12.--13. "FORCE_MODE1,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--11. 1. "FORCE_SENSE1,Force Input Sensitivity"
|
|
bitfld.long 0x10 6.--7. "SYNC_SEL0,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "FORCE_MODE0,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
hexmask.long.byte 0x10 0.--3. 1. "FORCE_SENSE0,Force Input Sensitivity"
|
|
line.long 0x14 "LC_SCTRL,LC n Sync Control"
|
|
bitfld.long 0x14 8. "SW_SYNC_SEL,Software Sync Select" "0: Sync input 0,1: Sync input 1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SW_MODE,Software Sync Mode"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40098000
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "MUXSEL[$1],Mux Select"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MUXSEL,Mux Select"
|
|
repeat.end
|
|
group.long 0x280++0xF
|
|
line.long 0x0 "CFG,Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "NUM_LOGIC_CELLS,LCs"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NUM_FORCES,Force Inputs"
|
|
hexmask.long.byte 0x0 8.--15. 1. "NUM_SYNCS,Sync Inputs"
|
|
rbitfld.long 0x0 7. "INCL_MUXES,Input Muxing" "0: Not supported,1: Supported"
|
|
newline
|
|
bitfld.long 0x0 0. "WP,Write Protect" "0: No effect,1: Turn on write protection"
|
|
line.long 0x4 "SWEN,Software Override Enable"
|
|
hexmask.long.word 0x4 0.--11. 1. "SWEN,Software Override Enable"
|
|
line.long 0x8 "SWVALUE,Software Override Value"
|
|
hexmask.long.word 0x8 0.--11. 1. "SWVALUE,Software Override Value"
|
|
line.long 0xC "OUTEN,Output Enable"
|
|
hexmask.long.word 0xC 0.--11. 1. "OUTEN,Output Enables"
|
|
rgroup.long 0x290++0xF
|
|
line.long 0x0 "LCIN,Logic Inputs"
|
|
hexmask.long.word 0x0 0.--11. 1. "LC_INPUTS,Logic Inputs"
|
|
line.long 0x4 "SWOUT,Overridden Inputs"
|
|
hexmask.long.word 0x4 0.--11. 1. "SWOUT,Overridden Inputs"
|
|
line.long 0x8 "LCOUT,Logic Outputs"
|
|
hexmask.long.word 0x8 0.--11. 1. "LCOUT,Logic Outputs"
|
|
line.long 0xC "FORCEOUT,Forced Outputs"
|
|
hexmask.long.word 0xC 0.--11. 1. "FORCEOUT,Forced Outputs"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x0 "FORCESTS,Force Status"
|
|
hexmask.long.word 0x0 0.--11. 1. "FORCESTS,Force Status"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x0 "DBGEN,Debug Mode Enable"
|
|
hexmask.long.word 0x0 0.--11. 1. "DBGEN,Debug Mode Enable"
|
|
tree.end
|
|
tree "LCU_1"
|
|
base ad:0x4009C000
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x4009C000 ad:0x4009C040 ad:0x4009C080)
|
|
tree "LC[$1]"
|
|
base $2
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "LC_LUTCTRL$1,LC n Output m LUT Control"
|
|
hexmask.long.word 0x0 0.--15. 1. "LUTCTRL,LUT Control"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x10)++0x3
|
|
line.long 0x0 "LC_FILT$1,LC n Output m Filter"
|
|
hexmask.long.word 0x0 16.--31. 1. "LUT_RISE_FILT,Rise Filter"
|
|
hexmask.long.word 0x0 0.--15. 1. "LUT_FALL_FILT,Fall Filter"
|
|
repeat.end
|
|
group.long ($2+0x20)++0x17
|
|
line.long 0x0 "LC_INTDMAEN,LC n Interrupt and DMA Enable"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FORCE_DMA_EN,Force DMA Enable"
|
|
hexmask.long.byte 0x0 16.--19. 1. "FORCE_INT_EN,Force Interrupt Enable"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "LUT_DMA_EN,LUT DMA Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "LUT_INT_EN,LUT Interrupt Enable"
|
|
line.long 0x4 "LC_STS,LC n Status"
|
|
hexmask.long.byte 0x4 8.--11. 1. "FORCESTS,Force Event"
|
|
hexmask.long.byte 0x4 0.--3. 1. "LUT_STS,LUT Event"
|
|
line.long 0x8 "LC_OUTPOL,LC n Output Polarity Control"
|
|
hexmask.long.byte 0x8 0.--3. 1. "OUTPOL,Output Polarity"
|
|
line.long 0xC "LC_FFILT,LC n Force Filter"
|
|
hexmask.long.byte 0xC 28.--31. 1. "COMB_FORCE,Combined Sensed Force Input"
|
|
bitfld.long 0xC 24.--26. "COMB_EN,Combinational Force Path (CFP) Enable" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 16.--18. "FORCE_POL,Force Input Polarity" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0xC 0.--7. 1. "FORCE_FILT,Force Filter"
|
|
line.long 0x10 "LC_FCTRL,LC n Force Control"
|
|
bitfld.long 0x10 30.--31. "SYNC_SEL3,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
bitfld.long 0x10 28.--29. "FORCE_MODE3,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
newline
|
|
hexmask.long.byte 0x10 24.--27. 1. "FORCE_SENSE3,Force Input Sensitivity"
|
|
bitfld.long 0x10 22.--23. "SYNC_SEL2,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
newline
|
|
bitfld.long 0x10 20.--21. "FORCE_MODE2,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
hexmask.long.byte 0x10 16.--19. 1. "FORCE_SENSE2,Force Input Sensitivity"
|
|
newline
|
|
bitfld.long 0x10 14.--15. "SYNC_SEL1,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
bitfld.long 0x10 12.--13. "FORCE_MODE1,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--11. 1. "FORCE_SENSE1,Force Input Sensitivity"
|
|
bitfld.long 0x10 6.--7. "SYNC_SEL0,Sync Select" "0: Sync input 0,1: Sync input 1,?,?"
|
|
newline
|
|
bitfld.long 0x10 4.--5. "FORCE_MODE0,Force Clearing Mode" "0: Deassertion,1: Rising sync after deassertion,2: Writing 1 after deassertion,3: Rising sync after writing 1 and deassertion"
|
|
hexmask.long.byte 0x10 0.--3. 1. "FORCE_SENSE0,Force Input Sensitivity"
|
|
line.long 0x14 "LC_SCTRL,LC n Sync Control"
|
|
bitfld.long 0x14 8. "SW_SYNC_SEL,Software Sync Select" "0: Sync input 0,1: Sync input 1"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SW_MODE,Software Sync Mode"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x4009C000
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "MUXSEL[$1],Mux Select"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MUXSEL,Mux Select"
|
|
repeat.end
|
|
group.long 0x280++0xF
|
|
line.long 0x0 "CFG,Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "NUM_LOGIC_CELLS,LCs"
|
|
hexmask.long.byte 0x0 16.--23. 1. "NUM_FORCES,Force Inputs"
|
|
hexmask.long.byte 0x0 8.--15. 1. "NUM_SYNCS,Sync Inputs"
|
|
rbitfld.long 0x0 7. "INCL_MUXES,Input Muxing" "0: Not supported,1: Supported"
|
|
newline
|
|
bitfld.long 0x0 0. "WP,Write Protect" "0: No effect,1: Turn on write protection"
|
|
line.long 0x4 "SWEN,Software Override Enable"
|
|
hexmask.long.word 0x4 0.--11. 1. "SWEN,Software Override Enable"
|
|
line.long 0x8 "SWVALUE,Software Override Value"
|
|
hexmask.long.word 0x8 0.--11. 1. "SWVALUE,Software Override Value"
|
|
line.long 0xC "OUTEN,Output Enable"
|
|
hexmask.long.word 0xC 0.--11. 1. "OUTEN,Output Enables"
|
|
rgroup.long 0x290++0xF
|
|
line.long 0x0 "LCIN,Logic Inputs"
|
|
hexmask.long.word 0x0 0.--11. 1. "LC_INPUTS,Logic Inputs"
|
|
line.long 0x4 "SWOUT,Overridden Inputs"
|
|
hexmask.long.word 0x4 0.--11. 1. "SWOUT,Overridden Inputs"
|
|
line.long 0x8 "LCOUT,Logic Outputs"
|
|
hexmask.long.word 0x8 0.--11. 1. "LCOUT,Logic Outputs"
|
|
line.long 0xC "FORCEOUT,Forced Outputs"
|
|
hexmask.long.word 0xC 0.--11. 1. "FORCEOUT,Forced Outputs"
|
|
group.long 0x2A0++0x3
|
|
line.long 0x0 "FORCESTS,Force Status"
|
|
hexmask.long.word 0x0 0.--11. 1. "FORCESTS,Force Status"
|
|
group.long 0x2A8++0x3
|
|
line.long 0x0 "DBGEN,Debug Mode Enable"
|
|
hexmask.long.word 0x0 0.--11. 1. "DBGEN,Debug Mode Enable"
|
|
tree.end
|
|
tree.end
|
|
tree "LPCMP"
|
|
base ad:0x40370000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DAC_RES,DAC Resolution"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "CCR0,Comparator Control Register 0"
|
|
bitfld.long 0x0 2. "LINKEN,CMP-to-DAC Link Enable" "0: Disable the CMP-to-DAC link: enabling or..,1: Enable the CMP-to-DAC link: the DAC.."
|
|
bitfld.long 0x0 1. "CMP_STOP_EN,Comparator STANDBY Mode Enable" "0: Disable the analog comparator regardless of..,1: Allows CMP_EN to enable the analog comparator."
|
|
newline
|
|
bitfld.long 0x0 0. "CMP_EN,Comparator Enable" "0: Disables (The analog logic remains off and..,1: Enables"
|
|
line.long 0x4 "CCR1,Comparator Control Register 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FILT_PER,Filter Sample Period"
|
|
bitfld.long 0x4 16.--18. "FILT_CNT,Filter Sample Count" "0: Filter is bypassed: COUT = COUTA,1: 1 consecutive sample (Comparator output is..,2: 2 consecutive samples,3: 3 consecutive samples,4: 4 consecutive samples,5: 5 consecutive samples,6: 6 consecutive samples,7: 7 consecutive samples"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "EVT_SEL,CMPO Event Select" "0: Both edges,1: Falling edge,2: Both edges,3: Both edges"
|
|
bitfld.long 0x4 9. "WINDOW_CLS,CMPO Event Window Close" "0: CMPO event cannot close the window,1: CMPO event can close the window"
|
|
newline
|
|
bitfld.long 0x4 8. "WINDOW_INV,WINDOW/SAMPLE Signal Invert" "0: Do not invert,1: Invert"
|
|
bitfld.long 0x4 7. "COUTA_OW,COUTA Output Level for Closed Window" "0: COUTA is 0,1: COUTA is 1"
|
|
newline
|
|
bitfld.long 0x4 6. "COUTA_OWEN,COUTA_OW Enable" "0: COUTA holds the last sampled value.,1: Enables the COUTA signal value to be defined by.."
|
|
bitfld.long 0x4 5. "COUT_PEN,Comparator Output Pin Enable" "0: Not available,1: Available"
|
|
newline
|
|
bitfld.long 0x4 4. "COUT_SEL,Comparator Output Select" "0: Use COUT (filtered),1: Use COUTA (unfiltered)"
|
|
bitfld.long 0x4 3. "COUT_INV,Comparator Invert" "0: Do not invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x4 2. "DMA_EN,DMA Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x4 1. "SAMPLE_EN,Sampling Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x4 0. "WINDOW_EN,Windowing Enable" "0: Disables,1: Enables"
|
|
line.long 0x8 "CCR2,Comparator Control Register 2"
|
|
bitfld.long 0x8 28.--29. "INMSEL,Input Minus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?"
|
|
bitfld.long 0x8 24.--25. "INPSEL,Input Plus Select" "0: IN0: from the 8-bit DAC output,1: IN1: from the analog 8-1 mux,?,?"
|
|
newline
|
|
bitfld.long 0x8 20.--22. "MSEL,Minus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7"
|
|
bitfld.long 0x8 16.--18. "PSEL,Plus Input MUX Select" "0: Input channel 0,1: Input channel 1,2: Input channel 2,3: Input channel 3,4: Input channel 4,5: Input channel 5,6: Input channel 6,7: Input channel 7"
|
|
newline
|
|
bitfld.long 0x8 4.--5. "HYSTCTR,Comparator Hysteresis Control" "0: Level 0,1: Level 1,2: Level 2,3: Level 3"
|
|
bitfld.long 0x8 2. "OFFSET,Comparator Offset Control" "0: Level 0: The hysteresis selected by HYSTCTR is..,1: Level 1: Hysteresis does not apply when INP.."
|
|
newline
|
|
bitfld.long 0x8 0. "CMP_HPMD,CMP High Power Mode Select" "0: Low power (speed) comparison mode,1: High power (speed) comparison mode"
|
|
group.long 0x18++0x1B
|
|
line.long 0x0 "DCR,DAC Control"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DAC_DATA,DAC Output Voltage Select"
|
|
bitfld.long 0x0 8. "VRSEL,DAC Reference High Voltage Source Select" "0: vrefh0,1: vrefh1"
|
|
newline
|
|
bitfld.long 0x0 0. "DAC_EN,DAC Enable" "0: Disables,1: Enables"
|
|
line.long 0x4 "IER,Interrupt Enable"
|
|
bitfld.long 0x4 2. "RRF_IE,Round-Robin Flag Interrupt Enable" "0: Disables the round-robin flag interrupt.,1: Enables the round-robin flag interrupt when the.."
|
|
bitfld.long 0x4 1. "CFF_IE,Comparator Flag Falling Interrupt Enable" "0: Disables the comparator flag falling interrupt.,1: Enables the comparator flag falling interrupt.."
|
|
newline
|
|
bitfld.long 0x4 0. "CFR_IE,Comparator Flag Rising Interrupt Enable" "0: Disables the comparator flag rising interrupt.,1: Enables the comparator flag rising interrupt.."
|
|
line.long 0x8 "CSR,Comparator Status"
|
|
rbitfld.long 0x8 8. "COUT,Analog Comparator Output" "0,1"
|
|
eventfld.long 0x8 2. "RRF,Round-Robin Flag" "0: Not detected,1: Detected"
|
|
newline
|
|
eventfld.long 0x8 1. "CFF,Analog Comparator Flag Falling" "0: Not detected,1: Detected"
|
|
eventfld.long 0x8 0. "CFR,Analog Comparator Flag Rising" "0: Not detected,1: Detected"
|
|
line.long 0xC "RRCR0,Round Robin Control Register 0"
|
|
hexmask.long.byte 0xC 16.--21. 1. "RR_INITMOD,Initialization Delay Modulus"
|
|
bitfld.long 0xC 8.--9. "RR_NSAM,Number of Sample Clocks" "0: 0 clock,1: 1 clock,2: 2 clocks,3: 3 clocks"
|
|
newline
|
|
bitfld.long 0xC 0. "RR_EN,Round-Robin Enable" "0: Disables,1: Enables"
|
|
line.long 0x10 "RRCR1,Round Robin Control Register 1"
|
|
bitfld.long 0x10 20.--22. "FIXCH,Fixed Channel Select" "0: Channel 0,1: Channel 1,2: Channel 2,3: Channel 3,4: Channel 4,5: Channel 5,6: Channel 6,7: Channel 7"
|
|
bitfld.long 0x10 16. "FIXP,Fixed Port" "0: Fix the plus port. Sweep only the inputs to the..,1: Fix the minus port. Sweep only the inputs to the.."
|
|
newline
|
|
bitfld.long 0x10 7. "RR_CH7EN,Channel 7 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 6. "RR_CH6EN,Channel 6 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 5. "RR_CH5EN,Channel 5 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 4. "RR_CH4EN,Channel 4 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 3. "RR_CH3EN,Channel 3 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 2. "RR_CH2EN,Channel 2 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 1. "RR_CH1EN,Channel 1 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 0. "RR_CH0EN,Channel 0 Input Enable in Trigger Mode" "0: Disables,1: Enables"
|
|
line.long 0x14 "RRCSR,Round Robin Control and Status"
|
|
bitfld.long 0x14 7. "RR_CH7OUT,Comparison Result for Channel 7" "0,1"
|
|
bitfld.long 0x14 6. "RR_CH6OUT,Comparison Result for Channel 6" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "RR_CH5OUT,Comparison Result for Channel 5" "0,1"
|
|
bitfld.long 0x14 4. "RR_CH4OUT,Comparison Result for Channel 4" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "RR_CH3OUT,Comparison Result for Channel 3" "0,1"
|
|
bitfld.long 0x14 2. "RR_CH2OUT,Comparison Result for Channel 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "RR_CH1OUT,Comparison Result for Channel 1" "0,1"
|
|
bitfld.long 0x14 0. "RR_CH0OUT,Comparison Result for Channel 0" "0,1"
|
|
line.long 0x18 "RRSR,Round Robin Status"
|
|
eventfld.long 0x18 7. "RR_CH7F,Channel 7 Input Changed Flag" "0: Not different,1: Different"
|
|
eventfld.long 0x18 6. "RR_CH6F,Channel 6 Input Changed Flag" "0: Not different,1: Different"
|
|
newline
|
|
eventfld.long 0x18 5. "RR_CH5F,Channel 5 Input Changed Flag" "0: Not different,1: Different"
|
|
eventfld.long 0x18 4. "RR_CH4F,Channel 4 Input Changed Flag" "0: Not different,1: Different"
|
|
newline
|
|
eventfld.long 0x18 3. "RR_CH3F,Channel 3 Input Changed Flag" "0: Not different,1: Different"
|
|
eventfld.long 0x18 2. "RR_CH2F,Channel 2 Input Changed Flag" "0: Not different,1: Different"
|
|
newline
|
|
eventfld.long 0x18 1. "RR_CH1F,Channel 1 Input Changed Flag" "0: Not different,1: Different"
|
|
eventfld.long 0x18 0. "RR_CH0F,Channel 0 Input Changed Flag" "0: Not different,1: Different"
|
|
tree.end
|
|
tree "LPI2C"
|
|
base ad:0x0
|
|
tree "LPI2C_0"
|
|
base ad:0x40350000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
|
|
group.long 0x10++0x1F
|
|
line.long 0x0 "MCR,Controller Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Controller is disabled in debug mode,1: Controller is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Controller is enabled in doze mode,1: Controller is disabled in doze mode"
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "MSR,Controller Status"
|
|
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
|
|
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
|
|
newline
|
|
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled,1: Pin low timeout has occurred"
|
|
newline
|
|
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error,1: Controller sending or receiving data without a.."
|
|
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller has not lost arbitration,1: Controller has lost arbitration"
|
|
newline
|
|
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK was not detected,1: Unexpected NACK was detected"
|
|
eventfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Controller has not generated a STOP condition,1: Controller has generated a STOP condition"
|
|
newline
|
|
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: Controller has not generated a STOP or Repeated..,1: Controller has generated a STOP or Repeated.."
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data is not requested,1: Transmit data is requested"
|
|
line.long 0x8 "MIER,Controller Interrupt Enable"
|
|
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "MDER,Controller DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "MCFGR0,Controller Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive data match only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host request select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host request polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host request enable" "0: Host request input is disabled,1: Host request input is enabled"
|
|
line.long 0x14 "MCFGR1,Controller Configuration 1"
|
|
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (ultra-fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open drain mode with separate LPI2C target,5: Two-pin output only mode (ultra-fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled (first data word equals..,3: Match is enabled (any data word equals..,4: Match is enabled (first data word equals..,5: Match is enabled (any data word equals..,6: Match is enabled (first data word AND..,7: Match is enabled (any data word AND MDMR[MATCH1].."
|
|
newline
|
|
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: MSR[PLTF] becomes 1 if SCL is low for longer..,1: MSR[PLTF] becomes 1 if either SCL or SDA is low.."
|
|
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: LPI2C controller treats a received NACK as if it.."
|
|
newline
|
|
bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect,1: STOP condition is automatically generated when.."
|
|
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x18 "MCFGR2,Controller Configuration 2"
|
|
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
|
|
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
|
|
newline
|
|
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
|
|
line.long 0x1C "MCFGR3,Controller Configuration 3"
|
|
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin low timeout"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "MDMR,Controller Data Match"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "MFCR,Controller FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "MFSR,Controller FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x0 "MTDR,Controller Transmit Data"
|
|
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate STOP condition,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) START and transmit address..,5: Generate (repeated) START and transmit address..,6: Generate (repeated) START and transmit address..,7: Generate (repeated) START and transmit address.."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "MRDR,Controller Receive Data"
|
|
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Receive FIFO is not empty,1: Receive FIFO is empty"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
|
|
group.long 0x110++0xF
|
|
line.long 0x0 "SCR,Target Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive Data Register is now empty."
|
|
bitfld.long 0x0 8. "RTF,Reset transmit FIFO" "0: No effect,1: Transmit Data Register is now empty."
|
|
newline
|
|
bitfld.long 0x0 5. "FILTDZ,Filter doze enable" "0: Filter remains enabled in Doze mode,1: Filter is disabled in Doze mode"
|
|
bitfld.long 0x0 4. "FILTEN,Filter enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.."
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software reset" "0: Target mode logic is not reset,1: Target mode logic is reset"
|
|
bitfld.long 0x0 0. "SEN,Target Enable" "0: I2C Target mode is disabled,1: I2C Target mode is enabled"
|
|
line.long 0x4 "SSR,Target Status"
|
|
rbitfld.long 0x4 25. "BBF,Bus busy flag" "0: Idle,1: Busy"
|
|
rbitfld.long 0x4 24. "SBF,Target busy flag" "0: Idle,1: Busy"
|
|
newline
|
|
rbitfld.long 0x4 15. "SARF,SMBus alert response flag" "0: SMBus alert response is disabled or not detected,1: SMBus alert response is enabled and detected"
|
|
rbitfld.long 0x4 14. "GCF,General call flag" "0: Target has not detected the General Call Address..,1: Target has detected the General Call Address"
|
|
newline
|
|
rbitfld.long 0x4 13. "AM1F,Address match 1 flag" "0: ADDR1 or ADDR0/ADDR1 range matching address not..,1: ADDR1 or ADDR0/ADDR1 range matching address.."
|
|
rbitfld.long 0x4 12. "AM0F,Address match 0 flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
|
|
newline
|
|
eventfld.long 0x4 11. "FEF,FIFO error flag" "0: FIFO underflow or overflow was not detected,1: FIFO underflow or overflow was detected"
|
|
eventfld.long 0x4 10. "BEF,Bit error flag" "0: Target has not detected a bit error,1: Target has detected a bit error"
|
|
newline
|
|
eventfld.long 0x4 9. "SDF,STOP detect flag" "0: Target has not detected a STOP condition,1: Target has detected a STOP condition"
|
|
eventfld.long 0x4 8. "RSF,Repeated start flag" "0: Target has not detected a Repeated START condition,1: Target has detected a Repeated START condition"
|
|
newline
|
|
rbitfld.long 0x4 3. "TAF,Transmit ACK flag" "0: Transmit ACK/NACK is not required,1: Transmit ACK/NACK is required"
|
|
rbitfld.long 0x4 2. "AVF,Address valid flag" "0: Address Status Register is not valid,1: Address Status Register is valid"
|
|
newline
|
|
rbitfld.long 0x4 1. "RDF,Receive data flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
rbitfld.long 0x4 0. "TDF,Transmit data flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "SIER,Target interrupt enable"
|
|
bitfld.long 0x8 15. "SARIE,SMBus alert response interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 14. "GCIE,General call interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 13. "AM1IE,Address match 1 interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "AM0IE,Address match 0 interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "FEIE,FIFO error interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "BEIE,Bit error interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "SDIE,STOP detect interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "RSIE,Repeated start interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "TAIE,Transmit ACK interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 2. "AVIE,Address valid interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive data interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit data interrupt enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "SDER,Target DMA Enable"
|
|
bitfld.long 0xC 2. "AVDE,Address valid DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 1. "RDDE,Receive data DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "TDDE,Transmit data DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x124++0x7
|
|
line.long 0x0 "SCFGR1,Target Configuration 1"
|
|
bitfld.long 0x0 16.--18. "ADDRCFG,Address configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or Address match 1 (7-bit),3: Address match 0 (10-bit) or Address match 1..,4: Address match 0 (7-bit) or Address match 1..,5: Address match 0 (10-bit) or Address match 1..,6: From Address match 0 (7-bit) to Address match 1..,7: From Address match 0 (10-bit) to Address match 1.."
|
|
bitfld.long 0x0 13. "HSMEN,High-speed mode enable" "0: Disable,1: Enable"
|
|
newline
|
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bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Target ends transfer when NACK is detected,1: Target does not end transfer when NACK detected"
|
|
bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the Receive Data register returns..,1: Reading the Receive Data register when the.."
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|
newline
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bitfld.long 0x0 10. "TXCFG,Transmit flag configuration" "0: MSR[TDF] becomes 1 only during a target-transmit..,1: MSR[TDF] becomes 1 whenever the Transmit Data.."
|
|
bitfld.long 0x0 9. "SAEN,SMBus alert enable" "0: Disables match on SMBus Alert,1: Enables match on SMBus Alert"
|
|
newline
|
|
bitfld.long 0x0 8. "GCEN,General call enable" "0: General Call address is disabled,1: General Call address is enabled"
|
|
bitfld.long 0x0 3. "ACKSTALL,ACK SCL stall" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 2. "TXDSTALL,Transmit data SCL stall" "0: Disabled,1: Enabled"
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|
bitfld.long 0x0 1. "RXSTALL,RX SCL stall" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 0. "ADRSTALL,Address SCL stall" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "SCFGR2,Target Configuration 2"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch filter SDA"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch filter SCL"
|
|
newline
|
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hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data valid delay"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock hold time"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "SAMR,Target Address Match"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 value"
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hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 value"
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x0 "SASR,Target Address Status"
|
|
bitfld.long 0x0 14. "ANV,Address not valid" "0: Received Address (RADDR) is valid,1: Received Address (RADDR) is not valid"
|
|
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
|
|
group.long 0x154++0x3
|
|
line.long 0x0 "STAR,Target Transmit ACK"
|
|
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Write a Transmit ACK for each received word,1: Write a Transmit NACK for each received word"
|
|
wgroup.long 0x160++0x3
|
|
line.long 0x0 "STDR,Target Transmit Data"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit data"
|
|
rgroup.long 0x170++0x3
|
|
line.long 0x0 "SRDR,Target Receive Data"
|
|
bitfld.long 0x0 15. "SOF,Start of frame" "0: Not the first data word since a (repeated) START..,1: Is the first data word since a (repeated) START.."
|
|
bitfld.long 0x0 14. "RXEMPTY,Receive empty" "0: The Receive Data Register is not empty,1: The Receive Data Register is empty"
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|
newline
|
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bitfld.long 0x0 8.--10. "RADDR,Received address" "0,1,2,3,4,5,6,7"
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|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive data"
|
|
tree.end
|
|
tree "LPI2C_1"
|
|
base ad:0x40354000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
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|
newline
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hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Controller Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Controller Transmit FIFO Size"
|
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group.long 0x10++0x1F
|
|
line.long 0x0 "MCR,Controller Control"
|
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bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
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|
newline
|
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bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Controller is disabled in debug mode,1: Controller is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Controller is enabled in doze mode,1: Controller is disabled in doze mode"
|
|
newline
|
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bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
bitfld.long 0x0 0. "MEN,Controller Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "MSR,Controller Status"
|
|
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: Idle,1: Busy"
|
|
rbitfld.long 0x4 24. "MBF,Controller Busy Flag" "0: Idle,1: Busy"
|
|
newline
|
|
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled,1: Pin low timeout has occurred"
|
|
newline
|
|
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error,1: Controller sending or receiving data without a.."
|
|
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Controller has not lost arbitration,1: Controller has lost arbitration"
|
|
newline
|
|
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK was not detected,1: Unexpected NACK was detected"
|
|
eventfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Controller has not generated a STOP condition,1: Controller has generated a STOP condition"
|
|
newline
|
|
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: Controller has not generated a STOP or Repeated..,1: Controller has generated a STOP or Repeated.."
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data is not requested,1: Transmit data is requested"
|
|
line.long 0x8 "MIER,Controller Interrupt Enable"
|
|
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "MDER,Controller DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "MCFGR0,Controller Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive data match only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host request select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host request polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host request enable" "0: Host request input is disabled,1: Host request input is enabled"
|
|
line.long 0x14 "MCFGR1,Controller Configuration 1"
|
|
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: Two-pin open drain mode,1: Two-pin output only mode (ultra-fast mode),2: Two-pin push-pull mode,3: Four-pin push-pull mode,4: Two-pin open drain mode with separate LPI2C target,5: Two-pin output only mode (ultra-fast mode) with..,6: Two-pin push-pull mode with separate LPI2C target,7: Four-pin push-pull mode (inverted outputs)"
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled (first data word equals..,3: Match is enabled (any data word equals..,4: Match is enabled (first data word equals..,5: Match is enabled (any data word equals..,6: Match is enabled (first data word AND..,7: Match is enabled (any data word AND MDMR[MATCH1].."
|
|
newline
|
|
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: MSR[PLTF] becomes 1 if SCL is low for longer..,1: MSR[PLTF] becomes 1 if either SCL or SDA is low.."
|
|
bitfld.long 0x14 9. "IGNACK,Ignore NACK" "0: No effect,1: LPI2C controller treats a received NACK as if it.."
|
|
newline
|
|
bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect,1: STOP condition is automatically generated when.."
|
|
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x18 "MCFGR2,Controller Configuration 2"
|
|
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
|
|
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
|
|
newline
|
|
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
|
|
line.long 0x1C "MCFGR3,Controller Configuration 3"
|
|
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin low timeout"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "MDMR,Controller Data Match"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "MCCR0,Controller Clock Configuration 0"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "MCCR1,Controller Clock Configuration 1"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "MFCR,Controller FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "MFSR,Controller FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x0 "MTDR,Controller Transmit Data"
|
|
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate STOP condition,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) START and transmit address..,5: Generate (repeated) START and transmit address..,6: Generate (repeated) START and transmit address..,7: Generate (repeated) START and transmit address.."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "MRDR,Controller Receive Data"
|
|
bitfld.long 0x0 14. "RXEMPTY,Receive Empty" "0: Receive FIFO is not empty,1: Receive FIFO is empty"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
|
|
group.long 0x110++0xF
|
|
line.long 0x0 "SCR,Target Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive Data Register is now empty."
|
|
bitfld.long 0x0 8. "RTF,Reset transmit FIFO" "0: No effect,1: Transmit Data Register is now empty."
|
|
newline
|
|
bitfld.long 0x0 5. "FILTDZ,Filter doze enable" "0: Filter remains enabled in Doze mode,1: Filter is disabled in Doze mode"
|
|
bitfld.long 0x0 4. "FILTEN,Filter enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.."
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software reset" "0: Target mode logic is not reset,1: Target mode logic is reset"
|
|
bitfld.long 0x0 0. "SEN,Target Enable" "0: I2C Target mode is disabled,1: I2C Target mode is enabled"
|
|
line.long 0x4 "SSR,Target Status"
|
|
rbitfld.long 0x4 25. "BBF,Bus busy flag" "0: Idle,1: Busy"
|
|
rbitfld.long 0x4 24. "SBF,Target busy flag" "0: Idle,1: Busy"
|
|
newline
|
|
rbitfld.long 0x4 15. "SARF,SMBus alert response flag" "0: SMBus alert response is disabled or not detected,1: SMBus alert response is enabled and detected"
|
|
rbitfld.long 0x4 14. "GCF,General call flag" "0: Target has not detected the General Call Address..,1: Target has detected the General Call Address"
|
|
newline
|
|
rbitfld.long 0x4 13. "AM1F,Address match 1 flag" "0: ADDR1 or ADDR0/ADDR1 range matching address not..,1: ADDR1 or ADDR0/ADDR1 range matching address.."
|
|
rbitfld.long 0x4 12. "AM0F,Address match 0 flag" "0: ADDR0 matching address not received,1: ADDR0 matching address received"
|
|
newline
|
|
eventfld.long 0x4 11. "FEF,FIFO error flag" "0: FIFO underflow or overflow was not detected,1: FIFO underflow or overflow was detected"
|
|
eventfld.long 0x4 10. "BEF,Bit error flag" "0: Target has not detected a bit error,1: Target has detected a bit error"
|
|
newline
|
|
eventfld.long 0x4 9. "SDF,STOP detect flag" "0: Target has not detected a STOP condition,1: Target has detected a STOP condition"
|
|
eventfld.long 0x4 8. "RSF,Repeated start flag" "0: Target has not detected a Repeated START condition,1: Target has detected a Repeated START condition"
|
|
newline
|
|
rbitfld.long 0x4 3. "TAF,Transmit ACK flag" "0: Transmit ACK/NACK is not required,1: Transmit ACK/NACK is required"
|
|
rbitfld.long 0x4 2. "AVF,Address valid flag" "0: Address Status Register is not valid,1: Address Status Register is valid"
|
|
newline
|
|
rbitfld.long 0x4 1. "RDF,Receive data flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
rbitfld.long 0x4 0. "TDF,Transmit data flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "SIER,Target interrupt enable"
|
|
bitfld.long 0x8 15. "SARIE,SMBus alert response interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 14. "GCIE,General call interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 13. "AM1IE,Address match 1 interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "AM0IE,Address match 0 interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "FEIE,FIFO error interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "BEIE,Bit error interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "SDIE,STOP detect interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "RSIE,Repeated start interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "TAIE,Transmit ACK interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 2. "AVIE,Address valid interrupt enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive data interrupt enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit data interrupt enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "SDER,Target DMA Enable"
|
|
bitfld.long 0xC 2. "AVDE,Address valid DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 1. "RDDE,Receive data DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "TDDE,Transmit data DMA enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x124++0x7
|
|
line.long 0x0 "SCFGR1,Target Configuration 1"
|
|
bitfld.long 0x0 16.--18. "ADDRCFG,Address configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or Address match 1 (7-bit),3: Address match 0 (10-bit) or Address match 1..,4: Address match 0 (7-bit) or Address match 1..,5: Address match 0 (10-bit) or Address match 1..,6: From Address match 0 (7-bit) to Address match 1..,7: From Address match 0 (10-bit) to Address match 1.."
|
|
bitfld.long 0x0 13. "HSMEN,High-speed mode enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Target ends transfer when NACK is detected,1: Target does not end transfer when NACK detected"
|
|
bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the Receive Data register returns..,1: Reading the Receive Data register when the.."
|
|
newline
|
|
bitfld.long 0x0 10. "TXCFG,Transmit flag configuration" "0: MSR[TDF] becomes 1 only during a target-transmit..,1: MSR[TDF] becomes 1 whenever the Transmit Data.."
|
|
bitfld.long 0x0 9. "SAEN,SMBus alert enable" "0: Disables match on SMBus Alert,1: Enables match on SMBus Alert"
|
|
newline
|
|
bitfld.long 0x0 8. "GCEN,General call enable" "0: General Call address is disabled,1: General Call address is enabled"
|
|
bitfld.long 0x0 3. "ACKSTALL,ACK SCL stall" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "TXDSTALL,Transmit data SCL stall" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 1. "RXSTALL,RX SCL stall" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ADRSTALL,Address SCL stall" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "SCFGR2,Target Configuration 2"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch filter SDA"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch filter SCL"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data valid delay"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock hold time"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "SAMR,Target Address Match"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 value"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 value"
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x0 "SASR,Target Address Status"
|
|
bitfld.long 0x0 14. "ANV,Address not valid" "0: Received Address (RADDR) is valid,1: Received Address (RADDR) is not valid"
|
|
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
|
|
group.long 0x154++0x3
|
|
line.long 0x0 "STAR,Target Transmit ACK"
|
|
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Write a Transmit ACK for each received word,1: Write a Transmit NACK for each received word"
|
|
wgroup.long 0x160++0x3
|
|
line.long 0x0 "STDR,Target Transmit Data"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit data"
|
|
rgroup.long 0x170++0x3
|
|
line.long 0x0 "SRDR,Target Receive Data"
|
|
bitfld.long 0x0 15. "SOF,Start of frame" "0: Not the first data word since a (repeated) START..,1: Is the first data word since a (repeated) START.."
|
|
bitfld.long 0x0 14. "RXEMPTY,Receive empty" "0: The Receive Data Register is not empty,1: The Receive Data Register is empty"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "RADDR,Received address" "0,1,2,3,4,5,6,7"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive data"
|
|
tree.end
|
|
tree.end
|
|
tree "LPSPI"
|
|
base ad:0x0
|
|
tree "LPSPI_0"
|
|
base ad:0x40358000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "SR,Status"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0xC "DER,DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x10 "CFGR0,Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
|
|
newline
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
|
|
line.long 0x14 "CFGR1,Configuration 1"
|
|
bitfld.long 0x14 27.--28. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[7:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit..,?,3: PCS[7:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--15. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
|
|
newline
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CCR,Clock Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
line.long 0x4 "CCR1,Clock Configuration 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3],4: Transfer using PCS[4],5: Transfer using PCS[5],6: Transfer using PCS[6],7: Transfer using PCS[7]"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,3: 8-bit transfer"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0xB
|
|
line.long 0x0 "RSR,Receive Status"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word"
|
|
line.long 0x4 "RDR,Receive Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
line.long 0x8 "RDROR,Receive Data Read Only"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
|
|
wgroup.long 0x3FC++0x3
|
|
line.long 0x0 "TCBR,Transmit Command Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x600)++0x3
|
|
line.long 0x0 "RDBR[$1],Receive Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "LPSPI_1"
|
|
base ad:0x4035C000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "SR,Status"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0xC "DER,DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x10 "CFGR0,Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
|
|
newline
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
|
|
line.long 0x14 "CFGR1,Configuration 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[5:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--13. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
|
|
newline
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CCR,Clock Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
line.long 0x4 "CCR1,Clock Configuration 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3],4: Transfer using PCS[4],5: Transfer using PCS[5],?,?"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0xB
|
|
line.long 0x0 "RSR,Receive Status"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word"
|
|
line.long 0x4 "RDR,Receive Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
line.long 0x8 "RDROR,Receive Data Read Only"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
|
|
wgroup.long 0x3FC++0x3
|
|
line.long 0x0 "TCBR,Transmit Command Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x600)++0x3
|
|
line.long 0x0 "RDBR[$1],Receive Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "LPSPI_2"
|
|
base ad:0x40360000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "SR,Status"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0xC "DER,DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x10 "CFGR0,Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
|
|
newline
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
|
|
line.long 0x14 "CFGR1,Configuration 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
|
|
newline
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CCR,Clock Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
line.long 0x4 "CCR1,Clock Configuration 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0xB
|
|
line.long 0x0 "RSR,Receive Status"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word"
|
|
line.long 0x4 "RDR,Receive Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
line.long 0x8 "RDROR,Receive Data Read Only"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
|
|
wgroup.long 0x3FC++0x3
|
|
line.long 0x0 "TCBR,Transmit Command Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x600)++0x3
|
|
line.long 0x0 "RDBR[$1],Receive Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "LPSPI_3"
|
|
base ad:0x40364000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSNUM,PCS Number"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
newline
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Disable,1: Enable"
|
|
line.long 0x4 "SR,Status"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: No match,1: Match"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: No underrun,1: Underrun"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: Not complete,1: Complete"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Not complete,1: Complete"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Not complete,1: Complete"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disable,1: Enable"
|
|
line.long 0xC "DER,DMA Enable"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: Disable,1: Enable"
|
|
line.long 0x10 "CFGR0,Configuration 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Disable,1: Enable"
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x10 3. "HRDIR,Host Request Direction" "0: Input,1: Output"
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: HREQ pin,1: Input trigger"
|
|
newline
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active high,1: Active low"
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Disable,1: Enable"
|
|
line.long 0x14 "CFGR1,Configuration 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value.,1: Output data is 3-stated."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data; SOUT is used for..,1: SIN is used for both input and output data. Only..,2: SOUT is used for both input and output data.,3: SOUT is used for input data; SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match first data word with compare word,3: Match any data word with compare word,4: Sequential match first data word,5: Sequential match any data word,6: Match first data word (masked) with compare word..,7: Match any data word (masked) with compare word.."
|
|
newline
|
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hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 4. "PARTIAL,Partial Enable" "0: Discard,1: Store"
|
|
newline
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Disable,1: Enable"
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: SCK edge,1: Delayed SCK edge"
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CCR,Clock Configuration"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
line.long 0x4 "CCR1,Clock Configuration 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "SCKSCK,SCK Inter-Frame Delay"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PCSPCS,PCS to PCS delay"
|
|
newline
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hexmask.long.byte 0x4 8.--15. 1. "SCKHLD,SCK Hold"
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|
hexmask.long.byte 0x4 0.--7. 1. "SCKSET,SCK Setup"
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|
group.long 0x58++0x3
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|
line.long 0x0 "FCR,FIFO Control"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
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|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: Inactive low,1: Inactive high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Captured,1: Changed"
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
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|
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using PCS[0],1: Transfer using PCS[1],2: Transfer using PCS[2],3: Transfer using PCS[3]"
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|
newline
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bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
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|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Disabled,1: Enabled"
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|
newline
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|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
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|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
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|
newline
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bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1-bit transfer,1: 2-bit transfer,2: 4-bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0xB
|
|
line.long 0x0 "RSR,Receive Status"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word,1: First data word"
|
|
line.long 0x4 "RDR,Receive Data"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
line.long 0x8 "RDROR,Receive Data Read Only"
|
|
hexmask.long 0x8 0.--31. 1. "DATA,Receive Data"
|
|
wgroup.long 0x3FC++0x3
|
|
line.long 0x0 "TCBR,Transmit Command Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Command Data"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x600)++0x3
|
|
line.long 0x0 "RDBR[$1],Receive Data Burst"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Data"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "LPUART"
|
|
base ad:0x0
|
|
tree "LPUART_0"
|
|
base ad:0x40328000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,Global"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
line.long 0x4 "PINCFG,Pin Configuration"
|
|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
|
|
line.long 0x8 "BAUD,Baud Rate"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables"
|
|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
|
|
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)"
|
|
newline
|
|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request"
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request"
|
|
newline
|
|
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.."
|
|
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
|
|
newline
|
|
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization"
|
|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1"
|
|
newline
|
|
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].."
|
|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
|
|
newline
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
|
|
line.long 0xC "STAT,Status"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
|
|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables"
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
|
|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)"
|
|
newline
|
|
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected"
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)"
|
|
eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected"
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected"
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected"
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
|
|
newline
|
|
rbitfld.long 0xC 9. "TSF,Timeout Status Flag" "0: Field is 0,1: Field is 1"
|
|
rbitfld.long 0xC 8. "MSF,MODEM Status Flag" "0: Field is 0,1: Field is 1"
|
|
newline
|
|
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.."
|
|
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect"
|
|
line.long 0x10 "CTRL,Control"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode"
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1"
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters"
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
|
|
newline
|
|
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
|
|
bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables"
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
|
|
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters"
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup"
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
|
|
line.long 0x14 "DATA,Data"
|
|
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
|
|
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty"
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle"
|
|
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1"
|
|
bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1"
|
|
bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1"
|
|
bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1"
|
|
bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1"
|
|
bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1"
|
|
line.long 0x18 "MATCH,Match Address"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,MODEM IrDA"
|
|
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "RTSWATER,Receive RTS Configuration"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
|
|
newline
|
|
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high"
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables"
|
|
line.long 0x20 "FIFO,FIFO"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.."
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|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables"
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|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.."
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|
newline
|
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rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords"
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|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.."
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|
newline
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rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords"
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|
line.long 0x24 "WATER,Watermark"
|
|
hexmask.long.byte 0x24 24.--28. 1. "RXCOUNT,Receive Counter"
|
|
hexmask.long.byte 0x24 16.--19. 1. "RXWATER,Receive Watermark"
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|
newline
|
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hexmask.long.byte 0x24 8.--12. 1. "TXCOUNT,Transmit Counter"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TXWATER,Transmit Watermark"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "DATARO,Data Read-Only"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
|
|
group.long 0x40++0x13
|
|
line.long 0x0 "MCR,MODEM Control"
|
|
bitfld.long 0x0 9. "RTS,Request To Send" "0: Default state is logic one,1: Default state is logic zero"
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|
bitfld.long 0x0 8. "DTR,Data Terminal Ready" "0: Default state is logic one,1: Default state is logic zero"
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|
newline
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bitfld.long 0x0 3. "DCD,Data Carrier Detect" "0: Interrupt disabled,1: Interrupt enabled"
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|
bitfld.long 0x0 2. "RIN,Ring Indicator" "0: Interrupt disabled,1: Interrupt enabled"
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newline
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bitfld.long 0x0 1. "DSR,Data Set Ready" "0: Interrupt disabled,1: Interrupt enabled"
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bitfld.long 0x0 0. "CTS,Clear To Send" "0: Interrupt disabled,1: Interrupt enabled"
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line.long 0x4 "MSR,MODEM Status"
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|
rbitfld.long 0x4 7. "DCD,Data Carrier Detect" "0: The DCD_B pin is logic one,1: The DCD_B pin is logic zero"
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rbitfld.long 0x4 6. "RIN,Ring Indicator" "0: The RIN_B pin is logic one,1: The RIN_B pin is logic zero"
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newline
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rbitfld.long 0x4 5. "DSR,Data Set Ready" "0: The DSR_B pin is logic one,1: The DSR_B pin is logic zero"
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rbitfld.long 0x4 4. "CTS,Clear To Send" "0: The CTS_B pin is logic one,1: The CTS_B pin is logic zero"
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newline
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eventfld.long 0x4 3. "DDCD,Delta Data Carrier Detect" "0: Did not change state,1: Changed state"
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eventfld.long 0x4 2. "DRI,Delta Ring Indicator" "0: Did not change state,1: Changed state"
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|
newline
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eventfld.long 0x4 1. "DDSR,Delta Data Set Ready" "0: Did not change state,1: Changed state"
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|
eventfld.long 0x4 0. "DCTS,Delta Clear To Send" "0: Did not change state,1: Changed state"
|
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line.long 0x8 "REIR,Receiver Extended Idle"
|
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hexmask.long.word 0x8 0.--13. 1. "IDTIME,Idle Time"
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line.long 0xC "TEIR,Transmitter Extended Idle"
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hexmask.long.word 0xC 0.--13. 1. "IDTIME,Idle Time"
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line.long 0x10 "HDCR,Half Duplex Control"
|
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hexmask.long.byte 0x10 8.--15. 1. "RTSEXT,RTS Extended"
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bitfld.long 0x10 3. "RXMSK,Receive Mask" "0: Does not mask,1: Masks"
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newline
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bitfld.long 0x10 2. "RXWRMSK,Receive FIFO Write Mask" "0: Does not mask,1: Masks"
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bitfld.long 0x10 1. "RXSEL,Receive Select" "0: RXD,1: TXD"
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newline
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bitfld.long 0x10 0. "TXSTALL,Transmit Stall" "0: No effect,1: Does not become busy"
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group.long 0x58++0x7
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line.long 0x0 "TOCR,Timeout Control"
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hexmask.long.byte 0x0 8.--11. 1. "TOIE,Timeout Interrupt Enable"
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hexmask.long.byte 0x0 0.--3. 1. "TOEN,Timeout Enable"
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line.long 0x4 "TOSR,Timeout Status"
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hexmask.long.byte 0x4 8.--11. 1. "TOF,Timeout Flag"
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|
hexmask.long.byte 0x4 0.--3. 1. "TOZ,Timeout Zero"
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|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
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group.long ($2+0x60)++0x3
|
|
line.long 0x0 "TIMEOUT[$1],Timeout N"
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|
bitfld.long 0x0 30.--31. "CFG,Idle Configuration" "0: Becomes 1 after timeout characters are received,1: Becomes 1 when idle for timeout bit clocks,2: Becomes 1 when idle for timeout bit clocks..,3: Becomes 1 when idle for at least timeout bit.."
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|
hexmask.long.word 0x0 0.--13. 1. "TIMEOUT,Timeout Value"
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|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
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|
wgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "TCBR[$1],Transmit Command Burst"
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|
hexmask.long.word 0x0 0.--15. 1. "DATA,Data"
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|
repeat.end
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repeat 256. (increment 0x0 0x1)(increment 0x0 0x4)
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|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
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|
hexmask.long.byte 0x0 24.--31. 1. "DATA3,Data3"
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|
hexmask.long.byte 0x0 16.--23. 1. "DATA2,Data2"
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|
newline
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hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1"
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|
hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0"
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repeat.end
|
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tree.end
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tree "LPUART_1"
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base ad:0x4032C000
|
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rgroup.long 0x0++0x7
|
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line.long 0x0 "VERID,Version ID"
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|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
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|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
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newline
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hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
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|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
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hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
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|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,Global"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
line.long 0x4 "PINCFG,Pin Configuration"
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|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
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|
line.long 0x8 "BAUD,Baud Rate"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables"
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|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables"
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newline
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bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
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hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)"
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|
newline
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|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request"
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request"
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|
newline
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bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.."
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bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
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|
newline
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bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization"
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|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1"
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|
newline
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bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].."
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|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
|
|
newline
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
|
|
line.long 0xC "STAT,Status"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
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|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables"
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
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|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)"
|
|
newline
|
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rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected"
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)"
|
|
eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected"
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected"
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected"
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
|
|
newline
|
|
rbitfld.long 0xC 9. "TSF,Timeout Status Flag" "0: Field is 0,1: Field is 1"
|
|
rbitfld.long 0xC 8. "MSF,MODEM Status Flag" "0: Field is 0,1: Field is 1"
|
|
newline
|
|
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.."
|
|
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect"
|
|
line.long 0x10 "CTRL,Control"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode"
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1"
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters"
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
|
|
newline
|
|
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
|
|
bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables"
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
|
|
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters"
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup"
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
|
|
line.long 0x14 "DATA,Data"
|
|
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
|
|
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty"
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle"
|
|
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1"
|
|
bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1"
|
|
bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1"
|
|
bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1"
|
|
bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1"
|
|
bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1"
|
|
line.long 0x18 "MATCH,Match Address"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,MODEM IrDA"
|
|
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
|
|
newline
|
|
hexmask.long.byte 0x1C 8.--11. 1. "RTSWATER,Receive RTS Configuration"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
|
|
newline
|
|
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high"
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables"
|
|
line.long 0x20 "FIFO,FIFO"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.."
|
|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.."
|
|
newline
|
|
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords"
|
|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.."
|
|
newline
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rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords"
|
|
line.long 0x24 "WATER,Watermark"
|
|
hexmask.long.byte 0x24 24.--28. 1. "RXCOUNT,Receive Counter"
|
|
hexmask.long.byte 0x24 16.--19. 1. "RXWATER,Receive Watermark"
|
|
newline
|
|
hexmask.long.byte 0x24 8.--12. 1. "TXCOUNT,Transmit Counter"
|
|
hexmask.long.byte 0x24 0.--3. 1. "TXWATER,Transmit Watermark"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "DATARO,Data Read-Only"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
|
|
group.long 0x40++0x13
|
|
line.long 0x0 "MCR,MODEM Control"
|
|
bitfld.long 0x0 9. "RTS,Request To Send" "0: Default state is logic one,1: Default state is logic zero"
|
|
bitfld.long 0x0 8. "DTR,Data Terminal Ready" "0: Default state is logic one,1: Default state is logic zero"
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|
newline
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bitfld.long 0x0 3. "DCD,Data Carrier Detect" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x0 2. "RIN,Ring Indicator" "0: Interrupt disabled,1: Interrupt enabled"
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|
newline
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bitfld.long 0x0 1. "DSR,Data Set Ready" "0: Interrupt disabled,1: Interrupt enabled"
|
|
bitfld.long 0x0 0. "CTS,Clear To Send" "0: Interrupt disabled,1: Interrupt enabled"
|
|
line.long 0x4 "MSR,MODEM Status"
|
|
rbitfld.long 0x4 7. "DCD,Data Carrier Detect" "0: The DCD_B pin is logic one,1: The DCD_B pin is logic zero"
|
|
rbitfld.long 0x4 6. "RIN,Ring Indicator" "0: The RIN_B pin is logic one,1: The RIN_B pin is logic zero"
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|
newline
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rbitfld.long 0x4 5. "DSR,Data Set Ready" "0: The DSR_B pin is logic one,1: The DSR_B pin is logic zero"
|
|
rbitfld.long 0x4 4. "CTS,Clear To Send" "0: The CTS_B pin is logic one,1: The CTS_B pin is logic zero"
|
|
newline
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eventfld.long 0x4 3. "DDCD,Delta Data Carrier Detect" "0: Did not change state,1: Changed state"
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|
eventfld.long 0x4 2. "DRI,Delta Ring Indicator" "0: Did not change state,1: Changed state"
|
|
newline
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eventfld.long 0x4 1. "DDSR,Delta Data Set Ready" "0: Did not change state,1: Changed state"
|
|
eventfld.long 0x4 0. "DCTS,Delta Clear To Send" "0: Did not change state,1: Changed state"
|
|
line.long 0x8 "REIR,Receiver Extended Idle"
|
|
hexmask.long.word 0x8 0.--13. 1. "IDTIME,Idle Time"
|
|
line.long 0xC "TEIR,Transmitter Extended Idle"
|
|
hexmask.long.word 0xC 0.--13. 1. "IDTIME,Idle Time"
|
|
line.long 0x10 "HDCR,Half Duplex Control"
|
|
hexmask.long.byte 0x10 8.--15. 1. "RTSEXT,RTS Extended"
|
|
bitfld.long 0x10 3. "RXMSK,Receive Mask" "0: Does not mask,1: Masks"
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|
newline
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bitfld.long 0x10 2. "RXWRMSK,Receive FIFO Write Mask" "0: Does not mask,1: Masks"
|
|
bitfld.long 0x10 1. "RXSEL,Receive Select" "0: RXD,1: TXD"
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|
newline
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bitfld.long 0x10 0. "TXSTALL,Transmit Stall" "0: No effect,1: Does not become busy"
|
|
group.long 0x58++0x7
|
|
line.long 0x0 "TOCR,Timeout Control"
|
|
hexmask.long.byte 0x0 8.--11. 1. "TOIE,Timeout Interrupt Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "TOEN,Timeout Enable"
|
|
line.long 0x4 "TOSR,Timeout Status"
|
|
hexmask.long.byte 0x4 8.--11. 1. "TOF,Timeout Flag"
|
|
hexmask.long.byte 0x4 0.--3. 1. "TOZ,Timeout Zero"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x60)++0x3
|
|
line.long 0x0 "TIMEOUT[$1],Timeout N"
|
|
bitfld.long 0x0 30.--31. "CFG,Idle Configuration" "0: Becomes 1 after timeout characters are received,1: Becomes 1 when idle for timeout bit clocks,2: Becomes 1 when idle for timeout bit clocks..,3: Becomes 1 when idle for at least timeout bit.."
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|
hexmask.long.word 0x0 0.--13. 1. "TIMEOUT,Timeout Value"
|
|
repeat.end
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "TCBR[$1],Transmit Command Burst"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Data"
|
|
repeat.end
|
|
repeat 256. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
wgroup.long ($2+0x400)++0x3
|
|
line.long 0x0 "TDBR[$1],Transmit Data Burst"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATA3,Data3"
|
|
hexmask.long.byte 0x0 16.--23. 1. "DATA2,Data2"
|
|
newline
|
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hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data1"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data0"
|
|
repeat.end
|
|
tree.end
|
|
tree "LPUART_2"
|
|
base ad:0x40330000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,Global"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
line.long 0x4 "PINCFG,Pin Configuration"
|
|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
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|
line.long 0x8 "BAUD,Baud Rate"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables"
|
|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables"
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|
newline
|
|
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
|
|
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)"
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|
newline
|
|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request"
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request"
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|
newline
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bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.."
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|
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
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|
newline
|
|
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization"
|
|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1"
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|
newline
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bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].."
|
|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
|
|
newline
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
|
|
line.long 0xC "STAT,Status"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
|
|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables"
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
|
|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)"
|
|
newline
|
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rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected"
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)"
|
|
eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected"
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected"
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected"
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
|
|
newline
|
|
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.."
|
|
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect"
|
|
line.long 0x10 "CTRL,Control"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode"
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1"
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters"
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
|
|
newline
|
|
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
|
|
bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables"
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
|
|
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters"
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup"
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
|
|
line.long 0x14 "DATA,Data"
|
|
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
|
|
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty"
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle"
|
|
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1"
|
|
bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1"
|
|
bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1"
|
|
bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1"
|
|
bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1"
|
|
bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1"
|
|
line.long 0x18 "MATCH,Match Address"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,MODEM IrDA"
|
|
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
|
|
newline
|
|
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
|
|
newline
|
|
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high"
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables"
|
|
line.long 0x20 "FIFO,FIFO"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.."
|
|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.."
|
|
newline
|
|
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords"
|
|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.."
|
|
newline
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rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords"
|
|
line.long 0x24 "WATER,Watermark"
|
|
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
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|
newline
|
|
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "DATARO,Data Read-Only"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree "LPUART_3"
|
|
base ad:0x40334000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
line.long 0x4 "PARAM,Parameter"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,Global"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Not reset,1: Reset"
|
|
line.long 0x4 "PINCFG,Pin Configuration"
|
|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger disabled,1: Input trigger used instead of the RXD pin input,2: Input trigger used instead of the CTS_B pin input,3: Input trigger used to modulate the TXD pin.."
|
|
line.long 0x8 "BAUD,Baud Rate"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Disables,1: Enables"
|
|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Disables,1: Enables"
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|
newline
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|
bitfld.long 0x8 29. "M10,10-Bit Mode Select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
|
|
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio (OSR)"
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|
newline
|
|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: Disables DMA request,1: Enables DMA request"
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: Disables DMA request,1: Enables DMA request"
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|
newline
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bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address match wakeup,1: Idle match wakeup,2: Match on and match off,3: Enables RWU on data match and match on/off for.."
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|
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
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|
newline
|
|
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Enables resynchronization,1: Disables resynchronization"
|
|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Disables hardware interrupts from STAT[LBKDIF]..,1: Requests hardware interrupt when STAT[LBKDIF] is 1"
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|
newline
|
|
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Disables hardware interrupts from STAT[RXEDGIF],1: Requests hardware interrupts when STAT[RXEDGIF].."
|
|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit,1: Two stop bits"
|
|
newline
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor"
|
|
line.long 0xC "STAT,Status"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: Not detected,1: Detected"
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: Not occurred,1: Occurred"
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB,1: MSB"
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Inverted,1: Not inverted"
|
|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: STAT[IDLE] does not become 1,1: STAT[IDLE] becomes 1"
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: 9 to 13 bit times,1: 12 to 15 bit times"
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: Disables,1: Enables"
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: Idle waiting for a start bit,1: Receiver active (RXD pin input not idle)"
|
|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Greater than watermark,1: Equal to or less than watermark"
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)"
|
|
newline
|
|
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Equal to or less than watermark,1: Greater than watermark"
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected,1: Idle line detected"
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun,1: Receive overrun (new LPUART data lost)"
|
|
eventfld.long 0xC 18. "NF,Noise Flag (NF)" "0: No noise detected,1: Noise detected"
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag (FE)" "0: No framing error detected (this does not..,1: Framing error detected"
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag (PF)" "0: No parity error detected,1: Parity error detected"
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Not equal to MA1,1: Equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Not equal to MA2,1: Equal to MA2"
|
|
newline
|
|
bitfld.long 0xC 1. "AME,Address Mark Enable" "0: Address mark in character is MSB,1: Address mark in character is the last bit before.."
|
|
bitfld.long 0xC 0. "LBKFE,LIN Break Flag Enable" "0: Disables LIN break detect,1: Enables LIN break detect"
|
|
line.long 0x10 "CTRL,Control"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in Single-Wire mode,1: TXD pin is an output in Single-Wire mode"
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Not inverted,1: Inverted"
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Disables hardware interrupts from STAT[IDLE];..,1: Enables hardware interrupts when STAT[IDLE] = 1"
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation,1: LPUART receiver in standby waiting for a wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation,1: Queue break character(s) to be sent"
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 (MA1F) Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 (MA2F) Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: 8-bit to 10-bit data characters,1: 7-bit data characters"
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1,1: 2,2: 4,3: 8,4: 16,5: 32,6: 64,7: 128"
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|
newline
|
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bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation: RXD and TXD use separate pins,1: Loop mode or Single-Wire mode"
|
|
bitfld.long 0x10 6. "DOZEEN,Enables LPUART in Doze mode." "0: Enables,1: Disables"
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Internal Loopback mode,1: Single-wire mode"
|
|
bitfld.long 0x10 4. "M,9-Bit Or 8-Bit Mode Select" "0: 8-bit data characters,1: 9-bit data characters"
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures CTRL[RWU] for idle-line wakeup,1: Configures CTRL[RWU] with address-mark wakeup"
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: After the start bit,1: After the stop bit"
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity,1: Odd parity"
|
|
line.long 0x14 "DATA,Data"
|
|
rbitfld.long 0x14 15. "NOISY,Noisy Data Received" "0: Received without noise,1: Received with noise"
|
|
rbitfld.long 0x14 14. "PARITYE,Parity Error" "0: Received without a parity error,1: Received with a parity error"
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error Transmit Special Character" "0: Received without a frame error on reads or..,1: Received with a frame error on reads or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Contains valid data,1: Contains invalid data and is empty"
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Received was not idle,1: Receiver was idle"
|
|
rbitfld.long 0x14 10. "LINBRK,LIN Break" "0: LIN break not detected or LIN break detect..,1: LIN break detected"
|
|
newline
|
|
bitfld.long 0x14 9. "R9T9,Read Receive FIFO Bit 9 Or Write Transmit FIFO Bit 9" "0,1"
|
|
bitfld.long 0x14 8. "R8T8,Read Receive FIFO Bit 8 Or Write Transmit FIFO Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x14 7. "R7T7,Read Receive FIFO Bit 7 Or Write Transmit FIFO Bit 7" "0,1"
|
|
bitfld.long 0x14 6. "R6T6,Read Receive FIFO Bit 6 Or Write Transmit FIFO Bit 6" "0,1"
|
|
newline
|
|
bitfld.long 0x14 5. "R5T5,Read Receive FIFO Bit 5 Or Write Transmit FIFO Bit 5" "0,1"
|
|
bitfld.long 0x14 4. "R4T4,Read Receive FIFO Bit 4 Or Write Transmit FIFO Bit 4" "0,1"
|
|
newline
|
|
bitfld.long 0x14 3. "R3T3,Read Receive FIFO Bit 3 Or Write Transmit FIFO Bit 3" "0,1"
|
|
bitfld.long 0x14 2. "R2T2,Read Receive FIFO Bit 2 Or Write Transmit FIFO Bit 2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "R1T1,Read Receive FIFO Bit 1 Or Write Transmit FIFO Bit 1" "0,1"
|
|
bitfld.long 0x14 0. "R0T0,Read Receive FIFO Bit 0 Or Write Transmit FIFO Bit 0" "0,1"
|
|
line.long 0x18 "MATCH,Match Address"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,MODEM IrDA"
|
|
bitfld.long 0x1C 18. "IREN,IR Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter Narrow Pulse" "0: 1 / OSR,1: 2 / OSR,2: 3 / OSR,3: 4 / OSR"
|
|
newline
|
|
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: The CTS_B pin,1: An internal connection to the receiver address.."
|
|
newline
|
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bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: Sampled at the start of each character,1: Sampled when the transmitter is idle"
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
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bitfld.long 0x1C 2. "TXRTSPOL,Transmitter RTS Polarity" "0: Transmitter RTS is active low,1: Transmitter RTS is active high"
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter RTS Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter CTS Enable" "0: Disables,1: Enables"
|
|
line.long 0x20 "FIFO,FIFO"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive FIFO Or Buffer Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter FIFO Overflow Flag" "0: No overflow,1: Overflow"
|
|
eventfld.long 0x20 16. "RXUF,Receiver FIFO Underflow Flag" "0: No underflow,1: Underflow"
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO Flush" "0: No effect,1: All data is flushed out"
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disables STAT[RDRF] to become 1 because of..,1: Enables STAT[RDRF] to become 1 because of..,2: Enables STAT[RDRF] to become 1 because of..,3: Enables STAT[RDRF] to become 1 because of..,4: Enables STAT[RDRF] to become 1 because of..,5: Enables STAT[RDRF] to become 1 because of..,6: Enables STAT[RDRF] to become 1 because of..,7: Enables STAT[RDRF] to become 1 because of.."
|
|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[TXFIFOSIZE] indicates the buffer.."
|
|
newline
|
|
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO buffer depth = 1 dataword,1: Transmit FIFO buffer depth = 4 datawords,2: Transmit FIFO buffer depth = 8 datawords,3: Transmit FIFO buffer depth = 16 datawords,4: Transmit FIFO buffer depth = 32 datawords,5: Transmit FIFO buffer depth = 64 datawords,6: Transmit FIFO buffer depth = 128 datawords,7: Transmit FIFO buffer depth = 256 datawords"
|
|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Disables; buffer depth is 1,1: Enables; FIFO[RXFIFOSIZE] indicates the buffer.."
|
|
newline
|
|
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO buffer depth = 1 dataword,1: Receive FIFO buffer depth = 4 datawords,2: Receive FIFO buffer depth = 8 datawords,3: Receive FIFO buffer depth = 16 datawords,4: Receive FIFO buffer depth = 32 datawords,5: Receive FIFO buffer depth = 64 datawords,6: Receive FIFO buffer depth = 128 datawords,7: Receive FIFO buffer depth = 256 datawords"
|
|
line.long 0x24 "WATER,Watermark"
|
|
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
|
|
rgroup.long 0x30++0x3
|
|
line.long 0x0 "DATARO,Data Read-Only"
|
|
hexmask.long.word 0x0 0.--15. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree.end
|
|
tree "MC_CGM"
|
|
base ad:0x402D8000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PCFS_SDUR,PCFS Step Duration"
|
|
hexmask.long.word 0x0 0.--15. 1. "SDUR,Step duration"
|
|
group.long 0x58++0xB
|
|
line.long 0x0 "PCFS_DIVC8,PCFS Divider Change 8 Register"
|
|
hexmask.long.word 0x0 16.--31. 1. "INIT,Divider change initial value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RATE,Divider change rate"
|
|
line.long 0x4 "PCFS_DIVE8,PCFS Divider End 8 Register"
|
|
hexmask.long.tbyte 0x4 0.--19. 1. "DIVE,Divider end value"
|
|
line.long 0x8 "PCFS_DIVS8,PCFS Divider Start 8 Register"
|
|
hexmask.long.tbyte 0x8 0.--19. 1. "DIVS,Divider start value"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "MUX_0_CSC,Clock Mux 0 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1"
|
|
bitfld.long 0x0 1. "RAMPDOWN,PCFS ramp-down" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "RAMPUP,PCFS ramp-up" "0,1"
|
|
rgroup.long 0x304++0x3
|
|
line.long 0x0 "MUX_0_CSS,Clock Mux 0 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress."
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested."
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested."
|
|
bitfld.long 0x0 1. "RAMPDOWN,PCFS ramp-down" "0: No ramp-down operation was requested.,1: Ramp-down operation was requested."
|
|
newline
|
|
bitfld.long 0x0 0. "RAMPUP,PCFS ramp-up" "0: No ramp-up operation was requested.,1: Ramp-up operation was requested."
|
|
group.long 0x308++0x13
|
|
line.long 0x0 "MUX_0_DC_0,Clock Mux 0 Divider 0 Control Register"
|
|
rbitfld.long 0x0 31. "DE,Divider enable" "0: Unused,1: Divider is enabled."
|
|
bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "MUX_0_DC_1,Clock Mux 0 Divider 1 Control Register"
|
|
rbitfld.long 0x4 31. "DE,Divider enable" "0: Unused,1: Divider is enabled."
|
|
bitfld.long 0x4 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "MUX_0_DC_2,Clock Mux 0 Divider 2 Control Register"
|
|
rbitfld.long 0x8 31. "DE,Divider enable" "0: Unused,1: Divider is enabled."
|
|
hexmask.long.byte 0x8 16.--19. 1. "DIV,Division value"
|
|
line.long 0xC "MUX_0_DC_3,Clock Mux 0 Divider 3 Control Register"
|
|
rbitfld.long 0xC 31. "DE,Divider enable" "0: Unused,1: Divider is enabled."
|
|
bitfld.long 0xC 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "MUX_0_DC_4,Clock Mux 0 Divider 4 Control Register"
|
|
rbitfld.long 0x10 31. "DE,Divider enable" "0: Unused,1: Divider is enabled."
|
|
bitfld.long 0x10 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
group.long 0x334++0x7
|
|
line.long 0x0 "MUX_0_DIV_TRIG_CTRL,Clock Mux 0 Divider Trigger Control Register"
|
|
bitfld.long 0x0 31. "HHEN,Halt handshake enable" "0: No halt handshake protocol is initiated.,1: Halt handshake protocol is initiated."
|
|
bitfld.long 0x0 0. "TCTL,Trigger control" "0: Immediate divider update,1: Common trigger divider update"
|
|
line.long 0x4 "MUX_0_DIV_TRIG,Clock Mux 0 Divider Trigger Register"
|
|
hexmask.long 0x4 0.--31. 1. "TRIGGER,Trigger for divider update"
|
|
rgroup.long 0x33C++0x3
|
|
line.long 0x0 "MUX_0_DIV_UPD_STAT,Clock Mux 0 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 0" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
group.long 0x340++0x3
|
|
line.long 0x0 "MUX_1_CSC,Clock Mux 1 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1"
|
|
rgroup.long 0x344++0x3
|
|
line.long 0x0 "MUX_1_CSS,Clock Mux 1 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress."
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested."
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested."
|
|
group.long 0x348++0x3
|
|
line.long 0x0 "MUX_1_DC_0,Clock Mux 1 Divider 0 Control Register"
|
|
bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled."
|
|
bitfld.long 0x0 16. "DIV,Division value" "0,1"
|
|
rgroup.long 0x37C++0x3
|
|
line.long 0x0 "MUX_1_DIV_UPD_STAT,Clock Mux 1 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 1" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
group.long 0x3C0++0x3
|
|
line.long 0x0 "MUX_3_CSC,Clock Mux 3 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0,1"
|
|
rgroup.long 0x3C4++0x3
|
|
line.long 0x0 "MUX_3_CSS,Clock Mux 3 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--28. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17.--19. "SWTRG,Switch trigger cause" "?,1: Switch after request succeeded.,2: Switch after the request failed because of an..,3: Switch after the request failed because of an..,4: Switch to FIRC because of a safe clock request..,5: Switch to FIRC because of a safe clock request..,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "SWIP,Switch in progress" "0: Clock source switching is complete.,1: Clock source switching is in progress."
|
|
bitfld.long 0x0 3. "SAFE_SW,Safe clock request" "0: No safe clock switch operation was requested.,1: Safe clock switch operation was requested."
|
|
newline
|
|
bitfld.long 0x0 2. "CLK_SW,Clock switch" "0: No clock switch operation was requested.,1: Clock switch operation was requested."
|
|
group.long 0x3C8++0x3
|
|
line.long 0x0 "MUX_3_DC_0,Clock Mux 3 Divider 0 Control Register"
|
|
bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled."
|
|
bitfld.long 0x0 16.--17. "DIV,Division value" "0,1,2,3"
|
|
rgroup.long 0x3FC++0x3
|
|
line.long 0x0 "MUX_3_DIV_UPD_STAT,Clock Mux 3 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 3" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
group.long 0x440++0x3
|
|
line.long 0x0 "MUX_5_CSC,Clock Mux 5 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "FCG,Force clock gate" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CG,Clock gate" "0,1"
|
|
rgroup.long 0x444++0x3
|
|
line.long 0x0 "MUX_5_CSS,Clock Mux 5 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.."
|
|
newline
|
|
bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress."
|
|
group.long 0x448++0x3
|
|
line.long 0x0 "MUX_5_DC_0,Clock Mux 5 Divider 0 Control Register"
|
|
bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled."
|
|
bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x47C++0x3
|
|
line.long 0x0 "MUX_5_DIV_UPD_STAT,Clock Mux 5 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 5" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
group.long 0x480++0x3
|
|
line.long 0x0 "MUX_6_CSC,Clock Mux 6 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "FCG,Force clock gate" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CG,Clock gate" "0,1"
|
|
rgroup.long 0x484++0x3
|
|
line.long 0x0 "MUX_6_CSS,Clock Mux 6 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--29. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.."
|
|
newline
|
|
bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress."
|
|
group.long 0x488++0x3
|
|
line.long 0x0 "MUX_6_DC_0,Clock Mux 6 Divider 0 Control Register"
|
|
bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled."
|
|
hexmask.long.byte 0x0 16.--21. 1. "DIV,Division value"
|
|
rgroup.long 0x4BC++0x3
|
|
line.long 0x0 "MUX_6_DIV_UPD_STAT,Clock Mux 6 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 6" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
group.long 0x5C0++0x3
|
|
line.long 0x0 "MUX_11_CSC,Clock Mux 11 Select Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELCTL,Clock source selection control"
|
|
bitfld.long 0x0 3. "FCG,Force clock gate" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "CG,Clock gate" "0,1"
|
|
rgroup.long 0x5C4++0x3
|
|
line.long 0x0 "MUX_11_CSS,Clock Mux 11 Select Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SELSTAT,Clock source selection status"
|
|
bitfld.long 0x0 17. "CS,Clock status" "0: Clock is gated to logic-0 at output of clock mux,1: Clock mux is transparent. Active clock pulses at.."
|
|
newline
|
|
bitfld.long 0x0 16. "GRIP,Gating request is in progress." "0: Clock source gating or ungating has completed.,1: Clock source gating or ungating is in progress."
|
|
group.long 0x5C8++0x3
|
|
line.long 0x0 "MUX_11_DC_0,Clock Mux 11 Divider 0 Control Register"
|
|
bitfld.long 0x0 31. "DE,Divider enable" "0: Divider is disabled.,1: Divider is enabled."
|
|
bitfld.long 0x0 16.--18. "DIV,Division value" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0x5FC++0x3
|
|
line.long 0x0 "MUX_11_DIV_UPD_STAT,Clock Mux 11 Divider Update Status Register"
|
|
bitfld.long 0x0 0. "DIV_STAT,Divider status for clock mux 11" "0: No divider configuration update is pending.,1: Divider configuration update on at least one.."
|
|
tree.end
|
|
tree "MC_ME"
|
|
base ad:0x402DC000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "CTL_KEY,Control Key Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "KEY,Control key"
|
|
line.long 0x4 "MODE_CONF,Mode Configuration Register"
|
|
bitfld.long 0x4 15. "STANDBY,Standby request" "0,1"
|
|
bitfld.long 0x4 1. "FUNC_RST,Functional reset request" "0,1"
|
|
bitfld.long 0x4 0. "DEST_RST,Destructive reset request" "0,1"
|
|
line.long 0x8 "MODE_UPD,Mode Update Register"
|
|
bitfld.long 0x8 0. "MODE_UPD,Mode update" "0,1"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "MODE_STAT,Mode Status Register"
|
|
bitfld.long 0x0 0. "PREV_MODE,Previous mode" "0: The previous mode was reset (any reset).,1: The previous mode was standby."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "MAIN_COREID,Main Core ID Register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "PIDX,Partition index"
|
|
bitfld.long 0x0 0.--2. "CIDX,Core index" "0,1,2,3,4,5,6,7"
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "PRTN0_PCONF,Partition 0 Process Configuration Register"
|
|
bitfld.long 0x0 0. "PCE,Partition clock enable" "0: Disable the clock to IPs,1: Enable the clock to IPs"
|
|
line.long 0x4 "PRTN0_PUPD,Partition 0 Process Update Register"
|
|
bitfld.long 0x4 0. "PCUD,Partition clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process"
|
|
rgroup.long 0x108++0x3
|
|
line.long 0x0 "PRTN0_STAT,Partition 0 Status Register"
|
|
bitfld.long 0x0 0. "PCS,Partition clock status" "0: Clock is inactive,1: Clock is active"
|
|
rgroup.long 0x114++0x3
|
|
line.long 0x0 "PRTN0_COFB1_STAT,Partition 0 COFB Set 1 Clock Status Register"
|
|
bitfld.long 0x0 30. "BLOCK62,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 16. "BLOCK48,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 13. "BLOCK45,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 12. "BLOCK44,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 9. "BLOCK41,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 8. "BLOCK40,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 7. "BLOCK39,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 6. "BLOCK38,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 3. "BLOCK35,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 2. "BLOCK34,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 1. "BLOCK33,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
group.long 0x134++0x3
|
|
line.long 0x0 "PRTN0_COFB1_CLKEN,Partition 0 COFB Set 1 Clock Enable Register"
|
|
bitfld.long 0x0 30. "REQ62,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 16. "REQ48,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 13. "REQ45,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 12. "REQ44,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 9. "REQ41,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 8. "REQ40,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 7. "REQ39,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 6. "REQ38,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 3. "REQ35,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 2. "REQ34,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 1. "REQ33,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 0. "REQ32,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
group.long 0x140++0x7
|
|
line.long 0x0 "PRTN0_CORE0_PCONF,Partition 0 Core 0 Process Configuration Register"
|
|
bitfld.long 0x0 0. "CCE,Core 0 clock enable" "0: Disable the core clock,1: Enable the core clock"
|
|
line.long 0x4 "PRTN0_CORE0_PUPD,Partition 0 Core 0 Process Update Register"
|
|
bitfld.long 0x4 0. "CCUPD,Core 0 clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process"
|
|
rgroup.long 0x148++0x3
|
|
line.long 0x0 "PRTN0_CORE0_STAT,Partition 0 Core 0 Status Register"
|
|
bitfld.long 0x0 31. "WFI,Wait for interrupt status" "0: No WFI executed,1: WFI executed"
|
|
bitfld.long 0x0 0. "CCS,Core 0 clock process status" "0: Clock is inactive.,1: Clock is active."
|
|
group.long 0x14C++0x3
|
|
line.long 0x0 "PRTN0_CORE0_ADDR,Partition 0 Core 0 Address Register"
|
|
hexmask.long 0x0 2.--31. 1. "ADDR,Address"
|
|
group.long 0x300++0x7
|
|
line.long 0x0 "PRTN1_PCONF,Partition 1 Process Configuration Register"
|
|
bitfld.long 0x0 0. "PCE,Partition clock enable" "0: Disable the clock to IPs,1: Enable the clock to IPs"
|
|
line.long 0x4 "PRTN1_PUPD,Partition 1 Process Update Register"
|
|
bitfld.long 0x4 0. "PCUD,Partition clock update" "0: Do not trigger the hardware process,1: Trigger the hardware process"
|
|
rgroup.long 0x308++0x3
|
|
line.long 0x0 "PRTN1_STAT,Partition 1 Status Register"
|
|
bitfld.long 0x0 0. "PCS,Partition clock status" "0: Clock is inactive,1: Clock is active"
|
|
rgroup.long 0x310++0xF
|
|
line.long 0x0 "PRTN1_COFB0_STAT,Partition 1 COFB Set 0 Clock Status Register"
|
|
bitfld.long 0x0 31. "BLOCK31,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 30. "BLOCK30,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 29. "BLOCK29,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 28. "BLOCK28,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 27. "BLOCK27,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 26. "BLOCK26,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 25. "BLOCK25,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 24. "BLOCK24,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 23. "BLOCK23,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 22. "BLOCK22,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 21. "BLOCK21,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 20. "BLOCK20,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 19. "BLOCK19,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 18. "BLOCK18,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 17. "BLOCK17,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 16. "BLOCK16,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 15. "BLOCK15,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 14. "BLOCK14,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 13. "BLOCK13,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 12. "BLOCK12,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 11. "BLOCK11,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 10. "BLOCK10,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 9. "BLOCK9,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 8. "BLOCK8,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 7. "BLOCK7,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 6. "BLOCK6,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 5. "BLOCK5,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x0 4. "BLOCK4,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 3. "BLOCK3,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x0 1. "BLOCK1,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
line.long 0x4 "PRTN1_COFB1_STAT,Partition 1 COFB Set 1 Clock Status Register"
|
|
bitfld.long 0x4 28. "BLOCK60,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 27. "BLOCK59,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 26. "BLOCK58,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 24. "BLOCK56,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 23. "BLOCK55,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 22. "BLOCK54,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 21. "BLOCK53,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 20. "BLOCK52,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 18. "BLOCK50,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 17. "BLOCK49,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 15. "BLOCK47,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 13. "BLOCK45,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 11. "BLOCK43,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 10. "BLOCK42,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 7. "BLOCK39,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 6. "BLOCK38,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 5. "BLOCK37,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 4. "BLOCK36,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 3. "BLOCK35,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 2. "BLOCK34,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x4 1. "BLOCK33,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x4 0. "BLOCK32,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
line.long 0x8 "PRTN1_COFB2_STAT,Partition 1 COFB Set 2 Clock Status Register"
|
|
bitfld.long 0x8 31. "BLOCK95,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 28. "BLOCK92,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 25. "BLOCK89,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x8 24. "BLOCK88,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 23. "BLOCK87,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 22. "BLOCK86,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x8 21. "BLOCK85,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 20. "BLOCK84,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 13. "BLOCK77,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x8 12. "BLOCK76,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 11. "BLOCK75,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 10. "BLOCK74,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x8 9. "BLOCK73,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 3. "BLOCK67,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0x8 2. "BLOCK66,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0x8 1. "BLOCK65,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
line.long 0xC "PRTN1_COFB3_STAT,Partition 1 COFB Set 3 Clock Status Register"
|
|
bitfld.long 0xC 13. "BLOCK109,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 11. "BLOCK107,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 10. "BLOCK106,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0xC 9. "BLOCK105,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 8. "BLOCK104,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 7. "BLOCK103,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0xC 6. "BLOCK102,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 5. "BLOCK101,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 4. "BLOCK100,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0xC 3. "BLOCK99,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 2. "BLOCK98,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
bitfld.long 0xC 1. "BLOCK97,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
newline
|
|
bitfld.long 0xC 0. "BLOCK96,IP block status" "0: Clock is not running.,1: Clock is running."
|
|
group.long 0x330++0xF
|
|
line.long 0x0 "PRTN1_COFB0_CLKEN,Partition 1 COFB Set 0 Clock Enable Register"
|
|
bitfld.long 0x0 31. "REQ31,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 29. "REQ29,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 28. "REQ28,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
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bitfld.long 0x0 24. "REQ24,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 23. "REQ23,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 22. "REQ22,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 21. "REQ21,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 15. "REQ15,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 14. "REQ14,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 13. "REQ13,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 12. "REQ12,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 11. "REQ11,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 10. "REQ10,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 9. "REQ9,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 8. "REQ8,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x0 7. "REQ7,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 6. "REQ6,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 5. "REQ5,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
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bitfld.long 0x0 4. "REQ4,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x0 3. "REQ3,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
line.long 0x4 "PRTN1_COFB1_CLKEN,Partition 1 COFB Set 1 Clock Enable Register"
|
|
bitfld.long 0x4 24. "REQ56,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 21. "REQ53,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 17. "REQ49,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
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bitfld.long 0x4 15. "REQ47,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 13. "REQ45,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 10. "REQ42,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x4 2. "REQ34,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 1. "REQ33,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x4 0. "REQ32,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
line.long 0x8 "PRTN1_COFB2_CLKEN,Partition 1 COFB Set 2 Clock Enable Register"
|
|
bitfld.long 0x8 31. "REQ95,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 28. "REQ92,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 25. "REQ89,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x8 24. "REQ88,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 23. "REQ87,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 22. "REQ86,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x8 21. "REQ85,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 20. "REQ84,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 13. "REQ77,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x8 12. "REQ76,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 11. "REQ75,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 10. "REQ74,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x8 9. "REQ73,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 3. "REQ67,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0x8 2. "REQ66,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
newline
|
|
bitfld.long 0x8 1. "REQ65,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
line.long 0xC "PRTN1_COFB3_CLKEN,Partition 1 COFB Set 3 Clock Enable Register"
|
|
bitfld.long 0xC 8. "REQ104,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0xC 6. "REQ102,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
|
bitfld.long 0xC 0. "REQ96,Clock enable" "0: Clock is turned off.,1: Clock is turned on."
|
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tree.end
|
|
tree "MC_RGM"
|
|
base ad:0x4028C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "DES,Destructive Event Status Register"
|
|
eventfld.long 0x0 30. "DEBUG_DEST,Flag for 'Destructive' Reset DEBUG_DEST" "0: 'Destructive' reset event DEBUG_DEST has not..,1: 'Destructive' reset event DEBUG_DEST has occurred."
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eventfld.long 0x0 29. "SW_DEST,Flag for 'Destructive' Reset SW_DEST" "0: 'Destructive' reset event SW_DEST has not..,1: 'Destructive' reset event SW_DEST has occurred."
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|
newline
|
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eventfld.long 0x0 18. "HSE_SNVS_RST,Flag for 'Destructive' Reset HSE_SNVS_RST" "0: 'Destructive' reset event HSE_SNVS_RST has not..,1: 'Destructive' reset event HSE_SNVS_RST has.."
|
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eventfld.long 0x0 17. "HSE_TMPR_RST,Flag for 'Destructive' Reset HSE_TMPR_RST" "0: 'Destructive' reset event HSE_TMPR_RST has not..,1: 'Destructive' reset event HSE_TMPR_RST has.."
|
|
newline
|
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eventfld.long 0x0 15. "SYS_DIV_FAIL,Flag for 'Destructive' Reset SYS_DIV_FAIL" "0: 'Destructive' reset event SYS_DIV_FAIL has not..,1: 'Destructive' reset event SYS_DIV_FAIL has.."
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eventfld.long 0x0 14. "HSE_CLK_FAIL,Flag for 'Destructive' Reset HSE_CLK_FAIL" "0: 'Destructive' reset event HSE_CLK_FAIL has not..,1: 'Destructive' reset event HSE_CLK_FAIL has.."
|
|
newline
|
|
eventfld.long 0x0 12. "AIPS_PLAT_CLK_FAIL,Flag for 'Destructive' Reset AIPS_PLAT_CLK_FAIL" "0: 'Destructive' reset event AIPS_PLAT_CLK_FAIL has..,1: 'Destructive' reset event AIPS_PLAT_CLK_FAIL has.."
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eventfld.long 0x0 10. "CORE_CLK_FAIL,Flag for 'Destructive' Reset CORE_CLK_FAIL" "0: 'Destructive' reset event CORE_CLK_FAIL has not..,1: 'Destructive' reset event CORE_CLK_FAIL has.."
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|
newline
|
|
eventfld.long 0x0 9. "PLL_LOL,Flag for 'Destructive' Reset PLL_LOL" "0: 'Destructive' reset event PLL_LOL has not..,1: 'Destructive' reset event PLL_LOL has occurred."
|
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eventfld.long 0x0 8. "FXOSC_FAIL,Flag for 'Destructive' Reset FXOSC_FAIL" "0: 'Destructive' reset event FXOSC_FAIL has not..,1: 'Destructive' reset event FXOSC_FAIL has occurred."
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|
newline
|
|
eventfld.long 0x0 6. "MC_RGM_FRE,Flag for 'Destructive' Reset MC_RGM_FRE" "0: 'Destructive' reset event MC_RGM_FRE has not..,1: 'Destructive' reset event MC_RGM_FRE has occurred."
|
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eventfld.long 0x0 4. "STCU_URF,Flag for 'Destructive' Reset STCU_URF" "0: 'Destructive' reset event STCU_URF has not..,1: 'Destructive' reset event STCU_URF has occurred."
|
|
newline
|
|
eventfld.long 0x0 3. "FCCU_FTR,Flag for 'Destructive' Reset FCCU_FTR" "0: 'Destructive' reset event FCCU_FTR has not..,1: 'Destructive' reset event FCCU_FTR has occurred."
|
|
eventfld.long 0x0 0. "F_POR,Flag for power-on reset" "0: No power-on event has occurred since the last..,1: A power-on event has occurred."
|
|
group.long 0x8++0x23
|
|
line.long 0x0 "FES,Functional /External Reset Status Register"
|
|
eventfld.long 0x0 30. "DEBUG_FUNC,Flag for 'Functional' Reset DEBUG_FUNC" "0: 'Functional' reset event DEBUG_FUNC has not..,1: 'Functional' reset event DEBUG_FUNC has occurred."
|
|
eventfld.long 0x0 29. "SW_FUNC,Flag for 'Functional' Reset SW_FUNC" "0: 'Functional' reset event SW_FUNC has not..,1: 'Functional' reset event SW_FUNC has occurred."
|
|
newline
|
|
eventfld.long 0x0 20. "HSE_BOOT_RST,Flag for 'Functional' Reset HSE_BOOT_RST" "0: 'Functional' reset event HSE_BOOT_RST has not..,1: 'Functional' reset event HSE_BOOT_RST has.."
|
|
eventfld.long 0x0 16. "HSE_SWT_RST,Flag for 'Functional' Reset HSE_SWT_RST" "0: 'Functional' reset event HSE_SWT_RST has not..,1: 'Functional' reset event HSE_SWT_RST has occurred."
|
|
newline
|
|
eventfld.long 0x0 9. "JTAG_RST,Flag for 'Functional' Reset JTAG_RST" "0: 'Functional' reset event JTAG_RST has not..,1: 'Functional' reset event JTAG_RST has occurred."
|
|
eventfld.long 0x0 6. "SWT0_RST,Flag for 'Functional' Reset SWT0_RST" "0: 'Functional' reset event SWT0_RST has not..,1: 'Functional' reset event SWT0_RST has occurred."
|
|
newline
|
|
eventfld.long 0x0 4. "ST_DONE,Flag for 'Functional' Reset ST_DONE" "0: 'Functional' reset event ST_DONE has not..,1: 'Functional' reset event ST_DONE has occurred."
|
|
eventfld.long 0x0 3. "FCCU_RST,Flag for 'Functional' Reset FCCU_RST" "0: 'Functional' reset event FCCU_RST has not..,1: 'Functional' reset event FCCU_RST has occurred."
|
|
newline
|
|
eventfld.long 0x0 0. "F_EXR,Flag for External Reset" "0: No external reset event has occurred since..,1: An external reset event has occurred."
|
|
line.long 0x4 "FERD,Functional Event Reset Disable Register"
|
|
bitfld.long 0x4 30. "D_DEBUG_FUNC,DEBUG_FUNC Disable Control" "0: Functional reset event DEBUG_FUNC triggers a..,1: Functional reset event DEBUG_FUNC generates an.."
|
|
bitfld.long 0x4 9. "D_JTAG_RST,JTAG_RST Disable Control" "0: Functional reset event JTAG_RST triggers a reset..,1: Functional reset event JTAG_RST generates an.."
|
|
newline
|
|
bitfld.long 0x4 6. "D_SWT0_RST,SWT0_RST Disable Control" "0: Functional reset event SWT0_RST triggers a reset..,1: Functional reset event SWT0_RST generates an.."
|
|
bitfld.long 0x4 3. "D_FCCU_RST,FCCU_RST Disable Control" "0: Functional reset event FCCU_RST triggers a reset..,1: Functional reset event FCCU_RST generates an.."
|
|
line.long 0x8 "FBRE,Functional Bidirectional Reset Enable Register"
|
|
rbitfld.long 0x8 30. "BE_DEBUG_FUNC,Bidirectional Reset Enables for 'Functional' Reset DEBUG_FUNC" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
rbitfld.long 0x8 29. "BE_SW_FUNC,Bidirectional Reset Enables for 'Functional' Reset SW_FUNC" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
newline
|
|
rbitfld.long 0x8 20. "BE_HSE_BOOT_RST,Bidirectional Reset Enables for 'Functional' Reset HSE_BOOT_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
rbitfld.long 0x8 16. "BE_HSE_SWT_RST,Bidirectional Reset Enables for 'Functional' Reset HSE_SWT_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
newline
|
|
rbitfld.long 0x8 9. "BE_JTAG_RST,Bidirectional Reset Enables for 'Functional' Reset JTAG_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
rbitfld.long 0x8 6. "BE_SWT0_RST,Bidirectional Reset Enables for 'Functional' Reset SWT0_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
newline
|
|
bitfld.long 0x8 4. "BE_ST_DONE,Bidirectional Reset Enables for 'Functional' Reset ST_DONE" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
rbitfld.long 0x8 3. "BE_FCCU_RST,Bidirectional Reset Enables for 'Functional' Reset FCCU_RST" "0: External reset pin is asserted on a 'Functional'..,1: External reset pin is not asserted on a.."
|
|
line.long 0xC "FREC,Functional Reset Escalation Counter Register"
|
|
hexmask.long.byte 0xC 0.--3. 1. "FREC,Functional' Reset Escalation Counter"
|
|
line.long 0x10 "FRET,Functional Reset Escalation Threshold Register"
|
|
hexmask.long.byte 0x10 0.--3. 1. "FRET,'Functional' Reset Escalation Threshold"
|
|
line.long 0x14 "DRET,Destructive Reset Escalation Threshold Register"
|
|
hexmask.long.byte 0x14 0.--3. 1. "DRET,'Destructive' Reset Escalation Threshold"
|
|
line.long 0x18 "ERCTRL,External Reset Control Register"
|
|
bitfld.long 0x18 0. "ERASSERT,ERASSERT" "0: No change,1: External reset is asserted"
|
|
line.long 0x1C "RDSS,Reset During Standby Status Register"
|
|
eventfld.long 0x1C 1. "FES_RES,FES_RES" "0: No functional reset event occurred during..,1: Functional reset event occurred during standby.."
|
|
eventfld.long 0x1C 0. "DES_RES,DES_RES" "0: No destructive reset event occurred during..,1: Destructive reset event occurred during standby.."
|
|
line.long 0x20 "FRENTC,Functional Reset Entry Timeout Control Register"
|
|
hexmask.long 0x20 1.--31. 1. "FRET_TIMEOUT,Functional Reset Entry Timer Value"
|
|
bitfld.long 0x20 0. "FRET_EN,Functional Reset Entry Timer Enable/Disable" "0: Functional reset entry timer is disabled.,1: Functional reset entry timer is enabled"
|
|
rgroup.long 0x2C++0x3
|
|
line.long 0x0 "LPDEBUG,Low Power Debug Control Register"
|
|
bitfld.long 0x0 0. "LP_DBG_EN,Low-Power Debug Enable/Disable Control" "0: Low-power debug disabled,1: Debug data collection enabled before entering.."
|
|
tree.end
|
|
tree "MCM_CM7"
|
|
base ad:0xE0080000
|
|
rgroup.word 0x0++0x3
|
|
line.word 0x0 "PLREV,SoC-defined Platform Revision"
|
|
hexmask.word 0x0 0.--15. 1. "PLREV,The PLREV[15:0] field is specified by a platform input signal to define a software-visible revision number."
|
|
line.word 0x2 "PCT,Processor Core Type"
|
|
hexmask.word 0x2 0.--15. 1. "PCT,This MCM design supports the Arm Cortex M7 core. The following value identifies this core complex."
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "CPCR,Core Platform Control"
|
|
bitfld.long 0x0 27. "CM7_AHBSPRI,AHB Slave Priority" "0: Uses a round-robin arbitration scheme,1: AHB-slave access has priority over a core access"
|
|
line.long 0x4 "ISCR,Interrupt Status and Control"
|
|
bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 21. "WABE,TCM Write Abort Interrupt Enable" "0: Disable interrupt,1: Enable Interrupt"
|
|
rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 6. "WABSO,Write Abort on Slave Overrun" "0: No write abort overrun,1: Write abort overrun occurred"
|
|
newline
|
|
eventfld.long 0x4 5. "WABS,Write Abort on Slave" "0: No write abort occurred on AHBS interface,1: Write abort occurred on AHBS interface"
|
|
rgroup.long 0x400++0x13
|
|
line.long 0x0 "LMEM_DESC_0,Local Memory Descriptor 0"
|
|
bitfld.long 0x0 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present"
|
|
bitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.."
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "LMSZ,Local Memory Size"
|
|
hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
bitfld.long 0x0 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x0 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?"
|
|
line.long 0x4 "LMEM_DESC_1,Local Memory Descriptor 1"
|
|
bitfld.long 0x4 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present"
|
|
bitfld.long 0x4 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.."
|
|
newline
|
|
hexmask.long.byte 0x4 24.--27. 1. "LMSZ,Local Memory Size"
|
|
hexmask.long.byte 0x4 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
bitfld.long 0x4 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x4 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?"
|
|
line.long 0x8 "LMEM_DESC_2,Local Memory Descriptor 2"
|
|
bitfld.long 0x8 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present"
|
|
bitfld.long 0x8 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.."
|
|
newline
|
|
hexmask.long.byte 0x8 24.--27. 1. "LMSZ,Local Memory Size"
|
|
hexmask.long.byte 0x8 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
bitfld.long 0x8 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x8 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?"
|
|
line.long 0xC "LMEM_DESC_3,Local Memory Descriptor 3"
|
|
bitfld.long 0xC 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present"
|
|
bitfld.long 0xC 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.."
|
|
newline
|
|
hexmask.long.byte 0xC 24.--27. 1. "LMSZ,Local Memory Size"
|
|
hexmask.long.byte 0xC 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
bitfld.long 0xC 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?"
|
|
bitfld.long 0xC 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?"
|
|
line.long 0x10 "LMEM_DESC_4,Local Memory Descriptor 4"
|
|
bitfld.long 0x10 31. "LMV,Local Memory Valid" "0: LMEMn not present,1: LMEMn present"
|
|
bitfld.long 0x10 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity,1: LMEMn is not a power-of-2 with capacity of 0.75.."
|
|
newline
|
|
hexmask.long.byte 0x10 24.--27. 1. "LMSZ,Local Memory Size"
|
|
hexmask.long.byte 0x10 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
bitfld.long 0x10 17.--19. "DPW,Data Path Width" "?,?,2: LMEMn is 32-bits wide,3: LMEMn is 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x10 13.--15. "MT,Memory Type" "0: ITCM,1: DTCM,2: ICACHE,3: DCACHE,?,?,?,?"
|
|
tree.end
|
|
tree "MDM_AP"
|
|
base edp:0x600
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "MDMAPSTTS,Status"
|
|
bitfld.long 0x0 28. "CM70DBGRSTRD,Cortex-M7_0 Debug Restarted" "0: In Debug mode,1: In Normal mode"
|
|
bitfld.long 0x0 20. "CM70SLPNG,Cortex-M7_0 Sleeping" "0: Not in Sleep mode,1: In Sleep mode"
|
|
newline
|
|
bitfld.long 0x0 16. "CM70DPSLP,Cortex-M7_0 Deep Sleep" "0: Not in Deep Sleep mode,1: In Deep Sleep mode"
|
|
bitfld.long 0x0 12. "CM70HLT,Cortex-M7_0 Halted" "0: Core is not halted,1: Core is halted"
|
|
newline
|
|
bitfld.long 0x0 2. "FUNCRST,Functional Reset" "0: Not in functional reset,1: In functional reset"
|
|
bitfld.long 0x0 1. "DESTRST,Destructive Reset" "0: Not in destructive reset,1: In destructive reset"
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "MDMAPCTL,Control"
|
|
bitfld.long 0x0 28. "CM70DBGRSRT,Cortex-M7_0 Debug Restart" "0: Normal operation,1: Request asserted"
|
|
bitfld.long 0x0 22. "SWOOVRD,SWO Override" "0: Not overridden and SWO generates the trace..,1: Is overridden"
|
|
newline
|
|
bitfld.long 0x0 15. "POR_WDG_DIS,Power Watchdog Status" "0: Power watchdog is disabled,1: Power watchdog is enabled"
|
|
bitfld.long 0x0 13. "DBGRSTFASTPAD,Debug Over Reset Via Fast Pads" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "DBGRSTSLOWPAD,Debug Over Reset Via Slow Pads" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 8. "CM70DBGREQ,Cortex-M7_0 Debug Request" "0: Debug request is not generated,1: Debug request is generated"
|
|
newline
|
|
bitfld.long 0x0 5. "SYSFUNCRST,System Functional Reset" "0: Deasserted,1: Asserted"
|
|
bitfld.long 0x0 4. "SYSRESETREQ,System Destructive Reset" "0: Deasserted,1: Asserted"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "MDMAPWIREN,WIR Enable"
|
|
bitfld.long 0x0 1. "LWPRSTPRVT,Low-Power Entry" "0: Prevents MC_RGM from generating the reset until..,1: Prevents MC_RGM from generating the reset even.."
|
|
bitfld.long 0x0 0. "LWPWREN,Low Power Debug Enable" "0: Disabled,1: Enabled"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "MDMAPWIRSTTS,WIR Status"
|
|
hexmask.long 0x0 0.--31. 1. "MDM_DAP_WIR_STATUS,MDM_AP WIR Status"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "MDMAPWIRREL,WIR Release"
|
|
bitfld.long 0x0 0. "WTRSTRGM,Wait In Reset B" "0: Normal operation,1: Wait supported"
|
|
rgroup.long 0xFC++0x3
|
|
line.long 0x0 "ID,Identity"
|
|
hexmask.long 0x0 0.--31. 1. "ID,Identity"
|
|
tree.end
|
|
tree "MEM_OTP_AE"
|
|
base ad:0x120
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRL_CMD,Control Command"
|
|
hexmask.word.byte 0x0 0.--5. 1. "CMD,Command"
|
|
line.word 0x2 "STRT_STP,Start Stop"
|
|
hexmask.word.byte 0x2 8.--15. 1. "STOP,Stop"
|
|
hexmask.word.byte 0x2 0.--7. 1. "START,Start"
|
|
rgroup.word 0x8++0x3
|
|
line.word 0x0 "DATAOUT,Data Output"
|
|
hexmask.word.byte 0x0 8.--15. 1. "MIRRD,Mirror Read Direct"
|
|
hexmask.word.byte 0x0 0.--7. 1. "OUTPUT,Output"
|
|
line.word 0x2 "STATUS,Status"
|
|
bitfld.word 0x2 11. "SECTBE3,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 10. "SECTBE2,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 9. "SECTBE1,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.word 0x2 8. "SECTBE0,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 7. "SECTWP3,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 6. "SECTWP2,Sector Write Protect" "0: Not protected,1: Protected"
|
|
newline
|
|
bitfld.word 0x2 5. "SECTWP1,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 4. "SECTWP0,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 3. "SECTCRCOK3,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
newline
|
|
bitfld.word 0x2 2. "SECTCRCOK2,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
bitfld.word 0x2 1. "SECTCRCOK1,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
bitfld.word 0x2 0. "SECTCRCOK0,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
rgroup.word 0x1C++0x3
|
|
line.word 0x0 "ERROR,Error"
|
|
bitfld.word 0x0 14. "BOOTERR,Boot Error" "0: No error,1: Error"
|
|
bitfld.word 0x0 10. "ECC2ERR,ECC 2-bit Error" "0: No error,1: Error"
|
|
bitfld.word 0x0 9. "ECC1ERR,ECC 1-bit Error" "0: No error,1: bit Error"
|
|
newline
|
|
bitfld.word 0x0 7. "CTRLERR,Error" "0,1"
|
|
bitfld.word 0x0 6. "CTRLBUSY,Busy" "0: Idle,1: Executing a command or booting the OTP"
|
|
line.word 0x2 "MODE,Mode"
|
|
hexmask.word.byte 0x2 12.--15. 1. "VERID,Version Identifier"
|
|
bitfld.word 0x2 9.--10. "SUPERUSR,Superuser Mode" "0: User mode,1: Superuser mode,?,?"
|
|
bitfld.word 0x2 8. "TSTIC,IC Test" "0: Normal operation,1: IC Test mode"
|
|
newline
|
|
bitfld.word 0x2 3. "SECTCRCCOMP3,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
bitfld.word 0x2 2. "SECTCRCCOMP2,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
bitfld.word 0x2 1. "SECTCRCCOMP1,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
newline
|
|
bitfld.word 0x2 0. "SECTCRCCOMP0,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
tree.end
|
|
tree "MSCM"
|
|
base ad:0x40260000
|
|
rgroup.long 0x0++0x1B
|
|
line.long 0x0 "CPXTYPE,Processor X Type"
|
|
hexmask.long 0x0 0.--31. 1. "PERSONALITY,Personality of CPx"
|
|
line.long 0x4 "CPXNUM,Processor X Number"
|
|
bitfld.long 0x4 0.--1. "CPN,Processor Number" "0,1,2,3"
|
|
line.long 0x8 "CPXREV,Processor X Revision"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision"
|
|
line.long 0xC "CPXCFG0,Processor X Configuration 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0xC 16.--23. 1. "ICWY,L1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways"
|
|
line.long 0x10 "CPXCFG1,Processor X Configuration 1"
|
|
hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size"
|
|
hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways"
|
|
line.long 0x14 "CPXCFG2,Processor X Configuration 2"
|
|
hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size"
|
|
hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size"
|
|
line.long 0x18 "CPXCFG3,Processor x Configuration 3"
|
|
bitfld.long 0x18 4. "CPY,Cryptography" "0: Not supported,1: Supported"
|
|
bitfld.long 0x18 3. "CMP,Core Memory Protection Unit" "0: Not included,1: Included"
|
|
newline
|
|
bitfld.long 0x18 2. "MMU,Memory Management Unit" "0: Not supported,1: Supported"
|
|
bitfld.long 0x18 1. "SIMD,SIMD/NEON Instruction Support" "0: Not included,1: Included"
|
|
newline
|
|
bitfld.long 0x18 0. "FPU,Floating Point Unit" "0: Not provided,1: Provided"
|
|
rgroup.long 0x20++0x1B
|
|
line.long 0x0 "CP0TYPE,Processor 0 Type"
|
|
hexmask.long 0x0 0.--31. 1. "PERSONALITY,Processor Personality"
|
|
line.long 0x4 "CP0NUM,Processor 0 Number"
|
|
bitfld.long 0x4 0.--1. "CPN,Processor Number" "0,1,2,3"
|
|
line.long 0x8 "CP0REV,Processor 0 Count"
|
|
hexmask.long.byte 0x8 0.--7. 1. "RYPZ,Processor Revision"
|
|
line.long 0xC "CP0CFG0,Processor 0 Configuration 0"
|
|
hexmask.long.byte 0xC 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0xC 16.--23. 1. "ICWY,L1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "DCSZ,L1 Data Cache Size"
|
|
hexmask.long.byte 0xC 0.--7. 1. "DCWY,L1 Data Cache Ways"
|
|
line.long 0x10 "CP0CFG1,Processor 0 Configuration 1"
|
|
hexmask.long.byte 0x10 24.--31. 1. "L2SZ,L2 Cache Size"
|
|
hexmask.long.byte 0x10 16.--23. 1. "L2WY,L2 Cache Ways"
|
|
line.long 0x14 "CP0CFG2,Processor 0 Configuration 2"
|
|
hexmask.long.byte 0x14 24.--31. 1. "DTCMSZ,Tightly Coupled Data Memory Size"
|
|
hexmask.long.byte 0x14 16.--23. 1. "ITCMSZ,Instruction Tightly Coupled Memory Size"
|
|
line.long 0x18 "CP0CFG3,Processor 0 Configuration 3"
|
|
bitfld.long 0x18 4. "CPY,Cryptography" "0: Not supported,1: Supported"
|
|
bitfld.long 0x18 3. "CMP,Core Memory Protection Unit" "0: Not included,1: Included"
|
|
newline
|
|
bitfld.long 0x18 2. "MMU,Memory Management Unit" "0: Not supported,1: Supported"
|
|
bitfld.long 0x18 1. "SIMD,SIMD/NEON Instruction Support" "0: Not included,1: Included"
|
|
newline
|
|
bitfld.long 0x18 0. "FPU,Floating Point Unit" "0: Not provided,1: Provided"
|
|
group.long 0x200++0x1F
|
|
line.long 0x0 "IRCP0ISR0,Interrupt Router CP0 Interrupt Status"
|
|
eventfld.long 0x0 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: to-CPn Interrupt"
|
|
eventfld.long 0x0 0. "CP0_INT,CP0-to-CPn Interrupt" "0: to-CPn Interrupt,1: Interrupt to CPn asserted"
|
|
line.long 0x4 "IRCP0IGR0,Interrupt Router CP0 Interrupt Generation"
|
|
bitfld.long 0x4 0. "INT_EN,Interrupt Enable" "0,1"
|
|
line.long 0x8 "IRCP0ISR1,Interrupt Router CP0 Interrupt Status"
|
|
eventfld.long 0x8 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: to-CPn Interrupt"
|
|
eventfld.long 0x8 0. "CP0_INT,CP0-to-CPn Interrupt" "0: to-CPn Interrupt,1: Interrupt to CPn asserted"
|
|
line.long 0xC "IRCP0IGR1,Interrupt Router CP0 Interrupt Generation"
|
|
bitfld.long 0xC 0. "INT_EN,Interrupt Enable" "0,1"
|
|
line.long 0x10 "IRCP0ISR2,Interrupt Router CP0 Interrupt Status"
|
|
eventfld.long 0x10 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: to-CPn Interrupt"
|
|
eventfld.long 0x10 0. "CP0_INT,CP0-to-CPn Interrupt" "0: to-CPn Interrupt,1: Interrupt to CPn asserted"
|
|
line.long 0x14 "IRCP0IGR2,Interrupt Router CP0 Interrupt Generation"
|
|
bitfld.long 0x14 0. "INT_EN,Interrupt Enable" "0,1"
|
|
line.long 0x18 "IRCP0ISR3,Interrupt Router CP0 Interrupt Status"
|
|
eventfld.long 0x18 1. "CP1_INT,CP1-to-CPn Interrupt" "0: No interrupt is asserted to CPn,1: to-CPn Interrupt"
|
|
eventfld.long 0x18 0. "CP0_INT,CP0-to-CPn Interrupt" "0: to-CPn Interrupt,1: Interrupt to CPn asserted"
|
|
line.long 0x1C "IRCP0IGR3,Interrupt Router CP0 Interrupt Generation"
|
|
bitfld.long 0x1C 0. "INT_EN,Interrupt Enable" "0,1"
|
|
group.long 0x400++0x3
|
|
line.long 0x0 "IRCPCFG,Interrupt Router Configuration"
|
|
bitfld.long 0x0 31. "LOCK,Lock" "0: Register can be written by any privileged write,1: Register is locked (read-only) until the next.."
|
|
bitfld.long 0x0 1. "CP1_TR,CP1 as Trusted Core" "0: Not trusted,1: Trusted"
|
|
newline
|
|
bitfld.long 0x0 0. "CP0_TR,CP0 as Trusted Core" "0: Not trusted,1: Trusted"
|
|
group.long 0x500++0x3
|
|
line.long 0x0 "XN_CTRL,Memory Execution Control"
|
|
bitfld.long 0x0 31. "HLK,Hard Lock" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 30. "SLK,Soft Lock" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "CM7_0_DTCM,Transaction Control For Cortex-M7_0 DTCM" "0: Transaction enabled,1: Transaction disabled"
|
|
bitfld.long 0x0 16. "CM7_0_DIS_D0_D1TCM_EXEC,D0 And D1 TCM Execution For Cortex-M7_0" "0: Execution enabled,1: Execution disabled"
|
|
newline
|
|
bitfld.long 0x0 12. "CM7_0_ITCM,Transaction Control For Cortex-M7_0 ITCM" "0: Execution enabled,1: Execution disabled"
|
|
bitfld.long 0x0 8. "CM7_0_DIS_ITCM_EXEC,ITCM Execution For Cortex-M7_0" "0: Execution enabled,1: Execution disabled"
|
|
newline
|
|
bitfld.long 0x0 0. "PRAM0,Transaction Control For PRAM 0" "0: Transaction enabled,1: Transaction disabled"
|
|
group.long 0x600++0x3
|
|
line.long 0x0 "ENEDC,Enable Interconnect Error Detection"
|
|
bitfld.long 0x0 27. "ADD_CM7_0_TCM,Address Check For Cortex-M7_0_TCM" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 26. "CM7_0_TCM,Write Data Check For Cortex-M7_0_TCM" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "ADD_AIPS0,Address Check For AIPS0" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 20. "AIPS0,Write Data Check For AIPS0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "ADD_TCM_BACKDOOR,Write Data Check For TCM Backdoor" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 13. "ADD_PRAM0,Address Check For PRAM0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "PRAM0,Write Data Check For PRAM0" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 9. "ADD_PF0,Address Check For PF0" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "HSE,Read Data Check For HSE_B" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 2. "EDMA,Read Data Check For eDMA" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "CM7_0_AHBP,Read Data Check For Cortex-M7_0_AHBP" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 0. "CM7_0_AHBM,Read Data Check For Cortex-M7_0_AHBM" "0: Disabled,1: Enabled"
|
|
group.long 0x700++0x3
|
|
line.long 0x0 "IAHBCFGREG,AHB Gasket Configuration"
|
|
bitfld.long 0x0 15. "TCM_PRAM_DIS_WR_OPT,Determines whether write burst optimizations in the TCM_PRAM gasket are enabled or disabled" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x0 13. "PRAM0_DIS_WR_OPT,Determines whether write burst optimizations in the PRAM0 gasket are enabled or disabled" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x0 11. "AIPS0_DIS_WR_OPT,Determines whether write burst optimizations in the AIPS2 AHB gasket are enabled" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x0 6. "CM7_0_AHBS_DIS_WR_OPT,Determines whether write burst optimizations in the CM7_0_AHBS gasket are enabled or disabled" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x0 4. "TCM_DIS_WR_OPT,Determines whether write burst optimizations in the TCM AHB gasket are enabled" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x0 3. "HSE_DIS_WR_OPT,Determines whether write burst optimizations in the HSE_B AHB gasket are enabled" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x0 2. "DMA_AXBS_S1_DIS_WR_OPT,Determines whether write burst optimizations in the DMA AXBS S1 AHB gasket are enabled" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x0 1. "DMA_AXBS_S0_DIS_WR_OPT,Determines whether write burst optimizations in the DMA AXBS S0 AHB gasket are enabled" "0: Enabled,1: Disabled"
|
|
repeat 240. (increment 0x0 0x1)(increment 0x0 0x2)
|
|
group.word ($2+0x880)++0x1
|
|
line.word 0x0 "IRSPRC[$1],Interrupt Router Shared Peripheral Routing Control"
|
|
bitfld.word 0x0 15. "LOCK,Lock" "0: Writes to IRSPRCn allowed,1: Writes to IRSPRCn ignored"
|
|
bitfld.word 0x0 0. "M7_0,Enable Cortex-M7_0 Interrupt Steering" "0: Routing disabled,1: Routing enabled"
|
|
repeat.end
|
|
tree.end
|
|
tree "MU"
|
|
base ad:0x0
|
|
tree "MU_0__MUB"
|
|
base ad:0x4038C000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VER,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number"
|
|
line.long 0x4 "PAR,Parameter Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width"
|
|
hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-purpose Interrupt Request Number"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 1. "MURIE,MUB Reset Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset"
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 6. "RFP,MUB Receive Full Pending Flag" "0: Not pending. MUA is not writing to a TRn register.,1: Pending. MUA is writing to a TRn register."
|
|
rbitfld.long 0x4 5. "TEP,MUB Transmit Empty Pending" "0: Not pending. MUA is reading no RRn register.,1: Pending. MUA is reading an RRn register."
|
|
newline
|
|
rbitfld.long 0x4 4. "GIRP,MUB General-purpose Interrupt Pending" "0: No request sent,1: Request sent"
|
|
rbitfld.long 0x4 3. "FUP,MUB Flags Update Pending" "0: No pending update flags (initiated by MUB),1: Pending update flags (initiated by MUB)"
|
|
newline
|
|
rbitfld.long 0x4 2. "EP,MUB Side Event Pending" "0: Not pending,1: Pending"
|
|
eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending" "0: Processor A did not issue MU reset.,1: Processor A issued MU reset."
|
|
newline
|
|
rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: MUA and MUB are out of reset state.,1: MUA or MUB is in reset state."
|
|
line.long 0x8 "CCR0,Core Control Register 0"
|
|
bitfld.long 0x8 0. "NMI,MUA Non-maskable Interrupt Request" "0: Non-maskable interrupt issued,1: Non-maskable interrupt not issued"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CSSR0,Core Sticky Status Register 0"
|
|
eventfld.long 0x0 0. "NMIC,Processor B Non-Maskable-Interrupt Clear" "0: Default,1: Clear MUA_CCR0[NMI]"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "FCR,Flag Control Register"
|
|
bitfld.long 0x0 31. "F31,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 30. "F30,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 29. "F29,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 28. "F28,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 27. "F27,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 26. "F26,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 25. "F25,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 24. "F24,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 23. "F23,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 22. "F22,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 21. "F21,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 20. "F20,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 19. "F19,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 18. "F18,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 17. "F17,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 16. "F16,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 15. "F15,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 14. "F14,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 13. "F13,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 12. "F12,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 11. "F11,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 10. "F10,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 9. "F9,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 8. "F8,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 7. "F7,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 6. "F6,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 5. "F5,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 4. "F4,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 3. "F3,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 2. "F2,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 1. "F1,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 0. "F0,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "FSR,Flag Status Register"
|
|
bitfld.long 0x0 31. "F31,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 30. "F30,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 29. "F29,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 28. "F28,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 27. "F27,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 26. "F26,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 25. "F25,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 24. "F24,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 23. "F23,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 22. "F22,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 21. "F21,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 20. "F20,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 19. "F19,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 18. "F18,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 17. "F17,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 16. "F16,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 15. "F15,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 14. "F14,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 13. "F13,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 12. "F12,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 11. "F11,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 10. "F10,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 9. "F9,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 8. "F8,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 7. "F7,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 6. "F6,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 5. "F5,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 4. "F4,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 3. "F3,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 2. "F2,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 1. "F1,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 0. "F0,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
group.long 0x110++0xB
|
|
line.long 0x0 "GIER,General-purpose Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "GIE31,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "GIE30,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 29. "GIE29,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28. "GIE28,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 27. "GIE27,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 26. "GIE26,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 25. "GIE25,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 24. "GIE24,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "GIE23,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 22. "GIE22,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 21. "GIE21,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 20. "GIE20,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 19. "GIE19,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 18. "GIE18,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 17. "GIE17,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "GIE16,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "GIE15,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 14. "GIE14,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "GIE13,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 12. "GIE12,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 11. "GIE11,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 10. "GIE10,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 9. "GIE9,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 8. "GIE8,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "GIE7,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 6. "GIE6,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 5. "GIE5,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 4. "GIE4,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "GIE3,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "GIE2,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "GIE1,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "GIE0,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
line.long 0x4 "GCR,General-purpose Control Register"
|
|
bitfld.long 0x4 31. "GIR31,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 30. "GIR30,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 29. "GIR29,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 28. "GIR28,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 27. "GIR27,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 26. "GIR26,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 25. "GIR25,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 24. "GIR24,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 23. "GIR23,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 22. "GIR22,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 21. "GIR21,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 20. "GIR20,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 19. "GIR19,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 18. "GIR18,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 17. "GIR17,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 16. "GIR16,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 15. "GIR15,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 14. "GIR14,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 13. "GIR13,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 12. "GIR12,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 11. "GIR11,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 10. "GIR10,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 9. "GIR9,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 8. "GIR8,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 7. "GIR7,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 6. "GIR6,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 5. "GIR5,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 4. "GIR4,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 3. "GIR3,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 2. "GIR2,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 1. "GIR1,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 0. "GIR0,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
line.long 0x8 "GSR,General-purpose Status Register"
|
|
eventfld.long 0x8 31. "GIP31,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 30. "GIP30,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 29. "GIP29,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 28. "GIP28,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 27. "GIP27,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 26. "GIP26,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 25. "GIP25,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 24. "GIP24,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 23. "GIP23,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 22. "GIP22,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 21. "GIP21,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 20. "GIP20,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 19. "GIP19,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 18. "GIP18,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 17. "GIP17,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 16. "GIP16,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 15. "GIP15,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 14. "GIP14,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 13. "GIP13,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 12. "GIP12,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 11. "GIP11,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 10. "GIP10,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 9. "GIP9,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 8. "GIP8,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 7. "GIP7,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 6. "GIP6,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 5. "GIP5,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 4. "GIP4,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 3. "GIP3,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 2. "GIP2,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 1. "GIP1,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 0. "GIP0,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "TCR,Transmit Control Register"
|
|
bitfld.long 0x0 3. "TIE3,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "TIE2,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "TIE0,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
rgroup.long 0x124++0x3
|
|
line.long 0x0 "TSR,Transmit Status Register"
|
|
bitfld.long 0x0 3. "TE3,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 2. "TE2,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
bitfld.long 0x0 1. "TE1,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "TE0,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "RCR,Receive Control Register"
|
|
bitfld.long 0x0 3. "RIE3,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "RIE2,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "RIE1,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "RIE0,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
rgroup.long 0x12C++0x3
|
|
line.long 0x0 "RSR,Receive Status Register"
|
|
bitfld.long 0x0 3. "RF3,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
bitfld.long 0x0 2. "RF2,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
newline
|
|
bitfld.long 0x0 1. "RF1,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
bitfld.long 0x0 0. "RF0,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "TR[$1],Transmit Register"
|
|
hexmask.long 0x0 0.--31. 1. "TR_DATA,MUB Transmit Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x280)++0x3
|
|
line.long 0x0 "RR[$1],Receive Register"
|
|
hexmask.long 0x0 0.--31. 1. "RR_DATA,MUB Receive Data"
|
|
repeat.end
|
|
tree.end
|
|
tree "MU_1__MUB"
|
|
base ad:0x40390000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VER,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Set Number"
|
|
line.long 0x4 "PAR,Parameter Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FLAG_WIDTH,Flag Width"
|
|
hexmask.long.byte 0x4 16.--23. 1. "GIR_NUM,General-purpose Interrupt Request Number"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "RR_NUM,Receive Register Number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TR_NUM,Transmit Register Number"
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 1. "MURIE,MUB Reset Interrupt Enable" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "MUR,MU Reset" "0: Idle,1: Reset"
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 6. "RFP,MUB Receive Full Pending Flag" "0: Not pending. MUA is not writing to a TRn register.,1: Pending. MUA is writing to a TRn register."
|
|
rbitfld.long 0x4 5. "TEP,MUB Transmit Empty Pending" "0: Not pending. MUA is reading no RRn register.,1: Pending. MUA is reading an RRn register."
|
|
newline
|
|
rbitfld.long 0x4 4. "GIRP,MUB General-purpose Interrupt Pending" "0: No request sent,1: Request sent"
|
|
rbitfld.long 0x4 3. "FUP,MUB Flags Update Pending" "0: No pending update flags (initiated by MUB),1: Pending update flags (initiated by MUB)"
|
|
newline
|
|
rbitfld.long 0x4 2. "EP,MUB Side Event Pending" "0: Not pending,1: Pending"
|
|
eventfld.long 0x4 1. "MURIP,MU Reset Interrupt Pending" "0: Processor A did not issue MU reset.,1: Processor A issued MU reset."
|
|
newline
|
|
rbitfld.long 0x4 0. "MURS,MUA and MUB Reset State" "0: MUA and MUB are out of reset state.,1: MUA or MUB is in reset state."
|
|
line.long 0x8 "CCR0,Core Control Register 0"
|
|
bitfld.long 0x8 0. "NMI,MUA Non-maskable Interrupt Request" "0: Non-maskable interrupt issued,1: Non-maskable interrupt not issued"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "CSSR0,Core Sticky Status Register 0"
|
|
eventfld.long 0x0 0. "NMIC,Processor B Non-Maskable-Interrupt Clear" "0: Default,1: Clear MUA_CCR0[NMI]"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "FCR,Flag Control Register"
|
|
bitfld.long 0x0 31. "F31,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 30. "F30,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 29. "F29,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 28. "F28,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 27. "F27,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 26. "F26,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 25. "F25,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 24. "F24,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 23. "F23,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 22. "F22,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 21. "F21,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 20. "F20,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 19. "F19,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 18. "F18,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 17. "F17,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 16. "F16,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 15. "F15,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 14. "F14,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 13. "F13,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 12. "F12,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 11. "F11,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 10. "F10,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 9. "F9,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 8. "F8,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 7. "F7,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 6. "F6,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 5. "F5,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 4. "F4,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 3. "F3,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 2. "F2,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
newline
|
|
bitfld.long 0x0 1. "F1,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
bitfld.long 0x0 0. "F0,MUB to MUA Flag n" "0: Clear MUA_FSR[Fn].,1: Set MUA_FSR[Fn]."
|
|
rgroup.long 0x104++0x3
|
|
line.long 0x0 "FSR,Flag Status Register"
|
|
bitfld.long 0x0 31. "F31,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 30. "F30,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 29. "F29,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 28. "F28,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 27. "F27,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 26. "F26,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 25. "F25,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 24. "F24,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 23. "F23,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 22. "F22,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 21. "F21,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 20. "F20,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 19. "F19,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 18. "F18,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 17. "F17,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 16. "F16,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 15. "F15,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 14. "F14,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 13. "F13,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 12. "F12,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 11. "F11,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 10. "F10,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 9. "F9,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 8. "F8,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 7. "F7,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 6. "F6,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 5. "F5,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 4. "F4,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 3. "F3,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 2. "F2,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
newline
|
|
bitfld.long 0x0 1. "F1,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
bitfld.long 0x0 0. "F0,MUA to MUB-Side Flag n" "0: MUA_FCR[Fn] = 0.,1: MUA_FCR[Fn] = 1."
|
|
group.long 0x110++0xB
|
|
line.long 0x0 "GIER,General-purpose Interrupt Enable Register"
|
|
bitfld.long 0x0 31. "GIE31,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 30. "GIE30,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 29. "GIE29,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 28. "GIE28,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 27. "GIE27,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 26. "GIE26,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 25. "GIE25,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 24. "GIE24,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 23. "GIE23,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 22. "GIE22,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 21. "GIE21,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 20. "GIE20,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 19. "GIE19,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 18. "GIE18,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 17. "GIE17,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 16. "GIE16,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 15. "GIE15,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 14. "GIE14,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 13. "GIE13,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 12. "GIE12,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 11. "GIE11,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 10. "GIE10,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 9. "GIE9,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 8. "GIE8,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 7. "GIE7,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 6. "GIE6,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 5. "GIE5,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 4. "GIE4,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 3. "GIE3,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "GIE2,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "GIE1,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "GIE0,MUB General-purpose Interrupt Enable n" "0: Disable,1: Enable"
|
|
line.long 0x4 "GCR,General-purpose Control Register"
|
|
bitfld.long 0x4 31. "GIR31,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 30. "GIR30,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 29. "GIR29,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 28. "GIR28,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 27. "GIR27,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 26. "GIR26,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 25. "GIR25,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 24. "GIR24,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 23. "GIR23,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 22. "GIR22,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 21. "GIR21,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 20. "GIR20,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 19. "GIR19,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 18. "GIR18,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 17. "GIR17,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 16. "GIR16,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 15. "GIR15,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 14. "GIR14,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 13. "GIR13,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 12. "GIR12,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 11. "GIR11,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 10. "GIR10,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 9. "GIR9,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 8. "GIR8,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 7. "GIR7,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 6. "GIR6,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 5. "GIR5,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 4. "GIR4,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 3. "GIR3,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 2. "GIR2,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
newline
|
|
bitfld.long 0x4 1. "GIR1,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
bitfld.long 0x4 0. "GIR0,MUB General-purpose Interrupt Request n" "0: Not requested,1: Requested"
|
|
line.long 0x8 "GSR,General-purpose Status Register"
|
|
eventfld.long 0x8 31. "GIP31,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 30. "GIP30,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 29. "GIP29,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 28. "GIP28,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 27. "GIP27,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 26. "GIP26,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 25. "GIP25,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 24. "GIP24,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 23. "GIP23,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 22. "GIP22,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 21. "GIP21,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 20. "GIP20,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 19. "GIP19,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 18. "GIP18,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 17. "GIP17,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 16. "GIP16,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 15. "GIP15,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 14. "GIP14,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 13. "GIP13,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 12. "GIP12,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 11. "GIP11,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 10. "GIP10,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 9. "GIP9,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 8. "GIP8,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 7. "GIP7,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 6. "GIP6,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 5. "GIP5,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 4. "GIP4,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 3. "GIP3,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 2. "GIP2,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
newline
|
|
eventfld.long 0x8 1. "GIP1,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
eventfld.long 0x8 0. "GIP0,MUB General-purpose Interrupt Request Pending n" "0: Not pending,1: Pending"
|
|
group.long 0x120++0x3
|
|
line.long 0x0 "TCR,Transmit Control Register"
|
|
bitfld.long 0x0 3. "TIE3,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "TIE2,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "TIE1,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "TIE0,MUB Transmit Interrupt Enable n" "0: Disable,1: Enable"
|
|
rgroup.long 0x124++0x3
|
|
line.long 0x0 "TSR,Transmit Status Register"
|
|
bitfld.long 0x0 3. "TE3,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 2. "TE2,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
newline
|
|
bitfld.long 0x0 1. "TE1,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
bitfld.long 0x0 0. "TE0,MUB Transmit Register n Empty" "0: Not empty,1: Empty"
|
|
group.long 0x128++0x3
|
|
line.long 0x0 "RCR,Receive Control Register"
|
|
bitfld.long 0x0 3. "RIE3,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 2. "RIE2,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "RIE1,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "RIE0,MUB Receive Interrupt Enable n" "0: Disable,1: Enable"
|
|
rgroup.long 0x12C++0x3
|
|
line.long 0x0 "RSR,Receive Status Register"
|
|
bitfld.long 0x0 3. "RF3,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
bitfld.long 0x0 2. "RF2,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
newline
|
|
bitfld.long 0x0 1. "RF1,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
bitfld.long 0x0 0. "RF0,MUB Receive Register n Full" "0: Not full,1: MUB_RRn register has received data from MUA TRn.."
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "TR[$1],Transmit Register"
|
|
hexmask.long 0x0 0.--31. 1. "TR_DATA,MUB Transmit Data"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x280)++0x3
|
|
line.long 0x0 "RR[$1],Receive Register"
|
|
hexmask.long 0x0 0.--31. 1. "RR_DATA,MUB Receive Data"
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "PFLASH"
|
|
base ad:0x40268000
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "PFCR[$1],Platform Flash Memory Configuration i"
|
|
bitfld.long 0x0 5. "P0_DPFEN,Port0 Data Prefetch Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 4. "P0_CPFEN,Port0 Code Prefetch Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 1. "P0_DBFEN,Port0 PFLASH Line Read Data Buffers Enable" "0: Disable,1: Enable"
|
|
newline
|
|
bitfld.long 0x0 0. "P0_CBFEN,Port0 PFLASH Line Read Code Buffers Enable" "0: Disable,1: Enable"
|
|
repeat.end
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "PFCR4,Platform Flash Memory Configuration 4"
|
|
bitfld.long 0x0 7. "DMEEE,Disable Multi-Bit ECC Error Exception" "0: Error response sent on system bus for multi-bit..,1: Error response not sent on system bus for.."
|
|
newline
|
|
bitfld.long 0x0 1.--3. "BLK4_PS,Block 4 Pipe Select" "0: Block 4 access can be through any of the command..,1: Block 4 access is always through pipe1,2: Block 4 access is always through pipe2,3: Block 4 access is always through pipe3,4: Block 4 access can be through any of the command..,5: Block 4 access can be through any of the command..,6: Block 4 access can be through any of the command..,7: Block 4 access can be through any of the command.."
|
|
line.long 0x4 "PFAPR,Platform Flash Memory Access Protection"
|
|
bitfld.long 0x4 30.--31. "M0AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 28.--29. "M1AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 26.--27. "M2AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 22.--23. "M4AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 20.--21. "M5AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 18.--19. "M6AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "M7AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "M8AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "M9AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "M10AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 8.--9. "M11AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "M12AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "M13AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 2.--3. "M14AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
newline
|
|
bitfld.long 0x4 0.--1. "M15AP,Master n Access Protection" "0: This master can perform read accesses,1: This master can perform read accesses,2: This master cannot perform any read accesses,3: This master can perform read accesses"
|
|
group.long 0x300++0x3
|
|
line.long 0x0 "PFCPGM_PEADR_L,Platform Flash Memory Program Erase Address Logical"
|
|
hexmask.long 0x0 0.--31. 1. "PEADR_L,Program Erase Address Logical"
|
|
rgroup.long 0x304++0x3
|
|
line.long 0x0 "PFCPGM_PEADR_P,Platform Flash Memory Program Erase Address Physical"
|
|
hexmask.long 0x0 0.--31. 1. "PEADR_P,Program Erase Address Physical"
|
|
group.long 0x308++0x3
|
|
line.long 0x0 "PFCPGM_XPEADR_L,Platform Flash Memory Express Program Erase Address Logical"
|
|
hexmask.long 0x0 0.--31. 1. "XPEADR_L,Express Program Erase Address Logical"
|
|
rgroup.long 0x30C++0x3
|
|
line.long 0x0 "PFCPGM_XPEADR_P,Platform Flash Memory Express Program Erase Address Physical"
|
|
hexmask.long 0x0 0.--31. 1. "XPEADR_P,Express Program Erase Address Physical"
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x340)++0x3
|
|
line.long 0x0 "PFCBLK_SPELOCK[$1],Block n Sector Program Erase Lock"
|
|
hexmask.long 0x0 0.--31. 1. "SLCK,Sector Lock"
|
|
repeat.end
|
|
group.long 0x358++0x3
|
|
line.long 0x0 "PFCBLKU_SPELOCK,Block UTEST Sector Program Erase Lock"
|
|
bitfld.long 0x0 0. "SLCK,Sector Lock" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x35C)++0x3
|
|
line.long 0x0 "PFCBLK_SSPELOCK[$1],Block n Super Sector Program Erase Lock"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSLCK,Super Sector Lock"
|
|
repeat.end
|
|
repeat 3. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x380)++0x3
|
|
line.long 0x0 "PFCBLK_SETSLOCK[$1],Block n Set Sector Lock"
|
|
hexmask.long 0x0 0.--31. 1. "SETSLCK,If the vector bit value = 0 the corresponding lock bit is not owned by any master"
|
|
repeat.end
|
|
group.long 0x398++0x3
|
|
line.long 0x0 "PFCBLKU_SETSLOCK,Block UTEST Set Sector Lock"
|
|
bitfld.long 0x0 0. "SETSLCK,Set Sector Lock" "0,1"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x39C)++0x3
|
|
line.long 0x0 "PFCBLK_SSETSLOCK[$1],Block n Set Super Sector Lock"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSETSLCK,Set Super Sector Lock"
|
|
repeat.end
|
|
repeat 3. (list 0x0 0x1 0x2)(list ad:0x402683C0 ad:0x402683E0 ad:0x40268400)
|
|
tree "PFCBLKi_LOCKMASTER_S[$1]"
|
|
base $2
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2)++0x3
|
|
line.long 0x0 "PFCBLK_LOCKMASTER_S[$1],Block a Lock Master Sector b"
|
|
hexmask.long 0x0 0.--31. 1. "LOCKMASTER_S,Block a Lock Master Sector b"
|
|
repeat.end
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40268000
|
|
rgroup.long 0x480++0x7
|
|
line.long 0x0 "PFCBLKU_LOCKMASTER_S,Block UTEST Lock Master Sector"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LOCKMASTER_S,Lock Master Sector"
|
|
line.long 0x4 "PFCBLK0_LOCKMASTER_SS0,Block m Lock Master Super Sector n"
|
|
hexmask.long 0x4 0.--31. 1. "LOCKMASTER_SS,Block a Lock Master Super Sector b"
|
|
rgroup.long 0x494++0x3
|
|
line.long 0x0 "PFCBLK1_LOCKMASTER_SS0,Block m Lock Master Super Sector n"
|
|
hexmask.long 0x0 0.--31. 1. "LOCKMASTER_SS,Block a Lock Master Super Sector b"
|
|
tree.end
|
|
tree "PIT"
|
|
base ad:0x0
|
|
tree "PIT_0"
|
|
base ad:0x400B0000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,PIT Module Control"
|
|
bitfld.long 0x0 2. "MDIS_RTI,Module Disable for RTI" "0: Enables,1: Disables"
|
|
bitfld.long 0x0 1. "MDIS,Module Disable for PIT" "0: Enables,1: Disables"
|
|
bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers run in Debug mode,1: Timers stop in Debug mode"
|
|
rgroup.long 0xE0++0x7
|
|
line.long 0x0 "LTMR64H,PIT Upper Lifetimer"
|
|
hexmask.long 0x0 0.--31. 1. "LTH,Lifetimer Value"
|
|
line.long 0x4 "LTMR64L,PIT Lower Lifetimer"
|
|
hexmask.long 0x4 0.--31. 1. "LTL,Lifetimer Value"
|
|
group.long 0xEC++0x7
|
|
line.long 0x0 "RTI_LDVAL_STAT,RTI Timer Load Value Sync Status"
|
|
bitfld.long 0x0 0. "RT_STAT,Sync Status" "0: Not loaded,1: Loaded"
|
|
line.long 0x4 "RTI_LDVAL,RTI Timer Load Value"
|
|
hexmask.long 0x4 0.--31. 1. "TSV,Timer Start Value"
|
|
rgroup.long 0xF4++0x3
|
|
line.long 0x0 "RTI_CVAL,Current RTI Timer Value"
|
|
hexmask.long 0x0 0.--31. 1. "TVL,Current Timer Value"
|
|
group.long 0xF8++0x7
|
|
line.long 0x0 "RTI_TCTRL,RTI Timer Control"
|
|
bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x0 0. "TEN,Timer Enable Bit" "0: Disables,1: Enables. The RTI timer begins counting down."
|
|
line.long 0x4 "RTI_TFLG,RTI Timer Interrupt Flag"
|
|
eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer still counting down,1: Timer has expired"
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400B0100 ad:0x400B0110 ad:0x400B0120 ad:0x400B0130)
|
|
tree "TIMER[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "LDVAL,Timer Load Value"
|
|
hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value"
|
|
rgroup.long ($2+0x4)++0x3
|
|
line.long 0x0 "CVAL,Current Timer Value"
|
|
hexmask.long 0x0 0.--31. 1. "TVL,Timer Value"
|
|
group.long ($2+0x8)++0x7
|
|
line.long 0x0 "TCTRL,Timer Control"
|
|
bitfld.long 0x0 2. "CHN,Chain Mode" "0: Unchains,1: Chains"
|
|
bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disables,1: Enables. The timer begins counting down."
|
|
line.long 0x4 "TFLG,Timer Flag"
|
|
eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer has not expired,1: Timer expired"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "PIT_1"
|
|
base ad:0x400B4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MCR,PIT Module Control"
|
|
bitfld.long 0x0 1. "MDIS,Module Disable for PIT" "0: Enables,1: Disables"
|
|
bitfld.long 0x0 0. "FRZ,Freeze" "0: Timers run in Debug mode,1: Timers stop in Debug mode"
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x400B4100 ad:0x400B4110 ad:0x400B4120 ad:0x400B4130)
|
|
tree "TIMER[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "LDVAL,Timer Load Value"
|
|
hexmask.long 0x0 0.--31. 1. "TSV,Timer Start Value"
|
|
rgroup.long ($2+0x4)++0x3
|
|
line.long 0x0 "CVAL,Current Timer Value"
|
|
hexmask.long 0x0 0.--31. 1. "TVL,Timer Value"
|
|
group.long ($2+0x8)++0x7
|
|
line.long 0x0 "TCTRL,Timer Control"
|
|
bitfld.long 0x0 2. "CHN,Chain Mode" "0: Unchains,1: Chains"
|
|
bitfld.long 0x0 1. "TIE,Timer Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disables,1: Enables. The timer begins counting down."
|
|
line.long 0x4 "TFLG,Timer Flag"
|
|
eventfld.long 0x4 0. "TIF,Timer Interrupt Flag" "0: Timer has not expired,1: Timer expired"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree.end
|
|
tree "PLL"
|
|
base ad:0x402E0000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "PLLCR,PLL Control"
|
|
bitfld.long 0x0 31. "PLLPD,PLL Power Down" "0: Powered up,1: Powered down"
|
|
line.long 0x4 "PLLSR,PLL Status"
|
|
eventfld.long 0x4 3. "LOL,Loss-Of-Lock Flag" "0: No loss of lock detected,1: Loss of lock detected"
|
|
rbitfld.long 0x4 2. "LOCK,Lock Status" "0: Unlocked,1: Locked"
|
|
line.long 0x8 "PLLDV,PLL Divider"
|
|
hexmask.long.byte 0x8 25.--30. 1. "ODIV2,Output frequency divider for raw PLL clock."
|
|
bitfld.long 0x8 12.--14. "RDIV,Input Clock Predivider" "0: Divide by 1,1: Divide by 1,2: Divide by 2,3: Divide by 3,4: Divide by 4,5: Divide by 5,6: Divide by 6,7: Divide by 7"
|
|
hexmask.long.byte 0x8 0.--7. 1. "MFI,Integer Portion Of Loop Divider"
|
|
line.long 0xC "PLLFM,PLL Frequency Modulation"
|
|
bitfld.long 0xC 30. "SSCGBYP,Frequency Modulation (Spread Spectrum Clock Generation) Bypass" "0: Not bypassed,1: Bypassed"
|
|
bitfld.long 0xC 29. "SPREADCTL,Modulation Type Selection" "?,1: Spread below nominal frequency"
|
|
hexmask.long.word 0xC 16.--25. 1. "STEPSIZE,Frequency Modulation Step Size"
|
|
newline
|
|
hexmask.long.word 0xC 0.--10. 1. "STEPNO,Number Of Steps Of Modulation Period Or Frequency Modulation"
|
|
line.long 0x10 "PLLFD,PLL Fractional Divider"
|
|
bitfld.long 0x10 30. "SDMEN,Fractional Mode Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x10 29. "SDM2,Fractional Mode Configuration" "0,1"
|
|
bitfld.long 0x10 28. "SDM3,Fractional Mode Configuration" "0,1"
|
|
newline
|
|
hexmask.long.word 0x10 0.--14. 1. "MFN,Numerator Of Fractional Loop Division Factor"
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "PLLCAL2,PLL Calibration Register 2"
|
|
bitfld.long 0x0 7.--8. "ULKCTL,Unlock Control Accuracy" "0: Unlock range = Expected value +/- 9 (recommended..,1: Unlock range = Expected value +/- 17..,2: Unlock range = Expected value +/- 33,3: Unlock range = Expected value +/- 5"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "PLLCLKMUX,PLL Clock Multiplexer"
|
|
bitfld.long 0x0 0. "REFCLKSEL,Reference Clock Select" "0: FXOSC_CLK,1: FIRC_DIV2_CLK"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "PLLODIV_[$1],PLL Output Divider"
|
|
bitfld.long 0x0 31. "DE,Divider Enable" "0: Disabled,1: Enabled"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIV,Division Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "PMC"
|
|
base ad:0x402E8000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "LVSC,Low Voltage Status And Control"
|
|
eventfld.long 0x0 31. "PORF,POR Flag" "0: Event did not occur,1: Event occurred"
|
|
eventfld.long 0x0 25. "GNG11OSCF,Go/No Go Detect Flag On OSC Part Of V11 Power Domain" "0: Event did not occur,1: Event occurred"
|
|
newline
|
|
eventfld.long 0x0 24. "GNG25OSCF,Go/No Go Detect Flag On OSC Part of V25 Power Domain" "0: Event did not occur,1: Event occurred"
|
|
eventfld.long 0x0 23. "LVR11LPF,LVR11LP Flag On V11 Power Domain" "0: Event did not occur,1: Event occurred"
|
|
newline
|
|
eventfld.long 0x0 22. "LVR11F,LVR11 Flag On V11 Power Domain In FPM" "0: Event did not occur,1: Event occurred"
|
|
eventfld.long 0x0 21. "LVR25LPF,LVR25LP Flag On V25 Power Domain" "0: Event did not occur,1: Event occurred"
|
|
newline
|
|
eventfld.long 0x0 20. "LVR25F,LVR25 Flag On V25 Power Domain In FPM" "0: Event did not occur,1: Event occurred"
|
|
eventfld.long 0x0 17. "LVRALPF,LVRALP Flag On VDD_HV_A Power Domain" "0: Event did not occur,1: Event occurred"
|
|
newline
|
|
eventfld.long 0x0 16. "LVRAF,LVRA Flag On VDD_HV_A Power Domain In FPM" "0: Event did not occur,1: Event occurred"
|
|
rbitfld.long 0x0 12. "LVD5AS,LVD5A Status On VDD_HV_A Power Domain In FPM" "0: Above,1: Below"
|
|
newline
|
|
rbitfld.long 0x0 11. "HVD11S,HVD11 Status On V11 Power Domain In FPM" "0: Voltage is below threshold or chip is in LPM,1: Voltage is above threshold and chip is in FPM"
|
|
rbitfld.long 0x0 10. "HVD25S,HVD25 Status On V25 Power Domain In FPM" "0: Voltage is below threshold or chip is in LPM,1: Voltage is above threshold and chip is in FPM"
|
|
newline
|
|
rbitfld.long 0x0 8. "HVDAS,HVDA Status On VDD_HV_A Power Domain In FPM" "0: Voltage is below threshold or chip is in LPM,1: Voltage is above threshold and chip is in FPM"
|
|
eventfld.long 0x0 4. "LVD5AF,LVD5A Flag On VDD_HV_A Power Domain In FPM" "0: Did not change,1: Changed"
|
|
newline
|
|
eventfld.long 0x0 3. "HVD11F,HVD11 Flag On V11 Power Domain In FPM" "0: Did not change,1: Changed"
|
|
eventfld.long 0x0 2. "HVD25F,HVD25 Flag On V25 Power Domain In FPM" "0: Did not change,1: Changed"
|
|
newline
|
|
eventfld.long 0x0 0. "HVDAF,HVDA Flag On VDD_HV_A Power Domain In FPM" "0: Did not change,1: Changed"
|
|
line.long 0x4 "CONFIG,PMC Configuration"
|
|
bitfld.long 0x4 9. "LVDIE,Low Voltage Detect Interrupt Enable" "0: LVD hardware interrupt is disabled (use polling),1: Request an LVD hardware interrupt when LVDA5F = 1"
|
|
bitfld.long 0x4 8. "HVDIE,High Voltage Detect Interrupt Enable" "0: HVD hardware interrupt is disabled (use polling),1: Request an HVD hardware interrupt when HVDAF=1.."
|
|
newline
|
|
bitfld.long 0x4 3. "LPM25EN,V25 Power Domain Enable During LPM" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x4 2. "FASTREC,Fast Recovery From LPM Enable" "0: Normal,1: Fast"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "VERID,Version ID"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
bitfld.long 0x0 0. "LMFEAT,Last-Mile Regulator Feature" "0: Not available,1: Available"
|
|
tree.end
|
|
tree "PMC_AE"
|
|
base ad:0x100
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CONFIG,PMC Configuration Register"
|
|
bitfld.long 0x0 6. "LINSUPEN,LINPHY supply enable" "0: LINPHY supply is high ohmic (off),1: LINPHY supply is as selected by LINSUPSEL bit"
|
|
bitfld.long 0x0 5. "LVDVLSSEL,LVD VLS select" "0: LVD threshold on VLS supply is 5.5V,1: LVD threshold on VLS supply is 6.5V"
|
|
newline
|
|
bitfld.long 0x0 4. "LINSUPSEL,LINPHY supply select" "0: LINPHY supply connects to VSUP pin,1: LINPHY supply connects to HD pin (of GDU)"
|
|
bitfld.long 0x0 3. "VDDCEN,VDDC enable" "0: VDDC is disabled,1: VDDC is enabled and regulated to 5V"
|
|
newline
|
|
bitfld.long 0x0 2. "VPREEXT,VPRE external regulator enable" "0: PMC controlled (GCTL pin) external VPRE..,1: PMC controlled (GCTL pin) external VPRE.."
|
|
bitfld.long 0x0 1. "VPREINT,VPRE internal regulator enable" "0: PMC internal VPRE regulator is off,1: PMC internal VPRE regulator is on"
|
|
newline
|
|
bitfld.long 0x0 0. "VDDSEL5V,VDD voltage level select" "0: VDD is regulated to 3.3V,1: VDD is regulated to 5V"
|
|
line.long 0x4 "MONITOR,PMC Monitor Register"
|
|
bitfld.long 0x4 28. "LVDVLSIE,LVD on VLS interrupt enable" "0: Low voltage detect interrupts on VLS disabled,1: Low voltage detect interrupts on VLS enabled"
|
|
bitfld.long 0x4 27. "LVDCIE,LVD on VDDC interrupt enable." "0: Low voltage detect interrupts on VDDC disabled,1: Low voltage detect interrupts on VDDC enabled"
|
|
newline
|
|
bitfld.long 0x4 26. "HVDVDDIE,HVD on VDD interrupt enable" "0: High voltage detect interrupt disabled,1: High voltage detect interrupt enabled"
|
|
bitfld.long 0x4 24. "HVDINT15IE,HVD on VDDINT or VDD15 interrupt enable" "0: High voltage detect interrupt disabled,1: High voltage detect interrupt enabled"
|
|
newline
|
|
rbitfld.long 0x4 20. "LVDVLSS,LVDVLS status" "0: Voltage on VLS is above low-voltage detect..,1: Voltage on VLS is below low-voltage detect.."
|
|
rbitfld.long 0x4 19. "LVDCS,LVDC status" "0: Voltage on VDDC is above low-voltage detect..,1: Voltage on VDDC is below low-voltage detect.."
|
|
newline
|
|
rbitfld.long 0x4 18. "HVDVDDS,HVDVDD status" "0: Voltage on VDD is below high-voltage detect..,1: Voltage on VDD is above high-voltage detect.."
|
|
rbitfld.long 0x4 17. "HVDINTS,HVDINT status" "0: Voltage on VDDINT is below high-voltage detect..,1: Voltage on VDDINT is above high-voltage detect.."
|
|
newline
|
|
rbitfld.long 0x4 16. "HVD15S,HVD15 status" "0: Voltage on VDD15 is below high-voltage detect..,1: Voltage on VDD15 is above high-voltage detect.."
|
|
bitfld.long 0x4 14. "ILVRINTF,Inverse LVRINT flag" "0: Low-voltage reset event has occurred,1: No low-voltage reset event has occurred"
|
|
newline
|
|
bitfld.long 0x4 13. "ILVR15F,Inverse LVR15 flag" "0: Low-voltage reset event has occurred,1: No low-voltage reset event has occurred"
|
|
bitfld.long 0x4 10. "IHVDVDDF,Inverse HVDVDD flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
newline
|
|
bitfld.long 0x4 9. "IHVDINTF,Inverse HVDINT flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
bitfld.long 0x4 8. "IHVD15F,Inverse HVD15 flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
newline
|
|
eventfld.long 0x4 7. "PORF,POR flag" "0: No power-on reset event has occurred,1: Power-on reset event has occurred"
|
|
eventfld.long 0x4 6. "LVRINTF,LVRINT flag" "0: No low-voltage reset event has occurred,1: Low-voltage reset event has occurred"
|
|
newline
|
|
eventfld.long 0x4 5. "LVR15F,LVR15 flag" "0: No low-voltage reset event has occurred,1: Low-voltage reset event has occurred"
|
|
eventfld.long 0x4 4. "LVDVLSF,LVDVLS flag" "0: No low voltage event detected on VLS supply or..,1: Low voltage event detected on VLS supply and VLS.."
|
|
newline
|
|
eventfld.long 0x4 3. "LVDCF,LVDC flag" "0: No change on LVDCS,1: LVDCS has changed"
|
|
eventfld.long 0x4 2. "HVDVDDF,HVDVDD flag" "0: No high voltage event detected on VDD supply,1: High voltage event detected on VDD supply"
|
|
newline
|
|
eventfld.long 0x4 1. "HVDINTF,HVDINT flag" "0: No high voltage event detected on VDDINT supply,1: High voltage event detected on VDDINT supply"
|
|
eventfld.long 0x4 0. "HVD15F,HVD15 flag" "0: No high voltage event detected on VDD15 supply,1: High voltage event detected on VDD15 supply"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "MONCHECK,Monitor Self Check Register"
|
|
bitfld.long 0x0 22.--23. "TRIGGER,Monitor Self Check Trigger Bits" "?,1: Changing the value from 10 to 01 will trigger a..,2: Default after power-up. Self check idle and..,?"
|
|
eventfld.long 0x0 16. "DONEF,Self Test Done Flag" "0: No self check even has occurred,1: Self check has been executed"
|
|
tree.end
|
|
tree "PRAMC"
|
|
base ad:0x40264000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "PRCR1,Platform RAM Configuration register 1"
|
|
bitfld.long 0x0 6. "P0_BO_DIS,Port p0 read burst optimization disable." "0: 64-bit WRP4 read bursts are optimized such that..,1: 64-bit WRP4 read bursts are not optimized; the.."
|
|
bitfld.long 0x0 0. "FT_DIS,Flow-through disabled" "0: RAM read data is passed directly to the system..,1: RAM read data is registered prior to returning.."
|
|
tree.end
|
|
tree "RTC"
|
|
base ad:0x40288000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "RTCSUPV,RTC Supervisor control register"
|
|
bitfld.long 0x0 31. "SUPV,RTC Supervisor Bit" "0: All registers are accessible in both user as..,1: All other registers are accessible in the.."
|
|
line.long 0x4 "RTCC,RTC Control register"
|
|
bitfld.long 0x4 31. "CNTEN,Counter Enable" "0: Counter disabled,1: Counter enabled"
|
|
bitfld.long 0x4 30. "RTCIE,RTC Interrupt Enable" "0: RTC interrupts disabled,1: RTC interrupts enabled"
|
|
newline
|
|
bitfld.long 0x4 29. "FRZEN,Freeze Enable Bit" "0: Counter does not freeze in debug mode,1: Counter freezes in debug mode"
|
|
bitfld.long 0x4 28. "ROVREN,Counter Roll Over wakeup/Interrupt Enable" "0: RTC rollover wakeup/interrupt disabled,1: RTC rollover wakeup/interrupt enabled"
|
|
newline
|
|
bitfld.long 0x4 15. "APIEN,Autonomous Periodic Interrupt Enable" "0: API disabled,1: API enabled"
|
|
bitfld.long 0x4 14. "APIIE,API Interrupt Enable" "0: API interrupts disabled,1: API interrupts enabled"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "CLKSEL,Clock select" "0: Clock source 0,1: Clock source 1,2: Clock source 2,3: Clock source 3"
|
|
bitfld.long 0x4 11. "DIV512EN,Divide by 512 enable" "0: Divide by 512 is disabled,1: Divide by 512 is enabled"
|
|
newline
|
|
bitfld.long 0x4 10. "DIV32EN,Divide by 32 enable" "0: Divide by 32 is disabled,1: Divide by 32 is enabled"
|
|
bitfld.long 0x4 0. "TRIG_EN,Trigger enable for Analog Comparator" "0,1"
|
|
line.long 0x8 "RTCS,RTC Status register"
|
|
eventfld.long 0x8 29. "RTCF,RTC Interrupt Flag" "0: RTC counter is not equal to RTCVAL,1: RTC counter matches RTCVAL"
|
|
rbitfld.long 0x8 18. "INV_RTC,Invalid RTC write" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 17. "INV_API,Invalid APIVAL write" "0,1"
|
|
eventfld.long 0x8 13. "APIF,API Interrupt Flag" "0: Counter is not equal to API offset value,1: Counter matches the API offset value"
|
|
newline
|
|
eventfld.long 0x8 10. "ROVRF,Counter Roll Over Interrupt Flag" "0: RTC has not rolled over,1: RTC has rolled over"
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "RTCCNT,RTC Counter register"
|
|
hexmask.long 0x0 0.--31. 1. "RTCCNT,RTC Counter Value"
|
|
group.long 0x10++0x7
|
|
line.long 0x0 "APIVAL,API Compare value register"
|
|
hexmask.long 0x0 0.--31. 1. "APIVAL,API Compare Value"
|
|
line.long 0x4 "RTCVAL,RTC Compare value register"
|
|
hexmask.long 0x4 0.--31. 1. "RTCVAL,RTC Compare Value"
|
|
tree.end
|
|
tree "SDA_AP"
|
|
base edp:0x700
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "AUTHSTTS,Authentication Status"
|
|
bitfld.long 0x0 30. "APPDBGEN,Application Debug Enabled or Disabled" "0: Application debug disabled,1: Application debug enabled"
|
|
bitfld.long 0x0 3. "SWAPPDBG,Software Application Debug" "0: Software application debug disabled,1: Software application debug enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "UIDSTATUS,User Identification Status" "0: UID is not ready and is invalid,1: UID is ready and is valid"
|
|
bitfld.long 0x0 0. "CHALRDY,Challenge Ready" "0: Challenge is not ready,1: Challenge is ready"
|
|
wgroup.long 0x4++0x3
|
|
line.long 0x0 "AUTHCTL,Authentication Control"
|
|
bitfld.long 0x0 1. "HSENEWDATACTL,New Data Control" "0: Does not indicate that the debugger has consumed..,1: Indicates that the debugger has consumed the.."
|
|
bitfld.long 0x0 0. "HSEAUTHREQ,Debug Enablement Authentication Request" "0: Does not start the authentication request,1: Starts the authentication request"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x10)++0x3
|
|
line.long 0x0 "KEYCHAL[$1],Key Challenge"
|
|
hexmask.long 0x0 0.--31. 1. "KEYCHAL,Debug Enablement Key Challenge"
|
|
repeat.end
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x40)++0x3
|
|
line.long 0x0 "KEYRESP[$1],Key Response"
|
|
hexmask.long 0x0 0.--31. 1. "KEYRESP,Debug Enablement Key Response"
|
|
repeat.end
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "UID0,User Identification 0"
|
|
hexmask.long 0x0 0.--31. 1. "UID0,User ID 0"
|
|
line.long 0x4 "UID1,User Identification 1"
|
|
hexmask.long 0x4 0.--31. 1. "UID1,User ID 1"
|
|
group.long 0x80++0x3
|
|
line.long 0x0 "DBGENCTRL,Debug Enable Control"
|
|
bitfld.long 0x0 29. "CNIDEN,Core Non-Invasive Debug Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 28. "CDBGEN,Core Debug Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "GSPNIDEN,Global Secure Privileged Non-Invasive Debug Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 6. "GSPIDEN,Global Secure Privileged Debug Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "GNIDEN,Global Non-Invasive Debug Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x0 4. "GDBGEN,Global Debug Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x90++0x3
|
|
line.long 0x0 "SDAAPRSTCTRL,Reset Control"
|
|
bitfld.long 0x0 25. "RSTRELTLCM70,Reset Release Cortex-M7_0" "0: Core is in reset,1: Reset is released"
|
|
rgroup.long 0xA0++0x3
|
|
line.long 0x0 "SDAAPGENSTATUS0,SDA_AP Generic Status"
|
|
hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status"
|
|
group.long 0xA4++0x3
|
|
line.long 0x0 "SDAAPGENCTRL0,Generic Control 0"
|
|
bitfld.long 0x0 0. "JTAG_CR_EN,JTAG CR Enable" "0: Function performed on the basis of SWJ-DP mode,1: Function performed on the basis of JTAG mode"
|
|
rgroup.long 0xB0++0x3
|
|
line.long 0x0 "SDAAPGENSTATUS1,SDA_AP Generic Status"
|
|
hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status"
|
|
rgroup.long 0xC0++0x3
|
|
line.long 0x0 "SDAAPGENSTATUS2,SDA_AP Generic Status"
|
|
hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status"
|
|
rgroup.long 0xD0++0x3
|
|
line.long 0x0 "SDAAPGENSTATUS3,SDA_AP Generic Status"
|
|
hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status"
|
|
rgroup.long 0xE0++0x3
|
|
line.long 0x0 "SDAAPGENSTATUS4,SDA_AP Generic Status"
|
|
hexmask.long 0x0 0.--31. 1. "SDAAPGENSTATUS,DAP Generic Status"
|
|
rgroup.long 0xFC++0x3
|
|
line.long 0x0 "ID,Identity"
|
|
hexmask.long 0x0 0.--31. 1. "ID,Identity"
|
|
tree.end
|
|
tree "SELFTEST_GPR"
|
|
base ad:0x403B0000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CONFIG_REG,Configuration register"
|
|
bitfld.long 0x0 8. "PCS_ENABLE_END,PCS Enable End" "0,1"
|
|
bitfld.long 0x0 7. "PCS_ENABLE_START,PCS Enable Start" "0,1"
|
|
bitfld.long 0x0 4.--6. "PCS_STEP_SIZE,PCS Step Size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "LBIST_PROG_REG,LBIST Program"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LBIST_SHIFT_COUNT,LBIST Shift Count"
|
|
tree.end
|
|
tree "SIRC"
|
|
base ad:0x402C8000
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "SR,Status Register"
|
|
bitfld.long 0x0 0. "STATUS,Status bit for SIRC" "0: SIRC is off or unstable,1: SIRC is on and stable"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "MISCELLANEOUS_IN,Miscellaneous input"
|
|
bitfld.long 0x0 8. "STANDBY_ENABLE,Standby Enable for SIRC" "0: SIRC disables in Standby mode,1: SIRC enables in Standby mode"
|
|
tree.end
|
|
tree "SIUL2"
|
|
base ad:0x40290000
|
|
rgroup.long 0x4++0x7
|
|
line.long 0x0 "MIDR1,SIUL2 MCU ID 1"
|
|
hexmask.long.byte 0x0 26.--31. 1. "PRODUCT_LINE_LETTER,Product Line Letter"
|
|
newline
|
|
hexmask.long.word 0x0 16.--25. 1. "PART_NO,MCU Part Number"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "MAJOR_MASK,Major Mask Revision"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MINOR_MASK,Minor Mask Revision"
|
|
line.long 0x4 "MIDR2,SIUL2 MCU ID 2"
|
|
bitfld.long 0x4 29.--31. "TECHNOLOGY,Technology" "?,1: C40EFS3,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 26.--28. "TEMPERATURE,Temperature" "?,?,?,?,4: M = 125C,?,?,?"
|
|
newline
|
|
hexmask.long.byte 0x4 20.--25. 1. "PACKAGE,Package"
|
|
newline
|
|
hexmask.long.byte 0x4 16.--19. 1. "FREQUENCY,Frequency"
|
|
newline
|
|
bitfld.long 0x4 14.--15. "FLASH_CODE,Flash Code" "?,?,2: Monolithic,?"
|
|
newline
|
|
bitfld.long 0x4 12.--13. "FLASH_DATA,Flash Data" "?,?,2: Monolithic,?"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "FLASH_SIZE_DATA,Flash Size Data"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "FLASH_SIZE_CODE,Flash Size Code"
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "DISR0,SIUL2 DMA/Interrupt Status Flag 0"
|
|
eventfld.long 0x0 31. "EIF31,External Interrupt Status Flag 31" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER31 and.."
|
|
newline
|
|
eventfld.long 0x0 30. "EIF30,External Interrupt Status Flag 30" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER30 and.."
|
|
newline
|
|
eventfld.long 0x0 29. "EIF29,External Interrupt Status Flag 29" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER29 and.."
|
|
newline
|
|
eventfld.long 0x0 28. "EIF28,External Interrupt Status Flag 28" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER28 and.."
|
|
newline
|
|
eventfld.long 0x0 27. "EIF27,External Interrupt Status Flag 27" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER27 and.."
|
|
newline
|
|
eventfld.long 0x0 26. "EIF26,External Interrupt Status Flag 26" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER26 and.."
|
|
newline
|
|
eventfld.long 0x0 25. "EIF25,External Interrupt Status Flag 25" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER25 and.."
|
|
newline
|
|
eventfld.long 0x0 24. "EIF24,External Interrupt Status Flag 24" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER24 and.."
|
|
newline
|
|
eventfld.long 0x0 23. "EIF23,External Interrupt Status Flag 23" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER23 and.."
|
|
newline
|
|
eventfld.long 0x0 22. "EIF22,External Interrupt Status Flag 22" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER22 and.."
|
|
newline
|
|
eventfld.long 0x0 21. "EIF21,External Interrupt Status Flag 21" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER21 and.."
|
|
newline
|
|
eventfld.long 0x0 20. "EIF20,External Interrupt Status Flag 20" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER20 and.."
|
|
newline
|
|
eventfld.long 0x0 19. "EIF19,External Interrupt Status Flag 19" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER19 and.."
|
|
newline
|
|
eventfld.long 0x0 18. "EIF18,External Interrupt Status Flag 18" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER18 and.."
|
|
newline
|
|
eventfld.long 0x0 17. "EIF17,External Interrupt Status Flag 17" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER17 and.."
|
|
newline
|
|
eventfld.long 0x0 16. "EIF16,External Interrupt Status Flag 16" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER16 and.."
|
|
newline
|
|
eventfld.long 0x0 15. "EIF15,External Interrupt Status Flag 15" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER15 and.."
|
|
newline
|
|
eventfld.long 0x0 14. "EIF14,External Interrupt Status Flag 14" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER14 and.."
|
|
newline
|
|
eventfld.long 0x0 13. "EIF13,External Interrupt Status Flag 13" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER13 and.."
|
|
newline
|
|
eventfld.long 0x0 12. "EIF12,External Interrupt Status Flag 12" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER12 and.."
|
|
newline
|
|
eventfld.long 0x0 11. "EIF11,External Interrupt Status Flag 11" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER11 and.."
|
|
newline
|
|
eventfld.long 0x0 10. "EIF10,External Interrupt Status Flag 10" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER10 and.."
|
|
newline
|
|
eventfld.long 0x0 9. "EIF9,External Interrupt Status Flag 9" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER9 and.."
|
|
newline
|
|
eventfld.long 0x0 8. "EIF8,External Interrupt Status Flag 8" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER8 and.."
|
|
newline
|
|
eventfld.long 0x0 7. "EIF7,External Interrupt Status Flag 7" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER7 and.."
|
|
newline
|
|
eventfld.long 0x0 6. "EIF6,External Interrupt Status Flag 6" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER6 and.."
|
|
newline
|
|
eventfld.long 0x0 5. "EIF5,External Interrupt Status Flag 5" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER5 and.."
|
|
newline
|
|
eventfld.long 0x0 4. "EIF4,External Interrupt Status Flag 4" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER4 and.."
|
|
newline
|
|
eventfld.long 0x0 3. "EIF3,External Interrupt Status Flag 3" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER3 and.."
|
|
newline
|
|
eventfld.long 0x0 2. "EIF2,External Interrupt Status Flag 2" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER2 and.."
|
|
newline
|
|
eventfld.long 0x0 1. "EIF1,External Interrupt Status Flag 1" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER1 and.."
|
|
newline
|
|
eventfld.long 0x0 0. "EIF0,External Interrupt Status Flag 0" "0: No interrupt event has occurred on the pad.,1: An interrupt event as defined by IREER0 and.."
|
|
group.long 0x18++0x3
|
|
line.long 0x0 "DIRER0,SIUL2 DMA/Interrupt Request Enable 0"
|
|
bitfld.long 0x0 31. "EIRE31,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "EIRE30,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "EIRE29,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "EIRE28,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "EIRE27,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "EIRE26,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "EIRE25,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "EIRE24,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "EIRE23,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "EIRE22,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "EIRE21,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "EIRE20,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "EIRE19,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "EIRE18,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "EIRE17,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "EIRE16,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "EIRE15,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "EIRE14,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "EIRE13,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "EIRE12,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "EIRE11,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "EIRE10,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "EIRE9,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "EIRE8,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "EIRE7,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "EIRE6,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "EIRE5,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "EIRE4,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "EIRE3,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "EIRE2,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "EIRE1,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "EIRE0,External Interrupt Request Enable" "0: Disabled,1: Enabled"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "DIRSR0,SIUL2 DMA/Interrupt Request Select 0"
|
|
bitfld.long 0x0 31. "DIRSR31,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 30. "DIRSR30,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 29. "DIRSR29,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 28. "DIRSR28,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 27. "DIRSR27,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 26. "DIRSR26,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 25. "DIRSR25,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 24. "DIRSR24,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 23. "DIRSR23,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 22. "DIRSR22,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 21. "DIRSR21,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
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bitfld.long 0x0 20. "DIRSR20,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 19. "DIRSR19,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 18. "DIRSR18,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 17. "DIRSR17,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
|
bitfld.long 0x0 16. "DIRSR16,DMA/Interrupt Request Select Register" "0: Interrupt request,?"
|
|
newline
|
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bitfld.long 0x0 15. "DIRSR15,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 14. "DIRSR14,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 13. "DIRSR13,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 12. "DIRSR12,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 11. "DIRSR11,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 10. "DIRSR10,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 9. "DIRSR9,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 8. "DIRSR8,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 7. "DIRSR7,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 6. "DIRSR6,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 5. "DIRSR5,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
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newline
|
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bitfld.long 0x0 4. "DIRSR4,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 3. "DIRSR3,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 2. "DIRSR2,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 1. "DIRSR1,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
newline
|
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bitfld.long 0x0 0. "DIRSR0,DMA/Interrupt Request Select Register" "0: Interrupt request,1: DMA request"
|
|
group.long 0x28++0x3
|
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line.long 0x0 "IREER0,SIUL2 Interrupt Rising-Edge Event Enable 0"
|
|
bitfld.long 0x0 31. "IREE31,Enables rising-edge events to set DISR0[EIF31]." "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 30. "IREE30,Enables rising-edge events to set DISR0[EIF30]." "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 29. "IREE29,Enables rising-edge events to set DISR0[EIF29]." "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 28. "IREE28,Enables rising-edge events to set DISR0[EIF28]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IREE27,Enables rising-edge events to set DISR0[EIF27]." "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 26. "IREE26,Enables rising-edge events to set DISR0[EIF26]." "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 25. "IREE25,Enables rising-edge events to set DISR0[EIF25]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IREE24,Enables rising-edge events to set DISR0[EIF24]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IREE23,Enables rising-edge events to set DISR0[EIF23]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IREE22,Enables rising-edge events to set DISR0[EIF22]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IREE21,Enables rising-edge events to set DISR0[EIF21]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IREE20,Enables rising-edge events to set DISR0[EIF20]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IREE19,Enables rising-edge events to set DISR0[EIF19]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IREE18,Enables rising-edge events to set DISR0[EIF18]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IREE17,Enables rising-edge events to set DISR0[EIF17]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IREE16,Enables rising-edge events to set DISR0[EIF16]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IREE15,Enables rising-edge events to set DISR0[EIF15]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IREE14,Enables rising-edge events to set DISR0[EIF14]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IREE13,Enables rising-edge events to set DISR0[EIF13]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IREE12,Enables rising-edge events to set DISR0[EIF12]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IREE11,Enables rising-edge events to set DISR0[EIF11]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IREE10,Enables rising-edge events to set DISR0[EIF10]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IREE9,Enables rising-edge events to set DISR0[EIF9]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IREE8,Enables rising-edge events to set DISR0[EIF8]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IREE7,Enables rising-edge events to set DISR0[EIF7]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IREE6,Enables rising-edge events to set DISR0[EIF6]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IREE5,Enables rising-edge events to set DISR0[EIF5]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IREE4,Enables rising-edge events to set DISR0[EIF4]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IREE3,Enables rising-edge events to set DISR0[EIF3]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IREE2,Enables rising-edge events to set DISR0[EIF2]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IREE1,Enables rising-edge events to set DISR0[EIF1]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IREE0,Enables rising-edge events to set DISR0[EIF0]." "0: Disabled,1: Enabled"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "IFEER0,SIUL2 Interrupt Falling-Edge Event Enable 0"
|
|
bitfld.long 0x0 31. "IFEE31,Enables falling-edge events to set DISR0[EIF31]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "IFEE30,Enables falling-edge events to set DISR0[EIF30]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "IFEE29,Enables falling-edge events to set DISR0[EIF29]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "IFEE28,Enables falling-edge events to set DISR0[EIF28]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IFEE27,Enables falling-edge events to set DISR0[EIF27]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "IFEE26,Enables falling-edge events to set DISR0[EIF26]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "IFEE25,Enables falling-edge events to set DISR0[EIF25]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IFEE24,Enables falling-edge events to set DISR0[EIF24]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IFEE23,Enables falling-edge events to set DISR0[EIF23]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IFEE22,Enables falling-edge events to set DISR0[EIF22]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IFEE21,Enables falling-edge events to set DISR0[EIF21]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IFEE20,Enables falling-edge events to set DISR0[EIF20]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IFEE19,Enables falling-edge events to set DISR0[EIF19]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IFEE18,Enables falling-edge events to set DISR0[EIF18]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IFEE17,Enables falling-edge events to set DISR0[EIF17]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IFEE16,Enables falling-edge events to set DISR0[EIF16]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IFEE15,Enables falling-edge events to set DISR0[EIF15]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IFEE14,Enables falling-edge events to set DISR0[EIF14]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IFEE13,Enables falling-edge events to set DISR0[EIF13]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IFEE12,Enables falling-edge events to set DISR0[EIF12]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IFEE11,Enables falling-edge events to set DISR0[EIF11]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IFEE10,Enables falling-edge events to set DISR0[EIF10]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IFEE9,Enables falling-edge events to set DISR0[EIF9]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IFEE8,Enables falling-edge events to set DISR0[EIF8]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IFEE7,Enables falling-edge events to set DISR0[EIF7]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFEE6,Enables falling-edge events to set DISR0[EIF6]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IFEE5,Enables falling-edge events to set DISR0[EIF5]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IFEE4,Enables falling-edge events to set DISR0[EIF4]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IFEE3,Enables falling-edge events to set DISR0[EIF3]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IFEE2,Enables falling-edge events to set DISR0[EIF2]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IFEE1,Enables falling-edge events to set DISR0[EIF1]." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IFEE0,Enables falling-edge events to set DISR0[EIF0]." "0: Disabled,1: Enabled"
|
|
group.long 0x38++0x3
|
|
line.long 0x0 "IFER0,SIUL2 Interrupt Filter Enable 0"
|
|
bitfld.long 0x0 31. "IFE31,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 30. "IFE30,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "IFE29,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 28. "IFE28,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "IFE27,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 26. "IFE26,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "IFE25,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 24. "IFE24,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 23. "IFE23,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 22. "IFE22,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "IFE21,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 20. "IFE20,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IFE19,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 18. "IFE18,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "IFE17,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 16. "IFE16,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 15. "IFE15,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "IFE14,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "IFE13,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "IFE12,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "IFE11,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 10. "IFE10,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "IFE9,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 8. "IFE8,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "IFE7,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE6,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "IFE5,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 4. "IFE4,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "IFE3,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "IFE2,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "IFE1,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "IFE0,Enables digital glitch filter on the interrupt pad input." "0: Disabled,1: Enabled"
|
|
group.long 0x40++0x83
|
|
line.long 0x0 "IFMCR0,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x0 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x4 "IFMCR1,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x8 "IFMCR2,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x8 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0xC "IFMCR3,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0xC 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x10 "IFMCR4,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x10 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x14 "IFMCR5,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x14 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x18 "IFMCR6,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x18 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x1C "IFMCR7,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x20 "IFMCR8,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x20 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x24 "IFMCR9,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x24 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x28 "IFMCR10,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x28 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x2C "IFMCR11,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x30 "IFMCR12,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x30 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x34 "IFMCR13,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x34 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x38 "IFMCR14,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x38 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x3C "IFMCR15,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x40 "IFMCR16,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x40 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x44 "IFMCR17,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x44 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x48 "IFMCR18,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x48 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x4C "IFMCR19,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x50 "IFMCR20,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x50 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x54 "IFMCR21,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x54 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x58 "IFMCR22,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x58 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x5C "IFMCR23,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x60 "IFMCR24,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x60 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x64 "IFMCR25,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x64 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x68 "IFMCR26,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x68 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x6C "IFMCR27,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x6C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x70 "IFMCR28,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x70 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x74 "IFMCR29,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x74 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x78 "IFMCR30,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x78 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x7C "IFMCR31,SIUL2 Interrupt Filter Maximum Counter"
|
|
hexmask.long.byte 0x7C 0.--3. 1. "MAXCNT,Maximum Interrupt Filter Counter setting"
|
|
line.long 0x80 "IFCPR,SIUL2 Interrupt Filter Clock Prescaler"
|
|
hexmask.long.byte 0x80 0.--3. 1. "IFCP,Interrupt Filter Clock Prescaler setting"
|
|
group.long 0x100++0xF
|
|
line.long 0x0 "MUX0_EMIOS_EN1,SIUL2 User Defined"
|
|
bitfld.long 0x0 31. "EMIOSFLG15_EN,EMIOS0 Output Flag 15 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 30. "EMIOSFLG14_EN,EMIOS0 Output Flag 14 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "EMIOSFLG13_EN,EMIOS0 Output Flag 13 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 28. "EMIOSFLG12_EN,EMIOS0 Output Flag 12 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "EMIOSFLG11_EN,EMIOS0 Output Flag 11 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 26. "EMIOSFLG10_EN,EMIOS0 Output Flag 10 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "EMIOSFLG9_EN,EMIOS0 Output Flag 9 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 24. "EMIOSFLG8_EN,EMIOS0 Output Flag 8 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "EMIOSFLG7_EN,EMIOS0 Output Flag 7 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 22. "EMIOSFLG6_EN,EMIOS0 Output Flag 6 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "EMIOSFLG5_EN,EMIOS0 Output Flag 5 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 20. "EMIOSFLG4_EN,EMIOS0 Output Flag 4 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "EMIOSFLG3_EN,EMIOS0 Output Flag 3 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 18. "EMIOSFLG2_EN,EMIOS0 Output Flag 2 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "EMIOSFLG1_EN,EMIOS0 Output Flag 1 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "EMIOSFLG0_EN,EMIOS0 Output Flag 0 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "EMIOSFLG23_EN,EMIOS0 Output Flag 23 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "EMIOSFLG22_EN,EMIOS0 Output Flag 22 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "EMIOSFLG21_EN,EMIOS0 Output Flag 21 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "EMIOSFLG20_EN,EMIOS0 Output Flag 20 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "EMIOSFLG19_EN,EMIOS0 Output Flag 19 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "EMIOSFLG18_EN,EMIOS0 Output Flag 18 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "EMIOSFLG17_EN,EMIOS0 Output Flag 17 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "EMIOSFLG16_EN,EMIOS0 Output Flag 16 Monitor Enable" "0,1"
|
|
line.long 0x4 "MUX0_MISC_EN,SIUL2 User Defined"
|
|
bitfld.long 0x4 25. "BCTUADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "BCTUADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "BCTULISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 22. "BCTUFIFO1INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "BCTUFIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "BCTUADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "BCTUADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "BCTUFIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "BCTUFIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "LPUART3TRG_EN,LPUART3 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 10. "LPUART2TRG_EN,LPUART2 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "LPUART1TRG_EN,LPUART1 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "LPUART0TRG_EN,LPUART0 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "ADC1EOC_EN,ADC1 End of Conversion Trigger Monitor" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "ADC0EOC_EN,ADC0 End of Conversion Trigger Monitor" "0,1"
|
|
line.long 0x8 "MUX1_EMIOS_EN,SIUL2 User Defined"
|
|
bitfld.long 0x8 31. "EMIOSFLG15_EN,EMIOS0 Output Flag 15 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 30. "EMIOSFLG14_EN,EMIOS0 Output Flag 14 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 29. "EMIOSFLG13_EN,EMIOS0 Output Flag 13 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 28. "EMIOSFLG12_EN,EMIOS0 Output Flag 12 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 27. "EMIOSFLG11_EN,EMIOS0 Output Flag 11 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 26. "EMIOSFLG10_EN,EMIOS0 Output Flag 10 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 25. "EMIOSFLG9_EN,EMIOS0 Output Flag 9 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 24. "EMIOSFLG8_EN,EMIOS0 Output Flag 8 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 23. "EMIOSFLG7_EN,EMIOS0 Output Flag 7 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 22. "EMIOSFLG6_EN,EMIOS0 Output Flag 6 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 21. "EMIOSFLG5_EN,EMIOS0 Output Flag 5 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 20. "EMIOSFLG4_EN,EMIOS0 Output Flag 4 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 19. "EMIOSFLG3_EN,EMIOS0 Output Flag 3 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 18. "EMIOSFLG2_EN,EMIOS0 Output Flag 2 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 17. "EMIOSFLG1_EN,EMIOS0 Output Flag 1 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 16. "EMIOSFLG0_EN,EMIOS0 Output Flag 0 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "EMIOSFLG23_EN,EMIOS0 Output Flag 23 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "EMIOSFLG22_EN,EMIOS0 Output Flag 22 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "EMIOSFLG21_EN,EMIOS0 Output Flag 21 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "EMIOSFLG20_EN,EMIOS0 Output Flag 20 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "EMIOSFLG19_EN,EMIOS0 Output Flag 19 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "EMIOSFLG18_EN,EMIOS0 Output Flag 18 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "EMIOSFLG17_EN,EMIOS0 Output Flag 17 Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "EMIOSFLG16_EN,EMIOS0 Output Flag 16 Monitor Enable" "0,1"
|
|
line.long 0xC "MUX1_MISC_EN,SIUL2 User Defined"
|
|
bitfld.long 0xC 25. "BCTUADC1INT_EN,BCTU ADC1DR Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 24. "BCTUADC0INT_EN,BCTU ADC0DR Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 23. "BCTULISTINT_EN,BCTU Conversion List Interrupt Request Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 22. "BCTUFIFO1INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 21. "BCTUFIFO0INT_EN,BCTU FIFO0 Interrupt Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 19. "BCTUADC1DMA_EN,BCTU ADC1DR DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 18. "BCTUADC0DMA_EN,BCTU ADC0DR DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 17. "BCTUFIFO1DMA_EN,BCTU FIFO1 DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 16. "BCTUFIFO0DMA_EN,BCTU FIFO0 DMA Request Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 11. "LPUART3TRG_EN,LPUART3 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 10. "LPUART2TRG_EN,LPUART2 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 9. "LPUART1TRG_EN,LPUART1 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 8. "LPUART0TRG_EN,LPUART0 Output Trigger Monitor Enable" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "ADC1EOC_EN,ADC1 End of Conversion Trigger Monitor" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "ADC0EOC_EN,ADC0 End of Conversion Trigger Monitor" "0,1"
|
|
rgroup.long 0x200++0x7
|
|
line.long 0x0 "MIDR3,SIUL2 MCU ID 3"
|
|
hexmask.long.byte 0x0 26.--31. 1. "PROD_FAM_LET,Product Family Letter"
|
|
newline
|
|
hexmask.long.word 0x0 16.--25. 1. "PROD_FAM_NO,Product Family Number"
|
|
newline
|
|
hexmask.long.byte 0x0 10.--15. 1. "PART_NO_SUF,Part Number Suffix"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "SYS_RAM_SIZE,System RAM Size"
|
|
line.long 0x4 "MIDR4,SIUL2 MCU ID 4"
|
|
bitfld.long 0x4 5.--6. "SEC_FET,Security Feature" "?,1: HSE-B,?,?"
|
|
newline
|
|
bitfld.long 0x4 3.--4. "EMAC_FET,Ethernet Feature" "0: No Ethernet,1: Ethernet present,?,?"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "CORE_PLAT_FET,Core Platform Options Feature" "0: Single core,1: Dual core,2: 1x lock-step core,3: 1x lock-step core + 1 perf. core,4: Triple core,?,?,?"
|
|
group.long 0x240++0x47
|
|
line.long 0x0 "MSCR0,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x4 "MSCR1,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x8 "MSCR2,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0xC "MSCR3,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x10 "MSCR4,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x14 "MSCR5,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x18 "MSCR6,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x1C "MSCR7,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x20 "MSCR8,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x24 "MSCR9,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x28 "MSCR10,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x2C "MSCR11,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x30 "MSCR12,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x34 "MSCR13,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x38 "MSCR14,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
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newline
|
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bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x3C "MSCR15,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
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newline
|
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bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
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newline
|
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bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x40 "MSCR16,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
|
bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x44 "MSCR17,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
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bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
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bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1"
|
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group.long 0x2C0++0x17
|
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line.long 0x0 "MSCR32,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
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bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
|
bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x4 "MSCR33,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
|
bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
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|
newline
|
|
bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
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bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x8 "MSCR34,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0xC "MSCR35,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x10 "MSCR36,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x14 "MSCR37,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
group.long 0x2E0++0x27
|
|
line.long 0x0 "MSCR40,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x4 "MSCR41,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x8 "MSCR42,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0xC "MSCR43,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x10 "MSCR44,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x14 "MSCR45,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x18 "MSCR46,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x1C "MSCR47,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x20 "MSCR48,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x24 "MSCR49,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1"
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group.long 0x340++0x47
|
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line.long 0x0 "MSCR64,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x4 "MSCR65,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
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newline
|
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bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
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newline
|
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bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x8 "MSCR66,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
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newline
|
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bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0xC "MSCR67,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x10 "MSCR68,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x14 "MSCR69,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x18 "MSCR70,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
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bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x1C "MSCR71,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x20 "MSCR72,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x24 "MSCR73,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x28 "MSCR74,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x2C "MSCR75,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x30 "MSCR76,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x34 "MSCR77,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x38 "MSCR78,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x3C "MSCR79,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
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newline
|
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bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
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newline
|
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bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x40 "MSCR80,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
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newline
|
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bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x44 "MSCR81,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
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bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
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bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
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bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
group.long 0x3C0++0x47
|
|
line.long 0x0 "MSCR96,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x4 "MSCR97,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x8 "MSCR98,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0xC "MSCR99,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x10 "MSCR100,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x14 "MSCR101,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x18 "MSCR102,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x1C "MSCR103,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x20 "MSCR104,SIUL2 Multiplexed Signal Configuration Register"
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bitfld.long 0x20 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x20 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x20 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x20 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x20 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x20 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x20 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x20 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x20 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x20 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x24 "MSCR105,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x24 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x24 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x24 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x24 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x24 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x24 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x24 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x24 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x24 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x24 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x28 "MSCR106,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x28 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x28 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x28 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x28 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x28 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
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newline
|
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bitfld.long 0x28 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x28 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x28 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x28 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x28 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x28 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x28 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x28 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x28 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x2C "MSCR107,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x2C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
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newline
|
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bitfld.long 0x2C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x2C 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x2C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x2C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x2C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x2C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x2C 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x2C 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x2C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x2C 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x2C 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x2C 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x2C 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x30 "MSCR108,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x30 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x30 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x30 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x30 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x30 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x30 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x30 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x30 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x30 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x30 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x30 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x30 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x34 "MSCR109,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x34 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x34 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x34 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x34 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x34 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x34 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x34 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x34 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x34 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x34 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x34 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x34 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x34 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
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bitfld.long 0x34 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x38 "MSCR110,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x38 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
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bitfld.long 0x38 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x38 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x38 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x38 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
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bitfld.long 0x38 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x38 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
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bitfld.long 0x38 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x38 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x38 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x38 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x38 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x38 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x38 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x3C "MSCR111,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x3C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x3C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
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bitfld.long 0x3C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x3C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x3C 8. "DSE,DSE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x3C 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
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bitfld.long 0x3C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
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bitfld.long 0x3C 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
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bitfld.long 0x3C 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
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bitfld.long 0x3C 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x3C 0. "SSS_0,Source Signal Select_0" "0,1"
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line.long 0x40 "MSCR112,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x40 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
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newline
|
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bitfld.long 0x40 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x40 17. "INV,Invert" "0: Don't invert,1: Invert"
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newline
|
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bitfld.long 0x40 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x40 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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|
newline
|
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bitfld.long 0x40 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x40 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x40 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x40 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x40 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
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newline
|
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bitfld.long 0x40 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x40 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x40 1. "SSS_1,Source Signal Select_1" "0,1"
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newline
|
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bitfld.long 0x40 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x44 "MSCR113,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x44 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x44 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x44 17. "INV,Invert" "0: Don't invert,1: Invert"
|
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newline
|
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bitfld.long 0x44 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
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newline
|
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bitfld.long 0x44 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
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newline
|
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bitfld.long 0x44 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x44 6. "IFE,IFE" "0: Disabled,1: Enabled"
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newline
|
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bitfld.long 0x44 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x44 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x44 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x44 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x44 0. "SSS_0,Source Signal Select_0" "0,1"
|
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group.long 0x440++0xF
|
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line.long 0x0 "MSCR128,SIUL2 Multiplexed Signal Configuration Register"
|
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bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
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newline
|
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bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
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bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
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newline
|
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bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
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newline
|
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bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x4 "MSCR129,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
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bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
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newline
|
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bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
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newline
|
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bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
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newline
|
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bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0x8 "MSCR130,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
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bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
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bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
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bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
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bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
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newline
|
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bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
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bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
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bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
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line.long 0xC "MSCR131,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
group.long 0x458++0x1F
|
|
line.long 0x0 "MSCR134,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x4 "MSCR135,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x8 "MSCR136,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x8 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x8 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x8 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x8 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x8 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x8 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0xC "MSCR137,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0xC 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0xC 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0xC 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0xC 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0xC 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0xC 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0xC 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0xC 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0xC 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0xC 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x10 "MSCR138,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x10 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x10 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x10 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x10 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x10 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x10 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x10 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x14 "MSCR139,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x14 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x14 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x14 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x14 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x14 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x14 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x14 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x14 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x18 "MSCR140,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x18 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x18 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x18 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x18 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x18 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x18 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x18 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x18 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x1C "MSCR141,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x1C 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x1C 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x1C 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x1C 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x1C 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x1C 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x1C 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x1C 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x1C 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x1C 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x1C 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
group.long 0x47C++0x7
|
|
line.long 0x0 "MSCR143,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x0 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x0 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x0 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x0 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x0 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x0 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
line.long 0x4 "MSCR144,SIUL2 Multiplexed Signal Configuration Register"
|
|
bitfld.long 0x4 21. "OBE,GPIO Output Buffer Enable" "0: Output driver disabled,1: Output driver enabled"
|
|
newline
|
|
bitfld.long 0x4 19. "IBE,Input Buffer Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 17. "INV,Invert" "0: Don't invert,1: Invert"
|
|
newline
|
|
bitfld.long 0x4 16. "PKE,Pad keeping enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 14. "SRC,Slew Rate Control" "0: Fastest setting,1: Slowest setting"
|
|
newline
|
|
bitfld.long 0x4 13. "PUE,Pull Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 11. "PUS,Pull Select" "0: Pull down,1: Pull up"
|
|
newline
|
|
bitfld.long 0x4 8. "DSE,DSE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 6. "IFE,IFE" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x4 5. "SMC,Safe Mode Control" "0: Disable (The output buffer returns to its..,1: Don't disable"
|
|
newline
|
|
bitfld.long 0x4 3. "SSS_3,Source Signal Select_3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "SSS_2,Source Signal Select_2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "SSS_1,Source Signal Select_1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 0. "SSS_0,Source Signal Select_0" "0,1"
|
|
group.long 0xA40++0xB
|
|
line.long 0x0 "IMCR0,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR1,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR2,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xA80++0xDF
|
|
line.long 0x0 "IMCR16,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR17,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR18,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR19,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR20,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR21,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR22,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR23,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x20 "IMCR24,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x24 "IMCR25,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x28 "IMCR26,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x2C "IMCR27,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x30 "IMCR28,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x34 "IMCR29,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x38 "IMCR30,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x3C "IMCR31,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x40 "IMCR32,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x44 "IMCR33,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x48 "IMCR34,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4C "IMCR35,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x50 "IMCR36,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x54 "IMCR37,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x58 "IMCR38,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x5C "IMCR39,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x60 "IMCR40,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x64 "IMCR41,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x68 "IMCR42,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x6C "IMCR43,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x70 "IMCR44,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x74 "IMCR45,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x78 "IMCR46,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x7C "IMCR47,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x80 "IMCR48,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x84 "IMCR49,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x88 "IMCR50,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8C "IMCR51,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x90 "IMCR52,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x94 "IMCR53,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x98 "IMCR54,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x9C "IMCR55,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA0 "IMCR56,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA4 "IMCR57,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA8 "IMCR58,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xAC "IMCR59,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xAC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xB0 "IMCR60,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xB0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xB4 "IMCR61,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xB4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xB8 "IMCR62,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xB8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xBC "IMCR63,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xBC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC0 "IMCR64,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC4 "IMCR65,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC8 "IMCR66,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xCC "IMCR67,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xCC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xD0 "IMCR68,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xD0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xD4 "IMCR69,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xD4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xD8 "IMCR70,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xD8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xDC "IMCR71,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xDC 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xB80++0x5F
|
|
line.long 0x0 "IMCR80,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR81,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR82,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR83,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR84,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR85,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR86,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR87,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x20 "IMCR88,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x24 "IMCR89,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x28 "IMCR90,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x2C "IMCR91,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x30 "IMCR92,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x34 "IMCR93,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x38 "IMCR94,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x3C "IMCR95,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x40 "IMCR96,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x44 "IMCR97,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x48 "IMCR98,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4C "IMCR99,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x50 "IMCR100,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x54 "IMCR101,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x58 "IMCR102,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x5C "IMCR103,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xC90++0x7
|
|
line.long 0x0 "IMCR148,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR149,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xCA0++0x3F
|
|
line.long 0x0 "IMCR152,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR153,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR154,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR155,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR156,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR157,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR158,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR159,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x20 "IMCR160,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x24 "IMCR161,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x28 "IMCR162,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x2C "IMCR163,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x30 "IMCR164,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x34 "IMCR165,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x38 "IMCR166,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x3C "IMCR167,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xD20++0x1B
|
|
line.long 0x0 "IMCR184,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR185,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR186,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR187,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR188,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR189,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR190,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xD8C++0xAF
|
|
line.long 0x0 "IMCR211,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR212,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR213,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR214,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR215,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR216,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR217,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR218,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x20 "IMCR219,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x24 "IMCR220,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x28 "IMCR221,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x2C "IMCR222,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x30 "IMCR223,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x34 "IMCR224,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x38 "IMCR225,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x3C "IMCR226,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x40 "IMCR227,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x44 "IMCR228,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x48 "IMCR229,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4C "IMCR230,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x50 "IMCR231,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x54 "IMCR232,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x58 "IMCR233,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x5C "IMCR234,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x60 "IMCR235,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x60 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x64 "IMCR236,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x64 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x68 "IMCR237,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x68 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x6C "IMCR238,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x6C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x70 "IMCR239,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x70 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x74 "IMCR240,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x74 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x78 "IMCR241,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x78 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x7C "IMCR242,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x7C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x80 "IMCR243,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x80 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x84 "IMCR244,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x84 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x88 "IMCR245,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x88 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8C "IMCR246,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x90 "IMCR247,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x90 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x94 "IMCR248,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x94 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x98 "IMCR249,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x98 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x9C "IMCR250,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x9C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA0 "IMCR251,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA4 "IMCR252,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xA8 "IMCR253,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xA8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xAC "IMCR254,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xAC 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0xF9C++0x5F
|
|
line.long 0x0 "IMCR343,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR344,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR345,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR346,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR347,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR348,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR349,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR350,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x20 "IMCR351,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x20 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x24 "IMCR352,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x24 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x28 "IMCR353,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x28 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x2C "IMCR354,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x30 "IMCR355,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x30 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x34 "IMCR356,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x34 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x38 "IMCR357,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x38 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x3C "IMCR358,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x3C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x40 "IMCR359,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x40 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x44 "IMCR360,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x44 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x48 "IMCR361,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x48 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4C "IMCR362,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x50 "IMCR363,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x50 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x54 "IMCR364,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x54 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x58 "IMCR365,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x58 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x5C "IMCR366,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x5C 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0x100C++0x1F
|
|
line.long 0x0 "IMCR371,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x4 "IMCR372,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x8 "IMCR373,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0xC "IMCR374,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0xC 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x10 "IMCR375,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x10 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x14 "IMCR376,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x14 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x18 "IMCR377,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x18 0.--3. 1. "SSS,Source Signal Select"
|
|
line.long 0x1C "IMCR378,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x1C 0.--3. 1. "SSS,Source Signal Select"
|
|
group.long 0x107C++0x3
|
|
line.long 0x0 "IMCR399,SIUL2 Input Multiplexed Signal Configuration"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSS,Source Signal Select"
|
|
group.byte 0x1300++0xF
|
|
line.byte 0x0 "GPDO3,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO2,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO1,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO0,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO7,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x5 "GPDO6,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x6 "GPDO5,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x7 "GPDO4,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x8 "GPDO11,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x9 "GPDO10,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xA "GPDO9,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xB "GPDO8,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xC "GPDO15,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xD "GPDO14,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xE "GPDO13,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xF "GPDO12,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1312++0x1
|
|
line.byte 0x0 "GPDO17,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO16,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1320++0x3
|
|
line.byte 0x0 "GPDO35,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO34,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO33,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO32,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1326++0x9
|
|
line.byte 0x0 "GPDO37,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO36,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO43,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO42,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO41,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x5 "GPDO40,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x6 "GPDO47,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x7 "GPDO46,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x8 "GPDO45,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x9 "GPDO44,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1332++0x1
|
|
line.byte 0x0 "GPDO49,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO48,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1340++0xF
|
|
line.byte 0x0 "GPDO67,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO66,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO65,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO64,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO71,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x5 "GPDO70,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x6 "GPDO69,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x7 "GPDO68,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x8 "GPDO75,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x9 "GPDO74,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xA "GPDO73,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xB "GPDO72,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xC "GPDO79,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xD "GPDO78,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xE "GPDO77,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xF "GPDO76,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1352++0x1
|
|
line.byte 0x0 "GPDO81,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO80,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1360++0xF
|
|
line.byte 0x0 "GPDO99,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO98,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO97,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO96,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO103,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x5 "GPDO102,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x6 "GPDO101,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x6 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x7 "GPDO100,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x7 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x8 "GPDO107,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x8 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x9 "GPDO106,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x9 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xA "GPDO105,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xA 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xB "GPDO104,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xB 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xC "GPDO111,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xC 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xD "GPDO110,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xD 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xE "GPDO109,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xE 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0xF "GPDO108,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0xF 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1372++0x1
|
|
line.byte 0x0 "GPDO113,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO112,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1380++0x5
|
|
line.byte 0x0 "GPDO131,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO130,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO129,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO128,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO135,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x5 "GPDO134,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x5 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1388++0x4
|
|
line.byte 0x0 "GPDO139,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO138,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x2 "GPDO137,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x2 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x3 "GPDO136,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x3 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x4 "GPDO143,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x4 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x138E++0x1
|
|
line.byte 0x0 "GPDO141,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
line.byte 0x1 "GPDO140,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x1 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
group.byte 0x1393++0x0
|
|
line.byte 0x0 "GPDO144,SIUL2 GPIO Pad Data Output"
|
|
bitfld.byte 0x0 0. "PDO_n,Pad Data Out" "0: Pad Data Out Low,1: Pad Data Out High"
|
|
rgroup.byte 0x1500++0xF
|
|
line.byte 0x0 "GPDI3,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI2,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI1,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI0,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI7,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x5 "GPDI6,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x6 "GPDI5,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x7 "GPDI4,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x8 "GPDI11,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x9 "GPDI10,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xA "GPDI9,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xB "GPDI8,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xC "GPDI15,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xD "GPDI14,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xE "GPDI13,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xF "GPDI12,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1512++0x1
|
|
line.byte 0x0 "GPDI17,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI16,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1520++0x3
|
|
line.byte 0x0 "GPDI35,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI34,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI33,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI32,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1526++0x9
|
|
line.byte 0x0 "GPDI37,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI36,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI43,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI42,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI41,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x5 "GPDI40,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x6 "GPDI47,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x7 "GPDI46,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x8 "GPDI45,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x9 "GPDI44,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1532++0x1
|
|
line.byte 0x0 "GPDI49,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI48,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1540++0xF
|
|
line.byte 0x0 "GPDI67,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI66,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI65,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI64,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI71,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x5 "GPDI70,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x6 "GPDI69,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x7 "GPDI68,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x8 "GPDI75,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x9 "GPDI74,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xA "GPDI73,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xB "GPDI72,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xC "GPDI79,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xD "GPDI78,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xE "GPDI77,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xF "GPDI76,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1552++0x1
|
|
line.byte 0x0 "GPDI81,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI80,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1560++0xF
|
|
line.byte 0x0 "GPDI99,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI98,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI97,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI96,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI103,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x5 "GPDI102,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x6 "GPDI101,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x6 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x7 "GPDI100,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x7 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x8 "GPDI107,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x8 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x9 "GPDI106,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x9 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xA "GPDI105,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xA 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xB "GPDI104,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xB 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xC "GPDI111,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xC 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xD "GPDI110,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xD 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xE "GPDI109,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xE 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0xF "GPDI108,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0xF 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1572++0x1
|
|
line.byte 0x0 "GPDI113,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI112,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1580++0x5
|
|
line.byte 0x0 "GPDI131,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI130,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI129,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI128,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI135,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x5 "GPDI134,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x5 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1588++0x4
|
|
line.byte 0x0 "GPDI139,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI138,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x2 "GPDI137,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x2 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x3 "GPDI136,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x3 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x4 "GPDI143,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x4 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x158E++0x1
|
|
line.byte 0x0 "GPDI141,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
line.byte 0x1 "GPDI140,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x1 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
rgroup.byte 0x1593++0x0
|
|
line.byte 0x0 "GPDI144,SIUL2 GPIO Pad Data Input"
|
|
bitfld.byte 0x0 0. "PDI_n,Pad Data In" "0: Pad Data In Low,1: Pad Data In High"
|
|
group.word 0x1700++0x13
|
|
line.word 0x0 "PGPDO1,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x0 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x0 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
line.word 0x2 "PGPDO0,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x2 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high"
|
|
line.word 0x4 "PGPDO3,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x4 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x4 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
line.word 0x6 "PGPDO2,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x6 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high"
|
|
line.word 0x8 "PGPDO5,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x8 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x8 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
line.word 0xA "PGPDO4,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0xA 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high"
|
|
line.word 0xC "PGPDO7,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0xC 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xC 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
line.word 0xE "PGPDO6,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0xE 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 11. "PPDO11,Parallel Pad Data Out 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 10. "PPDO10,Parallel Pad Data Out 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 1. "PPDO1,Parallel Pad Data Out 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high"
|
|
line.word 0x10 "PGPDO9,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x10 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
line.word 0x12 "PGPDO8,SIUL2 Parallel GPIO Pad Data Out"
|
|
bitfld.word 0x12 15. "PPDO15,Parallel Pad Data Out 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 14. "PPDO14,Parallel Pad Data Out 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 13. "PPDO13,Parallel Pad Data Out 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 12. "PPDO12,Parallel Pad Data Out 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 9. "PPDO9,Parallel Pad Data Out 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 8. "PPDO8,Parallel Pad Data Out 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 7. "PPDO7,Parallel Pad Data Out 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 6. "PPDO6,Parallel Pad Data Out 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 5. "PPDO5,Parallel Pad Data Out 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 4. "PPDO4,Parallel Pad Data Out 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 3. "PPDO3,Parallel Pad Data Out 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 2. "PPDO2,Parallel Pad Data Out 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 0. "PPDO0,Parallel Pad Data Out 0" "0: Logic low,1: Logic high"
|
|
rgroup.word 0x1740++0x13
|
|
line.word 0x0 "PGPDI1,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x0 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x0 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
line.word 0x2 "PGPDI0,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x2 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x2 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high"
|
|
line.word 0x4 "PGPDI3,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x4 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x4 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
line.word 0x6 "PGPDI2,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x6 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x6 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high"
|
|
line.word 0x8 "PGPDI5,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x8 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x8 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
line.word 0xA "PGPDI4,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0xA 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xA 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high"
|
|
line.word 0xC "PGPDI7,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0xC 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xC 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
line.word 0xE "PGPDI6,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0xE 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 11. "PPDI11,Parallel Pad Data In 11" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 10. "PPDI10,Parallel Pad Data In 10" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 1. "PPDI1,Parallel Pad Data In 1" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0xE 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high"
|
|
line.word 0x10 "PGPDI9,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x10 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
line.word 0x12 "PGPDI8,SIUL2 Parallel GPIO Pad Data In"
|
|
bitfld.word 0x12 15. "PPDI15,Parallel Pad Data In 15" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 14. "PPDI14,Parallel Pad Data In 14" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 13. "PPDI13,Parallel Pad Data In 13" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 12. "PPDI12,Parallel Pad Data In 12" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 9. "PPDI9,Parallel Pad Data In 9" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 8. "PPDI8,Parallel Pad Data In 8" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 7. "PPDI7,Parallel Pad Data In 7" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 6. "PPDI6,Parallel Pad Data In 6" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 5. "PPDI5,Parallel Pad Data In 5" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 4. "PPDI4,Parallel Pad Data In 4" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 3. "PPDI3,Parallel Pad Data In 3" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 2. "PPDI2,Parallel Pad Data In 2" "0: Logic low,1: Logic high"
|
|
newline
|
|
bitfld.word 0x12 0. "PPDI0,Parallel Pad Data In 0" "0: Logic low,1: Logic high"
|
|
group.long 0x1780++0x27
|
|
line.long 0x0 "MPGPDO0,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x0 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x0 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x0 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written"
|
|
newline
|
|
bitfld.long 0x0 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written"
|
|
newline
|
|
bitfld.long 0x0 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written"
|
|
newline
|
|
bitfld.long 0x0 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written"
|
|
newline
|
|
bitfld.long 0x0 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written"
|
|
newline
|
|
bitfld.long 0x0 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written"
|
|
newline
|
|
bitfld.long 0x0 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written"
|
|
newline
|
|
bitfld.long 0x0 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written"
|
|
newline
|
|
bitfld.long 0x0 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written"
|
|
newline
|
|
bitfld.long 0x0 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written"
|
|
newline
|
|
bitfld.long 0x0 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written"
|
|
newline
|
|
bitfld.long 0x0 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written"
|
|
newline
|
|
bitfld.long 0x0 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written"
|
|
newline
|
|
bitfld.long 0x0 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written"
|
|
newline
|
|
bitfld.long 0x0 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x0 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1"
|
|
newline
|
|
bitfld.long 0x0 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1"
|
|
line.long 0x4 "MPGPDO1,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x4 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x4 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x4 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
line.long 0x8 "MPGPDO2,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x8 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x8 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x8 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written"
|
|
newline
|
|
bitfld.long 0x8 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written"
|
|
newline
|
|
bitfld.long 0x8 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written"
|
|
newline
|
|
bitfld.long 0x8 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written"
|
|
newline
|
|
bitfld.long 0x8 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written"
|
|
newline
|
|
bitfld.long 0x8 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written"
|
|
newline
|
|
bitfld.long 0x8 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written"
|
|
newline
|
|
bitfld.long 0x8 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written"
|
|
newline
|
|
bitfld.long 0x8 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written"
|
|
newline
|
|
bitfld.long 0x8 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written"
|
|
newline
|
|
bitfld.long 0x8 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written"
|
|
newline
|
|
bitfld.long 0x8 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written"
|
|
newline
|
|
bitfld.long 0x8 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
newline
|
|
bitfld.long 0x8 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1"
|
|
newline
|
|
bitfld.long 0x8 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1"
|
|
newline
|
|
bitfld.long 0x8 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1"
|
|
newline
|
|
bitfld.long 0x8 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1"
|
|
newline
|
|
bitfld.long 0x8 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1"
|
|
newline
|
|
bitfld.long 0x8 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1"
|
|
newline
|
|
bitfld.long 0x8 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1"
|
|
newline
|
|
bitfld.long 0x8 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1"
|
|
newline
|
|
bitfld.long 0x8 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1"
|
|
newline
|
|
bitfld.long 0x8 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1"
|
|
newline
|
|
bitfld.long 0x8 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1"
|
|
line.long 0xC "MPGPDO3,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0xC 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0xC 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0xC 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0xC 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
line.long 0x10 "MPGPDO4,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x10 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x10 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x10 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written"
|
|
newline
|
|
bitfld.long 0x10 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written"
|
|
newline
|
|
bitfld.long 0x10 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written"
|
|
newline
|
|
bitfld.long 0x10 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written"
|
|
newline
|
|
bitfld.long 0x10 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written"
|
|
newline
|
|
bitfld.long 0x10 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written"
|
|
newline
|
|
bitfld.long 0x10 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written"
|
|
newline
|
|
bitfld.long 0x10 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written"
|
|
newline
|
|
bitfld.long 0x10 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written"
|
|
newline
|
|
bitfld.long 0x10 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written"
|
|
newline
|
|
bitfld.long 0x10 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written"
|
|
newline
|
|
bitfld.long 0x10 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written"
|
|
newline
|
|
bitfld.long 0x10 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written"
|
|
newline
|
|
bitfld.long 0x10 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written"
|
|
newline
|
|
bitfld.long 0x10 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x10 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
newline
|
|
bitfld.long 0x10 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1"
|
|
newline
|
|
bitfld.long 0x10 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1"
|
|
newline
|
|
bitfld.long 0x10 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1"
|
|
newline
|
|
bitfld.long 0x10 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1"
|
|
newline
|
|
bitfld.long 0x10 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1"
|
|
newline
|
|
bitfld.long 0x10 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1"
|
|
newline
|
|
bitfld.long 0x10 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1"
|
|
newline
|
|
bitfld.long 0x10 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1"
|
|
newline
|
|
bitfld.long 0x10 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1"
|
|
newline
|
|
bitfld.long 0x10 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1"
|
|
newline
|
|
bitfld.long 0x10 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1"
|
|
newline
|
|
bitfld.long 0x10 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1"
|
|
newline
|
|
bitfld.long 0x10 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1"
|
|
line.long 0x14 "MPGPDO5,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x14 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x14 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x14 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x14 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
line.long 0x18 "MPGPDO6,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x18 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x18 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x18 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written"
|
|
newline
|
|
bitfld.long 0x18 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written"
|
|
newline
|
|
bitfld.long 0x18 27. "MASK11,Mask Field 11" "0: MPPDO11 is ignored,1: MPPDO11 is written"
|
|
newline
|
|
bitfld.long 0x18 26. "MASK10,Mask Field 10" "0: MPPDO10 is ignored,1: MPPDO10 is written"
|
|
newline
|
|
bitfld.long 0x18 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written"
|
|
newline
|
|
bitfld.long 0x18 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written"
|
|
newline
|
|
bitfld.long 0x18 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written"
|
|
newline
|
|
bitfld.long 0x18 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written"
|
|
newline
|
|
bitfld.long 0x18 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written"
|
|
newline
|
|
bitfld.long 0x18 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written"
|
|
newline
|
|
bitfld.long 0x18 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written"
|
|
newline
|
|
bitfld.long 0x18 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written"
|
|
newline
|
|
bitfld.long 0x18 17. "MASK1,Mask Field 1" "0: MPPDO1 is ignored,1: MPPDO1 is written"
|
|
newline
|
|
bitfld.long 0x18 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written"
|
|
newline
|
|
bitfld.long 0x18 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x18 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
newline
|
|
bitfld.long 0x18 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1"
|
|
newline
|
|
bitfld.long 0x18 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1"
|
|
newline
|
|
bitfld.long 0x18 11. "MPPDO11,Masked Parallel Pad Data Out 11" "0,1"
|
|
newline
|
|
bitfld.long 0x18 10. "MPPDO10,Masked Parallel Pad Data Out 10" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1"
|
|
newline
|
|
bitfld.long 0x18 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1"
|
|
newline
|
|
bitfld.long 0x18 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1"
|
|
newline
|
|
bitfld.long 0x18 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1"
|
|
newline
|
|
bitfld.long 0x18 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "MPPDO1,Masked Parallel Pad Data Out 1" "0,1"
|
|
newline
|
|
bitfld.long 0x18 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1"
|
|
line.long 0x1C "MPGPDO7,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x1C 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x1C 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x1C 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x1C 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
line.long 0x20 "MPGPDO8,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x20 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x20 30. "MASK14,Mask Field 14" "0: MPPDO14 is ignored,1: MPPDO14 is written"
|
|
newline
|
|
bitfld.long 0x20 29. "MASK13,Mask Field 13" "0: MPPDO13 is ignored,1: MPPDO13 is written"
|
|
newline
|
|
bitfld.long 0x20 28. "MASK12,Mask Field 12" "0: MPPDO12 is ignored,1: MPPDO12 is written"
|
|
newline
|
|
bitfld.long 0x20 25. "MASK9,Mask Field 9" "0: MPPDO9 is ignored,1: MPPDO9 is written"
|
|
newline
|
|
bitfld.long 0x20 24. "MASK8,Mask Field 8" "0: MPPDO8 is ignored,1: MPPDO8 is written"
|
|
newline
|
|
bitfld.long 0x20 23. "MASK7,Mask Field 7" "0: MPPDO7 is ignored,1: MPPDO7 is written"
|
|
newline
|
|
bitfld.long 0x20 22. "MASK6,Mask Field 6" "0: MPPDO6 is ignored,1: MPPDO6 is written"
|
|
newline
|
|
bitfld.long 0x20 21. "MASK5,Mask Field 5" "0: MPPDO5 is ignored,1: MPPDO5 is written"
|
|
newline
|
|
bitfld.long 0x20 20. "MASK4,Mask Field 4" "0: MPPDO4 is ignored,1: MPPDO4 is written"
|
|
newline
|
|
bitfld.long 0x20 19. "MASK3,Mask Field 3" "0: MPPDO3 is ignored,1: MPPDO3 is written"
|
|
newline
|
|
bitfld.long 0x20 18. "MASK2,Mask Field 2" "0: MPPDO2 is ignored,1: MPPDO2 is written"
|
|
newline
|
|
bitfld.long 0x20 16. "MASK0,Mask Field 0" "0: MPPDO0 is ignored,1: MPPDO0 is written"
|
|
newline
|
|
bitfld.long 0x20 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
newline
|
|
bitfld.long 0x20 14. "MPPDO14,Masked Parallel Pad Data Out 14" "0,1"
|
|
newline
|
|
bitfld.long 0x20 13. "MPPDO13,Masked Parallel Pad Data Out 13" "0,1"
|
|
newline
|
|
bitfld.long 0x20 12. "MPPDO12,Masked Parallel Pad Data Out 12" "0,1"
|
|
newline
|
|
bitfld.long 0x20 9. "MPPDO9,Masked Parallel Pad Data Out 9" "0,1"
|
|
newline
|
|
bitfld.long 0x20 8. "MPPDO8,Masked Parallel Pad Data Out 8" "0,1"
|
|
newline
|
|
bitfld.long 0x20 7. "MPPDO7,Masked Parallel Pad Data Out 7" "0,1"
|
|
newline
|
|
bitfld.long 0x20 6. "MPPDO6,Masked Parallel Pad Data Out 6" "0,1"
|
|
newline
|
|
bitfld.long 0x20 5. "MPPDO5,Masked Parallel Pad Data Out 5" "0,1"
|
|
newline
|
|
bitfld.long 0x20 4. "MPPDO4,Masked Parallel Pad Data Out 4" "0,1"
|
|
newline
|
|
bitfld.long 0x20 3. "MPPDO3,Masked Parallel Pad Data Out 3" "0,1"
|
|
newline
|
|
bitfld.long 0x20 2. "MPPDO2,Masked Parallel Pad Data Out 2" "0,1"
|
|
newline
|
|
bitfld.long 0x20 0. "MPPDO0,Masked Parallel Pad Data Out 0" "0,1"
|
|
line.long 0x24 "MPGPDO9,SIUL2 Masked Parallel GPIO Pad Data Out"
|
|
bitfld.long 0x24 31. "MASK15,Mask Field 15" "0: MPPDO15 is ignored,1: MPPDO15 is written"
|
|
newline
|
|
bitfld.long 0x24 15. "MPPDO15,Masked Parallel Pad Data Out 15" "0,1"
|
|
tree.end
|
|
tree "STCU"
|
|
base ad:0x403A0000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "RUNSW,STCU2 Run Software"
|
|
bitfld.long 0x0 9. "MBSWPLLEN,Online MBIST with PLL Enabled" "0: Online MBIST is executed without using the..,1: Online MBIST is executed using the PLL.."
|
|
bitfld.long 0x0 0. "RUNSW,The RUNSW bit is automatically cleared by STCU2 when the online self-testing procedure is complete." "0: Idle,1: Online self-testing procedure is running"
|
|
wgroup.long 0x8++0x3
|
|
line.long 0x0 "SKC,STCU2 SK Code"
|
|
hexmask.long 0x0 0.--31. 1. "SKC,STCU2 SK Code"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "CFG,STCU2 Configuration"
|
|
hexmask.long.word 0x0 21.--30. 1. "PTR,First MBIST pointer PTR defines the logical pointer to the first MBIST to be scheduled when the self-testing procedure is enabled"
|
|
bitfld.long 0x0 8. "WRP,Write Protection 0: Specific STCU2 registers can be written through IPS bus interface 1: STCU2 registers cannot be written through IPS preventing any user application write operation" "0: Specific STCU2 registers can be written through..,1: STCU2 registers cannot be written through IPS"
|
|
newline
|
|
bitfld.long 0x0 0.--2. "CLK_CFG,Logic Memory BIST and STCU2 CORE_CLK configuration CLK_CFG defines the ratio between the sys_clk and the internal clock used to program the MBIST and the STCU2 CORE_CLK" "0: sys_clk/1,1: sys_clk/2,2: sys_clk/3,3: sys_clk/4,4: sys_clk/5,5: sys_clk/6,6: sys_clk/7,7: sys_clk/8"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "WDG,STCU2 Watchdog Granularity"
|
|
hexmask.long 0x0 0.--31. 1. "WDGEOC,Watchdog End of Count Timer This value has to be set to define the time budget related to the online self-test execution and check that everything is correctly working within this slot of time"
|
|
group.long 0x24++0x7
|
|
line.long 0x0 "ERR_STAT,STCU2 Error"
|
|
rbitfld.long 0x0 20. "LOCKESW,Online LOCK error You can always read this field" "0: In case PLL is enabled it is correctly locked..,1: When the PLL is enabled this flag highlights.."
|
|
rbitfld.long 0x0 19. "WDTOSW,Online watchdog timeout You can always read this field" "0: MBIST time slot completed within the assigned..,1: MBIST time slot not completed within the.."
|
|
newline
|
|
rbitfld.long 0x0 17. "ENGESW,Online engine error You can always read this field" "0: Valid engine execution,1: Invalid engine execution. The error conditions.."
|
|
rbitfld.long 0x0 16. "INVPSW,Online invalid pointer You can always read this field" "0: Valid linked pointer list,1: Invalid linked pointer list. The following.."
|
|
newline
|
|
bitfld.long 0x0 9. "UFSF,Unrecoverable Faults Status Flag This flag reports the global status of the Unrecoverable Faults(UF)" "0: No errors that trigger the UF condition.,1: There are errors that trigger the UF condition."
|
|
bitfld.long 0x0 8. "RFSF,Recoverable Faults Status Flag This flag reports the global status of the Recoverable Fault (RF)" "0: No errors that trigger the Recoverable Faults..,1: There are errors that trigger the Recoverable.."
|
|
line.long 0x4 "ERR_FM,STCU2 Error FM"
|
|
bitfld.long 0x4 4. "LOCKEUFM,PLL LOCK Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
bitfld.long 0x4 3. "WDTOUFM,Watchdog Timeout Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
newline
|
|
bitfld.long 0x4 1. "ENGEUFM,Engine Error Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Fault Mapping"
|
|
bitfld.long 0x4 0. "INVPUFM,Invalid Pointer Unrecoverable Fault Mapping" "0: Recoverable Fault Mapping,1: Unrecoverable Mapping"
|
|
rgroup.long 0x10C++0x3
|
|
line.long 0x0 "MBSSW0,STCU2 Online MBIST Status"
|
|
bitfld.long 0x0 11. "MBSSW11,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 10. "MBSSW10,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
newline
|
|
bitfld.long 0x0 9. "MBSSW9,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 8. "MBSSW8,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
newline
|
|
bitfld.long 0x0 7. "MBSSW7,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 6. "MBSSW6,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
newline
|
|
bitfld.long 0x0 5. "MBSSW5,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 4. "MBSSW4,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
newline
|
|
bitfld.long 0x0 3. "MBSSW3,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 2. "MBSSW2,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
newline
|
|
bitfld.long 0x0 1. "MBSSW1,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
bitfld.long 0x0 0. "MBSSW0,MBSSW" "0: Failed MBIST execution,1: No fault detected during the MBIST execution"
|
|
rgroup.long 0x14C++0x3
|
|
line.long 0x0 "MBESW0,STCU2 Online MBIST End Flag"
|
|
bitfld.long 0x0 11. "MBESW11,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 10. "MBESW10,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 9. "MBESW9,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 8. "MBESW8,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 7. "MBESW7,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 6. "MBESW6,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 5. "MBESW5,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 4. "MBESW4,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 3. "MBESW3,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 2. "MBESW2,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
newline
|
|
bitfld.long 0x0 1. "MBESW1,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
bitfld.long 0x0 0. "MBESW0,Online end status of MBISTn (where n = 11:0)." "0: MBIST execution still ongoing,1: MBIST execution finished"
|
|
group.long 0x18C++0x3
|
|
line.long 0x0 "MBUFM0,STCU2 MBIST Unrecoverable FM"
|
|
bitfld.long 0x0 11. "MBUFM11,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 10. "MBUFM10,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
newline
|
|
bitfld.long 0x0 9. "MBUFM9,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 8. "MBUFM8,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
newline
|
|
bitfld.long 0x0 7. "MBUFM7,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 6. "MBUFM6,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
newline
|
|
bitfld.long 0x0 5. "MBUFM5,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 4. "MBUFM4,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
newline
|
|
bitfld.long 0x0 3. "MBUFM3,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 2. "MBUFM2,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
newline
|
|
bitfld.long 0x0 1. "MBUFM1,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
bitfld.long 0x0 0. "MBUFM0,MBESW" "0: Recoverable fault mapping,1: Unrecoverable fault mapping"
|
|
group.long 0x2200++0x3
|
|
line.long 0x0 "ALGOSEL,STCU2 Algorithm Select"
|
|
bitfld.long 0x0 31. "ALGOSEL31,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 30. "ALGOSEL30,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 29. "ALGOSEL29,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 28. "ALGOSEL28,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 27. "ALGOSEL27,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 26. "ALGOSEL26,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 25. "ALGOSEL25,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 24. "ALGOSEL24,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 23. "ALGOSEL23,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 22. "ALGOSEL22,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "ALGOSEL21,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 20. "ALGOSEL20,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "ALGOSEL19,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 18. "ALGOSEL18,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "ALGOSEL17,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 16. "ALGOSEL16,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 15. "ALGOSEL15,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 14. "ALGOSEL14,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 13. "ALGOSEL13,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 12. "ALGOSEL12,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 11. "ALGOSEL11,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 10. "ALGOSEL10,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 9. "ALGOSEL9,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 8. "ALGOSEL8,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 7. "ALGOSEL7,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 6. "ALGOSEL6,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "ALGOSEL5,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 4. "ALGOSEL4,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 3. "ALGOSEL3,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 2. "ALGOSEL2,Algorithm Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 1. "ALGOSEL1,Algorithm Select" "0,1"
|
|
bitfld.long 0x0 0. "ALGOSEL0,Algorithm Select" "0,1"
|
|
group.long 0x220C++0x37
|
|
line.long 0x0 "STGGR,STCU2 MBIST Stagger"
|
|
hexmask.long 0x0 0.--31. 1. "STAG,STAG"
|
|
line.long 0x4 "BSTART,STCU2 BIST Start"
|
|
bitfld.long 0x4 31. "BSTART31,BIST Start" "0,1"
|
|
bitfld.long 0x4 30. "BSTART30,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "BSTART29,BIST Start" "0,1"
|
|
bitfld.long 0x4 28. "BSTART28,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "BSTART27,BIST Start" "0,1"
|
|
bitfld.long 0x4 26. "BSTART26,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "BSTART25,BIST Start" "0,1"
|
|
bitfld.long 0x4 24. "BSTART24,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "BSTART23,BIST Start" "0,1"
|
|
bitfld.long 0x4 22. "BSTART22,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "BSTART21,BIST Start" "0,1"
|
|
bitfld.long 0x4 20. "BSTART20,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "BSTART19,BIST Start" "0,1"
|
|
bitfld.long 0x4 18. "BSTART18,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "BSTART17,BIST Start" "0,1"
|
|
bitfld.long 0x4 16. "BSTART16,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "BSTART15,BIST Start" "0,1"
|
|
bitfld.long 0x4 14. "BSTART14,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 13. "BSTART13,BIST Start" "0,1"
|
|
bitfld.long 0x4 12. "BSTART12,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 11. "BSTART11,BIST Start" "0,1"
|
|
bitfld.long 0x4 10. "BSTART10,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "BSTART9,BIST Start" "0,1"
|
|
bitfld.long 0x4 8. "BSTART8,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "BSTART7,BIST Start" "0,1"
|
|
bitfld.long 0x4 6. "BSTART6,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "BSTART5,BIST Start" "0,1"
|
|
bitfld.long 0x4 4. "BSTART4,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "BSTART3,BIST Start" "0,1"
|
|
bitfld.long 0x4 2. "BSTART2,BIST Start" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "BSTART1,BIST Start" "0,1"
|
|
bitfld.long 0x4 0. "BSTART0,BIST Start" "0,1"
|
|
line.long 0x8 "MB_CTRL0,STCU2 MBIST Control"
|
|
bitfld.long 0x8 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x8 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x8 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0xC "MB_CTRL1,STCU2 MBIST Control"
|
|
bitfld.long 0xC 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0xC 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0xC 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x10 "MB_CTRL2,STCU2 MBIST Control"
|
|
bitfld.long 0x10 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x10 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x10 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x14 "MB_CTRL3,STCU2 MBIST Control"
|
|
bitfld.long 0x14 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x14 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x14 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x18 "MB_CTRL4,STCU2 MBIST Control"
|
|
bitfld.long 0x18 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x18 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x18 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x1C "MB_CTRL5,STCU2 MBIST Control"
|
|
bitfld.long 0x1C 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x1C 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x1C 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x20 "MB_CTRL6,STCU2 MBIST Control"
|
|
bitfld.long 0x20 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x20 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x20 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x24 "MB_CTRL7,STCU2 MBIST Control"
|
|
bitfld.long 0x24 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x24 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x24 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x28 "MB_CTRL8,STCU2 MBIST Control"
|
|
bitfld.long 0x28 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x28 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x28 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x2C "MB_CTRL9,STCU2 MBIST Control"
|
|
bitfld.long 0x2C 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x2C 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x2C 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x30 "MB_CTRL10,STCU2 MBIST Control"
|
|
bitfld.long 0x30 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x30 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x30 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
line.long 0x34 "MB_CTRL11,STCU2 MBIST Control"
|
|
bitfld.long 0x34 31. "CSM,CSM" "0: Sequential mode,1: Concurrent mode"
|
|
hexmask.long.word 0x34 21.--30. 1. "PTR,PTR"
|
|
newline
|
|
bitfld.long 0x34 20. "BSEL,BSEL" "0: Selected BIST is not selected for execution.,1: Selected BIST is selected for execution."
|
|
tree.end
|
|
tree "STM"
|
|
base ad:0x40274000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CR,Control"
|
|
hexmask.long.byte 0x0 8.--15. 1. "CPS,Counter Prescaler"
|
|
bitfld.long 0x0 1. "FRZ,Freeze" "0: Timer runs in Debug mode,1: Timer stops in Debug mode"
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "CNT,Count"
|
|
hexmask.long 0x4 0.--31. 1. "CNT,Timer Count"
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40274010 ad:0x40274020 ad:0x40274030 ad:0x40274040)
|
|
tree "CHANNEL[$1]"
|
|
base $2
|
|
group.long ($2)++0xB
|
|
line.long 0x0 "CCR,Channel Control"
|
|
bitfld.long 0x0 0. "CEN,Channel Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "CIR,Channel Interrupt"
|
|
eventfld.long 0x4 0. "CIF,Channel Interrupt Flag" "0: Read: IRQ is not asserted. Write: No effect.,1: Read: IRQ is asserted. Write: Clear the flag."
|
|
line.long 0x8 "CMP,Channel Compare"
|
|
hexmask.long 0x8 0.--31. 1. "CMP,Channel Compare"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "SWT"
|
|
base ad:0x40270000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 31. "MAP0,Master Access Protection 0" "0: Access disabled,1: Access enabled"
|
|
bitfld.long 0x0 30. "MAP1,Master Access Protection 1" "0: Access disabled,1: Access enabled"
|
|
newline
|
|
bitfld.long 0x0 29. "MAP2,Master Access Protection 2" "0: Access disabled,1: Access enabled"
|
|
bitfld.long 0x0 28. "MAP3,Master Access Protection 3" "0: Access disabled,1: Access enabled"
|
|
newline
|
|
bitfld.long 0x0 27. "MAP4,Master Access Protection 4" "0: Access disabled,1: Access enabled"
|
|
bitfld.long 0x0 26. "MAP5,Master Access Protection 5" "0: Access disabled,1: Access enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "MAP6,Master Access Protection 6" "0: Access disabled,1: Access enabled"
|
|
bitfld.long 0x0 24. "MAP7,Master Access Protection 7" "0: Access disabled,1: Access enabled"
|
|
newline
|
|
bitfld.long 0x0 9.--10. "SMD,Service Mode" "0: Fixed Service Sequence,1: Keyed Service Sequence,?,?"
|
|
bitfld.long 0x0 8. "RIA,Reset on Invalid Access" "0: Generate a bus error,1: Generate a bus error and reset request"
|
|
newline
|
|
bitfld.long 0x0 7. "WND,Window Mode" "0: Regular mode,1: Window mode"
|
|
bitfld.long 0x0 6. "ITR,Interrupt Then Reset Request" "0: Generate a reset request on a timeout,1: Generate an interrupt on an initial timeout;.."
|
|
newline
|
|
bitfld.long 0x0 5. "HLK,Hard Lock" "0: CR TO WN and SK are read/write registers if SLK..,1: CR TO WN and SK are read-only registers"
|
|
bitfld.long 0x0 4. "SLK,Soft Lock" "0: CR TO WN and SK are read/write registers if HLK..,1: CR TO WN and SK are read-only registers"
|
|
newline
|
|
bitfld.long 0x0 2. "STP,Stop Mode Control" "0: Timer continues,1: Timer stops"
|
|
bitfld.long 0x0 1. "FRZ,Debug Mode Control" "0: Timer continues,1: Timer stops"
|
|
newline
|
|
bitfld.long 0x0 0. "WEN,Watchdog Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "IR,Interrupt"
|
|
eventfld.long 0x4 0. "TIF,Timeout Interrupt Flag" "0: No interrupt request,1: Interrupt request due to an initial timeout"
|
|
line.long 0x8 "TO,Timeout"
|
|
hexmask.long 0x8 0.--31. 1. "WTO,Watchdog Timeout"
|
|
line.long 0xC "WN,Window"
|
|
hexmask.long 0xC 0.--31. 1. "WST,Window Start Value"
|
|
line.long 0x10 "SR,Service"
|
|
hexmask.long.word 0x10 0.--15. 1. "WSC,Watchdog Service Code"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "CO,Counter Output"
|
|
hexmask.long 0x0 0.--31. 1. "CNT,Watchdog Count"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "SK,Service Key"
|
|
hexmask.long.word 0x0 0.--15. 1. "SK,Service Key"
|
|
line.long 0x4 "RRR,Event Request"
|
|
eventfld.long 0x4 0. "RRF,Reset Request Flag" "0: No reset request,1: Any reset request initiated"
|
|
tree.end
|
|
tree "TEMPSENSE"
|
|
base ad:0x4037C000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "ETSCTL,ETS Control"
|
|
bitfld.long 0x0 1. "GNDSEL,Ground selection" "0: No exposure of the ground,1: Expose ground on the ADC output if ETS_EN=1"
|
|
bitfld.long 0x0 0. "ETS_EN,Temperature Sensor enable" "0: Power down,1: Functional mode"
|
|
rgroup.long 0x8++0xB
|
|
line.long 0x0 "TCA0,Temperature Coefficient"
|
|
hexmask.long.word 0x0 0.--15. 1. "TCA0,Temperature coefficient A0"
|
|
line.long 0x4 "TCA1,Temperature Coefficient"
|
|
hexmask.long.word 0x4 0.--15. 1. "TCA1,Temperature coefficient A1"
|
|
line.long 0x8 "TCA2,Temperature Coefficient"
|
|
hexmask.long.word 0x8 0.--15. 1. "TCA2,Temperature coefficient A2"
|
|
tree.end
|
|
tree "TRGMUX"
|
|
base ad:0x40080000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "ADC12_0,TRGMUX ADC12_0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x0 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x4 "ADC12_1,TRGMUX ADC12_1 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x4 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "LPCMP_0,TRGMUX LPCMP_0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
group.long 0x18++0x33
|
|
line.long 0x0 "BCTU,TRGMUX BCTU Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x4 "eMIOS012_odis,TRGMUX eMIOS012_odis Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x4 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x4 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x8 "eMIOS0_0,TRGMUX eMIOS0_0 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x8 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x8 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x8 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0xC "eMIOS0_1,TRGMUX eMIOS0_1 Register"
|
|
bitfld.long 0xC 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0xC 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0xC 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0xC 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0xC 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x10 "eMIOS0_2,TRGMUX eMIOS0_2 Register"
|
|
bitfld.long 0x10 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x10 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x10 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x10 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x10 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x14 "eMIOS0_3,TRGMUX eMIOS0_3 Register"
|
|
bitfld.long 0x14 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x14 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x14 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x18 "eMIOS1_0,TRGMUX eMIOS1_0 Register"
|
|
bitfld.long 0x18 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x18 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x18 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x18 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x18 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x1C "eMIOS1_1,TRGMUX eMIOS1_1 Register"
|
|
bitfld.long 0x1C 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x1C 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x1C 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x1C 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x1C 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x20 "eMIOS1_2,TRGMUX eMIOS1_2 Register"
|
|
bitfld.long 0x20 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x20 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x20 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x20 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x20 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x24 "eMIOS1_3,TRGMUX eMIOS1_3 Register"
|
|
bitfld.long 0x24 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x24 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x24 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x28 "FlexIO,TRGMUX FlexIO Register"
|
|
bitfld.long 0x28 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x28 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x28 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x28 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x28 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x2C "SIUL_OUT0,TRGMUX SIUL_OUT0 Register"
|
|
bitfld.long 0x2C 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x2C 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x2C 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x2C 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x2C 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x30 "SIUL_OUT1,TRGMUX SIUL_OUT1 Register"
|
|
bitfld.long 0x30 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x30 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x30 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x30 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x30 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
group.long 0x54++0x4B
|
|
line.long 0x0 "LPI2C_0,TRGMUX LPI2C_0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x4 "LPSPI_0,TRGMUX LPSPI_0 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x8 "LPSPI_1,TRGMUX LPSPI_1 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0xC "LPSPI_2,TRGMUX LPSPI_2 Register"
|
|
bitfld.long 0xC 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0xC 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x10 "LPUART_0,TRGMUX LPUART_0 Register"
|
|
bitfld.long 0x10 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x10 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x14 "LPUART_1,TRGMUX LPUART_1 Register"
|
|
bitfld.long 0x14 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x14 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x18 "LPUART_2,TRGMUX LPUART_2 Register"
|
|
bitfld.long 0x18 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x18 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x1C "LPUART_3,TRGMUX LPUART_3 Register"
|
|
bitfld.long 0x1C 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x1C 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x20 "LCU0_SYNC,TRGMUX LCU0_SYNC Register"
|
|
bitfld.long 0x20 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x20 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x20 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x24 "LCU0_FORCE,TRGMUX LCU0_FORCE Register"
|
|
bitfld.long 0x24 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x24 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x24 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x24 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x28 "LCU0_0,TRGMUX LCU0_0 Register"
|
|
bitfld.long 0x28 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x28 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x28 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x28 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x28 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x2C "LCU0_1,TRGMUX LCU0_1 Register"
|
|
bitfld.long 0x2C 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x2C 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x2C 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x2C 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x2C 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x30 "LCU0_2,TRGMUX LCU0_2 Register"
|
|
bitfld.long 0x30 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x30 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x30 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x30 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x30 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x34 "LCU1_SYNC,TRGMUX LCU1_SYNC Register"
|
|
bitfld.long 0x34 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x34 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x34 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x38 "LCU1_FORCE,TRGMUX LCU1_FORCE Register"
|
|
bitfld.long 0x38 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x38 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x38 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x38 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x3C "LCU1_0,TRGMUX LCU1_0 Register"
|
|
bitfld.long 0x3C 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x3C 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x3C 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x3C 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x3C 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x40 "LCU1_1,TRGMUX LCU1_1 Register"
|
|
bitfld.long 0x40 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x40 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x40 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x40 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x40 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x44 "LCU1_2,TRGMUX LCU1_2 Register"
|
|
bitfld.long 0x44 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x44 24.--30. 1. "SEL3,TRGMUX Source Select 3"
|
|
hexmask.long.byte 0x44 16.--22. 1. "SEL2,TRGMUX Source Select 2"
|
|
hexmask.long.byte 0x44 8.--14. 1. "SEL1,TRGMUX Source Select 1"
|
|
hexmask.long.byte 0x44 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
line.long 0x48 "CM7_RXEV,TRGMUX CM7_RXEV Register"
|
|
bitfld.long 0x48 31. "LK,TRGMUX Register Lock" "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x48 0.--6. 1. "SEL0,TRGMUX Source Select 1"
|
|
tree.end
|
|
tree "TSPC"
|
|
base ad:0x402C4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "GRP_EN,Group Enable"
|
|
bitfld.long 0x0 1. "GRP2_EN,Enable for GRP2_OBEn Register" "0: Disable,1: Enable"
|
|
bitfld.long 0x0 0. "GRP1_EN,Enable for GRP1_OBEn Register" "0: Disable,1: Enable"
|
|
group.long 0x50++0x7
|
|
line.long 0x0 "GRP1_OBE1,Group OBE"
|
|
bitfld.long 0x0 31. "OBE31,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 30. "OBE30,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 29. "OBE29,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 28. "OBE28,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 27. "OBE27,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 26. "OBE26,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 25. "OBE25,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 24. "OBE24,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 23. "OBE23,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 22. "OBE22,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 21. "OBE21,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 20. "OBE20,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 19. "OBE19,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 18. "OBE18,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 17. "OBE17,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 16. "OBE16,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 15. "OBE15,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 14. "OBE14,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 13. "OBE13,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 12. "OBE12,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 11. "OBE11,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 10. "OBE10,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 9. "OBE9,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 8. "OBE8,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 7. "OBE7,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 6. "OBE6,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 5. "OBE5,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 4. "OBE4,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 3. "OBE3,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 2. "OBE2,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
|
bitfld.long 0x0 1. "OBE1,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 0. "OBE0,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
line.long 0x4 "GRP1_OBE2,Group OBE"
|
|
bitfld.long 0x4 13. "OBE45,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x4 12. "OBE44,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
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newline
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bitfld.long 0x4 11. "OBE43,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 10. "OBE42,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
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bitfld.long 0x4 9. "OBE41,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
bitfld.long 0x4 8. "OBE40,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
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bitfld.long 0x4 7. "OBE39,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 6. "OBE38,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
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bitfld.long 0x4 5. "OBE37,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 4. "OBE36,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
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bitfld.long 0x4 3. "OBE35,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 2. "OBE34,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
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bitfld.long 0x4 1. "OBE33,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 0. "OBE32,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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group.long 0xA0++0x7
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|
line.long 0x0 "GRP2_OBE1,Group OBE"
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bitfld.long 0x0 31. "OBE31,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 30. "OBE30,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
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bitfld.long 0x0 29. "OBE29,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 28. "OBE28,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
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bitfld.long 0x0 27. "OBE27,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 26. "OBE26,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
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bitfld.long 0x0 25. "OBE25,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 24. "OBE24,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 23. "OBE23,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 22. "OBE22,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
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bitfld.long 0x0 21. "OBE21,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 20. "OBE20,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 19. "OBE19,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 18. "OBE18,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
|
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bitfld.long 0x0 17. "OBE17,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 16. "OBE16,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 15. "OBE15,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 14. "OBE14,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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newline
|
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bitfld.long 0x0 13. "OBE13,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 12. "OBE12,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 11. "OBE11,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
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bitfld.long 0x0 10. "OBE10,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 9. "OBE9,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 8. "OBE8,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
newline
|
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bitfld.long 0x0 7. "OBE7,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x0 6. "OBE6,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 5. "OBE5,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 4. "OBE4,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 3. "OBE3,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
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bitfld.long 0x0 2. "OBE2,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x0 1. "OBE1,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x0 0. "OBE0,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
line.long 0x4 "GRP2_OBE2,Group OBE"
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|
bitfld.long 0x4 5. "OBE37,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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bitfld.long 0x4 4. "OBE36,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
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bitfld.long 0x4 3. "OBE35,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x4 2. "OBE34,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
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|
newline
|
|
bitfld.long 0x4 1. "OBE33,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
bitfld.long 0x4 0. "OBE32,Output Buffer Enable" "0: OBE pad does not transition if any OBE in group..,1: OBE pad transitions from high to low if any OBE.."
|
|
tree.end
|
|
tree "VIRT_WRAPPER"
|
|
base ad:0x402A8000
|
|
group.long 0x0++0x27
|
|
line.long 0x0 "REG_A0,Parameter_n Register"
|
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bitfld.long 0x0 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 28.--29. "PAD_14,PAD_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x0 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x0 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 14.--15. "PAD_7,PAD_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x0 12.--13. "PAD_6,PAD_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 10.--11. "PAD_5,PAD_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 8.--9. "PAD_4,PAD_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x0 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x0 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x4 "REG_A1,Parameter_n Register"
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bitfld.long 0x4 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x8 "REG_A2,Parameter_n Register"
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bitfld.long 0x8 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 28.--29. "PAD_14,PAD_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x8 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
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bitfld.long 0x8 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 10.--11. "PAD_5,PAD_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
newline
|
|
bitfld.long 0x8 8.--9. "PAD_4,PAD_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
|
bitfld.long 0x8 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0xC "REG_A3,Parameter_n Register"
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bitfld.long 0xC 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x10 "REG_A4,Parameter_n Register"
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bitfld.long 0x10 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 28.--29. "PAD_14,PAD_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
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bitfld.long 0x10 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
|
bitfld.long 0x10 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
newline
|
|
bitfld.long 0x10 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 14.--15. "PAD_7,PAD_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
newline
|
|
bitfld.long 0x10 12.--13. "PAD_6,PAD_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 10.--11. "PAD_5,PAD_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 8.--9. "PAD_4,PAD_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
newline
|
|
bitfld.long 0x10 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
|
|
bitfld.long 0x10 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x14 "REG_A5,Parameter_n Register"
|
|
bitfld.long 0x14 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
line.long 0x18 "REG_A6,Parameter_n Register"
|
|
bitfld.long 0x18 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 28.--29. "PAD_14,PAD_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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|
newline
|
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bitfld.long 0x18 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 14.--15. "PAD_7,PAD_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 12.--13. "PAD_6,PAD_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 10.--11. "PAD_5,PAD_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 8.--9. "PAD_4,PAD_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x1C "REG_A7,Parameter_n Register"
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bitfld.long 0x1C 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x1C 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x20 "REG_A8,Parameter_n Register"
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bitfld.long 0x20 30.--31. "PAD_15,PAD_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 26.--27. "PAD_13,PAD_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 24.--25. "PAD_12,PAD_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x20 22.--23. "PAD_11,PAD_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 20.--21. "PAD_10,PAD_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 18.--19. "PAD_9,PAD_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x20 16.--17. "PAD_8,PAD_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 14.--15. "PAD_7,PAD_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 12.--13. "PAD_6,PAD_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x20 6.--7. "PAD_3,PAD_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 4.--5. "PAD_2,PAD_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x20 2.--3. "PAD_1,PAD_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x20 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x24 "REG_A9,Parameter_n Register"
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bitfld.long 0x24 0.--1. "PAD_0,PAD_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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group.long 0x80++0x1B
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line.long 0x0 "REG_B0,Parameter_n Register"
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bitfld.long 0x0 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x4 "REG_B1,Parameter_n Register"
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bitfld.long 0x4 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x8 "REG_B2,Parameter_n Register"
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bitfld.long 0x8 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0xC "REG_B3,Parameter_n Register"
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bitfld.long 0xC 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0xC 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0xC 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0xC 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0xC 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0xC 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0xC 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x10 "REG_B4,Parameter_n Register"
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bitfld.long 0x10 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x10 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x10 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x10 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x14 "REG_B5,Parameter_n Register"
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bitfld.long 0x14 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x14 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x14 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x14 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x14 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x14 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x14 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x18 "REG_B6,Parameter_n Register"
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bitfld.long 0x18 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x18 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x18 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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group.long 0xA4++0xB
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line.long 0x0 "REG_B9,Parameter_n Register"
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bitfld.long 0x0 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x4 "REG_B10,Parameter_n Register"
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bitfld.long 0x4 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x8 "REG_B11,Parameter_n Register"
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bitfld.long 0x8 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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group.long 0xB4++0xB
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line.long 0x0 "REG_B13,Parameter_n Register"
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bitfld.long 0x0 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x4 "REG_B14,Parameter_n Register"
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bitfld.long 0x4 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x4 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x4 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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line.long 0x8 "REG_B15,Parameter_n Register"
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bitfld.long 0x8 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x8 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x8 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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group.long 0xD4++0xF
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line.long 0x0 "REG_B21,Parameter_n Register"
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bitfld.long 0x0 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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newline
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bitfld.long 0x0 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
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bitfld.long 0x0 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x0 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x0 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
line.long 0x4 "REG_B22,Parameter_n Register"
|
|
bitfld.long 0x4 28.--29. "INMUX_14,INMUX_14" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 26.--27. "INMUX_13,INMUX_13" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 24.--25. "INMUX_12,INMUX_12" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x4 22.--23. "INMUX_11,INMUX_11" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x4 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x4 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x4 4.--5. "INMUX_2,INMUX_2" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 2.--3. "INMUX_1,INMUX_1" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x4 0.--1. "INMUX_0,INMUX_0" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
line.long 0x8 "REG_B23,Parameter_n Register"
|
|
bitfld.long 0x8 20.--21. "INMUX_10,INMUX_10" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x8 18.--19. "INMUX_9,INMUX_9" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x8 16.--17. "INMUX_8,INMUX_8" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x8 14.--15. "INMUX_7,INMUX_7" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x8 12.--13. "INMUX_6,INMUX_6" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x8 10.--11. "INMUX_5,INMUX_5" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
newline
|
|
bitfld.long 0x8 8.--9. "INMUX_4,INMUX_4" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
bitfld.long 0x8 6.--7. "INMUX_3,INMUX_3" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
line.long 0xC "REG_B24,Parameter_n Register"
|
|
bitfld.long 0xC 30.--31. "INMUX_15,INMUX_15" "0: SIUL2_VIRTWRAPPER_PDAC1,1: SIUL2_VIRTWRAPPER_PDAC2,?,3: SIUL2_VIRTWRAPPER_PDAC0"
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "REG_C1039_1024,Parameter_n Register"
|
|
bitfld.long 0x0 0.--1. "INTC_CTRL,Interrupt register control" "0,1,2,3"
|
|
tree.end
|
|
tree "WKPU"
|
|
base ad:0x402B4000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "NSR,NMI Status Flag Register"
|
|
eventfld.long 0x0 31. "NIF0,NMI Status Flag 0" "0: No event has occurred on the pad,1: An event as defined by NREE0 and NFEE0 has.."
|
|
eventfld.long 0x0 30. "NOVF0,NMI Overrun Status Flag 0" "0: No overrun has occurred on NMI input 0,1: An overrun has occurred on NMI input 0"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "NCR,NMI Configuration Register"
|
|
bitfld.long 0x0 31. "NLOCK0,NMI Configuration Lock Register 0" "0,1"
|
|
bitfld.long 0x0 29.--30. "NDSS0,NMI Destination Source Select 0" "0: Non-maskable interrupt,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 28. "NWRE0,NMI Wakeup Request Enable 0" "0: System wakeup requests from the corresponding..,1: Causes a system wakeup request when NIF0 = 1 or.."
|
|
bitfld.long 0x0 26. "NREE0,NMI Rising-Edge Events Enable 0" "0: Rising-edge event is disabled,1: Rising-edge event is enabled"
|
|
newline
|
|
bitfld.long 0x0 25. "NFEE0,NMI Falling-edge Events Enable 0" "0,1"
|
|
bitfld.long 0x0 24. "NFE0,NMI Filter Enable 0" "0: Filter is disabled,1: Filter is enabled"
|
|
group.long 0x14++0xB
|
|
line.long 0x0 "WISR,Wakeup/Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "EIF,External Wakeup/Interrupt Status Flag x"
|
|
line.long 0x4 "IRER,Interrupt Request Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "EIRE,External Interrupt Request Enable x"
|
|
line.long 0x8 "WRER,Wakeup Request Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "WRE,External Wakeup Request Enable x"
|
|
group.long 0x28++0xB
|
|
line.long 0x0 "WIREER,Wakeup/Interrupt Rising-Edge Event Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "IREE,External Interrupt Rising-edge Events Enable x"
|
|
line.long 0x4 "WIFEER,Wakeup/Interrupt Falling-Edge Event Enable Register"
|
|
hexmask.long 0x4 0.--31. 1. "IFEEx,External Interrupt Falling-edge Events Enable x"
|
|
line.long 0x8 "WIFER,Wakeup/Interrupt Filter Enable Register"
|
|
hexmask.long 0x8 0.--31. 1. "IFE,External Interrupt Filter Enable x"
|
|
group.long 0x54++0xB
|
|
line.long 0x0 "WISR_64,Wakeup/Interrupt Status Flag Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "EIF_1,External Wakeup/Interrupt Status Flag x"
|
|
line.long 0x4 "IRER_64,Interrupt Request Enable Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "EIRE_1,External Interrupt Request Enable x"
|
|
line.long 0x8 "WRER_64,Wakeup Request Enable Register"
|
|
hexmask.long.byte 0x8 0.--5. 1. "WRE_1,External Wakeup Request Enable x"
|
|
group.long 0x68++0xB
|
|
line.long 0x0 "WIREER_64,Wakeup/Interrupt Rising-Edge Event Enable Register"
|
|
hexmask.long.byte 0x0 0.--5. 1. "IREE_1,External Interrupt Rising-edge Events Enable x"
|
|
line.long 0x4 "WIFEER_64,Wakeup/Interrupt Falling-Edge Event Enable Register"
|
|
hexmask.long.byte 0x4 0.--5. 1. "IFEEx_1,External Interrupt Falling-edge Events Enable x"
|
|
line.long 0x8 "WIFER_64,Wakeup/Interrupt Filter Enable Register"
|
|
hexmask.long.byte 0x8 0.--5. 1. "IFE_1,External Interrupt Filter Enable x"
|
|
tree.end
|
|
tree "XBIC"
|
|
base ad:0x40204000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "MCR,XBIC Module Control"
|
|
bitfld.long 0x0 31. "SE0,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 30. "SE1,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 29. "SE2,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 28. "SE3,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 27. "SE4,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 26. "SE5,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 25. "SE6,Slave port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
bitfld.long 0x0 24. "SE7,Slave Port EDC Error Detection Enable" "0: Attribute integrity checking disabled for slave..,1: Attribute integrity checking enabled for slave.."
|
|
newline
|
|
bitfld.long 0x0 23. "ME0,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
bitfld.long 0x0 22. "ME1,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 21. "ME2,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
bitfld.long 0x0 20. "ME3,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 19. "ME4,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
bitfld.long 0x0 18. "ME5,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
newline
|
|
bitfld.long 0x0 17. "ME6,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
bitfld.long 0x0 16. "ME7,Master Port Enable For Feedback Integrity Check" "0: Feedback integrity checking disabled for master..,1: Feedback integrity checking enabled for master.."
|
|
line.long 0x4 "EIR,XBIC Error Injection"
|
|
bitfld.long 0x4 31. "EIE,Error Injection Enable" "0: Error injection disabled,1: Error injection enabled"
|
|
bitfld.long 0x4 12.--14. "SLV,Target Slave Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--11. 1. "MST,Target Master ID"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SYN,Syndrome"
|
|
rgroup.long 0x8++0x7
|
|
line.long 0x0 "ESR,XBIC Error Status"
|
|
bitfld.long 0x0 31. "VLD,Error Status Valid" "0: No error detected-other fields of the ESR and..,1: Error detected-all fields of the ESR and EAR.."
|
|
bitfld.long 0x0 30. "DPSE0,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 0"
|
|
newline
|
|
bitfld.long 0x0 29. "DPSE1,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 1"
|
|
bitfld.long 0x0 28. "DPSE2,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 2"
|
|
newline
|
|
bitfld.long 0x0 27. "DPSE3,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 3"
|
|
bitfld.long 0x0 26. "DPSE4,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 4"
|
|
newline
|
|
bitfld.long 0x0 25. "DPSE5,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 5"
|
|
bitfld.long 0x0 24. "DPSE6,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 6"
|
|
newline
|
|
bitfld.long 0x0 23. "DPSE7,Data Phase Slave Port Error" "0: No feedback integrity error detected on slave..,1: Feedback integrity error detected on slave port 7"
|
|
bitfld.long 0x0 22. "DPME0,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 0"
|
|
newline
|
|
bitfld.long 0x0 21. "DPME1,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 1"
|
|
bitfld.long 0x0 20. "DPME2,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 2"
|
|
newline
|
|
bitfld.long 0x0 19. "DPME3,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 3"
|
|
bitfld.long 0x0 18. "DPME4,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 4"
|
|
newline
|
|
bitfld.long 0x0 17. "DPME5,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 5"
|
|
bitfld.long 0x0 16. "DPME6,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 6"
|
|
newline
|
|
bitfld.long 0x0 15. "DPME7,Data Phase Master Port Error" "0: No feedback integrity error detected on master..,1: Feedback integrity error detected on master port 7"
|
|
bitfld.long 0x0 12.--14. "SLV,Slave Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "MST,Master ID"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SYN,Syndrome"
|
|
line.long 0x4 "EAR,XBIC Error Address"
|
|
hexmask.long 0x4 0.--31. 1. "ADDR,Error Address"
|
|
tree.end
|
|
tree "XRDC"
|
|
base ad:0x40278000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control"
|
|
bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks"
|
|
rbitfld.long 0x0 8. "VAW,Virtualization Aware" "0: Not virtualization-aware,1: Virtualization-aware"
|
|
newline
|
|
rbitfld.long 0x0 7. "MRF,Memory Region Format" "?,1: SMPU family format"
|
|
hexmask.long.byte 0x0 1.--4. 1. "HRL,Hardware Revision Level"
|
|
newline
|
|
bitfld.long 0x0 0. "GVLD,Global Valid (XRDC Global Enable/Disable)" "0: Disables,1: Enables"
|
|
rgroup.long 0xF0++0xB
|
|
line.long 0x0 "HWCFG0,Hardware Configuration 0"
|
|
hexmask.long.byte 0x0 28.--31. 1. "MID,Module ID"
|
|
hexmask.long.byte 0x0 24.--27. 1. "NPAC,Number Of PACs"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "NMRC,Number of MRCs"
|
|
hexmask.long.byte 0x0 8.--15. 1. "NMSTR,Number Of Bus Masters"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "NDID,Number Of DIDs"
|
|
line.long 0x4 "HWCFG1,Hardware Configuration 1"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DID,Domain Identifier"
|
|
line.long 0x8 "HWCFG2,Hardware Configuration 2"
|
|
bitfld.long 0x8 31. "PIDP31,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 30. "PIDP30,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 29. "PIDP29,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 28. "PIDP28,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 27. "PIDP27,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 26. "PIDP26,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 25. "PIDP25,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 24. "PIDP24,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 23. "PIDP23,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 22. "PIDP22,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 21. "PIDP21,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 20. "PIDP20,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 19. "PIDP19,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 18. "PIDP18,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 17. "PIDP17,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 16. "PIDP16,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 15. "PIDP15,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 14. "PIDP14,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 13. "PIDP13,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 12. "PIDP12,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 11. "PIDP11,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 10. "PIDP10,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 9. "PIDP9,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 8. "PIDP8,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 7. "PIDP7,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 6. "PIDP6,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 5. "PIDP5,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 4. "PIDP4,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 3. "PIDP3,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 2. "PIDP2,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
newline
|
|
bitfld.long 0x8 1. "PIDP1,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
bitfld.long 0x8 0. "PIDP0,Process Identifier Present" "0: Does not have PID register,1: Has PID register"
|
|
rgroup.byte 0x100++0x3
|
|
line.byte 0x0 "MDACFG0,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x0 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master"
|
|
hexmask.byte 0x0 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers"
|
|
line.byte 0x1 "MDACFG1,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x1 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master"
|
|
hexmask.byte 0x1 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers"
|
|
line.byte 0x2 "MDACFG2,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x2 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master"
|
|
hexmask.byte 0x2 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers"
|
|
line.byte 0x3 "MDACFG3,Master Domain Assignment Configuration"
|
|
bitfld.byte 0x3 7. "NCM,Noncore Master" "0: Core master or master does not exist,1: Noncore master"
|
|
hexmask.byte 0x3 0.--3. 1. "NMDAR,Number Of Master Domain Assignment Registers"
|
|
rgroup.byte 0x140++0x1
|
|
line.byte 0x0 "MRCFG0,Memory Region Configuration"
|
|
hexmask.byte 0x0 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors"
|
|
line.byte 0x1 "MRCFG1,Memory Region Configuration"
|
|
hexmask.byte 0x1 0.--4. 1. "NMRGD,Number Of Memory Region Descriptors"
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x200)++0x3
|
|
line.long 0x0 "DERRLOC[$1],Domain Error Location"
|
|
hexmask.long.byte 0x0 16.--19. 1. "PACINST,PAC Instance"
|
|
hexmask.long.word 0x0 0.--15. 1. "MRCINST,MRC Instance"
|
|
repeat.end
|
|
rgroup.long 0x400++0x7
|
|
line.long 0x0 "DERR_W0_0,Domain Error Word 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "DERR_W1_0,Domain Error Word 1"
|
|
bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected"
|
|
bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier"
|
|
group.long 0x40C++0x3
|
|
line.long 0x0 "DERR_W3_0,Domain Error Word 3"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect"
|
|
rgroup.long 0x410++0x7
|
|
line.long 0x0 "DERR_W0_1,Domain Error Word 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "DERR_W1_1,Domain Error Word 1"
|
|
bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected"
|
|
bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier"
|
|
group.long 0x41C++0x3
|
|
line.long 0x0 "DERR_W3_1,Domain Error Word 3"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect"
|
|
rgroup.long 0x500++0x7
|
|
line.long 0x0 "DERR_W0_16,Domain Error Word 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "DERR_W1_16,Domain Error Word 1"
|
|
bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected"
|
|
bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier"
|
|
group.long 0x50C++0x3
|
|
line.long 0x0 "DERR_W3_16,Domain Error Word 3"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect"
|
|
rgroup.long 0x510++0x7
|
|
line.long 0x0 "DERR_W0_17,Domain Error Word 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "DERR_W1_17,Domain Error Word 1"
|
|
bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected"
|
|
bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier"
|
|
group.long 0x51C++0x3
|
|
line.long 0x0 "DERR_W3_17,Domain Error Word 3"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect"
|
|
rgroup.long 0x520++0x7
|
|
line.long 0x0 "DERR_W0_18,Domain Error Word 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "DERR_W1_18,Domain Error Word 1"
|
|
bitfld.long 0x4 30.--31. "EST,Error State" "0: No access violations detected,1: No access violations detected,2: A single access violation has been detected,3: Multiple access violations have been detected"
|
|
bitfld.long 0x4 24.--26. "EPORT,Error Port" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "ERW,Error Read Or Write" "0: Read access,1: Write access"
|
|
bitfld.long 0x4 8.--10. "EATR,Error Attributes" "0: Secure user mode instruction fetch access,1: Secure user mode data access,2: Secure privileged mode instruction fetch access,3: Secure privileged mode data access,4: Nonsecure user mode instruction fetch access,5: Nonsecure user mode data access,6: Nonsecure privileged mode instruction fetch access,7: Nonsecure privileged mode data access"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "EDID,Error Domain Identifier"
|
|
group.long 0x52C++0x3
|
|
line.long 0x0 "DERR_W3_18,Domain Error Word 3"
|
|
bitfld.long 0x0 30.--31. "RECR,Rearm Error Capture Registers" "0: No effect,1: Rearms error capture resets error capture..,2: No effect,3: No effect"
|
|
group.long 0x700++0x3
|
|
line.long 0x0 "PID0,Process Identifier"
|
|
bitfld.long 0x0 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks"
|
|
bitfld.long 0x0 28. "TSM,Three-State Model" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 24. "ELK22H,LK2 Special Handling Enable" "0: LK2 operates normally; LMNUM is reserved and..,1: If LK2 = 2 (10b) LMNUM indicates the master that.."
|
|
hexmask.long.byte 0x0 16.--21. 1. "LMNUM,Locked Master Number"
|
|
newline
|
|
bitfld.long 0x0 5. "PID,Process Identifier Secure Attribute" "0: Secure,1: Nonsecure"
|
|
group.long 0x70C++0x3
|
|
line.long 0x0 "PID3,Process Identifier"
|
|
bitfld.long 0x0 29.--30. "LK2,Lock" "0: Any secure privileged write,1: Any secure privileged write,2: Secure privileged writes from master only,3: Locks"
|
|
bitfld.long 0x0 28. "TSM,Three-State Model" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 24. "ELK22H,LK2 Special Handling Enable" "0: LK2 operates normally; LMNUM is reserved and..,1: If LK2 = 2 (10b) LMNUM indicates the master that.."
|
|
hexmask.long.byte 0x0 16.--21. 1. "LMNUM,Locked Master Number"
|
|
newline
|
|
bitfld.long 0x0 5. "PID,Process Identifier Secure Attribute" "0: Secure,1: Nonsecure"
|
|
group.long 0x800++0x3
|
|
line.long 0x0 "MDA_W0_0_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks"
|
|
newline
|
|
rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?"
|
|
hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask"
|
|
bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?"
|
|
bitfld.long 0x0 0. "DID,Domain Identifier" "0,1"
|
|
group.long 0x820++0x3
|
|
line.long 0x0 "MDA_W0_1_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks"
|
|
newline
|
|
rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)"
|
|
bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master"
|
|
bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master"
|
|
newline
|
|
bitfld.long 0x0 0. "DID,Domain Identifier" "0,1"
|
|
group.long 0x840++0x3
|
|
line.long 0x0 "MDA_W0_2_DFMT1,Master Domain Assignment"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks"
|
|
newline
|
|
rbitfld.long 0x0 29. "DFMT,Domain Format" "?,1: Bus master domain assignment (DFMT1)"
|
|
bitfld.long 0x0 8. "DIDB,DID Bypass" "0: Bypass DID input,1: Use DID input"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "SA,Secure Attribute" "0: Use secure attribute from the master,1: Force to nonsecure,2: Use secure attribute from the master,3: Use secure attribute from the master"
|
|
bitfld.long 0x0 4.--5. "PA,Privileged Attribute" "0: Use privileged attribute from the master,1: Force to privileged,2: Use privileged attribute from the master,3: Use privileged attribute from the master"
|
|
newline
|
|
bitfld.long 0x0 0. "DID,Domain Identifier" "0,1"
|
|
group.long 0x860++0x3
|
|
line.long 0x0 "MDA_W0_3_DFMT0,Master Domain Assignment"
|
|
bitfld.long 0x0 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x0 30. "LK1,Lock" "0: Unlocked,1: Locks"
|
|
newline
|
|
rbitfld.long 0x0 29. "DFMT,Domain Format" "0: Core bus master domain assignment (DFMT0),?"
|
|
hexmask.long.byte 0x0 16.--21. 1. "PID,Process Identifier"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "PIDM,Process Identifier Mask"
|
|
bitfld.long 0x0 6.--7. "PE,Process Identifier Enable" "0: No PID is included,1: No PID is included,2: Partial domain hit = (PID & ~PIDM) == (PIDm[PID]..,3: Partial domain hit = ~((PID & ~PIDM) ==.."
|
|
newline
|
|
bitfld.long 0x0 4.--5. "DIDS,DID Select" "0: Use the DID field of this register,1: Use the input DID,2: Concatenate bits 3-2 of this register with the..,?"
|
|
bitfld.long 0x0 0. "DID,Domain Identifier" "0,1"
|
|
group.long 0x1100++0x27
|
|
line.long 0x0 "PDAC_W0_32,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_32,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_33,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_33,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_34,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_34,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_35,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_35,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_36,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_36,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1130++0x27
|
|
line.long 0x0 "PDAC_W0_38,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_38,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_39,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_39,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_40,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_40,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_41,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_41,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_42,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_42,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1160++0x1F
|
|
line.long 0x0 "PDAC_W0_44,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_44,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_45,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_45,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_46,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_46,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_47,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_47,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1400++0x15F
|
|
line.long 0x0 "PDAC_W0_128,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_128,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_129,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_129,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_130,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_130,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_131,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_131,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_132,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_132,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x28 "PDAC_W0_133,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "PDAC_W1_133,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x30 "PDAC_W0_134,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "PDAC_W1_134,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x38 "PDAC_W0_135,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "PDAC_W1_135,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x40 "PDAC_W0_136,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "PDAC_W1_136,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x48 "PDAC_W0_137,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x48 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x48 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x48 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "PDAC_W1_137,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x50 "PDAC_W0_138,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x50 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x50 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x50 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x50 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x54 "PDAC_W1_138,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x54 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x54 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x58 "PDAC_W0_139,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x58 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x58 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x58 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x58 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "PDAC_W1_139,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x5C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x5C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x60 "PDAC_W0_140,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x60 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x60 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x60 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x60 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x64 "PDAC_W1_140,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x64 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x64 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x68 "PDAC_W0_141,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x68 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x68 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x68 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x68 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "PDAC_W1_141,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x6C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x6C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x70 "PDAC_W0_142,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x70 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x70 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x70 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x70 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x74 "PDAC_W1_142,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x74 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x74 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x78 "PDAC_W0_143,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x78 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x78 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x78 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x78 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x7C "PDAC_W1_143,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x7C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x7C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x80 "PDAC_W0_144,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x80 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x80 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x80 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x80 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x84 "PDAC_W1_144,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x84 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x84 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x88 "PDAC_W0_145,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x88 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x88 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x88 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x88 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8C "PDAC_W1_145,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x8C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x8C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x90 "PDAC_W0_146,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x90 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x90 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x90 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x90 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x94 "PDAC_W1_146,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x94 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x94 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x98 "PDAC_W0_147,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x98 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x98 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x98 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x98 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x9C "PDAC_W1_147,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x9C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x9C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xA0 "PDAC_W0_148,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xA0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xA0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xA0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xA0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xA4 "PDAC_W1_148,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xA4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xA4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xA8 "PDAC_W0_149,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xA8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xA8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xA8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xA8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xAC "PDAC_W1_149,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xAC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xAC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xB0 "PDAC_W0_150,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xB0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xB0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xB0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xB0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xB4 "PDAC_W1_150,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xB4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xB4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xB8 "PDAC_W0_151,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xB8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xB8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xB8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xB8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xBC "PDAC_W1_151,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xBC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xBC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xC0 "PDAC_W0_152,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xC0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xC0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xC0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC4 "PDAC_W1_152,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xC8 "PDAC_W0_153,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xC8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xC8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xC8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xCC "PDAC_W1_153,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xCC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xCC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xD0 "PDAC_W0_154,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xD0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xD0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xD0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xD0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xD4 "PDAC_W1_154,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xD4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xD4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xD8 "PDAC_W0_155,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xD8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xD8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xD8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xD8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xDC "PDAC_W1_155,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xDC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xDC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xE0 "PDAC_W0_156,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xE0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xE0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xE0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xE0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xE4 "PDAC_W1_156,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xE4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xE4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xE8 "PDAC_W0_157,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xE8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xE8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xE8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xE8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xEC "PDAC_W1_157,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xEC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xEC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xF0 "PDAC_W0_158,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xF0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xF0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xF0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xF0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xF4 "PDAC_W1_158,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xF4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xF4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0xF8 "PDAC_W0_159,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0xF8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0xF8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0xF8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xF8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xFC "PDAC_W1_159,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xFC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xFC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x100 "PDAC_W0_160,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x100 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x100 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x100 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x100 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x104 "PDAC_W1_160,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x104 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x104 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x108 "PDAC_W0_161,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x108 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x108 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x108 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x108 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10C "PDAC_W1_161,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x10C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x10C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x110 "PDAC_W0_162,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x110 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x110 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x110 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x110 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x114 "PDAC_W1_162,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x114 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x114 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x118 "PDAC_W0_163,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x118 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x118 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x118 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x118 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x11C "PDAC_W1_163,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x11C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x11C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x120 "PDAC_W0_164,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x120 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x120 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x120 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x120 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x124 "PDAC_W1_164,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x124 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x124 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x128 "PDAC_W0_165,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x128 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x128 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x128 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x128 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x12C "PDAC_W1_165,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x12C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x12C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x130 "PDAC_W0_166,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x130 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x130 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x130 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x130 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x134 "PDAC_W1_166,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x134 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x134 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x138 "PDAC_W0_167,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x138 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x138 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x138 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x138 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x13C "PDAC_W1_167,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x13C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x13C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x140 "PDAC_W0_168,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x140 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x140 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x140 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x140 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x144 "PDAC_W1_168,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x144 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x144 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x148 "PDAC_W0_169,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x148 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x148 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x148 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x148 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14C "PDAC_W1_169,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x150 "PDAC_W0_170,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x150 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x150 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x150 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x150 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x154 "PDAC_W1_170,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x154 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x154 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x158 "PDAC_W0_171,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x158 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x158 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x158 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x158 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x15C "PDAC_W1_171,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x15C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x15C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1568++0x7
|
|
line.long 0x0 "PDAC_W0_173,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_173,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1578++0x7
|
|
line.long 0x0 "PDAC_W0_175,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_175,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1588++0x3F
|
|
line.long 0x0 "PDAC_W0_177,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_177,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_178,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_178,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_179,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_179,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_180,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_180,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_181,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_181,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x28 "PDAC_W0_182,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "PDAC_W1_182,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x30 "PDAC_W0_183,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "PDAC_W1_183,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x38 "PDAC_W0_184,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "PDAC_W1_184,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x15D0++0x17
|
|
line.long 0x0 "PDAC_W0_186,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_186,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_187,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_187,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_188,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_188,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x15F8++0x7
|
|
line.long 0x0 "PDAC_W0_191,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_191,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1608++0x2F
|
|
line.long 0x0 "PDAC_W0_193,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_193,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_194,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_194,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_195,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_195,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_196,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_196,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_197,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_197,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x28 "PDAC_W0_198,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "PDAC_W1_198,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1648++0x47
|
|
line.long 0x0 "PDAC_W0_201,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_201,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_202,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_202,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_203,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_203,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_204,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_204,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_205,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_205,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x28 "PDAC_W0_206,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "PDAC_W1_206,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x30 "PDAC_W0_207,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x30 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x30 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x30 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x30 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x34 "PDAC_W1_207,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x34 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x34 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x38 "PDAC_W0_208,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x38 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x38 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x38 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "PDAC_W1_208,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x3C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x3C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x40 "PDAC_W0_209,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x40 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x40 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x40 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x40 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x44 "PDAC_W1_209,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x44 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x44 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x16A0++0x2F
|
|
line.long 0x0 "PDAC_W0_212,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_212,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_213,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_213,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_214,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_214,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_215,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_215,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_216,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_216,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x28 "PDAC_W0_217,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x28 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x28 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x28 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "PDAC_W1_217,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x2C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x2C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x16D8++0x17
|
|
line.long 0x0 "PDAC_W0_219,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_219,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_220,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_220,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_221,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_221,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x16F8++0x27
|
|
line.long 0x0 "PDAC_W0_223,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_223,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_224,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_224,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x10 "PDAC_W0_225,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x10 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x10 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x10 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "PDAC_W1_225,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x14 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x14 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x18 "PDAC_W0_226,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x18 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x18 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x18 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "PDAC_W1_226,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x1C 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x1C 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x20 "PDAC_W0_227,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x20 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x20 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x20 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x20 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x24 "PDAC_W1_227,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x24 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x24 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1728++0x7
|
|
line.long 0x0 "PDAC_W0_229,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_229,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1738++0xF
|
|
line.long 0x0 "PDAC_W0_231,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_231,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
line.long 0x8 "PDAC_W0_232,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "PDAC_W1_232,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x1760++0x7
|
|
line.long 0x0 "PDAC_W0_236,Peripheral Domain Access Control Word 0"
|
|
bitfld.long 0x0 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x0 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "PDAC_W1_236,Peripheral Domain Access Control Word 1"
|
|
bitfld.long 0x4 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0x4 29.--30. "LK2,Lock" "0: Both words can be written to,1: Both words can be written to,2: Domain d can update only its associated DdACP..,3: Locks (both words are read-only)"
|
|
group.long 0x2000++0xF
|
|
line.long 0x0 "MRGD_W0_0,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_0,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_0,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_0,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2020++0xF
|
|
line.long 0x0 "MRGD_W0_1,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_1,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_1,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_1,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2040++0xF
|
|
line.long 0x0 "MRGD_W0_2,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_2,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_2,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_2,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2060++0xF
|
|
line.long 0x0 "MRGD_W0_3,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_3,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_3,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_3,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2080++0xF
|
|
line.long 0x0 "MRGD_W0_4,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_4,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_4,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_4,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x20A0++0xF
|
|
line.long 0x0 "MRGD_W0_5,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_5,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_5,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_5,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x20C0++0xF
|
|
line.long 0x0 "MRGD_W0_6,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_6,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_6,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_6,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x20E0++0xF
|
|
line.long 0x0 "MRGD_W0_7,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_7,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_7,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_7,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2200++0xF
|
|
line.long 0x0 "MRGD_W0_16,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_16,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_16,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_16,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2220++0xF
|
|
line.long 0x0 "MRGD_W0_17,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_17,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_17,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_17,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2240++0xF
|
|
line.long 0x0 "MRGD_W0_18,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_18,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_18,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_18,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2260++0xF
|
|
line.long 0x0 "MRGD_W0_19,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_19,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_19,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_19,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x2280++0xF
|
|
line.long 0x0 "MRGD_W0_20,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_20,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_20,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_20,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x22A0++0xF
|
|
line.long 0x0 "MRGD_W0_21,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_21,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_21,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_21,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x22C0++0xF
|
|
line.long 0x0 "MRGD_W0_22,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_22,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_22,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
|
|
hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
|
|
newline
|
|
bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "MRGD_W3_22,Memory Region Descriptor Word 3"
|
|
bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
|
|
bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
|
|
group.long 0x22E0++0xF
|
|
line.long 0x0 "MRGD_W0_23,Memory Region Descriptor Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "MRGD_W1_23,Memory Region Descriptor Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "MRGD_W2_23,Memory Region Descriptor Word 2"
|
|
bitfld.long 0x8 30. "SE,Semaphore Enable" "0: Disables,1: Enables"
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hexmask.long.byte 0x8 24.--27. 1. "SNUM,Semaphore Number"
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newline
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bitfld.long 0x8 3.--5. "D1ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
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bitfld.long 0x8 0.--2. "D0ACP,Domain Access Control Policy" "0,1,2,3,4,5,6,7"
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line.long 0xC "MRGD_W3_23,Memory Region Descriptor Word 3"
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bitfld.long 0xC 31. "VLD,Valid" "0: Invalid,1: Valid"
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bitfld.long 0xC 29.--30. "LK2,Lock" "0: All words in the set can be written to,?,2: Domain d can update only its associated DdACP..,3: Locks (all words are read-only)"
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tree.end
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AUTOINDENT.OFF
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