17372 lines
1.4 MiB
17372 lines
1.4 MiB
; --------------------------------------------------------------------------------
|
|
; @Title: S32M24 On-Chip Peripherals
|
|
; @Props: Released
|
|
; @Author: DAB, NEJ, JDU, KRZ
|
|
; @Changelog: 2022-01-13 DAB
|
|
; 2022-06-29 NEJ
|
|
; 2022-08-09 NEJ
|
|
; 2023-06-19 JDU
|
|
; 2023-10-19 KRZ
|
|
; @Manufacturer: NXP - NXP Semiconductors
|
|
; @Doc: Generated (TRACE32, build: 163898.), based on: S32M24x.svd (Ver. 1.4)
|
|
; @Core: Cortex-M4F
|
|
; @Chip: S32M241, S32M242, S32M243, S32M244
|
|
; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only
|
|
; --------------------------------------------------------------------------------
|
|
; $Id: pers32m24.per 16966 2023-11-09 08:27:09Z skrausse $
|
|
|
|
tree.close "Core Registers (Cortex-M4F)"
|
|
AUTOINDENT.PUSH
|
|
AUTOINDENT.OFF
|
|
tree "System Control"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 12.
|
|
group.long 0x08++0x03
|
|
line.long 0x00 "ACTLR,Auxiliary Control Register"
|
|
bitfld.long 0x00 9. " DISFPCA ,Disables lazy stacking of floating point context" "No,Yes"
|
|
bitfld.long 0x00 8. " DISOOFP ,Disables floating point instructions completing" "No,Yes"
|
|
bitfld.long 0x00 2. " DISFOLD ,Disables folding of IT instructions" "No,Yes"
|
|
textline " "
|
|
bitfld.long 0x00 1. " DISDEFWBUF ,Disables write buffer use during default memory map accesses" "No,Yes"
|
|
bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle instructions" "No,Yes"
|
|
group.long 0x10++0x0B
|
|
line.long 0x00 "SYST_CSR,SysTick Control and Status Register"
|
|
rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted"
|
|
bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core"
|
|
bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick"
|
|
textline " "
|
|
bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled"
|
|
line.long 0x04 "SYST_RVR,SysTick Reload Value Register"
|
|
hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0"
|
|
line.long 0x08 "SYST_CVR,SysTick Current Value Register"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register"
|
|
bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented"
|
|
bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact"
|
|
hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing"
|
|
rgroup.long 0xD00++0x03
|
|
line.long 0x00 "CPUID,CPU ID Base Register"
|
|
hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Implementer Code"
|
|
bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,?..."
|
|
bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number"
|
|
bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
group.long 0xD04++0x23
|
|
line.long 0x00 "ICSR,Interrupt Control State Register"
|
|
bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Inactive,Active"
|
|
bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 27. " PENDSVCLR ,Removes the pending status of the PendSV exception" "No effect,Removed"
|
|
textline " "
|
|
bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not pending,Pending"
|
|
bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "No effect,Removed"
|
|
bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt" "Not pending,Pending"
|
|
hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,Pending ISR Number Field"
|
|
bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active"
|
|
textline " "
|
|
hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception"
|
|
line.long 0x04 "VTOR,Vector Table Offset Register"
|
|
hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Vector table address"
|
|
line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register"
|
|
hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key"
|
|
rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big"
|
|
bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]"
|
|
textline " "
|
|
bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested"
|
|
bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "No effect,Clear"
|
|
bitfld.long 0x08 0. " VECTRESET ,System Reset" "No effect,Reset"
|
|
line.long 0x0C "SCR,System Control Register"
|
|
bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup"
|
|
bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep"
|
|
bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled"
|
|
line.long 0x10 "CCR,Configuration Control Register"
|
|
bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled"
|
|
bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte/no adjustment,8-byte/adjustment"
|
|
bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI and Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled"
|
|
bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled"
|
|
bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Denied,Allowed"
|
|
bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level"
|
|
line.long 0x14 "SHPR1,SSystem Handler Priority Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)"
|
|
textline " "
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)"
|
|
line.long 0x18 "SHPR2,System Handler Priority Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9"
|
|
textline " "
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8"
|
|
line.long 0x1C "SHPR3,System Handler Priority Register 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13"
|
|
textline " "
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)"
|
|
line.long 0x20 "SHCSR,System Handler Control and State Register"
|
|
bitfld.long 0x20 18. " USGFAULTENA ,Enable UsageFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 17. " BUSFAULTENA ,Enable BusFault" "Disabled,Enabled"
|
|
bitfld.long 0x20 16. " MEMFAULTENA ,Enable MemManage fault" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x20 15. " SVCALLPENDED ,SVCall is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage is pending" "Not pending,Pending"
|
|
textline " "
|
|
bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault is pending" "Not pending,Pending"
|
|
bitfld.long 0x20 11. " SYSTICKACT ,SysTick is Active" "Not active,Active"
|
|
bitfld.long 0x20 10. " PENDSVACT ,PendSV is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 8. " MONITORACT ,Monitor is Active" "Not active,Active"
|
|
bitfld.long 0x20 7. " SVCALLACT ,SVCall is Active" "Not active,Active"
|
|
bitfld.long 0x20 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x20 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active"
|
|
bitfld.long 0x20 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active"
|
|
group.byte 0xD28++0x1
|
|
line.byte 0x00 "MMFSR,MemManage Status Register"
|
|
bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred"
|
|
bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred"
|
|
line.byte 0x01 "BFSR,Bus Fault Status Register"
|
|
bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid"
|
|
bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred"
|
|
bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred"
|
|
group.word 0xD2A++0x1
|
|
line.word 0x00 "USAFAULT,Usage Fault Status Register"
|
|
bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error"
|
|
bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error"
|
|
bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error"
|
|
textline " "
|
|
bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error"
|
|
bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error"
|
|
bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error"
|
|
group.long 0xD2C++0x07
|
|
line.long 0x00 "HFSR,Hard Fault Status Register"
|
|
bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred"
|
|
bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority" "Not occurred,Occurred"
|
|
bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred"
|
|
line.long 0x04 "DFSR,Debug Fault Status Register"
|
|
bitfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of EDBGRQ" "Not asserted,Asserted"
|
|
bitfld.long 0x04 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred"
|
|
bitfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred"
|
|
textline " "
|
|
bitfld.long 0x04 1. " BKPT ,BKPT Flag" "Not executed,Executed"
|
|
bitfld.long 0x04 0. " HALTED ,Indicates a debug event generated by either" "Not requested,Requested"
|
|
group.long 0xD34++0x0B
|
|
line.long 0x00 "MMFAR,MemManage Fault Address Register"
|
|
line.long 0x04 "BFAR,BusFault Address Register"
|
|
line.long 0x08 "AFSR,Auxiliary Fault Status Register"
|
|
group.long 0xD88++0x03
|
|
line.long 0x00 "CPACR,Coprocessor Access Control Register"
|
|
bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Access denied,Privileged only,Reserved,Full access"
|
|
bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Access denied,Privileged only,Reserved,Full access"
|
|
textline " "
|
|
bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Access denied,Privileged only,Reserved,Full access"
|
|
wgroup.long 0xF00++0x03
|
|
line.long 0x00 "STIR,Software Trigger Interrupt Register"
|
|
hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered"
|
|
width 10.
|
|
tree "Feature Registers"
|
|
rgroup.long 0xD40++0x0B
|
|
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
|
|
bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..."
|
|
line.long 0x04 "ID_PFR1,Processor Feature Register 1"
|
|
bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..."
|
|
line.long 0x08 "ID_DFR0,Debug Feature Register 0"
|
|
bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..."
|
|
hgroup.long 0xD4C++0x03
|
|
hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
|
|
rgroup.long 0xD50++0x03
|
|
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
|
|
bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..."
|
|
bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..."
|
|
bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..."
|
|
textline " "
|
|
bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored"
|
|
bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..."
|
|
hgroup.long 0xD54++0x03
|
|
hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
|
|
rgroup.long 0xD58++0x03
|
|
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
|
|
bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..."
|
|
rgroup.long 0xD60++0x13
|
|
line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0"
|
|
bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..."
|
|
bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..."
|
|
bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..."
|
|
textline " "
|
|
bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..."
|
|
bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..."
|
|
bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..."
|
|
line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1"
|
|
bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..."
|
|
bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..."
|
|
bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..."
|
|
textline " "
|
|
bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..."
|
|
line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2"
|
|
bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..."
|
|
bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..."
|
|
bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..."
|
|
bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..."
|
|
bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..."
|
|
textline " "
|
|
bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..."
|
|
line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3"
|
|
bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..."
|
|
bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..."
|
|
bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..."
|
|
line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4"
|
|
bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..."
|
|
bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..."
|
|
bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..."
|
|
textline " "
|
|
bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..."
|
|
bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..."
|
|
bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..."
|
|
tree.end
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0C "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0C "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Memory Protection Unit"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 15.
|
|
rgroup.long 0xD90++0x03
|
|
line.long 0x00 "MPU_TYPE,MPU Type Register"
|
|
bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
|
|
bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported"
|
|
group.long 0xD94++0x03
|
|
line.long 0x00 "MPU_CTRL,MPU Control Register"
|
|
bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled"
|
|
bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled"
|
|
group.long 0xD98++0x03
|
|
line.long 0x00 "MPU_RNR,MPU Region Number Register"
|
|
hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR"
|
|
tree.close "MPU regions"
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0
|
|
group.long 0xD9C++0x03 "Region 0"
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 0 (not implemented)"
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x0
|
|
hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1
|
|
group.long 0xD9C++0x03 "Region 1"
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 1 (not implemented)"
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x1
|
|
hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2
|
|
group.long 0xD9C++0x03 "Region 2"
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 2 (not implemented)"
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x2
|
|
hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3
|
|
group.long 0xD9C++0x03 "Region 3"
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 3 (not implemented)"
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x3
|
|
hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4
|
|
group.long 0xD9C++0x03 "Region 4"
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 4 (not implemented)"
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x4
|
|
hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5
|
|
group.long 0xD9C++0x03 "Region 5"
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 5 (not implemented)"
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x5
|
|
hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6
|
|
group.long 0xD9C++0x03 "Region 6"
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 6 (not implemented)"
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x6
|
|
hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7
|
|
group.long 0xD9C++0x03 "Region 7"
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 7 (not implemented)"
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x7
|
|
hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8
|
|
group.long 0xD9C++0x03 "Region 8"
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 8 (not implemented)"
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x8
|
|
hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9
|
|
group.long 0xD9C++0x03 "Region 9"
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 9 (not implemented)"
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0x9
|
|
hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA
|
|
group.long 0xD9C++0x03 "Region 10"
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 10 (not implemented)"
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xA
|
|
hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB
|
|
group.long 0xD9C++0x03 "Region 11"
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 11 (not implemented)"
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xB
|
|
hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC
|
|
group.long 0xD9C++0x03 "Region 12"
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 12 (not implemented)"
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xC
|
|
hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD
|
|
group.long 0xD9C++0x03 "Region 13"
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 13 (not implemented)"
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xD
|
|
hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE
|
|
group.long 0xD9C++0x03 "Region 14"
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 14 (not implemented)"
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xE
|
|
hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF
|
|
group.long 0xD9C++0x03 "Region 15"
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region"
|
|
group.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute"
|
|
bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-"
|
|
bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7"
|
|
textline " "
|
|
bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable"
|
|
bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable"
|
|
bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable"
|
|
textline " "
|
|
bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1"
|
|
bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1"
|
|
bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1"
|
|
bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1"
|
|
bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1"
|
|
bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1"
|
|
bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1"
|
|
bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1"
|
|
bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB"
|
|
bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0xD9C++0x03 "Region 15 (not implemented)"
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15"
|
|
hgroup.long 0xDA0++0x03
|
|
saveout 0xD98 %l 0xF
|
|
hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15"
|
|
textline " "
|
|
textline " "
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Nested Vectored Interrupt Controller"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 6.
|
|
rgroup.long 0x04++0x03
|
|
line.long 0x00 "ICTR,Interrupt Controller Type Register"
|
|
bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..."
|
|
tree "Interrupt Enable Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x100++0x03
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x100++0x7
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x100++0x0B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x100++0x0F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x100++0x13
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x100++0x17
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x100++0x1B
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x100++0x1F
|
|
line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled"
|
|
else
|
|
hgroup.long 0x100++0x1F
|
|
hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register"
|
|
hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Pending Registers"
|
|
width 23.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x200++0x03
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x200++0x07
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x200++0x0B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x200++0x0F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x200++0x13
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x200++0x17
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x200++0x1B
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x200++0x1F
|
|
line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
textline " "
|
|
setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending"
|
|
else
|
|
hgroup.long 0x200++0x1F
|
|
hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register"
|
|
hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Active Bit Registers"
|
|
width 9.
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
rgroup.long 0x300++0x03
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
rgroup.long 0x300++0x07
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
rgroup.long 0x300++0x0B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
rgroup.long 0x300++0x0F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
rgroup.long 0x300++0x13
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
rgroup.long 0x300++0x17
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
rgroup.long 0x300++0x1B
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
rgroup.long 0x300++0x1F
|
|
line.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active"
|
|
line.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active"
|
|
textline " "
|
|
bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active"
|
|
bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active"
|
|
else
|
|
hgroup.long 0x300++0x1F
|
|
hide.long 0x00 "ACTIVE1,Active Bit Register 1"
|
|
hide.long 0x04 "ACTIVE2,Active Bit Register 2"
|
|
hide.long 0x08 "ACTIVE3,Active Bit Register 3"
|
|
hide.long 0x0c "ACTIVE4,Active Bit Register 4"
|
|
hide.long 0x10 "ACTIVE5,Active Bit Register 5"
|
|
hide.long 0x14 "ACTIVE6,Active Bit Register 6"
|
|
hide.long 0x18 "ACTIVE7,Active Bit Register 7"
|
|
hide.long 0x1c "ACTIVE8,Active Bit Register 8"
|
|
endif
|
|
tree.end
|
|
tree "Interrupt Priority Registers"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00)
|
|
group.long 0x400++0x1F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01)
|
|
group.long 0x400++0x3F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02)
|
|
group.long 0x400++0x5F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03)
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04)
|
|
group.long 0x400++0x9F
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05)
|
|
group.long 0x400++0xBF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06)
|
|
group.long 0x400++0xDF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07)
|
|
group.long 0x400++0xEF
|
|
line.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority"
|
|
hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority"
|
|
hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority"
|
|
hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority"
|
|
line.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority"
|
|
hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority"
|
|
hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority"
|
|
hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority"
|
|
line.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority"
|
|
hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority"
|
|
hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority"
|
|
hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority"
|
|
line.long 0xC "IPR3,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority"
|
|
hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority"
|
|
hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority"
|
|
hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority"
|
|
line.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority"
|
|
hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority"
|
|
hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority"
|
|
hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority"
|
|
line.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority"
|
|
hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority"
|
|
hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority"
|
|
hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority"
|
|
line.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority"
|
|
hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority"
|
|
hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority"
|
|
hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority"
|
|
line.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority"
|
|
hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority"
|
|
hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority"
|
|
hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority"
|
|
line.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority"
|
|
hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority"
|
|
hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority"
|
|
hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority"
|
|
line.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority"
|
|
hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority"
|
|
hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority"
|
|
hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority"
|
|
line.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority"
|
|
hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority"
|
|
hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority"
|
|
hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority"
|
|
line.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority"
|
|
hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority"
|
|
hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority"
|
|
hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority"
|
|
line.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority"
|
|
hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority"
|
|
hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority"
|
|
hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority"
|
|
line.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority"
|
|
hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority"
|
|
hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority"
|
|
hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority"
|
|
line.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority"
|
|
hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority"
|
|
hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority"
|
|
hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority"
|
|
line.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority"
|
|
hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority"
|
|
hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority"
|
|
hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority"
|
|
line.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority"
|
|
hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority"
|
|
hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority"
|
|
hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority"
|
|
line.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority"
|
|
hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority"
|
|
hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority"
|
|
hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority"
|
|
line.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority"
|
|
hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority"
|
|
hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority"
|
|
hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority"
|
|
line.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority"
|
|
hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority"
|
|
hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority"
|
|
hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority"
|
|
line.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority"
|
|
hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority"
|
|
hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority"
|
|
hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority"
|
|
line.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority"
|
|
hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority"
|
|
hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority"
|
|
hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority"
|
|
line.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority"
|
|
hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority"
|
|
hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority"
|
|
hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority"
|
|
line.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority"
|
|
hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority"
|
|
hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority"
|
|
hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority"
|
|
line.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority"
|
|
hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority"
|
|
hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority"
|
|
hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority"
|
|
line.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority"
|
|
hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority"
|
|
hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority"
|
|
hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority"
|
|
line.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority"
|
|
hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority"
|
|
hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority"
|
|
hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority"
|
|
line.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority"
|
|
hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority"
|
|
hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority"
|
|
hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority"
|
|
line.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority"
|
|
hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority"
|
|
hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority"
|
|
hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority"
|
|
line.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority"
|
|
hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority"
|
|
hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority"
|
|
hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority"
|
|
line.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority"
|
|
hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority"
|
|
hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority"
|
|
hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority"
|
|
line.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority"
|
|
hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority"
|
|
hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority"
|
|
hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority"
|
|
line.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority"
|
|
hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority"
|
|
hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority"
|
|
hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority"
|
|
line.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority"
|
|
hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority"
|
|
hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority"
|
|
hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority"
|
|
line.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority"
|
|
hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority"
|
|
hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority"
|
|
hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority"
|
|
line.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority"
|
|
hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority"
|
|
hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority"
|
|
hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority"
|
|
line.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority"
|
|
hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority"
|
|
hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority"
|
|
hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority"
|
|
line.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority"
|
|
hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority"
|
|
hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority"
|
|
hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority"
|
|
line.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority"
|
|
hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority"
|
|
hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority"
|
|
hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority"
|
|
line.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority"
|
|
hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority"
|
|
hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority"
|
|
hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority"
|
|
line.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority"
|
|
hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority"
|
|
hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority"
|
|
hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority"
|
|
line.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority"
|
|
hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority"
|
|
hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority"
|
|
hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority"
|
|
line.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority"
|
|
hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority"
|
|
hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority"
|
|
hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority"
|
|
line.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority"
|
|
hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority"
|
|
hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority"
|
|
hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority"
|
|
line.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority"
|
|
hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority"
|
|
hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority"
|
|
hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority"
|
|
line.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority"
|
|
hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority"
|
|
hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority"
|
|
hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority"
|
|
line.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority"
|
|
hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority"
|
|
hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority"
|
|
hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority"
|
|
line.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority"
|
|
hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority"
|
|
hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority"
|
|
hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority"
|
|
line.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority"
|
|
hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority"
|
|
hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority"
|
|
hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority"
|
|
line.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority"
|
|
hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority"
|
|
hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority"
|
|
hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority"
|
|
line.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority"
|
|
hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority"
|
|
hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority"
|
|
hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority"
|
|
line.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority"
|
|
hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority"
|
|
hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority"
|
|
hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority"
|
|
line.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority"
|
|
hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority"
|
|
hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority"
|
|
hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority"
|
|
line.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority"
|
|
hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority"
|
|
hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority"
|
|
hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority"
|
|
line.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority"
|
|
hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority"
|
|
hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority"
|
|
hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority"
|
|
line.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority"
|
|
hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority"
|
|
hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority"
|
|
hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority"
|
|
line.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority"
|
|
hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority"
|
|
hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority"
|
|
hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority"
|
|
line.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority"
|
|
hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority"
|
|
hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority"
|
|
hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority"
|
|
line.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority"
|
|
hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority"
|
|
hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority"
|
|
hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority"
|
|
line.long 0xEC "IPR59,Interrupt Priority Register"
|
|
hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority"
|
|
hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority"
|
|
hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority"
|
|
hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority"
|
|
else
|
|
hgroup.long 0x400++0xEF
|
|
hide.long 0x0 "IPR0,Interrupt Priority Register"
|
|
hide.long 0x4 "IPR1,Interrupt Priority Register"
|
|
hide.long 0x8 "IPR2,Interrupt Priority Register"
|
|
hide.long 0xC "IPR3,Interrupt Priority Register"
|
|
hide.long 0x10 "IPR4,Interrupt Priority Register"
|
|
hide.long 0x14 "IPR5,Interrupt Priority Register"
|
|
hide.long 0x18 "IPR6,Interrupt Priority Register"
|
|
hide.long 0x1C "IPR7,Interrupt Priority Register"
|
|
hide.long 0x20 "IPR8,Interrupt Priority Register"
|
|
hide.long 0x24 "IPR9,Interrupt Priority Register"
|
|
hide.long 0x28 "IPR10,Interrupt Priority Register"
|
|
hide.long 0x2C "IPR11,Interrupt Priority Register"
|
|
hide.long 0x30 "IPR12,Interrupt Priority Register"
|
|
hide.long 0x34 "IPR13,Interrupt Priority Register"
|
|
hide.long 0x38 "IPR14,Interrupt Priority Register"
|
|
hide.long 0x3C "IPR15,Interrupt Priority Register"
|
|
hide.long 0x40 "IPR16,Interrupt Priority Register"
|
|
hide.long 0x44 "IPR17,Interrupt Priority Register"
|
|
hide.long 0x48 "IPR18,Interrupt Priority Register"
|
|
hide.long 0x4C "IPR19,Interrupt Priority Register"
|
|
hide.long 0x50 "IPR20,Interrupt Priority Register"
|
|
hide.long 0x54 "IPR21,Interrupt Priority Register"
|
|
hide.long 0x58 "IPR22,Interrupt Priority Register"
|
|
hide.long 0x5C "IPR23,Interrupt Priority Register"
|
|
hide.long 0x60 "IPR24,Interrupt Priority Register"
|
|
hide.long 0x64 "IPR25,Interrupt Priority Register"
|
|
hide.long 0x68 "IPR26,Interrupt Priority Register"
|
|
hide.long 0x6C "IPR27,Interrupt Priority Register"
|
|
hide.long 0x70 "IPR28,Interrupt Priority Register"
|
|
hide.long 0x74 "IPR29,Interrupt Priority Register"
|
|
hide.long 0x78 "IPR30,Interrupt Priority Register"
|
|
hide.long 0x7C "IPR31,Interrupt Priority Register"
|
|
hide.long 0x80 "IPR32,Interrupt Priority Register"
|
|
hide.long 0x84 "IPR33,Interrupt Priority Register"
|
|
hide.long 0x88 "IPR34,Interrupt Priority Register"
|
|
hide.long 0x8C "IPR35,Interrupt Priority Register"
|
|
hide.long 0x90 "IPR36,Interrupt Priority Register"
|
|
hide.long 0x94 "IPR37,Interrupt Priority Register"
|
|
hide.long 0x98 "IPR38,Interrupt Priority Register"
|
|
hide.long 0x9C "IPR39,Interrupt Priority Register"
|
|
hide.long 0xA0 "IPR40,Interrupt Priority Register"
|
|
hide.long 0xA4 "IPR41,Interrupt Priority Register"
|
|
hide.long 0xA8 "IPR42,Interrupt Priority Register"
|
|
hide.long 0xAC "IPR43,Interrupt Priority Register"
|
|
hide.long 0xB0 "IPR44,Interrupt Priority Register"
|
|
hide.long 0xB4 "IPR45,Interrupt Priority Register"
|
|
hide.long 0xB8 "IPR46,Interrupt Priority Register"
|
|
hide.long 0xBC "IPR47,Interrupt Priority Register"
|
|
hide.long 0xC0 "IPR48,Interrupt Priority Register"
|
|
hide.long 0xC4 "IPR49,Interrupt Priority Register"
|
|
hide.long 0xC8 "IPR50,Interrupt Priority Register"
|
|
hide.long 0xCC "IPR51,Interrupt Priority Register"
|
|
hide.long 0xD0 "IPR52,Interrupt Priority Register"
|
|
hide.long 0xD4 "IPR53,Interrupt Priority Register"
|
|
hide.long 0xD8 "IPR54,Interrupt Priority Register"
|
|
hide.long 0xDC "IPR55,Interrupt Priority Register"
|
|
hide.long 0xE0 "IPR56,Interrupt Priority Register"
|
|
hide.long 0xE4 "IPR57,Interrupt Priority Register"
|
|
hide.long 0xE8 "IPR58,Interrupt Priority Register"
|
|
hide.long 0xEC "IPR59,Interrupt Priority Register"
|
|
endif
|
|
tree.end
|
|
width 0x0b
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
sif CORENAME()=="CORTEXM4F"
|
|
tree "Floating-point Unit (FPU)"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 8.
|
|
group.long 0xF34++0x0B
|
|
line.long 0x00 "FPCCR,Floating-Point Context Control Register"
|
|
bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled"
|
|
bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able"
|
|
bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able"
|
|
textline " "
|
|
bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread"
|
|
bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged"
|
|
bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active"
|
|
line.long 0x04 "FPCAR,Floating-Point Context Address Register"
|
|
hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame"
|
|
line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register"
|
|
bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative"
|
|
bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation"
|
|
bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode"
|
|
textline " "
|
|
bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero"
|
|
rgroup.long 0xF40++0x07
|
|
line.long 0x00 "MVFR0,Media and FP Feature Register 0"
|
|
bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..."
|
|
bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..."
|
|
bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..."
|
|
bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..."
|
|
bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..."
|
|
textline " "
|
|
bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..."
|
|
bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..."
|
|
line.long 0x04 "MVFR1,Media and FP Feature Register 1"
|
|
bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..."
|
|
bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..."
|
|
textline " "
|
|
bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..."
|
|
bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..."
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
endif
|
|
tree "Debug"
|
|
tree "Core Debug"
|
|
sif COMPonent.AVAILABLE("COREDEBUG")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))
|
|
width 7.
|
|
group.long 0xD30++0x03
|
|
line.long 0x00 "DFSR,Debug Fault Status Register"
|
|
eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated"
|
|
eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered"
|
|
eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated"
|
|
newline
|
|
eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated"
|
|
eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated"
|
|
newline
|
|
hgroup.long 0xDF0++0x03
|
|
hide.long 0x00 "DHCSR,Debug Halting Control and Status Register"
|
|
in
|
|
newline
|
|
wgroup.long 0xDF4++0x03
|
|
line.long 0x00 "DCRSR,Debug Core Register Selector Register"
|
|
bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write"
|
|
hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register or special-purpose register or Floating-point extension register"
|
|
group.long 0xDF8++0x03
|
|
line.long 0x00 "DCRDR,Debug Core Register Data Register"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000)
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
else
|
|
group.long 0xDFC++0x03
|
|
line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register"
|
|
bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1"
|
|
newline
|
|
bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending"
|
|
bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled"
|
|
bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled"
|
|
bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled"
|
|
newline
|
|
bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled"
|
|
endif
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "COREDEBUG component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Flash Patch and Breakpoint Unit (FPB)"
|
|
sif COMPonent.AVAILABLE("FPB")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))
|
|
width 10.
|
|
group.long 0x00++0x07
|
|
line.long 0x00 "FP_CTRL,Flash Patch Control Register"
|
|
bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..."
|
|
rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127"
|
|
bitfld.long 0x00 1. " KEY ,Key Field" "Low,High"
|
|
bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled"
|
|
textline ""
|
|
line.long 0x04 "FP_REMAP,Flash Patch Remap Register"
|
|
bitfld.long 0x04 29. " RMPSPT ,Indicates whether the FPB unit supports flash patch remap" "Not supported,SRAM region"
|
|
hexmask.long.tbyte 0x04 5.--28. 0x20 " REMAP ,Remap Base Address Field"
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00)
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x8++0x03
|
|
line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00)
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0xC++0x03
|
|
line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00)
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x10++0x03
|
|
line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00)
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x14++0x03
|
|
line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00)
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x18++0x03
|
|
line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00)
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x1C++0x03
|
|
line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00)
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x20++0x03
|
|
line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both"
|
|
hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address"
|
|
bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled"
|
|
elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000)
|
|
if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00)
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
else
|
|
group.long 0x24++0x03
|
|
line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7"
|
|
hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address"
|
|
bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled"
|
|
endif
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0xB
|
|
else
|
|
newline
|
|
textline "FPB component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree "Data Watchpoint and Trace Unit (DWT)"
|
|
sif COMPonent.AVAILABLE("DWT")
|
|
base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))
|
|
width 15.
|
|
group.long 0x00++0x1B
|
|
line.long 0x00 "DWT_CTRL,Control Register"
|
|
rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported"
|
|
rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported"
|
|
textline " "
|
|
rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported"
|
|
rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported"
|
|
bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled"
|
|
bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled"
|
|
bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]"
|
|
bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]"
|
|
textline " "
|
|
bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled"
|
|
line.long 0x04 "DWT_CYCCNT,Cycle Count Register"
|
|
line.long 0x08 "DWT_CPICNT,CPI Count Register"
|
|
hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter"
|
|
line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register"
|
|
hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter"
|
|
line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter"
|
|
line.long 0x14 "DWT_LSUCNT,LSU Count Register"
|
|
hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter"
|
|
line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter"
|
|
rgroup.long 0x1C++0x03
|
|
line.long 0x00 "DWT_PCSR,Program Counter Sample register"
|
|
textline " "
|
|
group.long 0x20++0x07
|
|
line.long 0x00 "DWT_COMP0,DWT Comparator Register 0"
|
|
line.long 0x04 "DWT_MASK0,DWT Mask Registers 0"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80)
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
else
|
|
group.long 0x28++0x03
|
|
line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled"
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x30)++0x07
|
|
line.long 0x00 "DWT_COMP1,DWT Comparator Register 1"
|
|
line.long 0x04 "DWT_MASK1,DWT Mask Registers 1"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00)
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x30+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x40)++0x07
|
|
line.long 0x00 "DWT_COMP2,DWT Comparator Register 2"
|
|
line.long 0x04 "DWT_MASK2,DWT Mask Registers 2"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00)
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x40+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
group.long (0x50)++0x07
|
|
line.long 0x00 "DWT_COMP3,DWT Comparator Register 3"
|
|
line.long 0x04 "DWT_MASK3,DWT Mask Registers 3"
|
|
bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
|
|
if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE"
|
|
elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00)
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE"
|
|
else
|
|
group.long (0x50+0x08)++0x03
|
|
line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3"
|
|
bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched"
|
|
bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
|
|
textline " "
|
|
bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved"
|
|
bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported"
|
|
bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled"
|
|
textline " "
|
|
bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled"
|
|
bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE"
|
|
endif
|
|
width 6.
|
|
tree "CoreSight Identification Registers"
|
|
rgroup.long 0xFE0++0x0F
|
|
line.long 0x00 "PID0,Peripheral ID0"
|
|
hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]"
|
|
line.long 0x04 "PID1,Peripheral ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]"
|
|
line.long 0x08 "PID2,Peripheral ID2"
|
|
hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision"
|
|
bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC"
|
|
hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]"
|
|
line.long 0x0c "PID3,Peripheral ID3"
|
|
hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field"
|
|
hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block"
|
|
rgroup.long 0xFD0++0x03
|
|
line.long 0x00 "PID4,Peripheral Identification Register 4"
|
|
hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count"
|
|
hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code"
|
|
rgroup.long 0xFF0++0x0F
|
|
line.long 0x00 "CID0,Component ID0 (Preamble)"
|
|
line.long 0x04 "CID1,Component ID1"
|
|
hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class"
|
|
hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble"
|
|
line.long 0x08 "CID2,Component ID2"
|
|
line.long 0x0c "CID3,Component ID3"
|
|
tree.end
|
|
width 0x0B
|
|
else
|
|
newline
|
|
textline "DWT component base address not specified"
|
|
newline
|
|
endif
|
|
tree.end
|
|
tree.end
|
|
AUTOINDENT.POP
|
|
tree.end
|
|
AUTOINDENT.ON CENTER TREE
|
|
ENUMDELIMITER ","
|
|
base ad:0x0
|
|
tree "ADC (Analog-to-Digital Converter)"
|
|
base ad:0x0
|
|
tree "ADC0 (ADC)"
|
|
base ad:0x4003B000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "SC1$1,ADC Status and Control Register 1"
|
|
rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not complete.,1: Conversion is complete."
|
|
bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select"
|
|
repeat.end
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CFG1,ADC Configuration Register 1"
|
|
bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1"
|
|
bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,2: The divide ratio is 4 and the clock rate is..,3: The divide ratio is 8 and the clock rate is.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,2: 10-bit conversion.,?"
|
|
bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ALTCLK1),1: Alternate clock 2 (ALTCLK2),2: Alternate clock 3 (ALTCLK3),3: Alternate clock 4 (ALTCLK4)"
|
|
line.long 0x4 "CFG2,ADC Configuration Register 2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x48)++0x3
|
|
line.long 0x0 "R$1,ADC Data Result Registers"
|
|
hexmask.long.word 0x0 0.--11. 1. "D,Data result"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x88)++0x3
|
|
line.long 0x0 "CV$1,Compare Value Registers"
|
|
hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value."
|
|
repeat.end
|
|
group.long 0x90++0x5B
|
|
line.long 0x0 "SC2,Status and Control Register 2"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status"
|
|
newline
|
|
rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3"
|
|
rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress."
|
|
newline
|
|
bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected."
|
|
bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1"
|
|
bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.."
|
|
bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?"
|
|
line.long 0x4 "SC3,Status and Control Register 3"
|
|
bitfld.long 0x4 7. "CAL,Calibration" "0,1"
|
|
bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.."
|
|
newline
|
|
bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled."
|
|
bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,2: 16 samples averaged.,3: 32 samples averaged."
|
|
line.long 0x8 "BASE_OFS,BASE Offset Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value"
|
|
line.long 0xC "OFS,ADC Offset Correction Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value"
|
|
line.long 0x10 "USR_OFS,USER Offset Correction Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value"
|
|
line.long 0x14 "XOFS,ADC X Offset Correction Register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value"
|
|
line.long 0x18 "YOFS,ADC Y Offset Correction Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value"
|
|
line.long 0x1C "G,ADC Gain Register"
|
|
hexmask.long.word 0x1C 0.--10. 1. "G,G"
|
|
line.long 0x20 "UG,ADC User Gain Register"
|
|
hexmask.long.word 0x20 0.--9. 1. "UG,UG"
|
|
line.long 0x24 "CLPS,ADC General Calibration Value Register S"
|
|
hexmask.long.byte 0x24 0.--6. 1. "CLPS,CLPS"
|
|
line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3"
|
|
hexmask.long.word 0x28 0.--9. 1. "CLP3,CLP3"
|
|
line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2"
|
|
hexmask.long.word 0x2C 0.--9. 1. "CLP2,CLP2"
|
|
line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1"
|
|
hexmask.long.word 0x30 0.--8. 1. "CLP1,CLP1"
|
|
line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0"
|
|
hexmask.long.byte 0x34 0.--7. 1. "CLP0,CLP0"
|
|
line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X"
|
|
hexmask.long.byte 0x38 0.--6. 1. "CLPX,CLPX"
|
|
line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9"
|
|
hexmask.long.byte 0x3C 0.--6. 1. "CLP9,CLP9"
|
|
line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S"
|
|
hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset"
|
|
line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3"
|
|
hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset"
|
|
line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2"
|
|
hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset"
|
|
line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset"
|
|
line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0"
|
|
hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset"
|
|
line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X"
|
|
hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset"
|
|
line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9"
|
|
hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset"
|
|
tree.end
|
|
tree "ADC1"
|
|
base ad:0x40027000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "SC1$1,ADC Status and Control Register 1"
|
|
rbitfld.long 0x0 7. "COCO,Conversion Complete Flag" "0: Conversion is not complete.,1: Conversion is complete."
|
|
bitfld.long 0x0 6. "AIEN,Interrupt Enable" "0: Conversion complete interrupt is disabled.,1: Conversion complete interrupt is enabled."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "ADCH,Input channel select"
|
|
repeat.end
|
|
group.long 0x40++0x7
|
|
line.long 0x0 "CFG1,ADC Configuration Register 1"
|
|
bitfld.long 0x0 8. "CLRLTRG,Clear Latch Trigger in Trigger Handler Block" "0,1"
|
|
bitfld.long 0x0 5.--6. "ADIV,Clock Divide Select" "0: The divide ratio is 1 and the clock rate is..,1: The divide ratio is 2 and the clock rate is..,2: The divide ratio is 4 and the clock rate is..,3: The divide ratio is 8 and the clock rate is.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "MODE,Conversion mode selection" "0: 8-bit conversion.,1: 12-bit conversion.,2: 10-bit conversion.,?"
|
|
bitfld.long 0x0 0.--1. "ADICLK,Input Clock Select" "0: Alternate clock 1 (ALTCLK1),1: Alternate clock 2 (ALTCLK2),2: Alternate clock 3 (ALTCLK3),3: Alternate clock 4 (ALTCLK4)"
|
|
line.long 0x4 "CFG2,ADC Configuration Register 2"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SMPLTS,Sample Time Select"
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
rgroup.long ($2+0x48)++0x3
|
|
line.long 0x0 "R$1,ADC Data Result Registers"
|
|
hexmask.long.word 0x0 0.--11. 1. "D,Data result"
|
|
repeat.end
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x88)++0x3
|
|
line.long 0x0 "CV$1,Compare Value Registers"
|
|
hexmask.long.word 0x0 0.--15. 1. "CV,Compare Value."
|
|
repeat.end
|
|
group.long 0x90++0x5B
|
|
line.long 0x0 "SC2,Status and Control Register 2"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRGSTERR,Error in Multiplexed Trigger Request"
|
|
hexmask.long.byte 0x0 16.--19. 1. "TRGSTLAT,Trigger Status"
|
|
newline
|
|
rbitfld.long 0x0 13.--14. "TRGPRNUM,Trigger Process Number" "0,1,2,3"
|
|
rbitfld.long 0x0 7. "ADACT,Conversion Active" "0: Conversion not in progress.,1: Conversion in progress."
|
|
newline
|
|
bitfld.long 0x0 6. "ADTRG,Conversion Trigger Select" "0: Software trigger selected.,1: Hardware trigger selected."
|
|
bitfld.long 0x0 5. "ACFE,Compare Function Enable" "0: Compare function disabled.,1: Compare function enabled."
|
|
newline
|
|
bitfld.long 0x0 4. "ACFGT,Compare Function Greater Than Enable" "0,1"
|
|
bitfld.long 0x0 3. "ACREN,Compare Function Range Enable" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled and will assert the ADC DMA.."
|
|
bitfld.long 0x0 0.--1. "REFSEL,Voltage Reference Selection" "0: Default voltage reference pin pair that is..,1: Alternate reference voltage that is VALTH. This..,?,?"
|
|
line.long 0x4 "SC3,Status and Control Register 3"
|
|
bitfld.long 0x4 7. "CAL,Calibration" "0,1"
|
|
bitfld.long 0x4 3. "ADCO,Continuous Conversion Enable" "0: One conversion will be performed (or one set of..,1: Continuous conversions will be performed (or.."
|
|
newline
|
|
bitfld.long 0x4 2. "AVGE,Hardware Average Enable" "0: Hardware average function disabled.,1: Hardware average function enabled."
|
|
bitfld.long 0x4 0.--1. "AVGS,Hardware Average Select" "0: 4 samples averaged.,1: 8 samples averaged.,2: 16 samples averaged.,3: 32 samples averaged."
|
|
line.long 0x8 "BASE_OFS,BASE Offset Register"
|
|
hexmask.long.byte 0x8 0.--7. 1. "BA_OFS,Base Offset Error Correction Value"
|
|
line.long 0xC "OFS,ADC Offset Correction Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "OFS,Offset Error Correction Value"
|
|
line.long 0x10 "USR_OFS,USER Offset Correction Register"
|
|
hexmask.long.byte 0x10 0.--7. 1. "USR_OFS,USER Offset Error Correction Value"
|
|
line.long 0x14 "XOFS,ADC X Offset Correction Register"
|
|
hexmask.long.byte 0x14 0.--5. 1. "XOFS,X offset error correction value"
|
|
line.long 0x18 "YOFS,ADC Y Offset Correction Register"
|
|
hexmask.long.byte 0x18 0.--7. 1. "YOFS,Y offset error correction value"
|
|
line.long 0x1C "G,ADC Gain Register"
|
|
hexmask.long.word 0x1C 0.--10. 1. "G,G"
|
|
line.long 0x20 "UG,ADC User Gain Register"
|
|
hexmask.long.word 0x20 0.--9. 1. "UG,UG"
|
|
line.long 0x24 "CLPS,ADC General Calibration Value Register S"
|
|
hexmask.long.byte 0x24 0.--6. 1. "CLPS,CLPS"
|
|
line.long 0x28 "CLP3,ADC Plus-Side General Calibration Value Register 3"
|
|
hexmask.long.word 0x28 0.--9. 1. "CLP3,CLP3"
|
|
line.long 0x2C "CLP2,ADC Plus-Side General Calibration Value Register 2"
|
|
hexmask.long.word 0x2C 0.--9. 1. "CLP2,CLP2"
|
|
line.long 0x30 "CLP1,ADC Plus-Side General Calibration Value Register 1"
|
|
hexmask.long.word 0x30 0.--8. 1. "CLP1,CLP1"
|
|
line.long 0x34 "CLP0,ADC Plus-Side General Calibration Value Register 0"
|
|
hexmask.long.byte 0x34 0.--7. 1. "CLP0,CLP0"
|
|
line.long 0x38 "CLPX,ADC Plus-Side General Calibration Value Register X"
|
|
hexmask.long.byte 0x38 0.--6. 1. "CLPX,CLPX"
|
|
line.long 0x3C "CLP9,ADC Plus-Side General Calibration Value Register 9"
|
|
hexmask.long.byte 0x3C 0.--6. 1. "CLP9,CLP9"
|
|
line.long 0x40 "CLPS_OFS,ADC General Calibration Offset Value Register S"
|
|
hexmask.long.byte 0x40 0.--3. 1. "CLPS_OFS,CLPS Offset"
|
|
line.long 0x44 "CLP3_OFS,ADC Plus-Side General Calibration Offset Value Register 3"
|
|
hexmask.long.byte 0x44 0.--3. 1. "CLP3_OFS,CLP3 Offset"
|
|
line.long 0x48 "CLP2_OFS,ADC Plus-Side General Calibration Offset Value Register 2"
|
|
hexmask.long.byte 0x48 0.--3. 1. "CLP2_OFS,CLP2 Offset"
|
|
line.long 0x4C "CLP1_OFS,ADC Plus-Side General Calibration Offset Value Register 1"
|
|
hexmask.long.byte 0x4C 0.--3. 1. "CLP1_OFS,CLP1 Offset"
|
|
line.long 0x50 "CLP0_OFS,ADC Plus-Side General Calibration Offset Value Register 0"
|
|
hexmask.long.byte 0x50 0.--3. 1. "CLP0_OFS,CLP0 Offset"
|
|
line.long 0x54 "CLPX_OFS,ADC Plus-Side General Calibration Offset Value Register X"
|
|
hexmask.long.word 0x54 0.--11. 1. "CLPX_OFS,CLPX Offset"
|
|
line.long 0x58 "CLP9_OFS,ADC Plus-Side General Calibration Offset Value Register 9"
|
|
hexmask.long.word 0x58 0.--11. 1. "CLP9_OFS,CLP9 Offset"
|
|
tree.end
|
|
tree.end
|
|
tree "AEC_AE"
|
|
base ad:0x0
|
|
rgroup.long 0x0++0x3
|
|
line.long 0x0 "VERID,AEC Version ID"
|
|
hexmask.long.word 0x0 16.--31. 1. "ID,Unique Identifier"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "MAJOR,Major Revision"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Variant"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--3. 1. "MINOR,Minor Revision"
|
|
group.word 0x8++0x1
|
|
line.word 0x0 "LOCK_CONTROL,Lock Control"
|
|
hexmask.word.byte 0x0 8.--15. 1. "UNLOCK_KEY,Unlock Key"
|
|
newline
|
|
bitfld.word 0x0 6. "RSTG_CFG_LOCK,Lock Write Access to RSTGEN_CFG" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "IRQ_SET_LOCK,Lock Write Access to IRQ_SET" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "CLKG_CFG_LOCK,Lock Write Access to CLKGEN_CFG" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "LPWU_CTL_LOCK,Lock Write Access to LPWU_CONTROL" "0,1"
|
|
newline
|
|
bitfld.word 0x0 2. "TMON_CHK_LOCK,Temperature Sensor Check Lock" "0,1"
|
|
newline
|
|
bitfld.word 0x0 1. "FWDG_CFG_LOCK,Lock Write Access to Configuration of the FAULT Watchdog" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "AWDG_CFG_LOCK,Lock Write Access to Registers of the Alive Watchdog" "0,1"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "LPWU_CONTROL,Power Mode Control"
|
|
bitfld.long 0x0 31. "NOIRQ_CFG,No IRQ After Reset" "0,1"
|
|
newline
|
|
bitfld.long 0x0 19. "SW_RST_REQ,Software Reset Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 17. "DEEP_SLEEP_REQ,Deep Sleep Request" "0,1"
|
|
newline
|
|
bitfld.long 0x0 16. "SLEEP_REQ,Sleep Request" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "LPTIMER_CFG,LP Timer Configuration"
|
|
group.word 0x10++0x1
|
|
line.word 0x0 "EVENTS_STATUS,Event Notifications Status"
|
|
eventfld.word 0x0 15. "FRAMEWIDTH_FL,SPI Framewidth Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 14. "STATERESET_FL,State Machine Reset Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "HVI_AE_SUPPLY_FL,HVI1 Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 9. "HVI_ACTIVE_FL,HVI0 Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "WAKEUP_FL,Wake-up Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 7. "LVD_VDDC_FL,LVD Vddc Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 6. "CAN_INT_FL,CANPHY Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 5. "TEMP_WDG_PHY_FL,Temperature Monitor PHY Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "TEMP_WDG_PMC_FL,Temperature Monitor PMC Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 3. "OCD_VDDE_FL,Over Current Detector Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "LIN_INT_FL,LINPHY Notification Flag" "0,1"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "EVENTS_ENABLE,Event Notifications Enable"
|
|
bitfld.word 0x0 15. "FRAMEWIDTH_EN,SPI Framewidth Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "STATERESET_EN,State Machine Reset Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "HVI_AE_SUPPLY_EN,HVM1 Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "HVI_ACTIVE_EN,HVM0 Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "WAKEUP_EN,Wake Up Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 7. "LVD_VDDC_EN,LVD VDDC Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 6. "CAN_INT_EN,CANPHY Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 5. "TEMP_WDG_PHY_EN,Temperature Sensor PHY Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "TEMP_WDG_PMC_EN,Temperature Sensor PMC Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 3. "OCD_VDDE_EN,Over Current Detector Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "LIN_INT_EN,LINPHY Notification Enable" "0,1"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "FAULTS_STATUS,Fault Notifications Status"
|
|
eventfld.word 0x0 15. "ALIVE_WDG_FL,Alive Watchdog Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 14. "ILL_TEST_FL,Illegal Test Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 13. "HVD_AE_INTERN_FL,HVD Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "MCU_SUPPLY_FL,MCU Supply Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 11. "EVENT_EXPIRED_FL,Event Expired Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 10. "XFER_ERR_FL,Transfer Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 9. "OBSCHK_ERR_FL,OBSCHK Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "CHKSUM_ERR_FL,Checksum Error Notification Flag" "0,1"
|
|
newline
|
|
eventfld.word 0x0 7. "RAW_FAILED_FL,RAW Failed Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "PMC_VLS_FL,PMC VLS Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 3. "DPGA_OC_POS_FL,DPGA OC POS Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "DPGA_OC_NEG_FL,DPGA OC NEG Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "GDU_INT_FL,GDU Notification Flag" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 0. "GDU_FAULT_PROT_FL,GDU Fault Protection Notification Flag" "0,1"
|
|
group.word 0x1C++0x1
|
|
line.word 0x0 "FAULTS_ENABLE,Fault Notifications Enable"
|
|
bitfld.word 0x0 15. "ALIVE_WDG_EN,Alive Watchdog Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "ILL_TEST_EN,Illegal Test Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 13. "HVD_AE_INTERN_EN,HVD Internal Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 12. "MCU_SUPPLY_EN,MCU Supply Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 11. "EVENT_EXPIRED_EN,Event Expired Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 10. "XFER_ERR_EN,Transfer Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 9. "OBSCHK_ERR_EN,OBSCHK Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 8. "CHKSUM_ERR_EN,Checksum Error Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 7. "RAW_FAILED_EN,RAW Failed Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 4. "PMC_VLS_EN,PMC VLS Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 3. "DPGA_OC_POS_EN,DPGA OC POS Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 2. "DPGA_OC_NEG_EN,DPGA OC NEG Notification Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "GDU_INT_EN,GDU Notification Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0. "GDU_FAULT_PROT_EN,GDU Fault Protection Notification Enable" "0,1"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "NOTIFS_MONITOR,Monitoring of Notifications"
|
|
eventfld.long 0x0 16. "DPGA_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
eventfld.long 0x0 11. "OTP_MIRROR_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 10. "OTP_MIRROR_PAR_VAL,Parity Value Of Mirror Registers After Completion Of Otp Boot" "0,1"
|
|
newline
|
|
eventfld.long 0x0 9. "RSTG_CFG_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 8. "RSTG_CFG_PAR_VAL,Current Parity Value" "0,1"
|
|
newline
|
|
eventfld.long 0x0 7. "FAULTS_ENA_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 6. "FAULTS_ENA_PAR_VAL,Current Parity Value" "0,1"
|
|
newline
|
|
eventfld.long 0x0 5. "EVENTS_ENA_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "EVENTS_ENA_PAR_VAL,Current Parity Value" "0,1"
|
|
newline
|
|
eventfld.long 0x0 3. "FAULT_WD_CFG_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "FAULT_WD_CFG_PAR_VAL,Current Parity Value" "0,1"
|
|
newline
|
|
eventfld.long 0x0 1. "ALIVE_WD_CFG_PAR_ERR,Current Parity Value Error" "0,1"
|
|
newline
|
|
bitfld.long 0x0 0. "ALIVE_WD_CFG_PAR_VAL,Current Parity Value" "0,1"
|
|
line.long 0x4 "IRQ_SET,Set Status Bits"
|
|
bitfld.long 0x4 31. "FLT15_SET,Forces Flag Corresponding To Fault 15" "0,1"
|
|
newline
|
|
bitfld.long 0x4 30. "FLT14_SET,Forces Flag Corresponding To Fault 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 29. "FLT13_SET,Forces Flag Corresponding To Fault 13" "0,1"
|
|
newline
|
|
bitfld.long 0x4 28. "FLT12_SET,Forces Flag Corresponding To Fault 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 27. "FLT11_SET,Forces Flag Corresponding To Fault 11" "0,1"
|
|
newline
|
|
bitfld.long 0x4 26. "FLT10_SET,Forces Flag Corresponding To Fault 10" "0,1"
|
|
newline
|
|
bitfld.long 0x4 25. "FLT09_SET,Forces Flag Corresponding To Fault 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 24. "FLT08_SET,Forces Flag Corresponding To Fault 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 23. "FLT07_SET,Forces Flag Corresponding To Fault 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 20. "FLT04_SET,Forces Flag Corresponding To Fault 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "FLT03_SET,Forces Flag Corresponding To Fault 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 18. "FLT02_SET,Forces Flag Corresponding To Fault 2" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "FLT01_SET,Forces Flag Corresponding To Fault 1" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "FLT00_SET,Forces Flag Corresponding To Fault 0" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "EVT15_SET,Forces Flag Corresponding to Event 15" "0,1"
|
|
newline
|
|
bitfld.long 0x4 14. "EVT14_SET,Forces Flag Corresponding to Event 14" "0,1"
|
|
newline
|
|
bitfld.long 0x4 12. "EVT12_SET,Forces Flag Corresponding To Event 12" "0,1"
|
|
newline
|
|
bitfld.long 0x4 9. "EVT09_SET,Forces Flag Corresponding To Event 9" "0,1"
|
|
newline
|
|
bitfld.long 0x4 8. "EVT08_SET,Forces Flag Corresponding To Event 8" "0,1"
|
|
newline
|
|
bitfld.long 0x4 7. "EVT07_SET,Forces Flag Corresponding To Event 7" "0,1"
|
|
newline
|
|
bitfld.long 0x4 6. "EVT06_SET,Forces Flag Corresponding To Event 6" "0,1"
|
|
newline
|
|
bitfld.long 0x4 5. "EVT05_SET,Forces Flag Corresponding To Event 5" "0,1"
|
|
newline
|
|
bitfld.long 0x4 4. "EVT04_SET,Forces Flag Corresponding To Event 4" "0,1"
|
|
newline
|
|
bitfld.long 0x4 3. "EVT03_SET,Forces Flag Corresponding To Event 3" "0,1"
|
|
newline
|
|
bitfld.long 0x4 2. "EVT02_SET,Forces Flag Corresponding To Event 2" "0,1"
|
|
line.long 0x8 "SAFETY_ENABLE,Safety Enable"
|
|
bitfld.long 0x8 31. "FAULT_ALIVE_WDG_EN,Safe State Enable For FAULT ALIVE_WDG" "0,1"
|
|
newline
|
|
bitfld.long 0x8 30. "FAULT_ILL_TEST_EN,Safe State Enable For FAULT ILL_TEST" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 29. "FAULT13_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 28. "FAULT12_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 27. "FAULT11_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 26. "FAULT10_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 25. "FAULT09_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 24. "FAULT08_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 23. "FAULT07_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 22. "FAULT06_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 21. "FAULT05_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 20. "FAULT04_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 19. "FAULT03_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 18. "FAULT02_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 17. "FAULT01_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 16. "FAULT00_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 15. "EVENT15_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 14. "EVENT14_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 13. "EVENT13_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 12. "EVENT12_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 11. "EVENT11_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 10. "EVENT10_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 9. "EVENT09_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 8. "EVENT08_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 7. "EVENT07_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 6. "EVENT06_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 5. "EVENT05_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 4. "EVENT04_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 3. "EVENT03_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 2. "EVENT02_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 1. "EVENT01_EN,Not Used" "0,1"
|
|
newline
|
|
rbitfld.long 0x8 0. "EVENT00_EN,Not Used" "0,1"
|
|
group.word 0x2C++0x1
|
|
line.word 0x0 "SYSCLK_CHECK,System Clock Check"
|
|
hexmask.word 0x0 7.--15. 1. "VALID_THR_U,Valid System Clock Threshold Range Upper Boundary"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--6. 1. "VALID_THR_L,Valid System Clock Threshold Range Lower Boundary"
|
|
group.word 0x30++0x1
|
|
line.word 0x0 "ALIVE_WD_CFG,Alive Watchdog Configuration"
|
|
bitfld.word 0x0 15. "WDW_FAULTREC,Fault Response Configuration" "0: Unserviced watchdog triggers a fault..,1: Unserviced watchdog triggers a device reset"
|
|
newline
|
|
bitfld.word 0x0 14. "WDW_MODE,Watchdog Mode" "0: Simple mode. Expected response is token,1: Challenge mode. Expected response is given by a.."
|
|
newline
|
|
bitfld.word 0x0 8.--9. "WDW_BADRESP,Max Number Of Bad Responses. Access Are Locked" "0: First incorrect response token triggers a fault..,1: One incorrect response token permitted before..,2: Two incorrect response token permitted before..,3: Three incorrect response token permitted before.."
|
|
newline
|
|
bitfld.word 0x0 6.--7. "WDW_DC,Window duty cycle" "0: 0% Closed (feature disabled),1: First 31.25% closed (exact ratio: 1/2-1/4+1/16),2: First 50% closed,3: First 68.75% closed (exact ratio: 1/2+1/4-1/16)"
|
|
newline
|
|
hexmask.word.byte 0x0 0.--3. 1. "WDW_PERIOD,Watchdog Window Duration. Access Are Locked."
|
|
group.word 0x34++0x1
|
|
line.word 0x0 "ALIVE_WD_TOKEN,Alive Watchdog Reference Value"
|
|
hexmask.word 0x0 0.--15. 1. "WD_TOKEN,Token"
|
|
group.word 0x38++0x1
|
|
line.word 0x0 "ALIVE_WD_ANSWER,Alive Watchdog Answer"
|
|
hexmask.word 0x0 0.--15. 1. "WD_ANSWER,Answer"
|
|
group.word 0x3C++0x1
|
|
line.word 0x0 "FAULT_WD_CFG,Fault Watchdog Configuration"
|
|
hexmask.word 0x0 0.--11. 1. "TIME_OUT_CFG,Window Period"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CLKGEN_CFG,Clock Generator Configuration"
|
|
bitfld.long 0x0 28. "SYSCLK_FREQ_CFG,System Clock Frequency Estimator Configuration" "0,1"
|
|
newline
|
|
hexmask.long.word 0x0 16.--24. 1. "SYSCLK_FREQ_VAL,System Clock Frequency Estimator Result"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "RCOSC_MOD_NBR,RCOSC: number of modulation used for spreading frequency." "0: The modulation of the RCosc change between 2..,1: The modulation of the RCosc change between 4..,2: The modulation of the RCosc change between 8..,3: The modulation of the RCosc change between 16.."
|
|
newline
|
|
bitfld.long 0x0 11.--13. "RCOSC_MOD_FRQ,RCOSC: control frequency of switch for modulation" "0: modulation change at each RCosc cycle,1: modulation change each 2 RCosc cycles,2: modulation change each 4 RCosc cycles,3: modulation change each 8 RCosc cycles,4: modulation change each 16 RCosc cycles,5: modulation change each 32 RCosc cycles,6: modulation change each 64 RCosc cycles,7: modulation change each 128 RCosc cycles"
|
|
newline
|
|
bitfld.long 0x0 10. "RCOSC_MOD_ENA,RCOSC: modulation enable" "0: Disable modulation on RC oscillator,1: Enable modulation on RC oscillator"
|
|
newline
|
|
bitfld.long 0x0 8. "CXPI_CLK_EN,Enable CXPI functional clock" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "CLKGEN_CFG,Force Enable Of Clocks"
|
|
group.word 0x44++0x1
|
|
line.word 0x0 "RSTGEN_CFG,Reset Generator Configuration"
|
|
bitfld.word 0x0 15. "NOFLUSH,No Auto Flush" "0,1"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "RSTGEN_CFG,Module Activation"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "IO_FUNCMUX_CFG,IO Funcmux Configuration"
|
|
bitfld.long 0x0 18.--19. "CLKSEL,CLK_MUX_OUT: CLK Selection" "0: CLKOUT=OSC_RC 42 MHz divided by 8,1: CLKOUT=PMC FRO 150kHz,2: CLKOUT=CANPHY clkwuosc 1.25 MHz divided by 8,3: CLKOUT=CANPHY clkosctrx 1.95 MHz divided by 256"
|
|
newline
|
|
bitfld.long 0x0 17. "OUTSEL,CLK_MUX_OUT: OUT Selection" "0: CLKOUT,1: LIN Checking (LINPHY_RX)"
|
|
newline
|
|
bitfld.long 0x0 16. "D2D_EN,CLK_MUX_OUT: D2D Enable" "0: CLK_MUX_OUT Is in tristate,1: CLK_MUX_OUT Pad is enabled"
|
|
newline
|
|
bitfld.long 0x0 12. "VDDE_OCD_EN,Enable Over Current Detection" "0: VDDE Overcurrent detector is disabled,1: VDDE Overcurrent detector is enabled"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "PHY_SEL,VDDE PHY Selection" "0: VDDE Input not used and not driven,1: VDDE Input not used and not driven,2: VDDE Use as input for CANPHY_Tx,3: VDDE Use as input for LINPHY_Tx"
|
|
newline
|
|
bitfld.long 0x0 9. "VDDE_SEL,VDDE Selection" "0: Weak GND,1: Strong VDD"
|
|
newline
|
|
bitfld.long 0x0 8. "VDDE_DRV,VDDE Driver" "0: Digital mode VDDE as input depends of PHY_SEL,1: Analog mode VDDE as output depends of VDDE_SEL"
|
|
newline
|
|
bitfld.long 0x0 1.--3. "AMPOUT_SEL,AMPOUT Selection" "0: Hi-Z (analog AMPOUT),1: CANPHY_RX,2: LINPHY_RX,3: CANPHY_WURX,4: Oscillator out (see CLKOUT),5: PWM0,6: PWM2,7: PWM4"
|
|
newline
|
|
bitfld.long 0x0 0. "DPGA_OUT,DPGA out Selection" "0: Digital mode AMPOUT depends of AMPOUT_SEL,1: Analog mode dpga is connected to ampout through.."
|
|
group.word 0x60++0x1
|
|
line.word 0x0 "LINPHY_CFG,LINPHY Configuration"
|
|
bitfld.word 0x0 15. "LINPHY_ENABLE,LINPHY Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 14. "LIN_CXPI_SEL,Select protocol used on LIN line." "0: Select LIN protocol,1: Select CXPI protocol"
|
|
newline
|
|
bitfld.word 0x0 11. "CXPI_BOOST,Configures control of the falling edge." "0: Fast falling edge behavior enabled.,1: Fast falling edge behavior disabled"
|
|
newline
|
|
bitfld.word 0x0 10. "CXPI_SLOPE,Configures controlled slope timings" "0: Slope is optimized for LIN operation.,1: Slope is optimized for CXPI operation."
|
|
newline
|
|
bitfld.word 0x0 9. "CXPI_MS,CXPI Slave/Master mode." "0: Device is configured in CXPI master mode.,1: Device is configured in CXPI slave mode."
|
|
newline
|
|
bitfld.word 0x0 8. "CXPI_NSLP,CXPI No Sleep" "0: CXPI is in sleep mode.,1: CXPI is in normal mode."
|
|
newline
|
|
bitfld.word 0x0 4.--5. "SLEW,Configures The Slew Rate Of LINPHY" "0: Slew rate optimized for Baud-Rate of 20kBIt/s,1: Slew rate optimized for Baud-Rate of 115kbits..,2: Slew rate optimized for Baud-Rate of 10.4kBIt/s,?"
|
|
newline
|
|
bitfld.word 0x0 3. "ENATXTO,Configures the TX Dominant Timeout Detection Of LINPHY" "0: TX dominant timeout detection disabled,1: TX dominant timeout detection enabled"
|
|
newline
|
|
bitfld.word 0x0 2. "ENAWUP,Configures The Wakeup Receiver Of LINPHYs" "0: Wakeup receiver disabled,1: Wakeup receiver enabled"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "MODE,Configures The Operating Mode Of LINPHY" "0: Off when ENAWUP=0 or Wake capable when ENAWUP=1,1: Listen only,2: Normal,?"
|
|
group.long 0x64++0x3
|
|
line.long 0x0 "LINPHY_MONITOR,LINPHY Monitor"
|
|
bitfld.long 0x0 26. "CXPI_ARBIT_EN,CXPI arbitration lost interrupt enable" "0: CXPI arbitration lost interrupt disabled,1: CXPI_ARBIT_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 25. "CXPI_DOMTIMOUT_EN,CXPI dominant timout Interrupt Enable" "0: CXPI dominant timout Interrupt Disable,1: CXPI_DOMTIMOUT_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 24. "CXPI_WKUP_EN,CXPI Wakeup Interrupt Enable" "0: CXPI wakeup interrupt disabled,1: CXPI_WKUP_FL causes an interrupt"
|
|
newline
|
|
rbitfld.long 0x0 22. "CXPI_ARBIT_MON,Status of CXPI arbitration lost" "0: CXPI arbitration is not lost.,1: CXPI arbitration is lost."
|
|
newline
|
|
rbitfld.long 0x0 21. "CXPI_DOMTIMOUT_MON,Status of the CXPI TX Timeout Detector" "0: CXPI dominant timout inactive,1: CXPI dominant timout active"
|
|
newline
|
|
rbitfld.long 0x0 20. "CXPI_WKUP_MON,Status Of The CXPI Wakeup Detector" "0: CXPI wakeup inactive,1: CXPI wakeup active"
|
|
newline
|
|
eventfld.long 0x0 18. "CXPI_ARBIT_FL,CXPI arbitration lost" "0: No CXPI arbitration lost event detected,1: CXPI arbitration lost event detected"
|
|
newline
|
|
eventfld.long 0x0 17. "CXPI_DOMTIMOUT_FL,CXPI TX Timeout Detector" "0: No CXPI TX dominant timeout event detected,1: CXPI TX dominant timeout event detected"
|
|
newline
|
|
eventfld.long 0x0 16. "CXPI_WKUP_FL,CXPI Wakeup" "0: No CXPI wakeup event detected,1: CXPI wakeup event detected"
|
|
newline
|
|
bitfld.long 0x0 11. "LINPHY_ERROR_EN,LIN FSM Error Interrupt Enable" "0: Linphy FSM error interrupt disabled,1: LINPHY_ERROR_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 10. "LINPHY_TXTOSTATE_EN,LIN TX dominant Timeout Interrupt Enable" "0: Linphy dominant timeout interrupt disabled,1: LINPHY_TXTOSTATE_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 9. "LINPHY_SCPSTATE_EN,LIN Short Circuit Interrupt Enable" "0: Linphy short circuit interrupt disabled,1: LINPHY_SCPSTATE_FL causes an interrupt"
|
|
newline
|
|
bitfld.long 0x0 8. "LINPHY_WKUP_EN,LIN Wakeup Interrupt Enable" "0: Linphy wakeup interrupt disabled,1: LINPHY_WKUP_FL causes an interrupt"
|
|
newline
|
|
rbitfld.long 0x0 7. "LINPHY_ERROR_MON,Status Of The LIN FSM Error" "0: Error in LIN FSM inactive,1: Error in LIN FSM active"
|
|
newline
|
|
rbitfld.long 0x0 6. "LINPHY_TXTOSTATE_MON,Status Of The LIN TX Dominant Timeout Detector" "0: LIN TX dominant timeout protection inactive,1: LIN TX dominant timeout protection active"
|
|
newline
|
|
rbitfld.long 0x0 5. "LINPHY_SCPSTATE_MON,Status Of The LIN Short Circuit Detector" "0: LIN short circuit protection inactive,1: LIN short circuit protection active"
|
|
newline
|
|
rbitfld.long 0x0 4. "LINPHY_WKUP_MON,Status Of The LIN Wakeup Detector" "0: LIN wakeup inactive,1: LIN wakeup active"
|
|
newline
|
|
eventfld.long 0x0 3. "LINPHY_ERROR_FL,LIN FSM Error" "0: No error in LIN FSM detected,1: Error in LIN FSM detected"
|
|
newline
|
|
eventfld.long 0x0 2. "LINPHY_TXTOSTATE_FL,LIN TX Timeout Detector" "0: No LIN TX dominant timeout event detected,1: LIN TX dominant timeout event detected"
|
|
newline
|
|
eventfld.long 0x0 1. "LINPHY_SCPSTATE_FL,LIN Short Circuit" "0: No LIN short circuit event detected,1: LIN short circuit event detected"
|
|
newline
|
|
eventfld.long 0x0 0. "LINPHY_WKUP_FL,LIN Wakeup" "0: No LIN wakeup event detected,1: LIN wakeup event detected"
|
|
group.word 0x70++0x1
|
|
line.word 0x0 "CANPHY_CFG,CANPHY Configuration"
|
|
bitfld.word 0x0 15. "CANPHY_ENABLE,CANPHY Enable" "0,1"
|
|
newline
|
|
bitfld.word 0x0 0.--1. "MODE,CANPHY Mode Control" "0: Offline mode,1: Normal mode,?,3: Listen only mode"
|
|
group.word 0x74++0x1
|
|
line.word 0x0 "CANPHY_MONITOR,CANPHY Monitor"
|
|
bitfld.word 0x0 10. "CANPHY_INVALIDSTATE_EN,CANPHY FSM Error Notification Enable" "0: CANPHY FSM error notification disabled,1: CANPHY_INVALIDSTATE_FL triggers a notification"
|
|
newline
|
|
bitfld.word 0x0 9. "CANPHY_TXDOMTIMEDOUT_EN,CANPHY TX Dominant Timeout Notification Enable" "0: CANPHY TX dominant timeout notification disabled,1: CANPHY_TXDOMTIMEDOUT_FL triggers a notification"
|
|
newline
|
|
bitfld.word 0x0 8. "CANPHY_WKUP_EN,CANPHY Wakeup Notification Enable" "0: CANPHY wakeup notification disabled,1: CANPHY_WKUP_FL triggers a notification"
|
|
newline
|
|
rbitfld.word 0x0 6. "CANPHY_INVALIDSTATE_MON,Live Status Of The CANPHY FSM Error" "0: No error in CANPHY FSM,1: Error in CANPHY FSM"
|
|
newline
|
|
rbitfld.word 0x0 5. "CANPHY_TXDOMTIMEDOUT_MON,Live status of the CANPHY TX dominant timeout detector" "0: CANPHY TX dominant timeout protection inactive,1: CANPHY TX dominant timeout protection active"
|
|
newline
|
|
rbitfld.word 0x0 4. "CANPHY_WKUP_MON,Live Status Of The CANPHY Wakeup Detector" "0: CANPHY wakeup inactive,1: CANPHY wakeup active"
|
|
newline
|
|
eventfld.word 0x0 2. "CANPHY_INVALIDSTATE_FL,CANPHY Invalid State" "0: No CANPHY FSM error event detected,1: CANPHY FSM error event detected"
|
|
newline
|
|
eventfld.word 0x0 1. "CANPHY_TXDOMTIMEDOUT_FL,CANPHY TX Dominant Timeout" "0: No CANPHY TX dominant timeout event detected,1: CANPHY TX dominant timeout event detected"
|
|
newline
|
|
eventfld.word 0x0 0. "CANPHY_WKUP_FL,CANPHY Wakeup" "0: No CANPHY wakeup event detected,1: CANPHY wakeup event detected"
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "TMON_PHY,Temperature Monitor PHY"
|
|
bitfld.long 0x0 19. "PHY_175_EN,PHY 175degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 18. "PHY_150_EN,PHY 150degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 17. "PHY_125_EN,PHY 125degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x0 16. "PHY_85_EN,PHY 85degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
rbitfld.long 0x0 11. "PHY_175_MON,PHY Temperature Sensor Is Over 175degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 10. "PHY_150_MON,PHY Temperature Sensor Is Over 150degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 9. "PHY_125_MON,PHY Temperature Sensor Is Over 125degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x0 8. "PHY_85_MON,PHY Temperature Sensor Is Over 85degree C" "0,1"
|
|
newline
|
|
eventfld.long 0x0 3. "PHY_175_FL,Status flag for temperature crossing over 175degree C This is a sticky-bit implemented as W1C that is set whenever this temperature is reached" "0,1"
|
|
newline
|
|
eventfld.long 0x0 2. "PHY_150_FL,PHY 150degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x0 1. "PHY_125_FL,PHY 125degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x0 0. "PHY_85_FL,PHY 85degree Flag" "0,1"
|
|
line.long 0x4 "TMON_PMC,Temperature Monitor PMC"
|
|
bitfld.long 0x4 19. "PMC_175_EN,PMC 175degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 18. "PMC_150_EN,PMC 150degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 17. "PMC_125_EN,PMC 125degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
bitfld.long 0x4 16. "PMC_85_EN,PMC 85degree Enable" "0: Disable generation of a notification event,1: Enable generation of a notification event"
|
|
newline
|
|
rbitfld.long 0x4 11. "PMC_175_MON,PMC Temperature Sensor Is Over 175degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 10. "PMC_150_MON,PMC Temperature Sensor Is Over 150degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 9. "PMC_125_MON,PMC Temperature Sensor Is Over 125degree C" "0,1"
|
|
newline
|
|
rbitfld.long 0x4 8. "PMC_85_MON,PMC Temperature Sensor Is Over 85degree C" "0,1"
|
|
newline
|
|
eventfld.long 0x4 3. "PMC_175_FL,PMC 175degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 2. "PMC_150_FL,PMC 150degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 1. "PMC_125_FL,PMC 125degree Flag" "0,1"
|
|
newline
|
|
eventfld.long 0x4 0. "PMC_85_FL,PMC 85degree Flag" "0,1"
|
|
group.word 0x88++0x3
|
|
line.word 0x0 "TMON_MONITOR,TMON Monitor"
|
|
bitfld.word 0x0 12. "PMC_SELF_EN,TEMPSENSOR PMC self-test Failure Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 9. "PMC_SELF_MON,TEMPSENSOR Monitor Self-test" "0,1"
|
|
newline
|
|
eventfld.word 0x0 8. "PMC_SELF_FL,TEMPSENSOR PMC Self-test Failure Status" "0,1"
|
|
newline
|
|
bitfld.word 0x0 4. "PHY_SELF_EN,TEMPSENSOR PHY Self-test Failure Enable" "0,1"
|
|
newline
|
|
rbitfld.word 0x0 1. "PHY_SELF_MON,TEMPSENSOR Monitor Self-Test" "0,1"
|
|
newline
|
|
eventfld.word 0x0 0. "PHY_SELF_FL,TEMPSENSOR PHY Self-test Failure Status" "0,1"
|
|
line.word 0x2 "TMON_CHECK,TMON Check"
|
|
rbitfld.word 0x2 1. "SELF_ACT,Status Of Self-check Command" "0: Self-check is inactive,1: Self-check is active still running"
|
|
newline
|
|
bitfld.word 0x2 0. "SELF_CMD,Trigger self-test On Both Temp Sensors" "?,1: Trigger a new self-test"
|
|
tree.end
|
|
tree "AIPS (Peripheral Bridge)"
|
|
base ad:0x40000000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "MPRA,Master Privilege Register A"
|
|
bitfld.long 0x0 30. "MTR0,Master 0 Trusted For Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses."
|
|
bitfld.long 0x0 29. "MTW0,Master 0 Trusted For Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses."
|
|
newline
|
|
bitfld.long 0x0 28. "MPL0,Master 0 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.."
|
|
bitfld.long 0x0 26. "MTR1,Master 1 Trusted for Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses."
|
|
newline
|
|
bitfld.long 0x0 25. "MTW1,Master 1 Trusted for Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses."
|
|
bitfld.long 0x0 24. "MPL1,Master 1 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.."
|
|
newline
|
|
bitfld.long 0x0 22. "MTR2,Master 2 Trusted For Read" "0: This master is not trusted for read accesses.,1: This master is trusted for read accesses."
|
|
bitfld.long 0x0 21. "MTW2,Master 2 Trusted For Writes" "0: This master is not trusted for write accesses.,1: This master is trusted for write accesses."
|
|
newline
|
|
bitfld.long 0x0 20. "MPL2,Master 2 Privilege Level" "0: Accesses from this master are forced to user-mode.,1: Accesses from this master are not forced to.."
|
|
group.long 0x20++0x7
|
|
line.long 0x0 "PACRA,Peripheral Access Control Register"
|
|
bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x4 "PACRB,Peripheral Access Control Register"
|
|
bitfld.long 0x4 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x4 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x4 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x4 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x4 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x4 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x4 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x4 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x4 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "PACRD,Peripheral Access Control Register"
|
|
bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
group.long 0x40++0x2F
|
|
line.long 0x0 "OPACRA,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x0 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x0 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x0 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x0 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x0 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x0 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x0 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x0 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x0 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x0 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x0 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x0 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x0 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x0 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x0 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x0 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x0 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x0 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x4 "OPACRB,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x4 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x4 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x4 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x4 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x4 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x4 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x4 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x4 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x4 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x8 "OPACRC,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x8 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x8 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x8 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x8 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x8 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x8 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x8 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x8 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x8 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x8 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x8 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x8 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0xC "OPACRD,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0xC 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0xC 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0xC 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0xC 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0xC 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0xC 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0xC 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0xC 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0xC 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0xC 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0xC 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0xC 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0xC 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0xC 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0xC 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x10 "OPACRE,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x10 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x10 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x10 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x10 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x10 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x10 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x14 "OPACRF,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x14 30. "SP0,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x14 29. "WP0,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x14 28. "TP0,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x14 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x14 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x14 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x14 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x14 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x14 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x14 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x14 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x14 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x14 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x14 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x14 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x14 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x14 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x14 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x18 "OPACRG,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x18 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x18 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x18 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x1C "OPACRH,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x1C 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x1C 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x1C 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x20 "OPACRI,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x20 26. "SP1,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x20 25. "WP1,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x20 24. "TP1,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x20 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x20 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x20 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x20 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x20 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x20 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x20 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x20 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x20 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x20 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x20 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x20 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x24 "OPACRJ,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x24 22. "SP2,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x24 21. "WP2,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x24 20. "TP2,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x24 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x24 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x24 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x24 14. "SP4,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x24 13. "WP4,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x24 12. "TP4,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x28 "OPACRK,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x28 18. "SP3,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x28 17. "WP3,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x28 16. "TP3,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
line.long 0x2C "OPACRL,Off-Platform Peripheral Access Control Register"
|
|
bitfld.long 0x2C 10. "SP5,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x2C 9. "WP5,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x2C 8. "TP5,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
bitfld.long 0x2C 6. "SP6,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
newline
|
|
bitfld.long 0x2C 5. "WP6,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
bitfld.long 0x2C 4. "TP6,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
newline
|
|
bitfld.long 0x2C 2. "SP7,Supervisor Protect" "0: This peripheral does not require supervisor..,1: This peripheral requires supervisor privilege.."
|
|
bitfld.long 0x2C 1. "WP7,Write Protect" "0: This peripheral allows write accesses.,1: This peripheral is write protected."
|
|
newline
|
|
bitfld.long 0x2C 0. "TP7,Trusted Protect" "0: Accesses from an untrusted master are allowed.,1: Accesses from an untrusted master are not allowed."
|
|
tree.end
|
|
tree "CMP (Comparator)"
|
|
base ad:0x40073000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "C0,CMP Control Register 0"
|
|
bitfld.long 0x0 30. "DMAEN,DMA Enable" "0: DMA is disabled.,1: DMA is enabled."
|
|
bitfld.long 0x0 28. "IER,Comparator Interrupt Enable Rising" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x0 27. "IEF,Comparator Interrupt Enable Falling" "0: Interrupt is disabled.,1: Interrupt is enabled."
|
|
eventfld.long 0x0 26. "CFR,Analog Comparator Flag Rising" "0: A rising edge has not been detected on COUT.,1: A rising edge on COUT has occurred."
|
|
newline
|
|
eventfld.long 0x0 25. "CFF,Analog Comparator Flag Falling" "0: A falling edge has not been detected on COUT.,1: A falling edge on COUT has occurred."
|
|
rbitfld.long 0x0 24. "COUT,Analog Comparator Output" "0,1"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "FPR,Filter Sample Period"
|
|
bitfld.long 0x0 15. "SE,Sample Enable" "0: Sampling mode is not selected.,1: Sampling mode is selected."
|
|
newline
|
|
bitfld.long 0x0 14. "WE,Windowing Enable" "0: Windowing mode is not selected.,1: Windowing mode is selected."
|
|
bitfld.long 0x0 12. "PMODE,Power Mode Select" "0: Low Speed (LS) comparison mode is selected.,1: High Speed (HS) comparison mode is selected in.."
|
|
newline
|
|
bitfld.long 0x0 11. "INVT,Comparator invert" "0: Does not invert the comparator output.,1: Inverts the comparator output."
|
|
bitfld.long 0x0 10. "COS,Comparator Output Select" "0: Set CMPO to equal COUT (filtered comparator..,1: Set CMPO to equal COUTA (unfiltered comparator.."
|
|
newline
|
|
bitfld.long 0x0 9. "OPE,Comparator Output Pin Enable" "0: When OPE is 0 the comparator output (after..,1: When OPE is 1 and if the software has configured.."
|
|
bitfld.long 0x0 8. "EN,Comparator Module Enable" "0: Analog Comparator is disabled.,1: Analog Comparator is enabled."
|
|
newline
|
|
bitfld.long 0x0 4.--6. "FILTER_CNT,Filter Sample Count" "0: Filter is disabled. If SE = 1 then COUT is a..,1: 1 consecutive sample must agree (comparator..,2: 2 consecutive samples must agree.,3: 3 consecutive samples must agree.,4: 4 consecutive samples must agree.,5: 5 consecutive samples must agree.,6: 6 consecutive samples must agree.,7: 7 consecutive samples must agree."
|
|
bitfld.long 0x0 2. "OFFSET,Comparator hard block offset control. See chip data sheet to get the actual offset value with each level" "0: The comparator hard block output has level 0..,1: The comparator hard block output has level 1.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "HYSTCTR,Comparator hard block hysteresis control. See chip data sheet to get the actual hysteresis value with each level" "0: The hard block output has level 0 hysteresis..,1: The hard block output has level 1 hysteresis..,2: The hard block output has level 2 hysteresis..,3: The hard block output has level 3 hysteresis.."
|
|
line.long 0x4 "C1,CMP Control Register 1"
|
|
bitfld.long 0x4 27.--28. "INPSEL,Selection of the input to the positive port of the comparator" "0: IN0 from the 8-bit DAC output,1: IN1 from the analog 8-1 mux,?,?"
|
|
bitfld.long 0x4 24.--25. "INNSEL,Selection of the input to the negative port of the comparator" "0: IN0 from the 8-bit DAC output,1: IN1 from the analog 8-1 mux,?,?"
|
|
newline
|
|
bitfld.long 0x4 23. "CHN7,Channel 7 input enable" "0,1"
|
|
bitfld.long 0x4 22. "CHN6,Channel 6 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "CHN5,Channel 5 input enable" "0,1"
|
|
bitfld.long 0x4 20. "CHN4,Channel 4 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 19. "CHN3,Channel 3 input enable" "0,1"
|
|
bitfld.long 0x4 18. "CHN2,Channel 2 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 17. "CHN1,Channel 1 input enable" "0,1"
|
|
bitfld.long 0x4 16. "CHN0,Channel 0 input enable" "0,1"
|
|
newline
|
|
bitfld.long 0x4 15. "DACEN,DAC Enable" "0: DAC is disabled.,1: DAC is enabled."
|
|
bitfld.long 0x4 14. "VRSEL,Supply Voltage Reference Source Select" "0: Vin1 is selected as resistor ladder network..,1: Vin2 is selected as resistor ladder network.."
|
|
newline
|
|
bitfld.long 0x4 11.--13. "PSEL,Plus Input MUX Control" "0: IN0,1: IN1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7"
|
|
bitfld.long 0x4 8.--10. "MSEL,Minus Input MUX Control" "0: IN0,1: IN1,2: IN2,3: IN3,4: IN4,5: IN5,6: IN6,7: IN7"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "VOSEL,DAC Output Voltage Select"
|
|
line.long 0x8 "C2,CMP Control Register 2"
|
|
bitfld.long 0x8 31. "RRE,Round-Robin Enable" "0: Round-robin operation is disabled.,1: Round-robin operation is enabled."
|
|
bitfld.long 0x8 30. "RRIE,Round-Robin interrupt enable" "0: The round-robin interrupt is disabled.,1: The round-robin interrupt is enabled when a.."
|
|
newline
|
|
bitfld.long 0x8 29. "FXMP,Fixed MUX Port" "0: The Plus port is fixed. Only the inputs to the..,1: The Minus port is fixed. Only the inputs to the.."
|
|
bitfld.long 0x8 25.--27. "FXMXCH,Fixed channel selection" "0: Channel 0 is selected as the fixed reference..,1: Channel 1 is selected as the fixed reference..,2: Channel 2 is selected as the fixed reference..,3: Channel 3 is selected as the fixed reference..,4: Channel 4 is selected as the fixed reference..,5: Channel 5 is selected as the fixed reference..,6: Channel 6 is selected as the fixed reference..,7: Channel 7 is selected as the fixed reference.."
|
|
newline
|
|
eventfld.long 0x8 23. "CH7F,CH7F" "0,1"
|
|
eventfld.long 0x8 22. "CH6F,CH6F" "0,1"
|
|
newline
|
|
eventfld.long 0x8 21. "CH5F,CH5F" "0,1"
|
|
eventfld.long 0x8 20. "CH4F,CH4F" "0,1"
|
|
newline
|
|
eventfld.long 0x8 19. "CH3F,CH3F" "0,1"
|
|
eventfld.long 0x8 18. "CH2F,CH2F" "0,1"
|
|
newline
|
|
eventfld.long 0x8 17. "CH1F,CH1F" "0,1"
|
|
eventfld.long 0x8 16. "CH0F,CH0F" "0,1"
|
|
newline
|
|
bitfld.long 0x8 14.--15. "NSAM,Number of sample clocks" "0: The comparison result is sampled as soon as the..,1: The sampling takes place 1 round-robin clock..,2: The sampling takes place 2 round-robin clock..,3: The sampling takes place 3 round-robin clock.."
|
|
hexmask.long.byte 0x8 8.--13. 1. "INITMOD,Comparator and DAC initialization delay modulus."
|
|
newline
|
|
hexmask.long.byte 0x8 0.--7. 1. "ACOn,ACOn"
|
|
tree.end
|
|
tree "CRC (Cyclic Redundancy Check)"
|
|
base ad:0x40032000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "DATA,CRC DATA register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "HU,CRC High Upper Byte"
|
|
hexmask.long.byte 0x0 16.--23. 1. "HL,CRC High Lower Byte"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "LU,CRC Low Upper Byte"
|
|
hexmask.long.byte 0x0 0.--7. 1. "LL,CRC Low Lower Byte"
|
|
line.long 0x4 "GPOLY,CRC Polynomial register"
|
|
hexmask.long.word 0x4 16.--31. 1. "HIGH,High Polynominal Half-word"
|
|
hexmask.long.word 0x4 0.--15. 1. "LOW,Low Polynominal Half-word"
|
|
line.long 0x8 "CTRL,CRC Control register"
|
|
bitfld.long 0x8 30.--31. "TOT,Type Of Transpose For Writes" "0: No transposition.,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed.,3: Only bytes are transposed; no bits in a byte are.."
|
|
bitfld.long 0x8 28.--29. "TOTR,Type Of Transpose For Read" "0: No transposition.,1: Bits in bytes are transposed; bytes are not..,2: Both bits in bytes and bytes are transposed.,3: Only bytes are transposed; no bits in a byte are.."
|
|
newline
|
|
bitfld.long 0x8 26. "FXOR,Complement Read Of CRC DATA register" "0: No XOR on reading.,1: Invert or complement the read value of the CRC.."
|
|
bitfld.long 0x8 25. "WAS,Write CRC DATA register As Seed" "0: Writes to the CRC DATA register are data values.,1: Writes to the CRC DATA register are seed values."
|
|
newline
|
|
bitfld.long 0x8 24. "TCRC,TCRC" "0: 16-bit CRC protocol.,1: 32-bit CRC protocol."
|
|
tree.end
|
|
tree "DMA (Direct Memory Access)"
|
|
base ad:0x40008000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR,Control"
|
|
rbitfld.long 0x0 31. "ACTIVE,eDMA Active Status" "0: eDMA is idle,1: eDMA is executing a channel"
|
|
bitfld.long 0x0 17. "CX,Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer"
|
|
newline
|
|
bitfld.long 0x0 16. "ECX,Error Cancel Transfer" "0: Normal operation,1: Cancel the remaining data transfer"
|
|
bitfld.long 0x0 7. "EMLM,Enable Minor Loop Mapping" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x0 6. "CLM,Continuous Link Mode" "0: Continuous link mode is off,1: Continuous link mode is on"
|
|
bitfld.long 0x0 5. "HALT,Halt eDMA Operations" "0: Normal operation,1: eDMA operations halted"
|
|
newline
|
|
bitfld.long 0x0 4. "HOE,Halt On Error" "0: Normal operation,1: Error causes HALT field to be automatically set.."
|
|
bitfld.long 0x0 2. "ERCA,Enable Round Robin Channel Arbitration" "0: Fixed priority arbitration,1: Round robin arbitration"
|
|
newline
|
|
bitfld.long 0x0 1. "EDBG,Enable Debug" "0: When the chip is in Debug mode the eDMA..,1: When the chip is in debug mode the DMA stalls.."
|
|
rgroup.long 0x4++0x3
|
|
line.long 0x0 "ES,Error Status"
|
|
bitfld.long 0x0 31. "VLD,Logical OR of all ERR status fields" "0: No ERR fields are 1,1: At least one ERR field has a value of 1.."
|
|
bitfld.long 0x0 16. "ECX,Transfer Canceled" "0: No canceled transfers,1: The most-recently recorded entry was a canceled.."
|
|
newline
|
|
bitfld.long 0x0 14. "CPE,Channel Priority Error" "0: No channel priority error.,1: The most-recently recorded error was a.."
|
|
hexmask.long.byte 0x0 8.--11. 1. "ERRCHN,Error Channel Number or Canceled Channel Number"
|
|
newline
|
|
bitfld.long 0x0 7. "SAE,Source Address Error" "0: No source address configuration error.,1: The most-recently recorded error was a.."
|
|
bitfld.long 0x0 6. "SOE,Source Offset Error" "0: No source offset configuration error.,1: The most-recently recorded error was a.."
|
|
newline
|
|
bitfld.long 0x0 5. "DAE,Destination Address Error" "0: No destination address configuration error.,1: The most-recently recorded error was a.."
|
|
bitfld.long 0x0 4. "DOE,Destination Offset Error" "0: No destination offset configuration error.,1: The most-recently recorded error was a.."
|
|
newline
|
|
bitfld.long 0x0 3. "NCE,NBYTES/CITER Configuration Error" "0: No NBYTES/CITER configuration error.,1: The most-recently recorded error was a.."
|
|
bitfld.long 0x0 2. "SGE,Scatter/Gather Configuration Error" "0: No scatter/gather configuration error.,1: The most-recently recorded error was a.."
|
|
newline
|
|
bitfld.long 0x0 1. "SBE,Source Bus Error" "0: No source bus error.,1: The most-recently recorded error was a bus error.."
|
|
bitfld.long 0x0 0. "DBE,Destination Bus Error" "0: No destination bus error.,1: The most-recently recorded error was a bus error.."
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "ERQ,Enable Request"
|
|
bitfld.long 0x0 15. "ERQ15,Enable DMA Request 15" "0: The DMA request signal for channel 15 is disabled,1: The DMA request signal for channel 15 is enabled"
|
|
bitfld.long 0x0 14. "ERQ14,Enable DMA Request 14" "0: The DMA request signal for channel 14 is disabled,1: The DMA request signal for channel 14 is enabled"
|
|
newline
|
|
bitfld.long 0x0 13. "ERQ13,Enable DMA Request 13" "0: The DMA request signal for channel 13 is disabled,1: The DMA request signal for channel 13 is enabled"
|
|
bitfld.long 0x0 12. "ERQ12,Enable DMA Request 12" "0: The DMA request signal for channel 12 is disabled,1: The DMA request signal for channel 12 is enabled"
|
|
newline
|
|
bitfld.long 0x0 11. "ERQ11,Enable DMA Request 11" "0: The DMA request signal for channel 11 is disabled,1: The DMA request signal for channel 11 is enabled"
|
|
bitfld.long 0x0 10. "ERQ10,Enable DMA Request 10" "0: The DMA request signal for channel 10 is disabled,1: The DMA request signal for channel 10 is enabled"
|
|
newline
|
|
bitfld.long 0x0 9. "ERQ9,Enable DMA Request 9" "0: The DMA request signal for channel 9 is disabled,1: The DMA request signal for channel 9 is enabled"
|
|
bitfld.long 0x0 8. "ERQ8,Enable DMA Request 8" "0: The DMA request signal for channel 8 is disabled,1: The DMA request signal for channel 8 is enabled"
|
|
newline
|
|
bitfld.long 0x0 7. "ERQ7,Enable DMA Request 7" "0: The DMA request signal for channel 7 is disabled,1: The DMA request signal for channel 7 is enabled"
|
|
bitfld.long 0x0 6. "ERQ6,Enable DMA Request 6" "0: The DMA request signal for channel 6 is disabled,1: The DMA request signal for channel 6 is enabled"
|
|
newline
|
|
bitfld.long 0x0 5. "ERQ5,Enable DMA Request 5" "0: The DMA request signal for channel 5 is disabled,1: The DMA request signal for channel 5 is enabled"
|
|
bitfld.long 0x0 4. "ERQ4,Enable DMA Request 4" "0: The DMA request signal for channel 4 is disabled,1: The DMA request signal for channel 4 is enabled"
|
|
newline
|
|
bitfld.long 0x0 3. "ERQ3,Enable DMA Request 3" "0: The DMA request signal for channel 3 is disabled,1: The DMA request signal for channel 3 is enabled"
|
|
bitfld.long 0x0 2. "ERQ2,Enable DMA Request 2" "0: The DMA request signal for channel 2 is disabled,1: The DMA request signal for channel 2 is enabled"
|
|
newline
|
|
bitfld.long 0x0 1. "ERQ1,Enable DMA Request 1" "0: The DMA request signal for channel 1 is disabled,1: The DMA request signal for channel 1 is enabled"
|
|
bitfld.long 0x0 0. "ERQ0,Enable DMA Request 0" "0: The DMA request signal for channel 0 is disabled,1: The DMA request signal for channel 0 is enabled"
|
|
group.long 0x14++0x3
|
|
line.long 0x0 "EEI,Enable Error Interrupt"
|
|
bitfld.long 0x0 15. "EEI15,Enable Error Interrupt 15" "0: An error on channel 15 does not generate an..,1: An error on channel 15 generates an error.."
|
|
bitfld.long 0x0 14. "EEI14,Enable Error Interrupt 14" "0: An error on channel 14 does not generate an..,1: An error on channel 14 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 13. "EEI13,Enable Error Interrupt 13" "0: An error on channel 13 does not generate an..,1: An error on channel 13 generates an error.."
|
|
bitfld.long 0x0 12. "EEI12,Enable Error Interrupt 12" "0: An error on channel 12 does not generate an..,1: An error on channel 12 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 11. "EEI11,Enable Error Interrupt 11" "0: An error on channel 11 does not generate an..,1: An error on channel 11 generates an error.."
|
|
bitfld.long 0x0 10. "EEI10,Enable Error Interrupt 10" "0: An error on channel 10 does not generate an..,1: An error on channel 10 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 9. "EEI9,Enable Error Interrupt 9" "0: An error on channel 9 does not generate an error..,1: An error on channel 9 generates an error.."
|
|
bitfld.long 0x0 8. "EEI8,Enable Error Interrupt 8" "0: An error on channel 8 does not generate an error..,1: An error on channel 8 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 7. "EEI7,Enable Error Interrupt 7" "0: An error on channel 7 does not generate an error..,1: An error on channel 7 generates an error.."
|
|
bitfld.long 0x0 6. "EEI6,Enable Error Interrupt 6" "0: An error on channel 6 does not generate an error..,1: An error on channel 6 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 5. "EEI5,Enable Error Interrupt 5" "0: An error on channel 5 does not generate an error..,1: An error on channel 5 generates an error.."
|
|
bitfld.long 0x0 4. "EEI4,Enable Error Interrupt 4" "0: An error on channel 4 does not generate an error..,1: An error on channel 4 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 3. "EEI3,Enable Error Interrupt 3" "0: An error on channel 3 does not generate an error..,1: An error on channel 3 generates an error.."
|
|
bitfld.long 0x0 2. "EEI2,Enable Error Interrupt 2" "0: An error on channel 2 does not generate an error..,1: An error on channel 2 generates an error.."
|
|
newline
|
|
bitfld.long 0x0 1. "EEI1,Enable Error Interrupt 1" "0: An error on channel 1 does not generate an error..,1: An error on channel 1 generates an error.."
|
|
bitfld.long 0x0 0. "EEI0,Enable Error Interrupt 0" "0: An error on channel 0 does not generate an error..,1: An error on channel 0 generates an error.."
|
|
group.byte 0x18++0x7
|
|
line.byte 0x0 "CEEI,Clear Enable Error Interrupt"
|
|
bitfld.byte 0x0 7. "NOP,No Op Enable" "0: Normal operation,1: No operation ignore the other fields in this.."
|
|
bitfld.byte 0x0 6. "CAEE,Clear All Enable Error Interrupts" "0: Write 0 only to the EEI field specified in the..,1: Write 0 to all fields in EEI"
|
|
newline
|
|
hexmask.byte 0x0 0.--3. 1. "CEEI,Clear Enable Error Interrupt"
|
|
line.byte 0x1 "SEEI,Set Enable Error Interrupt"
|
|
bitfld.byte 0x1 7. "NOP,No Op Enable" "0: Normal operation,1: No operation ignore the other fields in this.."
|
|
bitfld.byte 0x1 6. "SAEE,Set All Enable Error Interrupts" "0: Write 1 only to the EEI field specified in the..,1: Writes 1 to all fields in EEI"
|
|
newline
|
|
hexmask.byte 0x1 0.--3. 1. "SEEI,Set Enable Error Interrupt"
|
|
line.byte 0x2 "CERQ,Clear Enable Request"
|
|
bitfld.byte 0x2 7. "NOP,No Op Enable" "0: Normal operation,1: No operation ignore the other fields in this.."
|
|
bitfld.byte 0x2 6. "CAER,Clear All Enable Requests" "0: Write 0 to only the ERQ field specified in the..,1: Write 0 to all fields in ERQ"
|
|
newline
|
|
hexmask.byte 0x2 0.--3. 1. "CERQ,Clear Enable Request"
|
|
line.byte 0x3 "SERQ,Set Enable Request"
|
|
bitfld.byte 0x3 7. "NOP,No Op Enable" "0: Normal operation,1: No operation ignore the other fields in this.."
|
|
bitfld.byte 0x3 6. "SAER,Set All Enable Requests" "0: Write 1 to only the ERQ field specified in the..,1: Write 1 to all fields in ERQ"
|
|
newline
|
|
hexmask.byte 0x3 0.--3. 1. "SERQ,Set Enable Request"
|
|
line.byte 0x4 "CDNE,Clear DONE Status Bit"
|
|
bitfld.byte 0x4 7. "NOP,No Op Enable" "0: Normal operation,1: No operation; all other fields in this register.."
|
|
bitfld.byte 0x4 6. "CADN,Clears All DONE fields" "0: Writes 0 to only the TCDn_CSR[DONE] field..,1: Writes 0 to all bits in TCDn_CSR[DONE]"
|
|
newline
|
|
hexmask.byte 0x4 0.--3. 1. "CDNE,Clear DONE field"
|
|
line.byte 0x5 "SSRT,Set START Bit"
|
|
bitfld.byte 0x5 7. "NOP,No Op Enable" "0: Normal operation,1: No operation; all other fields in this register.."
|
|
bitfld.byte 0x5 6. "SAST,Set All START fields (activates all channels)" "0: Write 1 to only the TCDn_CSR[START] field..,1: Write 1 to all bits in TCDn_CSR[START]"
|
|
newline
|
|
hexmask.byte 0x5 0.--3. 1. "SSRT,Set START field"
|
|
line.byte 0x6 "CERR,Clear Error"
|
|
bitfld.byte 0x6 7. "NOP,No Op Enable" "0: Normal operation,1: No operation; all other fields in this register.."
|
|
bitfld.byte 0x6 6. "CAEI,Clear All Error Indicators" "0: Write 0 to only the ERR field specified in the..,1: Write 0 to all fields in ERR"
|
|
newline
|
|
hexmask.byte 0x6 0.--3. 1. "CERR,Clear Error Indicator"
|
|
line.byte 0x7 "CINT,Clear Interrupt Request"
|
|
bitfld.byte 0x7 7. "NOP,No Op Enable" "0: Normal operation,1: No operation; all other fields in this register.."
|
|
bitfld.byte 0x7 6. "CAIR,Clear All Interrupt Requests" "0: Clear only the INT field specified in the CINT..,1: Clear all bits in INT"
|
|
newline
|
|
hexmask.byte 0x7 0.--3. 1. "CINT,Clear Interrupt Request"
|
|
group.long 0x24++0x3
|
|
line.long 0x0 "INT,Interrupt Request"
|
|
eventfld.long 0x0 15. "INT15,Interrupt Request 15" "0: The interrupt request for channel 15 is cleared,1: The interrupt request for channel 15 is active"
|
|
eventfld.long 0x0 14. "INT14,Interrupt Request 14" "0: The interrupt request for channel 14 is cleared,1: The interrupt request for channel 14 is active"
|
|
newline
|
|
eventfld.long 0x0 13. "INT13,Interrupt Request 13" "0: The interrupt request for channel 13 is cleared,1: The interrupt request for channel 13 is active"
|
|
eventfld.long 0x0 12. "INT12,Interrupt Request 12" "0: The interrupt request for channel 12 is cleared,1: The interrupt request for channel 12 is active"
|
|
newline
|
|
eventfld.long 0x0 11. "INT11,Interrupt Request 11" "0: The interrupt request for channel 11 is cleared,1: The interrupt request for channel 11 is active"
|
|
eventfld.long 0x0 10. "INT10,Interrupt Request 10" "0: The interrupt request for channel 10 is cleared,1: The interrupt request for channel 10 is active"
|
|
newline
|
|
eventfld.long 0x0 9. "INT9,Interrupt Request 9" "0: The interrupt request for channel 9 is cleared,1: The interrupt request for channel 9 is active"
|
|
eventfld.long 0x0 8. "INT8,Interrupt Request 8" "0: The interrupt request for channel 8 is cleared,1: The interrupt request for channel 8 is active"
|
|
newline
|
|
eventfld.long 0x0 7. "INT7,Interrupt Request 7" "0: The interrupt request for channel 7 is cleared,1: The interrupt request for channel 7 is active"
|
|
eventfld.long 0x0 6. "INT6,Interrupt Request 6" "0: The interrupt request for channel 6 is cleared,1: The interrupt request for channel 6 is active"
|
|
newline
|
|
eventfld.long 0x0 5. "INT5,Interrupt Request 5" "0: The interrupt request for channel 5 is cleared,1: The interrupt request for channel 5 is active"
|
|
eventfld.long 0x0 4. "INT4,Interrupt Request 4" "0: The interrupt request for channel 4 is cleared,1: The interrupt request for channel 4 is active"
|
|
newline
|
|
eventfld.long 0x0 3. "INT3,Interrupt Request 3" "0: The interrupt request for channel 3 is cleared,1: The interrupt request for channel 3 is active"
|
|
eventfld.long 0x0 2. "INT2,Interrupt Request 2" "0: The interrupt request for channel 2 is cleared,1: The interrupt request for channel 2 is active"
|
|
newline
|
|
eventfld.long 0x0 1. "INT1,Interrupt Request 1" "0: The interrupt request for channel 1 is cleared,1: The interrupt request for channel 1 is active"
|
|
eventfld.long 0x0 0. "INT0,Interrupt Request 0" "0: The interrupt request for channel 0 is cleared,1: The interrupt request for channel 0 is active"
|
|
group.long 0x2C++0x3
|
|
line.long 0x0 "ERR,Error"
|
|
eventfld.long 0x0 15. "ERR15,Error In Channel 15" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 14. "ERR14,Error In Channel 14" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 13. "ERR13,Error In Channel 13" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 12. "ERR12,Error In Channel 12" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 11. "ERR11,Error In Channel 11" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 10. "ERR10,Error In Channel 10" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 9. "ERR9,Error In Channel 9" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 8. "ERR8,Error In Channel 8" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 7. "ERR7,Error In Channel 7" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 6. "ERR6,Error In Channel 6" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 5. "ERR5,Error In Channel 5" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 4. "ERR4,Error In Channel 4" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 3. "ERR3,Error In Channel 3" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 2. "ERR2,Error In Channel 2" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
newline
|
|
eventfld.long 0x0 1. "ERR1,Error In Channel 1" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
eventfld.long 0x0 0. "ERR0,Error In Channel 0" "0: No error in this channel has occurred,1: An error in this channel has occurred"
|
|
rgroup.long 0x34++0x3
|
|
line.long 0x0 "HRS,Hardware Request Status"
|
|
bitfld.long 0x0 15. "HRS15,Hardware Request Status Channel 15" "0: A hardware service request for channel 15 is not..,1: A hardware service request for channel 15 is.."
|
|
bitfld.long 0x0 14. "HRS14,Hardware Request Status Channel 14" "0: A hardware service request for channel 14 is not..,1: A hardware service request for channel 14 is.."
|
|
newline
|
|
bitfld.long 0x0 13. "HRS13,Hardware Request Status Channel 13" "0: A hardware service request for channel 13 is not..,1: A hardware service request for channel 13 is.."
|
|
bitfld.long 0x0 12. "HRS12,Hardware Request Status Channel 12" "0: A hardware service request for channel 12 is not..,1: A hardware service request for channel 12 is.."
|
|
newline
|
|
bitfld.long 0x0 11. "HRS11,Hardware Request Status Channel 11" "0: A hardware service request for channel 11 is not..,1: A hardware service request for channel 11 is.."
|
|
bitfld.long 0x0 10. "HRS10,Hardware Request Status Channel 10" "0: A hardware service request for channel 10 is not..,1: A hardware service request for channel 10 is.."
|
|
newline
|
|
bitfld.long 0x0 9. "HRS9,Hardware Request Status Channel 9" "0: A hardware service request for channel 9 is not..,1: A hardware service request for channel 9 is.."
|
|
bitfld.long 0x0 8. "HRS8,Hardware Request Status Channel 8" "0: A hardware service request for channel 8 is not..,1: A hardware service request for channel 8 is.."
|
|
newline
|
|
bitfld.long 0x0 7. "HRS7,Hardware Request Status Channel 7" "0: A hardware service request for channel 7 is not..,1: A hardware service request for channel 7 is.."
|
|
bitfld.long 0x0 6. "HRS6,Hardware Request Status Channel 6" "0: A hardware service request for channel 6 is not..,1: A hardware service request for channel 6 is.."
|
|
newline
|
|
bitfld.long 0x0 5. "HRS5,Hardware Request Status Channel 5" "0: A hardware service request for channel 5 is not..,1: A hardware service request for channel 5 is.."
|
|
bitfld.long 0x0 4. "HRS4,Hardware Request Status Channel 4" "0: A hardware service request for channel 4 is not..,1: A hardware service request for channel 4 is.."
|
|
newline
|
|
bitfld.long 0x0 3. "HRS3,Hardware Request Status Channel 3" "0: A hardware service request for channel 3 is not..,1: A hardware service request for channel 3 is.."
|
|
bitfld.long 0x0 2. "HRS2,Hardware Request Status Channel 2" "0: A hardware service request for channel 2 is not..,1: A hardware service request for channel 2 is.."
|
|
newline
|
|
bitfld.long 0x0 1. "HRS1,Hardware Request Status Channel 1" "0: A hardware service request for channel 1 is not..,1: A hardware service request for channel 1 is.."
|
|
bitfld.long 0x0 0. "HRS0,Hardware Request Status Channel 0" "0: A hardware service request for channel 0 is not..,1: A hardware service request for channel 0 is.."
|
|
group.long 0x44++0x3
|
|
line.long 0x0 "EARS,Enable Asynchronous Request in Stop"
|
|
bitfld.long 0x0 15. "EDREQ_15,Enable asynchronous DMA request in stop mode for channel 15." "0: Disable asynchronous DMA request for channel 15,1: Enable asynchronous DMA request for channel 15"
|
|
bitfld.long 0x0 14. "EDREQ_14,Enable asynchronous DMA request in stop mode for channel 14." "0: Disable asynchronous DMA request for channel 14,1: Enable asynchronous DMA request for channel 14"
|
|
newline
|
|
bitfld.long 0x0 13. "EDREQ_13,Enable asynchronous DMA request in stop mode for channel 13." "0: Disable asynchronous DMA request for channel 13,1: Enable asynchronous DMA request for channel 13"
|
|
bitfld.long 0x0 12. "EDREQ_12,Enable asynchronous DMA request in stop mode for channel 12." "0: Disable asynchronous DMA request for channel 12,1: Enable asynchronous DMA request for channel 12"
|
|
newline
|
|
bitfld.long 0x0 11. "EDREQ_11,Enable asynchronous DMA request in stop mode for channel 11." "0: Disable asynchronous DMA request for channel 11,1: Enable asynchronous DMA request for channel 11"
|
|
bitfld.long 0x0 10. "EDREQ_10,Enable asynchronous DMA request in stop mode for channel 10." "0: Disable asynchronous DMA request for channel 10,1: Enable asynchronous DMA request for channel 10"
|
|
newline
|
|
bitfld.long 0x0 9. "EDREQ_9,Enable asynchronous DMA request in stop mode for channel 9." "0: Disable asynchronous DMA request for channel 9,1: Enable asynchronous DMA request for channel 9"
|
|
bitfld.long 0x0 8. "EDREQ_8,Enable asynchronous DMA request in stop mode for channel 8." "0: Disable asynchronous DMA request for channel 8,1: Enable asynchronous DMA request for channel 8"
|
|
newline
|
|
bitfld.long 0x0 7. "EDREQ_7,Enable asynchronous DMA request in stop mode for channel 7." "0: Disable asynchronous DMA request for channel 7,1: Enable asynchronous DMA request for channel 7"
|
|
bitfld.long 0x0 6. "EDREQ_6,Enable asynchronous DMA request in stop mode for channel 6." "0: Disable asynchronous DMA request for channel 6,1: Enable asynchronous DMA request for channel 6"
|
|
newline
|
|
bitfld.long 0x0 5. "EDREQ_5,Enable asynchronous DMA request in stop mode for channel 5." "0: Disable asynchronous DMA request for channel 5,1: Enable asynchronous DMA request for channel 5"
|
|
bitfld.long 0x0 4. "EDREQ_4,Enable asynchronous DMA request in stop mode for channel 4." "0: Disable asynchronous DMA request for channel 4,1: Enable asynchronous DMA request for channel 4"
|
|
newline
|
|
bitfld.long 0x0 3. "EDREQ_3,Enable asynchronous DMA request in stop mode for channel 3." "0: Disable asynchronous DMA request for channel 3,1: Enable asynchronous DMA request for channel 3"
|
|
bitfld.long 0x0 2. "EDREQ_2,Enable asynchronous DMA request in stop mode for channel 2." "0: Disable asynchronous DMA request for channel 2,1: Enable asynchronous DMA request for channel 2"
|
|
newline
|
|
bitfld.long 0x0 1. "EDREQ_1,Enable asynchronous DMA request in stop mode for channel 1." "0: Disable asynchronous DMA request for channel 1,1: Enable asynchronous DMA request for channel 1"
|
|
bitfld.long 0x0 0. "EDREQ_0,Enable asynchronous DMA request in stop mode for channel 0." "0: Disable asynchronous DMA request for channel 0,1: Enable asynchronous DMA request for channel 0"
|
|
group.byte 0x100++0xF
|
|
line.byte 0x0 "DCHPRI3,Channel Priority"
|
|
bitfld.byte 0x0 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x0 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x0 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x1 "DCHPRI2,Channel Priority"
|
|
bitfld.byte 0x1 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x1 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x1 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x2 "DCHPRI1,Channel Priority"
|
|
bitfld.byte 0x2 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x2 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x2 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x3 "DCHPRI0,Channel Priority"
|
|
bitfld.byte 0x3 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x3 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x3 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x4 "DCHPRI7,Channel Priority"
|
|
bitfld.byte 0x4 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x4 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x4 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x5 "DCHPRI6,Channel Priority"
|
|
bitfld.byte 0x5 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x5 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x5 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x6 "DCHPRI5,Channel Priority"
|
|
bitfld.byte 0x6 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x6 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x6 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x7 "DCHPRI4,Channel Priority"
|
|
bitfld.byte 0x7 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x7 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x7 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x8 "DCHPRI11,Channel Priority"
|
|
bitfld.byte 0x8 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x8 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x8 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0x9 "DCHPRI10,Channel Priority"
|
|
bitfld.byte 0x9 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0x9 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0x9 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xA "DCHPRI9,Channel Priority"
|
|
bitfld.byte 0xA 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xA 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xA 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xB "DCHPRI8,Channel Priority"
|
|
bitfld.byte 0xB 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xB 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xB 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xC "DCHPRI15,Channel Priority"
|
|
bitfld.byte 0xC 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xC 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xC 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xD "DCHPRI14,Channel Priority"
|
|
bitfld.byte 0xD 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xD 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xD 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xE "DCHPRI13,Channel Priority"
|
|
bitfld.byte 0xE 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xE 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xE 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
line.byte 0xF "DCHPRI12,Channel Priority"
|
|
bitfld.byte 0xF 7. "ECP,Enable Channel Preemption. This field resets to 0." "0: Channel n cannot be suspended by a higher..,1: Channel n can be temporarily suspended by the.."
|
|
bitfld.byte 0xF 6. "DPA,Disable Preempt Ability. This field resets to 0." "0: Channel n can suspend a lower priority channel,1: Channel n cannot suspend any channel regardless.."
|
|
newline
|
|
hexmask.byte 0xF 0.--3. 1. "CHPRI,Channel n Arbitration Priority"
|
|
group.long 0x1000++0x3
|
|
line.long 0x0 "TCD0_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1004++0x3
|
|
line.word 0x0 "TCD0_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD0_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1008++0x3
|
|
line.long 0x0 "TCD0_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1008++0x3
|
|
line.long 0x0 "TCD0_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1008++0xB
|
|
line.long 0x0 "TCD0_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD0_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD0_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1014++0x3
|
|
line.word 0x0 "TCD0_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD0_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1016++0x1
|
|
line.word 0x0 "TCD0_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1018++0x3
|
|
line.long 0x0 "TCD0_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x101C++0x3
|
|
line.word 0x0 "TCD0_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD0_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x101E++0x1
|
|
line.word 0x0 "TCD0_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1020++0x3
|
|
line.long 0x0 "TCD1_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1024++0x3
|
|
line.word 0x0 "TCD1_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD1_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1028++0x3
|
|
line.long 0x0 "TCD1_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1028++0x3
|
|
line.long 0x0 "TCD1_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1028++0xB
|
|
line.long 0x0 "TCD1_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD1_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD1_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1034++0x3
|
|
line.word 0x0 "TCD1_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD1_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1036++0x1
|
|
line.word 0x0 "TCD1_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1038++0x3
|
|
line.long 0x0 "TCD1_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x103C++0x3
|
|
line.word 0x0 "TCD1_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD1_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x103E++0x1
|
|
line.word 0x0 "TCD1_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1040++0x3
|
|
line.long 0x0 "TCD2_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1044++0x3
|
|
line.word 0x0 "TCD2_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD2_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1048++0x3
|
|
line.long 0x0 "TCD2_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1048++0x3
|
|
line.long 0x0 "TCD2_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1048++0xB
|
|
line.long 0x0 "TCD2_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD2_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD2_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1054++0x3
|
|
line.word 0x0 "TCD2_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD2_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1056++0x1
|
|
line.word 0x0 "TCD2_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1058++0x3
|
|
line.long 0x0 "TCD2_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x105C++0x3
|
|
line.word 0x0 "TCD2_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD2_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x105E++0x1
|
|
line.word 0x0 "TCD2_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1060++0x3
|
|
line.long 0x0 "TCD3_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1064++0x3
|
|
line.word 0x0 "TCD3_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD3_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1068++0x3
|
|
line.long 0x0 "TCD3_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1068++0x3
|
|
line.long 0x0 "TCD3_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1068++0xB
|
|
line.long 0x0 "TCD3_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD3_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD3_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1074++0x3
|
|
line.word 0x0 "TCD3_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD3_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1076++0x1
|
|
line.word 0x0 "TCD3_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1078++0x3
|
|
line.long 0x0 "TCD3_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x107C++0x3
|
|
line.word 0x0 "TCD3_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD3_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x107E++0x1
|
|
line.word 0x0 "TCD3_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1080++0x3
|
|
line.long 0x0 "TCD4_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1084++0x3
|
|
line.word 0x0 "TCD4_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD4_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1088++0x3
|
|
line.long 0x0 "TCD4_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1088++0x3
|
|
line.long 0x0 "TCD4_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1088++0xB
|
|
line.long 0x0 "TCD4_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD4_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD4_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1094++0x3
|
|
line.word 0x0 "TCD4_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD4_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1096++0x1
|
|
line.word 0x0 "TCD4_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1098++0x3
|
|
line.long 0x0 "TCD4_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x109C++0x3
|
|
line.word 0x0 "TCD4_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD4_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x109E++0x1
|
|
line.word 0x0 "TCD4_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x10A0++0x3
|
|
line.long 0x0 "TCD5_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10A4++0x3
|
|
line.word 0x0 "TCD5_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD5_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10A8++0x3
|
|
line.long 0x0 "TCD5_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10A8++0x3
|
|
line.long 0x0 "TCD5_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10A8++0xB
|
|
line.long 0x0 "TCD5_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD5_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD5_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10B4++0x3
|
|
line.word 0x0 "TCD5_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD5_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10B6++0x1
|
|
line.word 0x0 "TCD5_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10B8++0x3
|
|
line.long 0x0 "TCD5_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x10BC++0x3
|
|
line.word 0x0 "TCD5_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD5_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x10BE++0x1
|
|
line.word 0x0 "TCD5_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x10C0++0x3
|
|
line.long 0x0 "TCD6_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10C4++0x3
|
|
line.word 0x0 "TCD6_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD6_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10C8++0x3
|
|
line.long 0x0 "TCD6_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10C8++0x3
|
|
line.long 0x0 "TCD6_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10C8++0xB
|
|
line.long 0x0 "TCD6_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD6_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD6_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10D4++0x3
|
|
line.word 0x0 "TCD6_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD6_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10D6++0x1
|
|
line.word 0x0 "TCD6_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10D8++0x3
|
|
line.long 0x0 "TCD6_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x10DC++0x3
|
|
line.word 0x0 "TCD6_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD6_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x10DE++0x1
|
|
line.word 0x0 "TCD6_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x10E0++0x3
|
|
line.long 0x0 "TCD7_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x10E4++0x3
|
|
line.word 0x0 "TCD7_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD7_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x10E8++0x3
|
|
line.long 0x0 "TCD7_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10E8++0x3
|
|
line.long 0x0 "TCD7_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x10E8++0xB
|
|
line.long 0x0 "TCD7_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD7_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD7_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x10F4++0x3
|
|
line.word 0x0 "TCD7_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD7_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x10F6++0x1
|
|
line.word 0x0 "TCD7_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x10F8++0x3
|
|
line.long 0x0 "TCD7_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x10FC++0x3
|
|
line.word 0x0 "TCD7_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD7_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x10FE++0x1
|
|
line.word 0x0 "TCD7_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1100++0x3
|
|
line.long 0x0 "TCD8_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1104++0x3
|
|
line.word 0x0 "TCD8_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD8_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1108++0x3
|
|
line.long 0x0 "TCD8_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1108++0x3
|
|
line.long 0x0 "TCD8_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1108++0xB
|
|
line.long 0x0 "TCD8_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD8_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD8_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1114++0x3
|
|
line.word 0x0 "TCD8_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD8_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1116++0x1
|
|
line.word 0x0 "TCD8_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1118++0x3
|
|
line.long 0x0 "TCD8_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x111C++0x3
|
|
line.word 0x0 "TCD8_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD8_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x111E++0x1
|
|
line.word 0x0 "TCD8_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1120++0x3
|
|
line.long 0x0 "TCD9_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1124++0x3
|
|
line.word 0x0 "TCD9_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD9_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1128++0x3
|
|
line.long 0x0 "TCD9_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1128++0x3
|
|
line.long 0x0 "TCD9_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1128++0xB
|
|
line.long 0x0 "TCD9_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD9_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD9_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1134++0x3
|
|
line.word 0x0 "TCD9_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD9_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1136++0x1
|
|
line.word 0x0 "TCD9_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1138++0x3
|
|
line.long 0x0 "TCD9_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x113C++0x3
|
|
line.word 0x0 "TCD9_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD9_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x113E++0x1
|
|
line.word 0x0 "TCD9_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1140++0x3
|
|
line.long 0x0 "TCD10_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1144++0x3
|
|
line.word 0x0 "TCD10_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD10_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1148++0x3
|
|
line.long 0x0 "TCD10_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1148++0x3
|
|
line.long 0x0 "TCD10_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1148++0xB
|
|
line.long 0x0 "TCD10_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD10_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD10_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1154++0x3
|
|
line.word 0x0 "TCD10_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD10_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1156++0x1
|
|
line.word 0x0 "TCD10_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1158++0x3
|
|
line.long 0x0 "TCD10_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x115C++0x3
|
|
line.word 0x0 "TCD10_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD10_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x115E++0x1
|
|
line.word 0x0 "TCD10_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1160++0x3
|
|
line.long 0x0 "TCD11_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1164++0x3
|
|
line.word 0x0 "TCD11_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD11_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1168++0x3
|
|
line.long 0x0 "TCD11_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1168++0x3
|
|
line.long 0x0 "TCD11_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1168++0xB
|
|
line.long 0x0 "TCD11_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD11_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD11_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1174++0x3
|
|
line.word 0x0 "TCD11_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD11_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1176++0x1
|
|
line.word 0x0 "TCD11_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1178++0x3
|
|
line.long 0x0 "TCD11_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x117C++0x3
|
|
line.word 0x0 "TCD11_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD11_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x117E++0x1
|
|
line.word 0x0 "TCD11_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x1180++0x3
|
|
line.long 0x0 "TCD12_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x1184++0x3
|
|
line.word 0x0 "TCD12_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD12_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x1188++0x3
|
|
line.long 0x0 "TCD12_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1188++0x3
|
|
line.long 0x0 "TCD12_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x1188++0xB
|
|
line.long 0x0 "TCD12_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD12_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD12_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x1194++0x3
|
|
line.word 0x0 "TCD12_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD12_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x1196++0x1
|
|
line.word 0x0 "TCD12_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x1198++0x3
|
|
line.long 0x0 "TCD12_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x119C++0x3
|
|
line.word 0x0 "TCD12_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD12_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x119E++0x1
|
|
line.word 0x0 "TCD12_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x11A0++0x3
|
|
line.long 0x0 "TCD13_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11A4++0x3
|
|
line.word 0x0 "TCD13_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD13_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11A8++0x3
|
|
line.long 0x0 "TCD13_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11A8++0x3
|
|
line.long 0x0 "TCD13_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11A8++0xB
|
|
line.long 0x0 "TCD13_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD13_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD13_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11B4++0x3
|
|
line.word 0x0 "TCD13_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD13_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11B6++0x1
|
|
line.word 0x0 "TCD13_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11B8++0x3
|
|
line.long 0x0 "TCD13_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x11BC++0x3
|
|
line.word 0x0 "TCD13_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD13_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x11BE++0x1
|
|
line.word 0x0 "TCD13_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x11C0++0x3
|
|
line.long 0x0 "TCD14_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11C4++0x3
|
|
line.word 0x0 "TCD14_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD14_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11C8++0x3
|
|
line.long 0x0 "TCD14_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11C8++0x3
|
|
line.long 0x0 "TCD14_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11C8++0xB
|
|
line.long 0x0 "TCD14_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD14_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD14_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11D4++0x3
|
|
line.word 0x0 "TCD14_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD14_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11D6++0x1
|
|
line.word 0x0 "TCD14_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11D8++0x3
|
|
line.long 0x0 "TCD14_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x11DC++0x3
|
|
line.word 0x0 "TCD14_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD14_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x11DE++0x1
|
|
line.word 0x0 "TCD14_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
group.long 0x11E0++0x3
|
|
line.long 0x0 "TCD15_SADDR,TCD Source Address"
|
|
hexmask.long 0x0 0.--31. 1. "SADDR,Source Address"
|
|
group.word 0x11E4++0x3
|
|
line.word 0x0 "TCD15_SOFF,TCD Signed Source Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "SOFF,Source address signed offset"
|
|
line.word 0x2 "TCD15_ATTR,TCD Transfer Attributes"
|
|
hexmask.word.byte 0x2 11.--15. 1. "SMOD,Source Address Modulo"
|
|
bitfld.word 0x2 8.--10. "SSIZE,Source data transfer size" "0: 8-bit,1: 16-bit,2: 32-bit,?,4: 16-byte burst,5: 32-byte burst,?,?"
|
|
newline
|
|
hexmask.word.byte 0x2 3.--7. 1. "DMOD,Destination Address Modulo"
|
|
bitfld.word 0x2 0.--2. "DSIZE,Destination data transfer size" "0,1,2,3,4,5,6,7"
|
|
group.long 0x11E8++0x3
|
|
line.long 0x0 "TCD15_NBYTES_MLNO,TCD Minor Byte Count (Minor Loop Mapping Disabled)"
|
|
hexmask.long 0x0 0.--31. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11E8++0x3
|
|
line.long 0x0 "TCD15_NBYTES_MLOFFNO,TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long 0x0 0.--29. 1. "NBYTES,Minor Byte Transfer Count"
|
|
group.long 0x11E8++0xB
|
|
line.long 0x0 "TCD15_NBYTES_MLOFFYES,TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled)"
|
|
bitfld.long 0x0 31. "SMLOE,Source Minor Loop Offset Enable" "0: The minor loop offset is not applied to the SADDR,1: The minor loop offset is applied to the SADDR"
|
|
bitfld.long 0x0 30. "DMLOE,Destination Minor Loop Offset Enable" "0: The minor loop offset is not applied to the DADDR,1: The minor loop offset is applied to the DADDR"
|
|
newline
|
|
hexmask.long.tbyte 0x0 10.--29. 1. "MLOFF,If SMLOE = 1 or DMLOE = 1 this field represents a sign-extended offset applied to the source or destination address to form the next-state value after the minor loop completes."
|
|
hexmask.long.word 0x0 0.--9. 1. "NBYTES,Minor Byte Transfer Count"
|
|
line.long 0x4 "TCD15_SLAST,TCD Last Source Address Adjustment"
|
|
hexmask.long 0x4 0.--31. 1. "SLAST,Last Source Address Adjustment"
|
|
line.long 0x8 "TCD15_DADDR,TCD Destination Address"
|
|
hexmask.long 0x8 0.--31. 1. "DADDR,Destination Address"
|
|
group.word 0x11F4++0x3
|
|
line.word 0x0 "TCD15_DOFF,TCD Signed Destination Address Offset"
|
|
hexmask.word 0x0 0.--15. 1. "DOFF,Destination Address Signed Offset"
|
|
line.word 0x2 "TCD15_CITER_ELINKNO,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "CITER,Current Major Iteration Count"
|
|
group.word 0x11F6++0x1
|
|
line.word 0x0 "TCD15_CITER_ELINKYES,TCD Current Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enable channel-to-channel linking on minor-loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Minor Loop Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "CITER,Current Major Iteration Count"
|
|
group.long 0x11F8++0x3
|
|
line.long 0x0 "TCD15_DLASTSGA,TCD Last Destination Address Adjustment/Scatter Gather Address"
|
|
hexmask.long 0x0 0.--31. 1. "DLASTSGA,Destination last address adjustment or next memory address TCD for channel (scatter/gather)"
|
|
group.word 0x11FC++0x3
|
|
line.word 0x0 "TCD15_CSR,TCD Control and Status"
|
|
bitfld.word 0x0 14.--15. "BWC,Bandwidth Control" "0: No eDMA engine stalls,?,2: eDMA engine stalls for 4 cycles after each R/W,3: eDMA engine stalls for 8 cycles after each R/W"
|
|
hexmask.word.byte 0x0 8.--11. 1. "MAJORLINKCH,Major Loop Link Channel Number"
|
|
newline
|
|
bitfld.word 0x0 7. "DONE,Channel Done" "0,1"
|
|
rbitfld.word 0x0 6. "ACTIVE,Channel Active" "0,1"
|
|
newline
|
|
bitfld.word 0x0 5. "MAJORELINK,Enable channel-to-channel linking on major loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
bitfld.word 0x0 4. "ESG,Enable Scatter/Gather Processing" "0: The current channel's TCD is normal format,1: The current channel's TCD specifies a scatter.."
|
|
newline
|
|
bitfld.word 0x0 3. "DREQ,Disable Request" "0: The channel's ERQ field is not affected,1: The channel's ERQ field value changes to 0 when.."
|
|
bitfld.word 0x0 2. "INTHALF,Enable an interrupt when major counter is half complete." "0: Half-point interrupt is disabled,1: Half-point interrupt is enabled"
|
|
newline
|
|
bitfld.word 0x0 1. "INTMAJOR,Enable an interrupt when major iteration count completes." "0: End of major loop interrupt is disabled,1: End of major loop interrupt is enabled"
|
|
bitfld.word 0x0 0. "START,Channel Start" "0: Channel is not explicitly started,1: Channel is explicitly started via a software.."
|
|
line.word 0x2 "TCD15_BITER_ELINKNO,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Disabled)"
|
|
bitfld.word 0x2 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word 0x2 0.--14. 1. "BITER,Starting Major Iteration Count"
|
|
group.word 0x11FE++0x1
|
|
line.word 0x0 "TCD15_BITER_ELINKYES,TCD Beginning Minor Loop Link. Major Loop Count (Channel Linking Enabled)"
|
|
bitfld.word 0x0 15. "ELINK,Enables channel-to-channel linking on minor loop complete" "0: Channel-to-channel linking is disabled,1: Channel-to-channel linking is enabled"
|
|
hexmask.word.byte 0x0 9.--12. 1. "LINKCH,Link Channel Number"
|
|
newline
|
|
hexmask.word 0x0 0.--8. 1. "BITER,Starting major iteration count"
|
|
tree.end
|
|
tree "DMAMUX (Direct Memory Access Multiplexer)"
|
|
base ad:0x40021000
|
|
repeat 16. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2)++0x0
|
|
line.byte 0x0 "CHCFG[$1],Channel Configuration register"
|
|
bitfld.byte 0x0 7. "ENBL,DMA Channel Enable" "0: DMA channel is disabled. This mode is primarily..,1: DMA channel is enabled"
|
|
bitfld.byte 0x0 6. "TRIG,DMA Channel Trigger Enable" "0: Triggering is disabled. If triggering is..,1: Triggering is enabled. If triggering is enabled.."
|
|
hexmask.byte 0x0 0.--5. 1. "SOURCE,DMA Channel Source (Slot)"
|
|
repeat.end
|
|
tree.end
|
|
tree "DPGA_AE (Digitally Programmable Gain Amplifier)"
|
|
base ad:0x140
|
|
group.byte 0x0++0x1
|
|
line.byte 0x0 "INTF,Interrupt Flags"
|
|
eventfld.byte 0x0 5. "BTCFGIF,BTCFG Interrupt Flag" "0: The parity check has been ok since the last..,1: A failure in the parity check was detected since.."
|
|
eventfld.byte 0x0 4. "AMPCFGIF,AMPCFG Interrupt Flag" "0: The parity check has been ok since the last..,1: A failure in the parity check was detected since.."
|
|
newline
|
|
eventfld.byte 0x0 1. "HDIF,High detect interrupt flag" "0: No high voltage condition has been detected..,1: A high voltage condition has been detected since.."
|
|
eventfld.byte 0x0 0. "LDIF,Low detect interrupt flag" "0: No low voltage condition has been detected since..,1: A low voltage condition has been detected since.."
|
|
line.byte 0x1 "INTEN,Interrupt enable"
|
|
bitfld.byte 0x1 5. "BTCFGIE,BTCFG interrupt enable" "0: The interrupt will not be created.,1: The interrupt will be created."
|
|
bitfld.byte 0x1 4. "AMPCFGIE,AMPCFG interrupt enable" "0: The interrupt will not be created.,1: The interrupt will be created."
|
|
newline
|
|
bitfld.byte 0x1 1. "HDIE,High detect interrupt enable" "0: The high detect interrupt flag INTF[HDIF] cannot..,1: The high detect interrupt flag INTF[HDIF] can.."
|
|
bitfld.byte 0x1 0. "LDIE,Low detect interrupt enable" "0: The low detect interrupt flag INTF[LDIF] cannot..,1: The low detect interrupt flag INTF[LDIF] can.."
|
|
rgroup.byte 0x2++0x0
|
|
line.byte 0x0 "STAT,Status"
|
|
bitfld.byte 0x0 5. "BTCFGS,BTCFG status" "0: The count of bits set to 1 in the register is..,1: The count of bits set to 1 in the register is odd."
|
|
bitfld.byte 0x0 4. "AMPCFGS,AMPCFG status" "0: The count of bits set to 1 in the register is..,1: The count of bits set to 1 in the register is odd."
|
|
newline
|
|
bitfld.byte 0x0 1. "HDS,High detect filtered status" "0: No high voltage condition is detected.,1: A high voltage condition is detected so the.."
|
|
bitfld.byte 0x0 0. "LDS,Low detect filtered status" "0: No low voltage condition is detected.,1: A low voltage condition is detected so the.."
|
|
group.byte 0x3++0x0
|
|
line.byte 0x0 "CTRL,Control"
|
|
bitfld.byte 0x0 7. "FSTEN,Functional Self-Test Enable" "0: The functional self-tests cannot be activated.,1: The functional self-tests can be activated."
|
|
bitfld.byte 0x0 5. "VDTEN,Voltage Detector Test Enable" "0: The high and low detectors are in functional mode.,1: If CTRL[FSTEN] is set the functional self-test.."
|
|
newline
|
|
bitfld.byte 0x0 4. "AMPTEN,Amplifier test enable" "0: The amplifier is in functional mode.,1: If CTRL[FSTEN] is set the functional self-test.."
|
|
bitfld.byte 0x0 3. "BIVDEN,Bipolar Voltage Detector Enable" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.byte 0x0 2. "CFGEN,Configuration Mode Enable" "0: The DPGA is in functional mode.,1: The DPGA is in configuration mode."
|
|
bitfld.byte 0x0 1. "VDEN,Voltage Detector Enable" "0: disabled,1: enabled"
|
|
newline
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: The DPGA is disabled all features are turned..,1: The DPGA is enabled all features are used as.."
|
|
group.long 0x4++0xB
|
|
line.long 0x0 "AMPCFG,Amplifier Configuration"
|
|
bitfld.long 0x0 28.--29. "OCMSEL,Output Common Mode Configuration" "0: reference voltage divided by 12,1: reference voltage divided by 6,2: reference voltage divided by 4,3: reference voltage divided by 2"
|
|
hexmask.long.byte 0x0 20.--23. 1. "OFFSEL,Offset compensation configuration"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "GAINSEL,Gain selection" "0: amplify by 8,1: amplify by 16,2: amplify by 24,3: amplify by 32,4: amplify by 40,5: amplify by 50,6: amplify by 65,7: amplify by 80"
|
|
bitfld.long 0x0 11. "IGND,Input Grounded" "0: Functional connection,1: Connection to ground"
|
|
newline
|
|
bitfld.long 0x0 8.--9. "ICMCSEL,Input Common Mode Coarse Configuration" "0: no common mode shift,1: common mode shift with 200 uA current out of..,2: common mode shift with 100 uA current out of..,3: common mode shift with 50 uA current out of both.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "ICMFSEL,Input Common Mode Fine Configuration"
|
|
line.long 0x4 "BTCFG,Blanking time configuration"
|
|
bitfld.long 0x4 26.--27. "SELTRG5,Select Trigger 5" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 24.--25. "SELTRG4,Select Trigger 4" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
bitfld.long 0x4 22.--23. "SELTRG3,Select Trigger 3" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 20.--21. "SELTRG2,Select Trigger 2" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
bitfld.long 0x4 18.--19. "SELTRG1,Select Trigger 1" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
bitfld.long 0x4 16.--17. "SELTRG0,Select Trigger 0" "0: The trigger n cannot start the blanking time..,1: The falling edge of the trigger n starts the..,2: The rising edge of the trigger n starts the..,3: Any edge of the trigger n starts the counting.."
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "BTDUR,Blanking time duration"
|
|
line.long 0x8 "VDCFG,Voltage Detector Configuration"
|
|
hexmask.long.word 0x8 20.--29. 1. "HDFDUR,High Detect Filter Duration"
|
|
hexmask.long.byte 0x8 16.--19. 1. "HDLIM,High Detect Limit"
|
|
newline
|
|
hexmask.long.word 0x8 4.--13. 1. "LDFDUR,Low Detect Filter Duration"
|
|
hexmask.long.byte 0x8 0.--3. 1. "LDLIM,Low Detect Limit"
|
|
tree.end
|
|
tree "EIM (Error Injection Module)"
|
|
base ad:0x40019000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "EIMCR,Error Injection Module Configuration Register"
|
|
bitfld.long 0x0 0. "GEIEN,Global Error Injection Enable" "0: Disabled,1: Enabled"
|
|
line.long 0x4 "EICHEN,Error Injection Channel Enable register"
|
|
bitfld.long 0x4 31. "EICH0EN,Error Injection Channel 0 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
bitfld.long 0x4 30. "EICH1EN,Error Injection Channel 1 Enable" "0: Error injection is disabled on Error Injection..,1: Error injection is enabled on Error Injection.."
|
|
group.long 0x100++0x7
|
|
line.long 0x0 "EICHD0_WORD0,Error Injection Channel Descriptor n. Word0"
|
|
hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD0_WORD1,Error Injection Channel Descriptor n. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
group.long 0x140++0x7
|
|
line.long 0x0 "EICHD1_WORD0,Error Injection Channel Descriptor n. Word0"
|
|
hexmask.long.byte 0x0 25.--31. 1. "CHKBIT_MASK,Checkbit Mask"
|
|
line.long 0x4 "EICHD1_WORD1,Error Injection Channel Descriptor n. Word1"
|
|
hexmask.long 0x4 0.--31. 1. "B0_3DATA_MASK,Data Mask Bytes 0-3"
|
|
tree.end
|
|
tree "ERM (Error Reporting Module)"
|
|
base ad:0x40018000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CR0,ERM Configuration Register 0"
|
|
bitfld.long 0x0 31. "ESCIE0,ESCIE0" "0: Interrupt notification of Memory 0 single-bit..,1: Interrupt notification of Memory 0 single-bit.."
|
|
bitfld.long 0x0 30. "ENCIE0,ENCIE0" "0: Interrupt notification of Memory 0..,1: Interrupt notification of Memory 0.."
|
|
newline
|
|
bitfld.long 0x0 27. "ESCIE1,ESCIE1" "0: Interrupt notification of Memory 1 single-bit..,1: Interrupt notification of Memory 1 single-bit.."
|
|
bitfld.long 0x0 26. "ENCIE1,ENCIE1" "0: Interrupt notification of Memory 1..,1: Interrupt notification of Memory 1.."
|
|
group.long 0x10++0x3
|
|
line.long 0x0 "SR0,ERM Status Register 0"
|
|
eventfld.long 0x0 31. "SBC0,SBC0" "0: No single-bit correction event on Memory 0..,1: Single-bit correction event on Memory 0 detected."
|
|
eventfld.long 0x0 30. "NCE0,NCE0" "0: No non-correctable error event on Memory 0..,1: Non-correctable error event on Memory 0 detected."
|
|
newline
|
|
eventfld.long 0x0 27. "SBC1,SBC1" "0: No single-bit correction event on Memory 1..,1: Single-bit correction event on Memory 1 detected."
|
|
eventfld.long 0x0 26. "NCE1,NCE1" "0: No non-correctable error event on Memory 1..,1: Non-correctable error event on Memory 1 detected."
|
|
rgroup.long 0x100++0x3
|
|
line.long 0x0 "EAR0,ERM Memory n Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
rgroup.long 0x110++0x3
|
|
line.long 0x0 "EAR1,ERM Memory n Error Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EAR,EAR"
|
|
tree.end
|
|
tree "EWM (Hardware Watchdog)"
|
|
base ad:0x40061000
|
|
group.byte 0x0++0x3
|
|
line.byte 0x0 "CTRL,Control Register"
|
|
bitfld.byte 0x0 3. "INTEN,Interrupt Enable." "0,1"
|
|
bitfld.byte 0x0 2. "INEN,Input Enable." "0,1"
|
|
bitfld.byte 0x0 1. "ASSIN,EWM_in's Assertion State Select." "0,1"
|
|
bitfld.byte 0x0 0. "EWMEN,EWM enable." "0,1"
|
|
line.byte 0x1 "SERV,Service Register"
|
|
hexmask.byte 0x1 0.--7. 1. "SERVICE,SERVICE"
|
|
line.byte 0x2 "CMPL,Compare Low Register"
|
|
hexmask.byte 0x2 0.--7. 1. "COMPAREL,COMPAREL"
|
|
line.byte 0x3 "CMPH,Compare High Register"
|
|
hexmask.byte 0x3 0.--7. 1. "COMPAREH,COMPAREH"
|
|
group.byte 0x5++0x0
|
|
line.byte 0x0 "CLKPRESCALER,Clock Prescaler Register"
|
|
hexmask.byte 0x0 0.--7. 1. "CLK_DIV,CLK_DIV"
|
|
tree.end
|
|
tree "FLEXCAN (Flexible CAN)"
|
|
base ad:0x40024000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "MCR,Module Configuration Register"
|
|
bitfld.long 0x0 31. "MDIS,Module Disable" "0: Enable the FlexCAN module.,1: Disable the FlexCAN module."
|
|
bitfld.long 0x0 30. "FRZ,Freeze Enable" "0: Not enabled to enter Freeze mode.,1: Enabled to enter Freeze mode."
|
|
newline
|
|
bitfld.long 0x0 29. "RFEN,Rx FIFO Enable" "0: Rx FIFO not enabled.,1: Rx FIFO enabled."
|
|
bitfld.long 0x0 28. "HALT,Halt FlexCAN" "0: No Freeze mode request.,1: Enters Freeze mode if the FRZ bit is asserted."
|
|
newline
|
|
rbitfld.long 0x0 27. "NOTRDY,FlexCAN Not Ready" "0: FlexCAN module is either in Normal mode..,1: FlexCAN module is either in Disable mode Stop.."
|
|
bitfld.long 0x0 25. "SOFTRST,Soft Reset" "0: No reset request.,1: Resets the registers affected by soft reset."
|
|
newline
|
|
rbitfld.long 0x0 24. "FRZACK,Freeze Mode Acknowledge" "0: FlexCAN not in Freeze mode prescaler running.,1: FlexCAN in Freeze mode prescaler stopped."
|
|
bitfld.long 0x0 23. "SUPV,Supervisor Mode" "0: FlexCAN is in User mode. Affected registers..,1: FlexCAN is in Supervisor mode. Affected.."
|
|
newline
|
|
bitfld.long 0x0 21. "WRNEN,Warning Interrupt Enable" "0: TWRNINT and RWRNINT bits are zero independent of..,1: TWRNINT and RWRNINT bits are set when the.."
|
|
rbitfld.long 0x0 20. "LPMACK,Low-Power Mode Acknowledge" "0: FlexCAN is not in a low-power mode.,1: FlexCAN is in a low-power mode."
|
|
newline
|
|
bitfld.long 0x0 17. "SRXDIS,Self Reception Disable" "0: Self-reception enabled.,1: Self-reception disabled."
|
|
bitfld.long 0x0 16. "IRMQ,Individual Rx Masking And Queue Enable" "0: Individual Rx masking and queue feature are..,1: Individual Rx masking and queue feature are.."
|
|
newline
|
|
bitfld.long 0x0 15. "DMA,DMA Enable" "0: DMA feature for RX FIFO disabled.,1: DMA feature for RX FIFO enabled."
|
|
bitfld.long 0x0 14. "PNET_EN,Pretended Networking Enable" "0: Pretended Networking mode is disabled.,1: Pretended Networking mode is enabled."
|
|
newline
|
|
bitfld.long 0x0 13. "LPRIOEN,Local Priority Enable" "0: Local Priority disabled.,1: Local Priority enabled."
|
|
bitfld.long 0x0 12. "AEN,Abort Enable" "0: Abort disabled.,1: Abort enabled."
|
|
newline
|
|
bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0: CAN FD is disabled. FlexCAN is able to receive..,1: CAN FD is enabled. FlexCAN is able to receive.."
|
|
bitfld.long 0x0 8.--9. "IDAM,ID Acceptance Mode" "0: Format A: One full ID (standard and extended)..,1: Format B: Two full standard IDs or two partial..,2: Format C: Four partial 8-bit standard IDs per ID..,3: Format D: All frames rejected."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--6. 1. "MAXMB,Number Of The Last Message Buffer"
|
|
line.long 0x4 "CTRL1,Control 1 Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "PRESDIV,Prescaler Division Factor"
|
|
bitfld.long 0x4 22.--23. "RJW,Resync Jump Width" "0,1,2,3"
|
|
newline
|
|
bitfld.long 0x4 19.--21. "PSEG1,Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 16.--18. "PSEG2,Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15. "BOFFMSK,Bus Off Interrupt Mask" "0: Bus Off interrupt disabled.,1: Bus Off interrupt enabled."
|
|
bitfld.long 0x4 14. "ERRMSK,Error Interrupt Mask" "0: Error interrupt disabled.,1: Error interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 13. "CLKSRC,CAN Engine Clock Source" "0: The CAN engine clock source is the oscillator..,1: The CAN engine clock source is the peripheral.."
|
|
bitfld.long 0x4 12. "LPB,Loop Back Mode" "0: Loop Back disabled.,1: Loop Back enabled."
|
|
newline
|
|
bitfld.long 0x4 11. "TWRNMSK,Tx Warning Interrupt Mask" "0: Tx Warning interrupt disabled.,1: Tx Warning interrupt enabled."
|
|
bitfld.long 0x4 10. "RWRNMSK,Rx Warning Interrupt Mask" "0: Rx Warning interrupt disabled.,1: Rx Warning interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 7. "SMP,CAN Bit Sampling" "0: Just one sample is used to determine the bit..,1: Three samples are used to determine the value of.."
|
|
bitfld.long 0x4 6. "BOFFREC,Bus Off Recovery" "0: Automatic recovering from Bus Off state enabled.,1: Automatic recovering from Bus Off state disabled."
|
|
newline
|
|
bitfld.long 0x4 5. "TSYN,Timer Sync" "0: Timer sync feature disabled,1: Timer sync feature enabled"
|
|
bitfld.long 0x4 4. "LBUF,Lowest Buffer Transmitted First" "0: Buffer with highest priority is transmitted first.,1: Lowest number buffer is transmitted first."
|
|
newline
|
|
bitfld.long 0x4 3. "LOM,Listen-Only Mode" "0: Listen-Only mode is deactivated.,1: FlexCAN module operates in Listen-Only mode."
|
|
bitfld.long 0x4 0.--2. "PROPSEG,Propagation Segment" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "TIMER,Free Running Timer"
|
|
hexmask.long.word 0x8 0.--15. 1. "TIMER,Timer Value"
|
|
group.long 0x10++0x27
|
|
line.long 0x0 "RXMGMASK,Rx Mailboxes Global Mask Register"
|
|
hexmask.long 0x0 0.--31. 1. "MG,Rx Mailboxes Global Mask Bits"
|
|
line.long 0x4 "RX14MASK,Rx 14 Mask Register"
|
|
hexmask.long 0x4 0.--31. 1. "RX14M,Rx Buffer 14 Mask Bits"
|
|
line.long 0x8 "RX15MASK,Rx 15 Mask Register"
|
|
hexmask.long 0x8 0.--31. 1. "RX15M,Rx Buffer 15 Mask Bits"
|
|
line.long 0xC "ECR,Error Counter"
|
|
hexmask.long.byte 0xC 24.--31. 1. "RXERRCNT_FAST,Receive Error Counter for fast bits"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TXERRCNT_FAST,Transmit Error Counter for fast bits"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "RXERRCNT,Receive Error Counter"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TXERRCNT,Transmit Error Counter"
|
|
line.long 0x10 "ESR1,Error and Status 1 Register"
|
|
rbitfld.long 0x10 31. "BIT1ERR_FAST,Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
rbitfld.long 0x10 30. "BIT0ERR_FAST,Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
newline
|
|
rbitfld.long 0x10 28. "CRCERR_FAST,Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 27. "FRMERR_FAST,Form Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A form error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 26. "STFERR_FAST,Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
|
|
eventfld.long 0x10 21. "ERROVR,Error Overrun" "0: Overrun has not occurred.,1: Overrun has occurred."
|
|
newline
|
|
eventfld.long 0x10 20. "ERRINT_FAST,Error interrupt for errors detected in Data Phase of CAN FD frames with BRS bit set" "0: No such occurrence.,1: Indicates setting of any error bit detected in.."
|
|
eventfld.long 0x10 19. "BOFFDONEINT,Bus Off Done Interrupt" "0: No such occurrence.,1: FlexCAN module has completed Bus Off process."
|
|
newline
|
|
rbitfld.long 0x10 18. "SYNCH,CAN Synchronization Status" "0: FlexCAN is not synchronized to the CAN bus.,1: FlexCAN is synchronized to the CAN bus."
|
|
eventfld.long 0x10 17. "TWRNINT,Tx Warning Interrupt Flag" "0: No such occurrence.,1: The Tx error counter transitioned from less than.."
|
|
newline
|
|
eventfld.long 0x10 16. "RWRNINT,Rx Warning Interrupt Flag" "0: No such occurrence.,1: The Rx error counter transitioned from less than.."
|
|
rbitfld.long 0x10 15. "BIT1ERR,Bit1 Error" "0: No such occurrence.,1: At least one bit sent as recessive is received.."
|
|
newline
|
|
rbitfld.long 0x10 14. "BIT0ERR,Bit0 Error" "0: No such occurrence.,1: At least one bit sent as dominant is received as.."
|
|
rbitfld.long 0x10 13. "ACKERR,Acknowledge Error" "0: No such occurrence.,1: An ACK error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 12. "CRCERR,Cyclic Redundancy Check Error" "0: No such occurrence.,1: A CRC error occurred since last read of this.."
|
|
rbitfld.long 0x10 11. "FRMERR,Form Error" "0: No such occurrence.,1: A Form Error occurred since last read of this.."
|
|
newline
|
|
rbitfld.long 0x10 10. "STFERR,Stuffing Error" "0: No such occurrence.,1: A stuffing error occurred since last read of.."
|
|
rbitfld.long 0x10 9. "TXWRN,TX Error Warning" "0: No such occurrence.,1: TXERRCNT is greater than or equal to 96."
|
|
newline
|
|
rbitfld.long 0x10 8. "RXWRN,Rx Error Warning" "0: No such occurrence.,1: RXERRCNT is greater than or equal to 96."
|
|
rbitfld.long 0x10 7. "IDLE,IDLE" "0: No such occurrence.,1: CAN bus is now IDLE."
|
|
newline
|
|
rbitfld.long 0x10 6. "TX,FlexCAN In Transmission" "0: FlexCAN is not transmitting a message.,1: FlexCAN is transmitting a message."
|
|
rbitfld.long 0x10 4.--5. "FLTCONF,Fault Confinement State" "0: Bus Off,1: Error Passive,2: Bus Off,3: Bus Off"
|
|
newline
|
|
rbitfld.long 0x10 3. "RX,FlexCAN In Reception" "0: FlexCAN is not receiving a message.,1: FlexCAN is receiving a message."
|
|
eventfld.long 0x10 2. "BOFFINT,Bus Off Interrupt" "0: No such occurrence.,1: FlexCAN module entered Bus Off state."
|
|
newline
|
|
eventfld.long 0x10 1. "ERRINT,Error Interrupt" "0: No such occurrence.,1: Indicates setting of any error bit in the Error.."
|
|
line.long 0x14 "IMASK2,Interrupt Masks 2 Register"
|
|
hexmask.long 0x14 0.--31. 1. "BUF63TO32M,Buffer MBi Mask"
|
|
line.long 0x18 "IMASK1,Interrupt Masks 1 Register"
|
|
hexmask.long 0x18 0.--31. 1. "BUF31TO0M,Buffer MBi Mask"
|
|
line.long 0x1C "IFLAG2,Interrupt Flags 2 Register"
|
|
hexmask.long 0x1C 0.--31. 1. "BUF63TO32I,Buffer MBi Interrupt"
|
|
line.long 0x20 "IFLAG1,Interrupt Flags 1 Register"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "BUF31TO8I,Buffer MBi Interrupt"
|
|
eventfld.long 0x20 7. "BUF7I,Buffer MB7 Interrupt Or Rx FIFO Overflow" "0: No occurrence of MB7 completing..,1: MB7 completed transmission/reception when.."
|
|
newline
|
|
eventfld.long 0x20 6. "BUF6I,Buffer MB6 Interrupt Or Rx FIFO Warning" "0: No occurrence of MB6 completing..,1: MB6 completed transmission/reception when.."
|
|
eventfld.long 0x20 5. "BUF5I,Buffer MB5 Interrupt Or Frames available in Rx FIFO" "0: No occurrence of MB5 completing..,1: MB5 completed transmission/reception when.."
|
|
newline
|
|
hexmask.long.byte 0x20 1.--4. 1. "BUF4TO1I,Buffer MBi Interrupt Or Reserved"
|
|
eventfld.long 0x20 0. "BUF0I,Buffer MB0 Interrupt Or Clear FIFO bit" "0: The corresponding buffer has no occurrence of..,1: The corresponding buffer has successfully.."
|
|
line.long 0x24 "CTRL2,Control 2 Register"
|
|
bitfld.long 0x24 31. "ERRMSK_FAST,Error Interrupt Mask for errors detected in the data phase of fast CAN FD frames" "0: ERRINT_FAST error interrupt disabled.,1: ERRINT_FAST error interrupt enabled."
|
|
bitfld.long 0x24 30. "BOFFDONEMSK,Bus Off Done Interrupt Mask" "0: Bus off done interrupt disabled.,1: Bus off done interrupt enabled."
|
|
newline
|
|
hexmask.long.byte 0x24 24.--27. 1. "RFFN,Number Of Rx FIFO Filters"
|
|
hexmask.long.byte 0x24 19.--23. 1. "TASD,Tx Arbitration Start Delay"
|
|
newline
|
|
bitfld.long 0x24 18. "MRP,Mailboxes Reception Priority" "0: Matching starts from Rx FIFO and continues on..,1: Matching starts from mailboxes and continues on.."
|
|
bitfld.long 0x24 17. "RRS,Remote Request Storing" "0: Remote response frame is generated.,1: Remote request frame is stored."
|
|
newline
|
|
bitfld.long 0x24 16. "EACEN,Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes" "0: Rx mailbox filter's IDE bit is always compared..,1: Enables the comparison of both Rx mailbox.."
|
|
bitfld.long 0x24 15. "TIMER_SRC,Timer Source" "0: The free running timer is clocked by the CAN bit..,1: The free running timer is clocked by an external.."
|
|
newline
|
|
bitfld.long 0x24 14. "PREXCEN,Protocol Exception Enable" "0: Protocol exception is disabled.,1: Protocol exception is enabled."
|
|
bitfld.long 0x24 12. "ISOCANFDEN,ISO CAN FD Enable" "0: FlexCAN operates using the non-ISO CAN FD..,1: FlexCAN operates using the ISO CAN FD protocol.."
|
|
newline
|
|
bitfld.long 0x24 11. "EDFLTDIS,Edge Filter Disable" "0: Edge filter is enabled,1: Edge filter is disabled"
|
|
rgroup.long 0x38++0x3
|
|
line.long 0x0 "ESR2,Error and Status 2 Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "LPTM,Lowest Priority Tx Mailbox"
|
|
bitfld.long 0x0 14. "VPS,Valid Priority Status" "0: Contents of IMB and LPTM are invalid.,1: Contents of IMB and LPTM are valid."
|
|
newline
|
|
bitfld.long 0x0 13. "IMB,Inactive Mailbox" "0: If ESR2[VPS] is asserted the ESR2[LPTM] is not..,1: If ESR2[VPS] is asserted there is at least one.."
|
|
rgroup.long 0x44++0x3
|
|
line.long 0x0 "CRCR,CRC Register"
|
|
hexmask.long.byte 0x0 16.--22. 1. "MBCRC,CRC Mailbox"
|
|
hexmask.long.word 0x0 0.--14. 1. "TXCRC,Transmitted CRC value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "RXFGMASK,Rx FIFO Global Mask Register"
|
|
hexmask.long 0x0 0.--31. 1. "FGM,Rx FIFO Global Mask Bits"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "RXFIR,Rx FIFO Information Register"
|
|
hexmask.long.word 0x0 0.--8. 1. "IDHIT,Identifier Acceptance Filter Hit Indicator"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "CBT,CAN Bit Timing Register"
|
|
bitfld.long 0x0 31. "BTF,Bit Timing Format Enable" "0: Extended bit time definitions disabled.,1: Extended bit time definitions enabled."
|
|
hexmask.long.word 0x0 21.--30. 1. "EPRESDIV,Extended Prescaler Division Factor"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--20. 1. "ERJW,Extended Resync Jump Width"
|
|
hexmask.long.byte 0x0 10.--15. 1. "EPROPSEG,Extended Propagation Segment"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "EPSEG1,Extended Phase Segment 1"
|
|
hexmask.long.byte 0x0 0.--4. 1. "EPSEG2,Extended Phase Segment 2"
|
|
repeat 128. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "RAMn[$1],Embedded RAM"
|
|
hexmask.long.byte 0x0 24.--31. 1. "DATA_BYTE_0,Data byte 0 of Rx/Tx frame."
|
|
hexmask.long.byte 0x0 16.--23. 1. "DATA_BYTE_1,Data byte 1 of Rx/Tx frame."
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DATA_BYTE_2,Data byte 2 of Rx/Tx frame."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA_BYTE_3,Data byte 3 of Rx/Tx frame."
|
|
repeat.end
|
|
repeat 64. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x880)++0x3
|
|
line.long 0x0 "RXIMR[$1],Rx Individual Mask Registers"
|
|
hexmask.long 0x0 0.--31. 1. "MI,Individual Mask Bits"
|
|
repeat.end
|
|
group.long 0xB00++0x27
|
|
line.long 0x0 "CTRL1_PN,Pretended Networking Control 1 Register"
|
|
bitfld.long 0x0 17. "WTOF_MSK,Wake Up by Timeout Flag Mask Bit" "0: Timeout wakeup event is disabled,1: Timeout wakeup event is enabled"
|
|
bitfld.long 0x0 16. "WUMF_MSK,Wake Up by Match Flag Mask Bit" "0: Wakeup match event is disabled,1: Wakeup match event is enabled"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "NMATCH,Number of Messages Matching the Same Filtering Criteria"
|
|
bitfld.long 0x0 4.--5. "PLFS,Payload Filtering Selection" "0: Match upon a payload contents against an exact..,1: Match upon a payload value greater than or equal..,2: Match upon a payload value smaller than or equal..,3: Match upon a payload value inside a range.."
|
|
newline
|
|
bitfld.long 0x0 2.--3. "IDFS,ID Filtering Selection" "0: Match upon ID contents against an exact target..,1: Match upon an ID value greater than or equal to..,2: Match upon an ID value smaller than or equal to..,3: Match upon an ID value inside a range greater.."
|
|
bitfld.long 0x0 0.--1. "FCS,Filtering Combination Selection" "0: Message ID filtering only,1: Message ID filtering and payload filtering,2: Message ID filtering occurring a specified..,3: Message ID filtering and payload filtering a.."
|
|
line.long 0x4 "CTRL2_PN,Pretended Networking Control 2 Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "MATCHTO,Timeout for No Message Matching the Filtering Criteria"
|
|
line.long 0x8 "WU_MTC,Pretended Networking Wake Up Match Register"
|
|
eventfld.long 0x8 17. "WTOF,Wake Up by Timeout Flag Bit" "0: No wakeup by timeout event detected,1: Wakeup by timeout event detected"
|
|
eventfld.long 0x8 16. "WUMF,Wake Up by Match Flag Bit" "0: No wakeup by match event detected,1: Wakeup by match event detected"
|
|
newline
|
|
hexmask.long.byte 0x8 8.--15. 1. "MCOUNTER,Number of Matches when in Pretended Networking"
|
|
line.long 0xC "FLT_ID1,Pretended Networking ID Filter 1 Register"
|
|
bitfld.long 0xC 30. "FLT_IDE,ID Extended Filter" "0: Accept standard frame format,1: Accept extended frame format"
|
|
bitfld.long 0xC 29. "FLT_RTR,Remote Transmission Request Filter" "0: Reject remote frame (accept data frame),1: Accept remote frame"
|
|
newline
|
|
hexmask.long 0xC 0.--28. 1. "FLT_ID1,ID Filter 1 for Pretended Networking filtering"
|
|
line.long 0x10 "FLT_DLC,Pretended Networking DLC Filter Register"
|
|
hexmask.long.byte 0x10 16.--19. 1. "FLT_DLC_LO,Lower Limit for Length of Data Bytes Filter"
|
|
hexmask.long.byte 0x10 0.--3. 1. "FLT_DLC_HI,Upper Limit for Length of Data Bytes Filter"
|
|
line.long 0x14 "PL1_LO,Pretended Networking Payload Low Filter 1 Register"
|
|
hexmask.long.byte 0x14 24.--31. 1. "Data_byte_0,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to data byte 0."
|
|
hexmask.long.byte 0x14 16.--23. 1. "Data_byte_1,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to data byte 1."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--15. 1. "Data_byte_2,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to data byte 2."
|
|
hexmask.long.byte 0x14 0.--7. 1. "Data_byte_3,Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to data byte 3."
|
|
line.long 0x18 "PL1_HI,Pretended Networking Payload High Filter 1 Register"
|
|
hexmask.long.byte 0x18 24.--31. 1. "Data_byte_4,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to data byte 4."
|
|
hexmask.long.byte 0x18 16.--23. 1. "Data_byte_5,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to data byte 5."
|
|
newline
|
|
hexmask.long.byte 0x18 8.--15. 1. "Data_byte_6,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to data byte 6."
|
|
hexmask.long.byte 0x18 0.--7. 1. "Data_byte_7,Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to data byte 7."
|
|
line.long 0x1C "FLT_ID2_IDMASK,Pretended Networking ID Filter 2 Register / ID Mask Register"
|
|
bitfld.long 0x1C 30. "IDE_MSK,ID Extended Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked"
|
|
bitfld.long 0x1C 29. "RTR_MSK,Remote Transmission Request Mask Bit" "0: The corresponding bit in the filter is 'don't..,1: The corresponding bit in the filter is checked"
|
|
newline
|
|
hexmask.long 0x1C 0.--28. 1. "FLT_ID2_IDMASK,ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"
|
|
line.long 0x20 "PL2_PLMASK_LO,Pretended Networking Payload Low Filter 2 Register / Payload Low Mask register"
|
|
hexmask.long.byte 0x20 24.--31. 1. "Data_byte_0,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."
|
|
hexmask.long.byte 0x20 16.--23. 1. "Data_byte_1,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."
|
|
newline
|
|
hexmask.long.byte 0x20 8.--15. 1. "Data_byte_2,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."
|
|
hexmask.long.byte 0x20 0.--7. 1. "Data_byte_3,Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."
|
|
line.long 0x24 "PL2_PLMASK_HI,Pretended Networking Payload High Filter 2 low order bits / Payload High Mask register"
|
|
hexmask.long.byte 0x24 24.--31. 1. "Data_byte_4,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."
|
|
hexmask.long.byte 0x24 16.--23. 1. "Data_byte_5,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."
|
|
newline
|
|
hexmask.long.byte 0x24 8.--15. 1. "Data_byte_6,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."
|
|
hexmask.long.byte 0x24 0.--7. 1. "Data_byte_7,Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40024B40 ad:0x40024B50 ad:0x40024B60 ad:0x40024B70)
|
|
tree "WMB[$1]"
|
|
base $2
|
|
rgroup.long ($2)++0xF
|
|
line.long 0x0 "WMB_CS,Wake Up Message Buffer register for C/S"
|
|
bitfld.long 0x0 22. "SRR,Substitute Remote Request" "0,1"
|
|
bitfld.long 0x0 21. "IDE,ID Extended Bit" "0: Frame format is standard,1: Frame format is extended"
|
|
bitfld.long 0x0 20. "RTR,Remote Transmission Request Bit" "0: Frame is data one (not remote),1: Frame is a remote one"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DLC,Length of Data in Bytes"
|
|
line.long 0x4 "WMB_ID,Wake Up Message Buffer Register for ID"
|
|
hexmask.long 0x4 0.--28. 1. "ID,Received ID under Pretended Networking mode"
|
|
line.long 0x8 "WMB_D03,Wake Up Message Buffer Register for Data 0-3"
|
|
hexmask.long.byte 0x8 24.--31. 1. "Data_byte_0,Received payload corresponding to the data byte 0 under Pretended Networking mode"
|
|
hexmask.long.byte 0x8 16.--23. 1. "Data_byte_1,Received payload corresponding to the data byte 1 under Pretended Networking mode"
|
|
hexmask.long.byte 0x8 8.--15. 1. "Data_byte_2,Received payload corresponding to the data byte 2 under Pretended Networking mode"
|
|
hexmask.long.byte 0x8 0.--7. 1. "Data_byte_3,Received payload corresponding to the data byte 3 under Pretended Networking mode"
|
|
line.long 0xC "WMB_D47,Wake Up Message Buffer Register Data 4-7"
|
|
hexmask.long.byte 0xC 24.--31. 1. "Data_byte_4,Received payload corresponding to the data byte 4 under Pretended Networking mode"
|
|
hexmask.long.byte 0xC 16.--23. 1. "Data_byte_5,Received payload corresponding to the data byte 5 under Pretended Networking mode"
|
|
hexmask.long.byte 0xC 8.--15. 1. "Data_byte_6,Received payload corresponding to the data byte 6 under Pretended Networking mode"
|
|
hexmask.long.byte 0xC 0.--7. 1. "Data_byte_7,Received payload corresponding to the data byte 7 under Pretended Networking mode"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40024000
|
|
group.long 0xC00++0x7
|
|
line.long 0x0 "FDCTRL,CAN FD Control Register"
|
|
bitfld.long 0x0 31. "FDRATE,Bit Rate Switch Enable" "0: Transmit a frame in nominal rate. The BRS bit in..,1: Transmit a frame with bit rate switching if the.."
|
|
bitfld.long 0x0 19.--20. "MBDSR1,Message Buffer Data Size for Region 1" "0: Selects 8 bytes per message buffer.,1: Selects 16 bytes per message buffer.,2: Selects 32 bytes per message buffer.,3: Selects 64 bytes per message buffer."
|
|
newline
|
|
bitfld.long 0x0 16.--17. "MBDSR0,Message Buffer Data Size for Region 0" "0: Selects 8 bytes per message buffer.,1: Selects 16 bytes per message buffer.,2: Selects 32 bytes per message buffer.,3: Selects 64 bytes per message buffer."
|
|
bitfld.long 0x0 15. "TDCEN,Transceiver Delay Compensation Enable" "0: TDC is disabled,1: TDC is enabled"
|
|
newline
|
|
eventfld.long 0x0 14. "TDCFAIL,Transceiver Delay Compensation Fail" "0: Measured loop delay is in range.,1: Measured loop delay is out of range."
|
|
hexmask.long.byte 0x0 8.--12. 1. "TDCOFF,Transceiver Delay Compensation Offset"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "TDCVAL,Transceiver Delay Compensation Value"
|
|
line.long 0x4 "FDCBT,CAN FD Bit Timing Register"
|
|
hexmask.long.word 0x4 20.--29. 1. "FPRESDIV,Fast Prescaler Division Factor"
|
|
bitfld.long 0x4 16.--18. "FRJW,Fast Resync Jump Width" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
hexmask.long.byte 0x4 10.--14. 1. "FPROPSEG,Fast Propagation Segment"
|
|
bitfld.long 0x4 5.--7. "FPSEG1,Fast Phase Segment 1" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 0.--2. "FPSEG2,Fast Phase Segment 2" "0,1,2,3,4,5,6,7"
|
|
rgroup.long 0xC08++0x3
|
|
line.long 0x0 "FDCRC,CAN FD CRC Register"
|
|
hexmask.long.byte 0x0 24.--30. 1. "FD_MBCRC,CRC Mailbox Number for FD_TXCRC"
|
|
hexmask.long.tbyte 0x0 0.--20. 1. "FD_TXCRC,Extended Transmitted CRC value"
|
|
tree.end
|
|
tree "FLEXIO (Flexible I/O)"
|
|
base ad:0x4005A000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 24.--31. 1. "TRIGGER,Trigger Number"
|
|
hexmask.long.byte 0x4 16.--23. 1. "PIN,Pin Number"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--15. 1. "TIMER,Timer Number"
|
|
hexmask.long.byte 0x4 0.--7. 1. "SHIFTER,Shifter Number"
|
|
group.long 0x8++0x3
|
|
line.long 0x0 "CTRL,FlexIO Control Register"
|
|
bitfld.long 0x0 31. "DOZEN,Doze Enable" "0: FlexIO enabled in Doze modes.,1: FlexIO disabled in Doze modes."
|
|
bitfld.long 0x0 30. "DBGE,Debug Enable" "0: FlexIO is disabled in debug modes.,1: FlexIO is enabled in debug modes"
|
|
newline
|
|
bitfld.long 0x0 2. "FASTACC,Fast Access" "0: Configures for normal register accesses to FlexIO,1: Configures for fast register accesses to FlexIO"
|
|
bitfld.long 0x0 1. "SWRST,Software Reset" "0: Software reset is disabled,1: Software reset is enabled all FlexIO registers.."
|
|
newline
|
|
bitfld.long 0x0 0. "FLEXEN,FlexIO Enable" "0: FlexIO module is disabled.,1: FlexIO module is enabled."
|
|
rgroup.long 0xC++0x3
|
|
line.long 0x0 "PIN,Pin State Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PDI,Pin Data Input"
|
|
group.long 0x10++0xB
|
|
line.long 0x0 "SHIFTSTAT,Shifter Status Register"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSF,Shifter Status Flag"
|
|
line.long 0x4 "SHIFTERR,Shifter Error Register"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SEF,Shifter Error Flags"
|
|
line.long 0x8 "TIMSTAT,Timer Status Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TSF,Timer Status Flags"
|
|
group.long 0x20++0xB
|
|
line.long 0x0 "SHIFTSIEN,Shifter Status Interrupt Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSIE,Shifter Status Interrupt Enable"
|
|
line.long 0x4 "SHIFTEIEN,Shifter Error Interrupt Enable"
|
|
hexmask.long.byte 0x4 0.--3. 1. "SEIE,Shifter Error Interrupt Enable"
|
|
line.long 0x8 "TIMIEN,Timer Interrupt Enable Register"
|
|
hexmask.long.byte 0x8 0.--3. 1. "TEIE,Timer Status Interrupt Enable"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "SHIFTSDEN,Shifter Status DMA Enable"
|
|
hexmask.long.byte 0x0 0.--3. 1. "SSDE,Shifter Status DMA Enable"
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x80)++0x3
|
|
line.long 0x0 "SHIFTCTL[$1],Shifter Control N Register"
|
|
bitfld.long 0x0 24.--25. "TIMSEL,Timer Select" "0,1,2,3"
|
|
bitfld.long 0x0 23. "TIMPOL,Timer Polarity" "0: Shift on posedge of Shift clock,1: Shift on negedge of Shift clock"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "PINCFG,Shifter Pin Configuration" "0: Shifter pin output disabled,1: Shifter pin open drain or bidirectional output..,2: Shifter pin bidirectional output data,3: Shifter pin output"
|
|
bitfld.long 0x0 8.--10. "PINSEL,Shifter Pin Select" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 7. "PINPOL,Shifter Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
bitfld.long 0x0 0.--2. "SMOD,Shifter Mode" "0: Disabled.,1: Receive mode. Captures the current Shifter..,2: Transmit mode. Load SHIFTBUF contents into the..,?,4: Match Store mode. Shifter data is compared to..,5: Match Continuous mode. Shifter data is..,?,?"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x100)++0x3
|
|
line.long 0x0 "SHIFTCFG[$1],Shifter Configuration N Register"
|
|
bitfld.long 0x0 8. "INSRC,Input Source" "0: Pin,1: Shifter N+1 Output"
|
|
bitfld.long 0x0 4.--5. "SSTOP,Shifter Stop bit" "0: Stop bit disabled for transmitter/receiver/match..,?,2: Transmitter outputs stop bit value 0 on store..,3: Transmitter outputs stop bit value 1 on store.."
|
|
newline
|
|
bitfld.long 0x0 0.--1. "SSTART,Shifter Start bit" "0: Start bit disabled for..,1: Start bit disabled for..,2: Transmitter outputs start bit value 0 before..,3: Transmitter outputs start bit value 1 before.."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x200)++0x3
|
|
line.long 0x0 "SHIFTBUF[$1],Shifter Buffer N Register"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUF,Shift Buffer"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x280)++0x3
|
|
line.long 0x0 "SHIFTBUFBIS[$1],Shifter Buffer N Bit Swapped Register"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBIS,Shift Buffer"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x300)++0x3
|
|
line.long 0x0 "SHIFTBUFBYS[$1],Shifter Buffer N Byte Swapped Register"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBYS,Shift Buffer"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x380)++0x3
|
|
line.long 0x0 "SHIFTBUFBBS[$1],Shifter Buffer N Bit Byte Swapped Register"
|
|
hexmask.long 0x0 0.--31. 1. "SHIFTBUFBBS,Shift Buffer"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x400)++0x3
|
|
line.long 0x0 "TIMCTL[$1],Timer Control N Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRGSEL,Trigger Select"
|
|
bitfld.long 0x0 23. "TRGPOL,Trigger Polarity" "0: Trigger active high,1: Trigger active low"
|
|
newline
|
|
bitfld.long 0x0 22. "TRGSRC,Trigger Source" "0: External trigger selected,1: Internal trigger selected"
|
|
bitfld.long 0x0 16.--17. "PINCFG,Timer Pin Configuration" "0: Timer pin output disabled,1: Timer pin open drain or bidirectional output..,2: Timer pin bidirectional output data,3: Timer pin output"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "PINSEL,Timer Pin Select" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 7. "PINPOL,Timer Pin Polarity" "0: Pin is active high,1: Pin is active low"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "TIMOD,Timer Mode" "0: Timer Disabled.,1: Dual 8-bit counters baud mode.,2: Dual 8-bit counters PWM high mode.,3: Single 16-bit counter mode."
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x480)++0x3
|
|
line.long 0x0 "TIMCFG[$1],Timer Configuration N Register"
|
|
bitfld.long 0x0 24.--25. "TIMOUT,Timer Output" "0: Timer output is logic one when enabled and is..,1: Timer output is logic zero when enabled and is..,2: Timer output is logic one when enabled and on..,3: Timer output is logic zero when enabled and on.."
|
|
bitfld.long 0x0 20.--21. "TIMDEC,Timer Decrement" "0: Decrement counter on FlexIO clock Shift clock..,1: Decrement counter on Trigger input (both edges)..,2: Decrement counter on Pin input (both edges)..,3: Decrement counter on Trigger input (both edges).."
|
|
newline
|
|
bitfld.long 0x0 16.--18. "TIMRST,Timer Reset" "0: Timer never reset,?,2: Timer reset on Timer Pin equal to Timer Output,3: Timer reset on Timer Trigger equal to Timer Output,4: Timer reset on Timer Pin rising edge,?,6: Timer reset on Trigger rising edge,7: Timer reset on Trigger rising or falling edge"
|
|
bitfld.long 0x0 12.--14. "TIMDIS,Timer Disable" "0: Timer never disabled,1: Timer disabled on Timer N-1 disable,2: Timer disabled on Timer compare (upper 8-bits..,3: Timer disabled on Timer compare (upper 8-bits..,4: Timer disabled on Pin rising or falling edge,5: Timer disabled on Pin rising or falling edge..,6: Timer disabled on Trigger falling edge,?"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "TIMENA,Timer Enable" "0: Timer always enabled,1: Timer enabled on Timer N-1 enable,2: Timer enabled on Trigger high,3: Timer enabled on Trigger high and Pin high,4: Timer enabled on Pin rising edge,5: Timer enabled on Pin rising edge and Trigger high,6: Timer enabled on Trigger rising edge,7: Timer enabled on Trigger rising or falling edge"
|
|
bitfld.long 0x0 4.--5. "TSTOP,Timer Stop Bit" "0: Stop bit disabled,1: Stop bit is enabled on timer compare,2: Stop bit is enabled on timer disable,3: Stop bit is enabled on timer compare and timer.."
|
|
newline
|
|
bitfld.long 0x0 1. "TSTART,Timer Start Bit" "0: Start bit disabled,1: Start bit enabled"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x500)++0x3
|
|
line.long 0x0 "TIMCMP[$1],Timer Compare N Register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CMP,Timer Compare Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "FTFC (Flash Memory Module)"
|
|
base ad:0x40020000
|
|
group.byte 0x0++0x1
|
|
line.byte 0x0 "FSTAT,Flash Status Register"
|
|
eventfld.byte 0x0 7. "CCIF,Command Complete Interrupt Flag" "0: FTFC command or emulated EEPROM file system..,1: FTFC command or emulated EEPROM file system.."
|
|
eventfld.byte 0x0 6. "RDCOLERR,FTFC Read Collision Error Flag" "0: No collision error detected,1: Collision error detected"
|
|
newline
|
|
eventfld.byte 0x0 5. "ACCERR,Flash Access Error Flag" "0: No access error detected,1: Access error detected"
|
|
eventfld.byte 0x0 4. "FPVIOL,Flash Protection Violation Flag" "0: No protection violation detected,1: Protection violation detected"
|
|
newline
|
|
rbitfld.byte 0x0 0. "MGSTAT0,Memory Controller Command Completion Status Flag" "0,1"
|
|
line.byte 0x1 "FCNFG,Flash Configuration Register"
|
|
bitfld.byte 0x1 7. "CCIE,Command Complete Interrupt Enable" "0: Command complete interrupt disabled,1: Command complete interrupt enabled. An interrupt.."
|
|
bitfld.byte 0x1 6. "RDCOLLIE,Read Collision Error Interrupt Enable" "0: Read collision error interrupt disabled,1: Read collision error interrupt enabled. An.."
|
|
newline
|
|
rbitfld.byte 0x1 5. "ERSAREQ,Erase All Request" "0: No request or request complete,1: Request to: (1) run the Erase All Blocks command.."
|
|
bitfld.byte 0x1 4. "ERSSUSP,Erase Suspend" "0: No suspend requested,1: Suspend the current Erase Flash Sector command.."
|
|
newline
|
|
rbitfld.byte 0x1 1. "RAMRDY,RAM Ready" "0: FlexRAM is not available for traditional RAM..,1: FlexRAM is available as traditional RAM only;.."
|
|
rbitfld.byte 0x1 0. "EEERDY,EEERDY" "0: FlexRAM is not available for emulated EEPROM..,1: FlexRAM is available for EEPROM operations.."
|
|
rgroup.byte 0x2++0x1
|
|
line.byte 0x0 "FSEC,Flash Security Register"
|
|
bitfld.byte 0x0 6.--7. "KEYEN,Backdoor Key Security Enable" "0: Backdoor key access disabled,1: Backdoor key access disabled (preferred KEYEN..,2: Backdoor key access enabled,3: Backdoor key access disabled"
|
|
bitfld.byte 0x0 4.--5. "MEEN,Mass Erase Enable Bits" "0: Mass erase is enabled,1: Mass erase is enabled,2: Mass erase is disabled,3: Mass erase is enabled"
|
|
newline
|
|
bitfld.byte 0x0 2.--3. "FSLACC,Factory Failure Analysis Access Code" "0: Factory access granted,1: Factory access denied,2: Factory access denied,3: Factory access granted"
|
|
bitfld.byte 0x0 0.--1. "SEC,Flash Security" "0: MCU security status is secure,1: MCU security status is secure,2: MCU security status is unsecure (The standard..,3: MCU security status is secure"
|
|
line.byte 0x1 "FOPT,Flash Option Register"
|
|
hexmask.byte 0x1 0.--7. 1. "OPT,Nonvolatile Option"
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x4)++0x0
|
|
line.byte 0x0 "FCCOB$1,Flash Common Command Object Registers"
|
|
hexmask.byte 0x0 0.--7. 1. "CCOBn,CCOBn"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x10)++0x0
|
|
line.byte 0x0 "FPROT$1,Program Flash Protection Registers"
|
|
hexmask.byte 0x0 0.--7. 1. "PROT,Program Flash Region Protect"
|
|
repeat.end
|
|
group.byte 0x16++0x1
|
|
line.byte 0x0 "FEPROT,EEPROM Protection Register"
|
|
hexmask.byte 0x0 0.--7. 1. "EPROT,EEPROM Region Protect"
|
|
line.byte 0x1 "FDPROT,Data Flash Protection Register"
|
|
hexmask.byte 0x1 0.--7. 1. "DPROT,Data Flash Region Protect"
|
|
rgroup.byte 0x2C++0x0
|
|
line.byte 0x0 "FCSESTAT,Flash CSEc Status Register"
|
|
bitfld.byte 0x0 7. "IDB,Internal Debug" "0: Internal debug functions are disabled,1: Internal debugger functions are enabled"
|
|
bitfld.byte 0x0 6. "EDB,External Debug" "0: External debugger not attached,1: External debugger is attached"
|
|
newline
|
|
bitfld.byte 0x0 5. "RIN,Random Number Generator Initialized" "0: Random number generator is not initialized.,1: Random number generator is initialized."
|
|
bitfld.byte 0x0 4. "BOK,Secure Boot OK" "0: Secure boot is not complete or secure boot failure,1: Secure boot was successful."
|
|
newline
|
|
bitfld.byte 0x0 3. "BFN,Secure Boot Finished" "0: Secure Boot is not finished.,1: Secure Boot has finished"
|
|
bitfld.byte 0x0 2. "BIN,Secure Boot Initialization" "0: Secure boot personalization not completed.,1: Secure boot personalization has completed"
|
|
newline
|
|
bitfld.byte 0x0 1. "SB,Secure Boot" "0: Secure boot not activated,1: Secure boot is activated"
|
|
bitfld.byte 0x0 0. "BSY,Busy" "0: CSEc command processing has completed,1: CSEc command processing is in progress"
|
|
group.byte 0x2E++0x1
|
|
line.byte 0x0 "FERSTAT,Flash Error Status Register"
|
|
eventfld.byte 0x0 1. "DFDIF,Double Bit Fault Detect Interrupt Flag" "0: Double bit fault not detected during a valid..,1: Double bit fault detected (or FERCNFG[FDFD] is.."
|
|
line.byte 0x1 "FERCNFG,Flash Error Configuration Register"
|
|
bitfld.byte 0x1 5. "FDFD,Force Double Bit Fault Detect" "0: FERSTAT[DFDIF] sets only if a double bit fault..,1: FERSTAT[DFDIF] sets during any valid flash read.."
|
|
bitfld.byte 0x1 1. "DFDIE,Double Bit Fault Detect Interrupt Enable" "0: Double bit fault detect interrupt disabled,1: Double bit fault detect interrupt enabled. An.."
|
|
tree.end
|
|
tree "FTFM (Flash Memory Module)"
|
|
base ad:0x40020000
|
|
group.byte 0x0++0x1
|
|
line.byte 0x0 "FSTAT,Flash Status Register"
|
|
eventfld.byte 0x0 7. "CCIF,Command Complete Interrupt Flag" "0: FTFM command or emulated EEPROM file system..,1: FTFM command or emulated EEPROM file system.."
|
|
eventfld.byte 0x0 6. "RDCOLERR,FTFM Read Collision Error Flag" "0: No collision error detected,1: Collision error detected"
|
|
newline
|
|
eventfld.byte 0x0 5. "ACCERR,Flash Access Error Flag" "0: No access error detected,1: Access error detected"
|
|
eventfld.byte 0x0 4. "FPVIOL,Flash Protection Violation Flag" "0: No protection violation detected,1: Protection violation detected"
|
|
newline
|
|
rbitfld.byte 0x0 3. "MGSTAT3,Memory Controller Status Flag 3" "0,1"
|
|
rbitfld.byte 0x0 2. "MGSTAT2,Memory Controller Status Flag 2" "0,1"
|
|
newline
|
|
rbitfld.byte 0x0 1. "MGSTAT1,Memory Controller Status Flag 1" "0,1"
|
|
rbitfld.byte 0x0 0. "MGSTAT0,Memory Controller Status Flag 0" "0,1"
|
|
line.byte 0x1 "FCNFG,Flash Configuration Register"
|
|
bitfld.byte 0x1 7. "CCIE,Command Complete Interrupt Enable" "0: Command complete interrupt disabled,1: Command complete interrupt enabled. An interrupt.."
|
|
bitfld.byte 0x1 6. "RDCOLLIE,Read Collision Error Interrupt Enable" "0: Read collision error interrupt disabled,1: Read collision error interrupt enabled. An.."
|
|
newline
|
|
rbitfld.byte 0x1 5. "ERSAREQ,Erase All Request" "0: No request or request complete,1: Request to run the Erase All Blocks Unsecure.."
|
|
bitfld.byte 0x1 4. "ERSSUSP,Erase Suspend" "0: No suspend requested,1: Suspend the current Erase Flash Sector command.."
|
|
newline
|
|
rbitfld.byte 0x1 1. "RAMRDY,RAM Ready" "0: FlexRAM is not available for traditional RAM..,1: FlexRAM is available as traditional RAM only;.."
|
|
rbitfld.byte 0x1 0. "EEERDY,EEE Ready" "0: FlexRAM is not available for emulated EEPROM..,1: The FlexRAM is available for EEPROM operations.."
|
|
rgroup.byte 0x2++0x1
|
|
line.byte 0x0 "FSEC,Flash Security Register"
|
|
bitfld.byte 0x0 6.--7. "KEYEN,Backdoor Key Security Enable" "0: Backdoor key access disabled,1: Backdoor key access disabled (preferred KEYEN..,2: Backdoor key access enabled,3: Backdoor key access disabled"
|
|
bitfld.byte 0x0 4.--5. "MEEN,Mass Erase Enable Bits" "0: Mass erase is enabled,1: Mass erase is enabled,2: Mass erase is disabled,3: Mass erase is enabled"
|
|
newline
|
|
bitfld.byte 0x0 2.--3. "FSLACC,Factory Failure Analysis Access Code" "0: Factory access granted,1: Factory access denied,2: Factory access denied,3: Factory access granted"
|
|
bitfld.byte 0x0 0.--1. "SEC,Flash Security" "0: MCU security status is secure,1: MCU security status is secure,2: MCU security status is unsecure (The standard..,3: MCU security status is secure"
|
|
line.byte 0x1 "FOPT,Flash Option Register"
|
|
hexmask.byte 0x1 0.--7. 1. "OPT,Nonvolatile Option"
|
|
repeat 12. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x4)++0x0
|
|
line.byte 0x0 "FCCOB$1,Flash Common Command Object Registers"
|
|
hexmask.byte 0x0 0.--7. 1. "CCOBn,CCOBn"
|
|
repeat.end
|
|
repeat 4. (increment 0x0 0x1)(increment 0x0 0x1)
|
|
group.byte ($2+0x10)++0x0
|
|
line.byte 0x0 "FPROT$1,Program Flash Protection Registers"
|
|
hexmask.byte 0x0 0.--7. 1. "PROT,Program Flash Region Protect"
|
|
repeat.end
|
|
group.byte 0x16++0x1
|
|
line.byte 0x0 "FEPROT,EEPROM Protection Register"
|
|
hexmask.byte 0x0 0.--7. 1. "EPROT,EEPROM Region Protect"
|
|
line.byte 0x1 "FDPROT,Data Flash Protection Register"
|
|
hexmask.byte 0x1 0.--7. 1. "DPROT,Data Flash Region Protect"
|
|
rgroup.byte 0x2C++0x1
|
|
line.byte 0x0 "FCSESTAT1,Flash CSEc Status Register 1"
|
|
bitfld.byte 0x0 7. "IDB,Internal Debug" "0: Internal debug functions are disabled,1: Internal debugger functions are enabled"
|
|
bitfld.byte 0x0 6. "EDB,External Debug" "0: External debugger not attached,1: External debugger is attached"
|
|
newline
|
|
bitfld.byte 0x0 5. "RIN,Random Number Generator Initialized" "0: Random number generator is not initialized,1: Random number generator is initialized"
|
|
bitfld.byte 0x0 4. "BOK,Secure Boot OK" "0: Secure boot is not complete or secure boot failure,1: Secure boot was successful"
|
|
newline
|
|
bitfld.byte 0x0 3. "BFN,Secure Boot Finished" "0: Secure Boot is not finished,1: Secure Boot has finished"
|
|
bitfld.byte 0x0 2. "BIN,Secure Boot Initialization" "0: Secure boot personalization not completed,1: Secure boot personalization has completed"
|
|
newline
|
|
bitfld.byte 0x0 1. "SB,Secure Boot" "0: Secure boot not activated,1: Secure boot is activated"
|
|
bitfld.byte 0x0 0. "BSY,Busy" "0: CSEc command processing has completed,1: CSEc command processing is in progress"
|
|
line.byte 0x1 "FCSESTAT0,Flash CSEc Status Register 0"
|
|
bitfld.byte 0x1 2. "MEMERR,Memory Error" "0: Uncorrectable ECC fault not detected CSE_PRAM..,1: Uncorrectable ECC fault detected CSE_PRAM access.."
|
|
bitfld.byte 0x1 1. "CMDTYPE,Command Type" "0: Flash command or no command,1: CSEc command"
|
|
group.byte 0x2E++0x1
|
|
line.byte 0x0 "FERSTAT,Flash Error Status Register"
|
|
eventfld.byte 0x0 3. "CDFDIF,Controller Flash Double Bit Fault Detect Interrupt Flag" "0: Fault not detected during a valid internal RAM..,1: Fault detected (or FERCNFG[CFDFD] is set) during.."
|
|
eventfld.byte 0x0 2. "EDFDIF,Controller FlexRAM Double Bit Fault Detect Interrupt Flag" "0: Fault not detected during a valid FlexRAM or..,1: Fault detected (or FERCNFG[EFDFD] is set) during.."
|
|
newline
|
|
eventfld.byte 0x0 1. "DFDIF,Platform Flash Double Bit Fault Detect Interrupt Flag" "0: Fault not detected during a valid flash read..,1: Fault detected (or FERCNFG[FDFD] is set) during.."
|
|
eventfld.byte 0x0 0. "PDFDIF,Platform FlexRAM Double Bit Fault Detect Interrupt Flag" "0: Fault not detected during a valid FlexRAM or..,1: Fault detected (or FERCNFG[PFDFD] is set) during.."
|
|
line.byte 0x1 "FERCNFG,Flash Error Configuration Register"
|
|
bitfld.byte 0x1 7. "CFDFD,Controller Flash Force Double Bit Fault Detect" "0: FERSTAT[CDFDIF] sets only if a fault is detected..,1: FERSTAT[CDFDIF] sets during the next internal.."
|
|
bitfld.byte 0x1 6. "EFDFD,Controller FlexRAM Force Double Bit Fault Detect" "0: FERSTAT[EDFDIF] sets only if a fault is detected..,1: FERSTAT[EDFDIF] sets during the next FlexRAM or.."
|
|
newline
|
|
bitfld.byte 0x1 5. "FDFD,Force Double Bit Fault Detect" "0: FERSTAT[DFDIF] sets only if a fault is detected..,1: FERSTAT[DFDIF] sets during any valid flash read.."
|
|
bitfld.byte 0x1 4. "PFDFD,Platform FlexRAM Force Double Bit Fault Detect" "0: FERSTAT[PDFDIF] sets only if a fault is detected..,1: FERSTAT[PDFDIF] sets during any valid FlexRAM or.."
|
|
newline
|
|
bitfld.byte 0x1 3. "CDFDIE,Controller Flash Double Bit Fault Detect Interrupt Enable" "0: Fault detect interrupt disabled,1: Fault detect interrupt enabled. An interrupt.."
|
|
bitfld.byte 0x1 2. "EDFDIE,Controller FlexRAM Double Bit Fault Detect Interrupt Enable" "0: Fault detect interrupt disabled,1: Fault detect interrupt enabled. An interrupt.."
|
|
newline
|
|
bitfld.byte 0x1 1. "DFDIE,Platform Flash Double Bit Fault Detect Interrupt Enable" "0: Fault detect interrupt disabled,1: Fault detect interrupt enabled. An interrupt.."
|
|
bitfld.byte 0x1 0. "PDFDIE,Platform FlexRAM Double Bit Fault Detect Interrupt Enable" "0: Fault detect interrupt disabled,1: Fault detect interrupt enabled. An interrupt.."
|
|
tree.end
|
|
tree "FTM (FlexTimer Module)"
|
|
base ad:0x0
|
|
tree "FTM0"
|
|
base ad:0x40038000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler"
|
|
bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
newline
|
|
bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
bitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened."
|
|
newline
|
|
bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled."
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,2: Fixed frequency clock,3: External clock"
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,MOD"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4003800C ad:0x40038014 ad:0x4003801C ad:0x40038024 ad:0x4003802C ad:0x40038034 ad:0x4003803C ad:0x40038044)
|
|
tree "CONTROLS[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CSC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one."
|
|
rbitfld.long 0x0 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one."
|
|
newline
|
|
bitfld.long 0x0 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.."
|
|
bitfld.long 0x0 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred."
|
|
newline
|
|
bitfld.long 0x0 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt."
|
|
bitfld.long 0x0 5. "MSB,Channel (n) Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MSA,Channel (n) Mode Select" "0,1"
|
|
bitfld.long 0x0 3. "ELSB,Channel (n) Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ELSA,Channel (n) Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
newline
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
line.long 0x4 "CV,Channel (n) Value"
|
|
hexmask.long.word 0x4 0.--15. 1. "VAL,Channel Value"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40038000
|
|
group.long 0x4C++0x33
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,INIT"
|
|
line.long 0x4 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x4 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
line.long 0x8 "MODE,Features Mode Selection"
|
|
bitfld.long 0x8 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled."
|
|
bitfld.long 0x8 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,2: Fault control is enabled for all channels and..,3: Fault control is enabled for all channels and.."
|
|
newline
|
|
bitfld.long 0x8 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x8 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x8 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x8 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0xC "SYNC,Synchronization"
|
|
bitfld.long 0xC 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0xC 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0xC 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0xC 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0xC 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0xC 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x10 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x10 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0x14 "OUTMASK,Output Mask"
|
|
bitfld.long 0x14 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x18 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x18 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1"
|
|
bitfld.long 0x18 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "COMP3,Complement Of Channel (n) for n = 6" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 24. "COMBINE3,Combine Channels For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1"
|
|
bitfld.long 0x18 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 17. "COMP2,Complement Of Channel (n) For n = 4" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 16. "COMBINE2,Combine Channels For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1"
|
|
bitfld.long 0x18 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "COMP1,Complement Of Channel (n) For n = 2" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 8. "COMBINE1,Combine Channels For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1"
|
|
bitfld.long 0x18 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "COMP0,Complement Of Channel (n) For n = 0" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 0. "COMBINE0,Combine Channels For n = 0" "0,1"
|
|
line.long 0x1C "DEADTIME,Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x20 "EXTTRIG,FTM External Trigger"
|
|
bitfld.long 0x20 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x20 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x20 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
line.long 0x24 "POL,Channels Polarity"
|
|
bitfld.long 0x24 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x28 "FMS,Fault Mode Status"
|
|
bitfld.long 0x28 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected."
|
|
bitfld.long 0x28 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
newline
|
|
rbitfld.long 0x28 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1."
|
|
bitfld.long 0x28 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
bitfld.long 0x28 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
line.long 0x2C "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x2C 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x2C 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
line.long 0x30 "FLTCTRL,Fault Control"
|
|
bitfld.long 0x30 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.."
|
|
hexmask.long.byte 0x30 8.--11. 1. "FFVAL,Fault Input Filter"
|
|
newline
|
|
bitfld.long 0x30 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
newline
|
|
bitfld.long 0x30 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
group.long 0x84++0x1F
|
|
line.long 0x0 "CONF,Configuration"
|
|
bitfld.long 0x0 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.."
|
|
bitfld.long 0x0 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
bitfld.long 0x0 6.--7. "BDMMODE,Debug Mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities"
|
|
line.long 0x4 "FLTPOL,FTM Fault Input Polarity"
|
|
bitfld.long 0x4 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x4 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
newline
|
|
bitfld.long 0x4 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x4 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
line.long 0x8 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x8 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x8 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x8 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x8 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.."
|
|
newline
|
|
bitfld.long 0x8 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x8 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x8 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x8 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x8 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.."
|
|
bitfld.long 0x8 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x8 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x8 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x8 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x8 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x8 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0xC "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0xC 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0xC 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0xC 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0xC 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x10 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x10 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0x14 "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0x14 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set."
|
|
bitfld.long 0x14 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.."
|
|
newline
|
|
bitfld.long 0x14 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0x14 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.."
|
|
newline
|
|
bitfld.long 0x14 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
line.long 0x18 "HCR,Half Cycle Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "HCVAL,Half Cycle Value"
|
|
line.long 0x1C "PAIR0DEADTIME,Pair 0 Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xA8++0x3
|
|
line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
tree.end
|
|
tree "FTM1"
|
|
base ad:0x40039000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler"
|
|
bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
newline
|
|
bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
bitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened."
|
|
newline
|
|
bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled."
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,2: Fixed frequency clock,3: External clock"
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,MOD"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4003900C ad:0x40039014 ad:0x4003901C ad:0x40039024 ad:0x4003902C ad:0x40039034 ad:0x4003903C ad:0x40039044)
|
|
tree "CONTROLS[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CSC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one."
|
|
rbitfld.long 0x0 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one."
|
|
newline
|
|
bitfld.long 0x0 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.."
|
|
bitfld.long 0x0 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred."
|
|
newline
|
|
bitfld.long 0x0 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt."
|
|
bitfld.long 0x0 5. "MSB,Channel (n) Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MSA,Channel (n) Mode Select" "0,1"
|
|
bitfld.long 0x0 3. "ELSB,Channel (n) Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ELSA,Channel (n) Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
newline
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
line.long 0x4 "CV,Channel (n) Value"
|
|
hexmask.long.word 0x4 0.--15. 1. "VAL,Channel Value"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40039000
|
|
group.long 0x4C++0x57
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,INIT"
|
|
line.long 0x4 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x4 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
line.long 0x8 "MODE,Features Mode Selection"
|
|
bitfld.long 0x8 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled."
|
|
bitfld.long 0x8 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,2: Fault control is enabled for all channels and..,3: Fault control is enabled for all channels and.."
|
|
newline
|
|
bitfld.long 0x8 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x8 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x8 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x8 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0xC "SYNC,Synchronization"
|
|
bitfld.long 0xC 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0xC 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0xC 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0xC 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0xC 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0xC 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x10 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x10 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0x14 "OUTMASK,Output Mask"
|
|
bitfld.long 0x14 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x18 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x18 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1"
|
|
bitfld.long 0x18 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "COMP3,Complement Of Channel (n) for n = 6" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 24. "COMBINE3,Combine Channels For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1"
|
|
bitfld.long 0x18 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 17. "COMP2,Complement Of Channel (n) For n = 4" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 16. "COMBINE2,Combine Channels For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1"
|
|
bitfld.long 0x18 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "COMP1,Complement Of Channel (n) For n = 2" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 8. "COMBINE1,Combine Channels For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1"
|
|
bitfld.long 0x18 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "COMP0,Complement Of Channel (n) For n = 0" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 0. "COMBINE0,Combine Channels For n = 0" "0,1"
|
|
line.long 0x1C "DEADTIME,Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x20 "EXTTRIG,FTM External Trigger"
|
|
bitfld.long 0x20 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x20 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x20 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
line.long 0x24 "POL,Channels Polarity"
|
|
bitfld.long 0x24 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x28 "FMS,Fault Mode Status"
|
|
bitfld.long 0x28 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected."
|
|
bitfld.long 0x28 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
newline
|
|
rbitfld.long 0x28 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1."
|
|
bitfld.long 0x28 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
bitfld.long 0x28 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
line.long 0x2C "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x2C 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x2C 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
line.long 0x30 "FLTCTRL,Fault Control"
|
|
bitfld.long 0x30 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.."
|
|
hexmask.long.byte 0x30 8.--11. 1. "FFVAL,Fault Input Filter"
|
|
newline
|
|
bitfld.long 0x30 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
newline
|
|
bitfld.long 0x30 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
line.long 0x34 "QDCTRL,Quadrature Decoder Control And Status"
|
|
bitfld.long 0x34 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled."
|
|
bitfld.long 0x34 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled."
|
|
newline
|
|
bitfld.long 0x34 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.."
|
|
bitfld.long 0x34 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.."
|
|
newline
|
|
bitfld.long 0x34 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode."
|
|
rbitfld.long 0x34 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.."
|
|
newline
|
|
rbitfld.long 0x34 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.."
|
|
bitfld.long 0x34 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled."
|
|
line.long 0x38 "CONF,Configuration"
|
|
bitfld.long 0x38 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.."
|
|
bitfld.long 0x38 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
newline
|
|
bitfld.long 0x38 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
bitfld.long 0x38 6.--7. "BDMMODE,Debug Mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities"
|
|
line.long 0x3C "FLTPOL,FTM Fault Input Polarity"
|
|
bitfld.long 0x3C 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x3C 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
newline
|
|
bitfld.long 0x3C 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x3C 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
line.long 0x40 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x40 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x40 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x40 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x40 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.."
|
|
newline
|
|
bitfld.long 0x40 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x40 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x40 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x40 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x40 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.."
|
|
bitfld.long 0x40 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x40 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x40 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x40 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x40 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x40 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0x44 "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0x44 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x44 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0x44 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x44 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x48 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x48 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0x4C "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0x4C 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set."
|
|
bitfld.long 0x4C 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.."
|
|
newline
|
|
bitfld.long 0x4C 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0x4C 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.."
|
|
newline
|
|
bitfld.long 0x4C 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
line.long 0x50 "HCR,Half Cycle Register"
|
|
hexmask.long.word 0x50 0.--15. 1. "HCVAL,Half Cycle Value"
|
|
line.long 0x54 "PAIR0DEADTIME,Pair 0 Deadtime Configuration"
|
|
hexmask.long.byte 0x54 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x54 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x54 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xA8++0x3
|
|
line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value"
|
|
hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value"
|
|
hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x204)++0x3
|
|
line.long 0x0 "CV_MIRROR[$1],Mirror of Channel (n) Match Value"
|
|
hexmask.long.word 0x0 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value"
|
|
hexmask.long.byte 0x0 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "FTM2"
|
|
base ad:0x4003A000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler"
|
|
bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
newline
|
|
bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
bitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened."
|
|
newline
|
|
bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled."
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,2: Fixed frequency clock,3: External clock"
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,MOD"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4003A00C ad:0x4003A014 ad:0x4003A01C ad:0x4003A024 ad:0x4003A02C ad:0x4003A034 ad:0x4003A03C ad:0x4003A044)
|
|
tree "CONTROLS[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CSC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one."
|
|
rbitfld.long 0x0 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one."
|
|
newline
|
|
bitfld.long 0x0 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.."
|
|
bitfld.long 0x0 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred."
|
|
newline
|
|
bitfld.long 0x0 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt."
|
|
bitfld.long 0x0 5. "MSB,Channel (n) Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MSA,Channel (n) Mode Select" "0,1"
|
|
bitfld.long 0x0 3. "ELSB,Channel (n) Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ELSA,Channel (n) Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
newline
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
line.long 0x4 "CV,Channel (n) Value"
|
|
hexmask.long.word 0x4 0.--15. 1. "VAL,Channel Value"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x4003A000
|
|
group.long 0x4C++0x57
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,INIT"
|
|
line.long 0x4 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x4 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
line.long 0x8 "MODE,Features Mode Selection"
|
|
bitfld.long 0x8 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled."
|
|
bitfld.long 0x8 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,2: Fault control is enabled for all channels and..,3: Fault control is enabled for all channels and.."
|
|
newline
|
|
bitfld.long 0x8 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x8 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x8 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x8 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0xC "SYNC,Synchronization"
|
|
bitfld.long 0xC 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0xC 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0xC 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0xC 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0xC 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0xC 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x10 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x10 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0x14 "OUTMASK,Output Mask"
|
|
bitfld.long 0x14 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x18 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x18 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1"
|
|
bitfld.long 0x18 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "COMP3,Complement Of Channel (n) for n = 6" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 24. "COMBINE3,Combine Channels For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1"
|
|
bitfld.long 0x18 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 17. "COMP2,Complement Of Channel (n) For n = 4" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 16. "COMBINE2,Combine Channels For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1"
|
|
bitfld.long 0x18 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "COMP1,Complement Of Channel (n) For n = 2" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 8. "COMBINE1,Combine Channels For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1"
|
|
bitfld.long 0x18 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "COMP0,Complement Of Channel (n) For n = 0" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 0. "COMBINE0,Combine Channels For n = 0" "0,1"
|
|
line.long 0x1C "DEADTIME,Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x20 "EXTTRIG,FTM External Trigger"
|
|
bitfld.long 0x20 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x20 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x20 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
line.long 0x24 "POL,Channels Polarity"
|
|
bitfld.long 0x24 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x28 "FMS,Fault Mode Status"
|
|
bitfld.long 0x28 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected."
|
|
bitfld.long 0x28 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
newline
|
|
rbitfld.long 0x28 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1."
|
|
bitfld.long 0x28 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
bitfld.long 0x28 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
line.long 0x2C "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x2C 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x2C 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
line.long 0x30 "FLTCTRL,Fault Control"
|
|
bitfld.long 0x30 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.."
|
|
hexmask.long.byte 0x30 8.--11. 1. "FFVAL,Fault Input Filter"
|
|
newline
|
|
bitfld.long 0x30 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
newline
|
|
bitfld.long 0x30 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
line.long 0x34 "QDCTRL,Quadrature Decoder Control And Status"
|
|
bitfld.long 0x34 7. "PHAFLTREN,Phase A Input Filter Enable" "0: Phase A input filter is disabled.,1: Phase A input filter is enabled."
|
|
bitfld.long 0x34 6. "PHBFLTREN,Phase B Input Filter Enable" "0: Phase B input filter is disabled.,1: Phase B input filter is enabled."
|
|
newline
|
|
bitfld.long 0x34 5. "PHAPOL,Phase A Input Polarity" "0: Normal polarity. Phase A input signal is not..,1: Inverted polarity. Phase A input signal is.."
|
|
bitfld.long 0x34 4. "PHBPOL,Phase B Input Polarity" "0: Normal polarity. Phase B input signal is not..,1: Inverted polarity. Phase B input signal is.."
|
|
newline
|
|
bitfld.long 0x34 3. "QUADMODE,Quadrature Decoder Mode" "0: Phase A and phase B encoding mode.,1: Count and direction encoding mode."
|
|
rbitfld.long 0x34 2. "QUADIR,FTM Counter Direction In Quadrature Decoder Mode" "0: Counting direction is decreasing (FTM counter..,1: Counting direction is increasing (FTM counter.."
|
|
newline
|
|
rbitfld.long 0x34 1. "TOFDIR,Timer Overflow Direction In Quadrature Decoder Mode" "0: TOF bit was set on the bottom of counting. There..,1: TOF bit was set on the top of counting. There.."
|
|
bitfld.long 0x34 0. "QUADEN,Quadrature Decoder Mode Enable" "0: Quadrature Decoder mode is disabled.,1: Quadrature Decoder mode is enabled."
|
|
line.long 0x38 "CONF,Configuration"
|
|
bitfld.long 0x38 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.."
|
|
bitfld.long 0x38 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
newline
|
|
bitfld.long 0x38 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
bitfld.long 0x38 6.--7. "BDMMODE,Debug Mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x38 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities"
|
|
line.long 0x3C "FLTPOL,FTM Fault Input Polarity"
|
|
bitfld.long 0x3C 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x3C 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
newline
|
|
bitfld.long 0x3C 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x3C 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
line.long 0x40 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x40 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x40 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x40 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x40 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.."
|
|
newline
|
|
bitfld.long 0x40 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x40 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x40 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x40 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x40 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.."
|
|
bitfld.long 0x40 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x40 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x40 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x40 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x40 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x40 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0x44 "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0x44 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x44 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0x44 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0x44 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x48 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x48 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x48 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x48 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x48 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x48 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0x4C "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0x4C 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set."
|
|
bitfld.long 0x4C 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.."
|
|
newline
|
|
bitfld.long 0x4C 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0x4C 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.."
|
|
newline
|
|
bitfld.long 0x4C 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x4C 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x4C 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
line.long 0x50 "HCR,Half Cycle Register"
|
|
hexmask.long.word 0x50 0.--15. 1. "HCVAL,Half Cycle Value"
|
|
line.long 0x54 "PAIR0DEADTIME,Pair 0 Deadtime Configuration"
|
|
hexmask.long.byte 0x54 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x54 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x54 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xA8++0x3
|
|
line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0x200++0x3
|
|
line.long 0x0 "MOD_MIRROR,Mirror of Modulo Value"
|
|
hexmask.long.word 0x0 16.--31. 1. "MOD,Mirror of the Modulo Integer Value"
|
|
hexmask.long.byte 0x0 11.--15. 1. "FRACMOD,Modulo Fractional Value"
|
|
repeat 8. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x204)++0x3
|
|
line.long 0x0 "CV_MIRROR[$1],Mirror of Channel (n) Match Value"
|
|
hexmask.long.word 0x0 16.--31. 1. "VAL,Mirror of the Channel (n) Match Integer Value"
|
|
hexmask.long.byte 0x0 11.--15. 1. "FRACVAL,Channel (n) Match Fractional Value"
|
|
repeat.end
|
|
tree.end
|
|
tree "FTM3"
|
|
base ad:0x40026000
|
|
group.long 0x0++0xB
|
|
line.long 0x0 "SC,Status And Control"
|
|
hexmask.long.byte 0x0 24.--27. 1. "FLTPS,Filter Prescaler"
|
|
bitfld.long 0x0 23. "PWMEN7,Channel 7 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 22. "PWMEN6,Channel 6 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 21. "PWMEN5,Channel 5 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 20. "PWMEN4,Channel 4 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 19. "PWMEN3,Channel 3 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 18. "PWMEN2,Channel 2 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 17. "PWMEN1,Channel 1 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "PWMEN0,Channel 0 PWM enable bit" "0: Channel output port is disabled.,1: Channel output port is enabled."
|
|
bitfld.long 0x0 9. "TOF,Timer Overflow Flag" "0: FTM counter has not overflowed.,1: FTM counter has overflowed."
|
|
newline
|
|
bitfld.long 0x0 8. "TOIE,Timer Overflow Interrupt Enable" "0: Disable TOF interrupts. Use software polling.,1: Enable TOF interrupts. An interrupt is generated.."
|
|
bitfld.long 0x0 7. "RF,Reload Flag" "0: A selected reload point did not happen.,1: A selected reload point happened."
|
|
newline
|
|
bitfld.long 0x0 6. "RIE,Reload Point Interrupt Enable" "0: Reload point interrupt is disabled.,1: Reload point interrupt is enabled."
|
|
bitfld.long 0x0 5. "CPWMS,Center-Aligned PWM Select" "0: FTM counter operates in Up Counting mode.,1: FTM counter operates in Up-Down Counting mode."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "CLKS,Clock Source Selection" "0: No clock selected. This in effect disables the..,1: FTM input clock,2: Fixed frequency clock,3: External clock"
|
|
bitfld.long 0x0 0.--2. "PS,Prescale Factor Selection" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x4 "CNT,Counter"
|
|
hexmask.long.word 0x4 0.--15. 1. "COUNT,Counter Value"
|
|
line.long 0x8 "MOD,Modulo"
|
|
hexmask.long.word 0x8 0.--15. 1. "MOD,MOD"
|
|
repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4002600C ad:0x40026014 ad:0x4002601C ad:0x40026024 ad:0x4002602C ad:0x40026034 ad:0x4002603C ad:0x40026044)
|
|
tree "CONTROLS[$1]"
|
|
base $2
|
|
group.long ($2)++0x7
|
|
line.long 0x0 "CSC,Channel (n) Status And Control"
|
|
rbitfld.long 0x0 10. "CHOV,Channel (n) Output Value" "0: The channel (n) output is zero.,1: The channel (n) output is one."
|
|
rbitfld.long 0x0 9. "CHIS,Channel (n) Input State" "0: The channel (n) input is zero.,1: The channel (n) input is one."
|
|
newline
|
|
bitfld.long 0x0 8. "TRIGMODE,Trigger mode control" "0: Channel outputs will generate the normal PWM..,1: If a match in the channel occurs a trigger.."
|
|
bitfld.long 0x0 7. "CHF,Channel (n) Flag" "0: No channel (n) event has occurred.,1: A channel (n) event has occurred."
|
|
newline
|
|
bitfld.long 0x0 6. "CHIE,Channel (n) Interrupt Enable" "0: Disable channel (n) interrupt. Use software..,1: Enable channel (n) interrupt."
|
|
bitfld.long 0x0 5. "MSB,Channel (n) Mode Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 4. "MSA,Channel (n) Mode Select" "0,1"
|
|
bitfld.long 0x0 3. "ELSB,Channel (n) Edge or Level Select" "0,1"
|
|
newline
|
|
bitfld.long 0x0 2. "ELSA,Channel (n) Edge or Level Select" "0,1"
|
|
bitfld.long 0x0 1. "ICRST,FTM counter reset by the selected input capture event." "0: FTM counter is not reset when the selected..,1: FTM counter is reset when the selected channel.."
|
|
newline
|
|
bitfld.long 0x0 0. "DMA,DMA Enable" "0: Disable DMA transfers.,1: Enable DMA transfers."
|
|
line.long 0x4 "CV,Channel (n) Value"
|
|
hexmask.long.word 0x4 0.--15. 1. "VAL,Channel Value"
|
|
tree.end
|
|
repeat.end
|
|
base ad:0x40026000
|
|
group.long 0x4C++0x33
|
|
line.long 0x0 "CNTIN,Counter Initial Value"
|
|
hexmask.long.word 0x0 0.--15. 1. "INIT,INIT"
|
|
line.long 0x4 "STATUS,Capture And Compare Status"
|
|
bitfld.long 0x4 7. "CH7F,Channel 7 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 6. "CH6F,Channel 6 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 5. "CH5F,Channel 5 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 4. "CH4F,Channel 4 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 3. "CH3F,Channel 3 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 2. "CH2F,Channel 2 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
newline
|
|
bitfld.long 0x4 1. "CH1F,Channel 1 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
bitfld.long 0x4 0. "CH0F,Channel 0 Flag" "0: No channel event has occurred.,1: A channel event has occurred."
|
|
line.long 0x8 "MODE,Features Mode Selection"
|
|
bitfld.long 0x8 7. "FAULTIE,Fault Interrupt Enable" "0: Fault control interrupt is disabled.,1: Fault control interrupt is enabled."
|
|
bitfld.long 0x8 5.--6. "FAULTM,Fault Control Mode" "0: Fault control is disabled for all channels.,1: Fault control is enabled for even channels only..,2: Fault control is enabled for all channels and..,3: Fault control is enabled for all channels and.."
|
|
newline
|
|
bitfld.long 0x8 4. "CAPTEST,Capture Test Mode Enable" "0: Capture test mode is disabled.,1: Capture test mode is enabled."
|
|
bitfld.long 0x8 3. "PWMSYNC,PWM Synchronization Mode" "0: No restrictions. Software and hardware triggers..,1: Software trigger can only be used by MOD and CnV.."
|
|
newline
|
|
bitfld.long 0x8 2. "WPDIS,Write Protection Disable" "0: Write protection is enabled.,1: Write protection is disabled."
|
|
bitfld.long 0x8 1. "INIT,Initialize The Channels Output" "0,1"
|
|
newline
|
|
bitfld.long 0x8 0. "FTMEN,FTM Enable" "0: TPM compatibility. Free running counter and..,1: Free running counter and synchronization are.."
|
|
line.long 0xC "SYNC,Synchronization"
|
|
bitfld.long 0xC 7. "SWSYNC,PWM Synchronization Software Trigger" "0: Software trigger is not selected.,1: Software trigger is selected."
|
|
bitfld.long 0xC 6. "TRIG2,PWM Synchronization Hardware Trigger 2" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 5. "TRIG1,PWM Synchronization Hardware Trigger 1" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
bitfld.long 0xC 4. "TRIG0,PWM Synchronization Hardware Trigger 0" "0: Trigger is disabled.,1: Trigger is enabled."
|
|
newline
|
|
bitfld.long 0xC 3. "SYNCHOM,Output Mask Synchronization" "0: OUTMASK register is updated with the value of..,1: OUTMASK register is updated with the value of.."
|
|
bitfld.long 0xC 2. "REINIT,FTM Counter Reinitialization by Synchronization" "0: FTM counter continues to count normally.,1: FTM counter is updated with its initial value.."
|
|
newline
|
|
bitfld.long 0xC 1. "CNTMAX,Maximum Loading Point Enable" "0: The maximum loading point is disabled.,1: The maximum loading point is enabled."
|
|
bitfld.long 0xC 0. "CNTMIN,Minimum Loading Point Enable" "0: The minimum loading point is disabled.,1: The minimum loading point is enabled."
|
|
line.long 0x10 "OUTINIT,Initial State For Channels Output"
|
|
bitfld.long 0x10 7. "CH7OI,Channel 7 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 6. "CH6OI,Channel 6 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OI,Channel 5 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 4. "CH4OI,Channel 4 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OI,Channel 3 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 2. "CH2OI,Channel 2 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OI,Channel 1 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
bitfld.long 0x10 0. "CH0OI,Channel 0 Output Initialization Value" "0: The initialization value is 0.,1: The initialization value is 1."
|
|
line.long 0x14 "OUTMASK,Output Mask"
|
|
bitfld.long 0x14 7. "CH7OM,Channel 7 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 6. "CH6OM,Channel 6 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5OM,Channel 5 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 4. "CH4OM,Channel 4 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3OM,Channel 3 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 2. "CH2OM,Channel 2 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1OM,Channel 1 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
bitfld.long 0x14 0. "CH0OM,Channel 0 Output Mask" "0: Channel output is not masked. It continues to..,1: Channel output is masked. It is forced to its.."
|
|
line.long 0x18 "COMBINE,Function For Linked Channels"
|
|
bitfld.long 0x18 31. "MCOMBINE3,Modified Combine Mode For n = 6" "0,1"
|
|
bitfld.long 0x18 30. "FAULTEN3,Fault Control Enable For n = 6" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 29. "SYNCEN3,Synchronization Enable For n = 6" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 28. "DTEN3,Deadtime Enable For n = 6" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 27. "DECAP3,Dual Edge Capture Mode Captures For n = 6" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 26. "DECAPEN3,Dual Edge Capture Mode Enable For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 25. "COMP3,Complement Of Channel (n) for n = 6" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 24. "COMBINE3,Combine Channels For n = 6" "0,1"
|
|
newline
|
|
bitfld.long 0x18 23. "MCOMBINE2,Modified Combine Mode For n = 4" "0,1"
|
|
bitfld.long 0x18 22. "FAULTEN2,Fault Control Enable For n = 4" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 21. "SYNCEN2,Synchronization Enable For n = 4" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 20. "DTEN2,Deadtime Enable For n = 4" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 19. "DECAP2,Dual Edge Capture Mode Captures For n = 4" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 18. "DECAPEN2,Dual Edge Capture Mode Enable For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 17. "COMP2,Complement Of Channel (n) For n = 4" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 16. "COMBINE2,Combine Channels For n = 4" "0,1"
|
|
newline
|
|
bitfld.long 0x18 15. "MCOMBINE1,Modified Combine Mode For n = 2" "0,1"
|
|
bitfld.long 0x18 14. "FAULTEN1,Fault Control Enable For n = 2" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 13. "SYNCEN1,Synchronization Enable For n = 2" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 12. "DTEN1,Deadtime Enable For n = 2" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 11. "DECAP1,Dual Edge Capture Mode Captures For n = 2" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 10. "DECAPEN1,Dual Edge Capture Mode Enable For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 9. "COMP1,Complement Of Channel (n) For n = 2" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 8. "COMBINE1,Combine Channels For n = 2" "0,1"
|
|
newline
|
|
bitfld.long 0x18 7. "MCOMBINE0,Modified Combine Mode For n = 0" "0,1"
|
|
bitfld.long 0x18 6. "FAULTEN0,Fault Control Enable For n = 0" "0: The fault control in this pair of channels is..,1: The fault control in this pair of channels is.."
|
|
newline
|
|
bitfld.long 0x18 5. "SYNCEN0,Synchronization Enable For n = 0" "0: The PWM synchronization in this pair of channels..,1: The PWM synchronization in this pair of channels.."
|
|
bitfld.long 0x18 4. "DTEN0,Deadtime Enable For n = 0" "0: The deadtime insertion in this pair of channels..,1: The deadtime insertion in this pair of channels.."
|
|
newline
|
|
bitfld.long 0x18 3. "DECAP0,Dual Edge Capture Mode Captures For n = 0" "0: The dual edge captures are inactive.,1: The dual edge captures are active."
|
|
bitfld.long 0x18 2. "DECAPEN0,Dual Edge Capture Mode Enable For n = 0" "0,1"
|
|
newline
|
|
bitfld.long 0x18 1. "COMP0,Complement Of Channel (n) For n = 0" "0: If the channels (n) and (n+1) are in Combine..,1: The channel (n+1) output is the complement of.."
|
|
bitfld.long 0x18 0. "COMBINE0,Combine Channels For n = 0" "0,1"
|
|
line.long 0x1C "DEADTIME,Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
line.long 0x20 "EXTTRIG,FTM External Trigger"
|
|
bitfld.long 0x20 9. "CH7TRIG,Channel 7 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 8. "CH6TRIG,Channel 6 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 7. "TRIGF,Channel Trigger Flag" "0: No channel trigger was generated.,1: A channel trigger was generated."
|
|
bitfld.long 0x20 6. "INITTRIGEN,Initialization Trigger Enable" "0: The generation of initialization trigger is..,1: The generation of initialization trigger is.."
|
|
newline
|
|
bitfld.long 0x20 5. "CH1TRIG,Channel 1 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 4. "CH0TRIG,Channel 0 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 3. "CH5TRIG,Channel 5 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 2. "CH4TRIG,Channel 4 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
newline
|
|
bitfld.long 0x20 1. "CH3TRIG,Channel 3 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
bitfld.long 0x20 0. "CH2TRIG,Channel 2 External Trigger Enable" "0: The generation of this external trigger is..,1: The generation of this external trigger is.."
|
|
line.long 0x24 "POL,Channels Polarity"
|
|
bitfld.long 0x24 7. "POL7,Channel 7 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 6. "POL6,Channel 6 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 5. "POL5,Channel 5 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 4. "POL4,Channel 4 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 3. "POL3,Channel 3 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 2. "POL2,Channel 2 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
newline
|
|
bitfld.long 0x24 1. "POL1,Channel 1 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
bitfld.long 0x24 0. "POL0,Channel 0 Polarity" "0: The channel polarity is active high.,1: The channel polarity is active low."
|
|
line.long 0x28 "FMS,Fault Mode Status"
|
|
bitfld.long 0x28 7. "FAULTF,Fault Detection Flag" "0: No fault condition was detected.,1: A fault condition was detected."
|
|
bitfld.long 0x28 6. "WPEN,Write Protection Enable" "0: Write protection is disabled. Write protected..,1: Write protection is enabled. Write protected.."
|
|
newline
|
|
rbitfld.long 0x28 5. "FAULTIN,Fault Inputs" "0: The logic OR of the enabled fault inputs is 0.,1: The logic OR of the enabled fault inputs is 1."
|
|
bitfld.long 0x28 3. "FAULTF3,Fault Detection Flag 3" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 2. "FAULTF2,Fault Detection Flag 2" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
bitfld.long 0x28 1. "FAULTF1,Fault Detection Flag 1" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
newline
|
|
bitfld.long 0x28 0. "FAULTF0,Fault Detection Flag 0" "0: No fault condition was detected at the fault..,1: A fault condition was detected at the fault input."
|
|
line.long 0x2C "FILTER,Input Capture Filter Control"
|
|
hexmask.long.byte 0x2C 12.--15. 1. "CH3FVAL,Channel 3 Input Filter"
|
|
hexmask.long.byte 0x2C 8.--11. 1. "CH2FVAL,Channel 2 Input Filter"
|
|
newline
|
|
hexmask.long.byte 0x2C 4.--7. 1. "CH1FVAL,Channel 1 Input Filter"
|
|
hexmask.long.byte 0x2C 0.--3. 1. "CH0FVAL,Channel 0 Input Filter"
|
|
line.long 0x30 "FLTCTRL,Fault Control"
|
|
bitfld.long 0x30 15. "FSTATE,Fault output state" "0: FTM outputs will be placed into safe values when..,1: FTM outputs will be tri-stated when fault event.."
|
|
hexmask.long.byte 0x30 8.--11. 1. "FFVAL,Fault Input Filter"
|
|
newline
|
|
bitfld.long 0x30 7. "FFLTR3EN,Fault Input 3 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 6. "FFLTR2EN,Fault Input 2 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 5. "FFLTR1EN,Fault Input 1 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
bitfld.long 0x30 4. "FFLTR0EN,Fault Input 0 Filter Enable" "0: Fault input filter is disabled.,1: Fault input filter is enabled."
|
|
newline
|
|
bitfld.long 0x30 3. "FAULT3EN,Fault Input 3 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 2. "FAULT2EN,Fault Input 2 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
newline
|
|
bitfld.long 0x30 1. "FAULT1EN,Fault Input 1 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
bitfld.long 0x30 0. "FAULT0EN,Fault Input 0 Enable" "0: Fault input is disabled.,1: Fault input is enabled."
|
|
group.long 0x84++0x1F
|
|
line.long 0x0 "CONF,Configuration"
|
|
bitfld.long 0x0 11. "ITRIGR,Initialization trigger on Reload Point" "0: Initialization trigger is generated on counter..,1: Initialization trigger is generated when a.."
|
|
bitfld.long 0x0 10. "GTBEOUT,Global Time Base Output" "0: A global time base signal generation is disabled.,1: A global time base signal generation is enabled."
|
|
newline
|
|
bitfld.long 0x0 9. "GTBEEN,Global Time Base Enable" "0: Use of an external global time base is disabled.,1: Use of an external global time base is enabled."
|
|
bitfld.long 0x0 6.--7. "BDMMODE,Debug Mode" "0,1,2,3"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--4. 1. "LDFQ,Frequency of the Reload Opportunities"
|
|
line.long 0x4 "FLTPOL,FTM Fault Input Polarity"
|
|
bitfld.long 0x4 3. "FLT3POL,Fault Input 3 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x4 2. "FLT2POL,Fault Input 2 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
newline
|
|
bitfld.long 0x4 1. "FLT1POL,Fault Input 1 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
bitfld.long 0x4 0. "FLT0POL,Fault Input 0 Polarity" "0: The fault input polarity is active high. A 1 at..,1: The fault input polarity is active low. A 0 at.."
|
|
line.long 0x8 "SYNCONF,Synchronization Configuration"
|
|
bitfld.long 0x8 20. "HWSOC,Software output control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the SWOCTRL..,1: A hardware trigger activates the SWOCTRL.."
|
|
bitfld.long 0x8 19. "HWINVC,Inverting control synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the INVCTRL..,1: A hardware trigger activates the INVCTRL.."
|
|
newline
|
|
bitfld.long 0x8 18. "HWOM,Output mask synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the OUTMASK..,1: A hardware trigger activates the OUTMASK.."
|
|
bitfld.long 0x8 17. "HWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate MOD HCR..,1: A hardware trigger activates MOD HCR CNTIN and.."
|
|
newline
|
|
bitfld.long 0x8 16. "HWRSTCNT,FTM counter synchronization is activated by a hardware trigger" "0: A hardware trigger does not activate the FTM..,1: A hardware trigger activates the FTM counter.."
|
|
bitfld.long 0x8 12. "SWSOC,Software output control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the SWOCTRL.."
|
|
newline
|
|
bitfld.long 0x8 11. "SWINVC,Inverting control synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the INVCTRL.."
|
|
bitfld.long 0x8 10. "SWOM,Output mask synchronization is activated by the software trigger" "0: The software trigger does not activate the..,1: The software trigger activates the OUTMASK.."
|
|
newline
|
|
bitfld.long 0x8 9. "SWWRBUF,MOD HCR CNTIN and CV registers synchronization is activated by the software trigger" "0: The software trigger does not activate MOD HCR..,1: The software trigger activates MOD HCR CNTIN and.."
|
|
bitfld.long 0x8 8. "SWRSTCNT,FTM counter synchronization is activated by the software trigger" "0: The software trigger does not activate the FTM..,1: The software trigger activates the FTM counter.."
|
|
newline
|
|
bitfld.long 0x8 7. "SYNCMODE,Synchronization Mode" "0: Legacy PWM synchronization is selected.,1: Enhanced PWM synchronization is selected."
|
|
bitfld.long 0x8 5. "SWOC,SWOCTRL Register Synchronization" "0: SWOCTRL register is updated with its buffer..,1: SWOCTRL register is updated with its buffer.."
|
|
newline
|
|
bitfld.long 0x8 4. "INVC,INVCTRL Register Synchronization" "0: INVCTRL register is updated with its buffer..,1: INVCTRL register is updated with its buffer.."
|
|
bitfld.long 0x8 2. "CNTINC,CNTIN Register Synchronization" "0: CNTIN register is updated with its buffer value..,1: CNTIN register is updated with its buffer value.."
|
|
newline
|
|
bitfld.long 0x8 0. "HWTRIGMODE,Hardware Trigger Mode" "0: FTM clears the TRIGj bit when the hardware..,1: FTM does not clear the TRIGj bit when the.."
|
|
line.long 0xC "INVCTRL,FTM Inverting Control"
|
|
bitfld.long 0xC 3. "INV3EN,Pair Channels 3 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0xC 2. "INV2EN,Pair Channels 2 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
newline
|
|
bitfld.long 0xC 1. "INV1EN,Pair Channels 1 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
bitfld.long 0xC 0. "INV0EN,Pair Channels 0 Inverting Enable" "0: Inverting is disabled.,1: Inverting is enabled."
|
|
line.long 0x10 "SWOCTRL,FTM Software Output Control"
|
|
bitfld.long 0x10 15. "CH7OCV,Channel 7 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 14. "CH6OCV,Channel 6 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 13. "CH5OCV,Channel 5 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 12. "CH4OCV,Channel 4 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 11. "CH3OCV,Channel 3 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 10. "CH2OCV,Channel 2 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 9. "CH1OCV,Channel 1 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
bitfld.long 0x10 8. "CH0OCV,Channel 0 Software Output Control Value" "0: The software output control forces 0 to the..,1: The software output control forces 1 to the.."
|
|
newline
|
|
bitfld.long 0x10 7. "CH7OC,Channel 7 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 6. "CH6OC,Channel 6 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 5. "CH5OC,Channel 5 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 4. "CH4OC,Channel 4 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 3. "CH3OC,Channel 3 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 2. "CH2OC,Channel 2 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
newline
|
|
bitfld.long 0x10 1. "CH1OC,Channel 1 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
bitfld.long 0x10 0. "CH0OC,Channel 0 Software Output Control Enable" "0: The channel output is not affected by software..,1: The channel output is affected by software.."
|
|
line.long 0x14 "PWMLOAD,FTM PWM Load"
|
|
bitfld.long 0x14 11. "GLDOK,Global Load OK" "0: No action.,1: LDOK bit is set."
|
|
bitfld.long 0x14 10. "GLEN,Global Load Enable" "0: Global Load Ok disabled.,1: Global Load OK enabled. A pulse event on the.."
|
|
newline
|
|
bitfld.long 0x14 9. "LDOK,Load Enable" "0: Loading updated values is disabled.,1: Loading updated values is enabled."
|
|
bitfld.long 0x14 8. "HCSEL,Half Cycle Select" "0: Half cycle reload is disabled and it is not..,1: Half cycle reload is enabled and it is.."
|
|
newline
|
|
bitfld.long 0x14 7. "CH7SEL,Channel 7 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 6. "CH6SEL,Channel 6 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 5. "CH5SEL,Channel 5 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 4. "CH4SEL,Channel 4 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 3. "CH3SEL,Channel 3 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 2. "CH2SEL,Channel 2 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
newline
|
|
bitfld.long 0x14 1. "CH1SEL,Channel 1 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
bitfld.long 0x14 0. "CH0SEL,Channel 0 Select" "0: Channel match is not included as a reload..,1: Channel match is included as a reload opportunity."
|
|
line.long 0x18 "HCR,Half Cycle Register"
|
|
hexmask.long.word 0x18 0.--15. 1. "HCVAL,Half Cycle Value"
|
|
line.long 0x1C "PAIR0DEADTIME,Pair 0 Deadtime Configuration"
|
|
hexmask.long.byte 0x1C 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x1C 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x1C 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xA8++0x3
|
|
line.long 0x0 "PAIR1DEADTIME,Pair 1 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB0++0x3
|
|
line.long 0x0 "PAIR2DEADTIME,Pair 2 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
group.long 0xB8++0x3
|
|
line.long 0x0 "PAIR3DEADTIME,Pair 3 Deadtime Configuration"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DTVALEX,Extended Deadtime Value"
|
|
bitfld.long 0x0 6.--7. "DTPS,Deadtime Prescaler Value" "0: Divide the FTM input clock by 1.,1: Divide the FTM input clock by 1.,2: Divide the FTM input clock by 4.,3: Divide the FTM input clock by 16."
|
|
newline
|
|
hexmask.long.byte 0x0 0.--5. 1. "DTVAL,Deadtime Value"
|
|
tree.end
|
|
tree.end
|
|
tree "GDU_AE (Gate Drive Unit)"
|
|
base ad:0x180
|
|
group.byte 0x0++0x0
|
|
line.byte 0x0 "INTF,Interrupt Flag"
|
|
eventfld.byte 0x0 7. "HDHVDIF,HD High Voltage Detect Interrupt Flag" "0: HD voltage below the threshold,1: HD voltage above the threshold"
|
|
eventfld.byte 0x0 6. "DHSIF2,Desaturation High-Side 2 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 5. "DHSIF1,Desaturation High-Side 1 Interrupt Flag" "0: No error,1: Error"
|
|
newline
|
|
eventfld.byte 0x0 4. "DHSIF0,Desaturation High-Side 0 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 2. "DLSIF2,Desaturation Low-Side 2 Interrupt Flag" "0: No error,1: Error"
|
|
eventfld.byte 0x0 1. "DLSIF1,Desaturation Low-Side 1 Interrupt Flag" "0: No error,1: Error"
|
|
newline
|
|
eventfld.byte 0x0 0. "DLSIF0,Desaturation Low-Side 0 Interrupt Flag" "0: No error,1: Error"
|
|
group.byte 0x2++0x0
|
|
line.byte 0x0 "INTEN,Interrupt Enable"
|
|
bitfld.byte 0x0 7. "HDHVDIE,HD High Voltage Detect Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 6. "DHSIE2,Desaturation High-Side Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 5. "DHSIE1,Desaturation High-Side Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.byte 0x0 4. "DHSIE0,Desaturation High-Side 0 Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 2. "DLSIE2,Desaturation Low-Side 2 Interrupt Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 1. "DLSIE1,Desaturation Low-Side 1 Interrupt Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.byte 0x0 0. "DLSIE0,Desaturation Low-Side 0 Interrupt Enable" "0: Disables,1: Enables"
|
|
rgroup.word 0x4++0x1
|
|
line.word 0x0 "STAT,Status"
|
|
bitfld.word 0x0 7. "HDHVDS,HD High Voltage Detect Status" "0: HD voltage below the threshold,1: HD voltage above the threshold"
|
|
bitfld.word 0x0 6. "DHSES2,Desaturation High-Side 2 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 5. "DHSES1,Desaturation High-Side 1 Error Status" "0: No error,1: Error"
|
|
newline
|
|
bitfld.word 0x0 4. "DHSES0,Desaturation High-Side 0 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 2. "DLSES2,Desaturation Low-Side 2 Error Status" "0: No error,1: Error"
|
|
bitfld.word 0x0 1. "DLSES1,Desaturation Low-Side 1 Error Status" "0: No error,1: Error"
|
|
newline
|
|
bitfld.word 0x0 0. "DLSES0,Desaturation Low-Side 0 Error Status" "0: No error,1: Error"
|
|
group.word 0x6++0x1
|
|
line.word 0x0 "CTL,Control"
|
|
bitfld.word 0x0 7. "CFGEN,Configuration Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 6. "SSTEN,Safe State Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 5. "RWEN,Register Write Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.word 0x0 4. "IRTSW,Iref Trimming by Software" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 3. "DMEN,Delay Measurement Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 2. "BOOSTEN,Boost Enable" "0: Disables,1: Enables"
|
|
newline
|
|
bitfld.word 0x0 1. "CPEN,Charge Pump Enable" "0: Disables,1: Enables"
|
|
bitfld.word 0x0 0. "GDUEN,Gate Driver Unit Enable" "0: Disables,1: Enables"
|
|
group.byte 0x8++0x0
|
|
line.byte 0x0 "CFG,Configuration"
|
|
bitfld.byte 0x0 7. "SYNCEN,Synchronization Enable" "0: Disables,1: Enables"
|
|
bitfld.byte 0x0 1. "HDHSDIV,HD and High-Side Divider" "0: Low,1: High"
|
|
bitfld.byte 0x0 0. "HDHVDCFG,HD High Voltage Detect" "0: Low voltage,1: High voltage"
|
|
group.byte 0xA++0x0
|
|
line.byte 0x0 "EACFG,Error Reaction"
|
|
bitfld.byte 0x0 2. "DSA,Desaturation Action" "0: Turn off only the desaturated FET.,1: Turn off all FETs"
|
|
bitfld.byte 0x0 1. "OCA,Overcurrent Action" "0: Low-side gate drivers on,1: Low-side gate drivers off"
|
|
bitfld.byte 0x0 0. "HVDA,High Voltage Detection Action" "0: Turn on all low-side gate drivers,1: Turn off all low-side gate drivers"
|
|
group.word 0xC++0x3
|
|
line.word 0x0 "BOOSTCFG,Boost"
|
|
bitfld.word 0x0 8.--10. "BOCL,Boost Current Limit" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 2.--4. "BOCD,Boost Clock Divider" "0,1,2,3,4,5,6,7"
|
|
bitfld.word 0x0 0.--1. "BODC,Boost Duty Cycle" "0: 50%,1: 25%,2: 75%,?"
|
|
line.word 0x2 "BTCFG,Blanking Time"
|
|
hexmask.word 0x2 0.--8. 1. "BT,Blanking Time Adjustment"
|
|
group.long 0x10++0xF
|
|
line.long 0x0 "HSSRON,High-Side Slew Rate On"
|
|
hexmask.long.byte 0x0 24.--30. 1. "HSTONT_P2,High-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0x0 16.--22. 1. "HSTONT_P1,High-Side Turn On Time Point 1"
|
|
hexmask.long.byte 0x0 10.--14. 1. "HSTONC_P3,High-Side Turn On Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x0 5.--9. 1. "HSTONC_P2,High-Side Turn On Current Time Point 2"
|
|
hexmask.long.byte 0x0 0.--4. 1. "HSTONC_P1,High-Side Turn On Current Time Point 1"
|
|
line.long 0x4 "HSSROFF,High-Side Slew Rate Off"
|
|
hexmask.long.byte 0x4 24.--30. 1. "HSTOFFT_P2,High-Side Turn Off Time Point 2"
|
|
hexmask.long.byte 0x4 16.--22. 1. "HSTOFFT_P1,High-Side Turn Off Time Point 1"
|
|
hexmask.long.byte 0x4 10.--14. 1. "HSTOFFC_P3,High-Side Turn Off Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x4 5.--9. 1. "HSTOFFC_P2,High-Side Turn Off Current Time Point 2"
|
|
hexmask.long.byte 0x4 0.--4. 1. "HSTOFFC_P1,High-Side Turn Off Current Time Point 1"
|
|
line.long 0x8 "LSSRON,Low-Side Slew Rate On"
|
|
hexmask.long.byte 0x8 24.--30. 1. "LSTONT_P2,Low-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0x8 16.--22. 1. "LSTONT_P1,Low-Side Turn On Time Point 1"
|
|
hexmask.long.byte 0x8 10.--14. 1. "LSTONC_P3,Low-Side Turn On Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0x8 5.--9. 1. "LSTONC_P2,Low-Side Turn On Current Time Point 2"
|
|
hexmask.long.byte 0x8 0.--4. 1. "LSTONC_P1,Low-Side Turn On Current Time Point 1"
|
|
line.long 0xC "LSSROFF,Low-Side Slew Rate Off"
|
|
hexmask.long.byte 0xC 24.--30. 1. "LSTOFFT_P2,Low-Side Turn On Time Point 2"
|
|
hexmask.long.byte 0xC 16.--22. 1. "LSTOFFT_P1,Low-Side Turn Off Time Point 1"
|
|
hexmask.long.byte 0xC 10.--14. 1. "LSTOFFC_P3,Low-Side Turn Off Current Time Point 3"
|
|
newline
|
|
hexmask.long.byte 0xC 5.--9. 1. "LSTOFFC_P2,Low-Side Turn Off Current Time Point 2"
|
|
hexmask.long.byte 0xC 0.--4. 1. "LSTOFFC_P1,Low-Side Turn Off Current Time Point 1"
|
|
group.byte 0x20++0x0
|
|
line.byte 0x0 "OFFSDCFG,Off-State Diagnostic"
|
|
bitfld.byte 0x0 6. "OSDPU2,Off-State Diagnostic HS2 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
bitfld.byte 0x0 5. "OSDPU1,Off-State Diagnostic HS1 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
bitfld.byte 0x0 4. "OSDPU0,Off-State Diagnostic HS0 Pull Up" "0: Does not pull up,1: Pulls up"
|
|
newline
|
|
bitfld.byte 0x0 2. "OSDPD2,Off-State Diagnostic HS2 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
bitfld.byte 0x0 1. "OSDPD1,Off-State Diagnostic HS1 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
bitfld.byte 0x0 0. "OSDPD0,Off-State Diagnostic HS0 Pull Down" "0: Does not pull down,1: Pulls down"
|
|
group.word 0x24++0x1
|
|
line.word 0x0 "DSCFG,Desaturation Level"
|
|
bitfld.word 0x0 12.--13. "DSFHS,Desaturation Filter High-Side" "0: 200 ns,1: 600 ns,2: 1000 ns,3: 1400 ns"
|
|
bitfld.word 0x0 8.--9. "DSFLS,Desaturation Filter Low-Side" "0: 200 ns,1: 600 ns,2: 1000 ns,3: 1400 ns"
|
|
bitfld.word 0x0 4.--6. "DSLHS,Desaturation Level High-Side" "0: 0.15 V,1: 0.25 V,2: 0.35 V,3: 0.45 V,4: 0.7 V,5: 0.95 V,6: 1.2 V,7: 1.45 V"
|
|
newline
|
|
bitfld.word 0x0 0.--2. "DSLLS,Desaturation Level Low-Side" "0: 0.15 V,1: 0.25 V,2: 0.35 V,3: 0.45 V,4: 0.7 V,5: 0.95 V,6: 1.2 V,7: 1.45 V"
|
|
group.long 0x28++0x3
|
|
line.long 0x0 "CPCFG,Charge Pump"
|
|
bitfld.long 0x0 24.--25. "CPCDT,Charge Pump Charge Discharge Timing" "0: 250 ns,1: 500 ns,2: 750 ns,3: 1 us"
|
|
hexmask.long.byte 0x0 16.--21. 1. "CPT,Charge Pump VCP On switch Timing"
|
|
hexmask.long.word 0x0 0.--9. 1. "CPCD,Charge Pump Clock Divider"
|
|
rgroup.word 0x2C++0x1
|
|
line.word 0x0 "DLYMR,Delay Measurement Result"
|
|
bitfld.word 0x0 15. "DATAVAL,Data Valid" "0,1"
|
|
hexmask.word.byte 0x0 0.--6. 1. "DELAY,Delay"
|
|
group.word 0x2E++0x1
|
|
line.word 0x0 "DLYMCFG,Delay Measurement"
|
|
bitfld.word 0x0 3. "EDGESEL,Edge Selection" "0: negedge,1: posedge"
|
|
bitfld.word 0x0 0.--2. "CHSEL,Channel Selection" "0: 0,1: 1,2: 2,3: 3,4: 4,5: 5,?,?"
|
|
group.byte 0x30++0x0
|
|
line.byte 0x0 "SUPCFG,Startup Configuration"
|
|
bitfld.byte 0x0 0. "SUP,Startup" "0: On,1: Off"
|
|
group.long 0x34++0x3
|
|
line.long 0x0 "IRT,Iref Trimming"
|
|
bitfld.long 0x0 19.--21. "IRT1P2,Iref Trimming HG2" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 16.--18. "IRT0P2,Iref Trimming LG2" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 11.--13. "IRT1P1,Iref Trimming HG1" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
newline
|
|
bitfld.long 0x0 8.--10. "IRT0P1,Iref Trimming LG1" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 3.--5. "IRT1P0,Iref Trimming HG0" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
bitfld.long 0x0 0.--2. "IRT0P0,Iref Trimming LG0" "0: 62.5% (minimum current),1: 75%,2: 87.5%,3: 100% (10 uA at nominal process),4: 112.5%,5: 125%,6: 137.5%,7: 150% (maximum current)"
|
|
tree.end
|
|
tree "GPIO (General-Purpose I/Os)"
|
|
base ad:0x0
|
|
tree "PTA"
|
|
base ad:0x400FF000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output"
|
|
line.long 0x4 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x4 0.--31. 1. "PTSO,Port Set Output"
|
|
line.long 0x8 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x8 0.--31. 1. "PTCO,Port Clear Output"
|
|
line.long 0xC "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0xC 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction"
|
|
line.long 0x4 "PIDR,Port Input Disable Register"
|
|
hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable"
|
|
tree.end
|
|
tree "PTB"
|
|
base ad:0x400FF040
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output"
|
|
line.long 0x4 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x4 0.--31. 1. "PTSO,Port Set Output"
|
|
line.long 0x8 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x8 0.--31. 1. "PTCO,Port Clear Output"
|
|
line.long 0xC "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0xC 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction"
|
|
line.long 0x4 "PIDR,Port Input Disable Register"
|
|
hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable"
|
|
tree.end
|
|
tree "PTC"
|
|
base ad:0x400FF080
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output"
|
|
line.long 0x4 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x4 0.--31. 1. "PTSO,Port Set Output"
|
|
line.long 0x8 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x8 0.--31. 1. "PTCO,Port Clear Output"
|
|
line.long 0xC "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0xC 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction"
|
|
line.long 0x4 "PIDR,Port Input Disable Register"
|
|
hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable"
|
|
tree.end
|
|
tree "PTD"
|
|
base ad:0x400FF0C0
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output"
|
|
line.long 0x4 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x4 0.--31. 1. "PTSO,Port Set Output"
|
|
line.long 0x8 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x8 0.--31. 1. "PTCO,Port Clear Output"
|
|
line.long 0xC "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0xC 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction"
|
|
line.long 0x4 "PIDR,Port Input Disable Register"
|
|
hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable"
|
|
tree.end
|
|
tree "PTE"
|
|
base ad:0x400FF100
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PDOR,Port Data Output Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDO,Port Data Output"
|
|
line.long 0x4 "PSOR,Port Set Output Register"
|
|
hexmask.long 0x4 0.--31. 1. "PTSO,Port Set Output"
|
|
line.long 0x8 "PCOR,Port Clear Output Register"
|
|
hexmask.long 0x8 0.--31. 1. "PTCO,Port Clear Output"
|
|
line.long 0xC "PTOR,Port Toggle Output Register"
|
|
hexmask.long 0xC 0.--31. 1. "PTTO,Port Toggle Output"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "PDIR,Port Data Input Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDI,Port Data Input"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "PDDR,Port Data Direction Register"
|
|
hexmask.long 0x0 0.--31. 1. "PDD,Port Data Direction"
|
|
line.long 0x4 "PIDR,Port Input Disable Register"
|
|
hexmask.long 0x4 0.--31. 1. "PID,Port Input Disable"
|
|
tree.end
|
|
tree.end
|
|
tree "HVI_AE (High Voltage Input)"
|
|
base ad:0x200
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "INTF,Interrupt Flags"
|
|
eventfld.long 0x0 17. "DINIF1,Digital Input Interrupt Flag 1" "0: HVI n did not detect an event on its digital..,1: HVI n detected an event on its digital input."
|
|
eventfld.long 0x0 16. "DINIF0,Digital Input Interrupt Flag 0" "0: HVI n did not detect an event on its digital..,1: HVI n detected an event on its digital input."
|
|
newline
|
|
eventfld.long 0x0 8. "HDIF0,High Detect Interrupt Flag 0" "0: VM n did not detect a high voltage since the..,1: VM n detected a high voltage since the last.."
|
|
eventfld.long 0x0 0. "LDIF0,Low Detect Interrupt Flag 0" "0: VM n did not detect a low voltage since the last..,1: VM n detected a low voltage since the last.."
|
|
line.long 0x4 "INTEN,Interrupt Enables"
|
|
bitfld.long 0x4 17. "DINIE1,Digital Input Interrupt Enable 1" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 16. "DINIE0,Digital Input Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 8. "HDIE0,High Detect Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 0. "LDIE0,Low Detect Interrupt Enable 0" "0: Disable interrupt,1: Enable interrupt"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "STAT,Status"
|
|
bitfld.long 0x0 17. "DINS1,Digital Input Status 1" "0: The digital input is in the inactive state with..,1: The digital input is in the active state with.."
|
|
bitfld.long 0x0 16. "DINS0,Digital Input Status 0" "0: The digital input is in the inactive state with..,1: The digital input is in the active state with.."
|
|
newline
|
|
bitfld.long 0x0 8. "HDS0,High Detect Status 0" "0: The high voltage monitor does not detect a..,1: The high voltage monitor does detect a voltage.."
|
|
bitfld.long 0x0 0. "LDS0,Low Detect Status 0" "0: The low voltage monitor does not detect a..,1: The low voltage monitor does detect a voltage.."
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "GCTRL,Global Control"
|
|
bitfld.long 0x0 3.--4. "AINSEL,Analog Input Selection" "0: The analog output is high ohmic.,1: The buffered input is the analog output signal.,2: The down-divided buffered high voltage input is..,3: The unbuffered input is the analog output signal."
|
|
bitfld.long 0x0 0.--2. "AINEN,Analog Input Enable" "0: HVI0 is driving the analog output.,1: HVI1 is driving the analog output.,?,?,?,?,?,?"
|
|
group.word 0x14++0x1
|
|
line.word 0x0 "UCFG0,Unit Configuration 0"
|
|
bitfld.word 0x0 9. "DINPO,Digital Input Polarity" "0: An event is created when the digital input is..,1: An event is created when the digital input is.."
|
|
bitfld.word 0x0 8. "DINEN,Digital Input Enable" "0: Disable the digital input,1: Enable the digital input"
|
|
newline
|
|
bitfld.word 0x0 3.--4. "DIVSEL,Divider Select" "0: Divide input voltage by 2,1: Divide input voltage by 6,2: Divide input voltage by 11,3: Divide input voltage by 16"
|
|
bitfld.word 0x0 2. "PUEN,Pull Up Enable" "0: Disable pull up,1: Enable pull up"
|
|
newline
|
|
bitfld.word 0x0 1. "PDEN,Pull Down Enable" "0: Disable pull down. Voltage Division = 1,1: Enable pull down"
|
|
group.byte 0x16++0x1
|
|
line.byte 0x0 "UCTRL0,Unit Control 0"
|
|
bitfld.byte 0x0 1. "CFGEN,Configuration Enable" "0: instance 0 is out of configuration mode,1: instance 0 is in configuration mode"
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: Disabled. All features of HVI0 are turned-off.,1: Enabled. All features of HVI0 are used as.."
|
|
line.byte 0x1 "VMCFG0,Voltage Monitor Configuration 0"
|
|
bitfld.byte 0x1 7. "VMINSEL,Voltage Monitor Input Select" "0: The high voltage input divided down by the..,1: The sense voltage is monitored."
|
|
bitfld.byte 0x1 5. "HDREFSEL,High Detect Reference Select" "0: Select the lowest reference voltage level (see..,1: Select the highest reference voltage level (see.."
|
|
newline
|
|
bitfld.byte 0x1 2.--3. "LDREFSEL,Low Detect Reference Voltage Select" "0: select the lowest reference voltage level (see..,1: select the second lowest reference voltage level..,2: select the second highest reference voltage..,3: select the highest reference voltage level (see.."
|
|
bitfld.byte 0x1 1. "HDEN,High Detect Enable" "0: Turn off the high voltage detect comparator,1: Enable the high voltage detect comparator"
|
|
newline
|
|
bitfld.byte 0x1 0. "LDEN,Low Detect Enable" "0: Turn off the low voltage detection,1: Enable the low voltage detection"
|
|
group.word 0x18++0x1
|
|
line.word 0x0 "UCFG1,Unit Configuration 1"
|
|
bitfld.word 0x0 9. "DINPO,Digital Input Polarity" "0: An event is created when the digital input is..,1: An event is created when the digital input is.."
|
|
bitfld.word 0x0 8. "DINEN,Digital Input Enable" "0: Disable the digital input,1: Enable the digital input"
|
|
newline
|
|
bitfld.word 0x0 3.--4. "DIVSEL,Divider Select" "0: Divide input voltage by 2,1: Divide input voltage by 6,2: Divide input voltage by 11,3: Divide input voltage by 16"
|
|
bitfld.word 0x0 2. "PUEN,Pull Up Enable" "0: Disable pull up,1: Enable pull up"
|
|
newline
|
|
bitfld.word 0x0 1. "PDEN,Pull Down Enable" "0: Disable pull down. Voltage Division = 1,1: Enable pull down"
|
|
group.byte 0x1A++0x0
|
|
line.byte 0x0 "UCTRL1,Unit Control 1"
|
|
bitfld.byte 0x0 1. "CFGEN,Configuration Enable" "0: instance 1 is out of configuration mode,1: instance 1 is in configuration mode"
|
|
bitfld.byte 0x0 0. "EN,Enable" "0: Disabled. All features of HVI1 are turned-off.,1: Enabled. All features of HVI1 are used as.."
|
|
tree.end
|
|
tree "LMEM (Local Memory Controller)"
|
|
base ad:0xE0082000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "PCCCR,Cache control register"
|
|
bitfld.long 0x0 31. "GO,Initiate Cache Command" "0: Write: no effect. Read: no cache command active.,1: Write: initiate command indicated by bits 27-24."
|
|
bitfld.long 0x0 27. "PUSHW1,Push Way 1" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 26. "INVW1,Invalidate Way 1" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 25. "PUSHW0,Push Way 0" "0: No operation,1: When setting the GO bit push all modified lines.."
|
|
newline
|
|
bitfld.long 0x0 24. "INVW0,Invalidate Way 0" "0: No operation,1: When setting the GO bit invalidate all lines in.."
|
|
bitfld.long 0x0 3. "PCCR3,Forces no allocation on cache misses" "0: Allocation on cache misses,1: Forces no allocation on cache misses (must also.."
|
|
newline
|
|
bitfld.long 0x0 2. "PCCR2,Forces all cacheable spaces to write through" "0: Does NOT force all cacheable spaces to write..,1: Forces all cacheable spaces to write through"
|
|
bitfld.long 0x0 0. "ENCACHE,Cache enable" "0: Cache disabled,1: Cache enabled"
|
|
line.long 0x4 "PCCLCR,Cache line control register"
|
|
bitfld.long 0x4 27. "LACC,Line access type" "0: Read,1: Write"
|
|
bitfld.long 0x4 26. "LADSEL,Line Address Select" "0: Cache address,1: Physical address"
|
|
newline
|
|
bitfld.long 0x4 24.--25. "LCMD,Line Command" "0: Search and read or write,1: Invalidate,2: Push,3: Clear"
|
|
bitfld.long 0x4 22. "LCWAY,Line Command Way" "0,1"
|
|
newline
|
|
bitfld.long 0x4 21. "LCIMB,Line Command Initial Modified Bit" "0,1"
|
|
bitfld.long 0x4 20. "LCIVB,Line Command Initial Valid Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 16. "TDSEL,Tag/Data Select" "0: Data,1: Tag"
|
|
bitfld.long 0x4 14. "WSEL,Way select" "0: Way 0,1: Way 1"
|
|
newline
|
|
hexmask.long.word 0x4 2.--13. 1. "CACHEADDR,Cache address"
|
|
bitfld.long 0x4 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0x8 "PCCSAR,Cache search address register"
|
|
hexmask.long 0x8 2.--31. 1. "PHYADDR,Physical Address"
|
|
bitfld.long 0x8 0. "LGO,Initiate Cache Line Command" "0: Write: no effect. Read: no line command active.,1: Write: initiate line command indicated by bits.."
|
|
line.long 0xC "PCCCVR,Cache read/write value register"
|
|
hexmask.long 0xC 0.--31. 1. "DATA,Cache read/write Data"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "PCCRMR,Cache regions mode register"
|
|
bitfld.long 0x0 30.--31. "R0,Region 0 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 28.--29. "R1,Region 1 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "R2,Region 2 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 24.--25. "R3,Region 3 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 22.--23. "R4,Region 4 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 20.--21. "R5,Region 5 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 18.--19. "R6,Region 6 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 16.--17. "R7,Region 7 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 14.--15. "R8,Region 8 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 12.--13. "R9,Region 9 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 10.--11. "R10,Region 10 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 8.--9. "R11,Region 11 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 6.--7. "R12,Region 12 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 4.--5. "R13,Region 13 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
newline
|
|
bitfld.long 0x0 2.--3. "R14,Region 14 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
bitfld.long 0x0 0.--1. "R15,Region 15 mode" "0: Non-cacheable,1: Non-cacheable,2: Write-through,3: Write-back"
|
|
tree.end
|
|
tree "LPI2C (Low Power Inter-Integrated Circuit)"
|
|
base ad:0x40066000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--11. 1. "MRXFIFO,Master Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--3. 1. "MTXFIFO,Master Transmit FIFO Size"
|
|
group.long 0x10++0x1F
|
|
line.long 0x0 "MCR,Master Control Register"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: Master is disabled in debug mode,1: Master is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze mode enable" "0: Master is enabled in Doze mode,1: Master is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Master logic is not reset,1: Master logic is reset"
|
|
bitfld.long 0x0 0. "MEN,Master Enable" "0: Master logic is disabled,1: Master logic is enabled"
|
|
line.long 0x4 "MSR,Master Status Register"
|
|
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle,1: I2C Bus is busy"
|
|
rbitfld.long 0x4 24. "MBF,Master Busy Flag" "0: I2C Master is idle,1: I2C Master is busy"
|
|
newline
|
|
eventfld.long 0x4 14. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
eventfld.long 0x4 13. "PLTF,Pin Low Timeout Flag" "0: Pin low timeout has not occurred or is disabled,1: Pin low timeout has occurred"
|
|
newline
|
|
eventfld.long 0x4 12. "FEF,FIFO Error Flag" "0: No error,1: Master sending or receiving data without a START.."
|
|
eventfld.long 0x4 11. "ALF,Arbitration Lost Flag" "0: Master has not lost arbitration,1: Master has lost arbitration"
|
|
newline
|
|
eventfld.long 0x4 10. "NDF,NACK Detect Flag" "0: Unexpected NACK was not detected,1: Unexpected NACK was detected"
|
|
eventfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Master has not generated a STOP condition,1: Master has generated a STOP condition"
|
|
newline
|
|
eventfld.long 0x4 8. "EPF,End Packet Flag" "0: Master has not generated a STOP or Repeated..,1: Master has generated a STOP or Repeated START.."
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data is not requested,1: Transmit data is requested"
|
|
line.long 0x8 "MIER,Master Interrupt Enable Register"
|
|
bitfld.long 0x8 14. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 13. "PLTIE,Pin Low Timeout Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 12. "FEIE,FIFO Error Interrupt Enable" "0: Enabled,1: Disabled"
|
|
bitfld.long 0x8 11. "ALIE,Arbitration Lost Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 10. "NDIE,NACK Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 8. "EPIE,End Packet Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "MDER,Master DMA Enable Register"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "MCFGR0,Master Configuration Register 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is pin HREQ,1: Host request input is input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: Active low,1: Active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request input is disabled,1: Host request input is enabled"
|
|
line.long 0x14 "MCFGR1,Master Configuration Register 1"
|
|
bitfld.long 0x14 24.--26. "PINCFG,Pin Configuration" "0: 2-pin open drain mode,1: 2-pin output only mode (ultra-fast mode),2: 2-pin push-pull mode,3: 4-pin push-pull mode,4: 2-pin open drain mode with separate LPI2C slave,5: 2-pin output only mode (ultra-fast mode) with..,6: 2-pin push-pull mode with separate LPI2C slave,7: 4-pin push-pull mode (inverted outputs)"
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: Match is enabled (1st data word equals MATCH0 OR..,3: Match is enabled (any data word equals MATCH0 OR..,4: Match is enabled (1st data word equals MATCH0..,5: Match is enabled (any data word equals MATCH0..,6: Match is enabled (1st data word AND MATCH1..,7: Match is enabled (any data word AND MATCH1.."
|
|
newline
|
|
bitfld.long 0x14 10. "TIMECFG,Timeout Configuration" "0: Pin Low Timeout Flag will set if SCL is low for..,1: Pin Low Timeout Flag will set if either SCL or.."
|
|
bitfld.long 0x14 9. "IGNACK,IGNACK" "0: LPI2C Master will receive ACK and NACK normally,1: LPI2C Master will treat a received NACK as if it.."
|
|
newline
|
|
bitfld.long 0x14 8. "AUTOSTOP,Automatic STOP Generation" "0: No effect,1: STOP condition is automatically generated.."
|
|
bitfld.long 0x14 0.--2. "PRESCALE,Prescaler" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
line.long 0x18 "MCFGR2,Master Configuration Register 2"
|
|
hexmask.long.byte 0x18 24.--27. 1. "FILTSDA,Glitch Filter SDA"
|
|
hexmask.long.byte 0x18 16.--19. 1. "FILTSCL,Glitch Filter SCL"
|
|
newline
|
|
hexmask.long.word 0x18 0.--11. 1. "BUSIDLE,Bus Idle Timeout"
|
|
line.long 0x1C "MCFGR3,Master Configuration Register 3"
|
|
hexmask.long.word 0x1C 8.--19. 1. "PINLOW,Pin Low Timeout"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "MDMR,Master Data Match Register"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MATCH1,Match 1 Value"
|
|
hexmask.long.byte 0x0 0.--7. 1. "MATCH0,Match 0 Value"
|
|
group.long 0x48++0x3
|
|
line.long 0x0 "MCCR0,Master Clock Configuration Register 0"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x50++0x3
|
|
line.long 0x0 "MCCR1,Master Clock Configuration Register 1"
|
|
hexmask.long.byte 0x0 24.--29. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SETHOLD,Setup Hold Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--13. 1. "CLKHI,Clock High Period"
|
|
hexmask.long.byte 0x0 0.--5. 1. "CLKLO,Clock Low Period"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "MFCR,Master FIFO Control Register"
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "MFSR,Master FIFO Status Register"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
wgroup.long 0x60++0x3
|
|
line.long 0x0 "MTDR,Master Transmit Data Register"
|
|
bitfld.long 0x0 8.--10. "CMD,Command Data" "0: Transmit DATA[7:0],1: Receive (DATA[7:0] + 1) bytes,2: Generate STOP condition,3: Receive and discard (DATA[7:0] + 1) bytes,4: Generate (repeated) START and transmit address..,5: Generate (repeated) START and transmit address..,6: Generate (repeated) START and transmit address..,7: Generate (repeated) START and transmit address.."
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x3
|
|
line.long 0x0 "MRDR,Master Receive Data Register"
|
|
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: Receive FIFO is not empty,1: Receive FIFO is empty"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
|
|
group.long 0x110++0xF
|
|
line.long 0x0 "SCR,Slave Control Register"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive Data Register is now empty"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit Data Register is now empty"
|
|
newline
|
|
bitfld.long 0x0 5. "FILTDZ,Filter Doze Enable" "0: Filter remains enabled in Doze mode,1: Filter is disabled in Doze mode"
|
|
bitfld.long 0x0 4. "FILTEN,Filter Enable" "0: Disable digital filter and output delay counter..,1: Enable digital filter and output delay counter.."
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Slave mode logic is not reset,1: Slave mode logic is reset"
|
|
bitfld.long 0x0 0. "SEN,Slave Enable" "0: I2C Slave mode is disabled,1: I2C Slave mode is enabled"
|
|
line.long 0x4 "SSR,Slave Status Register"
|
|
rbitfld.long 0x4 25. "BBF,Bus Busy Flag" "0: I2C Bus is idle,1: I2C Bus is busy"
|
|
rbitfld.long 0x4 24. "SBF,Slave Busy Flag" "0: I2C Slave is idle,1: I2C Slave is busy"
|
|
newline
|
|
rbitfld.long 0x4 15. "SARF,SMBus Alert Response Flag" "0: SMBus Alert Response is disabled or not detected,1: SMBus Alert Response is enabled and detected"
|
|
rbitfld.long 0x4 14. "GCF,General Call Flag" "0: Slave has not detected the General Call Address..,1: Slave has detected the General Call Address"
|
|
newline
|
|
rbitfld.long 0x4 13. "AM1F,Address Match 1 Flag" "0: Have not received an ADDR1 or ADDR0/ADDR1 range..,1: Have received an ADDR1 or ADDR0/ADDR1 range.."
|
|
rbitfld.long 0x4 12. "AM0F,Address Match 0 Flag" "0: Have not received an ADDR0 matching address,1: Have received an ADDR0 matching address"
|
|
newline
|
|
eventfld.long 0x4 11. "FEF,FIFO Error Flag" "0: FIFO underflow or overflow was not detected,1: FIFO underflow or overflow was detected"
|
|
eventfld.long 0x4 10. "BEF,Bit Error Flag" "0: Slave has not detected a bit error,1: Slave has detected a bit error"
|
|
newline
|
|
eventfld.long 0x4 9. "SDF,STOP Detect Flag" "0: Slave has not detected a STOP condition,1: Slave has detected a STOP condition"
|
|
eventfld.long 0x4 8. "RSF,Repeated Start Flag" "0: Slave has not detected a Repeated START condition,1: Slave has detected a Repeated START condition"
|
|
newline
|
|
rbitfld.long 0x4 3. "TAF,Transmit ACK Flag" "0: Transmit ACK/NACK is not required,1: Transmit ACK/NACK is required"
|
|
rbitfld.long 0x4 2. "AVF,Address Valid Flag" "0: Address Status Register is not valid,1: Address Status Register is valid"
|
|
newline
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive data is not ready,1: Receive data is ready"
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "SIER,Slave Interrupt Enable Register"
|
|
bitfld.long 0x8 15. "SARIE,SMBus Alert Response Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 14. "GCIE,General Call Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 13. "AM1F,Address Match 1 Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "AM0IE,Address Match 0 Interrupt Enable" "0: Enabled,1: Disabled"
|
|
newline
|
|
bitfld.long 0x8 11. "FEIE,FIFO Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "BEIE,Bit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "SDIE,STOP Detect Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "RSIE,Repeated Start Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 3. "TAIE,Transmit ACK Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 2. "AVIE,Address Valid Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "SDER,Slave DMA Enable Register"
|
|
bitfld.long 0xC 2. "AVDE,Address Valid DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
newline
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
group.long 0x124++0x7
|
|
line.long 0x0 "SCFGR1,Slave Configuration Register 1"
|
|
bitfld.long 0x0 16.--18. "ADDRCFG,Address Configuration" "0: Address match 0 (7-bit),1: Address match 0 (10-bit),2: Address match 0 (7-bit) or Address match 1 (7-bit),3: Address match 0 (10-bit) or Address match 1..,4: Address match 0 (7-bit) or Address match 1..,5: Address match 0 (10-bit) or Address match 1..,6: From Address match 0 (7-bit) to Address match 1..,7: From Address match 0 (10-bit) to Address match 1.."
|
|
bitfld.long 0x0 13. "HSMEN,High Speed Mode Enable" "0: Disables detection of HS-mode master code,1: Enables detection of HS-mode master code"
|
|
newline
|
|
bitfld.long 0x0 12. "IGNACK,Ignore NACK" "0: Slave will end transfer when NACK is detected,1: Slave will not end transfer when NACK detected"
|
|
bitfld.long 0x0 11. "RXCFG,Receive Data Configuration" "0: Reading the Receive Data register will return..,1: Reading the Receive Data register when the.."
|
|
newline
|
|
bitfld.long 0x0 10. "TXCFG,Transmit Flag Configuration" "0: Transmit Data Flag will only assert during a..,1: Transmit Data Flag will assert whenever the.."
|
|
bitfld.long 0x0 9. "SAEN,SMBus Alert Enable" "0: Disables match on SMBus Alert,1: Enables match on SMBus Alert"
|
|
newline
|
|
bitfld.long 0x0 8. "GCEN,General Call Enable" "0: General Call address is disabled,1: General Call address is enabled"
|
|
bitfld.long 0x0 3. "ACKSTALL,ACK SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "TXDSTALL,TX Data SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
bitfld.long 0x0 1. "RXSTALL,RX SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ADRSTALL,Address SCL Stall" "0: Clock stretching is disabled,1: Clock stretching is enabled"
|
|
line.long 0x4 "SCFGR2,Slave Configuration Register 2"
|
|
hexmask.long.byte 0x4 24.--27. 1. "FILTSDA,Glitch Filter SDA"
|
|
hexmask.long.byte 0x4 16.--19. 1. "FILTSCL,Glitch Filter SCL"
|
|
newline
|
|
hexmask.long.byte 0x4 8.--13. 1. "DATAVD,Data Valid Delay"
|
|
hexmask.long.byte 0x4 0.--3. 1. "CLKHOLD,Clock Hold Time"
|
|
group.long 0x140++0x3
|
|
line.long 0x0 "SAMR,Slave Address Match Register"
|
|
hexmask.long.word 0x0 17.--26. 1. "ADDR1,Address 1 Value"
|
|
hexmask.long.word 0x0 1.--10. 1. "ADDR0,Address 0 Value"
|
|
rgroup.long 0x150++0x3
|
|
line.long 0x0 "SASR,Slave Address Status Register"
|
|
bitfld.long 0x0 14. "ANV,Address Not Valid" "0: Received Address (RADDR) is valid,1: Received Address (RADDR) is not valid"
|
|
hexmask.long.word 0x0 0.--10. 1. "RADDR,Received Address"
|
|
group.long 0x154++0x3
|
|
line.long 0x0 "STAR,Slave Transmit ACK Register"
|
|
bitfld.long 0x0 0. "TXNACK,Transmit NACK" "0: Write a Transmit ACK for each received word,1: Write a Transmit NACK for each received word"
|
|
wgroup.long 0x160++0x3
|
|
line.long 0x0 "STDR,Slave Transmit Data Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x170++0x3
|
|
line.long 0x0 "SRDR,Slave Receive Data Register"
|
|
bitfld.long 0x0 15. "SOF,Start Of Frame" "0: Indicates this is not the first data word since..,1: Indicates this is the first data word since a.."
|
|
bitfld.long 0x0 14. "RXEMPTY,RX Empty" "0: The Receive Data Register is not empty,1: The Receive Data Register is empty"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree "LPIT (Low Power Interrupt Timer)"
|
|
base ad:0x40037000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EXT_TRIG,Number of External Trigger Inputs"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CHANNEL,Number of Timer Channels"
|
|
group.long 0x8++0x13
|
|
line.long 0x0 "MCR,Module Control Register"
|
|
bitfld.long 0x0 3. "DBG_EN,Debug Enable Bit" "0: Stop timer channels in Debug mode,1: Allow timer channels to continue to run in Debug.."
|
|
bitfld.long 0x0 2. "DOZE_EN,DOZE Mode Enable Bit" "0: Stop timer channels in DOZE mode,1: Allow timer channels to continue to run in DOZE.."
|
|
newline
|
|
bitfld.long 0x0 1. "SW_RST,Software Reset Bit" "0: Timer channels and registers are not reset,1: Reset timer channels and registers"
|
|
bitfld.long 0x0 0. "M_CEN,Module Clock Enable" "0: Disable peripheral clock to timers,1: Enable peripheral clock to timers"
|
|
line.long 0x4 "MSR,Module Status Register"
|
|
eventfld.long 0x4 3. "TIF3,Channel 3 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
eventfld.long 0x4 2. "TIF2,Channel 2 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
newline
|
|
eventfld.long 0x4 1. "TIF1,Channel 1 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
eventfld.long 0x4 0. "TIF0,Channel 0 Timer Interrupt Flag" "0: Timer has not timed out,1: Timeout has occurred (timer has timed out)"
|
|
line.long 0x8 "MIER,Module Interrupt Enable Register"
|
|
bitfld.long 0x8 3. "TIE3,Channel 3 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 2. "TIE2,Channel 2 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "TIE1,Channel 1 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TIE0,Channel 0 Timer Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "SETTEN,Set Timer Enable Register"
|
|
bitfld.long 0xC 3. "SET_T_EN_3,Set Timer 3 Enable" "0: No effect,1: Enables Timer Channel 3"
|
|
bitfld.long 0xC 2. "SET_T_EN_2,Set Timer 2 Enable" "0: No Effect,1: Enables Timer Channel 2"
|
|
newline
|
|
bitfld.long 0xC 1. "SET_T_EN_1,Set Timer 1 Enable" "0: No Effect,1: Enables Timer Channel 1"
|
|
bitfld.long 0xC 0. "SET_T_EN_0,Set Timer 0 Enable" "0: No effect,1: Enables Timer Channel 0"
|
|
line.long 0x10 "CLRTEN,Clear Timer Enable Register"
|
|
bitfld.long 0x10 3. "CLR_T_EN_3,Clear Timer 3 Enable" "0: No Action,1: Clear the Timer Enable bit (TCTRL3[T_EN]) for.."
|
|
bitfld.long 0x10 2. "CLR_T_EN_2,Clear Timer 2 Enable" "0: No Action,1: Clear the Timer Enable bit (TCTRL2[T_EN]) for.."
|
|
newline
|
|
bitfld.long 0x10 1. "CLR_T_EN_1,Clear Timer 1 Enable" "0: No Action,1: Clear the Timer Enable bit (TCTRL1[T_EN]) for.."
|
|
bitfld.long 0x10 0. "CLR_T_EN_0,Clear Timer 0 Enable" "0: No action,1: Clear the Timer Enable bit (TCTRL0[T_EN]) for.."
|
|
repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x40037020 ad:0x40037030 ad:0x40037040 ad:0x40037050)
|
|
tree "CHANNEL[$1]"
|
|
base $2
|
|
group.long ($2)++0x3
|
|
line.long 0x0 "TVAL,Timer Value Register"
|
|
hexmask.long 0x0 0.--31. 1. "TMR_VAL,Timer Value"
|
|
rgroup.long ($2+0x4)++0x3
|
|
line.long 0x0 "CVAL,Current Timer Value"
|
|
hexmask.long 0x0 0.--31. 1. "TMR_CUR_VAL,Current Timer Value"
|
|
group.long ($2+0x8)++0x3
|
|
line.long 0x0 "TCTRL,Timer Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "TRG_SEL,Trigger Select"
|
|
bitfld.long 0x0 23. "TRG_SRC,Trigger Source" "0: Selects external triggers,1: Selects internal triggers"
|
|
newline
|
|
bitfld.long 0x0 18. "TROT,Timer Reload On Trigger" "0: Timer will not reload on the selected trigger,1: Timer will reload on the selected trigger"
|
|
bitfld.long 0x0 17. "TSOI,Timer Stop On Interrupt" "0: The channel timer does not stop after timeout,1: The channel timer will stop after a timeout and.."
|
|
newline
|
|
bitfld.long 0x0 16. "TSOT,Timer Start On Trigger" "0: Timer starts to decrement immediately based on..,1: Timer starts to decrement when a rising edge on.."
|
|
bitfld.long 0x0 2.--3. "MODE,Timer Operation Mode" "0: 32-bit Periodic Counter,1: Dual 16-bit Periodic Counter,2: 32-bit Trigger Accumulator,3: 32-bit Trigger Input Capture"
|
|
newline
|
|
bitfld.long 0x0 1. "CHAIN,Chain Channel" "0: Channel Chaining is disabled. The channel timer..,1: Channel Chaining is enabled. The timer.."
|
|
bitfld.long 0x0 0. "T_EN,Timer Enable" "0: Timer Channel is disabled,1: Timer Channel is enabled"
|
|
tree.end
|
|
repeat.end
|
|
tree.end
|
|
tree "LPSPI (Low Power Serial Peripheral Interface)"
|
|
base ad:0x0
|
|
tree "LPSPI0"
|
|
base ad:0x4002C000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: LPSPI module is disabled in debug mode,1: LPSPI module is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: LPSPI module is enabled in Doze mode,1: LPSPI module is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled,1: Module is enabled"
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed,1: Receive FIFO has overflowed"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred,1: Transmit FIFO underrun has occurred"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed,1: All transfers have completed"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed,1: Frame transfer has completed"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer of a received word has not yet completed,1: Transfer of a received word has completed"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "DER,DMA Enable Register"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is the LPSPI_HREQ pin,1: Host request input is the input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: LPSPI_HREQ pin is active low,1: LPSPI_HREQ pin is active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled,1: Host request is enabled"
|
|
line.long 0x14 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT is used for..,1: SIN is used for both input and output data only..,2: SOUT is used for both input and output data only..,3: SOUT is used for input data and SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: 010b - Match is enabled if 1st data word equals..,3: 011b - Match is enabled if any data word equals..,4: 100b - Match is enabled if 1st data word equals..,5: 101b - Match is enabled if any data word equals..,6: 110b - Match is enabled if (1st data word AND..,7: 111b - Match is enabled if (any data word AND.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when the transmit FIFO is..,1: Transfers will not stall allowing transmit FIFO.."
|
|
newline
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation is disabled,1: Automatic PCS generation is enabled"
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data is sampled on SCK edge,1: Input data is sampled on delayed SCK edge"
|
|
newline
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,The FIFO Control register contains the RXWATER and TXWATER control fields."
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status Register"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command Register"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low,1: The inactive state value of SCK is high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],2: Transfer using LPSPI_PCS[2],3: Transfer using LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap is disabled,1: Byte swap is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1 bit transfer,1: 2 bit transfer,2: 4 bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "RSR,Receive Status Register"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty,1: RX FIFO is empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS assertion"
|
|
line.long 0x4 "RDR,Receive Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree "LPSPI1"
|
|
base ad:0x4002D000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: LPSPI module is disabled in debug mode,1: LPSPI module is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: LPSPI module is enabled in Doze mode,1: LPSPI module is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled,1: Module is enabled"
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed,1: Receive FIFO has overflowed"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred,1: Transmit FIFO underrun has occurred"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed,1: All transfers have completed"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed,1: Frame transfer has completed"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer of a received word has not yet completed,1: Transfer of a received word has completed"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "DER,DMA Enable Register"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is the LPSPI_HREQ pin,1: Host request input is the input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: LPSPI_HREQ pin is active low,1: LPSPI_HREQ pin is active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled,1: Host request is enabled"
|
|
line.long 0x14 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT is used for..,1: SIN is used for both input and output data only..,2: SOUT is used for both input and output data only..,3: SOUT is used for input data and SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: 010b - Match is enabled if 1st data word equals..,3: 011b - Match is enabled if any data word equals..,4: 100b - Match is enabled if 1st data word equals..,5: 101b - Match is enabled if any data word equals..,6: 110b - Match is enabled if (1st data word AND..,7: 111b - Match is enabled if (any data word AND.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when the transmit FIFO is..,1: Transfers will not stall allowing transmit FIFO.."
|
|
newline
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation is disabled,1: Automatic PCS generation is enabled"
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data is sampled on SCK edge,1: Input data is sampled on delayed SCK edge"
|
|
newline
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,The FIFO Control register contains the RXWATER and TXWATER control fields."
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status Register"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command Register"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low,1: The inactive state value of SCK is high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],2: Transfer using LPSPI_PCS[2],3: Transfer using LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap is disabled,1: Byte swap is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1 bit transfer,1: 2 bit transfer,2: 4 bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "RSR,Receive Status Register"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty,1: RX FIFO is empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS assertion"
|
|
line.long 0x4 "RDR,Receive Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree "LPSPI2"
|
|
base ad:0x4002E000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Module Identification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x10++0x17
|
|
line.long 0x0 "CR,Control Register"
|
|
bitfld.long 0x0 9. "RRF,Reset Receive FIFO" "0: No effect,1: Receive FIFO is reset"
|
|
bitfld.long 0x0 8. "RTF,Reset Transmit FIFO" "0: No effect,1: Transmit FIFO is reset"
|
|
newline
|
|
bitfld.long 0x0 3. "DBGEN,Debug Enable" "0: LPSPI module is disabled in debug mode,1: LPSPI module is enabled in debug mode"
|
|
bitfld.long 0x0 2. "DOZEN,Doze Mode Enable" "0: LPSPI module is enabled in Doze mode,1: LPSPI module is disabled in Doze mode"
|
|
newline
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset,1: Module is reset"
|
|
bitfld.long 0x0 0. "MEN,Module Enable" "0: Module is disabled,1: Module is enabled"
|
|
line.long 0x4 "SR,Status Register"
|
|
rbitfld.long 0x4 24. "MBF,Module Busy Flag" "0: LPSPI is idle,1: LPSPI is busy"
|
|
eventfld.long 0x4 13. "DMF,Data Match Flag" "0: Have not received matching data,1: Have received matching data"
|
|
newline
|
|
eventfld.long 0x4 12. "REF,Receive Error Flag" "0: Receive FIFO has not overflowed,1: Receive FIFO has overflowed"
|
|
eventfld.long 0x4 11. "TEF,Transmit Error Flag" "0: Transmit FIFO underrun has not occurred,1: Transmit FIFO underrun has occurred"
|
|
newline
|
|
eventfld.long 0x4 10. "TCF,Transfer Complete Flag" "0: All transfers have not completed,1: All transfers have completed"
|
|
eventfld.long 0x4 9. "FCF,Frame Complete Flag" "0: Frame transfer has not completed,1: Frame transfer has completed"
|
|
newline
|
|
eventfld.long 0x4 8. "WCF,Word Complete Flag" "0: Transfer of a received word has not yet completed,1: Transfer of a received word has completed"
|
|
rbitfld.long 0x4 1. "RDF,Receive Data Flag" "0: Receive Data is not ready,1: Receive data is ready"
|
|
newline
|
|
rbitfld.long 0x4 0. "TDF,Transmit Data Flag" "0: Transmit data not requested,1: Transmit data is requested"
|
|
line.long 0x8 "IER,Interrupt Enable Register"
|
|
bitfld.long 0x8 13. "DMIE,Data Match Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 12. "REIE,Receive Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 11. "TEIE,Transmit Error Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 10. "TCIE,Transfer Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 9. "FCIE,Frame Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 8. "WCIE,Word Complete Interrupt Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.long 0x8 1. "RDIE,Receive Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
bitfld.long 0x8 0. "TDIE,Transmit Data Interrupt Enable" "0: Disabled,1: Enabled"
|
|
line.long 0xC "DER,DMA Enable Register"
|
|
bitfld.long 0xC 1. "RDDE,Receive Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
bitfld.long 0xC 0. "TDDE,Transmit Data DMA Enable" "0: DMA request is disabled,1: DMA request is enabled"
|
|
line.long 0x10 "CFGR0,Configuration Register 0"
|
|
bitfld.long 0x10 9. "RDMO,Receive Data Match Only" "0: Received data is stored in the receive FIFO as..,1: Received data is discarded unless the Data Match.."
|
|
bitfld.long 0x10 8. "CIRFIFO,Circular FIFO Enable" "0: Circular FIFO is disabled,1: Circular FIFO is enabled"
|
|
newline
|
|
bitfld.long 0x10 2. "HRSEL,Host Request Select" "0: Host request input is the LPSPI_HREQ pin,1: Host request input is the input trigger"
|
|
bitfld.long 0x10 1. "HRPOL,Host Request Polarity" "0: LPSPI_HREQ pin is active low,1: LPSPI_HREQ pin is active high"
|
|
newline
|
|
bitfld.long 0x10 0. "HREN,Host Request Enable" "0: Host request is disabled,1: Host request is enabled"
|
|
line.long 0x14 "CFGR1,Configuration Register 1"
|
|
bitfld.long 0x14 27. "PCSCFG,Peripheral Chip Select Configuration" "0: PCS[3:2] are configured for chip select function,1: PCS[3:2] are configured for half-duplex 4-bit.."
|
|
bitfld.long 0x14 26. "OUTCFG,Output Configuration" "0: Output data retains last value when chip select..,1: Output data is tristated when chip select is.."
|
|
newline
|
|
bitfld.long 0x14 24.--25. "PINCFG,Pin Configuration" "0: SIN is used for input data and SOUT is used for..,1: SIN is used for both input and output data only..,2: SOUT is used for both input and output data only..,3: SOUT is used for input data and SIN is used for.."
|
|
bitfld.long 0x14 16.--18. "MATCFG,Match Configuration" "0: Match is disabled,?,2: 010b - Match is enabled if 1st data word equals..,3: 011b - Match is enabled if any data word equals..,4: 100b - Match is enabled if 1st data word equals..,5: 101b - Match is enabled if any data word equals..,6: 110b - Match is enabled if (1st data word AND..,7: 111b - Match is enabled if (any data word AND.."
|
|
newline
|
|
hexmask.long.byte 0x14 8.--11. 1. "PCSPOL,Peripheral Chip Select Polarity"
|
|
bitfld.long 0x14 3. "NOSTALL,No Stall" "0: Transfers will stall when the transmit FIFO is..,1: Transfers will not stall allowing transmit FIFO.."
|
|
newline
|
|
bitfld.long 0x14 2. "AUTOPCS,Automatic PCS" "0: Automatic PCS generation is disabled,1: Automatic PCS generation is enabled"
|
|
bitfld.long 0x14 1. "SAMPLE,Sample Point" "0: Input data is sampled on SCK edge,1: Input data is sampled on delayed SCK edge"
|
|
newline
|
|
bitfld.long 0x14 0. "MASTER,Master Mode" "0: Slave mode,1: Master mode"
|
|
group.long 0x30++0x7
|
|
line.long 0x0 "DMR0,Data Match Register 0"
|
|
hexmask.long 0x0 0.--31. 1. "MATCH0,Match 0 Value"
|
|
line.long 0x4 "DMR1,Data Match Register 1"
|
|
hexmask.long 0x4 0.--31. 1. "MATCH1,Match 1 Value"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CCR,Clock Configuration Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "SCKPCS,SCK-to-PCS Delay"
|
|
hexmask.long.byte 0x0 16.--23. 1. "PCSSCK,PCS-to-SCK Delay"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--15. 1. "DBT,Delay Between Transfers"
|
|
hexmask.long.byte 0x0 0.--7. 1. "SCKDIV,SCK Divider"
|
|
group.long 0x58++0x3
|
|
line.long 0x0 "FCR,The FIFO Control register contains the RXWATER and TXWATER control fields."
|
|
bitfld.long 0x0 16.--17. "RXWATER,Receive FIFO Watermark" "0,1,2,3"
|
|
bitfld.long 0x0 0.--1. "TXWATER,Transmit FIFO Watermark" "0,1,2,3"
|
|
rgroup.long 0x5C++0x3
|
|
line.long 0x0 "FSR,FIFO Status Register"
|
|
bitfld.long 0x0 16.--18. "RXCOUNT,Receive FIFO Count" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 0.--2. "TXCOUNT,Transmit FIFO Count" "0,1,2,3,4,5,6,7"
|
|
group.long 0x60++0x3
|
|
line.long 0x0 "TCR,Transmit Command Register"
|
|
bitfld.long 0x0 31. "CPOL,Clock Polarity" "0: The inactive state value of SCK is low,1: The inactive state value of SCK is high"
|
|
bitfld.long 0x0 30. "CPHA,Clock Phase" "0: Data is captured on the leading edge of SCK and..,1: Data is changed on the leading edge of SCK and.."
|
|
newline
|
|
bitfld.long 0x0 27.--29. "PRESCALE,Prescaler Value" "0: Divide by 1,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 32,6: Divide by 64,7: Divide by 128"
|
|
bitfld.long 0x0 24.--25. "PCS,Peripheral Chip Select" "0: Transfer using LPSPI_PCS[0],1: Transfer using LPSPI_PCS[1],2: Transfer using LPSPI_PCS[2],3: Transfer using LPSPI_PCS[3]"
|
|
newline
|
|
bitfld.long 0x0 23. "LSBF,LSB First" "0: Data is transferred MSB first,1: Data is transferred LSB first"
|
|
bitfld.long 0x0 22. "BYSW,Byte Swap" "0: Byte swap is disabled,1: Byte swap is enabled"
|
|
newline
|
|
bitfld.long 0x0 21. "CONT,Continuous Transfer" "0: Continuous transfer is disabled,1: Continuous transfer is enabled"
|
|
bitfld.long 0x0 20. "CONTC,Continuing Command" "0: Command word for start of new transfer,1: Command word for continuing transfer"
|
|
newline
|
|
bitfld.long 0x0 19. "RXMSK,Receive Data Mask" "0: Normal transfer,1: Receive data is masked"
|
|
bitfld.long 0x0 18. "TXMSK,Transmit Data Mask" "0: Normal transfer,1: Mask transmit data"
|
|
newline
|
|
bitfld.long 0x0 16.--17. "WIDTH,Transfer Width" "0: 1 bit transfer,1: 2 bit transfer,2: 4 bit transfer,?"
|
|
hexmask.long.word 0x0 0.--11. 1. "FRAMESZ,Frame Size"
|
|
wgroup.long 0x64++0x3
|
|
line.long 0x0 "TDR,Transmit Data Register"
|
|
hexmask.long 0x0 0.--31. 1. "DATA,Transmit Data"
|
|
rgroup.long 0x70++0x7
|
|
line.long 0x0 "RSR,Receive Status Register"
|
|
bitfld.long 0x0 1. "RXEMPTY,RX FIFO Empty" "0: RX FIFO is not empty,1: RX FIFO is empty"
|
|
bitfld.long 0x0 0. "SOF,Start Of Frame" "0: Subsequent data word received after LPSPI_PCS..,1: First data word received after LPSPI_PCS assertion"
|
|
line.long 0x4 "RDR,Receive Data Register"
|
|
hexmask.long 0x4 0.--31. 1. "DATA,Receive Data"
|
|
tree.end
|
|
tree.end
|
|
tree "LPTMR (Low Power Timer)"
|
|
base ad:0x40040000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CSR,Low Power Timer Control Status Register"
|
|
bitfld.long 0x0 8. "TDRE,Timer DMA Request Enable" "0: Timer DMA Request disabled.,1: Timer DMA Request enabled."
|
|
eventfld.long 0x0 7. "TCF,Timer Compare Flag" "0: The value of CNR is not equal to CMR and..,1: The value of CNR is equal to CMR and increments."
|
|
newline
|
|
bitfld.long 0x0 6. "TIE,Timer Interrupt Enable" "0: Timer interrupt disabled.,1: Timer interrupt enabled."
|
|
bitfld.long 0x0 4.--5. "TPS,Timer Pin Select" "0: Pulse counter input 0 is selected.,1: Pulse counter input 1 is selected.,2: Pulse counter input 2 is selected.,3: Pulse counter input 3 is selected."
|
|
newline
|
|
bitfld.long 0x0 3. "TPP,Timer Pin Polarity" "0: Pulse Counter input source is active-high and..,1: Pulse Counter input source is active-low and the.."
|
|
bitfld.long 0x0 2. "TFC,Timer Free-Running Counter" "0: CNR is reset whenever TCF is set.,1: CNR is reset on overflow."
|
|
newline
|
|
bitfld.long 0x0 1. "TMS,Timer Mode Select" "0: Time Counter mode.,1: Pulse Counter mode."
|
|
bitfld.long 0x0 0. "TEN,Timer Enable" "0: LPTMR is disabled and internal logic is reset.,1: LPTMR is enabled."
|
|
line.long 0x4 "PSR,Low Power Timer Prescale Register"
|
|
hexmask.long.byte 0x4 3.--6. 1. "PRESCALE,Prescale Value"
|
|
bitfld.long 0x4 2. "PBYP,Prescaler Bypass" "0: Prescaler/glitch filter is enabled.,1: Prescaler/glitch filter is bypassed."
|
|
newline
|
|
bitfld.long 0x4 0.--1. "PCS,Prescaler Clock Select" "0: Prescaler/glitch filter clock 0 selected.,1: Prescaler/glitch filter clock 1 selected.,2: Prescaler/glitch filter clock 2 selected.,3: Prescaler/glitch filter clock 3 selected."
|
|
line.long 0x8 "CMR,Low Power Timer Compare Register"
|
|
hexmask.long.word 0x8 0.--15. 1. "COMPARE,Compare Value"
|
|
line.long 0xC "CNR,Low Power Timer Counter Register"
|
|
hexmask.long.word 0xC 0.--15. 1. "COUNTER,Counter Value"
|
|
tree.end
|
|
tree "LPUART (Low Power Universal Asynchronous Receiver/Transmitter)"
|
|
base ad:0x0
|
|
tree "LPUART0"
|
|
base ad:0x4006A000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,LPUART Global Register"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset."
|
|
line.long 0x4 "PINCFG,LPUART Pin Configuration Register"
|
|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,2: Input trigger is used instead of CTS_B pin input.,3: Input trigger is used to modulate the TXD pin.."
|
|
line.long 0x8 "BAUD,LPUART Baud Rate Register"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.."
|
|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.."
|
|
newline
|
|
bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
|
|
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
|
|
newline
|
|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
newline
|
|
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,2: Match On and Match Off,3: Enables RWU on Data Match and Match On/Off for.."
|
|
newline
|
|
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
|
|
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.."
|
|
newline
|
|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from STAT[LBKDIF] flag are..,1: Hardware interrupt requested when STAT[LBKDIF].."
|
|
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from STAT[RXEDGIF] are..,1: Hardware interrupt is requested when.."
|
|
newline
|
|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits."
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor."
|
|
line.long 0xC "STAT,LPUART Status Register"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected."
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred."
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.."
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted."
|
|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.."
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.."
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.."
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)."
|
|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty."
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)."
|
|
newline
|
|
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full."
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected."
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)."
|
|
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in the.."
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error."
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error."
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2"
|
|
line.long 0x10 "CTRL,LPUART Control Register"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode."
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted."
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set."
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set."
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set."
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set."
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1."
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1."
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1."
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1."
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled."
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled."
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent."
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.."
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,2: 4 idle characters,3: 8 idle characters,4: 16 idle characters,5: 32 idle characters,6: 64 idle characters,7: 128 idle characters"
|
|
newline
|
|
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.."
|
|
bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode."
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.."
|
|
bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.."
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup."
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled."
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity."
|
|
line.long 0x14 "DATA,LPUART Data Register"
|
|
rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise."
|
|
rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error."
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.."
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character."
|
|
bitfld.long 0x14 9. "R9T9,R9T9" "0,1"
|
|
newline
|
|
bitfld.long 0x14 8. "R8T8,R8T8" "0,1"
|
|
bitfld.long 0x14 7. "R7T7,R7T7" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. "R6T6,R6T6" "0,1"
|
|
bitfld.long 0x14 5. "R5T5,R5T5" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "R4T4,R4T4" "0,1"
|
|
bitfld.long 0x14 3. "R3T3,R3T3" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "R2T2,R2T2" "0,1"
|
|
bitfld.long 0x14 1. "R1T1,R1T1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "R0T0,R0T0" "0,1"
|
|
line.long 0x18 "MATCH,LPUART Match Address Register"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,LPUART Modem IrDA Register"
|
|
bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled."
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,2: 3/OSR.,3: 4/OSR."
|
|
newline
|
|
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result."
|
|
newline
|
|
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle."
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,1: RTS is deasserted if the receiver data register.."
|
|
newline
|
|
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high."
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.."
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.."
|
|
line.long 0x20 "FIFO,LPUART FIFO Register"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty."
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty."
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.."
|
|
eventfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.."
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.."
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.."
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,2: Enable RDRF assertion due to partially filled..,3: Enable RDRF assertion due to partially filled..,4: Enable RDRF assertion due to partially filled..,5: Enable RDRF assertion due to partially filled..,6: Enable RDRF assertion due to partially filled..,7: Enable RDRF assertion due to partially filled.."
|
|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host."
|
|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host."
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.."
|
|
newline
|
|
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,2: Transmit FIFO/Buffer depth = 8 datawords.,3: Transmit FIFO/Buffer depth = 16 datawords.,4: Transmit FIFO/Buffer depth = 32 datawords.,5: Transmit FIFO/Buffer depth = 64 datawords.,6: Transmit FIFO/Buffer depth = 128 datawords.,7: Transmit FIFO/Buffer depth = 256 datawords"
|
|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.."
|
|
newline
|
|
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,2: Receive FIFO/Buffer depth = 8 datawords.,3: Receive FIFO/Buffer depth = 16 datawords.,4: Receive FIFO/Buffer depth = 32 datawords.,5: Receive FIFO/Buffer depth = 64 datawords.,6: Receive FIFO/Buffer depth = 128 datawords.,7: Receive FIFO/Buffer depth = 256 datawords."
|
|
line.long 0x24 "WATER,LPUART Watermark Register"
|
|
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
|
|
tree.end
|
|
tree "LPUART1"
|
|
base ad:0x4006B000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Identification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "RXFIFO,Receive FIFO Size"
|
|
hexmask.long.byte 0x4 0.--7. 1. "TXFIFO,Transmit FIFO Size"
|
|
group.long 0x8++0x27
|
|
line.long 0x0 "GLOBAL,LPUART Global Register"
|
|
bitfld.long 0x0 1. "RST,Software Reset" "0: Module is not reset.,1: Module is reset."
|
|
line.long 0x4 "PINCFG,LPUART Pin Configuration Register"
|
|
bitfld.long 0x4 0.--1. "TRGSEL,Trigger Select" "0: Input trigger is disabled.,1: Input trigger is used instead of RXD pin input.,2: Input trigger is used instead of CTS_B pin input.,3: Input trigger is used to modulate the TXD pin.."
|
|
line.long 0x8 "BAUD,LPUART Baud Rate Register"
|
|
bitfld.long 0x8 31. "MAEN1,Match Address Mode Enable 1" "0: Normal operation.,1: Enables automatic address matching or data.."
|
|
bitfld.long 0x8 30. "MAEN2,Match Address Mode Enable 2" "0: Normal operation.,1: Enables automatic address matching or data.."
|
|
newline
|
|
bitfld.long 0x8 29. "M10,10-bit Mode select" "0: Receiver and transmitter use 7-bit to 9-bit data..,1: Receiver and transmitter use 10-bit data.."
|
|
hexmask.long.byte 0x8 24.--28. 1. "OSR,Oversampling Ratio"
|
|
newline
|
|
bitfld.long 0x8 23. "TDMAE,Transmitter DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
bitfld.long 0x8 21. "RDMAE,Receiver Full DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
newline
|
|
bitfld.long 0x8 20. "RIDMAE,Receiver Idle DMA Enable" "0: DMA request disabled.,1: DMA request enabled."
|
|
bitfld.long 0x8 18.--19. "MATCFG,Match Configuration" "0: Address Match Wakeup,1: Idle Match Wakeup,2: Match On and Match Off,3: Enables RWU on Data Match and Match On/Off for.."
|
|
newline
|
|
bitfld.long 0x8 17. "BOTHEDGE,Both Edge Sampling" "0: Receiver samples input data using the rising..,1: Receiver samples input data using the rising and.."
|
|
bitfld.long 0x8 16. "RESYNCDIS,Resynchronization Disable" "0: Resynchronization during received data word is..,1: Resynchronization during received data word is.."
|
|
newline
|
|
bitfld.long 0x8 15. "LBKDIE,LIN Break Detect Interrupt Enable" "0: Hardware interrupts from STAT[LBKDIF] flag are..,1: Hardware interrupt requested when STAT[LBKDIF].."
|
|
bitfld.long 0x8 14. "RXEDGIE,RX Input Active Edge Interrupt Enable" "0: Hardware interrupts from STAT[RXEDGIF] are..,1: Hardware interrupt is requested when.."
|
|
newline
|
|
bitfld.long 0x8 13. "SBNS,Stop Bit Number Select" "0: One stop bit.,1: Two stop bits."
|
|
hexmask.long.word 0x8 0.--12. 1. "SBR,Baud Rate Modulo Divisor."
|
|
line.long 0xC "STAT,LPUART Status Register"
|
|
eventfld.long 0xC 31. "LBKDIF,LIN Break Detect Interrupt Flag" "0: No LIN break character has been detected.,1: LIN break character has been detected."
|
|
eventfld.long 0xC 30. "RXEDGIF,RXD Pin Active Edge Interrupt Flag" "0: No active edge on the receive pin has occurred.,1: An active edge on the receive pin has occurred."
|
|
newline
|
|
bitfld.long 0xC 29. "MSBF,MSB First" "0: LSB (bit0) is the first bit that is transmitted..,1: MSB (bit9 bit8 bit7 or bit6) is the first bit.."
|
|
bitfld.long 0xC 28. "RXINV,Receive Data Inversion" "0: Receive data not inverted.,1: Receive data inverted."
|
|
newline
|
|
bitfld.long 0xC 27. "RWUID,Receive Wake Up Idle Detect" "0: During receive standby state (RWU = 1) the IDLE..,1: During receive standby state (RWU = 1) the IDLE.."
|
|
bitfld.long 0xC 26. "BRK13,Break Character Generation Length" "0: Break character is transmitted with length of 9..,1: Break character is transmitted with length of 12.."
|
|
newline
|
|
bitfld.long 0xC 25. "LBKDE,LIN Break Detection Enable" "0: LIN break detect is disabled normal break..,1: LIN break detect is enabled. LIN break character.."
|
|
rbitfld.long 0xC 24. "RAF,Receiver Active Flag" "0: LPUART receiver idle waiting for a start bit.,1: LPUART receiver active (RXD input not idle)."
|
|
newline
|
|
rbitfld.long 0xC 23. "TDRE,Transmit Data Register Empty Flag" "0: Transmit data buffer full.,1: Transmit data buffer empty."
|
|
rbitfld.long 0xC 22. "TC,Transmission Complete Flag" "0: Transmitter active (sending data a preamble or a..,1: Transmitter idle (transmission activity complete)."
|
|
newline
|
|
rbitfld.long 0xC 21. "RDRF,Receive Data Register Full Flag" "0: Receive data buffer empty.,1: Receive data buffer full."
|
|
eventfld.long 0xC 20. "IDLE,Idle Line Flag" "0: No idle line detected.,1: Idle line was detected."
|
|
newline
|
|
eventfld.long 0xC 19. "OR,Receiver Overrun Flag" "0: No overrun.,1: Receive overrun (new LPUART data lost)."
|
|
eventfld.long 0xC 18. "NF,Noise Flag" "0: No noise detected.,1: Noise detected in the received character in the.."
|
|
newline
|
|
eventfld.long 0xC 17. "FE,Framing Error Flag" "0: No framing error detected. This does not..,1: Framing error."
|
|
eventfld.long 0xC 16. "PF,Parity Error Flag" "0: No parity error.,1: Parity error."
|
|
newline
|
|
eventfld.long 0xC 15. "MA1F,Match 1 Flag" "0: Received data is not equal to MA1,1: Received data is equal to MA1"
|
|
eventfld.long 0xC 14. "MA2F,Match 2 Flag" "0: Received data is not equal to MA2,1: Received data is equal to MA2"
|
|
line.long 0x10 "CTRL,LPUART Control Register"
|
|
bitfld.long 0x10 31. "R8T9,Receive Bit 8 / Transmit Bit 9" "0,1"
|
|
bitfld.long 0x10 30. "R9T8,Receive Bit 9 / Transmit Bit 8" "0,1"
|
|
newline
|
|
bitfld.long 0x10 29. "TXDIR,TXD Pin Direction in Single-Wire Mode" "0: TXD pin is an input in single-wire mode.,1: TXD pin is an output in single-wire mode."
|
|
bitfld.long 0x10 28. "TXINV,Transmit Data Inversion" "0: Transmit data not inverted.,1: Transmit data inverted."
|
|
newline
|
|
bitfld.long 0x10 27. "ORIE,Overrun Interrupt Enable" "0: OR interrupts disabled; use polling.,1: Hardware interrupt requested when OR is set."
|
|
bitfld.long 0x10 26. "NEIE,Noise Error Interrupt Enable" "0: NF interrupts disabled; use polling.,1: Hardware interrupt requested when NF is set."
|
|
newline
|
|
bitfld.long 0x10 25. "FEIE,Framing Error Interrupt Enable" "0: FE interrupts disabled; use polling.,1: Hardware interrupt requested when FE is set."
|
|
bitfld.long 0x10 24. "PEIE,Parity Error Interrupt Enable" "0: PF interrupts disabled; use polling).,1: Hardware interrupt requested when PF is set."
|
|
newline
|
|
bitfld.long 0x10 23. "TIE,Transmit Interrupt Enable" "0: Hardware interrupts from TDRE disabled; use..,1: Hardware interrupt requested when TDRE flag is 1."
|
|
bitfld.long 0x10 22. "TCIE,Transmission Complete Interrupt Enable for" "0: Hardware interrupts from TC disabled; use polling.,1: Hardware interrupt requested when TC flag is 1."
|
|
newline
|
|
bitfld.long 0x10 21. "RIE,Receiver Interrupt Enable" "0: Hardware interrupts from RDRF disabled; use..,1: Hardware interrupt requested when RDRF flag is 1."
|
|
bitfld.long 0x10 20. "ILIE,Idle Line Interrupt Enable" "0: Hardware interrupts from IDLE disabled; use..,1: Hardware interrupt requested when IDLE flag is 1."
|
|
newline
|
|
bitfld.long 0x10 19. "TE,Transmitter Enable" "0: Transmitter disabled.,1: Transmitter enabled."
|
|
bitfld.long 0x10 18. "RE,Receiver Enable" "0: Receiver disabled.,1: Receiver enabled."
|
|
newline
|
|
bitfld.long 0x10 17. "RWU,Receiver Wakeup Control" "0: Normal receiver operation.,1: LPUART receiver in standby waiting for wakeup.."
|
|
bitfld.long 0x10 16. "SBK,Send Break" "0: Normal transmitter operation.,1: Queue break character(s) to be sent."
|
|
newline
|
|
bitfld.long 0x10 15. "MA1IE,Match 1 Interrupt Enable" "0: MA1F interrupt disabled,1: MA1F interrupt enabled"
|
|
bitfld.long 0x10 14. "MA2IE,Match 2 Interrupt Enable" "0: MA2F interrupt disabled,1: MA2F interrupt enabled"
|
|
newline
|
|
bitfld.long 0x10 11. "M7,7-Bit Mode Select" "0: Receiver and transmitter use 8-bit to 10-bit..,1: Receiver and transmitter use 7-bit data.."
|
|
bitfld.long 0x10 8.--10. "IDLECFG,Idle Configuration" "0: 1 idle character,1: 2 idle characters,2: 4 idle characters,3: 8 idle characters,4: 16 idle characters,5: 32 idle characters,6: 64 idle characters,7: 128 idle characters"
|
|
newline
|
|
bitfld.long 0x10 7. "LOOPS,Loop Mode Select" "0: Normal operation - RXD and TXD use separate pins.,1: Loop mode or single-wire mode where transmitter.."
|
|
bitfld.long 0x10 6. "DOZEEN,Doze Enable" "0: LPUART is enabled in Doze mode.,1: LPUART is disabled in Doze mode."
|
|
newline
|
|
bitfld.long 0x10 5. "RSRC,Receiver Source Select" "0: Provided LOOPS is set RSRC is cleared selects..,1: Single-wire LPUART mode where the TXD pin is.."
|
|
bitfld.long 0x10 4. "M,9-Bit or 8-Bit Mode Select" "0: Receiver and transmitter use 8-bit data..,1: Receiver and transmitter use 9-bit data.."
|
|
newline
|
|
bitfld.long 0x10 3. "WAKE,Receiver Wakeup Method Select" "0: Configures RWU for idle-line wakeup.,1: Configures RWU with address-mark wakeup."
|
|
bitfld.long 0x10 2. "ILT,Idle Line Type Select" "0: Idle character bit count starts after start bit.,1: Idle character bit count starts after stop bit."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Parity Enable" "0: No hardware parity generation or checking.,1: Parity enabled."
|
|
bitfld.long 0x10 0. "PT,Parity Type" "0: Even parity.,1: Odd parity."
|
|
line.long 0x14 "DATA,LPUART Data Register"
|
|
rbitfld.long 0x14 15. "NOISY,NOISY" "0: The dataword was received without noise.,1: The data was received with noise."
|
|
rbitfld.long 0x14 14. "PARITYE,PARITYE" "0: The dataword was received without a parity error.,1: The dataword was received with a parity error."
|
|
newline
|
|
bitfld.long 0x14 13. "FRETSC,Frame Error / Transmit Special Character" "0: The dataword was received without a frame error..,1: The dataword was received with a frame error or.."
|
|
rbitfld.long 0x14 12. "RXEMPT,Receive Buffer Empty" "0: Receive buffer contains valid data.,1: Receive buffer is empty data returned on read is.."
|
|
newline
|
|
rbitfld.long 0x14 11. "IDLINE,Idle Line" "0: Receiver was not idle before receiving this..,1: Receiver was idle before receiving this character."
|
|
bitfld.long 0x14 9. "R9T9,R9T9" "0,1"
|
|
newline
|
|
bitfld.long 0x14 8. "R8T8,R8T8" "0,1"
|
|
bitfld.long 0x14 7. "R7T7,R7T7" "0,1"
|
|
newline
|
|
bitfld.long 0x14 6. "R6T6,R6T6" "0,1"
|
|
bitfld.long 0x14 5. "R5T5,R5T5" "0,1"
|
|
newline
|
|
bitfld.long 0x14 4. "R4T4,R4T4" "0,1"
|
|
bitfld.long 0x14 3. "R3T3,R3T3" "0,1"
|
|
newline
|
|
bitfld.long 0x14 2. "R2T2,R2T2" "0,1"
|
|
bitfld.long 0x14 1. "R1T1,R1T1" "0,1"
|
|
newline
|
|
bitfld.long 0x14 0. "R0T0,R0T0" "0,1"
|
|
line.long 0x18 "MATCH,LPUART Match Address Register"
|
|
hexmask.long.word 0x18 16.--25. 1. "MA2,Match Address 2"
|
|
hexmask.long.word 0x18 0.--9. 1. "MA1,Match Address 1"
|
|
line.long 0x1C "MODIR,LPUART Modem IrDA Register"
|
|
bitfld.long 0x1C 18. "IREN,Infrared enable" "0: IR disabled.,1: IR enabled."
|
|
bitfld.long 0x1C 16.--17. "TNP,Transmitter narrow pulse" "0: 1/OSR.,1: 2/OSR.,2: 3/OSR.,3: 4/OSR."
|
|
newline
|
|
bitfld.long 0x1C 8.--9. "RTSWATER,Receive RTS Configuration" "0,1,2,3"
|
|
bitfld.long 0x1C 5. "TXCTSSRC,Transmit CTS Source" "0: CTS input is the CTS_B pin.,1: CTS input is the inverted Receiver Match result."
|
|
newline
|
|
bitfld.long 0x1C 4. "TXCTSC,Transmit CTS Configuration" "0: CTS input is sampled at the start of each..,1: CTS input is sampled when the transmitter is idle."
|
|
bitfld.long 0x1C 3. "RXRTSE,Receiver request-to-send enable" "0: The receiver has no effect on RTS.,1: RTS is deasserted if the receiver data register.."
|
|
newline
|
|
bitfld.long 0x1C 2. "TXRTSPOL,Transmitter request-to-send polarity" "0: Transmitter RTS is active low.,1: Transmitter RTS is active high."
|
|
bitfld.long 0x1C 1. "TXRTSE,Transmitter request-to-send enable" "0: The transmitter has no effect on RTS.,1: When a character is placed into an empty.."
|
|
newline
|
|
bitfld.long 0x1C 0. "TXCTSE,Transmitter clear-to-send enable" "0: CTS has no effect on the transmitter.,1: Enables clear-to-send operation. The transmitter.."
|
|
line.long 0x20 "FIFO,LPUART FIFO Register"
|
|
rbitfld.long 0x20 23. "TXEMPT,Transmit Buffer/FIFO Empty" "0: Transmit buffer is not empty.,1: Transmit buffer is empty."
|
|
rbitfld.long 0x20 22. "RXEMPT,Receive Buffer/FIFO Empty" "0: Receive buffer is not empty.,1: Receive buffer is empty."
|
|
newline
|
|
eventfld.long 0x20 17. "TXOF,Transmitter Buffer Overflow Flag" "0: No transmit buffer overflow has occurred since..,1: At least one transmit buffer overflow has.."
|
|
eventfld.long 0x20 16. "RXUF,Receiver Buffer Underflow Flag" "0: No receive buffer underflow has occurred since..,1: At least one receive buffer underflow has.."
|
|
newline
|
|
bitfld.long 0x20 15. "TXFLUSH,Transmit FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the transmit FIFO/Buffer is cleared.."
|
|
bitfld.long 0x20 14. "RXFLUSH,Receive FIFO/Buffer Flush" "0: No flush operation occurs.,1: All data in the receive FIFO/buffer is cleared.."
|
|
newline
|
|
bitfld.long 0x20 10.--12. "RXIDEN,Receiver Idle Empty Enable" "0: Disable RDRF assertion due to partially filled..,1: Enable RDRF assertion due to partially filled..,2: Enable RDRF assertion due to partially filled..,3: Enable RDRF assertion due to partially filled..,4: Enable RDRF assertion due to partially filled..,5: Enable RDRF assertion due to partially filled..,6: Enable RDRF assertion due to partially filled..,7: Enable RDRF assertion due to partially filled.."
|
|
bitfld.long 0x20 9. "TXOFE,Transmit FIFO Overflow Interrupt Enable" "0: TXOF flag does not generate an interrupt to the..,1: TXOF flag generates an interrupt to the host."
|
|
newline
|
|
bitfld.long 0x20 8. "RXUFE,Receive FIFO Underflow Interrupt Enable" "0: RXUF flag does not generate an interrupt to the..,1: RXUF flag generates an interrupt to the host."
|
|
bitfld.long 0x20 7. "TXFE,Transmit FIFO Enable" "0: Transmit FIFO is not enabled. Buffer is depth 1.,1: Transmit FIFO is enabled. Buffer is depth.."
|
|
newline
|
|
rbitfld.long 0x20 4.--6. "TXFIFOSIZE,Transmit FIFO Buffer Depth" "0: Transmit FIFO/Buffer depth = 1 dataword.,1: Transmit FIFO/Buffer depth = 4 datawords.,2: Transmit FIFO/Buffer depth = 8 datawords.,3: Transmit FIFO/Buffer depth = 16 datawords.,4: Transmit FIFO/Buffer depth = 32 datawords.,5: Transmit FIFO/Buffer depth = 64 datawords.,6: Transmit FIFO/Buffer depth = 128 datawords.,7: Transmit FIFO/Buffer depth = 256 datawords"
|
|
bitfld.long 0x20 3. "RXFE,Receive FIFO Enable" "0: Receive FIFO is not enabled. Buffer is depth 1.,1: Receive FIFO is enabled. Buffer is depth.."
|
|
newline
|
|
rbitfld.long 0x20 0.--2. "RXFIFOSIZE,Receive FIFO Buffer Depth" "0: Receive FIFO/Buffer depth = 1 dataword.,1: Receive FIFO/Buffer depth = 4 datawords.,2: Receive FIFO/Buffer depth = 8 datawords.,3: Receive FIFO/Buffer depth = 16 datawords.,4: Receive FIFO/Buffer depth = 32 datawords.,5: Receive FIFO/Buffer depth = 64 datawords.,6: Receive FIFO/Buffer depth = 128 datawords.,7: Receive FIFO/Buffer depth = 256 datawords."
|
|
line.long 0x24 "WATER,LPUART Watermark Register"
|
|
rbitfld.long 0x24 24.--26. "RXCOUNT,Receive Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 16.--17. "RXWATER,Receive Watermark" "0,1,2,3"
|
|
newline
|
|
rbitfld.long 0x24 8.--10. "TXCOUNT,Transmit Counter" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x24 0.--1. "TXWATER,Transmit Watermark" "0,1,2,3"
|
|
tree.end
|
|
tree.end
|
|
tree "MCM (Miscellaneous Control Module)"
|
|
base ad:0xE0080000
|
|
rgroup.word 0x8++0x3
|
|
line.word 0x0 "PLASC,Crossbar Switch (AXBS) Slave Configuration"
|
|
hexmask.word.byte 0x0 0.--7. 1. "ASC,Each bit in the ASC field indicates whether there is a corresponding connection to the crossbar switch's slave input port."
|
|
line.word 0x2 "PLAMC,Crossbar Switch (AXBS) Master Configuration"
|
|
hexmask.word.byte 0x2 0.--7. 1. "AMC,Each bit in the AMC field indicates whether there is a corresponding connection to the AXBS master input port."
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "CPCR,Core Platform Control Register"
|
|
bitfld.long 0x0 30. "SRAMLWP,SRAM_L Write Protect" "0,1"
|
|
bitfld.long 0x0 28.--29. "SRAMLAP,SRAM_L Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,2: Fixed priority. Processor has highest backdoor..,3: Fixed priority. Backdoor has highest processor.."
|
|
newline
|
|
bitfld.long 0x0 26. "SRAMUWP,SRAM_U Write Protect" "0,1"
|
|
bitfld.long 0x0 24.--25. "SRAMUAP,SRAM_U Arbitration Priority" "0: Round robin,1: Special round robin (favors SRAM backdoor..,2: Fixed priority. Processor has highest backdoor..,3: Fixed priority. Backdoor has highest processor.."
|
|
newline
|
|
bitfld.long 0x0 9. "CBRR,Crossbar Round-robin Arbitration Enable" "0: Fixed-priority arbitration,1: Round-robin arbitration"
|
|
rbitfld.long 0x0 6. "PBRIDGE_IDLE,Peripheral Bridge Idle" "0: PBRIDGE is not idle,1: PBRIDGE is currently idle"
|
|
newline
|
|
rbitfld.long 0x0 4. "FMC_PF_IDLE,Flash Memory Controller Program Flash Idle" "0: FMC program flash is not idle,1: FMC program flash is currently idle"
|
|
rbitfld.long 0x0 3. "AXBS_HLTD,AXBS Halted" "0: AXBS is not currently halted,1: AXBS is currently halted"
|
|
newline
|
|
rbitfld.long 0x0 2. "AXBS_HLT_REQ,AXBS Halt Request" "0: AXBS is not receiving halt request,1: AXBS is receiving halt request"
|
|
rbitfld.long 0x0 0.--1. "HLT_FSM_ST,AXBS Halt State Machine Status" "0: Waiting for request,1: Waiting for platform idle,2: Unused state,3: Platform stalled"
|
|
line.long 0x4 "ISCR,Interrupt Status and Control Register"
|
|
bitfld.long 0x4 31. "FIDCE,FPU Input Denormal Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 28. "FIXCE,FPU Inexact Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 27. "FUFCE,FPU Underflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 26. "FOFCE,FPU Overflow Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
bitfld.long 0x4 25. "FDZCE,FPU Divide-by-Zero Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
bitfld.long 0x4 24. "FIOCE,FPU Invalid Operation Interrupt Enable" "0: Disable interrupt,1: Enable interrupt"
|
|
newline
|
|
rbitfld.long 0x4 15. "FIDC,FPU Input Denormal Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 12. "FIXC,FPU Inexact Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 11. "FUFC,FPU Underflow Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 10. "FOFC,FPU Overflow Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
newline
|
|
rbitfld.long 0x4 9. "FDZC,FPU Divide-by-Zero Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
rbitfld.long 0x4 8. "FIOC,FPU Invalid Operation Interrupt Status" "0: No interrupt,1: Interrupt occurred"
|
|
group.long 0x30++0x3
|
|
line.long 0x0 "PID,Process ID Register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PID,M0.PID and M1.PID for MPU"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "CPO,Compute Operation Control Register"
|
|
bitfld.long 0x0 2. "CPOWOI,Compute Operation Wakeup On Interrupt" "0: No effect.,1: When set the CPOREQ is cleared on any interrupt.."
|
|
rbitfld.long 0x0 1. "CPOACK,Compute Operation Acknowledge" "0: Compute operation entry has not completed or..,1: Compute operation entry has completed or compute.."
|
|
newline
|
|
bitfld.long 0x0 0. "CPOREQ,Compute Operation Request" "0: Request is cleared.,1: Request Compute Operation."
|
|
repeat 2. (increment 0x0 0x1)(increment 0x0 0x4)
|
|
group.long ($2+0x400)++0x3
|
|
line.long 0x0 "LMDR[$1],Local Memory Descriptor Register"
|
|
rbitfld.long 0x0 31. "V,Local Memory Valid" "0: LMEMn is not present.,1: LMEMn is present."
|
|
rbitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity.,1: LMEMn is not a power-of-2 with a capacity is.."
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "LMSZ,LMEM Size"
|
|
hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
rbitfld.long 0x0 17.--19. "DPW,DPW" "?,?,2: LMEMn 32-bits wide,3: LMEMn 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored."
|
|
newline
|
|
rbitfld.long 0x0 13.--15. "MT,Memory Type" "0: SRAM_L,1: SRAM_U,?,?,?,?,?,?"
|
|
hexmask.long.byte 0x0 0.--3. 1. "CF0,Control Field 0"
|
|
repeat.end
|
|
group.long 0x408++0x3
|
|
line.long 0x0 "LMDR2,Local Memory Descriptor Register2"
|
|
rbitfld.long 0x0 31. "V,Local Memory Valid" "0: LMEMn is not present.,1: LMEMn is present."
|
|
rbitfld.long 0x0 28. "LMSZH,LMEM Size Hole" "0: LMEMn is a power-of-2 capacity.,1: LMEMn is not a power-of-2 with a capacity is.."
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "LMSZ,LMEM Size"
|
|
hexmask.long.byte 0x0 20.--23. 1. "WY,Level 1 Cache Ways"
|
|
newline
|
|
rbitfld.long 0x0 17.--19. "DPW,DPW" "?,?,2: LMEMn 32-bits wide,3: LMEMn 64-bits wide,?,?,?,?"
|
|
bitfld.long 0x0 16. "LOCK,LOCK" "0: Writes to the LMDRn[7:0] are allowed.,1: Writes to the LMDRn[7:0] are ignored."
|
|
newline
|
|
rbitfld.long 0x0 13.--15. "MT,Memory Type" "?,?,2: PC Cache,?,?,?,?,?"
|
|
hexmask.long.byte 0x0 4.--7. 1. "CF1,Control Field 1"
|
|
group.long 0x480++0x3
|
|
line.long 0x0 "LMPECR,LMEM Parity and ECC Control Register"
|
|
bitfld.long 0x0 20. "ECPR,Enable Cache Parity Reporting" "0: Reporting disabled,1: Reporting enabled"
|
|
bitfld.long 0x0 8. "ER1BR,Enable RAM ECC 1 Bit Reporting" "0: Reporting disabled,1: Reporting enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "ERNCR,Enable RAM ECC Noncorrectable Reporting" "0: Reporting disabled,1: Reporting enabled"
|
|
group.long 0x488++0x3
|
|
line.long 0x0 "LMPEIR,LMEM Parity and ECC Interrupt Register"
|
|
rbitfld.long 0x0 31. "V,Valid Bit" "0,1"
|
|
hexmask.long.byte 0x0 24.--28. 1. "PEELOC,Parity or ECC Error Location"
|
|
newline
|
|
hexmask.long.byte 0x0 16.--23. 1. "PE,Cache Parity Error"
|
|
hexmask.long.byte 0x0 8.--15. 1. "E1B,E1Bn = ECC 1-bit Error n"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "ENC,ENCn = ECC Noncorrectable Error n"
|
|
rgroup.long 0x490++0x7
|
|
line.long 0x0 "LMFAR,LMEM Fault Address Register"
|
|
hexmask.long 0x0 0.--31. 1. "EFADD,ECC Fault Address"
|
|
line.long 0x4 "LMFATR,LMEM Fault Attribute Register"
|
|
bitfld.long 0x4 31. "OVR,Overrun" "0,1"
|
|
hexmask.long.byte 0x4 8.--15. 1. "PEFMST,PEFMST"
|
|
newline
|
|
bitfld.long 0x4 7. "PEFW,PEFW" "0,1"
|
|
bitfld.long 0x4 4.--6. "PEFSIZE,Parity/ECC Fault Master Size" "0: 8-bit access,1: 16-bit access,2: 32-bit access,3: 64-bit access,?,?,?,?"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--3. 1. "PEFPRT,Parity/ECC Fault Protection"
|
|
rgroup.long 0x4A0++0x7
|
|
line.long 0x0 "LMFDHR,LMEM Fault Data High Register"
|
|
hexmask.long 0x0 0.--31. 1. "PEFDH,PEFDH"
|
|
line.long 0x4 "LMFDLR,LMEM Fault Data Low Register"
|
|
hexmask.long 0x4 0.--31. 1. "PEFDL,PEFDL"
|
|
tree.end
|
|
tree "MDM-AP"
|
|
base edp:0x0100
|
|
rgroup.long 0x00++0x03
|
|
line.long 0x00 "STATUS,MDM-AP Status Register"
|
|
bitfld.long 0x00 18. "CORE_SLEEPING,Indicates whether the core has entered a low power mode" "0: Not in low power mode,1: Low power mode"
|
|
bitfld.long 0x00 17. "CORE_SLEEPDEEP,Indicates whether the core has entered a debug halt mode" "0: Not in debug halt mode,1: Debug halt mode"
|
|
newline
|
|
bitfld.long 0x00 8. "VERY_LOW_POWER_MODE,Indicates that the current power mode is VLPx. This bit is not sticky and should always represent whether VLPx is enabled or not" "0: Not in VLPx power mode,1: VLPx power mode"
|
|
bitfld.long 0x00 7. "LP_ENABLED,Decode of LPLLSM control bits to indicate that VLPS is the selected power mode the next time the Arm core enters Deep Sleep. Low Power Stop Mode enable" "0: Low Power Stop Mode disabled,1: Low Power Stop Mode enabled"
|
|
newline
|
|
bitfld.long 0x00 6. "BACKDOOR_ACCESS_KEY_ENABLE,Indicates whether the MCU has the backdoor access key enabled" "0: Backdoor access key disabled,1: Backdoor access key enabled"
|
|
bitfld.long 0x00 5. "MASS_ERASE_ENABLE,Indicates whether the MCU can be mass erased" "0: Mass erase disabled,1: Mass erase enabled"
|
|
newline
|
|
bitfld.long 0x00 3. "SYSTEM_RESET,Indicates the system reset state" "0: In reset,1: Not in reset"
|
|
bitfld.long 0x00 2. "SYSTEM_SECURITY,Indicates the security state. When secure the debugger does not have access to the system bus or any memory mapped peripherals" "0: Non-secure,1: Secure"
|
|
newline
|
|
bitfld.long 0x00 1. "FLASH_MEMORY_READY,Indicates whether flash memory has been initialized and the debugger can be configured even if the system is continuing to be held in reset via the debugger" "0: Not ready,1: Ready"
|
|
bitfld.long 0x00 0. "FLASH_MEMORY_MASS_ERASE_ACKNOWLEDGE,Cleared on debug reset. Also cleared at the launch of a mass erase command. Set after the flash memory control logic has started the mass erase operation" "0: Not pending,1: Pending"
|
|
group.long 0x04++0x03
|
|
line.long 0x00 "CONTROL,MDM-AP Control Register"
|
|
bitfld.long 0x00 9. "TIMESTAMP_DISABLE,Set this bit to disable the 48-bit global trace timestamp counter during debug halt mode when the core is halted" "0: Counting continues,1: Timestamp counter freezes"
|
|
bitfld.long 0x00 4. "CORE_HOLD_RESET,Configuration bit to control core operation at the end of system reset sequencing" "0: Normal operation,1: Suspend operation"
|
|
newline
|
|
bitfld.long 0x00 3. "SYSTEM_RESET_REQUEST,Set to force a system reset. The system remains held in reset until this bit is cleared" "0: No reset,1: Reset"
|
|
bitfld.long 0x00 2. "DEBUG_REQUEST,Set to force the core to halt" "0: Not halted,1: Halted"
|
|
newline
|
|
bitfld.long 0x00 1. "DEBUG_DISABLE,Set to disable debug" "0: Debug enabled,1: Debug disabled"
|
|
bitfld.long 0x00 0. "FLASH_MEMORY_MASS_ERASE_IN_PROGRESS,Set to cause mass erase. Cleared by hardware after mass erase operation completes" "0: Not pending,1: Pending"
|
|
rgroup.long 0xFC++0x03
|
|
line.long 0x00 "ID,MDM-AP ID Register"
|
|
tree.end
|
|
tree "MEM_OTP_AE (One Time Programmable Memory)"
|
|
base ad:0x120
|
|
group.word 0x0++0x3
|
|
line.word 0x0 "CTRL_CMD,Control Command"
|
|
hexmask.word.byte 0x0 0.--5. 1. "CMD,Command"
|
|
line.word 0x2 "STRT_STP,Start Stop"
|
|
hexmask.word.byte 0x2 8.--15. 1. "STOP,Stop"
|
|
hexmask.word.byte 0x2 0.--7. 1. "START,Start"
|
|
rgroup.word 0x8++0x3
|
|
line.word 0x0 "DATAOUT,Data Output"
|
|
hexmask.word.byte 0x0 8.--15. 1. "MIRRD,Mirror Read Direct"
|
|
hexmask.word.byte 0x0 0.--7. 1. "OUTPUT,Output"
|
|
line.word 0x2 "STATUS,Status"
|
|
bitfld.word 0x2 11. "SECTBE3,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 10. "SECTBE2,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 9. "SECTBE1,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
newline
|
|
bitfld.word 0x2 8. "SECTBE0,Sector Boot Enable" "0: Disabled,1: Enabled"
|
|
bitfld.word 0x2 7. "SECTWP3,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 6. "SECTWP2,Sector Write Protect" "0: Not protected,1: Protected"
|
|
newline
|
|
bitfld.word 0x2 5. "SECTWP1,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 4. "SECTWP0,Sector Write Protect" "0: Not protected,1: Protected"
|
|
bitfld.word 0x2 3. "SECTCRCOK3,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
newline
|
|
bitfld.word 0x2 2. "SECTCRCOK2,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
bitfld.word 0x2 1. "SECTCRCOK1,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
bitfld.word 0x2 0. "SECTCRCOK0,Sector CRC OK" "0: CRC error or CRC not verified,1: No CRC error"
|
|
rgroup.word 0x1C++0x3
|
|
line.word 0x0 "ERROR,Error"
|
|
bitfld.word 0x0 14. "BOOTERR,Boot Error" "0: No error,1: Error"
|
|
bitfld.word 0x0 10. "ECC2ERR,ECC 2-bit Error" "0: No error,1: Error"
|
|
bitfld.word 0x0 9. "ECC1ERR,ECC 1-bit Error" "0: No error,1: bit Error"
|
|
newline
|
|
bitfld.word 0x0 7. "CTRLERR,Error" "0,1"
|
|
bitfld.word 0x0 6. "CTRLBUSY,Busy" "0: Idle,1: Executing a command or booting the OTP"
|
|
line.word 0x2 "MODE,Mode"
|
|
hexmask.word.byte 0x2 12.--15. 1. "VERID,Version Identifier"
|
|
bitfld.word 0x2 9.--10. "SUPERUSR,Superuser Mode" "0: User mode,1: Superuser mode,?,?"
|
|
bitfld.word 0x2 8. "TSTIC,IC Test" "0: Normal operation,1: IC Test mode"
|
|
newline
|
|
bitfld.word 0x2 3. "SECTCRCCOMP3,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
bitfld.word 0x2 2. "SECTCRCCOMP2,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
bitfld.word 0x2 1. "SECTCRCCOMP1,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
newline
|
|
bitfld.word 0x2 0. "SECTCRCCOMP0,Sector CRC Check Complete" "0: Not completed,1: Completed"
|
|
tree.end
|
|
tree "MPU (Memory Protection Unit)"
|
|
base ad:0x4000D000
|
|
group.long 0x0++0x3
|
|
line.long 0x0 "CESR,Control/Error Status Register"
|
|
eventfld.long 0x0 31. "SPERR0,Slave Port 0 Error" "0: No error has occurred for slave port 0.,1: An error has occurred for slave port 0."
|
|
eventfld.long 0x0 30. "SPERR1,Slave Port 1 Error" "0: No error has occurred for slave port 1.,1: An error has occurred for slave port 1."
|
|
newline
|
|
eventfld.long 0x0 29. "SPERR2,Slave Port 2 Error" "0: No error has occurred for slave port 2.,1: An error has occurred for slave port 2."
|
|
eventfld.long 0x0 28. "SPERR3,Slave Port 3 Error" "0: No error has occurred for slave port 3.,1: An error has occurred for slave port 3."
|
|
newline
|
|
hexmask.long.byte 0x0 16.--19. 1. "HRL,Hardware Revision Level"
|
|
hexmask.long.byte 0x0 12.--15. 1. "NSP,Number Of Slave Ports"
|
|
newline
|
|
hexmask.long.byte 0x0 8.--11. 1. "NRGD,Number Of Region Descriptors"
|
|
bitfld.long 0x0 0. "VLD,Valid" "0: MPU is disabled. All accesses from all bus..,1: MPU is enabled"
|
|
rgroup.long 0x10++0x1F
|
|
line.long 0x0 "EAR0,Error Address Register. slave port 0"
|
|
hexmask.long 0x0 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x4 "EDR0,Error Detail Register. slave port 0"
|
|
hexmask.long.word 0x4 16.--31. 1. "EACD,Error Access Control Detail"
|
|
hexmask.long.byte 0x4 8.--15. 1. "EPID,Error Process Identification"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "EMN,Error Master Number"
|
|
bitfld.long 0x4 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,2: Supervisor mode instruction access,3: Supervisor mode data access,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x4 0. "ERW,Error Read/Write" "0: Read,1: Write"
|
|
line.long 0x8 "EAR1,Error Address Register. slave port 1"
|
|
hexmask.long 0x8 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0xC "EDR1,Error Detail Register. slave port 1"
|
|
hexmask.long.word 0xC 16.--31. 1. "EACD,Error Access Control Detail"
|
|
hexmask.long.byte 0xC 8.--15. 1. "EPID,Error Process Identification"
|
|
newline
|
|
hexmask.long.byte 0xC 4.--7. 1. "EMN,Error Master Number"
|
|
bitfld.long 0xC 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,2: Supervisor mode instruction access,3: Supervisor mode data access,?,?,?,?"
|
|
newline
|
|
bitfld.long 0xC 0. "ERW,Error Read/Write" "0: Read,1: Write"
|
|
line.long 0x10 "EAR2,Error Address Register. slave port 2"
|
|
hexmask.long 0x10 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x14 "EDR2,Error Detail Register. slave port 2"
|
|
hexmask.long.word 0x14 16.--31. 1. "EACD,Error Access Control Detail"
|
|
hexmask.long.byte 0x14 8.--15. 1. "EPID,Error Process Identification"
|
|
newline
|
|
hexmask.long.byte 0x14 4.--7. 1. "EMN,Error Master Number"
|
|
bitfld.long 0x14 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,2: Supervisor mode instruction access,3: Supervisor mode data access,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x14 0. "ERW,Error Read/Write" "0: Read,1: Write"
|
|
line.long 0x18 "EAR3,Error Address Register. slave port 3"
|
|
hexmask.long 0x18 0.--31. 1. "EADDR,Error Address"
|
|
line.long 0x1C "EDR3,Error Detail Register. slave port 3"
|
|
hexmask.long.word 0x1C 16.--31. 1. "EACD,Error Access Control Detail"
|
|
hexmask.long.byte 0x1C 8.--15. 1. "EPID,Error Process Identification"
|
|
newline
|
|
hexmask.long.byte 0x1C 4.--7. 1. "EMN,Error Master Number"
|
|
bitfld.long 0x1C 1.--3. "EATTR,Error Attributes" "0: User mode instruction access,1: User mode data access,2: Supervisor mode instruction access,3: Supervisor mode data access,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x1C 0. "ERW,Error Read/Write" "0: Read,1: Write"
|
|
group.long 0x400++0x7F
|
|
line.long 0x0 "RGD0_WORD0,Region Descriptor 0. Word 0"
|
|
hexmask.long 0x0 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x4 "RGD0_WORD1,Region Descriptor 0. Word 1"
|
|
hexmask.long 0x4 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x8 "RGD0_WORD2,Region Descriptor 0. Word 2"
|
|
bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "RGD0_WORD3,Region Descriptor 0. Word 3"
|
|
hexmask.long.byte 0xC 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0xC 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0xC 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x10 "RGD1_WORD0,Region Descriptor 1. Word 0"
|
|
hexmask.long 0x10 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x14 "RGD1_WORD1,Region Descriptor 1. Word 1"
|
|
hexmask.long 0x14 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x18 "RGD1_WORD2,Region Descriptor 1. Word 2"
|
|
bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "RGD1_WORD3,Region Descriptor 1. Word 3"
|
|
hexmask.long.byte 0x1C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x1C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x1C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x20 "RGD2_WORD0,Region Descriptor 2. Word 0"
|
|
hexmask.long 0x20 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x24 "RGD2_WORD1,Region Descriptor 2. Word 1"
|
|
hexmask.long 0x24 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x28 "RGD2_WORD2,Region Descriptor 2. Word 2"
|
|
bitfld.long 0x28 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x28 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x28 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x28 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x28 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x28 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x28 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x28 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x28 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x28 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x28 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x28 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x28 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x28 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x28 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x28 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x28 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x28 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x2C "RGD2_WORD3,Region Descriptor 2. Word 3"
|
|
hexmask.long.byte 0x2C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x2C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x2C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x30 "RGD3_WORD0,Region Descriptor 3. Word 0"
|
|
hexmask.long 0x30 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x34 "RGD3_WORD1,Region Descriptor 3. Word 1"
|
|
hexmask.long 0x34 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x38 "RGD3_WORD2,Region Descriptor 3. Word 2"
|
|
bitfld.long 0x38 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x38 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x38 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x38 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x38 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x38 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x38 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x38 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x38 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x38 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x38 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x38 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x38 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x38 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x38 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x38 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x38 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x38 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x3C "RGD3_WORD3,Region Descriptor 3. Word 3"
|
|
hexmask.long.byte 0x3C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x3C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x3C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x40 "RGD4_WORD0,Region Descriptor 4. Word 0"
|
|
hexmask.long 0x40 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x44 "RGD4_WORD1,Region Descriptor 4. Word 1"
|
|
hexmask.long 0x44 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x48 "RGD4_WORD2,Region Descriptor 4. Word 2"
|
|
bitfld.long 0x48 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x48 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x48 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x48 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x48 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x48 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x48 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x48 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x48 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x48 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x48 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x48 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x48 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x48 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x48 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x48 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x48 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x48 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4C "RGD4_WORD3,Region Descriptor 4. Word 3"
|
|
hexmask.long.byte 0x4C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x4C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x4C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x50 "RGD5_WORD0,Region Descriptor 5. Word 0"
|
|
hexmask.long 0x50 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x54 "RGD5_WORD1,Region Descriptor 5. Word 1"
|
|
hexmask.long 0x54 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x58 "RGD5_WORD2,Region Descriptor 5. Word 2"
|
|
bitfld.long 0x58 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x58 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x58 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x58 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x58 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x58 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x58 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x58 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x58 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x58 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x58 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x58 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x58 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x58 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x58 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x58 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x58 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x58 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x5C "RGD5_WORD3,Region Descriptor 5. Word 3"
|
|
hexmask.long.byte 0x5C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x5C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x5C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x60 "RGD6_WORD0,Region Descriptor 6. Word 0"
|
|
hexmask.long 0x60 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x64 "RGD6_WORD1,Region Descriptor 6. Word 1"
|
|
hexmask.long 0x64 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x68 "RGD6_WORD2,Region Descriptor 6. Word 2"
|
|
bitfld.long 0x68 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x68 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x68 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x68 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x68 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x68 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x68 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x68 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x68 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x68 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x68 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x68 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x68 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x68 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x68 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x68 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x68 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x68 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x6C "RGD6_WORD3,Region Descriptor 6. Word 3"
|
|
hexmask.long.byte 0x6C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x6C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x6C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
line.long 0x70 "RGD7_WORD0,Region Descriptor 7. Word 0"
|
|
hexmask.long 0x70 5.--31. 1. "SRTADDR,Start Address"
|
|
line.long 0x74 "RGD7_WORD1,Region Descriptor 7. Word 1"
|
|
hexmask.long 0x74 5.--31. 1. "ENDADDR,End Address"
|
|
line.long 0x78 "RGD7_WORD2,Region Descriptor 7. Word 2"
|
|
bitfld.long 0x78 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x78 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x78 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x78 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x78 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x78 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x78 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x78 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x78 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x78 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x78 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x78 12.--14. "M2UM,Bus Master 2 User Mode Access control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x78 11. "M1PE,Bus Master 1 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x78 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x78 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x78 5. "M0PE,Bus Master 0 Process Identifier enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x78 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x78 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x7C "RGD7_WORD3,Region Descriptor 7. Word 3"
|
|
hexmask.long.byte 0x7C 24.--31. 1. "PID,Process Identifier"
|
|
hexmask.long.byte 0x7C 16.--23. 1. "PIDMASK,Process Identifier Mask"
|
|
newline
|
|
bitfld.long 0x7C 0. "VLD,Valid" "0: Region descriptor is invalid,1: Region descriptor is valid"
|
|
group.long 0x800++0x1F
|
|
line.long 0x0 "RGDAAC0,Region Descriptor Alternate Access Control 0"
|
|
bitfld.long 0x0 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x0 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x0 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x0 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x0 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x0 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x0 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x0 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x0 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x0 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x0 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x0 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x0 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x0 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x0 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x4 "RGDAAC1,Region Descriptor Alternate Access Control 1"
|
|
bitfld.long 0x4 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x4 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x4 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x4 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x4 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x4 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x4 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x4 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x4 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x4 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x4 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x4 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x4 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x4 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x4 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x4 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x4 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x8 "RGDAAC2,Region Descriptor Alternate Access Control 2"
|
|
bitfld.long 0x8 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x8 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x8 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x8 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x8 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x8 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x8 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x8 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x8 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x8 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x8 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x8 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x8 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0xC "RGDAAC3,Region Descriptor Alternate Access Control 3"
|
|
bitfld.long 0xC 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0xC 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0xC 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0xC 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0xC 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0xC 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0xC 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0xC 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0xC 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0xC 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0xC 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0xC 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0xC 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0xC 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0xC 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0xC 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0xC 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x10 "RGDAAC4,Region Descriptor Alternate Access Control 4"
|
|
bitfld.long 0x10 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x10 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x10 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x10 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x10 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x10 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x10 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x10 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x10 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x10 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x10 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x10 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x10 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x10 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x10 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x10 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x10 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x14 "RGDAAC5,Region Descriptor Alternate Access Control 5"
|
|
bitfld.long 0x14 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x14 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x14 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x14 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x14 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x14 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x14 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x14 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x14 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x14 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x14 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x14 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x14 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x14 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x14 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x14 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x14 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x18 "RGDAAC6,Region Descriptor Alternate Access Control 6"
|
|
bitfld.long 0x18 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x18 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x18 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x18 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x18 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x18 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x18 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x18 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x18 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x18 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x18 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x18 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x18 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x18 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
line.long 0x1C "RGDAAC7,Region Descriptor Alternate Access Control 7"
|
|
bitfld.long 0x1C 31. "M7RE,Bus Master 7 Read Enable" "0: Bus master 7 reads terminate with an access..,1: Bus master 7 reads allowed"
|
|
bitfld.long 0x1C 30. "M7WE,Bus Master 7 Write Enable" "0: Bus master 7 writes terminate with an access..,1: Bus master 7 writes allowed"
|
|
newline
|
|
bitfld.long 0x1C 29. "M6RE,Bus Master 6 Read Enable" "0: Bus master 6 reads terminate with an access..,1: Bus master 6 reads allowed"
|
|
bitfld.long 0x1C 28. "M6WE,Bus Master 6 Write Enable" "0: Bus master 6 writes terminate with an access..,1: Bus master 6 writes allowed"
|
|
newline
|
|
bitfld.long 0x1C 27. "M5RE,Bus Master 5 Read Enable" "0: Bus master 5 reads terminate with an access..,1: Bus master 5 reads allowed"
|
|
bitfld.long 0x1C 26. "M5WE,Bus Master 5 Write Enable" "0: Bus master 5 writes terminate with an access..,1: Bus master 5 writes allowed"
|
|
newline
|
|
bitfld.long 0x1C 25. "M4RE,Bus Master 4 Read Enable" "0: Bus master 4 reads terminate with an access..,1: Bus master 4 reads allowed"
|
|
bitfld.long 0x1C 24. "M4WE,Bus Master 4 Write Enable" "0: Bus master 4 writes terminate with an access..,1: Bus master 4 writes allowed"
|
|
newline
|
|
bitfld.long 0x1C 21.--22. "M3SM,Bus Master 3 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M3UM"
|
|
bitfld.long 0x1C 18.--20. "M3UM,Bus Master 3 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 15.--16. "M2SM,Bus Master 2 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M2UM"
|
|
bitfld.long 0x1C 12.--14. "M2UM,Bus Master 2 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x1C 11. "M1PE,Bus Master 1 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
bitfld.long 0x1C 9.--10. "M1SM,Bus Master 1 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M1UM"
|
|
newline
|
|
bitfld.long 0x1C 6.--8. "M1UM,Bus Master 1 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
bitfld.long 0x1C 5. "M0PE,Bus Master 0 Process Identifier Enable" "0: Do not include the process identifier in the..,1: Include the process identifier and mask.."
|
|
newline
|
|
bitfld.long 0x1C 3.--4. "M0SM,Bus Master 0 Supervisor Mode Access Control" "0: r/w/x; read write and execute allowed,1: r/x; read and execute allowed but no write,2: r/w; read and write allowed but no execute,3: Same as User mode defined in M0UM"
|
|
bitfld.long 0x1C 0.--2. "M0UM,Bus Master 0 User Mode Access Control" "0,1,2,3,4,5,6,7"
|
|
tree.end
|
|
tree "MSCM (Miscellaneous System Control Module)"
|
|
base ad:0x40001000
|
|
rgroup.long 0x0++0x3F
|
|
line.long 0x0 "CPxTYPE,Processor X Type Register"
|
|
hexmask.long.tbyte 0x0 8.--31. 1. "PERSONALITY,Processor x Personality"
|
|
hexmask.long.byte 0x0 0.--7. 1. "RYPZ,Processor x Revision"
|
|
line.long 0x4 "CPxNUM,Processor X Number Register"
|
|
bitfld.long 0x4 0. "CPN,Processor x Number" "0,1"
|
|
line.long 0x8 "CPxMASTER,Processor X Master Register"
|
|
hexmask.long.byte 0x8 0.--5. 1. "PPMN,Processor x Physical Master Number"
|
|
line.long 0xC "CPxCOUNT,Processor X Count Register"
|
|
bitfld.long 0xC 0.--1. "PCNT,Processor Count" "0,1,2,3"
|
|
line.long 0x10 "CPxCFG0,Processor X Configuration Register 0"
|
|
hexmask.long.byte 0x10 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0x10 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0x10 8.--15. 1. "DCSZ,Level 1 Data Cache Size"
|
|
hexmask.long.byte 0x10 0.--7. 1. "DCWY,Level 1 Data Cache Ways"
|
|
line.long 0x14 "CPxCFG1,Processor X Configuration Register 1"
|
|
hexmask.long.byte 0x14 24.--31. 1. "L2SZ,Level 2 Instruction Cache Size"
|
|
hexmask.long.byte 0x14 16.--23. 1. "L2WY,Level 2 Instruction Cache Ways"
|
|
line.long 0x18 "CPxCFG2,Processor X Configuration Register 2"
|
|
hexmask.long.byte 0x18 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size"
|
|
hexmask.long.byte 0x18 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size"
|
|
line.long 0x1C "CPxCFG3,Processor X Configuration Register 3"
|
|
bitfld.long 0x1C 8.--9. "SBP,System Bus Ports" "0,1,2,3"
|
|
bitfld.long 0x1C 6. "BB,Bit Banding" "0: Bit Banding is not supported.,1: Bit Banding is supported."
|
|
newline
|
|
bitfld.long 0x1C 5. "CMP,Core Memory Protection unit" "0: Core Memory Protection is not included.,1: Core Memory Protection is included."
|
|
bitfld.long 0x1C 4. "TZ,Trust Zone" "0: Trust Zone support is not included.,1: Trust Zone support is included."
|
|
newline
|
|
bitfld.long 0x1C 3. "MMU,Memory Management Unit" "0: MMU support is not included.,1: MMU support is included."
|
|
bitfld.long 0x1C 2. "JAZ,Jazelle support" "0: Jazelle support is not included.,1: Jazelle support is included."
|
|
newline
|
|
bitfld.long 0x1C 1. "SIMD,SIMD/NEON instruction support" "0: SIMD/NEON support is not included.,1: SIMD/NEON support is included."
|
|
bitfld.long 0x1C 0. "FPU,Floating Point Unit" "0: FPU support is not included.,1: FPU support is included."
|
|
line.long 0x20 "CP0TYPE,Processor 0 Type Register"
|
|
hexmask.long.tbyte 0x20 8.--31. 1. "PERSONALITY,Processor 0 Personality"
|
|
hexmask.long.byte 0x20 0.--7. 1. "RYPZ,Processor 0 Revision"
|
|
line.long 0x24 "CP0NUM,Processor 0 Number Register"
|
|
bitfld.long 0x24 0. "CPN,Processor 0 Number" "0,1"
|
|
line.long 0x28 "CP0MASTER,Processor 0 Master Register"
|
|
hexmask.long.byte 0x28 0.--5. 1. "PPMN,Processor 0 Physical Master Number"
|
|
line.long 0x2C "CP0COUNT,Processor 0 Count Register"
|
|
bitfld.long 0x2C 0.--1. "PCNT,Processor Count" "0,1,2,3"
|
|
line.long 0x30 "CP0CFG0,Processor 0 Configuration Register 0"
|
|
hexmask.long.byte 0x30 24.--31. 1. "ICSZ,Level 1 Instruction Cache Size"
|
|
hexmask.long.byte 0x30 16.--23. 1. "ICWY,Level 1 Instruction Cache Ways"
|
|
newline
|
|
hexmask.long.byte 0x30 8.--15. 1. "DCSZ,Level 1 Data Cache Size"
|
|
hexmask.long.byte 0x30 0.--7. 1. "DCWY,Level 1 Data Cache Ways"
|
|
line.long 0x34 "CP0CFG1,Processor 0 Configuration Register 1"
|
|
hexmask.long.byte 0x34 24.--31. 1. "L2SZ,Level 2 Instruction Cache Size"
|
|
hexmask.long.byte 0x34 16.--23. 1. "L2WY,Level 2 Instruction Cache Ways"
|
|
line.long 0x38 "CP0CFG2,Processor 0 Configuration Register 2"
|
|
hexmask.long.byte 0x38 24.--31. 1. "TMLSZ,Tightly-coupled Memory Lower Size"
|
|
hexmask.long.byte 0x38 8.--15. 1. "TMUSZ,Tightly-coupled Memory Upper Size"
|
|
line.long 0x3C "CP0CFG3,Processor 0 Configuration Register 3"
|
|
bitfld.long 0x3C 8.--9. "SBP,System Bus Ports" "0,1,2,3"
|
|
bitfld.long 0x3C 6. "BB,Bit Banding" "0: Bit Banding is not supported.,1: Bit Banding is supported."
|
|
newline
|
|
bitfld.long 0x3C 5. "CMP,Core Memory Protection unit" "0: Core Memory Protection is not included.,1: Core Memory Protection is included."
|
|
bitfld.long 0x3C 4. "TZ,Trust Zone" "0: Trust Zone support is not included.,1: Trust Zone support is included."
|
|
newline
|
|
bitfld.long 0x3C 3. "MMU,Memory Management Unit" "0: MMU support is not included.,1: MMU support is included."
|
|
bitfld.long 0x3C 2. "JAZ,Jazelle support" "0: Jazelle support is not included.,1: Jazelle support is included."
|
|
newline
|
|
bitfld.long 0x3C 1. "SIMD,SIMD/NEON instruction support" "0: SIMD/NEON support is not included.,1: SIMD/NEON support is included."
|
|
bitfld.long 0x3C 0. "FPU,Floating Point Unit" "0: FPU support is not included.,1: FPU support is included."
|
|
group.long 0x400++0xB
|
|
line.long 0x0 "OCMDR0,On-Chip Memory Descriptor Register"
|
|
rbitfld.long 0x0 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present."
|
|
rbitfld.long 0x0 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.."
|
|
newline
|
|
hexmask.long.byte 0x0 24.--27. 1. "OCMSZ,OCMSZ"
|
|
rbitfld.long 0x0 17.--19. "OCMW,OCMW" "?,?,2: OCMEMn 32-bits wide,3: OCMEMn 64-bits wide,4: OCMEMn 128-bits wide,5: OCMEMn 256-bits wide,?,?"
|
|
newline
|
|
bitfld.long 0x0 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored"
|
|
rbitfld.long 0x0 13.--15. "OCMT,OCMT" "?,?,?,?,4: OCMEMn is a Program Flash.,5: OCMEMn is a Data Flash.,6: OCMEMn is an EEE.,?"
|
|
newline
|
|
rbitfld.long 0x0 12. "OCMPU,OCMPU" "0,1"
|
|
bitfld.long 0x0 4.--5. "OCM1,OCMEM Control Field 1" "0,1,2,3"
|
|
line.long 0x4 "OCMDR1,On-Chip Memory Descriptor Register"
|
|
rbitfld.long 0x4 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present."
|
|
rbitfld.long 0x4 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.."
|
|
newline
|
|
hexmask.long.byte 0x4 24.--27. 1. "OCMSZ,OCMSZ"
|
|
rbitfld.long 0x4 17.--19. "OCMW,OCMW" "?,?,2: OCMEMn 32-bits wide,3: OCMEMn 64-bits wide,4: OCMEMn 128-bits wide,5: OCMEMn 256-bits wide,?,?"
|
|
newline
|
|
bitfld.long 0x4 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored"
|
|
rbitfld.long 0x4 13.--15. "OCMT,OCMT" "?,?,?,?,4: OCMEMn is a Program Flash.,5: OCMEMn is a Data Flash.,6: OCMEMn is an EEE.,?"
|
|
newline
|
|
rbitfld.long 0x4 12. "OCMPU,OCMPU" "0,1"
|
|
bitfld.long 0x4 4.--5. "OCM1,OCMEM Control Field 1" "0,1,2,3"
|
|
line.long 0x8 "OCMDR2,On-Chip Memory Descriptor Register"
|
|
rbitfld.long 0x8 31. "V,V" "0: OCMEMn is not present.,1: OCMEMn is present."
|
|
rbitfld.long 0x8 28. "OCMSZH,OCMSZH" "0: OCMEMn is a power-of-2 capacity.,1: OCMEMn is not a power-of-2 with a capacity is.."
|
|
newline
|
|
hexmask.long.byte 0x8 24.--27. 1. "OCMSZ,OCMSZ"
|
|
rbitfld.long 0x8 17.--19. "OCMW,OCMW" "?,?,2: OCMEMn 32-bits wide,3: OCMEMn 64-bits wide,4: OCMEMn 128-bits wide,5: OCMEMn 256-bits wide,?,?"
|
|
newline
|
|
bitfld.long 0x8 16. "RO,RO" "0: Writes to the OCMDRn[11:0] are allowed,1: Writes to the OCMDRn[11:0] are ignored"
|
|
rbitfld.long 0x8 13.--15. "OCMT,OCMT" "?,?,?,?,4: OCMEMn is a Program Flash.,5: OCMEMn is a Data Flash.,6: OCMEMn is an EEE.,?"
|
|
newline
|
|
rbitfld.long 0x8 12. "OCMPU,OCMPU" "0,1"
|
|
tree.end
|
|
tree "PCC (Peripheral Clock Controller)"
|
|
base ad:0x40065000
|
|
group.long 0x80++0x7
|
|
line.long 0x0 "PCC_FTFM,PCC FTFM Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x4 "PCC_DMAMUX,PCC DMAMUX Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
group.long 0x90++0xF
|
|
line.long 0x0 "PCC_FlexCAN0,PCC FlexCAN0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x4 "PCC_FlexCAN1,PCC FlexCAN1 Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x8 "PCC_FTM3,PCC FTM3 Register"
|
|
rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0xC "PCC_ADC1,PCC ADC1 Register"
|
|
rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0xC 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xB0++0xB
|
|
line.long 0x0 "PCC_LPSPI0,PCC LPSPI0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x4 "PCC_LPSPI1,PCC LPSPI1 Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x8 "PCC_LPSPI2,PCC LPSPI2 Register"
|
|
rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xC4++0x7
|
|
line.long 0x0 "PCC_PDB1,PCC PDB1 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x4 "PCC_CRC,PCC CRC Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
group.long 0xD8++0x17
|
|
line.long 0x0 "PCC_PDB0,PCC PDB0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x4 "PCC_LPIT,PCC LPIT Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x8 "PCC_FTM0,PCC FTM0 Register"
|
|
rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0xC "PCC_FTM1,PCC FTM1 Register"
|
|
rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0xC 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x10 "PCC_FTM2,PCC FTM2 Register"
|
|
rbitfld.long 0x10 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x10 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x10 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off. An external clock can be enabled..,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x14 "PCC_ADC0,PCC ADC0 Register"
|
|
rbitfld.long 0x14 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x14 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x14 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0xF4++0x3
|
|
line.long 0x0 "PCC_RTC,PCC RTC Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
group.long 0x100++0x3
|
|
line.long 0x0 "PCC_LPTMR0,PCC LPTMR0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
bitfld.long 0x0 3. "FRAC,Peripheral Clock Divider Fraction" "0: Fractional value is 0.,1: Fractional value is 1."
|
|
newline
|
|
bitfld.long 0x0 0.--2. "PCD,Peripheral Clock Divider Select" "0: Divide by 1.,1: Divide by 2.,2: Divide by 3.,3: Divide by 4.,4: Divide by 5.,5: Divide by 6.,6: Divide by 7.,7: Divide by 8."
|
|
group.long 0x124++0x13
|
|
line.long 0x0 "PCC_PORTA,PCC PORTA Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x4 "PCC_PORTB,PCC PORTB Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x8 "PCC_PORTC,PCC PORTC Register"
|
|
rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0xC "PCC_PORTD,PCC PORTD Register"
|
|
rbitfld.long 0xC 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0xC 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
line.long 0x10 "PCC_PORTE,PCC PORTE Register"
|
|
rbitfld.long 0x10 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x10 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
group.long 0x168++0x3
|
|
line.long 0x0 "PCC_FlexIO,PCC FlexIO Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x184++0x3
|
|
line.long 0x0 "PCC_EWM,PCC EWM Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
group.long 0x198++0x3
|
|
line.long 0x0 "PCC_LPI2C0,PCC LPI2C0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x1A8++0xB
|
|
line.long 0x0 "PCC_LPUART0,PCC LPUART0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x0 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x4 "PCC_LPUART1,PCC LPUART1 Register"
|
|
rbitfld.long 0x4 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x4 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x4 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
line.long 0x8 "PCC_LPUART2,PCC LPUART2 Register"
|
|
rbitfld.long 0x8 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x8 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
newline
|
|
bitfld.long 0x8 24.--26. "PCS,Peripheral Clock Source Select" "0: Clock is off.,1: Clock option 1,2: Clock option 2,3: Clock option 3,4: Clock option 4,5: Clock option 5,6: Clock option 6,7: Clock option 7"
|
|
group.long 0x1CC++0x3
|
|
line.long 0x0 "PCC_CMP0,PCC CMP0 Register"
|
|
rbitfld.long 0x0 31. "PR,Present" "0: Peripheral is not present.,1: Peripheral is present."
|
|
bitfld.long 0x0 30. "CGC,Clock Gate Control" "0: Clock disabled. The current clock selection and..,1: Clock enabled. The current clock selection and.."
|
|
tree.end
|
|
tree "PDB (Programmable Delay Block)"
|
|
base ad:0x0
|
|
tree "PDB0"
|
|
base ad:0x40036000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "SC,Status and Control register"
|
|
bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,2: The internal registers are loaded with the..,3: The internal registers are loaded with the.."
|
|
bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1"
|
|
bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled."
|
|
newline
|
|
bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,2: Counting uses the peripheral clock divided by 4..,3: Counting uses the peripheral clock divided by 8..,4: Counting uses the peripheral clock divided by 16..,5: Counting uses the peripheral clock divided by 32..,6: Counting uses the peripheral clock divided by 64..,7: Counting uses the peripheral clock divided by.."
|
|
hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select"
|
|
newline
|
|
bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled."
|
|
bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled."
|
|
bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,2: Multiplication factor is 20.,3: Multiplication factor is 40."
|
|
newline
|
|
bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode"
|
|
bitfld.long 0x0 0. "LDOK,Load OK" "0,1"
|
|
line.long 0x4 "MOD,Modulus register"
|
|
hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "CNT,Counter register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter"
|
|
group.long 0xC++0x13
|
|
line.long 0x0 "IDLY,Interrupt Delay register"
|
|
hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay"
|
|
line.long 0x4 "CH0C1,Channel n Control register 1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable"
|
|
hexmask.long.byte 0x4 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select"
|
|
newline
|
|
hexmask.long.byte 0x4 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable"
|
|
line.long 0x8 "CH0S,Channel n Status register"
|
|
hexmask.long.byte 0x8 16.--23. 1. "CF,PDB Channel Flags"
|
|
hexmask.long.byte 0x8 0.--7. 1. "ERR,PDB Channel Sequence Error Flags"
|
|
line.long 0xC "CH0DLY0,Channel n Delay 0 register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DLY,PDB Channel Delay"
|
|
line.long 0x10 "CH0DLY1,Channel n Delay 1 register"
|
|
hexmask.long.word 0x10 0.--15. 1. "DLY,PDB Channel Delay"
|
|
group.long 0x38++0xF
|
|
line.long 0x0 "CH1C1,Channel n Control register 1"
|
|
hexmask.long.byte 0x0 16.--23. 1. "BB,PDB Channel Pre-Trigger Back-to-Back Operation Enable"
|
|
hexmask.long.byte 0x0 8.--15. 1. "TOS,PDB Channel Pre-Trigger Output Select"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "EN,PDB Channel Pre-Trigger Enable"
|
|
line.long 0x4 "CH1S,Channel n Status register"
|
|
hexmask.long.byte 0x4 16.--23. 1. "CF,PDB Channel Flags"
|
|
hexmask.long.byte 0x4 0.--7. 1. "ERR,PDB Channel Sequence Error Flags"
|
|
line.long 0x8 "CH1DLY0,Channel n Delay 0 register"
|
|
hexmask.long.word 0x8 0.--15. 1. "DLY,PDB Channel Delay"
|
|
line.long 0xC "CH1DLY1,Channel n Delay 1 register"
|
|
hexmask.long.word 0xC 0.--15. 1. "DLY,PDB Channel Delay"
|
|
group.long 0x190++0x7
|
|
line.long 0x0 "POEN,Pulse-Out n Enable register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable"
|
|
line.long 0x4 "PO0DLY,Pulse-Out n Delay register"
|
|
hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2"
|
|
tree.end
|
|
tree "PDB1"
|
|
base ad:0x40031000
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "SC,Status and Control register"
|
|
bitfld.long 0x0 18.--19. "LDMOD,Load Mode Select" "0: The internal registers are loaded with the..,1: The internal registers are loaded with the..,2: The internal registers are loaded with the..,3: The internal registers are loaded with the.."
|
|
bitfld.long 0x0 17. "PDBEIE,PDB Sequence Error Interrupt Enable" "0: PDB sequence error interrupt disabled.,1: PDB sequence error interrupt enabled."
|
|
newline
|
|
bitfld.long 0x0 16. "SWTRIG,Software Trigger" "0,1"
|
|
bitfld.long 0x0 15. "DMAEN,DMA Enable" "0: DMA disabled.,1: DMA enabled."
|
|
newline
|
|
bitfld.long 0x0 12.--14. "PRESCALER,Prescaler Divider Select" "0: Counting uses the peripheral clock divided by..,1: Counting uses the peripheral clock divided by 2..,2: Counting uses the peripheral clock divided by 4..,3: Counting uses the peripheral clock divided by 8..,4: Counting uses the peripheral clock divided by 16..,5: Counting uses the peripheral clock divided by 32..,6: Counting uses the peripheral clock divided by 64..,7: Counting uses the peripheral clock divided by.."
|
|
hexmask.long.byte 0x0 8.--11. 1. "TRGSEL,Trigger Input Source Select"
|
|
newline
|
|
bitfld.long 0x0 7. "PDBEN,PDB Enable" "0: PDB disabled. Counter is off.,1: PDB enabled."
|
|
bitfld.long 0x0 6. "PDBIF,PDB Interrupt Flag" "0,1"
|
|
newline
|
|
bitfld.long 0x0 5. "PDBIE,PDB Interrupt Enable" "0: PDB interrupt disabled.,1: PDB interrupt enabled."
|
|
bitfld.long 0x0 2.--3. "MULT,Multiplication Factor Select for Prescaler" "0: Multiplication factor is 1.,1: Multiplication factor is 10.,2: Multiplication factor is 20.,3: Multiplication factor is 40."
|
|
newline
|
|
bitfld.long 0x0 1. "CONT,Continuous Mode Enable" "0: PDB operation in One-Shot mode,1: PDB operation in Continuous mode"
|
|
bitfld.long 0x0 0. "LDOK,Load OK" "0,1"
|
|
line.long 0x4 "MOD,Modulus register"
|
|
hexmask.long.word 0x4 0.--15. 1. "MOD,PDB Modulus"
|
|
rgroup.long 0x8++0x3
|
|
line.long 0x0 "CNT,Counter register"
|
|
hexmask.long.word 0x0 0.--15. 1. "CNT,PDB Counter"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "IDLY,Interrupt Delay register"
|
|
hexmask.long.word 0x0 0.--15. 1. "IDLY,PDB Interrupt Delay"
|
|
group.long 0x190++0x7
|
|
line.long 0x0 "POEN,Pulse-Out n Enable register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "POEN,PDB Pulse-Out Enable"
|
|
line.long 0x4 "PO0DLY,Pulse-Out n Delay register"
|
|
hexmask.long.word 0x4 16.--31. 1. "DLY1,PDB Pulse-Out Delay 1"
|
|
hexmask.long.word 0x4 0.--15. 1. "DLY2,PDB Pulse-Out Delay 2"
|
|
tree.end
|
|
tree.end
|
|
tree "PMC (Power Management Controller)"
|
|
base ad:0x4007D000
|
|
group.byte 0x1++0x3
|
|
line.byte 0x0 "LVDSC2,Low Voltage Detect Status and Control 2 Register"
|
|
rbitfld.byte 0x0 7. "LVWF,Low-Voltage Warning Flag" "0: Low-voltage warning event not detected,1: Low-voltage warning event detected"
|
|
bitfld.byte 0x0 6. "LVWACK,Low-Voltage Warning Acknowledge" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 5. "LVWIE,Low-Voltage Warning Interrupt Enable" "0: Hardware interrupt disabled (use polling),1: Request a hardware interrupt when LVWF=1"
|
|
line.byte 0x1 "REGSC,Regulator Status and Control Register"
|
|
bitfld.byte 0x1 7. "LPODIS,LPO Disable Bit" "0: Low power oscillator enabled,1: Low power oscillator disabled"
|
|
rbitfld.byte 0x1 6. "LPOSTAT,LPO Status Bit" "0: Low power oscillator in low phase,1: Low power oscillator in high phase"
|
|
newline
|
|
rbitfld.byte 0x1 2. "REGFPM,Regulator in Full Performance Mode Status Bit" "0: Regulator is in low power mode or transition..,1: Regulator is in full performance mode"
|
|
bitfld.byte 0x1 1. "CLKBIASDIS,Clock Bias Disable Bit" "0: No effect,1: In VLPS mode the bias currents and reference.."
|
|
newline
|
|
bitfld.byte 0x1 0. "BIASEN,Bias Enable Bit" "0: Biasing disabled core logic can run in full..,1: Biasing enabled core logic is slower and there.."
|
|
line.byte 0x2 "LVRFLG,Low Voltage Reset Flags Register"
|
|
eventfld.byte 0x2 7. "PORF,POR Flag" "0,1"
|
|
eventfld.byte 0x2 5. "LVR3FLSF,LVR 3V Flash memory Flag" "0,1"
|
|
newline
|
|
eventfld.byte 0x2 4. "LVR3F,LVR 3V Flag" "0,1"
|
|
eventfld.byte 0x2 3. "LVRXLPF,LVR external in low power mode flag" "0,1"
|
|
newline
|
|
eventfld.byte 0x2 2. "LVRXF,LVR External Flag" "0,1"
|
|
eventfld.byte 0x2 1. "LVRLPF,LVR in low power mode core Flag" "0,1"
|
|
newline
|
|
eventfld.byte 0x2 0. "LVRF,LVR Core Flag" "0,1"
|
|
line.byte 0x3 "LPOTRIM,Low Power Oscillator Trim Register"
|
|
hexmask.byte 0x3 0.--4. 1. "LPOTRIM,LPO trimming bits"
|
|
tree.end
|
|
tree "PMC_142 (Power Management Controller for S32M242/S32M241)"
|
|
base ad:0x4007D000
|
|
group.byte 0x0++0x2
|
|
line.byte 0x0 "LVDSC1,Low Voltage Detect Status and Control 1 Register"
|
|
rbitfld.byte 0x0 7. "LVDF,Low Voltage Detect Flag" "0: Low-voltage event not detected,1: Low-voltage event detected"
|
|
bitfld.byte 0x0 6. "LVDACK,Low Voltage Detect Acknowledge" "0,1"
|
|
newline
|
|
bitfld.byte 0x0 5. "LVDIE,Low Voltage Detect Interrupt Enable" "0: Hardware interrupt disabled (use polling),1: Request a hardware interrupt when LVDF = 1"
|
|
bitfld.byte 0x0 4. "LVDRE,Low Voltage Detect Reset Enable" "0: No system resets on low voltage detect events.,1: If the supply voltage falls below VLVD a system.."
|
|
line.byte 0x1 "LVDSC2,Low Voltage Detect Status and Control 2 Register"
|
|
rbitfld.byte 0x1 7. "LVWF,Low-Voltage Warning Flag" "0: Low-voltage warning event not detected,1: Low-voltage warning event detected"
|
|
bitfld.byte 0x1 6. "LVWACK,Low-Voltage Warning Acknowledge" "0,1"
|
|
newline
|
|
bitfld.byte 0x1 5. "LVWIE,Low-Voltage Warning Interrupt Enable" "0: Hardware interrupt disabled (use polling),1: Request a hardware interrupt when LVWF=1"
|
|
line.byte 0x2 "REGSC,Regulator Status and Control Register"
|
|
bitfld.byte 0x2 7. "LPODIS,LPO Disable Bit" "0: Low power oscillator enabled,1: Low power oscillator disabled"
|
|
rbitfld.byte 0x2 6. "LPOSTAT,LPO Status Bit" "0: Low power oscillator in low phase,1: Low power oscillator in high phase"
|
|
newline
|
|
rbitfld.byte 0x2 2. "REGFPM,Regulator in Full Performance Mode Status Bit" "0: Regulator is in low power mode or transition..,1: Regulator is in full performance mode"
|
|
bitfld.byte 0x2 1. "CLKBIASDIS,Clock Bias Disable Bit" "0: No effect,1: In VLPS mode the bias currents and reference.."
|
|
newline
|
|
bitfld.byte 0x2 0. "BIASEN,Bias Enable Bit" "0: Biasing disabled core logic can run in full..,1: Biasing enabled core logic is slower and there.."
|
|
group.byte 0x4++0x0
|
|
line.byte 0x0 "LPOTRIM,Low Power Oscillator Trim Register"
|
|
hexmask.byte 0x0 0.--4. 1. "LPOTRIM,LPO trimming bits"
|
|
tree.end
|
|
tree "PMC_AE (Power Management Controller)"
|
|
base ad:0x100
|
|
group.long 0x0++0x7
|
|
line.long 0x0 "CONFIG,PMC Configuration Register"
|
|
bitfld.long 0x0 6. "LINSUPEN,LINPHY supply enable" "0: LINPHY supply is high ohmic (off),1: LINPHY supply is as selected by LINSUPSEL bit"
|
|
bitfld.long 0x0 5. "LVDVLSSEL,LVD VLS select" "0: LVD threshold on VLS supply is 5.5V,1: LVD threshold on VLS supply is 6.5V"
|
|
newline
|
|
bitfld.long 0x0 4. "LINSUPSEL,LINPHY supply select" "0: LINPHY supply connects to VSUP pin,1: LINPHY supply connects to HD pin (of GDU)"
|
|
bitfld.long 0x0 3. "VDDCEN,VDDC enable" "0: VDDC is disabled,1: VDDC is enabled and regulated to 5V"
|
|
newline
|
|
bitfld.long 0x0 2. "VPREEXT,VPRE external regulator enable" "0: PMC controlled (GCTL pin) external VPRE..,1: PMC controlled (GCTL pin) external VPRE.."
|
|
bitfld.long 0x0 1. "VPREINT,VPRE internal regulator enable" "0: PMC internal VPRE regulator is off,1: PMC internal VPRE regulator is on"
|
|
newline
|
|
bitfld.long 0x0 0. "VDDSEL5V,VDD voltage level select" "0: VDD is regulated to 3.3V,1: VDD is regulated to 5V"
|
|
line.long 0x4 "MONITOR,PMC Monitor Register"
|
|
bitfld.long 0x4 28. "LVDVLSIE,LVD on VLS interrupt enable" "0: Low voltage detect interrupts on VLS disabled,1: Low voltage detect interrupts on VLS enabled"
|
|
bitfld.long 0x4 27. "LVDCIE,LVD on VDDC interrupt enable." "0: Low voltage detect interrupts on VDDC disabled,1: Low voltage detect interrupts on VDDC enabled"
|
|
newline
|
|
bitfld.long 0x4 26. "HVDVDDIE,HVD on VDD interrupt enable" "0: High voltage detect interrupt disabled,1: High voltage detect interrupt enabled"
|
|
bitfld.long 0x4 24. "HVDINT15IE,HVD on VDDINT or VDD15 interrupt enable" "0: High voltage detect interrupt disabled,1: High voltage detect interrupt enabled"
|
|
newline
|
|
rbitfld.long 0x4 20. "LVDVLSS,LVDVLS status" "0: Voltage on VLS is above low-voltage detect..,1: Voltage on VLS is below low-voltage detect.."
|
|
rbitfld.long 0x4 19. "LVDCS,LVDC status" "0: Voltage on VDDC is above low-voltage detect..,1: Voltage on VDDC is below low-voltage detect.."
|
|
newline
|
|
rbitfld.long 0x4 18. "HVDVDDS,HVDVDD status" "0: Voltage on VDD is below high-voltage detect..,1: Voltage on VDD is above high-voltage detect.."
|
|
rbitfld.long 0x4 17. "HVDINTS,HVDINT status" "0: Voltage on VDDINT is below high-voltage detect..,1: Voltage on VDDINT is above high-voltage detect.."
|
|
newline
|
|
rbitfld.long 0x4 16. "HVD15S,HVD15 status" "0: Voltage on VDD15 is below high-voltage detect..,1: Voltage on VDD15 is above high-voltage detect.."
|
|
bitfld.long 0x4 14. "ILVRINTF,Inverse LVRINT flag" "0: Low-voltage reset event has occurred,1: No low-voltage reset event has occurred"
|
|
newline
|
|
bitfld.long 0x4 13. "ILVR15F,Inverse LVR15 flag" "0: Low-voltage reset event has occurred,1: No low-voltage reset event has occurred"
|
|
bitfld.long 0x4 10. "IHVDVDDF,Inverse HVDVDD flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
newline
|
|
bitfld.long 0x4 9. "IHVDINTF,Inverse HVDINT flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
bitfld.long 0x4 8. "IHVD15F,Inverse HVD15 flag" "0: High-voltage event has occurred,1: No high-voltage event has occurred"
|
|
newline
|
|
eventfld.long 0x4 7. "PORF,POR flag" "0: No power-on reset event has occurred,1: Power-on reset event has occurred"
|
|
eventfld.long 0x4 6. "LVRINTF,LVRINT flag" "0: No low-voltage reset event has occurred,1: Low-voltage reset event has occurred"
|
|
newline
|
|
eventfld.long 0x4 5. "LVR15F,LVR15 flag" "0: No low-voltage reset event has occurred,1: Low-voltage reset event has occurred"
|
|
eventfld.long 0x4 4. "LVDVLSF,LVDVLS flag" "0: No low voltage event detected on VLS supply or..,1: Low voltage event detected on VLS supply and VLS.."
|
|
newline
|
|
eventfld.long 0x4 3. "LVDCF,LVDC flag" "0: No change on LVDCS,1: LVDCS has changed"
|
|
eventfld.long 0x4 2. "HVDVDDF,HVDVDD flag" "0: No high voltage event detected on VDD supply,1: High voltage event detected on VDD supply"
|
|
newline
|
|
eventfld.long 0x4 1. "HVDINTF,HVDINT flag" "0: No high voltage event detected on VDDINT supply,1: High voltage event detected on VDDINT supply"
|
|
eventfld.long 0x4 0. "HVD15F,HVD15 flag" "0: No high voltage event detected on VDD15 supply,1: High voltage event detected on VDD15 supply"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "MONCHECK,Monitor Self Check Register"
|
|
bitfld.long 0x0 22.--23. "TRIGGER,Monitor Self Check Trigger Bits" "?,1: Changing the value from 10 to 01 will trigger a..,2: Default after power-up. Self check idle and..,?"
|
|
eventfld.long 0x0 16. "DONEF,Self Test Done Flag" "0: No self check even has occurred,1: Self check has been executed"
|
|
tree.end
|
|
tree "PORT (Port Control and Interrupts)"
|
|
base ad:0x0
|
|
tree "PORTA"
|
|
base ad:0x40049000
|
|
group.long 0x0++0x8F
|
|
line.long 0x0 "PCR0,Pin Control Register 0"
|
|
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x0 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4 "PCR1,Pin Control Register 1"
|
|
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x8 "PCR2,Pin Control Register 2"
|
|
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x8 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0xC "PCR3,Pin Control Register 3"
|
|
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0xC 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x10 "PCR4,Pin Control Register 4"
|
|
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x10 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x10 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x14 "PCR5,Pin Control Register 5"
|
|
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x14 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x18 "PCR6,Pin Control Register 6"
|
|
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x18 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x18 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x1C "PCR7,Pin Control Register 7"
|
|
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x1C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x1C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x20 "PCR8,Pin Control Register 8"
|
|
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x20 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x24 "PCR9,Pin Control Register 9"
|
|
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x24 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x28 "PCR10,Pin Control Register 10"
|
|
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x28 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x28 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x2C "PCR11,Pin Control Register 11"
|
|
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x2C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x2C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x30 "PCR12,Pin Control Register 12"
|
|
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x30 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x30 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x34 "PCR13,Pin Control Register 13"
|
|
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x34 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x34 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x38 "PCR14,Pin Control Register 14"
|
|
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x38 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x38 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x3C "PCR15,Pin Control Register 15"
|
|
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x3C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x3C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x40 "PCR16,Pin Control Register 16"
|
|
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x40 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x44 "PCR17,Pin Control Register 17"
|
|
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x44 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x48 "PCR18,Pin Control Register 18"
|
|
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x48 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x48 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4C "PCR19,Pin Control Register 19"
|
|
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x50 "PCR20,Pin Control Register 20"
|
|
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x50 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x50 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x54 "PCR21,Pin Control Register 21"
|
|
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x54 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x54 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x58 "PCR22,Pin Control Register 22"
|
|
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x58 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x58 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x5C "PCR23,Pin Control Register 23"
|
|
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x5C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x5C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x60 "PCR24,Pin Control Register 24"
|
|
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x60 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x60 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x64 "PCR25,Pin Control Register 25"
|
|
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x64 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x64 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x68 "PCR26,Pin Control Register 26"
|
|
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x68 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x68 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x6C "PCR27,Pin Control Register 27"
|
|
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x6C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x6C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x70 "PCR28,Pin Control Register 28"
|
|
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x70 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x70 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x74 "PCR29,Pin Control Register 29"
|
|
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x74 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x78 "PCR30,Pin Control Register 30"
|
|
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x78 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x7C "PCR31,Pin Control Register 31"
|
|
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x7C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x80 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x80 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x80 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x84 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x84 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x84 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x88 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x88 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x88 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
line.long 0x8C "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x8C 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x8C 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "DFER,Digital Filter Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable"
|
|
line.long 0x4 "DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the PMC 1kHz LPO.."
|
|
line.long 0x8 "DFWR,Digital Filter Width Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length"
|
|
tree.end
|
|
tree "PORTB"
|
|
base ad:0x4004A000
|
|
group.long 0x0++0x8F
|
|
line.long 0x0 "PCR0,Pin Control Register 0"
|
|
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x0 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4 "PCR1,Pin Control Register 1"
|
|
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x8 "PCR2,Pin Control Register 2"
|
|
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x8 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0xC "PCR3,Pin Control Register 3"
|
|
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0xC 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x10 "PCR4,Pin Control Register 4"
|
|
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x10 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x10 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x14 "PCR5,Pin Control Register 5"
|
|
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x14 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x18 "PCR6,Pin Control Register 6"
|
|
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x18 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x18 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x1C "PCR7,Pin Control Register 7"
|
|
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x1C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x1C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x20 "PCR8,Pin Control Register 8"
|
|
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x20 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x24 "PCR9,Pin Control Register 9"
|
|
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x24 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x28 "PCR10,Pin Control Register 10"
|
|
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x28 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x28 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x2C "PCR11,Pin Control Register 11"
|
|
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x2C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x2C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x30 "PCR12,Pin Control Register 12"
|
|
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x30 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x30 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x34 "PCR13,Pin Control Register 13"
|
|
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x34 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x34 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x38 "PCR14,Pin Control Register 14"
|
|
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x38 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x38 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x3C "PCR15,Pin Control Register 15"
|
|
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x3C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x3C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x40 "PCR16,Pin Control Register 16"
|
|
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x40 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x44 "PCR17,Pin Control Register 17"
|
|
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x44 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x48 "PCR18,Pin Control Register 18"
|
|
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x48 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x48 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4C "PCR19,Pin Control Register 19"
|
|
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x50 "PCR20,Pin Control Register 20"
|
|
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x50 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x50 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x54 "PCR21,Pin Control Register 21"
|
|
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x54 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x54 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x58 "PCR22,Pin Control Register 22"
|
|
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x58 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x58 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x5C "PCR23,Pin Control Register 23"
|
|
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x5C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x5C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x60 "PCR24,Pin Control Register 24"
|
|
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x60 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x60 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x64 "PCR25,Pin Control Register 25"
|
|
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x64 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x64 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x68 "PCR26,Pin Control Register 26"
|
|
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x68 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x68 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x6C "PCR27,Pin Control Register 27"
|
|
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x6C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x6C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x70 "PCR28,Pin Control Register 28"
|
|
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x70 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x70 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x74 "PCR29,Pin Control Register 29"
|
|
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x74 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x78 "PCR30,Pin Control Register 30"
|
|
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x78 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x7C "PCR31,Pin Control Register 31"
|
|
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x7C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x80 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x80 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x80 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x84 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x84 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x84 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x88 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x88 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x88 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
line.long 0x8C "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x8C 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x8C 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "DFER,Digital Filter Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable"
|
|
line.long 0x4 "DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the PMC 1kHz LPO.."
|
|
line.long 0x8 "DFWR,Digital Filter Width Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length"
|
|
tree.end
|
|
tree "PORTC"
|
|
base ad:0x4004B000
|
|
group.long 0x0++0x8F
|
|
line.long 0x0 "PCR0,Pin Control Register 0"
|
|
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x0 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4 "PCR1,Pin Control Register 1"
|
|
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x8 "PCR2,Pin Control Register 2"
|
|
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x8 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0xC "PCR3,Pin Control Register 3"
|
|
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0xC 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x10 "PCR4,Pin Control Register 4"
|
|
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x10 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x10 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x14 "PCR5,Pin Control Register 5"
|
|
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x14 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x18 "PCR6,Pin Control Register 6"
|
|
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x18 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x18 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x1C "PCR7,Pin Control Register 7"
|
|
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x1C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x1C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x20 "PCR8,Pin Control Register 8"
|
|
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x20 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x24 "PCR9,Pin Control Register 9"
|
|
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x24 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x28 "PCR10,Pin Control Register 10"
|
|
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x28 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x28 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x2C "PCR11,Pin Control Register 11"
|
|
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x2C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x2C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x30 "PCR12,Pin Control Register 12"
|
|
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x30 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x30 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x34 "PCR13,Pin Control Register 13"
|
|
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x34 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x34 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x38 "PCR14,Pin Control Register 14"
|
|
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x38 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x38 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x3C "PCR15,Pin Control Register 15"
|
|
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x3C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x3C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x40 "PCR16,Pin Control Register 16"
|
|
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x40 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x44 "PCR17,Pin Control Register 17"
|
|
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x44 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x48 "PCR18,Pin Control Register 18"
|
|
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x48 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x48 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4C "PCR19,Pin Control Register 19"
|
|
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x50 "PCR20,Pin Control Register 20"
|
|
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x50 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x50 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x54 "PCR21,Pin Control Register 21"
|
|
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x54 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x54 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x58 "PCR22,Pin Control Register 22"
|
|
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x58 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x58 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x5C "PCR23,Pin Control Register 23"
|
|
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x5C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x5C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x60 "PCR24,Pin Control Register 24"
|
|
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x60 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x60 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x64 "PCR25,Pin Control Register 25"
|
|
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x64 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x64 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x68 "PCR26,Pin Control Register 26"
|
|
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x68 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x68 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x6C "PCR27,Pin Control Register 27"
|
|
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x6C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x6C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x70 "PCR28,Pin Control Register 28"
|
|
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x70 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x70 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x74 "PCR29,Pin Control Register 29"
|
|
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x74 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x78 "PCR30,Pin Control Register 30"
|
|
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x78 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x7C "PCR31,Pin Control Register 31"
|
|
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x7C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x80 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x80 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x80 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x84 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x84 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x84 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x88 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x88 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x88 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
line.long 0x8C "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x8C 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x8C 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "DFER,Digital Filter Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable"
|
|
line.long 0x4 "DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the PMC 1kHz LPO.."
|
|
line.long 0x8 "DFWR,Digital Filter Width Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length"
|
|
tree.end
|
|
tree "PORTD"
|
|
base ad:0x4004C000
|
|
group.long 0x0++0x8F
|
|
line.long 0x0 "PCR0,Pin Control Register 0"
|
|
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x0 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4 "PCR1,Pin Control Register 1"
|
|
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x8 "PCR2,Pin Control Register 2"
|
|
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x8 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0xC "PCR3,Pin Control Register 3"
|
|
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0xC 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x10 "PCR4,Pin Control Register 4"
|
|
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x10 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x10 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x14 "PCR5,Pin Control Register 5"
|
|
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x14 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x18 "PCR6,Pin Control Register 6"
|
|
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x18 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x18 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x1C "PCR7,Pin Control Register 7"
|
|
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x1C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x1C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x20 "PCR8,Pin Control Register 8"
|
|
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x20 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x24 "PCR9,Pin Control Register 9"
|
|
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x24 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x28 "PCR10,Pin Control Register 10"
|
|
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x28 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x28 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x2C "PCR11,Pin Control Register 11"
|
|
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x2C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x2C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x30 "PCR12,Pin Control Register 12"
|
|
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x30 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x30 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x34 "PCR13,Pin Control Register 13"
|
|
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x34 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x34 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x38 "PCR14,Pin Control Register 14"
|
|
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x38 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x38 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x3C "PCR15,Pin Control Register 15"
|
|
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x3C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x3C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x40 "PCR16,Pin Control Register 16"
|
|
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x40 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x44 "PCR17,Pin Control Register 17"
|
|
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x44 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x48 "PCR18,Pin Control Register 18"
|
|
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x48 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x48 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4C "PCR19,Pin Control Register 19"
|
|
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x50 "PCR20,Pin Control Register 20"
|
|
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x50 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x50 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x54 "PCR21,Pin Control Register 21"
|
|
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x54 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x54 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x58 "PCR22,Pin Control Register 22"
|
|
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x58 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x58 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x5C "PCR23,Pin Control Register 23"
|
|
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x5C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x5C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x60 "PCR24,Pin Control Register 24"
|
|
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x60 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x60 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x64 "PCR25,Pin Control Register 25"
|
|
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x64 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x64 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x68 "PCR26,Pin Control Register 26"
|
|
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x68 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x68 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x6C "PCR27,Pin Control Register 27"
|
|
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x6C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x6C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x70 "PCR28,Pin Control Register 28"
|
|
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x70 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x70 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x74 "PCR29,Pin Control Register 29"
|
|
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x74 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x78 "PCR30,Pin Control Register 30"
|
|
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x78 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x7C "PCR31,Pin Control Register 31"
|
|
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x7C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x80 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x80 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x80 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x84 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x84 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x84 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x88 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x88 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x88 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
line.long 0x8C "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x8C 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x8C 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "DFER,Digital Filter Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable"
|
|
line.long 0x4 "DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the PMC 1kHz LPO.."
|
|
line.long 0x8 "DFWR,Digital Filter Width Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length"
|
|
tree.end
|
|
tree "PORTE"
|
|
base ad:0x4004D000
|
|
group.long 0x0++0x8F
|
|
line.long 0x0 "PCR0,Pin Control Register 0"
|
|
eventfld.long 0x0 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x0 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x0 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x0 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x0 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x0 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x0 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x0 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x0 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x0 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4 "PCR1,Pin Control Register 1"
|
|
eventfld.long 0x4 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x8 "PCR2,Pin Control Register 2"
|
|
eventfld.long 0x8 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x8 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x8 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x8 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x8 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x8 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x8 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x8 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x8 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x8 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0xC "PCR3,Pin Control Register 3"
|
|
eventfld.long 0xC 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0xC 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0xC 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0xC 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0xC 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0xC 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0xC 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0xC 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0xC 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0xC 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x10 "PCR4,Pin Control Register 4"
|
|
eventfld.long 0x10 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x10 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x10 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x10 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x10 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x10 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x10 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x10 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x10 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x10 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x14 "PCR5,Pin Control Register 5"
|
|
eventfld.long 0x14 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x14 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x14 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x14 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x14 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x14 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x14 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x14 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x14 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x14 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x18 "PCR6,Pin Control Register 6"
|
|
eventfld.long 0x18 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x18 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x18 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x18 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x18 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x18 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x18 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x18 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x18 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x18 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x1C "PCR7,Pin Control Register 7"
|
|
eventfld.long 0x1C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x1C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x1C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x1C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x1C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x1C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x1C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x1C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x1C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x1C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x20 "PCR8,Pin Control Register 8"
|
|
eventfld.long 0x20 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x20 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x20 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x20 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x20 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x20 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x20 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x20 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x20 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x20 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x24 "PCR9,Pin Control Register 9"
|
|
eventfld.long 0x24 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x24 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x24 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x24 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x24 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x24 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x24 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x24 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x24 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x24 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x28 "PCR10,Pin Control Register 10"
|
|
eventfld.long 0x28 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x28 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x28 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x28 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x28 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x28 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x28 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x28 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x28 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x28 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x2C "PCR11,Pin Control Register 11"
|
|
eventfld.long 0x2C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x2C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x2C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x2C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x2C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x2C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x2C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x2C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x2C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x2C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x30 "PCR12,Pin Control Register 12"
|
|
eventfld.long 0x30 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x30 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x30 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x30 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x30 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x30 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x30 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x30 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x30 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x30 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x34 "PCR13,Pin Control Register 13"
|
|
eventfld.long 0x34 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x34 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x34 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x34 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x34 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x34 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x34 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x34 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x34 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x34 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x38 "PCR14,Pin Control Register 14"
|
|
eventfld.long 0x38 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x38 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x38 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x38 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x38 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x38 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x38 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x38 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x38 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x38 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x3C "PCR15,Pin Control Register 15"
|
|
eventfld.long 0x3C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x3C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x3C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x3C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x3C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x3C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x3C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x3C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x3C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x3C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x40 "PCR16,Pin Control Register 16"
|
|
eventfld.long 0x40 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x40 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x40 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x40 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x40 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x40 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x40 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x40 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x40 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x40 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x44 "PCR17,Pin Control Register 17"
|
|
eventfld.long 0x44 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x44 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x44 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x44 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x44 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x44 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x44 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x44 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x44 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x44 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x48 "PCR18,Pin Control Register 18"
|
|
eventfld.long 0x48 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x48 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x48 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x48 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x48 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x48 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x48 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x48 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x48 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x48 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x4C "PCR19,Pin Control Register 19"
|
|
eventfld.long 0x4C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x4C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x4C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x4C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x4C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x4C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x4C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x4C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x4C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x4C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x50 "PCR20,Pin Control Register 20"
|
|
eventfld.long 0x50 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x50 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x50 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x50 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x50 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x50 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x50 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x50 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x50 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x50 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x54 "PCR21,Pin Control Register 21"
|
|
eventfld.long 0x54 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x54 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x54 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x54 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x54 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x54 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x54 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x54 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x54 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x54 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x58 "PCR22,Pin Control Register 22"
|
|
eventfld.long 0x58 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x58 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x58 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x58 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x58 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x58 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x58 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x58 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x58 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x58 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x5C "PCR23,Pin Control Register 23"
|
|
eventfld.long 0x5C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x5C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x5C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x5C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x5C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x5C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x5C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x5C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x5C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x5C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x60 "PCR24,Pin Control Register 24"
|
|
eventfld.long 0x60 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x60 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x60 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x60 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x60 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x60 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x60 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x60 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x60 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x60 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x64 "PCR25,Pin Control Register 25"
|
|
eventfld.long 0x64 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x64 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x64 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x64 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x64 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x64 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x64 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x64 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x64 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x64 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x68 "PCR26,Pin Control Register 26"
|
|
eventfld.long 0x68 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x68 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x68 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x68 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x68 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x68 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x68 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x68 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x68 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x68 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x6C "PCR27,Pin Control Register 27"
|
|
eventfld.long 0x6C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x6C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x6C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x6C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x6C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x6C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x6C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x6C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x6C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x6C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x70 "PCR28,Pin Control Register 28"
|
|
eventfld.long 0x70 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x70 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x70 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x70 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x70 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x70 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x70 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x70 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x70 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x70 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x74 "PCR29,Pin Control Register 29"
|
|
eventfld.long 0x74 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x74 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x74 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x74 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x74 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x74 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x74 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x74 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x74 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x74 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x78 "PCR30,Pin Control Register 30"
|
|
eventfld.long 0x78 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x78 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x78 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x78 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x78 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x78 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x78 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x78 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x78 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x78 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x7C "PCR31,Pin Control Register 31"
|
|
eventfld.long 0x7C 24. "ISF,Interrupt Status Flag" "0: Configured interrupt is not detected.,1: Configured interrupt is detected. If the pin is.."
|
|
hexmask.long.byte 0x7C 16.--19. 1. "IRQC,Interrupt Configuration"
|
|
newline
|
|
bitfld.long 0x7C 15. "LK,Lock Register" "0: Pin Control Register is not locked.,1: Pin Control Register is locked and cannot be.."
|
|
bitfld.long 0x7C 8.--10. "MUX,Pin Mux Control" "0: Pin disabled (Alternative 0) (analog).,1: Alternative 1 (GPIO).,2: Alternative 2 (chip-specific).,3: Alternative 3 (chip-specific).,4: Alternative 4 (chip-specific).,5: Alternative 5 (chip-specific).,6: Alternative 6 (chip-specific).,7: Alternative 7 (chip-specific)."
|
|
newline
|
|
bitfld.long 0x7C 6. "DSE,Drive Strength Enable" "0: Low drive strength is configured on the..,1: High drive strength is configured on the.."
|
|
bitfld.long 0x7C 5. "ODE,Open Drain Enable" "0: Open drain output is disabled on the..,1: Open drain output is enabled on the.."
|
|
newline
|
|
bitfld.long 0x7C 4. "PFE,Passive Filter Enable" "0: Passive input filter is disabled on the..,1: Passive input filter is enabled on the.."
|
|
bitfld.long 0x7C 2. "SRE,Slew Rate Enable" "0: Fast slew rate is configured on the..,1: Slow slew rate is configured on the.."
|
|
newline
|
|
bitfld.long 0x7C 1. "PE,Pull Enable" "0: Internal pull resistor is not enabled on the..,1: Internal pull resistor is enabled on the.."
|
|
bitfld.long 0x7C 0. "PS,Pull Select" "0: Internal pulldown resistor is enabled on the..,1: Internal pullup resistor is enabled on the.."
|
|
line.long 0x80 "GPCLR,Global Pin Control Low Register"
|
|
hexmask.long.word 0x80 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x80 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x84 "GPCHR,Global Pin Control High Register"
|
|
hexmask.long.word 0x84 16.--31. 1. "GPWE,Global Pin Write Enable"
|
|
hexmask.long.word 0x84 0.--15. 1. "GPWD,Global Pin Write Data"
|
|
line.long 0x88 "GICLR,Global Interrupt Control Low Register"
|
|
hexmask.long.word 0x88 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x88 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
line.long 0x8C "GICHR,Global Interrupt Control High Register"
|
|
hexmask.long.word 0x8C 16.--31. 1. "GIWD,Global Interrupt Write Data"
|
|
hexmask.long.word 0x8C 0.--15. 1. "GIWE,Global Interrupt Write Enable"
|
|
group.long 0xA0++0x3
|
|
line.long 0x0 "ISFR,Interrupt Status Flag Register"
|
|
hexmask.long 0x0 0.--31. 1. "ISF,Interrupt Status Flag"
|
|
group.long 0xC0++0xB
|
|
line.long 0x0 "DFER,Digital Filter Enable Register"
|
|
hexmask.long 0x0 0.--31. 1. "DFE,Digital Filter Enable"
|
|
line.long 0x4 "DFCR,Digital Filter Clock Register"
|
|
bitfld.long 0x4 0. "CS,Clock Source" "0: Digital filters are clocked by the bus clock.,1: Digital filters are clocked by the PMC 1kHz LPO.."
|
|
line.long 0x8 "DFWR,Digital Filter Width Register"
|
|
hexmask.long.byte 0x8 0.--4. 1. "FILT,Filter Length"
|
|
tree.end
|
|
tree.end
|
|
tree "RCM (Reset Control Module)"
|
|
base ad:0x4007F000
|
|
rgroup.long 0x0++0xB
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
bitfld.long 0x4 16. "ECORE1,Existence of SRS[CORE1] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 15. "ETAMPER,Existence of SRS[TAMPER] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 13. "ESACKERR,Existence of SRS[SACKERR] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 11. "EMDM_AP,Existence of SRS[MDM_AP] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 10. "ESW,Existence of SRS[SW] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 9. "ELOCKUP,Existence of SRS[LOCKUP] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 8. "EJTAG,Existence of SRS[JTAG] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 7. "EPOR,Existence of SRS[POR] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 6. "EPIN,Existence of SRS[PIN] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 5. "EWDOG,Existence of SRS[WDOG] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 3. "ELOL,Existence of SRS[LOL] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 2. "ELOC,Existence of SRS[LOC] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 1. "ELVD,Existence of SRS[LVD] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 0. "EWAKEUP,Existence of SRS[WAKEUP] status indication feature" "0: The feature is not available.,1: The feature is available."
|
|
line.long 0x8 "SRS,System Reset Status Register"
|
|
bitfld.long 0x8 13. "SACKERR,Stop Acknowledge Error" "0: Reset not caused by peripheral failure to..,1: Reset caused by peripheral failure to.."
|
|
bitfld.long 0x8 11. "MDM_AP,MDM-AP System Reset Request" "0: Reset was not caused by host debugger system..,1: Reset was caused by host debugger system setting.."
|
|
newline
|
|
bitfld.long 0x8 10. "SW,Software" "0: Reset not caused by software setting of..,1: Reset caused by software setting of SYSRESETREQ.."
|
|
bitfld.long 0x8 9. "LOCKUP,Core Lockup" "0: Reset not caused by core LOCKUP event,1: Reset caused by core LOCKUP event"
|
|
newline
|
|
bitfld.long 0x8 8. "JTAG,JTAG generated reset" "0: Reset not caused by JTAG,1: Reset caused by JTAG"
|
|
bitfld.long 0x8 7. "POR,Power-On Reset" "0: Reset not caused by POR,1: Reset caused by POR"
|
|
newline
|
|
bitfld.long 0x8 6. "PIN,External Reset Pin" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin"
|
|
bitfld.long 0x8 5. "WDOG,Watchdog" "0: Reset not caused by watchdog timeout,1: Reset caused by watchdog timeout"
|
|
newline
|
|
bitfld.long 0x8 3. "LOL,Loss-of-Lock Reset" "0: Reset not caused by a loss of lock in the PLL/FLL,1: Reset caused by a loss of lock in the PLL/FLL"
|
|
bitfld.long 0x8 2. "LOC,Loss-of-Clock Reset" "0: Reset not caused by a loss of external clock.,1: Reset caused by a loss of external clock."
|
|
newline
|
|
bitfld.long 0x8 1. "LVD,Low-Voltage Detect Reset or High-Voltage Detect Reset" "0: Reset not caused by LVD trip HVD trip or POR,1: Reset caused by LVD trip HVD trip or POR"
|
|
group.long 0xC++0x3
|
|
line.long 0x0 "RPC,Reset Pin Control register"
|
|
hexmask.long.byte 0x0 8.--12. 1. "RSTFLTSEL,Reset Pin Filter Bus Clock Select"
|
|
bitfld.long 0x0 2. "RSTFLTSS,Reset Pin Filter Select in Stop Mode" "0: All filtering disabled,1: LPO clock filter enabled"
|
|
newline
|
|
bitfld.long 0x0 0.--1. "RSTFLTSRW,Reset Pin Filter Select in Run and Wait Modes" "0: All filtering disabled,1: Bus clock filter enabled for normal operation,2: LPO clock filter enabled for normal operation,?"
|
|
group.long 0x18++0x7
|
|
line.long 0x0 "SSRS,Sticky System Reset Status Register"
|
|
eventfld.long 0x0 13. "SSACKERR,Sticky Stop Acknowledge Error" "0: Reset not caused by peripheral failure to..,1: Reset caused by peripheral failure to.."
|
|
eventfld.long 0x0 11. "SMDM_AP,Sticky MDM-AP System Reset Request" "0: Reset was not caused by host debugger system..,1: Reset was caused by host debugger system setting.."
|
|
newline
|
|
eventfld.long 0x0 10. "SSW,Sticky Software" "0: Reset not caused by software setting of..,1: Reset caused by software setting of SYSRESETREQ.."
|
|
eventfld.long 0x0 9. "SLOCKUP,Sticky Core Lockup" "0: Reset not caused by core LOCKUP event,1: Reset caused by core LOCKUP event"
|
|
newline
|
|
eventfld.long 0x0 8. "SJTAG,Sticky JTAG generated reset" "0: Reset not caused by JTAG,1: Reset caused by JTAG"
|
|
eventfld.long 0x0 7. "SPOR,Sticky Power-On Reset" "0: Reset not caused by POR,1: Reset caused by POR"
|
|
newline
|
|
eventfld.long 0x0 6. "SPIN,Sticky External Reset Pin" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin"
|
|
eventfld.long 0x0 5. "SWDOG,Sticky Watchdog" "0: Reset not caused by watchdog timeout,1: Reset caused by watchdog timeout"
|
|
newline
|
|
eventfld.long 0x0 3. "SLOL,Sticky Loss-of-Lock Reset" "0: Reset not caused by a loss of lock in the PLL/FLL,1: Reset caused by a loss of lock in the PLL/FLL"
|
|
eventfld.long 0x0 2. "SLOC,Sticky Loss-of-Clock Reset" "0: Reset not caused by a loss of external clock.,1: Reset caused by a loss of external clock."
|
|
newline
|
|
eventfld.long 0x0 1. "SLVD,Sticky Low-Voltage Detect Reset" "0: Reset not caused by LVD trip or POR,1: Reset caused by LVD trip or POR"
|
|
line.long 0x4 "SRIE,System Reset Interrupt Enable Register"
|
|
bitfld.long 0x4 13. "SACKERR,Stop Acknowledge Error Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
bitfld.long 0x4 11. "MDM_AP,MDM-AP System Reset Request" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 10. "SW,Software Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
bitfld.long 0x4 9. "LOCKUP,Core Lockup Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 8. "JTAG,JTAG generated reset" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
bitfld.long 0x4 7. "GIE,Global Interrupt Enable" "0: All interrupt sources disabled.,1: All interrupt sources enabled. Note that the.."
|
|
newline
|
|
bitfld.long 0x4 6. "PIN,External Reset Pin Interrupt" "0: Reset not caused by external reset pin,1: Reset caused by external reset pin"
|
|
bitfld.long 0x4 5. "WDOG,Watchdog Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 3. "LOL,Loss-of-Lock Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
bitfld.long 0x4 2. "LOC,Loss-of-Clock Interrupt" "0: Interrupt disabled.,1: Interrupt enabled."
|
|
newline
|
|
bitfld.long 0x4 0.--1. "DELAY,Reset Delay Time" "0: 10 LPO cycles,1: 34 LPO cycles,2: 130 LPO cycles,3: 514 LPO cycles"
|
|
tree.end
|
|
tree "RTC (Real Time Clock)"
|
|
base ad:0x4003D000
|
|
group.long 0x0++0x1F
|
|
line.long 0x0 "TSR,RTC Time Seconds Register"
|
|
hexmask.long 0x0 0.--31. 1. "TSR,Time Seconds Register"
|
|
line.long 0x4 "TPR,RTC Time Prescaler Register"
|
|
hexmask.long.word 0x4 0.--15. 1. "TPR,Time Prescaler Register"
|
|
line.long 0x8 "TAR,RTC Time Alarm Register"
|
|
hexmask.long 0x8 0.--31. 1. "TAR,Time Alarm Register"
|
|
line.long 0xC "TCR,RTC Time Compensation Register"
|
|
hexmask.long.byte 0xC 24.--31. 1. "CIC,Compensation Interval Counter"
|
|
hexmask.long.byte 0xC 16.--23. 1. "TCV,Time Compensation Value"
|
|
newline
|
|
hexmask.long.byte 0xC 8.--15. 1. "CIR,Compensation Interval Register"
|
|
hexmask.long.byte 0xC 0.--7. 1. "TCR,Time Compensation Register"
|
|
line.long 0x10 "CR,RTC Control Register"
|
|
bitfld.long 0x10 24. "CPE,Clock Pin Enable" "0: The RTC_CLKOUT function is disabled.,1: Enable RTC_CLKOUT function."
|
|
bitfld.long 0x10 9. "CLKO,Clock Output" "0: The 32 kHz clock is output to other peripherals.,1: The 32 kHz clock is not output to other.."
|
|
newline
|
|
bitfld.long 0x10 7. "LPOS,LPO Select" "0: RTC prescaler increments using 32.768 kHz clock.,1: RTC prescaler increments using 1 kHz LPO bits.."
|
|
bitfld.long 0x10 5. "CPS,Clock Pin Select" "0: The prescaler output clock (as configured by..,1: The RTC 32.768 kHz clock is output on RTC_CLKOUT.."
|
|
newline
|
|
bitfld.long 0x10 3. "UM,Update Mode" "0: Registers cannot be written when locked.,1: Registers can be written when locked under.."
|
|
bitfld.long 0x10 2. "SUP,Supervisor Access" "0: Non-supervisor mode write accesses are not..,1: Non-supervisor mode write accesses are supported."
|
|
newline
|
|
bitfld.long 0x10 0. "SWR,Software Reset" "0: No effect.,1: Resets all RTC registers except for the SWR bit.."
|
|
line.long 0x14 "SR,RTC Status Register"
|
|
bitfld.long 0x14 4. "TCE,Time Counter Enable" "0: Time counter is disabled.,1: Time counter is enabled."
|
|
rbitfld.long 0x14 2. "TAF,Time Alarm Flag" "0: Time alarm has not occurred.,1: Time alarm has occurred."
|
|
newline
|
|
rbitfld.long 0x14 1. "TOF,Time Overflow Flag" "0: Time overflow has not occurred.,1: Time overflow has occurred and time counter is.."
|
|
rbitfld.long 0x14 0. "TIF,Time Invalid Flag" "0: Time is valid.,1: Time is invalid and time counter is read as zero."
|
|
line.long 0x18 "LR,RTC Lock Register"
|
|
bitfld.long 0x18 6. "LRL,Lock Register Lock" "0: Lock Register is locked and writes are ignored.,1: Lock Register is not locked and writes complete.."
|
|
bitfld.long 0x18 5. "SRL,Status Register Lock" "0: Status Register is locked and writes are ignored.,1: Status Register is not locked and writes.."
|
|
newline
|
|
bitfld.long 0x18 4. "CRL,Control Register Lock" "0: Control Register is locked and writes are ignored.,1: Control Register is not locked and writes.."
|
|
bitfld.long 0x18 3. "TCL,Time Compensation Lock" "0: Time Compensation Register is locked and writes..,1: Time Compensation Register is not locked and.."
|
|
line.long 0x1C "IER,RTC Interrupt Enable Register"
|
|
bitfld.long 0x1C 16.--18. "TSIC,Timer Seconds Interrupt Configuration" "0: 1 Hz.,1: 2 Hz.,2: 4 Hz.,3: 8 Hz.,4: 16 Hz.,5: 32 Hz.,6: 64 Hz.,7: 128 Hz."
|
|
bitfld.long 0x1C 4. "TSIE,Time Seconds Interrupt Enable" "0: Seconds interrupt is disabled.,1: Seconds interrupt is enabled."
|
|
newline
|
|
bitfld.long 0x1C 2. "TAIE,Time Alarm Interrupt Enable" "0: Time alarm flag does not generate an interrupt.,1: Time alarm flag does generate an interrupt."
|
|
bitfld.long 0x1C 1. "TOIE,Time Overflow Interrupt Enable" "0: Time overflow flag does not generate an interrupt.,1: Time overflow flag does generate an interrupt."
|
|
newline
|
|
bitfld.long 0x1C 0. "TIIE,Time Invalid Interrupt Enable" "0: Time invalid flag does not generate an interrupt.,1: Time invalid flag does generate an interrupt."
|
|
tree.end
|
|
tree "SCG (System Clock Generator)"
|
|
base ad:0x40064000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,Version ID Register"
|
|
hexmask.long 0x0 0.--31. 1. "VERSION,SCG Version Number"
|
|
line.long 0x4 "PARAM,Parameter Register"
|
|
hexmask.long.byte 0x4 27.--31. 1. "DIVPRES,Divider Present"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CLKPRES,Clock Present"
|
|
rgroup.long 0x10++0x3
|
|
line.long 0x0 "CSR,Clock Status Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio"
|
|
group.long 0x14++0x7
|
|
line.long 0x0 "RCCR,Run Clock Control Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SCS,System Clock Source"
|
|
hexmask.long.byte 0x0 16.--19. 1. "DIVCORE,Core Clock Divide Ratio"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio"
|
|
hexmask.long.byte 0x0 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio"
|
|
line.long 0x4 "VCCR,VLPR Clock Control Register"
|
|
hexmask.long.byte 0x4 24.--27. 1. "SCS,System Clock Source"
|
|
hexmask.long.byte 0x4 16.--19. 1. "DIVCORE,Core Clock Divide Ratio"
|
|
newline
|
|
hexmask.long.byte 0x4 4.--7. 1. "DIVBUS,Bus Clock Divide Ratio"
|
|
hexmask.long.byte 0x4 0.--3. 1. "DIVSLOW,Slow Clock Divide Ratio"
|
|
group.long 0x20++0x3
|
|
line.long 0x0 "CLKOUTCNFG,SCG CLKOUT Configuration Register"
|
|
hexmask.long.byte 0x0 24.--27. 1. "CLKOUTSEL,SCG Clkout Select"
|
|
group.long 0x100++0xB
|
|
line.long 0x0 "SOSCCSR,System OSC Control Status Register"
|
|
eventfld.long 0x0 26. "SOSCERR,System OSC Clock Error" "0: System OSC Clock Monitor is disabled or has not..,1: System OSC Clock Monitor is enabled and detected.."
|
|
rbitfld.long 0x0 25. "SOSCSEL,System OSC Selected" "0: System OSC is not the system clock source,1: System OSC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x0 24. "SOSCVLD,System OSC Valid" "0: System OSC is not enabled or clock is not valid,1: System OSC is enabled and output clock is valid"
|
|
bitfld.long 0x0 23. "LK,Lock Register" "0: This Control Status Register can be written.,1: This Control Status Register cannot be written."
|
|
newline
|
|
bitfld.long 0x0 17. "SOSCCMRE,System OSC Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected"
|
|
bitfld.long 0x0 16. "SOSCCM,System OSC Clock Monitor" "0: System OSC Clock Monitor is disabled,1: System OSC Clock Monitor is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "SOSCEN,System OSC Enable" "0: System OSC is disabled,1: System OSC is enabled"
|
|
line.long 0x4 "SOSCDIV,System OSC Divide Register"
|
|
bitfld.long 0x4 8.--10. "SOSCDIV2,System OSC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x4 0.--2. "SOSCDIV1,System OSC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
line.long 0x8 "SOSCCFG,System Oscillator Configuration Register"
|
|
bitfld.long 0x8 4.--5. "RANGE,System OSC Range Select" "?,1: Low frequency range selected for the crystal..,2: Medium frequency range selected for the crystal..,3: High frequency range selected for the crystal.."
|
|
bitfld.long 0x8 3. "HGO,High Gain Oscillator Select" "0: Configure crystal oscillator for low-gain..,1: Configure crystal oscillator for high-gain.."
|
|
newline
|
|
bitfld.long 0x8 2. "EREFS,External Reference Select" "0: External reference clock selected,1: Internal crystal oscillator of OSC selected"
|
|
group.long 0x200++0xB
|
|
line.long 0x0 "SIRCCSR,Slow IRC Control Status Register"
|
|
rbitfld.long 0x0 25. "SIRCSEL,Slow IRC Selected" "0: Slow IRC is not the system clock source,1: Slow IRC is the system clock source"
|
|
rbitfld.long 0x0 24. "SIRCVLD,Slow IRC Valid" "0: Slow IRC is not enabled or clock is not valid,1: Slow IRC is enabled and output clock is valid"
|
|
newline
|
|
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written."
|
|
bitfld.long 0x0 2. "SIRCLPEN,Slow IRC Low Power Enable" "0: Slow IRC is disabled in VLP modes,1: Slow IRC is enabled in VLP modes"
|
|
newline
|
|
bitfld.long 0x0 1. "SIRCSTEN,Slow IRC Stop Enable" "0: Slow IRC is disabled in supported Stop modes,1: Slow IRC is enabled in supported Stop modes"
|
|
bitfld.long 0x0 0. "SIRCEN,Slow IRC Enable" "0: Slow IRC is disabled,1: Slow IRC is enabled"
|
|
line.long 0x4 "SIRCDIV,Slow IRC Divide Register"
|
|
bitfld.long 0x4 8.--10. "SIRCDIV2,Slow IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x4 0.--2. "SIRCDIV1,Slow IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
line.long 0x8 "SIRCCFG,Slow IRC Configuration Register"
|
|
bitfld.long 0x8 0. "RANGE,Frequency Range" "0: Slow IRC low range clock (2 MHz),1: Slow IRC high range clock (8 MHz)"
|
|
group.long 0x300++0xB
|
|
line.long 0x0 "FIRCCSR,Fast IRC Control Status Register"
|
|
eventfld.long 0x0 26. "FIRCERR,Fast IRC Clock Error" "0: Error not detected with the Fast IRC trimming.,1: Error detected with the Fast IRC trimming."
|
|
rbitfld.long 0x0 25. "FIRCSEL,Fast IRC Selected status" "0: Fast IRC is not the system clock source,1: Fast IRC is the system clock source"
|
|
newline
|
|
rbitfld.long 0x0 24. "FIRCVLD,Fast IRC Valid status" "0: Fast IRC is not enabled or clock is not valid.,1: Fast IRC is enabled and output clock is valid."
|
|
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written."
|
|
newline
|
|
bitfld.long 0x0 3. "FIRCREGOFF,Fast IRC Regulator Enable" "0: Fast IRC Regulator is enabled.,1: Fast IRC Regulator is disabled."
|
|
bitfld.long 0x0 0. "FIRCEN,Fast IRC Enable" "0: Fast IRC is disabled,1: Fast IRC is enabled"
|
|
line.long 0x4 "FIRCDIV,Fast IRC Divide Register"
|
|
bitfld.long 0x4 8.--10. "FIRCDIV2,Fast IRC Clock Divide 2" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x4 0.--2. "FIRCDIV1,Fast IRC Clock Divide 1" "0: Output disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
line.long 0x8 "FIRCCFG,Fast IRC Configuration Register"
|
|
bitfld.long 0x8 0.--1. "RANGE,Frequency Range" "0: Fast IRC is trimmed to 48 MHz,?,?,?"
|
|
group.long 0x600++0xB
|
|
line.long 0x0 "SPLLCSR,System PLL Control Status Register"
|
|
eventfld.long 0x0 26. "SPLLERR,System PLL Clock Error" "0: System PLL Clock Monitor is disabled or has not..,1: System PLL Clock Monitor is enabled and detected.."
|
|
rbitfld.long 0x0 25. "SPLLSEL,System PLL Selected" "0: System PLL is not the system clock source,1: System PLL is the system clock source"
|
|
newline
|
|
rbitfld.long 0x0 24. "SPLLVLD,System PLL Valid" "0: System PLL is not enabled or clock is not valid,1: System PLL is enabled and output clock is valid"
|
|
bitfld.long 0x0 23. "LK,Lock Register" "0: Control Status Register can be written.,1: Control Status Register cannot be written."
|
|
newline
|
|
bitfld.long 0x0 17. "SPLLCMRE,System PLL Clock Monitor Reset Enable" "0: Clock Monitor generates interrupt when error..,1: Clock Monitor generates reset when error detected"
|
|
bitfld.long 0x0 16. "SPLLCM,System PLL Clock Monitor" "0: System PLL Clock Monitor is disabled,1: System PLL Clock Monitor is enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "SPLLEN,System PLL Enable" "0: System PLL is disabled,1: System PLL is enabled"
|
|
line.long 0x4 "SPLLDIV,System PLL Divide Register"
|
|
bitfld.long 0x4 8.--10. "SPLLDIV2,System PLL Clock Divide 2" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
bitfld.long 0x4 0.--2. "SPLLDIV1,System PLL Clock Divide 1" "0: Clock disabled,1: Divide by 1,2: Divide by 2,3: Divide by 4,4: Divide by 8,5: Divide by 16,6: Divide by 32,7: Divide by 64"
|
|
line.long 0x8 "SPLLCFG,System PLL Configuration Register"
|
|
hexmask.long.byte 0x8 16.--20. 1. "MULT,System PLL Multiplier"
|
|
bitfld.long 0x8 8.--10. "PREDIV,PLL Reference Clock Divider" "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x8 0. "SOURCE,Clock Source" "0: System OSC (SOSC),1: Fast IRC (FIRC)"
|
|
tree.end
|
|
tree "SIM (System Integration Module)"
|
|
base ad:0x40048000
|
|
group.long 0x4++0x3
|
|
line.long 0x0 "CHIPCTL,Chip Control register"
|
|
bitfld.long 0x0 23. "PDB_BB_SEL_2,PDB back-to-back select 2" "0,1"
|
|
bitfld.long 0x0 22. "PDB_BB_SEL_1,PDB back-to-back select 1" "0,1"
|
|
newline
|
|
bitfld.long 0x0 21. "SRAML_RETEN,SRAML_RETEN" "0: SRAML contents are retained across resets,1: No SRAML retention"
|
|
bitfld.long 0x0 20. "SRAMU_RETEN,SRAMU_RETEN" "0: SRAMU contents are retained across resets,1: No SRAMU retention"
|
|
newline
|
|
bitfld.long 0x0 19. "ADC_SUPPLYEN,ADC_SUPPLYEN" "0: Disable internal supply monitoring,1: Enable internal supply monitoring"
|
|
bitfld.long 0x0 16.--18. "ADC_SUPPLY,ADC_SUPPLY" "0: Input VDD supply (VDD),1: Input analog supply (VDDA),2: ADC Reference Supply (VREFH),3: 3.3 V Oscillator Regulator Output (VDD_3V),4: 3.3 V flash regulator output (VDD_flash_3V),5: 1.2 V core regulator output (VDD_LV),?,?"
|
|
newline
|
|
bitfld.long 0x0 13. "PDB_BB_SEL,PDB back-to-back select" "0: PDB0 channel 0 back-to-back operation with ADC0..,1: Channel 0 of PDB0 and PDB1 back-to-back.."
|
|
bitfld.long 0x0 12. "TRACECLK_SEL,Debug trace clock select" "0: Core clock,?"
|
|
newline
|
|
bitfld.long 0x0 11. "CLKOUTEN,CLKOUT enable" "0: Clockout disable,1: Clockout enable"
|
|
bitfld.long 0x0 8.--10. "CLKOUTDIV,CLKOUT Divide Ratio" "0: Divide by 1,1: Divide by 2,2: Divide by 3,3: Divide by 4,4: Divide by 5,5: Divide by 6,6: Divide by 7,7: Divide by 8"
|
|
newline
|
|
hexmask.long.byte 0x0 4.--7. 1. "CLKOUTSEL,CLKOUT Select"
|
|
hexmask.long.byte 0x0 0.--3. 1. "ADC_INTERLEAVE_EN,ADC interleave channel enable"
|
|
group.long 0xC++0x7
|
|
line.long 0x0 "FTMOPT0,FTM Option Register 0"
|
|
bitfld.long 0x0 30.--31. "FTM3CLKSEL,FTM3 External Clock Pin Select" "0: FTM3 external clock driven by TCLK0 pin.,1: FTM3 external clock driven by TCLK1 pin.,2: FTM3 external clock driven by TCLK2 pin.,3: No clock input"
|
|
bitfld.long 0x0 28.--29. "FTM2CLKSEL,FTM2 External Clock Pin Select" "0: FTM2 external clock driven by TCLK0 pin.,1: FTM2 external clock driven by TCLK1 pin.,2: FTM2 external clock driven by TCLK2 pin.,3: No clock input"
|
|
newline
|
|
bitfld.long 0x0 26.--27. "FTM1CLKSEL,FTM1 External Clock Pin Select" "0: FTM1 external clock driven by TCLK0 pin.,1: FTM1 external clock driven by TCLK1 pin.,2: FTM1 external clock driven by TCLK2 pin.,3: No clock input"
|
|
bitfld.long 0x0 24.--25. "FTM0CLKSEL,FTM0 External Clock Pin Select" "0: FTM0 external clock driven by TCLK0 pin.,1: FTM0 external clock driven by TCLK1 pin.,2: FTM0 external clock driven by TCLK2 pin.,3: No clock input"
|
|
newline
|
|
bitfld.long 0x0 12.--14. "FTM3FLTxSEL,FTM3 Fault X Select" "?,1: TRGMUX_FTM3 out,?,?,?,?,?,?"
|
|
bitfld.long 0x0 8.--10. "FTM2FLTxSEL,FTM2 Fault X Select" "?,1: TRGMUX_FTM2 out,?,?,?,?,?,?"
|
|
newline
|
|
bitfld.long 0x0 4.--6. "FTM1FLTxSEL,FTM1 Fault X Select" "?,1: TRGMUX_FTM1 out,?,?,?,?,?,?"
|
|
bitfld.long 0x0 0.--2. "FTM0FLTxSEL,FTM0 Fault X Select" "?,1: TRGMUX_FTM0 out,?,?,?,?,?,?"
|
|
line.long 0x4 "LPOCLKS,LPO Clock Select Register"
|
|
bitfld.long 0x4 4.--5. "RTCCLKSEL,32 kHz clock source select" "0: SOSCDIV1_CLK,1: LPO32K_CLK,2: 32 kHz RTC_CLKIN clock,3: FIRCDIV1_CLK"
|
|
bitfld.long 0x4 2.--3. "LPOCLKSEL,LPO clock source select" "0: LPO128K_CLK,1: No clock,2: LPO32K_CLK which is derived from the LPO128K_CLK,3: LPO1K_CLK which is derived from the LPO128K_CLK"
|
|
newline
|
|
bitfld.long 0x4 1. "LPO32KCLKEN,LPO32K_CLK enable" "0: Disable LPO32K_CLK output,1: Enable LPO32K_CLK output"
|
|
bitfld.long 0x4 0. "LPO1KCLKEN,LPO1K_CLK enable" "0: Disable LPO1K_CLK output,1: Enable LPO1K_CLK output"
|
|
group.long 0x18++0xB
|
|
line.long 0x0 "ADCOPT,ADC Options Register"
|
|
bitfld.long 0x0 12.--13. "ADC1PRETRGSEL,ADC1 pretrigger source select" "0: PDB pretrigger (default),1: TRGMUX pretrigger,2: Software pretrigger,?"
|
|
bitfld.long 0x0 9.--11. "ADC1SWPRETRG,ADC1 software pretrigger sources" "0: Software pretrigger disabled,?,?,?,4: Software pretrigger 0,5: Software pretrigger 1,6: Software pretrigger 2,7: Software pretrigger 3"
|
|
newline
|
|
bitfld.long 0x0 8. "ADC1TRGSEL,ADC1 trigger source select" "0: PDB output,1: TRGMUX output"
|
|
bitfld.long 0x0 4.--5. "ADC0PRETRGSEL,ADC0 pretrigger source select" "0: PDB pretrigger (default),1: TRGMUX pretrigger,2: Software pretrigger,?"
|
|
newline
|
|
bitfld.long 0x0 1.--3. "ADC0SWPRETRG,ADC0 software pretrigger sources" "0: Software pretrigger disabled,?,?,?,4: Software pretrigger 0,5: Software pretrigger 1,6: Software pretrigger 2,7: Software pretrigger 3"
|
|
bitfld.long 0x0 0. "ADC0TRGSEL,ADC0 trigger source select" "0: PDB output,1: TRGMUX output"
|
|
line.long 0x4 "FTMOPT1,FTM Option Register 1"
|
|
hexmask.long.byte 0x4 24.--31. 1. "FTM3_OUTSEL,FTM3 channel modulation select with FTM2_CH1"
|
|
hexmask.long.byte 0x4 16.--23. 1. "FTM0_OUTSEL,FTM0 channel modulation select with FTM1_CH1"
|
|
newline
|
|
bitfld.long 0x4 15. "FTMGLDOK,FTM global load enable" "0: FTM Global load mechanism disabled.,1: FTM Global load mechanism enabled"
|
|
bitfld.long 0x4 8. "FTM2CH1SEL,FTM2 CH1 Select" "0: FTM2_CH1 input,1: exclusive OR of FTM2_CH0 FTM2_CH1 and FTM1_CH1"
|
|
newline
|
|
bitfld.long 0x4 6.--7. "FTM2CH0SEL,FTM2 CH0 Select" "0: FTM2_CH0 input,1: CMP0 output,?,?"
|
|
bitfld.long 0x4 4.--5. "FTM1CH0SEL,FTM1 CH0 Select" "0: FTM1_CH0 input,1: CMP0 output,?,?"
|
|
newline
|
|
bitfld.long 0x4 3. "FTM3SYNCBIT,FTM3 Sync Bit" "0,1"
|
|
bitfld.long 0x4 2. "FTM2SYNCBIT,FTM2 Sync Bit" "0,1"
|
|
newline
|
|
bitfld.long 0x4 1. "FTM1SYNCBIT,FTM1 Sync Bit" "0,1"
|
|
bitfld.long 0x4 0. "FTM0SYNCBIT,FTM0 Sync Bit" "0,1"
|
|
line.long 0x8 "MISCTRL0,Miscellaneous control register 0"
|
|
bitfld.long 0x8 19. "FTM3_OBE_CTRL,FTM3 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.."
|
|
bitfld.long 0x8 18. "FTM2_OBE_CTRL,FTM2 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.."
|
|
newline
|
|
bitfld.long 0x8 17. "FTM1_OBE_CTRL,FTM1 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.."
|
|
bitfld.long 0x8 16. "FTM0_OBE_CTRL,FTM0 OBE CTRL bit" "0: The FTM channel output is put to safe state when..,1: The FTM channel output state is retained when.."
|
|
newline
|
|
eventfld.long 0x8 12. "ECC_MGRAM_STAT,ECC double-bit fault detected during MGATE access to Flash firmware or MGRAM" "0,1"
|
|
eventfld.long 0x8 11. "ECC_EEERAM_STAT,ECC double-bit fault detected during MGATE access to FlexRAM or PRAM" "0,1"
|
|
newline
|
|
eventfld.long 0x8 10. "STOP2_MONITOR,STOP2 monitor bit" "0: System clock enabled or STOP2 entry aborted,1: STOP2 entry successful"
|
|
eventfld.long 0x8 9. "STOP1_MONITOR,STOP1 monitor bit" "0: Bus clock enabled or STOP1 entry aborted,1: STOP1 entry successful"
|
|
rgroup.long 0x24++0x3
|
|
line.long 0x0 "SDID,System Device Identification Register"
|
|
hexmask.long.byte 0x0 28.--31. 1. "GENERATION,S32M24x product series generation"
|
|
hexmask.long.byte 0x0 24.--27. 1. "SUBSERIES,Subseries"
|
|
newline
|
|
hexmask.long.byte 0x0 20.--23. 1. "DERIVATE,Derivate"
|
|
hexmask.long.byte 0x0 16.--19. 1. "RAMSIZE,RAM size"
|
|
newline
|
|
hexmask.long.byte 0x0 12.--15. 1. "REVID,Device revision number"
|
|
hexmask.long.byte 0x0 8.--11. 1. "PACKAGE,Package"
|
|
newline
|
|
hexmask.long.byte 0x0 0.--7. 1. "FEATURES,Features"
|
|
group.long 0x40++0x3
|
|
line.long 0x0 "PLATCGC,Platform Clock Gating Control Register"
|
|
bitfld.long 0x0 4. "CGCEIM,EIM Clock Gating Control" "0: Clock disabled,1: Clock enabled"
|
|
bitfld.long 0x0 3. "CGCERM,ERM Clock Gating Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
bitfld.long 0x0 2. "CGCDMA,DMA Clock Gating Control" "0: Clock disabled,1: Clock enabled"
|
|
bitfld.long 0x0 1. "CGCMPU,MPU Clock Gating Control" "0: Clock disabled,1: Clock enabled"
|
|
newline
|
|
bitfld.long 0x0 0. "CGCMSCM,MSCM Clock Gating Control" "0: Clock disabled,1: Clock enabled"
|
|
rgroup.long 0x4C++0x3
|
|
line.long 0x0 "FCFG1,Flash Configuration Register 1"
|
|
hexmask.long.byte 0x0 16.--19. 1. "EEERAMSIZE,EEE SRAM SIZE"
|
|
hexmask.long.byte 0x0 12.--15. 1. "DEPART,FlexNVM partition"
|
|
rgroup.long 0x54++0xF
|
|
line.long 0x0 "UIDH,Unique Identification Register High"
|
|
hexmask.long 0x0 0.--31. 1. "UID127_96,Unique Identification"
|
|
line.long 0x4 "UIDMH,Unique Identification Register Mid-High"
|
|
hexmask.long 0x4 0.--31. 1. "UID95_64,Unique Identification"
|
|
line.long 0x8 "UIDML,Unique Identification Register Mid Low"
|
|
hexmask.long 0x8 0.--31. 1. "UID63_32,Unique Identification"
|
|
line.long 0xC "UIDL,Unique Identification Register Low"
|
|
hexmask.long 0xC 0.--31. 1. "UID31_0,Unique Identification"
|
|
group.long 0x68++0x7
|
|
line.long 0x0 "CLKDIV4,System Clock Divider Register 4"
|
|
bitfld.long 0x0 28. "TRACEDIVEN,Debug Trace Divider control" "0: Debug trace divider disabled,1: Debug trace divider enabled"
|
|
bitfld.long 0x0 1.--3. "TRACEDIV,Trace Clock Divider value To configure TRACEDIV you must first disable TRACEDIVEN then enable it after setting TRACEDIV." "0,1,2,3,4,5,6,7"
|
|
newline
|
|
bitfld.long 0x0 0. "TRACEFRAC,Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC you must first clear TRACEDIVEN to disable the trace clock divide function." "0,1"
|
|
line.long 0x4 "MISCTRL1,Miscellaneous Control register 1"
|
|
bitfld.long 0x4 0. "SW_TRG,Software trigger to TRGMUX. Writing to this bit generates software trigger to peripherals through TRGMUX (Refer to Figure: Trigger interconnectivity)." "0,1"
|
|
tree.end
|
|
tree "SMC (System Mode Controller)"
|
|
base ad:0x4007E000
|
|
rgroup.long 0x0++0x7
|
|
line.long 0x0 "VERID,SMC Version ID Register"
|
|
hexmask.long.byte 0x0 24.--31. 1. "MAJOR,Major Version Number"
|
|
hexmask.long.byte 0x0 16.--23. 1. "MINOR,Minor Version Number"
|
|
newline
|
|
hexmask.long.word 0x0 0.--15. 1. "FEATURE,Feature Specification Number"
|
|
line.long 0x4 "PARAM,SMC Parameter Register"
|
|
bitfld.long 0x4 6. "EVLLS0,Existence of VLLS0 feature" "0: The feature is not available.,1: The feature is available."
|
|
bitfld.long 0x4 5. "ELLS2,Existence of LLS2 feature" "0: The feature is not available.,1: The feature is available."
|
|
newline
|
|
bitfld.long 0x4 3. "ELLS,Existence of LLS feature" "0: The feature is not available.,1: The feature is available."
|
|
group.long 0x8++0xB
|
|
line.long 0x0 "PMPROT,Power Mode Protection register"
|
|
bitfld.long 0x0 5. "AVLP,Allow Very-Low-Power Modes" "0: VLPR and VLPS are not allowed.,1: VLPR and VLPS are allowed."
|
|
line.long 0x4 "PMCTRL,Power Mode Control register"
|
|
bitfld.long 0x4 5.--6. "RUNM,Run Mode Control" "0: Normal Run mode (RUN),?,2: Very-Low-Power Run mode (VLPR),?"
|
|
rbitfld.long 0x4 3. "VLPSA,Very Low Power Stop Aborted" "0: The previous stop mode entry was successful.,1: The previous stop mode entry was aborted."
|
|
newline
|
|
bitfld.long 0x4 0.--2. "STOPM,Stop Mode Control" "0: Normal Stop (STOP),?,2: Very-Low-Power Stop (VLPS),?,?,?,?,?"
|
|
line.long 0x8 "STOPCTRL,Stop Control Register"
|
|
bitfld.long 0x8 6.--7. "STOPO,Stop Option" "?,1: STOP1 - Stop with both system and bus clocks..,2: STOP2 - Stop with system clock disabled and bus..,?"
|
|
rgroup.long 0x14++0x3
|
|
line.long 0x0 "PMSTAT,Power Mode Status register"
|
|
hexmask.long.byte 0x0 0.--7. 1. "PMSTAT,Power Mode Status"
|
|
tree.end
|
|
tree "TRGMUX (Trigger MUX Control)"
|
|
base ad:0x40063000
|
|
group.long 0x0++0x13
|
|
line.long 0x0 "DMAMUX0,TRGMUX DMAMUX0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x4 "EXTOUT0,TRGMUX EXTOUT0 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x8 "EXTOUT1,TRGMUX EXTOUT1 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x8 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x8 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0xC "ADC0,TRGMUX ADC0 Register"
|
|
bitfld.long 0xC 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0xC 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0xC 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0xC 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0xC 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x10 "ADC1,TRGMUX ADC1 Register"
|
|
bitfld.long 0x10 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x10 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x10 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x10 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x10 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x1C++0x3
|
|
line.long 0x0 "CMP0,TRGMUX CMP0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x28++0x17
|
|
line.long 0x0 "FTM0,TRGMUX FTM0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x4 "FTM1,TRGMUX FTM1 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x8 "FTM2,TRGMUX FTM2 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x8 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x8 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0xC "FTM3,TRGMUX FTM3 Register"
|
|
bitfld.long 0xC 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0xC 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0xC 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0xC 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0xC 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x10 "PDB0,TRGMUX PDB0 Register"
|
|
bitfld.long 0x10 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x10 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x14 "PDB1,TRGMUX PDB1 Register"
|
|
bitfld.long 0x14 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x14 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x44++0x13
|
|
line.long 0x0 "FLEXIO,TRGMUX FLEXIO Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x0 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x0 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x4 "LPIT0,TRGMUX LPIT0 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 24.--29. 1. "SEL3,Trigger MUX Input 3 Source Select"
|
|
hexmask.long.byte 0x4 16.--21. 1. "SEL2,Trigger MUX Input 2 Source Select"
|
|
hexmask.long.byte 0x4 8.--13. 1. "SEL1,Trigger MUX Input 1 Source Select"
|
|
hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x8 "LPUART0,TRGMUX LPUART0 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0xC "LPUART1,TRGMUX LPUART1 Register"
|
|
bitfld.long 0xC 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0xC 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x10 "LPI2C0,TRGMUX LPI2C0 Register"
|
|
bitfld.long 0x10 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x10 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
group.long 0x5C++0xB
|
|
line.long 0x0 "LPSPI0,TRGMUX LPSPI0 Register"
|
|
bitfld.long 0x0 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x0 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x4 "LPSPI1,TRGMUX LPSPI1 Register"
|
|
bitfld.long 0x4 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x4 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
line.long 0x8 "LPTMR0,TRGMUX LPTMR0 Register"
|
|
bitfld.long 0x8 31. "LK,TRGMUX register lock." "0: Register can be written.,1: Register cannot be written until the next system.."
|
|
hexmask.long.byte 0x8 0.--5. 1. "SEL0,Trigger MUX Input 0 Source Select"
|
|
tree.end
|
|
tree "WDOG (Watchdog Timer)"
|
|
base ad:0x40052000
|
|
group.long 0x0++0xF
|
|
line.long 0x0 "CS,Watchdog Control and Status Register"
|
|
bitfld.long 0x0 15. "WIN,Watchdog Window" "0: Window mode disabled.,1: Window mode enabled."
|
|
eventfld.long 0x0 14. "FLG,Watchdog Interrupt Flag" "0: No interrupt occurred.,1: An interrupt occurred."
|
|
newline
|
|
bitfld.long 0x0 13. "CMD32EN,Enables or disables WDOG support for 32-bit (otherwise 16-bit or 8-bit) refresh/unlock command write words" "0: Disables support for 32-bit refresh/unlock..,1: Enables support for 32-bit refresh/unlock.."
|
|
bitfld.long 0x0 12. "PRES,Watchdog prescaler" "0: 256 prescaler disabled.,1: 256 prescaler enabled."
|
|
newline
|
|
rbitfld.long 0x0 11. "ULK,Unlock status" "0: WDOG is locked.,1: WDOG is unlocked."
|
|
rbitfld.long 0x0 10. "RCS,Reconfiguration Success" "0: Reconfiguring WDOG.,1: Reconfiguration is successful."
|
|
newline
|
|
bitfld.long 0x0 8.--9. "CLK,Watchdog Clock" "0,1,2,3"
|
|
bitfld.long 0x0 7. "EN,Watchdog Enable" "0: Watchdog disabled.,1: Watchdog enabled."
|
|
newline
|
|
bitfld.long 0x0 6. "INT,Watchdog Interrupt" "0: Watchdog interrupts are disabled. Watchdog..,1: Watchdog interrupts are enabled. Watchdog resets.."
|
|
bitfld.long 0x0 5. "UPDATE,Allow updates" "0: Updates not allowed. After the initial..,1: Updates allowed. Software can modify the.."
|
|
newline
|
|
bitfld.long 0x0 3.--4. "TST,Watchdog Test" "0: Watchdog test mode disabled.,1: Watchdog user mode enabled. (Watchdog test mode..,2: Watchdog test mode enabled only the low byte is..,3: Watchdog test mode enabled only the high byte is.."
|
|
bitfld.long 0x0 2. "DBG,Debug Enable" "0: Watchdog disabled in chip debug mode.,1: Watchdog enabled in chip debug mode."
|
|
newline
|
|
bitfld.long 0x0 1. "WAIT,Wait Enable" "0: Watchdog disabled in chip wait mode.,1: Watchdog enabled in chip wait mode."
|
|
bitfld.long 0x0 0. "STOP,Stop Enable" "0: Watchdog disabled in chip stop mode.,1: Watchdog enabled in chip stop mode."
|
|
line.long 0x4 "CNT,Watchdog Counter Register"
|
|
hexmask.long.byte 0x4 8.--15. 1. "CNTHIGH,High byte of the Watchdog Counter"
|
|
hexmask.long.byte 0x4 0.--7. 1. "CNTLOW,Low byte of the Watchdog Counter"
|
|
line.long 0x8 "TOVAL,Watchdog Timeout Value Register"
|
|
hexmask.long.byte 0x8 8.--15. 1. "TOVALHIGH,High byte of the timeout value"
|
|
hexmask.long.byte 0x8 0.--7. 1. "TOVALLOW,Low byte of the timeout value"
|
|
line.long 0xC "WIN,Watchdog Window Register"
|
|
hexmask.long.byte 0xC 8.--15. 1. "WINHIGH,High byte of Watchdog Window"
|
|
hexmask.long.byte 0xC 0.--7. 1. "WINLOW,Low byte of Watchdog Window"
|
|
tree.end
|
|
AUTOINDENT.OFF
|