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Gen4_R-Car_Trace32/2_Trunk/perrm44l.per
woody d411edd9b4 add Trace32 File
2025-10-14 09:52:32 +09:00

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; --------------------------------------------------------------------------------
; @Title: RM44L On-Chip Peripherals
; @Props: Released
; @Author: NEJ
; @Changelog: 2024-01-23 NEJ
; @Manufacturer: TI - Texas Instruments
; @Doc: Generated (TRACE32, build: 166176.), based on:
; rm44l520_fixed.xml (Ver. 1), rm44l522_fixed.xml (Ver. 1),
; rm44l920_fixed.xml (Ver. 1), rm44l922_fixed.xml (Ver. 1)
; @Core: Cortex-R4F
; @Chip: RM44L520, RM44L920
; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perrm44l.per 17430 2024-02-01 12:25:54Z kwisniewski $
AUTOINDENT.ON CENTER TREE
ENUMDELIMITER ","
base ad:0x0
tree "Core Registers (Cortex-R4F)"
AUTOINDENT.PUSH
AUTOINDENT.OFF
width 0x8
; --------------------------------------------------------------------------------
; Identification registers
; --------------------------------------------------------------------------------
tree "ID Registers"
rgroup c15:0x0--0x0
line.long 0x0 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19. " ARCH , Architecture" "Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,Pre-ARMv7,ARMv7"
textline " "
hexmask.long.word 0x0 4.--15. 0x1 " PART ,Primary Part Number"
bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup c15:0x100--0x100
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 29.--31. " FORMAT ,Format" "Not ARMv7,Not ARMv7,Not ARMv7,Not ARMv7,ARMv7,Not ARMv7,Not ARMv7,Not ARMv7"
bitfld.long 0x0 16.--19. " DMINLINE ,D-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,ASID,Virtual,Physical"
textline " "
bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "1 word,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,512 words,1024 words,2048 words,4096 words,8192 words,16384 words,32768 words"
rgroup c15:0x200--0x200
line.long 0x0 "TCMSR,Tighly-Coupled Memory Status Register"
bitfld.long 0x0 16.--19. " DTCMS ,Data Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. " ITCMS ,Instruction Banks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup c15:0x400--0x400
line.long 0x0 "MPUIR,MPU type register"
hexmask.long.byte 0x00 8.--15. 1. " REGNUM ,Number of regions"
bitfld.long 0x00 0. " TYPE ,Type of MPU regions" "Unified,Seperated"
rgroup c15:0x500--0x500
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
hexmask.long.byte 0x00 16.--23. 1. " AFFL2 ,Affitnity Level 2"
hexmask.long.byte 0x00 8.--15. 1. " AFFL1 ,Affitnity Level 1"
hexmask.long.byte 0x00 0.--7. 1. " AFFL0 ,Affitnity Level 0"
textline " "
rgroup c15:0x0410++0x00
line.long 0x00 "MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..."
bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..."
textline " "
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
rgroup c15:0x0510++0x00
line.long 0x00 "MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
rgroup c15:0x0610++0x00
line.long 0x00 "MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup c15:0x0710++0x00
line.long 0x00 "MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
rgroup c15:0x0020++0x00
line.long 0x00 "ISAR0,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup c15:0x0120++0x00
line.long 0x00 "ISAR1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..."
rgroup c15:0x0220++0x00
line.long 0x00 "ISAR2,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup c15:0x0320++0x00
line.long 0x00 "ISAR3,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup c15:0x0420++0x00
line.long 0x00 "ISAR4,Instruction Set Attribute Register 4"
bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup c15:0x0520++0x00
line.long 0x00 "ISAR5,Instruction Set Attribute Registers 5 (Reserved)"
rgroup c15:0x0620++0x00
line.long 0x00 "ISAR6,Instruction Set Attribute Registers 6 (Reserved)"
rgroup c15:0x0720++0x00
line.long 0x00 "ISAR7,Instruction Set Attribute Registers 7 (Reserved)"
rgroup c15:0x0010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..."
bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup c15:0x0110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..."
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
textline " "
rgroup c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
textline " "
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..."
rgroup c15:0x0310++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
tree.end
width 0x8
tree "System Control and Configuration"
group c15:0x1--0x1
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big"
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable"
bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
textline " "
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored"
bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable"
bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable"
bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin"
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable"
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable"
bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable"
bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable"
bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable"
textline " "
group c15:0x101--0x101
line.long 0x0 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 31. " DICDI ,Disable Case C dual issue control" "Enable,Disable"
bitfld.long 0x00 30. " DIB2DI ,Disable Case B2 dual issue control" "Enable,Disable"
bitfld.long 0x00 29. " DIB1DI ,Disable Case B1 dual issue control" "Enable,Disable"
textline " "
bitfld.long 0x00 28. " DIADI ,Disable Case A dual issue control" "Enable,Disable"
bitfld.long 0x00 27. " B1TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
bitfld.long 0x00 26. " B0TCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
textline " "
bitfld.long 0x00 25. " ATCMPCEN ,B1TCM parity or ECC check enable" "Disable,Enable"
bitfld.long 0x00 24. " AXISCEN ,AXI slave cache access enable" "Disable,Enable"
bitfld.long 0x00 23. " AXISCUEN ,AXI slave cache User mode access enable" "Disable,Enable"
textline " "
bitfld.long 0x00 22. " DILSM ,Disable LIL on load/store multiples" "Disable,Enable"
bitfld.long 0x00 21. " DEOLP ,Disable end of loop prediction" "Disable,Enable"
bitfld.long 0x00 20. " DBHE ,Disable BH extension" "Enable,Disable"
textline " "
bitfld.long 0x00 19. " FRCDIS ,Fetch rate control disable" "Enable,Disable"
bitfld.long 0x00 17. " RSDIS ,Return stack disable" "Enable,Disable"
bitfld.long 0x00 15.--16. " BP ,Control of the branch prediction policy" "Normal,Taken,Not taken,?..."
textline " "
bitfld.long 0x00 14. " DBWR ,Disable write_burst on AXI master" "Enable,Disable"
bitfld.long 0x00 13. " DSWT ,Disable should_wait on AXI master" "Enable,Disable"
bitfld.long 0x00 12. " ERPEG ,Enable random parity error generation" "Disable,Enable"
textline " "
bitfld.long 0x00 11. " DOLT ,Disable outstanding line fill on AXI master" "Enable,Disable"
bitfld.long 0x00 10. " FORA ,Force outer read allocate (ORA) for outer write allocate (OWA) regions" "Not forced,Forced"
bitfld.long 0x00 9. " FWT ,Force write-through (WT) for write-back (WB) regions" "Not forced,Forced"
textline " "
bitfld.long 0x00 8. " FDSnS ,Force D-side to not-shared when MPU is off" "Not forced,Forced"
bitfld.long 0x00 7. " sMOV ,sMOV disabled" "Enabled,Disabled"
bitfld.long 0x0 6. " DILS ,Disable low interrupt latency on all load/store instructions" "Enable,Disable"
textline " "
bitfld.long 0x00 5. " DA ,DA Disable abort on cache parity error" "Enable,Disable"
bitfld.long 0x00 4. " EHR ,Enable hardware recovery from cache parity errors" "Disable,Enable"
bitfld.long 0x00 2. " I1TCMECEN ,Instruction 1 TCM error check enable" "Disable,Enable"
textline " "
bitfld.long 0x00 1. " I0TCMECEN ,Instruction 1 TCM error check enable" "Disable,Enable"
bitfld.long 0x00 0. " ITCMECEN ,Instruction TCM error check enable" "Disable,Enable"
textline " "
group c15:0x0f--0x0f
line.long 0x0 "SACTLR,Secondary Auxiliary Control Register"
bitfld.long 0x00 22. " DCHE ,Disable hard-error support in the caches" "Enable,Disable"
bitfld.long 0x00 21. " DR2B ,Enable random 2-bit error genration in cache RAMs" "Disable,Enable"
bitfld.long 0x00 20. " DF6DI ,F6 dual issue control" "Enable,Disable"
textline " "
bitfld.long 0x00 19. " DF2DI ,F2 dual issue control" "Enable,Disable"
bitfld.long 0x00 18. " DDI ,F1/F3/F4 dual issue control" "Enable,Disable"
bitfld.long 0x00 17. " DOODPFP ,Out-of-order Double Precision Floating-point control" "Enable,Disable"
textline " "
bitfld.long 0x00 16. " DOOFMACS ,Out-of-order FMACS control" "Enable,Disable"
bitfld.long 0x00 13. " IXC ,Floating-point inexact exception output mask" "Mask,Propagate"
bitfld.long 0x00 12. " OFC ,Floating-point overflow exception output mask" "Mask,Propagate"
textline " "
bitfld.long 0x00 11. " UFC ,Floating-point underflow exception output mask" "Mask,Propagate"
bitfld.long 0x00 10. " IOC ,Floating-point invalid operation exception output mask" "Mask,Propagate"
bitfld.long 0x00 9. " DZC ,Floating-point divide-by-zero exception output mask" "Mask,Propagate"
textline " "
bitfld.long 0x00 8. " IDC ,Floating-point input denormal exception output mask" "Mask,Propagate"
bitfld.long 0x00 3. " BTCMECC ,Correction for internal ECC logic on BTCM ports" "Enable,Disable"
bitfld.long 0x00 2. " ATCMECC ,Correction for internal ECC logic on ATCM port" "Enable,Disable"
textline " "
bitfld.long 0x00 1. " BTCMRMW ,Enable 64-bit stores on BTCMs" "Disable,Enable"
bitfld.long 0x00 0. " ATCMRMW ,Enable 64-bit stores on ATCM" "Disable,Enable"
textline " "
group c15:0x201--0x201
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 26.--27. " CP13 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 24.--25. " CP12 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 22.--23. " CP11 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 20.--21. " CP10 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 18.--19. " CP9 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 16.--17. " CP8 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 14.--15. " CP7 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 12.--13. " CP6 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 10.--11. " CP5 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 8.--9. " CP4 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 6.--7. " CP3 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 4.--5. " CP2 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
bitfld.long 0x0 2.--3. " CP1 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
bitfld.long 0x0 0.--1. " CP0 ,Coprocesor access control" "Denied,Privileged,Reserved,Full"
textline " "
group.long c15:0x0b--0x0b
line.long 0x00 "SPC,Slave Port Control"
bitfld.long 0x00 1. " PRIV ,Privilege access only" "User/Privilege,Privilege only"
bitfld.long 0x00 0. " AXISLEN ,AXI slave port disable" "Enabled,Disabled"
tree.end
width 0x8
tree "MPU Control and Configuration"
group c15:0x0001--0x0001
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 31. " IE ,Instruction endianness" "Little,Big"
bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disable,Enable"
bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disable,Enable"
bitfld.long 0x0 27. " NMFI ,Nonmaskable Fast Interrupt enable" "Disable,Enable"
textline " "
bitfld.long 0x0 25. " EE ,Exception endianess" "Little,Big"
bitfld.long 0x0 24. " VE ,Vector Enable" "Disable,Vectored"
bitfld.long 0x0 21. " FI ,Fast Interrupts enable" "Disable,Enable"
bitfld.long 0x0 19. " DZ ,Divide by Zero exception bit" "Disable,Enable"
bitfld.long 0x0 14. " RR ,Round-Robin bit" "Random,RRobin"
bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
textline " "
bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disable,Enable"
bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disable,Enable"
bitfld.long 0x0 2. " C ,Enable data cache" "Disable,Enable"
bitfld.long 0x0 1. " A ,Strict Alignment" "Disable,Enable"
bitfld.long 0x0 0. " M ,MPU Enable" "Disable,Enable"
textline " "
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
bitfld.long 0x00 11. " RW ,Access Caused an Abort Type" "Read,Write"
textline " "
bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
group.long c15:0x0015++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
group.long c15:0x0006++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR"
bitfld.long 0x00 0.--3. 10. " STATUS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Nontranslation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..."
group.long c15:0x0115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
group.long c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
textline " "
group c15:0x0016++0x00
line.long 0x00 "RBAR,Region Base Address Register"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
line.long 0x00 "RSER,Region Size and Enable Register"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
line.long 0x00 "RACR,Region Access Control Register"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " TYPE ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
group c15:0x0026++0x00
line.long 0x00 "MRNR,Memory Region Number Register"
bitfld.long 0x00 0.--3. " REGION ,Defines the group of registers to be accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline " "
group c15:0x010d++0x00
line.long 0x00 "CIDR,Context ID Register"
group.long c15:0x20d++0x00
line.long 0x00 "TIDRURW,User read/write Thread and Process ID Register"
group.long c15:0x30d++0x00
line.long 0x00 "TIDRURO,User read only Thread and Process ID Register"
group.long c15:0x40d++0x00
line.long 0x00 "TIDRPRW,Privileged Only Thread and Process ID Register"
tree "MPU regions"
group c15:0x0016++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RBAR0,Region Base Address Register 0"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RSER0,Region Size and Enable Register 0"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x0
line.long 0x00 "RACR0,Region Access Control Register 0"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RBAR1,Region Base Address Register 1"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RSER1,Region Size and Enable Register 1"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x1
line.long 0x00 "RACR1,Region Access Control Register 1"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RBAR2,Region Base Address Register 2"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RSER2,Region Size and Enable Register 2"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x2
line.long 0x00 "RACR2,Region Access Control Register 2"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RBAR3,Region Base Address Register 3"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RSER3,Region Size and Enable Register 3"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x3
line.long 0x00 "RACR3,Region Access Control Register 3"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RBAR4,Region Base Address Register 4"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RSER4,Region Size and Enable Register 4"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x4
line.long 0x00 "RACR4,Region Access Control Register 4"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RBAR5,Region Base Address Register 5"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RSER5,Region Size and Enable Register 5"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x5
line.long 0x00 "RACR5,Region Access Control Register 5"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RBAR6,Region Base Address Register 6"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RSER6,Region Size and Enable Register 6"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x6
line.long 0x00 "RACR6,Region Access Control Register 6"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RBAR7,Region Base Address Register 7"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RSER7,Region Size and Enable Register 7"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x7
line.long 0x00 "RACR7,Region Access Control Register 7"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RBAR8,Region Base Address Register 8"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RSER8,Region Size and Enable Register 8"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x8
line.long 0x00 "RACR8,Region Access Control Register 8"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RBAR9,Region Base Address Register 9"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RSER9,Region Size and Enable Register 9"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0x9
line.long 0x00 "RACR9,Region Access Control Register 9"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RBAR10,Region Base Address Register 10"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RSER10,Region Size and Enable Register 10"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xA
line.long 0x00 "RACR10,Region Access Control Register 10"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
group c15:0x0016++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RBAR11,Region Base Address Register 11"
hexmask.long 0x00 5.--31. 0x20 " BA ,Base address"
group c15:0x0216++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RSER11,Region Size and Enable Register 11"
bitfld.long 0x00 15. " SD ,Subregion 7 disable" "-,D"
bitfld.long 0x00 14. " ,Subregion 6 disable" "-,D"
bitfld.long 0x00 13. " ,Subregion 5 disable" "-,D"
bitfld.long 0x00 12. " ,Subregion 4 disable" "-,D"
bitfld.long 0x00 11. " ,Subregion 3 disable" "-,D"
bitfld.long 0x00 10. " ,Subregion 2 disable" "-,D"
bitfld.long 0x00 9. " ,Subregion 1 disable" "-,D"
bitfld.long 0x00 8. " ,Subregion 0 disable" "-,D"
bitfld.long 0x00 1.--5. " RS ,Region size" "Unpredictable,Unpredictable,Unpredictable,Unpredictable,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,16MB,32MB,64MB,128MB,256MB,512MB,1GB,2GB,4GB"
bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled"
group c15:0x0416++0x00
saveout c15:0x26 %l 0xB
line.long 0x00 "RACR11,Region Access Control Register 11"
bitfld.long 0x00 12. " XN ,Execute never" "-,NoExec"
bitfld.long 0x00 2. " S ,Share" "No,Yes"
bitfld.long 0x00 8.--10. " AP ,Access permission" "None,Privileged,User read-only,Full,Reserved,Privileged read,Read-only,Reserved"
bitfld.long 0x00 0.--1. 3.--5. " type ,Region type" "Strongly-ordered,Shareable Device,Outer and Inner write-through/no write-allocate,Outer and Inner write-back/no write-allocate,Outer and Inner Non-cacheable,00101,00110,Outer and Inner write-back/write-allocate,Non-shareable Device,01001,01010,01011,01100,01101,01110,01111,O:Non-cacheable I:Non-cacheable,O:Non-cacheable I:Write-back/write-allocate,O:Non-cacheable I:Write-through/no write-allocate,O:Non-cacheable I:Write-back/no write-allocate,O:Write-back/write-allocate I:Non-cacheable,O:Write-back/write-allocate I:Write-back/write-allocate,O:Write-back/write-allocate I:Write-through/no write-allocate,O:Write-back/write-allocate I:Write-back/no write-allocate,O:Write-through/no write-allocate I:Non-cacheable,O:Write-through/no write-allocate I:Write-back/write-allocate,O:Write-through/no write-allocate I:Write-through/no write-allocate,O:Write-through/no write-allocate I:Write-back/no write-allocate,O:Write-back/no write-allocate I:Non-cacheable,O:Write-back/no write-allocate I:Write-back/write-allocate,O:Write-back/no write-allocate I:Write-through/no write-allocate,O:Write-back/no write-allocate I:Write-back/no write-allocate"
textline " "
tree.end
tree.end
width 0x9
tree "TCM Control and Configuration"
rgroup.long c15:0x200++0x00
line.long 0x00 "TCMTR,TCM Type Register"
bitfld.long 0x00 16.--18. " BTCM ,Number of BTCMs implemented" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. " ATCM ,Number of ATCMs implemented" "0,1,2,3,4,5,6,7"
group.long c15:0x019++0x00
line.long 0x00 "BTCMRR,BTCM Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)"
bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,?..."
bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled"
group.long c15:0x119++0x00
line.long 0x00 "ATCMRR,ATCM Region Register"
hexmask.long 0x00 12.--31. 0x1000 " BA ,Base address (physical address)"
bitfld.long 0x00 2.--6. " SIZE ,Size of instruction TCM on reads" "None,Reserved,Reserved,4KB,8KB,16KB,32KB,64KB,128KB,256KB,512KB,1MB,2MB,4MB,8MB,?..."
bitfld.long 0x00 0. " EN ,Enable instruction TCM" "Disabled,Enabled"
rgroup.long c15:0x29++0x00
line.long 0x00 "TCMSEL,TCM Selection Register"
tree.end
width 0xC
tree "Cache Control and Configuration"
rgroup.long c15:0x1100--0x1100
line.long 0x0 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 27.--29. " LoU ,Level of Unification" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--26. " LoC ,Level of Coherency" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,Level 8"
textline " "
bitfld.long 0x00 21.--23. " CL8 ,Cache Level (CL) 8" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. " CL7 ,Cache Level (CL) 7" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 15.--17. " CL6 ,Cache Level (CL) 6" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. " CL5 ,Cache Level (CL) 5" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 9.--11. " CL4 ,Cache Level (CL) 4" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. " CL3 ,Cache Level (CL) 3" "0,1,2,3,4,5,6,7"
textline " "
bitfld.long 0x00 3.--5. " CL2 ,Cache Level (CL) 2" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. " CL1 ,Cache Level (CL) 1" "0,1,2,3,4,5,6,7"
rgroup.long c15:0x1000++0x00
line.long 0x00 "CCSIDR,Cache Size ID Register"
bitfld.long 0x00 31. " WT ,Write-Through" "Not supported,Supported"
bitfld.long 0x00 30. " WB ,Write-Back" "Not supported,Supported"
textline " "
bitfld.long 0x00 29. " RA ,Read-Allocate" "Not supported,Supported"
bitfld.long 0x00 28. " WA ,Write-Allocate" "Not supported,Supported"
textline " "
hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of sets"
hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Associativity"
textline " "
bitfld.long 0x00 0.--2. " LINESIZE ,Number of words in each cache line" "0,1,2,3,4,5,6,7"
group.long c15:0x2000--0x2000
line.long 0x0 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. " Level ,Cache level to select" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0. " InD ,Instruction or data or unified cache to use" "Data/unified,Instruction"
group.long c15:0x03f++0x00
line.long 0x00 "CFLR,Correctable Fault Location Register"
bitfld.long 0x00 26.--29. " WAY ,Way of the error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--25. " SIDE ,Source of the error" "0,1,2,3"
textline " "
hexmask.long.word 0x00 5.--13. 1. " INDEX ,index of the location where the error occurred"
bitfld.long 0x00 0.--1. " TYPE ,Type of access that caused the error" "Instruction cache,Data cache,Reserved,ACP"
rgroup.long c15:0x0ef++0x0
line.long 0x00 "CSOR,Cache Size Override Register"
bitfld.long 0x00 4.--6. " Dcache ,Validation data cache size" "Not presented,Reserved,Reserved,4k,8k,16k,32k,64k"
bitfld.long 0x00 0.--2. " Icache ,Validation instruction cache size" "Not presented,Reserved,Reserved,4k,8k,16k,32k,64k"
tree.end
width 8.
tree "System Performance Monitor"
group c15:0xC9--0xC9
line.long 0x0 "PMNC,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code"
bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "Enabled,Disabled"
textline " "
bitfld.long 0x00 4. " X ,Export Enabled" "Disabled,Enabled"
bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. " C ,Clock Counter Reset" "No action,Reset"
bitfld.long 0x00 1. " P ,Performance Counter Reset" "No action,Reset"
textline " "
bitfld.long 0x00 0. " E ,Counters Enable" "Disabled,Enabled"
group c15:0x1C9--0x1C9
line.long 0x0 "CNTENS,Count Enable Set Register"
eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled"
group c15:0x2C9--0x2C9
line.long 0x0 "CNTENC,Count Enable Clear Register"
eventfld.long 0x00 31. " C ,CCNT Enabled / Enable / Disable CCNT" "Disabled,Enabled"
eventfld.long 0x00 3. " P3 ,PMN3 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 2. " P2 ,PMN2 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 1. " P1 ,PMN1 Enabled / Enable / Disable counter" "Disabled,Enabled"
eventfld.long 0x00 0. " P0 ,PMN0 Enabled / Enable / Disable counter" "Disabled,Enabled"
group c15:0x3C9--0x3C9
line.long 0x0 "FLAG,Overflow Flag Status Register"
eventfld.long 0x00 31. " C ,CCNT overflowed" "No overflow,Overflow"
eventfld.long 0x00 3. " P3 ,PMN3 overflowed" "No overflow,Overflow"
eventfld.long 0x00 2. " P2 ,PMN2 overflowed" "No overflow,Overflow"
eventfld.long 0x00 1. " P1 ,PMN1 overflowed" "No overflow,Overflow"
eventfld.long 0x00 0. " P0 ,PMN0 overflowed" "No overflow,Overflow"
group c15:0x4C9--0x4C9
line.long 0x0 "SWINCR,Software Increment Register"
eventfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment"
eventfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment"
eventfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment"
eventfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment"
group c15:0x5C9--0x5C9
line.long 0x0 "PMNXSEL,Performance Counter Selection Register"
bitfld.long 0x00 0.--4. " SEL ,Selection value" "CNT0,CNT1,CNT2,CNT3,?..."
group c15:0xD9--0xD9
line.long 0x0 "CCNT,Cycle Count Register"
group c15:0x01d9++0x00
line.long 0x00 "ESR,Event Selection Register"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group c15:0x02d9++0x00
line.long 0x00 "PMCR,Performance Monitor Count Register"
group c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x0
line.long 0x00 "ESR0,Event Selection Register 0"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x0
line.long 0x00 "PMCR0,Performance Monitor Count Register 0"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x1
line.long 0x00 "ESR1,Event Selection Register 1"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x1
line.long 0x00 "PMCR1,Performance Monitor Count Register 1"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group c15:0x01d9++0x00
saveout c15:0x5C9 %l 0x2
line.long 0x00 "ESR2,Event Selection Register 2"
hexmask.long.byte 0x00 0.--7. 1. " SEL ,Event Selection"
group c15:0x02d9++0x00
saveout c15:0x5C9 %l 0x2
line.long 0x00 "PMCR2,Performance Monitor Count Register 2"
hexmask.long 0x00 0.--31. 1. " PMC ,Performance Monitor Count"
group c15:0xE9--0xE9
line.long 0x0 "USEREN,User Enable Register"
bitfld.long 0x00 0. " EN ,User Mode Enable" "Disabled,Enabled"
group c15:0x1E9--0x1E9
line.long 0x0 "INTENS,Interrupt Enable Set Register"
eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
group c15:0x2E9--0x2E9
line.long 0x0 "INTENC,Interrupt Enable Clear Register"
eventfld.long 0x00 31. " C ,Interrupt on CCNT Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 3. " P3 ,Interrupt on PMN3 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 2. " P2 ,Interrupt on PMN2 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 1. " P1 ,Interrupt on PMN1 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
eventfld.long 0x00 0. " P0 ,Interrupt on PMN0 Overflow Enabled / Enable / Disable Interrupt" "Disabled,Enabled"
tree.end
width 8.
tree "Debug Registers"
width 11.
tree "Processor Identifier Registers"
rgroup c14:0x340--0x340
line.long 0x00 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code"
hexmask.long.byte 0x0 20.--23. 0x1 " SPECREV ,Variant number"
textline " "
hexmask.long.byte 0x0 16.--19. 0x1 " ARCH , Architecture"
hexmask.long.word 0x0 4.--15. 0x1 " PARTNUM ,Part Number"
textline " "
hexmask.long.byte 0x0 0.--3. 0x1 " REV ,Layout Revision"
rgroup c14:0x341--0x341
line.long 0x00 "CACHETYPE,Cache Type Register"
bitfld.long 0x00 16.--19. " DMINLINE ,Words of Smallest Line Length in L1 or L2 Data Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
bitfld.long 0x00 14.--15. " L1_IPOLICY ,VIPT Instruction Cache Support" "Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 0.--3. " IMINLINE ,Words of Smallest Line Length in L1 or L2 Instruction Cache Number" "Reserved,Reserved,Reserved,Reserved,16x32-bit words,?..."
rgroup c14:0x343--0x343
line.long 0x00 "TLBTYPE,TLB Type Register"
hexmask.long.byte 0x0 16.--23. 0x1 " ILSIZE ,Specifies the number of instruction TLB lockable entries"
hexmask.long.byte 0x0 8.--15. 0x1 " DLSIZE ,Specifies the number of unified or data TLB lockable entries"
textline " "
bitfld.long 0x0 0. " U ,Unified or separate instruction TLBs" "Unified,Separate"
rgroup c14:0x348--0x348
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. " STATE3 ,Thumb-2 Execution Environment (Thumb-2EE) Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " STATE2 ,Java Extension Interface Support" "Not supported,?..."
textline " "
bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup c14:0x349--0x349
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Supported,?..."
bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
rgroup c14:0x34a--0x34a
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 20.--23. " MDM_MM ,Microcontroller Debug Model Support" "Not supported,?..."
bitfld.long 0x00 16.--19. " TDM_MM ,Trace Debug Model (Memory-Mapped) Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " TDM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Not supported,?..."
rgroup c14:0x34b--0x34b
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
hexmask.long 0x00 0.--31. 1. " AF ,Auxiliary Feature"
rgroup c14:0x34c--0x34c
line.long 0x00 "ID_MMFR0,Processor Feature Register 0"
bitfld.long 0x00 28.--31. " IT ,Instruction Type Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " ACR ,Auxiliary Control Register Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..."
textline " "
bitfld.long 0x00 12.--15. " CC_PLEA ,Cache Coherency With PLE Agent/Shared Memory Support" "Not supported,?..."
bitfld.long 0x00 8.--11. " CC_CPUA ,Cache Coherency Support With CPU Agent/Shared Memory Support" "Not supported,?..."
textline " "
bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,?..."
rgroup c14:0x34d--0x34d
line.long 0x00 "ID_MMFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. " BTB ,Branch Target Buffer Support" "Reserved,Reserved,Not required,?..."
bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by MVA/Harvard Architecture" "Supported,?..."
rgroup c14:0x34e--0x34e
line.long 0x00 "ID_MMFR2,Processor Feature Register 2"
bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
textline " "
bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup c14:0x34f--0x34f
line.long 0x00 "ID_MMFR3,Processor Feature Register 3"
bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache by MVA/Clean by MVA/Invalidate and Clean by MVA/Invalidate All Support" "Reserved,Supported,?..."
rgroup c14:0x350--0x350
line.long 0x00 "ID_ISAR0,ISA Feature Register 0"
bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..."
bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 0.--3. " AI ,Atomic Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup c14:0x351--0x351
line.long 0x00 "ID_ISAR1,ISA Feature Register 1"
bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " INTI ,Instructions That Branch Between ARM and Thumb Code Support" "Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " EXTI ,Sign or Zero Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " E2I ,Exception 2 Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " E1I ,Exception 1 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " ENDI ,Endianness Control Instructions Support" "Reserved,Supported,?..."
rgroup c14:0x352--0x352
line.long 0x00 "ID_ISAR2,ISA Feature Register 2"
bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,Supported,?..."
rgroup c14:0x353--0x353
line.long 0x00 "ID_ISAR3,ISA Feature Register 3"
bitfld.long 0x00 28.--31. " T2E ,Thumb-2 Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " SWII ,SWI Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup c14:0x354--0x354
line.long 0x00 "ID_ISAR4,ISA Feature Register 4"
bitfld.long 0x00 20.--23. " EI ,Exclusive Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 12.--15. " SMII ,SMI Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..."
textline " "
bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup c14:0x355--0x355
line.long 0x00 "ID_ISAR5,ISA Feature Register 5"
tree.end
tree "Coresight Management Registers"
width 0xC
textline " "
group c14:0x03bd++0x00
line.long 0x00 "ITCTRL_IOC,Integration Internal Output Control Register"
bitfld.long 0x00 5. " I_DBGTRIGGER ,Internal DBGTRIGGER" "0,1"
bitfld.long 0x00 4. " I_DBGRESTARTED ,Internal DBGRESTARTED" "0,1"
textline " "
bitfld.long 0x00 3. " I_NPMUIRQ ,Internal nPMUIRQ" "0,1"
bitfld.long 0x00 2. " InternalCOMMTX ,Internal COMMTX" "0,1"
textline " "
bitfld.long 0x00 1. " I_COMMRX ,Internal COMMRX" "0,1"
bitfld.long 0x00 0. " I_DBGACK ,Internal DBGACK" "0,1"
group c14:0x03be++0x00
line.long 0x00 "ITCTRL_EOC,Integration External Output Control Register"
bitfld.long 0x00 7. " NDMAEXTERRIQ ,External nDMAEXTERRIRQ" "0,1"
bitfld.long 0x00 6. " NDMASIRQ ,External nDMASIRQ" "0,1"
textline " "
bitfld.long 0x00 5. " NDMAIRQ ,External nDMAIRQ" "0,1"
bitfld.long 0x00 4. " NPMUIRQ ,External nPMUIRQ" "0,1"
textline " "
bitfld.long 0x00 3. " STANDBYWFI ,External STANDBYWFI" "0,1"
bitfld.long 0x00 2. " COMMTX ,External COMMTX" "0,1"
textline " "
bitfld.long 0x00 1. " COMMRX ,External COMMRX" "0,1"
bitfld.long 0x00 0. " DBGACK ,External DBGACK" "0,1"
rgroup c14:0x03bf++0x00
line.long 0x00 "ITCTRL_IS,Integration Input Status Register"
bitfld.long 0x00 11. " CTI_DBGRESTART ,CTI Debug Restart" "0,1"
bitfld.long 0x00 10. " CTI_EDBGRQ ,CTI Debug Request" "0,1"
textline " "
bitfld.long 0x00 9. " CTI_PMUEXTIN[1] ,CTI PMUEXTIN[1] Signal" "0,1"
bitfld.long 0x00 8. " CTI_PMUEXTIN[0] ,CTI PMUEXTIN[0] Signal" "0,1"
textline " "
bitfld.long 0x00 2. " NFIQ ,nFIQ Input" "0,1"
bitfld.long 0x00 1. " NIRQ ,nIRQ Input" "0,1"
textline " "
bitfld.long 0x00 0. " EDBGRQ ,EDBGRQ Input" "0,1"
group c14:0x3c0--0x3c0
line.long 0x0 "ITCTRL,Integration Mode Control Register"
bitfld.long 0x0 0. " IME ,Integration Mode Enable" "Disabled,Enabled"
group c14:0x3e8--0x3e8
line.long 0x0 "CLAIMSET,Claim Tag Set Register"
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Set"
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Set"
textline " "
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Set"
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Set"
textline " "
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Set"
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Set"
textline " "
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Set"
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Set"
group c14:0x3e9--0x3e9
line.long 0x0 "CLAIMCLR,Claim Tag Clear Register"
bitfld.long 0x0 7. " CT7 ,Claim Tag 7" "No Effect,Cleared"
bitfld.long 0x0 6. " CT6 ,Claim Tag 6" "No Effect,Cleared"
textline " "
bitfld.long 0x0 5. " CT5 ,Claim Tag 5" "No Effect,Cleared"
bitfld.long 0x0 4. " CT4 ,Claim Tag 4" "No Effect,Cleared"
textline " "
bitfld.long 0x0 3. " CT3 ,Claim Tag 3" "No Effect,Cleared"
bitfld.long 0x0 2. " CT2 ,Claim Tag 2" "No Effect,Cleared"
textline " "
bitfld.long 0x0 1. " CT1 ,Claim Tag 1" "No Effect,Cleared"
bitfld.long 0x0 0. " CT0 ,Claim Tag 0" "No Effect,Cleared"
wgroup c14:0x3ec--0x3ec
line.long 0x0 "LAR,Lock Access Register"
hexmask.long.long 0x0 0.--31. 1. " LACK ,Lock Access Control Key"
rgroup c14:0x3ed--0x3ed
line.long 0x0 "LSR,Lock Status Register"
bitfld.long 0x0 2. " 32ACND ,32-bit Access Needed" "Needed,Not needed"
bitfld.long 0x0 1. " WLCK ,Writes Lock" "Permitted,Ignored"
textline " "
bitfld.long 0x0 0. " LI ,Lock Implementation" "Lock ignored,Unlock required"
rgroup c14:0x3ee--0x3ee
line.long 0x0 "AUTHSTATUS,Authentication Status Register"
bitfld.long 0x0 7. " SNIDFI ,Secure Non-invasive Debug Features Implemented" "Not Implemented,Implemented"
bitfld.long 0x0 6. " SNIDE ,Secure Non-invasive Debug Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 5. " SIDFI ,Secure Invasive Debug Feauter Implemented" "Not Implemented,Implemented"
bitfld.long 0x0 4. " SIDE ,Secure Invasive Debug Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 3. " NSNIDFI ,Non-secure Non-invasive Debug Feature Implemented" "Not Implemented,Implemented"
bitfld.long 0x0 2. " NSNIDE ,Non-secure Non-invasive Debug Enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 1. " NSIDFI ,Non-secure Invasive Debug Implemented" "Not Implemented,Implemented"
bitfld.long 0x0 0. " NSIDE ,Non-secure Invasive Debug Enable" "Disabled,Enabled"
hgroup c14:0x3f2--0x3f2
hide.long 0x0 "DEVID,Device Identifier (RESERVED)"
rgroup c14:0x3f3--0x3f3
line.long 0x0 "DEVTYPE,Device Type"
hexmask.long.byte 0x00 4.--7. 1. " SUBTYPE ,Subtype"
hexmask.long.byte 0x00 0.--3. 1. " MAIN_CLASS ,Main class"
rgroup c14:0x3f8--0x3f8
line.long 0x0 "PID0,Peripherial ID0"
hexmask.long.byte 0x0 0.--7. 1. " PN ,Part Number [7:0]"
rgroup c14:0x3f9--0x3f9
line.long 0x0 "PID1,Peripherial ID1"
hexmask.long.byte 0x0 4.--7. 1. " JEP106 ,JEP106 Identity Code [3:0]"
hexmask.long.byte 0x0 0.--3. 1. " PN ,Part Number [11:8]"
rgroup c14:0x3fa--0x3fa
line.long 0x0 "PID2,Peripherial ID2"
hexmask.long.byte 0x0 4.--7. 1. " REV ,Revision"
hexmask.long.byte 0x0 0.--2. 1. " JEP106 ,JEP106 Identity Code [6:4]"
rgroup c14:0x3fb--0x3fb
line.long 0x0 "PID3,Peripherial ID3"
hexmask.long.byte 0x0 4.--7. 1. " REVA ,RevAnd"
hexmask.long.byte 0x0 0.--3. 1. " CMOD ,Customer Modified"
rgroup c14:0x3f4--0x3f4
line.long 0x0 "PID4,Peripherial ID4"
bitfld.long 0x0 4.--7. " 4KBC ,Number of 4KB Blocks Occupied" "1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768"
bitfld.long 0x0 0.--3. " JEP106 ,JEP106 Continuation Code" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
rgroup c14:0x3fc--0x3fc
line.long 0x0 "COMPONENTID0,Component ID0"
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
rgroup c14:0x3fd--0x3fd
line.long 0x0 "COMPONENTID1,Component ID1"
hexmask.long.byte 0x0 4.--7. 1. " CCLASS ,Component Class (CoreSight Component)"
hexmask.long.byte 0x0 0.--3. 1. " PRBL ,Preamble"
rgroup c14:0x3fe--0x3fe
line.long 0x0 "COMPONENTID2,Component ID2"
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
rgroup c14:0x3ff--0x3ff
line.long 0x0 "COMPONENTID3,Component ID3"
hexmask.long.byte 0x0 0.--7. 1. " PRBL ,Preamble"
tree.end
textline " "
width 0x7
rgroup c14:0x000--0x000
line.long 0x0 "DIDR,Debug ID Register"
bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
textline " "
bitfld.long 0x0 16.--19. " VERSION ,Debug Architecture Version" "Reserved,ARMv6,ARMv6.1,ARMv7,?..."
textline " "
bitfld.long 0x0 13. " PCSAMPLE ,PC Sample register implemented" "Low,High"
bitfld.long 0x0 12. " SECURITY ,Security Extensions implemented" "Not implemented,Implemented"
textline " "
bitfld.long 0x0 4.--7. " VARIANT ,Implementation-defined Variant Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0.--3. " REVISION ,Implementation-defined Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group c14:0x22--0x22
line.long 0x0 "DSCR,Debug Status and Control Register"
bitfld.long 0x0 30. " DTRRXFULL ,The DTRRX Full Flag" "Empty,Full"
bitfld.long 0x0 29. " DTRTXfull ,The DTRTX Full Flag" "Empty,Full"
textline " "
bitfld.long 0x00 27. " DTRRXFULL_L ,The DTRRX Full Flag 1" "Empty,Full"
bitfld.long 0x00 26. " DTRTXFULL_L ,The DTRTX Full Flag 1" "Empty,Full"
textline " "
bitfld.long 0x0 25. " SPA ,Sticky Pipeline Advance" "No effect,Instruction retired"
bitfld.long 0x0 24. " IC ,Instruction Complete" "Executing,Not executing"
textline " "
bitfld.long 0x0 20.--21. " DTR ,DTR Access Mode" "Non-blocking,Stall,Fast,?..."
bitfld.long 0x0 19. " NSWS ,Imprecise Data Aborts discarded" "Not discarded,Discarded"
textline " "
bitfld.long 0x0 18. " NS ,Non-secure World Status" "Secured,Not secured"
bitfld.long 0x0 17. " NSPNIDEN ,Secure Non-invasive Debug Disabled" "Enabled,Disabled"
textline " "
bitfld.long 0x0 16. " NSPIDEN ,Secure Invasive Debug Disabled" "Enabled,Disabled"
bitfld.long 0x0 15. " MONITOR ,Monitor Debug-mode enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 14. " HDEN ,Halting Debug-mode enable" "Disabled,Enabled"
bitfld.long 0x0 13. " EXECUTE ,Execute instruction enable" "Disabled,Enabled"
textline " "
bitfld.long 0x0 12. " COMMS ,User mode access to Comms Channel disable" "Enabled,Disabled"
bitfld.long 0x0 11. " INTDIS ,Disable Interrupts" "Enabled,Disabled"
textline " "
bitfld.long 0x0 10. " DBGACK ,Force Debug Acknowledge" "Not forced,Forced"
bitfld.long 0x0 8. " UEXT ,Sticky Undefined Exception" "No exception,Exception"
textline " "
bitfld.long 0x0 7. " IABORT ,Sticky Imprecise Abort" "Not aborted,Aborted"
bitfld.long 0x0 6. " PABORT ,Sticky Precise Abort" "Not aborted,Aborted"
textline " "
bitfld.long 0x0 2.--5. " MOE ,Method of Debug Entry" "Debug Entry,Breakpoint,Imprecise Watchpoint,BKPT instruction,External debug,Vector catch,Reserved,Reserved,OS Unlock,?..."
bitfld.long 0x0 1. " RESTARTED ,Core Restarted" "Debug not exited,Debug exited"
textline " "
bitfld.long 0x0 0. " HALTED ,Core Halted" "Normal state,Debug state"
if (((data.long(c14:0x00))&0x01000)==0x00000)
group c14:0x007--0x007
line.long 0x0 "VCR,Vector Catch Register"
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
textline " "
bitfld.long 0x0 4. " DABORT ,Vector Catch Enable Data Abort" "Disabled,Enabled"
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
textline " "
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
textline " "
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
else
group c14:0x007--0x007
line.long 0x0 "VCR,Vector Catch Register"
bitfld.long 0x0 31. " FIQN ,Vector Catch Enable FIQ (Non-secure)" "Disabled,Enabled"
bitfld.long 0x0 30. " IRQN ,Vector Catch Enable IRQ (Non-secure)" "Disabled,Enabled"
textline " "
bitfld.long 0x0 28. " DABORTN ,Vector Catch Enable Data Abort (Non-secure)" "Disabled,Enabled"
bitfld.long 0x0 27. " PABORTN ,Vector Catch Enable Prefetch abort (Non-secure)" "Disabled,Enabled"
textline " "
bitfld.long 0x0 26. " SWIN ,Vector Catch Enable SWI (Non-secure)" "Disabled,Enabled"
bitfld.long 0x0 25. " UNDEFS ,Vector Catch Enable Undefined (Non-secure)" "Disabled,Enabled"
textline " "
bitfld.long 0x0 15. " FIQS ,Vector Catch Enable FIQ (Secure)" "Disabled,Enabled"
bitfld.long 0x0 14. " IRQS ,Vector Catch Enable IRQ (Secure)" "Disabled,Enabled"
textline " "
bitfld.long 0x0 12. " DABORTS ,Vector Catch Enable Data Abort (Secure)" "Disabled,Enabled"
bitfld.long 0x00 11. " PABORTS ,Vector Catch Enable Prefetch abort (Secure)" "Disabled,Enabled"
textline " "
bitfld.long 0x0 10. " SMI ,Vector Catch Enable SMI (Secure)" "Disabled,Enabled"
bitfld.long 0x0 7. " FIQ ,Vector Catch Enable FIQ" "Disabled,Enabled"
textline " "
bitfld.long 0x0 6. " IRQ ,Vector Catch Enable IRQ" "Disabled,Enabled"
bitfld.long 0x0 4. " DABORT0 ,Vector Catch Enable Data Abort" "Disabled,Enabled"
textline " "
bitfld.long 0x0 3. " PABORT ,Vector Catch Enable Prefetch Abort" "Disabled,Enabled"
bitfld.long 0x0 2. " SWI ,Vector Catch Enable SWI" "Disabled,Enabled"
textline " "
bitfld.long 0x0 1. " UNDEF ,Vector Catch Enable Undefined Instruction" "Disabled,Enabled"
bitfld.long 0x0 0. " RESET ,Vector Catch Enable Reset" "Disabled,Enabled"
endif
hgroup c14:0x020--0x020
hide.long 0x0 "DTRRX,Target -> Host Data Transfer Register"
in
group c14:0x023--0x023
line.long 0x0 "DTRTX,Host -> Target Data Transfer Register"
hexmask.long 0x00 0.--31. 1. " HTD ,Host -> target data"
group c14:0x09++0x00
line.long 0x00 "ECR,Event Catch Register"
bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled"
group c14:0x0a++0x00
line.long 0x00 "DSCCR,Debug State Cache Control Register"
bitfld.long 0x00 2. " NWT ,Not Write-Through" "Forced,Normal"
bitfld.long 0x00 0. " DUCL ,Data and Unified Cache Linefill" "Disabled,Normal"
wgroup c14:0x21++0x00
line.long 0x00 "ITR,Instruction Transfer Register"
hexmask.long 0x00 0.--31. 1. " Data ,ARM Instruction for the Processor in Debug State Execute"
wgroup c14:0x24++0x00
line.long 0x00 "DRCR,Debug Run Control Register"
bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance" "Not cleared,Cleared"
bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions" "Not cleared,Cleared"
textline " "
bitfld.long 0x00 1. " RR ,Restart Request" "Not requested,Requested"
bitfld.long 0x00 0. " HR ,Halt Request" "Not requested,Requested"
wgroup c14:0xc0++0x00
line.long 0x00 "OSLAR,Operating System Lock Access Register"
hexmask.long 0x00 0.--31. 1. " OSLA ,OS Lock Access"
rgroup c14:0xc1++0x00
line.long 0x00 "OSLSR,Operating System Lock Status Register"
bitfld.long 0x00 2. " 32_BA ,32-Bit Access" "Not required,Required"
bitfld.long 0x00 1. " LB ,Locked Bit" "Not locked,Locked"
bitfld.long 0x00 0. " LIB ,Lock Implemented Bit" "Not implemented,Implemented"
group c14:0xc2++0x00
line.long 0x00 "OSSRR,Operating System Save and Restore Register"
hexmask.long 0x00 0.--31. 1. " OSSR ,OS Save and Restore"
group c14:0xc4++0x00
line.long 0x00 "PRCR,Device Power-Down and Reset Control Register"
bitfld.long 0x00 2. " HIR ,Hold Internal Reset" "Not held,Held"
bitfld.long 0x00 1. " FIR ,Force Internal Reset" "Not forced,Forced"
bitfld.long 0x00 0. " NPD ,No Power-Down" "DBGNOPWRDWN low,DBGNOPWRDWN high"
hgroup c14:0xc5++0x00
hide.long 0x00 "PRSR,Device Power-Down and Reset Status Register"
in
tree.end
tree "Breakpoint Registers"
group c14:0x40++0x00
line.long 0x00 "BVR0,Breakpoint Value Register 0"
hexmask.long 0x00 0.--31. 1. " BV0 ,Breakpoint Value 0"
group c14:0x50++0x00
line.long 0x00 "BCR0,Breakpoint Control Register 0"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x41++0x00
line.long 0x00 "BVR1,Breakpoint Value Register 1"
hexmask.long 0x00 0.--31. 1. " BV1 ,Breakpoint Value 1"
group c14:0x51++0x00
line.long 0x00 "BCR1,Breakpoint Control Register 1"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x42++0x00
line.long 0x00 "BVR2,Breakpoint Value Register 2"
hexmask.long 0x00 0.--31. 1. " BV2 ,Breakpoint Value 2"
group c14:0x52++0x00
line.long 0x00 "BCR2,Breakpoint Control Register 2"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x43++0x00
line.long 0x00 "BVR3,Breakpoint Value Register 3"
hexmask.long 0x00 0.--31. 1. " BV3 ,Breakpoint Value 3"
group c14:0x53++0x00
line.long 0x00 "BCR3,Breakpoint Control Register 3"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Reserved,Reserved,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x44++0x00
line.long 0x00 "BVR4,Breakpoint Value Register 4"
hexmask.long 0x00 0.--31. 1. " BV4 ,Breakpoint Value 4"
group c14:0x54++0x00
line.long 0x00 "BCR4,Breakpoint Control Register 4"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x45++0x00
line.long 0x00 "BVR5,Breakpoint Value Register 5"
hexmask.long 0x00 0.--31. 1. " BV5 ,Breakpoint Value 5"
group c14:0x55++0x00
line.long 0x00 "BCR5,Breakpoint Control Register 5"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x46++0x00
line.long 0x00 "BVR6,Breakpoint Value Register 6"
hexmask.long 0x00 0.--31. 1. " BV6 ,Breakpoint Value 6"
group c14:0x56++0x00
line.long 0x00 "BCR6,Breakpoint Control Register 6"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
group c14:0x47++0x00
line.long 0x00 "BVR7,Breakpoint Value Register 7"
hexmask.long 0x00 0.--31. 1. " BV7 ,Breakpoint Value 7"
group c14:0x57++0x00
line.long 0x00 "BCR7,Breakpoint Control Register 7"
bitfld.long 0x00 24.--28. " BAM ,Breakpoint Address Mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x00 20.--22. " M ,BVR Meaning" "IVA match,Linked IVA match,Unlinked ID,Linked ID,IVA mismatch,Linked IVA mismatch,?..."
bitfld.long 0x00 16.--19. " LBRP ,Linked BRP Number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x00 14.--15. " SWAC ,Secure World Access Control" "Both,Nonsecure,Secure,?..."
textline " "
bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
bitfld.long 0x00 1.--2. " S ,Supervisor Access Control" "User/system/supervisor,Privileged,User,Any"
bitfld.long 0x00 0. " B ,Breakpoint Enable" "Disabled,Enabled"
tree.end
tree "Watchpoint Control Registers"
group c14:0x60++0x00
line.long 0x00 "WVR0,Watchpoint Value Register 0"
hexmask.long 0x00 2.--31. 0x04 " WA0 ,Watchpoint Address 0"
group c14:0x70--0x70
line.long 0x0 "WCR0,Watchpoint Control Register 0"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x61++0x00
line.long 0x00 "WVR1,Watchpoint Value Register 1"
hexmask.long 0x00 2.--31. 0x04 " WA1 ,Watchpoint Address 1"
group c14:0x71--0x71
line.long 0x0 "WCR1,Watchpoint Control Register 1"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x62++0x00
line.long 0x00 "WVR2,Watchpoint Value Register 2"
hexmask.long 0x00 2.--31. 0x04 " WA2 ,Watchpoint Address 2"
group c14:0x72--0x72
line.long 0x0 "WCR2,Watchpoint Control Register 2"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x63++0x00
line.long 0x00 "WVR3,Watchpoint Value Register 3"
hexmask.long 0x00 2.--31. 0x04 " WA3 ,Watchpoint Address 3"
group c14:0x73--0x73
line.long 0x0 "WCR3,Watchpoint Control Register 3"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x64++0x00
line.long 0x00 "WVR4,Watchpoint Value Register 4"
hexmask.long 0x00 2.--31. 0x04 " WA4 ,Watchpoint Address 4"
group c14:0x74--0x74
line.long 0x0 "WCR4,Watchpoint Control Register 4"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x65++0x00
line.long 0x00 "WVR5,Watchpoint Value Register 5"
hexmask.long 0x00 2.--31. 0x04 " WA5 ,Watchpoint Address 5"
group c14:0x75--0x75
line.long 0x0 "WCR5,Watchpoint Control Register 5"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x66++0x00
line.long 0x00 "WVR6,Watchpoint Value Register 6"
hexmask.long 0x00 2.--31. 0x04 " WA6 ,Watchpoint Address 6"
group c14:0x76--0x76
line.long 0x0 "WCR6,Watchpoint Control Register 6"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x67++0x00
line.long 0x00 "WVR7,Watchpoint Value Register 7"
hexmask.long 0x00 2.--31. 0x04 " WA7 ,Watchpoint Address 7"
group c14:0x77--0x77
line.long 0x0 "WCR7,Watchpoint Control Register 7"
bitfld.long 0x0 24.--28. " WAM ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. " EL ,Enable Linking" "Disabled,Enabled"
textline " "
bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
bitfld.long 0x0 14.--15. " SWAC ,Secure world access control" "Non-secure & Secure,Non-secure,Secure,?..."
textline " "
bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1"
bitfld.long 0x0 11. ",Byte 6 address select" "0,1"
bitfld.long 0x0 10. ",Byte 5 address select" "0,1"
bitfld.long 0x0 9. ",Byte 4 address select" "0,1"
bitfld.long 0x0 8. ",Byte 3 address select" "0,1"
bitfld.long 0x0 7. ",Byte 2 address select" "0,1"
bitfld.long 0x0 6. ",Byte 1 address select" "0,1"
bitfld.long 0x0 5. ",Byte 0 address select" "0,1"
textline " "
bitfld.long 0x0 3.--4. " RD/WR ,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. " PAC ,Privileged access control" "Reserved,Privileged,USR,Any"
textline " "
bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled"
group c14:0x006--0x006
line.long 0x0 "WFAR,Watchpoint Fault Address Register"
hexmask.long.long 0x00 1.--31. 0x02 " WFAR ,Address of the watchpointed instruction"
tree.end
AUTOINDENT.POP
tree.end
tree "CCMR4 (ARM Cortex-R4F CPU Compare Unit)"
base ad:0xFFFFF600
group.long 0x0++0x7
line.long 0x0 "Sr,Status Register"
line.long 0x4 "KeyR,Key Register"
tree.end
tree "CP15 (CP15 System Coprocessor)"
base ad:0xFFF7C200
group.long 0x0++0x3
line.long 0x0 "CP15_ID_CODE,"
group.long 0x0++0x3
line.long 0x0 "CP15_CACHE_TYPE,"
group.long 0x0++0x3
line.long 0x0 "CP15_TCM_TYPE,"
group.long 0x0++0x3
line.long 0x0 "CP15_MPU_TYPE,"
group.long 0x0++0x3
line.long 0x0 "CP15_MULTIPROCESSOR_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_PROCESSOR_FEATURE_0,"
group.long 0x0++0x3
line.long 0x0 "CP15_PROCESSOR_FEATURE_1,"
group.long 0x0++0x3
line.long 0x0 "CP15_DEBUG_FEATURE_0,"
group.long 0x0++0x3
line.long 0x0 "CP15_AUXILIARY_FEATURE_0,"
group.long 0x0++0x3
line.long 0x0 "CP15_MEMORY_MODEL_FEATURE_0,"
group.long 0x0++0x3
line.long 0x0 "CP15_MEMORY_MODEL_FEATURE_1,"
group.long 0x0++0x3
line.long 0x0 "CP15_MEMORY_MODEL_FEATURE_2,"
group.long 0x0++0x3
line.long 0x0 "CP15_MEMORY_MODEL_FEATURE_3,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_0,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_1,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_2,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_3,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_4,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_SET_ATTRIBUTE_5,"
group.long 0x0++0x3
line.long 0x0 "CP15_CURRENT_CACHE_SIZE_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_CURRENT_CACHE_LEVEL_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_CACHE_SIZE_SELECTION,"
group.long 0x0++0x3
line.long 0x0 "CP15_SYSTEM_CONTROL,"
group.long 0x0++0x3
line.long 0x0 "CP15_AUXILIARY_CONTROL,"
group.long 0x0++0x3
line.long 0x0 "CP15_COPROCESSOR_ACCESS,"
group.long 0x0++0x3
line.long 0x0 "CP15_DATA_FAULT_STATUS,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_FAULT_STATUS,"
group.long 0x0++0x3
line.long 0x0 "CP15_AUX_DATA_FAULT_STATUS,"
group.long 0x0++0x3
line.long 0x0 "CP15_AUX_INSTRUCTION_FAULT_STATUS,"
group.long 0x0++0x3
line.long 0x0 "CP15_DATA_FAULT_ADDRESS,"
group.long 0x0++0x3
line.long 0x0 "CP15_INSTRUCTION_FAULT_ADDRESS,"
group.long 0x0++0x3
line.long 0x0 "CP15_MPU_REGION_BASE_ADDRESS,"
group.long 0x0++0x3
line.long 0x0 "CP15_MPU_REGION_SIZE_ENABLE,"
group.long 0x0++0x3
line.long 0x0 "CP15_MPU_REGION_ACCESS,"
group.long 0x0++0x3
line.long 0x0 "CP15_MPU_REGION_NUMBER,"
group.long 0x0++0x3
line.long 0x0 "CP15_TCM_BTCM_REGION,"
group.long 0x0++0x3
line.long 0x0 "CP15_TCM_ATCM_REGION,"
group.long 0x0++0x3
line.long 0x0 "CP15_TCM_TCM_SELECTION,"
group.long 0x0++0x3
line.long 0x0 "CP15_PERFORMANCE_MONITOR_CONTROL,"
group.long 0x0++0x3
line.long 0x0 "CP15_COUNT_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_COUNT_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_OVERFLOW_FLAG_STATUS,"
group.long 0x0++0x3
line.long 0x0 "CP15_SOFTWARE_INCREMENT,"
group.long 0x0++0x3
line.long 0x0 "CP15_COUNTER_SELECTION,"
group.long 0x0++0x3
line.long 0x0 "CP15_CYCLE_COUNT,"
group.long 0x0++0x3
line.long 0x0 "CP15_EVENT_SELECTION,"
group.long 0x0++0x3
line.long 0x0 "CP15_PERFORMANCE_MONITOR_COUNT,"
group.long 0x0++0x3
line.long 0x0 "CP15_USER_ENABLE,"
group.long 0x0++0x3
line.long 0x0 "CP15_INTERRUPT_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_INTERRUPT_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_SLAVE_PORT_CONTROL,"
group.long 0x0++0x3
line.long 0x0 "CP15_FCSE_PID,"
group.long 0x0++0x3
line.long 0x0 "CP15_CONTEXT_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_USER_READ_WRITE_THREAD_PROCESS_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_USER_READ_ONLY_THREAD_PROCESS_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_PRIVILEDGED_ONLY_THREAD_PROCESS_ID,"
group.long 0x0++0x3
line.long 0x0 "CP15_SECONDARY_AUXILIARY_CONTROL,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_IRQ_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_FIQ_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_RESET_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_DEBUG_REQUEST_ENABLE_SET,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_IRQ_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_FIQ_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_RESET_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_NVAL_DEBUG_REQUEST_ENABLE_CLEAR,"
group.long 0x0++0x3
line.long 0x0 "CP15_BUILD_OPTIONS_1,"
group.long 0x0++0x3
line.long 0x0 "CP15_BUILD_OPTIONS_2,"
group.long 0x0++0x3
line.long 0x0 "CP15_CORRECTABLE_FAULT_LOCATION,"
tree.end
tree "CRC (Cyclic Redundancy Check)"
base ad:0xFE000000
group.long 0x0++0x3
line.long 0x0 "Ctrl0,CRC Global Control Register 0"
group.long 0x8++0x3
line.long 0x0 "Ctrl1,CRC Global Control Register 1"
group.long 0x10++0x3
line.long 0x0 "Ctrl2,CRC Global Control Register 2"
group.long 0x18++0x3
line.long 0x0 "IntSet,Write one to a bit to enable a interrupt"
group.long 0x20++0x3
line.long 0x0 "IntClr,Write one to a bit to disable a interrupt"
group.long 0x28++0x3
line.long 0x0 "IntStat,CRC Interrupt Status Register"
group.long 0x30++0x3
line.long 0x0 "IntOffst,CRC Interrupt Offset Register"
group.long 0x38++0x3
line.long 0x0 "Busy,CRC Busy Register"
group.long 0x40++0x13
line.long 0x0 "PCount1,CRC Pattern Counter Preload Register 1"
line.long 0x4 "SCount1,CRC Sector Counter Preload Register 1"
line.long 0x8 "CurSec1,CRC Current Sector Register 1"
line.long 0xC "WdToPld1,Watchdog Timeout Preload Register"
line.long 0x10 "BcToPld1,CRC Channel 1 Block Complete Timeout Preload Register"
group.long 0x60++0x33
line.long 0x0 "PsaSigL1,Channel 1 PSA signature low register"
line.long 0x4 "PsaSigH1,Channel 1 PSA signature high register"
line.long 0x8 "CrcValL1,Channel 1 CRC value low register"
line.long 0xC "CrcValH1,Channel 1 CRC value high register"
line.long 0x10 "PsaSecSigL1,PSA Sector Signature Low Register 1"
line.long 0x14 "PsaSecSigH1,PSA Sector Signature High Register 1"
line.long 0x18 "RawDataL1,Raw Data Low Register 1"
line.long 0x1C "RawDataH1,Raw Data High Register 1"
line.long 0x20 "PCount2,CRC Pattern Counter Preload Register 1"
line.long 0x24 "SCount2,CRC Sector Counter Preload Register 1"
line.long 0x28 "CurSec2,CRC Current Sector Register 1"
line.long 0x2C "WdToPld2,Watchdog Timeout Preload Register"
line.long 0x30 "BcToPld2,CRC Channel 1 Block Complete Timeout Preload Register"
group.long 0xA0++0x33
line.long 0x0 "PsaSigL2,Channel 2 PSA signature low register"
line.long 0x4 "PsaSigH2,Channel 2 PSA signature high register"
line.long 0x8 "CrcValL2,Channel 2 CRC value low register"
line.long 0xC "CrcValH2,Channel 2 CRC value high register"
line.long 0x10 "PsaSecSigL2,PSA Sector Signature Low Register 2"
line.long 0x14 "PsaSecSigH2,PSA Sector Signature High Register 2"
line.long 0x18 "RawDataL2,Raw Data Low Register 2"
line.long 0x1C "RawDataH2,Raw Data High Register 2"
line.long 0x20 "PCount3,CRC Pattern Counter Preload Register 3"
line.long 0x24 "SCount3,CRC Sector Counter Preload Register 3"
line.long 0x28 "CurSec3,CRC Current Sector Register 3"
line.long 0x2C "WdToPld3,Watchdog Timeout Preload Register"
line.long 0x30 "BcToPld3,CRC Channel 3 Block Complete Timeout Preload Register"
group.long 0xE0++0x33
line.long 0x0 "PsaSigL3,Channel 3 PSA signature low register"
line.long 0x4 "PsaSigH3,Channel 3 PSA signature high register"
line.long 0x8 "CrcValL3,Channel 3 CRC value low register"
line.long 0xC "CrcValH3,Channel 3 CRC value high register"
line.long 0x10 "PsaSecSigL3,PSA Sector Signature Low Register 3"
line.long 0x14 "PsaSecSigH3,PSA Sector Signature High Register 3"
line.long 0x18 "RawDataL3,Raw Data Low Register 3"
line.long 0x1C "RawDataH3,Raw Data High Register 3"
line.long 0x20 "PCount4,CRC Pattern Counter Preload Register 4"
line.long 0x24 "SCount4,CRC Sector Counter Preload Register 4"
line.long 0x28 "CurSec4,CRC Current Sector Register 4"
line.long 0x2C "WdToPld4,Watchdog Timeout Preload Register"
line.long 0x30 "BcToPld4,CRC Channel 4 Block Complete Timeout Preload Register"
group.long 0x120++0x23
line.long 0x0 "PsaSigL4,Channel 4 PSA signature low register"
line.long 0x4 "PsaSigH4,Channel 4 PSA signature high register"
line.long 0x8 "CrcValL4,Channel 4 CRC value low register"
line.long 0xC "CrcValH4,Channel 4 CRC value high register"
line.long 0x10 "PsaSecSigL4,PSA Sector Signature Low Register 4"
line.long 0x14 "PsaSecSigH4,PSA Sector Signature High Register 4"
line.long 0x18 "RawDataL4,Raw Data Low Register 4"
line.long 0x1C "RawDataH4,Raw Data High Register 4"
line.long 0x20 "MbusSel,Data bus tracing selection"
tree.end
tree "DCAN (Controller Area Network)"
base ad:0x0
tree "DCAN1"
base ad:0xFFF7DC00
group.long 0x0++0x17
line.long 0x0 "Ctrl,Config register"
line.long 0x4 "ErrStat,Status register"
line.long 0x8 "ErrCnt,Error Counter Register"
line.long 0xC "Btr,Bit Timing_BRP Extension Register"
line.long 0x10 "IntR,Interrupt Register"
line.long 0x14 "Test,Test Register"
group.long 0x1C++0x7
line.long 0x0 "ParErr,Parity Error Code Register"
line.long 0x4 "Rel,Core Release Register"
group.long 0x80++0x53
line.long 0x0 "AboT,Auto Bus On Time"
line.long 0x4 "TrReqX,Transmission Request X"
line.long 0x8 "TrReq12,Transmission Request 2-1"
line.long 0xC "TrReq34,Transmission Request 4-3"
line.long 0x10 "TrReq56,Transmission Request 6-5"
line.long 0x14 "TrReq78,Transmission Request 8-7"
line.long 0x18 "NewDatX,New Data X"
line.long 0x1C "NewDat12,New Data 2-1"
line.long 0x20 "NewDat34,New Data 4-3"
line.long 0x24 "NewDat56,New Data 6-5"
line.long 0x28 "NewDat78,New Data 8-7"
line.long 0x2C "IntPenX,Interrupt Pending X"
line.long 0x30 "IntPen12,Interrupt Pending 2-1"
line.long 0x34 "IntPen34,Interrupt Pending 4-3"
line.long 0x38 "IntPen56,Interrupt Pending 6-5"
line.long 0x3C "IntPen78,Interrupt Pending 8-7"
line.long 0x40 "MsgValX,Message Valid X"
line.long 0x44 "MsgVal12,Message Valid 2-1"
line.long 0x48 "MsgVal34,Message Valid 4-3"
line.long 0x4C "MsgVal56,Message Valid 6-5"
line.long 0x50 "MsgVal78,Message Valid 8-7"
group.long 0xD8++0xF
line.long 0x0 "IntPndMx12,IntPndMux 2-1"
line.long 0x4 "IntPndMx34,IntPndMux 4-3"
line.long 0x8 "IntPndMx56,IntPndMux 6-5"
line.long 0xC "IntPndMx78,IntPndMux 8-7"
group.long 0x100++0x17
line.long 0x0 "If1Cmd,If1 Command Mask / Command Request Register"
line.long 0x4 "If1Msk,If1 Mask Register"
line.long 0x8 "If1Arb,If1 Arbitation Register"
line.long 0xC "If1MsgCtrl,If1 Message Control Register"
line.long 0x10 "If1DatA,If1 Data A Register"
line.long 0x14 "If1DatB,If1 Data B Register"
group.long 0x120++0x17
line.long 0x0 "If2Com,If2 Command Mask / Command Request Register"
line.long 0x4 "If2Msk,If2 Mask Register"
line.long 0x8 "If2Arb,If2 Arbitation Register"
line.long 0xC "If2MsgCtrl,If2 Message Control Register"
line.long 0x10 "If2DatA,If2 Data A Register"
line.long 0x14 "If2DatB,If2 Data B Register"
group.long 0x140++0x17
line.long 0x0 "If3Obs,If3 Observation Register"
line.long 0x4 "If3Msk,If3 Mask Register"
line.long 0x8 "If3Arb,If3 Arbitation Register"
line.long 0xC "If3MsgCtrl,If3 Message Control Register"
line.long 0x10 "If3DatA,If3 Data A Register"
line.long 0x14 "If3DatB,If3 Data B Register"
group.long 0x160++0xF
line.long 0x0 "If3Upd12,Update enable 2-1 Register"
line.long 0x4 "If3Upd34,Update enable 4-3 Register"
line.long 0x8 "If3Upd56,Update enable 6-5 Register"
line.long 0xC "If3Upd78,Update enable 8-7 Register"
group.long 0x1E0++0x7
line.long 0x0 "IoCtrlTx,TX IO Control Register"
line.long 0x4 "IoCtrlRx,RX IO Control Register"
tree.end
tree "DCAN2"
base ad:0xFFF7DE00
group.long 0x0++0x17
line.long 0x0 "Ctrl,Config register"
line.long 0x4 "ErrStat,Status register"
line.long 0x8 "ErrCnt,Error Counter Register"
line.long 0xC "Btr,Bit Timing_BRP Extension Register"
line.long 0x10 "IntR,Interrupt Register"
line.long 0x14 "Test,Test Register"
group.long 0x1C++0x7
line.long 0x0 "ParErr,Parity Error Code Register"
line.long 0x4 "Rel,Core Release Register"
group.long 0x80++0x53
line.long 0x0 "AboT,Auto Bus On Time"
line.long 0x4 "TrReqX,Transmission Request X"
line.long 0x8 "TrReq12,Transmission Request 2-1"
line.long 0xC "TrReq34,Transmission Request 4-3"
line.long 0x10 "TrReq56,Transmission Request 6-5"
line.long 0x14 "TrReq78,Transmission Request 8-7"
line.long 0x18 "NewDatX,New Data X"
line.long 0x1C "NewDat12,New Data 2-1"
line.long 0x20 "NewDat34,New Data 4-3"
line.long 0x24 "NewDat56,New Data 6-5"
line.long 0x28 "NewDat78,New Data 8-7"
line.long 0x2C "IntPenX,Interrupt Pending X"
line.long 0x30 "IntPen12,Interrupt Pending 2-1"
line.long 0x34 "IntPen34,Interrupt Pending 4-3"
line.long 0x38 "IntPen56,Interrupt Pending 6-5"
line.long 0x3C "IntPen78,Interrupt Pending 8-7"
line.long 0x40 "MsgValX,Message Valid X"
line.long 0x44 "MsgVal12,Message Valid 2-1"
line.long 0x48 "MsgVal34,Message Valid 4-3"
line.long 0x4C "MsgVal56,Message Valid 6-5"
line.long 0x50 "MsgVal78,Message Valid 8-7"
group.long 0xD8++0xF
line.long 0x0 "IntPndMx12,IntPndMux 2-1"
line.long 0x4 "IntPndMx34,IntPndMux 4-3"
line.long 0x8 "IntPndMx56,IntPndMux 6-5"
line.long 0xC "IntPndMx78,IntPndMux 8-7"
group.long 0x100++0x17
line.long 0x0 "If1Cmd,If1 Command Mask / Command Request Register"
line.long 0x4 "If1Msk,If1 Mask Register"
line.long 0x8 "If1Arb,If1 Arbitation Register"
line.long 0xC "If1MsgCtrl,If1 Message Control Register"
line.long 0x10 "If1DatA,If1 Data A Register"
line.long 0x14 "If1DatB,If1 Data B Register"
group.long 0x120++0x17
line.long 0x0 "If2Com,If2 Command Mask / Command Request Register"
line.long 0x4 "If2Msk,If2 Mask Register"
line.long 0x8 "If2Arb,If2 Arbitation Register"
line.long 0xC "If2MsgCtrl,If2 Message Control Register"
line.long 0x10 "If2DatA,If2 Data A Register"
line.long 0x14 "If2DatB,If2 Data B Register"
group.long 0x140++0x17
line.long 0x0 "If3Obs,If3 Observation Register"
line.long 0x4 "If3Msk,If3 Mask Register"
line.long 0x8 "If3Arb,If3 Arbitation Register"
line.long 0xC "If3MsgCtrl,If3 Message Control Register"
line.long 0x10 "If3DatA,If3 Data A Register"
line.long 0x14 "If3DatB,If3 Data B Register"
group.long 0x160++0xF
line.long 0x0 "If3Upd12,Update enable 2-1 Register"
line.long 0x4 "If3Upd34,Update enable 4-3 Register"
line.long 0x8 "If3Upd56,Update enable 6-5 Register"
line.long 0xC "If3Upd78,Update enable 8-7 Register"
group.long 0x1E0++0x7
line.long 0x0 "IoCtrlTx,TX IO Control Register"
line.long 0x4 "IoCtrlRx,RX IO Control Register"
tree.end
tree "DCAN3"
base ad:0xFFF7E000
group.long 0x0++0x17
line.long 0x0 "Ctrl,Config register"
line.long 0x4 "ErrStat,Status register"
line.long 0x8 "ErrCnt,Error Counter Register"
line.long 0xC "Btr,Bit Timing_BRP Extension Register"
line.long 0x10 "IntR,Interrupt Register"
line.long 0x14 "Test,Test Register"
group.long 0x1C++0x7
line.long 0x0 "ParErr,Parity Error Code Register"
line.long 0x4 "Rel,Core Release Register"
group.long 0x80++0x53
line.long 0x0 "AboT,Auto Bus On Time"
line.long 0x4 "TrReqX,Transmission Request X"
line.long 0x8 "TrReq12,Transmission Request 2-1"
line.long 0xC "TrReq34,Transmission Request 4-3"
line.long 0x10 "TrReq56,Transmission Request 6-5"
line.long 0x14 "TrReq78,Transmission Request 8-7"
line.long 0x18 "NewDatX,New Data X"
line.long 0x1C "NewDat12,New Data 2-1"
line.long 0x20 "NewDat34,New Data 4-3"
line.long 0x24 "NewDat56,New Data 6-5"
line.long 0x28 "NewDat78,New Data 8-7"
line.long 0x2C "IntPenX,Interrupt Pending X"
line.long 0x30 "IntPen12,Interrupt Pending 2-1"
line.long 0x34 "IntPen34,Interrupt Pending 4-3"
line.long 0x38 "IntPen56,Interrupt Pending 6-5"
line.long 0x3C "IntPen78,Interrupt Pending 8-7"
line.long 0x40 "MsgValX,Message Valid X"
line.long 0x44 "MsgVal12,Message Valid 2-1"
line.long 0x48 "MsgVal34,Message Valid 4-3"
line.long 0x4C "MsgVal56,Message Valid 6-5"
line.long 0x50 "MsgVal78,Message Valid 8-7"
group.long 0xD8++0xF
line.long 0x0 "IntPndMx12,IntPndMux 2-1"
line.long 0x4 "IntPndMx34,IntPndMux 4-3"
line.long 0x8 "IntPndMx56,IntPndMux 6-5"
line.long 0xC "IntPndMx78,IntPndMux 8-7"
group.long 0x100++0x17
line.long 0x0 "If1Cmd,If1 Command Mask / Command Request Register"
line.long 0x4 "If1Msk,If1 Mask Register"
line.long 0x8 "If1Arb,If1 Arbitation Register"
line.long 0xC "If1MsgCtrl,If1 Message Control Register"
line.long 0x10 "If1DatA,If1 Data A Register"
line.long 0x14 "If1DatB,If1 Data B Register"
group.long 0x120++0x17
line.long 0x0 "If2Com,If2 Command Mask / Command Request Register"
line.long 0x4 "If2Msk,If2 Mask Register"
line.long 0x8 "If2Arb,If2 Arbitation Register"
line.long 0xC "If2MsgCtrl,If2 Message Control Register"
line.long 0x10 "If2DatA,If2 Data A Register"
line.long 0x14 "If2DatB,If2 Data B Register"
group.long 0x140++0x17
line.long 0x0 "If3Obs,If3 Observation Register"
line.long 0x4 "If3Msk,If3 Mask Register"
line.long 0x8 "If3Arb,If3 Arbitation Register"
line.long 0xC "If3MsgCtrl,If3 Message Control Register"
line.long 0x10 "If3DatA,If3 Data A Register"
line.long 0x14 "If3DatB,If3 Data B Register"
group.long 0x160++0xF
line.long 0x0 "If3Upd12,Update enable 2-1 Register"
line.long 0x4 "If3Upd34,Update enable 4-3 Register"
line.long 0x8 "If3Upd56,Update enable 6-5 Register"
line.long 0xC "If3Upd78,Update enable 8-7 Register"
group.long 0x1E0++0x7
line.long 0x0 "IoCtrlTx,TX IO Control Register"
line.long 0x4 "IoCtrlRx,RX IO Control Register"
tree.end
tree.end
tree "DCC (Dual-Clock Comparator)"
base ad:0x0
tree "DCC1"
base ad:0xFFFFEC00
group.long 0x0++0x2B
line.long 0x0 "GCtrl,Global Control Register"
line.long 0x4 "Rev,Revision ID"
line.long 0x8 "CntSeed0,Count0 Seed Value"
line.long 0xC "ValidSeed0,Valid0 Seed Value"
line.long 0x10 "CntSeed1,Count1 Seed Value"
line.long 0x14 "Stat,Status Register"
line.long 0x18 "Cnt0,Count0 Value Register"
line.long 0x1C "Valid0,Valid0 Value Register"
line.long 0x20 "Cnt1,Count1 Value Register"
line.long 0x24 "ClkSrc1,Clock Source Selection Register 1"
line.long 0x28 "ClkSrc0,Clock Source Selection Register 0"
tree.end
tree "DCC2"
base ad:0xFFFFF400
group.long 0x0++0x2B
line.long 0x0 "GCtrl,Global Control Register"
line.long 0x4 "Rev,Revision ID"
line.long 0x8 "CntSeed0,Count0 Seed Value"
line.long 0xC "ValidSeed0,Valid0 Seed Value"
line.long 0x10 "CntSeed1,Count1 Seed Value"
line.long 0x14 "Stat,Status Register"
line.long 0x18 "Cnt0,Count0 Value Register"
line.long 0x1C "Valid0,Valid0 Value Register"
line.long 0x20 "Cnt1,Count1 Value Register"
line.long 0x24 "ClkSrc1,Clock Source Selection Register 1"
line.long 0x28 "ClkSrc0,Clock Source Selection Register 0"
tree.end
tree.end
tree "DMA (Direct Memory Access)"
base ad:0xFFFFF000
group.long 0x0++0x7
line.long 0x0 "GlbCtrl,Global Control Register"
line.long 0x4 "ChnPnd,Channel Pending Register"
group.long 0xC++0x3
line.long 0x0 "Stat,Status Register"
group.long 0x14++0x3
line.long 0x0 "HWChnEnaSet,H/W Channel Enable Set and Status Register"
group.long 0x1C++0x3
line.long 0x0 "HWChnEnaRst,H/W Channel Enable Reset and Status Register"
group.long 0x24++0x3
line.long 0x0 "SWChnEnaSet,S/W Channel Enable Set and Status Register"
group.long 0x2C++0x3
line.long 0x0 "SWChnEnaRst,S/W Channel Enable Reset and Status Register"
group.long 0x34++0x3
line.long 0x0 "ChnPrioSet,Channel Priority Set Register"
group.long 0x3C++0x3
line.long 0x0 "ChnPrioRst,Channel Priority Reset"
group.long 0x44++0x3
line.long 0x0 "GlbChnIntEnaSet,Global Channel Interrupt Enable Set"
group.long 0x4C++0x3
line.long 0x0 "GlbChnIntEnaRst,Global Channel Interrupt Enable Reset"
group.long 0x54++0x1F
line.long 0x0 "ReqAssg0,Request Assignment Register 0"
line.long 0x4 "ReqAssg1,Request Assignment Register 1"
line.long 0x8 "ReqAssg2,Request Assignment Register 2"
line.long 0xC "ReqAssg3,Request Assignment Register 3"
line.long 0x10 "ReqAssg4,Request Assignment Register 4"
line.long 0x14 "ReqAssg5,Request Assignment Register 5"
line.long 0x18 "ReqAssg6,Request Assignment Register 6"
line.long 0x1C "ReqAssg7,Request Assignment Register 7"
group.long 0x94++0xF
line.long 0x0 "PrtAssg0,Port Assignment Register 0"
line.long 0x4 "PrtAssg1,Port Assignment Register 1"
line.long 0x8 "PrtAssg2,Port Assignment Register 2"
line.long 0xC "PrtAssg3,Port Assignment Register 3"
group.long 0xB4++0x3
line.long 0x0 "FTCMap,FTC Interrupt Mapping Register"
group.long 0xBC++0x3
line.long 0x0 "LFSMap,LFS Interrupt Mapping Register"
group.long 0xC4++0x3
line.long 0x0 "HBCMap,HBC Interrupt Mapping Register"
group.long 0xCC++0x3
line.long 0x0 "BTCMap,BTC Interrupt Mapping Register"
group.long 0xD4++0x3
line.long 0x0 "BERMap,BER Interrupt Mapping Register"
group.long 0xDC++0x3
line.long 0x0 "FTCIntEnaSet,FTC Interrupt Enable Set"
group.long 0xE4++0x3
line.long 0x0 "FTCIntEnaRst,FTC Interrupt Enable Reset"
group.long 0xEC++0x3
line.long 0x0 "LFSIntEnaSet,LFS Interrupt Enable Set"
group.long 0xF4++0x3
line.long 0x0 "LFSIntEnaRst,LFS Interrupt Enable Reset"
group.long 0xFC++0x3
line.long 0x0 "HBCIntEnaSet,HBC Interrupt Enable Set"
group.long 0x104++0x3
line.long 0x0 "HBCIntEnaRst,HBC Interrupt Enable Reset"
group.long 0x10C++0x3
line.long 0x0 "BTCIntEnaSet,BTC Interrupt Enable Set"
group.long 0x114++0x3
line.long 0x0 "BTCIntEnaRst,BTC Interrupt Enable Reset"
group.long 0x11C++0x3
line.long 0x0 "GlbIntFlg,Global Interrupt Flg Register"
group.long 0x124++0x3
line.long 0x0 "FTCIntFlg,FTC Interrupt Flag Register"
group.long 0x12C++0x3
line.long 0x0 "LFSIntFlg,LFS Interrupt Flag Register"
group.long 0x134++0x3
line.long 0x0 "HBCIntFlg,HBC Interrupt Flag Register"
group.long 0x13C++0x3
line.long 0x0 "BTCIntFlg,BER Interrupt Flag Register"
group.long 0x144++0x3
line.long 0x0 "BERIntFlg,BER Interrupt Flag Register"
group.long 0x14C++0x27
line.long 0x0 "FTCAOffst,FTCA Interrupt Channel Offset Register"
line.long 0x4 "LFSAOffst,LFSA Interrupt Channel Offset Register"
line.long 0x8 "HBCAOffst,HBCA Interrupt Channel Offset Register"
line.long 0xC "BTCAOffst,BTCA Interrupt Channel Offset Register"
line.long 0x10 "BERAOffst,BERA Interrupt Channel Offset Register"
line.long 0x14 "FTCBOffst,FTCB Interrupt Channel Offset Register"
line.long 0x18 "LSFBOffst,LFSB Interrupt Channel Offset Register"
line.long 0x1C "HBCBOffst,HBCB Interrupt Channel Offset Register"
line.long 0x20 "BTCBOffst,BTCB Interrupt Channel Offset Register"
line.long 0x24 "BERBOffst,BERB Interrupt Channel Offset Register"
group.long 0x178++0x2B
line.long 0x0 "PrtCtrl,Port Control Register"
line.long 0x4 "RamTstCtrl,RAM TEST Control"
line.long 0x8 "DbgCtrl,Debug Control"
line.long 0xC "WpReg,Watchpoint Register"
line.long 0x10 "WpMsk,Watchpoint Mask Register"
line.long 0x14 "PrtAChnSrcAddr,Port A Active Channel Source Address Register"
line.long 0x18 "PrtAChnDstAddr,Port A Active Channel Destination Address Register"
line.long 0x1C "PrtAChnTrCnt,Port A Active Channel Transfer Count Register"
line.long 0x20 "PrtBChnSrcAddr,Port B Active Channel Source Address Register"
line.long 0x24 "PrtBChnDestAddr,Port B Active Channel Destination Address Register"
line.long 0x28 "PrtBChnTrCnt,Port B Active Channel Transfer Count Register"
group.long 0x1A8++0x2F
line.long 0x0 "ParCtrl,Parity Control Register"
line.long 0x4 "ParErrAddr,Parity Error Address Register"
line.long 0x8 "MpCtrl,Memory Protection Control Register"
line.long 0xC "MpStat,Memory Protection Status Register"
line.long 0x10 "Pr0Strt,Start Address of region 0"
line.long 0x14 "Pr0End,End Address of region 0"
line.long 0x18 "Pr1Strt,Start Address of region 0"
line.long 0x1C "Pr1End,End Address of region 1"
line.long 0x20 "Pr2Strt,Start Address of region 2"
line.long 0x24 "Pr2End,End Address of region 2"
line.long 0x28 "Pr3Strt,Start Address of region 3"
line.long 0x2C "Pr3End,End Address of region 3"
tree.end
tree "eCAP (Enhanced Capture)"
base ad:0x0
tree "eCAP1"
base ad:0xFCF79300
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree "eCAP2"
base ad:0xFCF79400
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree "eCAP3"
base ad:0xFCF79500
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree "eCAP4"
base ad:0xFCF79600
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree "eCAP5"
base ad:0xFCF79700
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree "eCAP6"
base ad:0xFCF79800
group.long 0x0++0x17
line.long 0x0 "TSCTR,eCAP Time-Stamp Counter"
line.long 0x4 "CTRPHS,eCAP Counter Phase Offset Value Register"
line.long 0x8 "CAP1,eCAP Capture 1 Register"
line.long 0xC "CAP2,eCAP Capture 2 Register"
line.long 0x10 "CAP3,eCAP Capture 3 Register"
line.long 0x14 "CAP4,eCAP Capture 4 Register"
group.word 0x28++0xB
line.word 0x0 "ECCTL1,eCAP Capture Control Register 1"
line.word 0x2 "ECCTL2,eCAP Capture Control Register 2"
line.word 0x4 "ECEINT,eCAP Capture Interrupt Enable Register"
line.word 0x6 "ECFLG,eCAP Capture Interrupt Flag Register"
line.word 0x8 "ECCLR,eCAP Capture Interrupt Clear Register"
line.word 0xA "ECFRC,eCAP Capture Interrupt Force Register"
tree.end
tree.end
tree "ePWM (Enhanced Pulse Width Modulator)"
base ad:0x0
tree "ePWM1"
base ad:0xFCF78C00
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM2"
base ad:0xFCF78D00
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM3"
base ad:0xFCF78E00
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM4"
base ad:0xFCF78F00
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM5"
base ad:0xFCF79000
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM6"
base ad:0xFCF79100
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree "ePWM7"
base ad:0xFCF79200
group.word 0x0++0x3
line.word 0x0 "TBCTL,Time Base Control Register"
line.word 0x2 "TBSTS,Time Base Status Register"
group.word 0x6++0x5
line.word 0x0 "TBPHS,Time Base Phase Register"
line.word 0x2 "TBCTR,Time Base Counter Register"
line.word 0x4 "TBPRD,Time Base Period Register"
group.word 0xE++0x1
line.word 0x0 "CMPCTL,Counter Compare Control Register"
group.word 0x12++0x2B
line.word 0x0 "CMPA,Counter Compare A Register"
line.word 0x2 "CMPB,Counter Compare B Register"
line.word 0x4 "AQCTLA,Action Qualifier Control Register For Output A"
line.word 0x6 "AQCTLB,Action Qualifier Control Register For Output B"
line.word 0x8 "AQSFRC,Action Qualifier Software Force Register"
line.word 0xA "AQCSFRC,Action Qualifier Continuous S/W Force Register"
line.word 0xC "DBCTL,Dead-Band Generator Control Register"
line.word 0xE "DBRED,Dead-Band Generator Rising Edge Delay Count Register"
line.word 0x10 "DBFED,Dead-Band Generator Falling Edge Delay Count Register"
line.word 0x12 "TZSEL,Trip Zone Select Register"
line.word 0x14 "TZDCSEL,Trip Zone Digital Comparator Select Register"
line.word 0x16 "TZCTL,Trip Zone Control Register"
line.word 0x18 "TZEINT,Trip Zone Enable Interrupt Register"
line.word 0x1A "TZFLG,Trip Zone Flag Register"
line.word 0x1C "TZCLR,Trip Zone Clear Register"
line.word 0x1E "TZFRC,Trip Zone Force Register"
line.word 0x20 "ETSEL,Event Trigger Selection Register"
line.word 0x22 "ETPS,Event Trigger Pre-Scale Register"
line.word 0x24 "ETFLG,Event Trigger Flag Register"
line.word 0x26 "ETCLR,Event Trigger Clear Register"
line.word 0x28 "ETFRC,Event Trigger Force Register"
line.word 0x2A "PCCTL,PWM Chopper Control Register"
group.word 0x60++0x13
line.word 0x0 "DCTRIPSEL,Digital Compare Trip Select Register"
line.word 0x2 "DCACTL,Digital Compare A Control Register"
line.word 0x4 "DCBCTL,Digital Compare B Control Register"
line.word 0x6 "DCFCTL,Digital Compare Filter Control Register"
line.word 0x8 "DCCAPCTL,Digital Compare Capture Control Register"
line.word 0xA "DCFOFFSET,Digital Compare Filter Offset Register"
line.word 0xC "DCFOFFSETCNT,Digital Compare Filter Offset Counter Register"
line.word 0xE "DCFWINDOW,Digital Compare Filter Window Register"
line.word 0x10 "DCFWINDOWCNT,Digital Compare Filter Window Counter Register"
line.word 0x12 "DCCAP,Digital Compare Counter Capture Register"
tree.end
tree.end
tree "eQEP (Enhanced Quadrature Encoder Pulse)"
base ad:0x0
tree "eQEP1"
base ad:0xFCF79900
group.long 0x0++0x23
line.long 0x0 "QPOSCNT,eQEP Position Counter"
line.long 0x4 "QPOSINIT,eQEP Initialization Position Count"
line.long 0x8 "QPOSMAX,eQEP Maximum Position Count"
line.long 0xC "QPOSCMP,eQEP Position-compare"
line.long 0x10 "QPOSILAT,eQEP Index Position Latch"
line.long 0x14 "QPOSSLAT,eQEP Strobe Position Latch"
line.long 0x18 "QPOSLAT,eQEP Position Latch"
line.long 0x1C "QUTMR,eQEP Unit Timer"
line.long 0x20 "QUPRD,eQEP Unit Period Register"
group.word 0x24++0x1F
line.word 0x0 "QWDTMR,eQEP Watchdog Timer"
line.word 0x2 "QWDPRD,eQEP Watchdog Period Register"
line.word 0x4 "QDECCTL,eQEP Decoder Control Register"
line.word 0x6 "QEPCTL,eQEP Control Register"
line.word 0x8 "QCAPCTL,eQEP Capture Control Register"
line.word 0xA "QPOSCTL,eQEP Position-compare Control Register"
line.word 0xC "QEINT,eQEP Interrupt Enable Register"
line.word 0xE "QFLG,eQEP Interrupt Flag Register"
line.word 0x10 "QCLR,eQEP Interrupt Clear Register"
line.word 0x12 "QFRC,eQEP Interrupt Force Register"
line.word 0x14 "QEPSTS,eQEP Status Register"
line.word 0x16 "QCTMR,eQEP Capture Timer"
line.word 0x18 "QCPRD,eQEP Capture Period Register"
line.word 0x1A "QCTMRLAT,eQEP Capture Timer Latch"
line.word 0x1C "QCPRDLAT,eQEP Capture Period Latch"
line.word 0x1E "RESERVED,RESERVED"
tree.end
tree "eQEP2"
base ad:0xFCF79A00
group.long 0x0++0x23
line.long 0x0 "QPOSCNT,eQEP Position Counter"
line.long 0x4 "QPOSINIT,eQEP Initialization Position Count"
line.long 0x8 "QPOSMAX,eQEP Maximum Position Count"
line.long 0xC "QPOSCMP,eQEP Position-compare"
line.long 0x10 "QPOSILAT,eQEP Index Position Latch"
line.long 0x14 "QPOSSLAT,eQEP Strobe Position Latch"
line.long 0x18 "QPOSLAT,eQEP Position Latch"
line.long 0x1C "QUTMR,eQEP Unit Timer"
line.long 0x20 "QUPRD,eQEP Unit Period Register"
group.word 0x24++0x1F
line.word 0x0 "QWDTMR,eQEP Watchdog Timer"
line.word 0x2 "QWDPRD,eQEP Watchdog Period Register"
line.word 0x4 "QDECCTL,eQEP Decoder Control Register"
line.word 0x6 "QEPCTL,eQEP Control Register"
line.word 0x8 "QCAPCTL,eQEP Capture Control Register"
line.word 0xA "QPOSCTL,eQEP Position-compare Control Register"
line.word 0xC "QEINT,eQEP Interrupt Enable Register"
line.word 0xE "QFLG,eQEP Interrupt Flag Register"
line.word 0x10 "QCLR,eQEP Interrupt Clear Register"
line.word 0x12 "QFRC,eQEP Interrupt Force Register"
line.word 0x14 "QEPSTS,eQEP Status Register"
line.word 0x16 "QCTMR,eQEP Capture Timer"
line.word 0x18 "QCPRD,eQEP Capture Period Register"
line.word 0x1A "QCTMRLAT,eQEP Capture Timer Latch"
line.word 0x1C "QCPRDLAT,eQEP Capture Period Latch"
line.word 0x1E "RESERVED,RESERVED"
tree.end
tree.end
tree "ESM (Error Signaling Module)"
base ad:0xFFFFF500
group.long 0x0++0x5B
line.long 0x0 "IflErrPinSet1,Influence Error Pin Set/Status Register 1"
line.long 0x4 "IflErrPinClr1,Influence Error Pin Clear/Status Register 1"
line.long 0x8 "IntEnaSet1,Interrupt Enable Set/Status Register 1"
line.long 0xC "IntEnaClr1,Interrupt Enable Clear/Status Register 1"
line.long 0x10 "IntLvlSet1,Interrupt Level Set/Status Register 1"
line.long 0x14 "IntLvlClr1,Interrupt Level Clear/Status Register 1"
line.long 0x18 "Stat1,Status Register 1"
line.long 0x1C "Stat2,Status Register 2"
line.long 0x20 "Stat3,Status Register 3"
line.long 0x24 "ErrPinStat,Error Pin Status Register"
line.long 0x28 "IntOffstHgh,Interrupt Offset High Register"
line.long 0x2C "IntOffstLow,Interrupt Offset Low Register"
line.long 0x30 "LtCnt,Low-Time Counter Register"
line.long 0x34 "LtCntPre,Low-Time Counter Preload Register"
line.long 0x38 "ErrKey,Error Key Register"
line.long 0x3C "ShdwStat2,Status Shadow Register"
line.long 0x40 "IflErrPinSet4,Influence Error Pin Set/Status Register 4"
line.long 0x44 "IflErrPinClr4,Influence Error Pin Clear/Status Register 4"
line.long 0x48 "IntEnaSet4,Interrupt Enable Set/Status Register 4"
line.long 0x4C "IntEnaClr4,Interrupt Enable Clear/Status Register 4"
line.long 0x50 "IntLvlSet4,Interrupt Level Set/Status Register 4"
line.long 0x54 "IntLvlClr4,Interrupt Level Clear/Status Register 4"
line.long 0x58 "Stat4,Status Register 4"
tree.end
tree "FW (Flash Wrapper)"
base ad:0xFFF87000
group.long 0x0++0x7F
line.long 0x0 "FRdCntl,Read Control Register"
line.long 0x4 "FSpRd,Special Read Control Register"
line.long 0x8 "FEdacCtrl1,Error Correction Control Register1"
line.long 0xC "FEdacCtrl2,Error Correction Control Register2"
line.long 0x10 "FCorErrCnt,Error Correction Counter Register"
line.long 0x14 "FCorErrAddr,Correctable Error Address"
line.long 0x18 "FCorErrPos,Correctable Error Position Register"
line.long 0x1C "FEdacStat,Error Status Register"
line.long 0x20 "FUncErrAddr,Un-correctable Error Address"
line.long 0x24 "FEdacSDis,Error Detection Sector Disable"
line.long 0x28 "FPprimAddrTag,Primary Address Tag Register"
line.long 0x2C "FReduAddrTag,Redundant Address Tag Register"
line.long 0x30 "FBnkProt,Bank Protection Register"
line.long 0x34 "FBnkSec,Bank Sector Enable Register"
line.long 0x38 "FBusy,Bank Busy Register"
line.long 0x3C "FBnkAcc,Bank Access Control Register"
line.long 0x40 "FBnkFallback,Bank Fallback Power Register"
line.long 0x44 "FBnkPmpRdy,Bank/Pump Ready Register"
line.long 0x48 "FPmpAcc1,Pump Access Control Register 1"
line.long 0x4C "FPmpAcc2,Pump Access Control Register 2"
line.long 0x50 "FMdlAcc,Module Access Control Register"
line.long 0x54 "FMdlStat,Module Status Register"
line.long 0x58 "FEmuDatMsw,EEPROM Emulation Data MSW Register"
line.long 0x5C "FEmuDatLsw,EEPROM Emulation Data LSW Register"
line.long 0x60 "FEmuEcc,EEPROM Emulation ECC Register"
line.long 0x64 "FLock,Flash Lock Register"
line.long 0x68 "FEmuAddr,EEPROM Emulation Address"
line.long 0x6C "FDiagCtrl,Diagnostic Control Register"
line.long 0x70 "FRawDataH,Uncorrected Raw Data High"
line.long 0x74 "FRawDataL,Uncorrected Raw Data Low"
line.long 0x78 "FRawEcc,Uncorrected Raw ECC"
line.long 0x7C "FParOvr,Parity Override"
group.long 0xC0++0x3
line.long 0x0 "FEdacSDis2,Error Detection Sector Disable Register 2"
tree.end
tree "GIO (General Purporse Input/Output)"
base ad:0x0
tree "GIO"
base ad:0xFFF7BC00
group.long 0x0++0x33
line.long 0x0 "GlbCtrl,Global Control Register"
line.long 0x4 "PwDn,Power Down"
line.long 0x8 "IntDet,Interrupt Detect"
line.long 0xC "IntPol,Interrupt Polarity"
line.long 0x10 "IntEnaSet,Interrupt Enable Set"
line.long 0x14 "IntEnaClr,Interrupt Enable Clear"
line.long 0x18 "IntLvlSet,Interrupt Priority Set"
line.long 0x1C "IntLvlClr,Interrupt Priority Clear"
line.long 0x20 "IntFlg,Interrupt Flag"
line.long 0x24 "OffstA,Offset A"
line.long 0x28 "OffstB,Offset B"
line.long 0x2C "EmuA,Emulation A"
line.long 0x30 "EmuB,Emulation B"
tree.end
tree "GIOA"
base ad:0xFFF7BC00
group.long 0x34++0x1F
line.long 0x0 "Dir,Data Direction Gio A"
line.long 0x4 "DIn,Data Input Gio A"
line.long 0x8 "DOut,Data Output Gio A"
line.long 0xC "DSet,Data Set Gio A"
line.long 0x10 "DClr,Data Clear Gio A"
line.long 0x14 "PDr,Open Drain Gio A"
line.long 0x18 "PDis,Pull Disable Gio A"
line.long 0x1C "PSel,Pull Select Gio A"
group.long 0x134++0x3
line.long 0x0 "Srs,Slew Rate Select Gio A"
tree.end
tree "GIOB"
base ad:0xFFF7BC00
group.long 0x54++0x1F
line.long 0x0 "Dir,Data Direction Gio B"
line.long 0x4 "DIn,Data Input Gio B"
line.long 0x8 "DOut,Data Output Gio B"
line.long 0xC "DSet,Data Set Gio B"
line.long 0x10 "DClr,Data Clear Gio B"
line.long 0x14 "PDr,Open Drain Gio B"
line.long 0x18 "PDis,Pull Disable Gio B"
line.long 0x1C "PSel,Pull Select Gio B"
group.long 0x138++0x3
line.long 0x0 "Srs,Slew Rate Select Gio B"
tree.end
tree.end
tree "HTU (High-End Timer Transfer Unit)"
base ad:0x0
tree "HTU1"
base ad:0xFFF7A400
group.long 0x0++0x1B
line.long 0x0 "GlbCtrl,Global Control Register"
line.long 0x4 "CPEna,Control Packet Enable Register"
line.long 0x8 "Busy0,Control Packet (CP) Busy Register 0"
line.long 0xC "Busy1,Control Packet (CP) Busy Register 1"
line.long 0x10 "Busy2,Control Packet (CP) Busy Register 2"
line.long 0x14 "Busy3,Control Packet (CP) Busy Register 3"
line.long 0x18 "ACp,Active Control Packet Register"
group.long 0x20++0xF
line.long 0x0 "RLBECtrl,Request Lost and Bus Error Control Register"
line.long 0x4 "BFIntSet,Buffer Full Interrupt Enable Set Register"
line.long 0x8 "BFIntClr,Buffer Full Interrupt Enable Clear Register"
line.long 0xC "IntMap,Interrupt Mapping Register"
group.long 0x34++0x37
line.long 0x0 "IntOffst0,Interrupt Offset Register 0"
line.long 0x4 "IntOffst1,Interrupt Offset Register 1"
line.long 0x8 "BIm,Buffer Initialization Mode Register"
line.long 0xC "RLostFlg,Request Lost Flag Register"
line.long 0x10 "BFIntFlg,Buffer Full Interrupt Flag Register"
line.long 0x14 "BerIntFlg,BER Interrupt Flag Register"
line.long 0x18 "Mp1Strt,Memory Protection 1 Start Address"
line.long 0x1C "Mp1End,Memory Protection 1 End Address"
line.long 0x20 "DbgCtrl,Debug Control Register"
line.long 0x24 "WpReg,Watch Point Register"
line.long 0x28 "WpMsk,Watch Mask Register"
line.long 0x2C "Id,Module Identification Register"
line.long 0x30 "ParCtrl,Parity Control Register"
line.long 0x34 "ParAddr,Parity Address Register"
group.long 0x70++0xB
line.long 0x0 "MpCtrlStat,Memory Protection Control and Status Register"
line.long 0x4 "Mp0Strt,Memory Protection Start Address Register"
line.long 0x8 "Mp0End,Memory Protection End Address Register"
tree.end
tree "HTU2"
base ad:0xFFF7A500
group.long 0x0++0x1B
line.long 0x0 "GlbCtrl,Global Control Register"
line.long 0x4 "CPEna,Control Packet Enable Register"
line.long 0x8 "Busy0,Control Packet (CP) Busy Register 0"
line.long 0xC "Busy1,Control Packet (CP) Busy Register 1"
line.long 0x10 "Busy2,Control Packet (CP) Busy Register 2"
line.long 0x14 "Busy3,Control Packet (CP) Busy Register 3"
line.long 0x18 "ACp,Active Control Packet Register"
group.long 0x20++0xF
line.long 0x0 "RLBECtrl,Request Lost and Bus Error Control Register"
line.long 0x4 "BFIntSet,Buffer Full Interrupt Enable Set Register"
line.long 0x8 "BFIntClr,Buffer Full Interrupt Enable Clear Register"
line.long 0xC "IntMap,Interrupt Mapping Register"
group.long 0x34++0x37
line.long 0x0 "IntOffst0,Interrupt Offset Register 0"
line.long 0x4 "IntOffst1,Interrupt Offset Register 1"
line.long 0x8 "BIm,Buffer Initialization Mode Register"
line.long 0xC "RLostFlg,Request Lost Flag Register"
line.long 0x10 "BFIntFlg,Buffer Full Interrupt Flag Register"
line.long 0x14 "BerIntFlg,BER Interrupt Flag Register"
line.long 0x18 "Mp1Strt,Memory Protection 1 Start Address"
line.long 0x1C "Mp1End,Memory Protection 1 End Address"
line.long 0x20 "DbgCtrl,Debug Control Register"
line.long 0x24 "WpReg,Watch Point Register"
line.long 0x28 "WpMsk,Watch Mask Register"
line.long 0x2C "Id,Module Identification Register"
line.long 0x30 "ParCtrl,Parity Control Register"
line.long 0x34 "ParAddr,Parity Address Register"
group.long 0x70++0xB
line.long 0x0 "MpCtrlStat,Memory Protection Control and Status Register"
line.long 0x4 "Mp0Strt,Memory Protection Start Address Register"
line.long 0x8 "Mp0End,Memory Protection End Address Register"
tree.end
tree.end
tree "I2C (Inter-Integrated Circuit)"
base ad:0xFFF7D400
group.long 0x0++0x3F
line.long 0x0 "I2COAR,I2C Own Address Manager"
line.long 0x4 "I2CIMR,I2C Interrupt Mask Register"
line.long 0x8 "I2CSTR,I2C Status Register"
line.long 0xC "I2CCKL,I2C Clock Divider Low Register"
line.long 0x10 "I2CCKH,I2C Clock Control High Register"
line.long 0x14 "I2CCNT,I2C Data Count Register"
line.long 0x18 "I2CDRR,I2C Data Receive Register"
line.long 0x1C "I2CSAR,I2C Slave Address Register"
line.long 0x20 "I2CDXR,I2C Data Transmit Register"
line.long 0x24 "I2CMDR,I2C Mode Register"
line.long 0x28 "I2CIVR,I2C Interrupt Vector Register"
line.long 0x2C "I2CEMDR,I2C Extended Mode Register"
line.long 0x30 "I2CPSC,I2C Prescale Register"
line.long 0x34 "I2CPID1,I2C Peripheral ID Register 1"
line.long 0x38 "I2CPID2,I2C Peripheral ID Register 2"
line.long 0x3C "I2CDMACR,I2C DMA Control Register"
group.long 0x48++0x27
line.long 0x0 "I2CPFNC,I2C Pin Function Register"
line.long 0x4 "I2CPDIR,I2C Pin Direction Register"
line.long 0x8 "I2CDIN,I2C Data Input Register"
line.long 0xC "I2CDOUT,I2C Data Output Register"
line.long 0x10 "I2CDSET,I2C Data Set Register"
line.long 0x14 "I2CDCLR,I2C Data Clear Register"
line.long 0x18 "I2CPDR,I2C Pin Open Drain Register"
line.long 0x1C "I2CPDIS,I2C Pull Disable Register"
line.long 0x20 "I2CPSEL,I2C Pull Select Register"
line.long 0x24 "I2CSRS,I2C Pins Slew Rate Select Register"
tree.end
tree "IOMM (I/O Multiplexing and Control Module)"
base ad:0xFFFFEA00
group.long 0x0++0x3
line.long 0x0 "Rev,Module Revision Register"
group.long 0x8++0x1B
line.long 0x0 "DieId0,Die Id Register 0"
line.long 0x4 "DieId1,Die Id Register 1"
line.long 0x8 "DieId2,Die Id Register 2"
line.long 0xC "DieId3,Die Id Register 3"
line.long 0x10 "DevId0,Device Id Register 0"
line.long 0x14 "DevId1,Device Id Register 1"
line.long 0x18 "BootConfig0,Boot Config Register 0"
group.long 0x38++0x7
line.long 0x0 "Kick0,Kicker Register 0"
line.long 0x4 "Kick1,Kicker Register 1"
group.long 0xE0++0xF
line.long 0x0 "ErrRawStatSet,Error Raw Status/Set Register"
line.long 0x4 "ErrEnaStatClr,Error Enabled Status/Clear Register"
line.long 0x8 "ErrEna,Error Enable Register"
line.long 0xC "ErrEnaClr,Error Enable Clear Register"
group.long 0xF4++0xB
line.long 0x0 "Fault_Addr,Fault Address Register"
line.long 0x4 "Fault_Stat,Fault Status Register"
line.long 0x8 "Fault_Clr,Fault Clear Register"
group.long 0x110++0xBF
line.long 0x0 "PINMMR0,Pin Multiplexing Control Register 0"
line.long 0x4 "PINMMR1,Pin Multiplexing Control Register 1"
line.long 0x8 "PINMMR2,Pin Multiplexing Control Register 2"
line.long 0xC "PINMMR3,Pin Multiplexing Control Register 3"
line.long 0x10 "PINMMR4,Pin Multiplexing Control Register 4"
line.long 0x14 "PINMMR5,Pin Multiplexing Control Register 5"
line.long 0x18 "PINMMR6,Pin Multiplexing Control Register 6"
line.long 0x1C "PINMMR7,Pin Multiplexing Control Register 7"
line.long 0x20 "PINMMR8,Pin Multiplexing Control Register 8"
line.long 0x24 "PINMMR9,Pin Multiplexing Control Register 9"
line.long 0x28 "PINMMR10,Pin Multiplexing Control Register 10"
line.long 0x2C "PINMMR11,Pin Multiplexing Control Register 11"
line.long 0x30 "PINMMR12,Pin Multiplexing Control Register 12"
line.long 0x34 "PINMMR13,Pin Multiplexing Control Register 13"
line.long 0x38 "PINMMR14,Pin Multiplexing Control Register 14"
line.long 0x3C "PINMMR15,Pin Multiplexing Control Register 15"
line.long 0x40 "PINMMR16,Pin Multiplexing Control Register 16"
line.long 0x44 "PINMMR17,Pin Multiplexing Control Register 17"
line.long 0x48 "PINMMR18,Pin Multiplexing Control Register 18"
line.long 0x4C "PINMMR19,Pin Multiplexing Control Register 19"
line.long 0x50 "PINMMR20,Pin Multiplexing Control Register 20"
line.long 0x54 "PINMMR21,Pin Multiplexing Control Register 21"
line.long 0x58 "PINMMR22,Pin Multiplexing Control Register 22"
line.long 0x5C "PINMMR23,Pin Multiplexing Control Register 23"
line.long 0x60 "PINMMR24,Pin Multiplexing Control Register 24"
line.long 0x64 "PINMMR25,Pin Multiplexing Control Register 25"
line.long 0x68 "PINMMR26,Pin Multiplexing Control Register 26"
line.long 0x6C "PINMMR27,Pin Multiplexing Control Register 27"
line.long 0x70 "PINMMR28,Pin Multiplexing Control Register 28"
line.long 0x74 "PINMMR29,Pin Multiplexing Control Register 29"
line.long 0x78 "PINMMR30,Pin Multiplexing Control Register 30"
line.long 0x7C "PINMMR31,Pin Multiplexing Control Register 31"
line.long 0x80 "PINMMR32,Pin Multiplexing Control Register 32"
line.long 0x84 "PINMMR33,Pin Multiplexing Control Register 33"
line.long 0x88 "PINMMR34,Pin Multiplexing Control Register 34"
line.long 0x8C "PINMMR35,Pin Multiplexing Control Register 35"
line.long 0x90 "PINMMR36,Pin Multiplexing Control Register 36"
line.long 0x94 "PINMMR37,Pin Multiplexing Control Register 37"
line.long 0x98 "PINMMR38,Pin Multiplexing Control Register 38"
line.long 0x9C "PINMMR39,Pin Multiplexing Control Register 39"
line.long 0xA0 "PINMMR40,Pin Multiplexing Control Register 40"
line.long 0xA4 "PINMMR41,Pin Multiplexing Control Register 41"
line.long 0xA8 "PINMMR42,Pin Multiplexing Control Register 42"
line.long 0xAC "PINMMR43,Pin Multiplexing Control Register 43"
line.long 0xB0 "PINMMR44,Pin Multiplexing Control Register 44"
line.long 0xB4 "PINMMR45,Pin Multiplexing Control Register 45"
line.long 0xB8 "PINMMR46,Pin Multiplexing Control Register 46"
line.long 0xBC "PINMMR47,Pin Multiplexing Control Register 47"
tree.end
tree "LIN (Local Interconnect Network)"
base ad:0x0
tree "LIN1"
base ad:0xFFF7E400
group.long 0x0++0x83
line.long 0x0 "GlbCtrl0,global control register"
line.long 0x4 "GlbCtrl1,global control register"
line.long 0x8 "GlbCtrl2,global control register"
line.long 0xC "SetInt,Set Interrupt Register"
line.long 0x10 "ClearInt,Clear Interrupt Register"
line.long 0x14 "SetIntLVL,Set Interrupt Level Register"
line.long 0x18 "ClearIntLVL,Clear Interrupt Level Register"
line.long 0x1C "Flr,Flags Register"
line.long 0x20 "IntVect0,Interrupt Vector Offset 0"
line.long 0x24 "IntVect1,Interrupt Vector Offset 1"
line.long 0x28 "Format,Format Control Register"
line.long 0x2C "Brsr,Baud Rate Selection Register"
line.long 0x30 "Ed,SCI Data Buffer"
line.long 0x34 "Rd,SCI Data Buffer"
line.long 0x38 "Td,SCI Data Buffer"
line.long 0x3C "Fun,Pin Control 0"
line.long 0x40 "Dir,Pin Control 1"
line.long 0x44 "DIn,Pin Control 2"
line.long 0x48 "DOut,Pin Control 3"
line.long 0x4C "DSet,Pin Control 4"
line.long 0x50 "DClr,Pin Control 5"
line.long 0x54 "PDr,Pin Control 6"
line.long 0x58 "PDis,Pin Control 7"
line.long 0x5C "PSel,Pin Control 8"
line.long 0x60 "LinComp,BLinCompARE Register"
line.long 0x64 "LinRd0,LinRd0 Register"
line.long 0x68 "LinRd1,LinRd1 Register"
line.long 0x6C "LinMask,LinMask Register"
line.long 0x70 "LinId,LinId Register"
line.long 0x74 "LinTd0,LIntD0 Register"
line.long 0x78 "LinTd1,LIntD1 Register"
line.long 0x7C "MBrsr,Maximum Baud Rate Selection Register"
line.long 0x80 "SrSel,Slew Rate Control Register"
group.long 0x90++0x3
line.long 0x0 "IoDftCtrl,IODFT for BLin moduler"
tree.end
tree "LIN2"
base ad:0xFFF7E500
group.long 0x0++0x83
line.long 0x0 "GlbCtrl0,global control register"
line.long 0x4 "GlbCtrl1,global control register"
line.long 0x8 "GlbCtrl2,global control register"
line.long 0xC "SetInt,Set Interrupt Register"
line.long 0x10 "ClearInt,Clear Interrupt Register"
line.long 0x14 "SetIntLVL,Set Interrupt Level Register"
line.long 0x18 "ClearIntLVL,Clear Interrupt Level Register"
line.long 0x1C "Flr,Flags Register"
line.long 0x20 "IntVect0,Interrupt Vector Offset 0"
line.long 0x24 "IntVect1,Interrupt Vector Offset 1"
line.long 0x28 "Format,Format Control Register"
line.long 0x2C "Brsr,Baud Rate Selection Register"
line.long 0x30 "Ed,SCI Data Buffer"
line.long 0x34 "Rd,SCI Data Buffer"
line.long 0x38 "Td,SCI Data Buffer"
line.long 0x3C "Fun,Pin Control 0"
line.long 0x40 "Dir,Pin Control 1"
line.long 0x44 "DIn,Pin Control 2"
line.long 0x48 "DOut,Pin Control 3"
line.long 0x4C "DSet,Pin Control 4"
line.long 0x50 "DClr,Pin Control 5"
line.long 0x54 "PDr,Pin Control 6"
line.long 0x58 "PDis,Pin Control 7"
line.long 0x5C "PSel,Pin Control 8"
line.long 0x60 "LinComp,BLinCompARE Register"
line.long 0x64 "LinRd0,LinRd0 Register"
line.long 0x68 "LinRd1,LinRd1 Register"
line.long 0x6C "LinMask,LinMask Register"
line.long 0x70 "LinId,LinId Register"
line.long 0x74 "LinTd0,LIntD0 Register"
line.long 0x78 "LinTd1,LIntD1 Register"
line.long 0x7C "MBrsr,Maximum Baud Rate Selection Register"
line.long 0x80 "SrSel,Slew Rate Control Register"
group.long 0x90++0x3
line.long 0x0 "IoDftCtrl,IODFT for BLin moduler"
tree.end
tree.end
tree "MibADC (12-bit Multibuffered Analog-to-Digital Converter)"
base ad:0x0
tree "MibADC1"
base ad:0xFFF7C000
group.long 0x0++0x18B
line.long 0x0 "RstCtrl,Reset Control Register"
line.long 0x4 "OpModeCtrl,Operation Mode Control Register"
line.long 0x8 "ClckCtrl,Clock Prescaler"
line.long 0xC "CalCtrl,Calibration Control Register"
line.long 0x10 "EvModeCtrl,Ev Mode Control Register"
line.long 0x14 "G1ModeCtrl,G1 Mode Control Register"
line.long 0x18 "G2ModeCtrl,G2 Mode Control Register"
line.long 0x1C "EvSrc,Event Group Trigger Source Select"
line.long 0x20 "G1Src,Group 1 Trigger Source Select"
line.long 0x24 "G2Src,Group 2 Trigger Source Select"
line.long 0x28 "EvIntEna,Event Group Interrupt Enable"
line.long 0x2C "G1IntEna,Group 1 Interrupt Enable"
line.long 0x30 "G2IntEna,Group 2 Interrupt Enable"
line.long 0x34 "EvIntFlg,Event Group Interrupt Flg"
line.long 0x38 "G1IntFlg,Group 1 Interrupt Flg"
line.long 0x3C "G2IntFlg,Group 2 Interrupt Flg"
line.long 0x40 "EvIntCtrl,Event Group Interrupt Threshold Counter"
line.long 0x44 "G1IntCtrl,Group 1 Interrupt Threshold Counter"
line.long 0x48 "G2IntCtrl,Group 2 Interrupt Threshold Counter"
line.long 0x4C "EvDmaCtrl,Event Group Dma Control Register"
line.long 0x50 "G1DmaCtrl,Group 1 Dma Control Register"
line.long 0x54 "G2DmaCtrl,Group 2 Dma Control Register"
line.long 0x58 "BndCtrl,Buffer Boundary Control Register"
line.long 0x5C "BndEnd,Buffer End Boundary"
line.long 0x60 "EvSamp,Event Group Sample Window"
line.long 0x64 "G1Samp,Group 1 Sample Window"
line.long 0x68 "G2Samp,Group 2 Sample Window"
line.long 0x6C "EvSr,Event Group Status Register"
line.long 0x70 "G1Sr,Group 1 Status Register"
line.long 0x74 "G2Sr,Group 2 Status Register"
line.long 0x78 "EvSel,Event Group select register"
line.long 0x7C "G1Sel,Group 1 select register"
line.long 0x80 "G2Sel,Group 2 select register"
line.long 0x84 "CalR,Calibration Register"
line.long 0x88 "SmState,State Macine Current State"
line.long 0x8C "LastConv,Last Conversion"
line.long 0x90 "EvBuffer1,Event Group Buffer"
line.long 0x94 "EvBuffer2,Event Group Buffer"
line.long 0x98 "EvBuffer3,Event Group Buffer"
line.long 0x9C "EvBuffer4,Event Group Buffer"
line.long 0xA0 "EvBuffer5,Event Group Buffer"
line.long 0xA4 "EvBuffer6,Event Group Buffer"
line.long 0xA8 "EvBuffer7,Event Group Buffer"
line.long 0xAC "EvBuffer8,Event Group Buffer"
line.long 0xB0 "G1Buffer1,Group 1 Buffer"
line.long 0xB4 "G1Buffer2,Group 1 Buffer"
line.long 0xB8 "G1Buffer3,Group 1 Buffer"
line.long 0xBC "G1Buffer4,Group 1 Buffer"
line.long 0xC0 "G1Buffer5,Group 1 Buffer"
line.long 0xC4 "G1Buffer6,Group 1 Buffer"
line.long 0xC8 "G1Buffer7,Group 1 Buffer"
line.long 0xCC "G1Buffer8,Group 1 Buffer"
line.long 0xD0 "G2Buffer1,Group 2 Buffer"
line.long 0xD4 "G2Buffer2,Group 2 Buffer"
line.long 0xD8 "G2Buffer3,Group 2 Buffer"
line.long 0xDC "G2Buffer4,Group 2 Buffer"
line.long 0xE0 "G2Buffer5,Group 2 Buffer"
line.long 0xE4 "G2Buffer6,Group 2 Buffer"
line.long 0xE8 "G2Buffer7,Group 2 Buffer"
line.long 0xEC "G2Buffer8,Group 2 Buffer"
line.long 0xF0 "EvEmuBuffer,Event Group Emu Buffer"
line.long 0xF4 "G1EmuBuffer,Group 1 Emu Buffer"
line.long 0xF8 "G2EmuBuffer,Group 2 Emu Buffer"
line.long 0xFC "EvDir,Event Group pin direction selection"
line.long 0x100 "EvDOut,Event Group pin data output"
line.long 0x104 "EvDIn,Event Group pin input value"
line.long 0x108 "EvDSet,Event Group pin set"
line.long 0x10C "EvDClr,Event Group pin clear"
line.long 0x110 "EvPDr,Event Group pin open-drain enable"
line.long 0x114 "EvPDis,Event Group pin pull control enable"
line.long 0x118 "EvPSel,Event Group pull select"
line.long 0x11C "EvSampDisEn,Event Group Discharge Control"
line.long 0x120 "G1SampDisEn,Group 1 Discharge Control"
line.long 0x124 "G2SampDisEn,Group 2 Discharge Control"
line.long 0x128 "MagIntCtrl1,Magnitude Interrupt Control"
line.long 0x12C "MagInt1Msk,Magnitude Interrupt Mask"
line.long 0x130 "MagIntCtrl2,Magnitude Interrupt Control"
line.long 0x134 "MagInt2Msk,Magnitude Interrupt Mask"
line.long 0x138 "MagIntCtrl3,Magnitude Interrupt Control"
line.long 0x13C "MagInt3Msk,Magnitude Interrupt Mask"
line.long 0x140 "MagIntCtrl4,Magnitude Interrupt Control"
line.long 0x144 "MagInt4Msk,Magnitude Interrupt Mask"
line.long 0x148 "MagIntCtrl5,Magnitude Interrupt Control"
line.long 0x14C "MagInt5Msk,Magnitude Interrupt Mask"
line.long 0x150 "MagIntCtrl6,Magnitude Interrupt Control"
line.long 0x154 "MagInt6Msk,Magnitude Interrupt Mask"
line.long 0x158 "MagThrIntEnaSet,Magnitude Interrupt Enable Set"
line.long 0x15C "MagThrIntEnaClr,Magnitude Interrupt Enable Clear"
line.long 0x160 "MagThrIntFlg,Magnitude Interrupt Enable Flag"
line.long 0x164 "MagThrIntOffst,Magnitude Interrupt Offset"
line.long 0x168 "EvFifoRstCtrl,Event Group FIFO Reset Control"
line.long 0x16C "G1FifoRstCtrl,Group 1 FIFO Reset Control"
line.long 0x170 "G2FifoRstCtrl,Group 2 FIFO Reset Control"
line.long 0x174 "EvRamAddr,Event Group RAM Pointer"
line.long 0x178 "G1RamAddr,Group 1 RAM Pointer"
line.long 0x17C "G2RamAddr,Group 2 RAM Pointer"
line.long 0x180 "ParCtrl,Parity Control"
line.long 0x184 "ParAddr,Parity Address"
line.long 0x188 "PwrupDlyCtrl,Power up DLY Control"
group.long 0x190++0x23
line.long 0x0 "EvChnSelModeCtrl,Event Group Channel Selection Mode Control"
line.long 0x4 "G1ChnSelModeCtrl,Group1 Channel Selection Mode Control"
line.long 0x8 "G2ChnSelModeCtrl,Group2 Channel Selection Mode Control"
line.long 0xC "EvCurrCount,Event Group Current Count"
line.long 0x10 "G1CurrCount,Group 1 Current Count"
line.long 0x14 "G2CurrCount,Group 2 Current Count"
line.long 0x18 "EvMaxCount,Event Group Max Count"
line.long 0x1C "G1MaxCount,Group 1 Max Count"
line.long 0x20 "G2MaxCount,Group 2 Max Count"
tree.end
tree "MibADC2"
base ad:0xFFF7C200
group.long 0x0++0x18B
line.long 0x0 "RstCtrl,Reset Control Register"
line.long 0x4 "OpModeCtrl,Operation Mode Control Register"
line.long 0x8 "ClckCtrl,Clock Prescaler"
line.long 0xC "CalCtrl,Calibration Control Register"
line.long 0x10 "EvModeCtrl,Ev Mode Control Register"
line.long 0x14 "G1ModeCtrl,G1 Mode Control Register"
line.long 0x18 "G2ModeCtrl,G2 Mode Control Register"
line.long 0x1C "EvSrc,Event Group Trigger Source Select"
line.long 0x20 "G1Src,Group 1 Trigger Source Select"
line.long 0x24 "G2Src,Group 2 Trigger Source Select"
line.long 0x28 "EvIntEna,Event Group Interrupt Enable"
line.long 0x2C "G1IntEna,Group 1 Interrupt Enable"
line.long 0x30 "G2IntEna,Group 2 Interrupt Enable"
line.long 0x34 "EvIntFlg,Event Group Interrupt Flg"
line.long 0x38 "G1IntFlg,Group 1 Interrupt Flg"
line.long 0x3C "G2IntFlg,Group 2 Interrupt Flg"
line.long 0x40 "EvIntCtrl,Event Group Interrupt Threshold Counter"
line.long 0x44 "G1IntCtrl,Group 1 Interrupt Threshold Counter"
line.long 0x48 "G2IntCtrl,Group 2 Interrupt Threshold Counter"
line.long 0x4C "EvDmaCtrl,Event Group Dma Control Register"
line.long 0x50 "G1DmaCtrl,Group 1 Dma Control Register"
line.long 0x54 "G2DmaCtrl,Group 2 Dma Control Register"
line.long 0x58 "BndCtrl,Buffer Boundary Control Register"
line.long 0x5C "BndEnd,Buffer End Boundary"
line.long 0x60 "EvSamp,Event Group Sample Window"
line.long 0x64 "G1Samp,Group 1 Sample Window"
line.long 0x68 "G2Samp,Group 2 Sample Window"
line.long 0x6C "EvSr,Event Group Status Register"
line.long 0x70 "G1Sr,Group 1 Status Register"
line.long 0x74 "G2Sr,Group 2 Status Register"
line.long 0x78 "EvSel,Event Group select register"
line.long 0x7C "G1Sel,Group 1 select register"
line.long 0x80 "G2Sel,Group 2 select register"
line.long 0x84 "CalR,Calibration Register"
line.long 0x88 "SmState,State Macine Current State"
line.long 0x8C "LastConv,Last Conversion"
line.long 0x90 "EvBuffer1,Event Group Buffer"
line.long 0x94 "EvBuffer2,Event Group Buffer"
line.long 0x98 "EvBuffer3,Event Group Buffer"
line.long 0x9C "EvBuffer4,Event Group Buffer"
line.long 0xA0 "EvBuffer5,Event Group Buffer"
line.long 0xA4 "EvBuffer6,Event Group Buffer"
line.long 0xA8 "EvBuffer7,Event Group Buffer"
line.long 0xAC "EvBuffer8,Event Group Buffer"
line.long 0xB0 "G1Buffer1,Group 1 Buffer"
line.long 0xB4 "G1Buffer2,Group 1 Buffer"
line.long 0xB8 "G1Buffer3,Group 1 Buffer"
line.long 0xBC "G1Buffer4,Group 1 Buffer"
line.long 0xC0 "G1Buffer5,Group 1 Buffer"
line.long 0xC4 "G1Buffer6,Group 1 Buffer"
line.long 0xC8 "G1Buffer7,Group 1 Buffer"
line.long 0xCC "G1Buffer8,Group 1 Buffer"
line.long 0xD0 "G2Buffer1,Group 2 Buffer"
line.long 0xD4 "G2Buffer2,Group 2 Buffer"
line.long 0xD8 "G2Buffer3,Group 2 Buffer"
line.long 0xDC "G2Buffer4,Group 2 Buffer"
line.long 0xE0 "G2Buffer5,Group 2 Buffer"
line.long 0xE4 "G2Buffer6,Group 2 Buffer"
line.long 0xE8 "G2Buffer7,Group 2 Buffer"
line.long 0xEC "G2Buffer8,Group 2 Buffer"
line.long 0xF0 "EvEmuBuffer,Event Group Emu Buffer"
line.long 0xF4 "G1EmuBuffer,Group 1 Emu Buffer"
line.long 0xF8 "G2EmuBuffer,Group 2 Emu Buffer"
line.long 0xFC "EvDir,Event Group pin direction selection"
line.long 0x100 "EvDOut,Event Group pin data output"
line.long 0x104 "EvDIn,Event Group pin input value"
line.long 0x108 "EvDSet,Event Group pin set"
line.long 0x10C "EvDClr,Event Group pin clear"
line.long 0x110 "EvPDr,Event Group pin open-drain enable"
line.long 0x114 "EvPDis,Event Group pin pull control enable"
line.long 0x118 "EvPSel,Event Group pull select"
line.long 0x11C "EvSampDisEn,Event Group Discharge Control"
line.long 0x120 "G1SampDisEn,Group 1 Discharge Control"
line.long 0x124 "G2SampDisEn,Group 2 Discharge Control"
line.long 0x128 "MagIntCtrl1,Magnitude Interrupt Control"
line.long 0x12C "MagInt1Msk,Magnitude Interrupt Mask"
line.long 0x130 "MagIntCtrl2,Magnitude Interrupt Control"
line.long 0x134 "MagInt2Msk,Magnitude Interrupt Mask"
line.long 0x138 "MagIntCtrl3,Magnitude Interrupt Control"
line.long 0x13C "MagInt3Msk,Magnitude Interrupt Mask"
line.long 0x140 "MagIntCtrl4,Magnitude Interrupt Control"
line.long 0x144 "MagInt4Msk,Magnitude Interrupt Mask"
line.long 0x148 "MagIntCtrl5,Magnitude Interrupt Control"
line.long 0x14C "MagInt5Msk,Magnitude Interrupt Mask"
line.long 0x150 "MagIntCtrl6,Magnitude Interrupt Control"
line.long 0x154 "MagInt6Msk,Magnitude Interrupt Mask"
line.long 0x158 "MagThrIntEnaSet,Magnitude Interrupt Enable Set"
line.long 0x15C "MagThrIntEnaClr,Magnitude Interrupt Enable Clear"
line.long 0x160 "MagThrIntFlg,Magnitude Interrupt Enable Flag"
line.long 0x164 "MagThrIntOffst,Magnitude Interrupt Offset"
line.long 0x168 "EvFifoRstCtrl,Event Group FIFO Reset Control"
line.long 0x16C "G1FifoRstCtrl,Group 1 FIFO Reset Control"
line.long 0x170 "G2FifoRstCtrl,Group 2 FIFO Reset Control"
line.long 0x174 "EvRamAddr,Event Group RAM Pointer"
line.long 0x178 "G1RamAddr,Group 1 RAM Pointer"
line.long 0x17C "G2RamAddr,Group 2 RAM Pointer"
line.long 0x180 "ParCtrl,Parity Control"
line.long 0x184 "ParAddr,Parity Address"
line.long 0x188 "PwrupDlyCtrl,Power up DLY Control"
group.long 0x190++0x23
line.long 0x0 "EvChnSelModeCtrl,Event Group Channel Selection Mode Control"
line.long 0x4 "G1ChnSelModeCtrl,Group1 Channel Selection Mode Control"
line.long 0x8 "G2ChnSelModeCtrl,Group2 Channel Selection Mode Control"
line.long 0xC "EvCurrCount,Event Group Current Count"
line.long 0x10 "G1CurrCount,Group 1 Current Count"
line.long 0x14 "G2CurrCount,Group 2 Current Count"
line.long 0x18 "EvMaxCount,Event Group Max Count"
line.long 0x1C "G1MaxCount,Group 1 Max Count"
line.long 0x20 "G2MaxCount,Group 2 Max Count"
tree.end
tree.end
tree "MibSPI (Multibuffered Serial Peripheral Interface)"
base ad:0x0
tree "MibSPI1"
base ad:0xFFF7F400
group.long 0x0++0x87
line.long 0x0 "GlbCtrl0,Global control register 0"
line.long 0x4 "GlbCtrl1,Global control register 1"
line.long 0x8 "Int0,Interrupt Register"
line.long 0xC "IntLvl,Interrupt Level Register"
line.long 0x10 "IntFlg,Flag Register"
line.long 0x14 "Fun,Pin Control 0"
line.long 0x18 "Dir,Pin Control 1"
line.long 0x1C "DIn,Pin Control 2"
line.long 0x20 "DOut,Pin Control 3"
line.long 0x24 "DSet,Pin Control 4"
line.long 0x28 "DClr,Pin Control 5"
line.long 0x2C "PDr,Pin Control 6"
line.long 0x30 "PDis,Pin Control 7"
line.long 0x34 "PSel,Pin Control 8"
line.long 0x38 "TxDat0,Transmit Data Register 0"
line.long 0x3C "TxDat1,Transmit Data Register 1"
line.long 0x40 "RxBuf,Receive Buffer Register"
line.long 0x44 "Emu,Emulation Register"
line.long 0x48 "Delay,Delay Register"
line.long 0x4C "DefCs,Default Chip select Register"
line.long 0x50 "DatFmt0,Data Format Register 0"
line.long 0x54 "DatFmt1,Data Format Register 1"
line.long 0x58 "DatFmt2,Data Format Register 2"
line.long 0x5C "DatFmt3,Data Format Register 3"
line.long 0x60 "TgIntVec0,Transfer Group Interrupt Vector Register 0"
line.long 0x64 "TgIntVec1,Transfer Group Interrupt Vector Register 1"
line.long 0x68 "SrSel,Pin Control Register 9"
line.long 0x6C "PmCtrl,Parallel/Modulo Mode Control Register"
line.long 0x70 "MibSpiEna,MibSPI Enable Register"
line.long 0x74 "TgIntEnaSet,MibSPI Transfer Group Interrupt Enable Set Register"
line.long 0x78 "TgIntEnaClr,MibSPI Transfer Group Interrupt Enable Clear Register"
line.long 0x7C "TgIntLvlSet,MibSPI Transfer Group Interrupt Level Set Register"
line.long 0x80 "TgIntLvlClr,MibSPI Transfer Group Interrupt Level Clear Register"
line.long 0x84 "TgIntFlg,Transfer Group Interrupt Flag Register"
group.long 0x90++0x8B
line.long 0x0 "TickCnt,Tick Cnt Register"
line.long 0x4 "LTgPend,Last Transfer Group End Pointer"
line.long 0x8 "Tg0Ctrl,MibSPI Transfer Group Control Register 0"
line.long 0xC "Tg1Ctrl,MibSPI Transfer Group Control Register 1"
line.long 0x10 "Tg2Ctrl,MibSPI Transfer Group Control Register 2"
line.long 0x14 "Tg3Ctrl,MibSPI Transfer Group Control Register 3"
line.long 0x18 "Tg4Ctrl,MibSPI Transfer Group Control Register 4"
line.long 0x1C "Tg5Ctrl,MibSPI Transfer Group Control Register 5"
line.long 0x20 "Tg6Ctrl,MibSPI Transfer Group Control Register 6"
line.long 0x24 "Tg7Ctrl,MibSPI Transfer Group Control Register 7"
line.long 0x28 "Tg8Ctrl,MibSPI Transfer Group Control Register 8"
line.long 0x2C "Tg9Ctrl,MibSPI Transfer Group Control Register 9"
line.long 0x30 "Tg10Ctrl,MibSPI Transfer Group Control Register 10"
line.long 0x34 "Tg11Ctrl,MibSPI Transfer Group Control Register 11"
line.long 0x38 "Tg12Ctrl,MibSPI Transfer Group Control Register 12"
line.long 0x3C "Tg13Ctrl,MibSPI Transfer Group Control Register 13"
line.long 0x40 "Tg14Ctrl,MibSPI Transfer Group Control Register 14"
line.long 0x44 "Tg15Ctrl,MibSPI Transfer Group Control Register 15"
line.long 0x48 "Dma0Ctrl,MibSPI Dma Channel Control Register 0"
line.long 0x4C "Dma1Ctrl,MibSPI Dma Channel Control Register 1"
line.long 0x50 "Dma2Ctrl,MibSPI Dma Channel Control Register 2"
line.long 0x54 "Dma3Ctrl,MibSPI Dma Channel Control Register 3"
line.long 0x58 "Dma4Ctrl,MibSPI Dma Channel Control Register 4"
line.long 0x5C "Dma5Ctrl,MibSPI Dma Channel Control Register 5"
line.long 0x60 "Dma6Ctrl,MibSPI Dma Channel Control Register 6"
line.long 0x64 "Dma7Ctrl,MibSPI Dma Channel Control Register 7"
line.long 0x68 "Dma0Cnt,ICnt Register 0"
line.long 0x6C "Dma1Cnt,ICnt Register 1"
line.long 0x70 "Dma2Cnt,ICnt Register 2"
line.long 0x74 "Dma3Cnt,ICnt Register 3"
line.long 0x78 "Dma4Cnt,ICnt Register 4"
line.long 0x7C "Dma5Cnt,ICnt Register 5"
line.long 0x80 "Dma6Cnt,ICnt Register 6"
line.long 0x84 "Dma7Cnt,ICnt Register 7"
line.long 0x88 "DmaCntLen,Dma LARGE Cnt register"
group.long 0x120++0x27
line.long 0x0 "UErrCtrl,Uncorrectable Parity Error Control Register"
line.long 0x4 "UErrStat,Uncorrectable Parity Error Status Register"
line.long 0x8 "UErrAddr1,Uncorrectable Parity Error Address Register"
line.long 0xC "UErrAddr0,Uncorrectable Parity Error Address Register"
line.long 0x10 "RxOvrNBufAddr,Receive RAM Overrun Buffer Address Register"
line.long 0x14 "IoLpbkTstCtrl,IO Loopback Test Control Register"
line.long 0x18 "EXTENDED_PRESCALE1,Extended Prescale Register 1"
line.long 0x1C "EXTENDED_PRESCALE2,Extended Prescale Register 2"
line.long 0x20 "ECCDIAG_CTRL,ECC Control register"
line.long 0x24 "ECCDIAG_STAT,ECC Diagnostic Status register"
group.long 0x1FC++0x3
line.long 0x0 "SPIREV,Revision ID Register"
tree.end
tree "MibSPI3"
base ad:0xFFF7F800
group.long 0x0++0x87
line.long 0x0 "GlbCtrl0,Global control register 0"
line.long 0x4 "GlbCtrl1,Global control register 1"
line.long 0x8 "Int0,Interrupt Register"
line.long 0xC "IntLvl,Interrupt Level Register"
line.long 0x10 "IntFlg,Flag Register"
line.long 0x14 "Fun,Pin Control 0"
line.long 0x18 "Dir,Pin Control 1"
line.long 0x1C "DIn,Pin Control 2"
line.long 0x20 "DOut,Pin Control 3"
line.long 0x24 "DSet,Pin Control 4"
line.long 0x28 "DClr,Pin Control 5"
line.long 0x2C "PDr,Pin Control 6"
line.long 0x30 "PDis,Pin Control 7"
line.long 0x34 "PSel,Pin Control 8"
line.long 0x38 "TxDat0,Transmit Data Register 0"
line.long 0x3C "TxDat1,Transmit Data Register 1"
line.long 0x40 "RxBuf,Receive Buffer Register"
line.long 0x44 "Emu,Emulation Register"
line.long 0x48 "Delay,Delay Register"
line.long 0x4C "DefCs,Default Chip select Register"
line.long 0x50 "DatFmt0,Data Format Register 0"
line.long 0x54 "DatFmt1,Data Format Register 1"
line.long 0x58 "DatFmt2,Data Format Register 2"
line.long 0x5C "DatFmt3,Data Format Register 3"
line.long 0x60 "TgIntVec0,Transfer Group Interrupt Vector Register 0"
line.long 0x64 "TgIntVec1,Transfer Group Interrupt Vector Register 1"
line.long 0x68 "SrSel,Pin Control Register 9"
line.long 0x6C "PmCtrl,Parallel/Modulo Mode Control Register"
line.long 0x70 "MibSpiEna,MibSPI Enable Register"
line.long 0x74 "TgIntEnaSet,MibSPI Transfer Group Interrupt Enable Set Register"
line.long 0x78 "TgIntEnaClr,MibSPI Transfer Group Interrupt Enable Clear Register"
line.long 0x7C "TgIntLvlSet,MibSPI Transfer Group Interrupt Level Set Register"
line.long 0x80 "TgIntLvlClr,MibSPI Transfer Group Interrupt Level Clear Register"
line.long 0x84 "TgIntFlg,Transfer Group Interrupt Flag Register"
group.long 0x90++0x8B
line.long 0x0 "TickCnt,Tick Cnt Register"
line.long 0x4 "LTgPend,Last Transfer Group End Pointer"
line.long 0x8 "Tg0Ctrl,MibSPI Transfer Group Control Register 0"
line.long 0xC "Tg1Ctrl,MibSPI Transfer Group Control Register 1"
line.long 0x10 "Tg2Ctrl,MibSPI Transfer Group Control Register 2"
line.long 0x14 "Tg3Ctrl,MibSPI Transfer Group Control Register 3"
line.long 0x18 "Tg4Ctrl,MibSPI Transfer Group Control Register 4"
line.long 0x1C "Tg5Ctrl,MibSPI Transfer Group Control Register 5"
line.long 0x20 "Tg6Ctrl,MibSPI Transfer Group Control Register 6"
line.long 0x24 "Tg7Ctrl,MibSPI Transfer Group Control Register 7"
line.long 0x28 "Tg8Ctrl,MibSPI Transfer Group Control Register 8"
line.long 0x2C "Tg9Ctrl,MibSPI Transfer Group Control Register 9"
line.long 0x30 "Tg10Ctrl,MibSPI Transfer Group Control Register 10"
line.long 0x34 "Tg11Ctrl,MibSPI Transfer Group Control Register 11"
line.long 0x38 "Tg12Ctrl,MibSPI Transfer Group Control Register 12"
line.long 0x3C "Tg13Ctrl,MibSPI Transfer Group Control Register 13"
line.long 0x40 "Tg14Ctrl,MibSPI Transfer Group Control Register 14"
line.long 0x44 "Tg15Ctrl,MibSPI Transfer Group Control Register 15"
line.long 0x48 "Dma0Ctrl,MibSPI Dma Channel Control Register 0"
line.long 0x4C "Dma1Ctrl,MibSPI Dma Channel Control Register 1"
line.long 0x50 "Dma2Ctrl,MibSPI Dma Channel Control Register 2"
line.long 0x54 "Dma3Ctrl,MibSPI Dma Channel Control Register 3"
line.long 0x58 "Dma4Ctrl,MibSPI Dma Channel Control Register 4"
line.long 0x5C "Dma5Ctrl,MibSPI Dma Channel Control Register 5"
line.long 0x60 "Dma6Ctrl,MibSPI Dma Channel Control Register 6"
line.long 0x64 "Dma7Ctrl,MibSPI Dma Channel Control Register 7"
line.long 0x68 "Dma0Cnt,ICnt Register 0"
line.long 0x6C "Dma1Cnt,ICnt Register 1"
line.long 0x70 "Dma2Cnt,ICnt Register 2"
line.long 0x74 "Dma3Cnt,ICnt Register 3"
line.long 0x78 "Dma4Cnt,ICnt Register 4"
line.long 0x7C "Dma5Cnt,ICnt Register 5"
line.long 0x80 "Dma6Cnt,ICnt Register 6"
line.long 0x84 "Dma7Cnt,ICnt Register 7"
line.long 0x88 "DmaCntLen,Dma LARGE Cnt register"
group.long 0x120++0x27
line.long 0x0 "UErrCtrl,Uncorrectable Parity Error Control Register"
line.long 0x4 "UErrStat,Uncorrectable Parity Error Status Register"
line.long 0x8 "UErrAddr1,Uncorrectable Parity Error Address Register"
line.long 0xC "UErrAddr0,Uncorrectable Parity Error Address Register"
line.long 0x10 "RxOvrNBufAddr,Receive RAM Overrun Buffer Address Register"
line.long 0x14 "IoLpbkTstCtrl,IO Loopback Test Control Register"
line.long 0x18 "EXTENDED_PRESCALE1,Extended Prescale Register 1"
line.long 0x1C "EXTENDED_PRESCALE2,Extended Prescale Register 2"
line.long 0x20 "ECCDIAG_CTRL,ECC Control register"
line.long 0x24 "ECCDIAG_STAT,ECC Diagnostic Status register"
group.long 0x1FC++0x3
line.long 0x0 "SPIREV,Revision ID Register"
tree.end
tree "MibSPI5"
base ad:0xFFF7FC00
group.long 0x0++0x87
line.long 0x0 "GlbCtrl0,Global control register 0"
line.long 0x4 "GlbCtrl1,Global control register 1"
line.long 0x8 "Int0,Interrupt Register"
line.long 0xC "IntLvl,Interrupt Level Register"
line.long 0x10 "IntFlg,Flag Register"
line.long 0x14 "Fun,Pin Control 0"
line.long 0x18 "Dir,Pin Control 1"
line.long 0x1C "DIn,Pin Control 2"
line.long 0x20 "DOut,Pin Control 3"
line.long 0x24 "DSet,Pin Control 4"
line.long 0x28 "DClr,Pin Control 5"
line.long 0x2C "PDr,Pin Control 6"
line.long 0x30 "PDis,Pin Control 7"
line.long 0x34 "PSel,Pin Control 8"
line.long 0x38 "TxDat0,Transmit Data Register 0"
line.long 0x3C "TxDat1,Transmit Data Register 1"
line.long 0x40 "RxBuf,Receive Buffer Register"
line.long 0x44 "Emu,Emulation Register"
line.long 0x48 "Delay,Delay Register"
line.long 0x4C "DefCs,Default Chip select Register"
line.long 0x50 "DatFmt0,Data Format Register 0"
line.long 0x54 "DatFmt1,Data Format Register 1"
line.long 0x58 "DatFmt2,Data Format Register 2"
line.long 0x5C "DatFmt3,Data Format Register 3"
line.long 0x60 "TgIntVec0,Transfer Group Interrupt Vector Register 0"
line.long 0x64 "TgIntVec1,Transfer Group Interrupt Vector Register 1"
line.long 0x68 "SrSel,Pin Control Register 9"
line.long 0x6C "PmCtrl,Parallel/Modulo Mode Control Register"
line.long 0x70 "MibSpiEna,MibSPI Enable Register"
line.long 0x74 "TgIntEnaSet,MibSPI Transfer Group Interrupt Enable Set Register"
line.long 0x78 "TgIntEnaClr,MibSPI Transfer Group Interrupt Enable Clear Register"
line.long 0x7C "TgIntLvlSet,MibSPI Transfer Group Interrupt Level Set Register"
line.long 0x80 "TgIntLvlClr,MibSPI Transfer Group Interrupt Level Clear Register"
line.long 0x84 "TgIntFlg,Transfer Group Interrupt Flag Register"
group.long 0x90++0x8B
line.long 0x0 "TickCnt,Tick Cnt Register"
line.long 0x4 "LTgPend,Last Transfer Group End Pointer"
line.long 0x8 "Tg0Ctrl,MibSPI Transfer Group Control Register 0"
line.long 0xC "Tg1Ctrl,MibSPI Transfer Group Control Register 1"
line.long 0x10 "Tg2Ctrl,MibSPI Transfer Group Control Register 2"
line.long 0x14 "Tg3Ctrl,MibSPI Transfer Group Control Register 3"
line.long 0x18 "Tg4Ctrl,MibSPI Transfer Group Control Register 4"
line.long 0x1C "Tg5Ctrl,MibSPI Transfer Group Control Register 5"
line.long 0x20 "Tg6Ctrl,MibSPI Transfer Group Control Register 6"
line.long 0x24 "Tg7Ctrl,MibSPI Transfer Group Control Register 7"
line.long 0x28 "Tg8Ctrl,MibSPI Transfer Group Control Register 8"
line.long 0x2C "Tg9Ctrl,MibSPI Transfer Group Control Register 9"
line.long 0x30 "Tg10Ctrl,MibSPI Transfer Group Control Register 10"
line.long 0x34 "Tg11Ctrl,MibSPI Transfer Group Control Register 11"
line.long 0x38 "Tg12Ctrl,MibSPI Transfer Group Control Register 12"
line.long 0x3C "Tg13Ctrl,MibSPI Transfer Group Control Register 13"
line.long 0x40 "Tg14Ctrl,MibSPI Transfer Group Control Register 14"
line.long 0x44 "Tg15Ctrl,MibSPI Transfer Group Control Register 15"
line.long 0x48 "Dma0Ctrl,MibSPI Dma Channel Control Register 0"
line.long 0x4C "Dma1Ctrl,MibSPI Dma Channel Control Register 1"
line.long 0x50 "Dma2Ctrl,MibSPI Dma Channel Control Register 2"
line.long 0x54 "Dma3Ctrl,MibSPI Dma Channel Control Register 3"
line.long 0x58 "Dma4Ctrl,MibSPI Dma Channel Control Register 4"
line.long 0x5C "Dma5Ctrl,MibSPI Dma Channel Control Register 5"
line.long 0x60 "Dma6Ctrl,MibSPI Dma Channel Control Register 6"
line.long 0x64 "Dma7Ctrl,MibSPI Dma Channel Control Register 7"
line.long 0x68 "Dma0Cnt,ICnt Register 0"
line.long 0x6C "Dma1Cnt,ICnt Register 1"
line.long 0x70 "Dma2Cnt,ICnt Register 2"
line.long 0x74 "Dma3Cnt,ICnt Register 3"
line.long 0x78 "Dma4Cnt,ICnt Register 4"
line.long 0x7C "Dma5Cnt,ICnt Register 5"
line.long 0x80 "Dma6Cnt,ICnt Register 6"
line.long 0x84 "Dma7Cnt,ICnt Register 7"
line.long 0x88 "DmaCntLen,Dma LARGE Cnt register"
group.long 0x120++0x27
line.long 0x0 "UErrCtrl,Uncorrectable Parity Error Control Register"
line.long 0x4 "UErrStat,Uncorrectable Parity Error Status Register"
line.long 0x8 "UErrAddr1,Uncorrectable Parity Error Address Register"
line.long 0xC "UErrAddr0,Uncorrectable Parity Error Address Register"
line.long 0x10 "RxOvrNBufAddr,Receive RAM Overrun Buffer Address Register"
line.long 0x14 "IoLpbkTstCtrl,IO Loopback Test Control Register"
line.long 0x18 "EXTENDED_PRESCALE1,Extended Prescale Register 1"
line.long 0x1C "EXTENDED_PRESCALE2,Extended Prescale Register 2"
line.long 0x20 "ECCDIAG_CTRL,ECC Control register"
line.long 0x24 "ECCDIAG_STAT,ECC Diagnostic Status register"
group.long 0x1FC++0x3
line.long 0x0 "SPIREV,Revision ID Register"
tree.end
tree.end
tree "NHET (High-End Timer)"
base ad:0x0
tree "NHET1"
base ad:0xFFF7B800
group.long 0x0++0x2B
line.long 0x0 "GlbCtrl,global control register"
line.long 0x4 "Pfr,prescaler factor register"
line.long 0x8 "Addr,Current Address Register"
line.long 0xC "Offst1,Offset Level 1 Register"
line.long 0x10 "Offst2,Offset Level 2 Register"
line.long 0x14 "IntEnaSet,Interrupt Enable Set Register"
line.long 0x18 "IntEnaClr,Interrupt Enable Clear Register"
line.long 0x1C "Exc1,Exception Control Register 1"
line.long 0x20 "Exc2,Exception Control Register 2"
line.long 0x24 "IntPrio,Interrupt Priority Register"
line.long 0x28 "IntFlg,Interrupt Flag Register"
group.long 0x34++0x13
line.long 0x0 "HrSh,HR Share Control Register"
line.long 0x4 "Xor,HR Xor control register"
line.long 0x8 "ReqEnaSet,Request Enable Set Register"
line.long 0xC "ReqEnaClr,Request Enable Clear Register"
line.long 0x10 "ReqDst,Request Destination Select Register"
group.long 0x4C++0x1F
line.long 0x0 "Dir,Direction Register"
line.long 0x4 "DIn,Input Data Register"
line.long 0x8 "DOut,Output Data Register"
line.long 0xC "DSet,Set Data Register"
line.long 0x10 "DClr,Clear Data Register"
line.long 0x14 "PDr,Open Drain Register"
line.long 0x18 "PDis,Pull Disable Register"
line.long 0x1C "PSel,Pull Select Register"
group.long 0x74++0x13
line.long 0x0 "ParCtrl,Parity Control Register"
line.long 0x4 "ParAddr,Parity Address Register"
line.long 0x8 "ParPinReg,Parity Pin Register"
line.long 0xC "SfPrld,Suppresion Filter Preload Register"
line.long 0x10 "SfEna,Suppresion Filter Enable Register"
group.long 0x8C++0xB
line.long 0x0 "LbPairSel,Loop Back Pair Select Register"
line.long 0x4 "LbPairDir,Loop Back Pair Direction Register"
line.long 0x8 "PinDis,Pin Disable Register"
group.long 0xA0++0x43
line.long 0x0 "HWAGCR0,HWAG Control Register 0"
line.long 0x4 "HWAGCR1,HWAG Control Register 1"
line.long 0x8 "HWAGCR2,HWAG Control Register 2"
line.long 0xC "HWAENASET,HWAG Interrupt Enable Set Register"
line.long 0x10 "HWAENACLR,HWAG Interrupt Enable Clear Register"
line.long 0x14 "HWALVLSET,HWAG Interrupt Priority Set Register"
line.long 0x18 "HWALVLCLR,HWAG Interrupt Priority Clear Register"
line.long 0x1C "HWAFLG,HWAG Interrupt Flags Register"
line.long 0x20 "HWAOFF0,HWAG Interrupt Offset Register 1. HWAG Low Priority Interrupt Offset"
line.long 0x24 "HWAOFF1,HWAG Interrupt Offset Register 2. HWAG High Priority Interrupt Offset"
line.long 0x28 "HWAACNT,HWAG ACNT Register. HWAG Angle Value"
line.long 0x2C "HWAPCNT1,HWAG PCNT (n-1) Register. HWAG Previous Tooth Period"
line.long 0x30 "HWAPCNT,HWAG PCNT (n) Register. HWAG Current Tooth Period"
line.long 0x34 "HWASTWD,HWAG Step Register"
line.long 0x38 "HWATHNB,HWAG Teeth Number Register"
line.long 0x3C "HWATHVL,HHWAG Current Teeth Number Register"
line.long 0x40 "HWAFIL,HWAG Filter Register. HWAG Tick Counter Compare Value"
group.long 0xE8++0x3
line.long 0x0 "HWAFIL2,HWAG Filter Register 2. HWAG Tick Counter Compare Value During Singularity Tooth"
group.long 0xF0++0x3
line.long 0x0 "HWAANGI,HWAG Angle Increment Register"
tree.end
tree "NHET2"
base ad:0xFFF7B900
group.long 0x0++0x2B
line.long 0x0 "GlbCtrl,global control register"
line.long 0x4 "Pfr,prescaler factor register"
line.long 0x8 "Addr,Current Address Register"
line.long 0xC "Offst1,Offset Level 1 Register"
line.long 0x10 "Offst2,Offset Level 2 Register"
line.long 0x14 "IntEnaSet,Interrupt Enable Set Register"
line.long 0x18 "IntEnaClr,Interrupt Enable Clear Register"
line.long 0x1C "Exc1,Exception Control Register 1"
line.long 0x20 "Exc2,Exception Control Register 2"
line.long 0x24 "IntPrio,Interrupt Priority Register"
line.long 0x28 "IntFlg,Interrupt Flag Register"
group.long 0x34++0x13
line.long 0x0 "HrSh,HR Share Control Register"
line.long 0x4 "Xor,HR Xor control register"
line.long 0x8 "ReqEnaSet,Request Enable Set Register"
line.long 0xC "ReqEnaClr,Request Enable Clear Register"
line.long 0x10 "ReqDst,Request Destination Select Register"
group.long 0x4C++0x1F
line.long 0x0 "Dir,Direction Register"
line.long 0x4 "DIn,Input Data Register"
line.long 0x8 "DOut,Output Data Register"
line.long 0xC "DSet,Set Data Register"
line.long 0x10 "DClr,Clear Data Register"
line.long 0x14 "PDr,Open Drain Register"
line.long 0x18 "PDis,Pull Disable Register"
line.long 0x1C "PSel,Pull Select Register"
group.long 0x74++0x13
line.long 0x0 "ParCtrl,Parity Control Register"
line.long 0x4 "ParAddr,Parity Address Register"
line.long 0x8 "ParPinReg,Parity Pin Register"
line.long 0xC "SfPrld,Suppresion Filter Preload Register"
line.long 0x10 "SfEna,Suppresion Filter Enable Register"
group.long 0x8C++0xB
line.long 0x0 "LbPairSel,Loop Back Pair Select Register"
line.long 0x4 "LbPairDir,Loop Back Pair Direction Register"
line.long 0x8 "PinDis,Pin Disable Register"
group.long 0xA0++0x43
line.long 0x0 "HWAGCR0,HWAG Control Register 0"
line.long 0x4 "HWAGCR1,HWAG Control Register 1"
line.long 0x8 "HWAGCR2,HWAG Control Register 2"
line.long 0xC "HWAENASET,HWAG Interrupt Enable Set Register"
line.long 0x10 "HWAENACLR,HWAG Interrupt Enable Clear Register"
line.long 0x14 "HWALVLSET,HWAG Interrupt Priority Set Register"
line.long 0x18 "HWALVLCLR,HWAG Interrupt Priority Clear Register"
line.long 0x1C "HWAFLG,HWAG Interrupt Flags Register"
line.long 0x20 "HWAOFF0,HWAG Interrupt Offset Register 1. HWAG Low Priority Interrupt Offset"
line.long 0x24 "HWAOFF1,HWAG Interrupt Offset Register 2. HWAG High Priority Interrupt Offset"
line.long 0x28 "HWAACNT,HWAG ACNT Register. HWAG Angle Value"
line.long 0x2C "HWAPCNT1,HWAG PCNT (n-1) Register. HWAG Previous Tooth Period"
line.long 0x30 "HWAPCNT,HWAG PCNT (n) Register. HWAG Current Tooth Period"
line.long 0x34 "HWASTWD,HWAG Step Register"
line.long 0x38 "HWATHNB,HWAG Teeth Number Register"
line.long 0x3C "HWATHVL,HHWAG Current Teeth Number Register"
line.long 0x40 "HWAFIL,HWAG Filter Register. HWAG Tick Counter Compare Value"
group.long 0xE8++0x3
line.long 0x0 "HWAFIL2,HWAG Filter Register 2. HWAG Tick Counter Compare Value During Singularity Tooth"
group.long 0xF0++0x3
line.long 0x0 "HWAANGI,HWAG Angle Increment Register"
tree.end
tree.end
tree "PBIST (Programmable Built-In Self-Test)"
base ad:0xFFFFE400
group.long 0x100++0x27
line.long 0x0 "VarAddr0,Variable Address Register 0"
line.long 0x4 "VarAddr1,Variable Address Register 1"
line.long 0x8 "VarAddr2,Variable Address Register 2"
line.long 0xC "VarAddr3,Variable Address Register 3"
line.long 0x10 "VarLpCnt0,Variable Loop Count Register 0"
line.long 0x14 "VarLpCnt1,Variable Loop Count Register 1"
line.long 0x18 "VarLpCnt2,Variable Loop Count Register 0"
line.long 0x1C "VarLpCnt3,Variable Loop Count Register 1"
line.long 0x20 "DD0,DD0 Data Register"
line.long 0x24 "DE0,DE0 Data Register"
group.long 0x130++0x3F
line.long 0x0 "ConstAddr0,Constant Address Register 0"
line.long 0x4 "ConstAddr1,Constant Address Register 1"
line.long 0x8 "ConstAddr2,Constant Address Register 2"
line.long 0xC "ConstAddr3,Constant Address Register 3"
line.long 0x10 "ConstLpCnt0,Constant Loop Count Register 0"
line.long 0x14 "ConstLpCnt1,Constant Loop Count Register 1"
line.long 0x18 "ConstLpCnt2,Constant Loop Count Register 2"
line.long 0x1C "ConstLpCnt3,Constant Loop Count Register 3"
line.long 0x20 "ConstInc0,Constant Increment Register 0"
line.long 0x24 "ConstInc1,Constant Increment Register 1"
line.long 0x28 "ConstInc2,Constant Increment Register 2"
line.long 0x2C "ConstInc3,Constant Increment Register 3"
line.long 0x30 "RamT,Ram Configuration"
line.long 0x34 "Dlr,Datalogger"
line.long 0x38 "Cms,ConstLpCntock Mux Select"
line.long 0x3C "Str,ProgRam Control"
group.long 0x178++0x13
line.long 0x0 "Csr,Chip Select"
line.long 0x4 "FDly,Fail Delay"
line.long 0x8 "PAct,PBIST Activate ROM Clock Enable"
line.long 0xC "IdR,PBIST ID"
line.long 0x10 "Over,PBIST Override"
group.long 0x190++0x1B
line.long 0x0 "Fsfr0,Fail Status Fail - Port 0"
line.long 0x4 "Fsfr1,Fail Status Fail - Port 1"
line.long 0x8 "Fsrc0,Fail Status Count - Port 0"
line.long 0xC "Fsrc1,Fail Status Count - Port 1"
line.long 0x10 "Fsra0,Fail Status Address - Port 0"
line.long 0x14 "Fsra1,Fail Status Address - Port 1"
line.long 0x18 "Fsrdl0,Fail Status Data - Port 0"
group.long 0x1B0++0x3
line.long 0x0 "Fsrdl1,Fail Status Data - Port 1"
group.long 0x1C0++0xF
line.long 0x0 "Rom,ROM Mask"
line.long 0x4 "Algo,ROM Algorithm Mask"
line.long 0x8 "RInfoL,Ram Info Mask Lower"
line.long 0xC "RInfoU,Ram Info Mask Upper"
tree.end
tree "PCR (Peripheral Central Resource)"
base ad:0xFFFFE000
group.long 0x0++0x7
line.long 0x0 "PMProtSet0,Set-only register to Protect PCS frames 0 to 31"
line.long 0x4 "PMProtSet1,Set-only register to Protect PCS frames 32 to 64"
group.long 0x10++0x7
line.long 0x0 "PMProtClr0,Clear-only register to Protect PCS frames 0 to 31"
line.long 0x4 "PMProtClr1,Clear-only register to Protect PCS frames 32 to 64"
group.long 0x20++0xF
line.long 0x0 "PProtSet0,Set-only register to Protect the 32 quadrants of PS0 to PS7"
line.long 0x4 "PProtSet1,Set-only register to Protect the 32 quadrants of PS8 to PS15"
line.long 0x8 "PProtSet2,Set-only register to Protect the 32 quadrants of PS16 to PS23"
line.long 0xC "PProtSet3,Set-only register to Protect the 32 quadrants of PS24 to PS31"
group.long 0x40++0xF
line.long 0x0 "PProtClr0,clear-only register to Protect the quadrants of PS0 to PS7"
line.long 0x4 "PProtClr1,clear-only register to Protect the quadrants of PS8 to PS15"
line.long 0x8 "PProtClr2,clear-only register to Protect the quadrants of PS16 to PS23"
line.long 0xC "PProtClr3,clear-only register to Protect the quadrants of PS24 to PS31"
group.long 0x60++0x7
line.long 0x0 "PCSPwrDwnSet0,"
line.long 0x4 "PCSPwrDwnSet1,"
group.long 0x70++0x7
line.long 0x0 "PCSPwrDwnClr0,"
line.long 0x4 "PCSPwrDwnClr1,"
group.long 0x80++0xF
line.long 0x0 "PSPwrDwnSet0,"
line.long 0x4 "PSPwrDwnSet1,"
line.long 0x8 "PSPwrDwnSet2,"
line.long 0xC "PSPwrDwnSet3,"
group.long 0xA0++0xF
line.long 0x0 "PSPwrDwnClr0,"
line.long 0x4 "PSPwrDwnClr1,"
line.long 0x8 "PSPwrDwnClr2,"
line.long 0xC "PSPwrDwnClr3,"
tree.end
tree "PMM (Power Management Module)"
base ad:0xFFFF0000
group.long 0x0++0x17
line.long 0x0 "LogicPDCtrl0,Logic Power Domain Control Register"
line.long 0x4 "LogicPDCtrl1,Logic Power Domain Control Register"
line.long 0x8 "LogicPDCtrl2,Logic Power Domain Control Register"
line.long 0xC "LogicPDCtrl3,Logic Power Domain Control Register"
line.long 0x10 "MemPDCtrl0,Memory Power Domain Control Register"
line.long 0x14 "MemPDCtrl1,Memory Power Domain Control Register"
group.long 0x20++0xB
line.long 0x0 "PDClkDis,Power Domain Clock Disable Register"
line.long 0x4 "PDClkDisSet,Power Domain Clock Disable SET Register"
line.long 0x8 "PDClkDisClr,Power Domain Clock Disable CLEAR Register"
group.long 0x30++0xB
line.long 0x0 "IsoExtend,Isolation Extension Register"
line.long 0x4 "IsoExtendSet,Isolation Extension SET Register"
line.long 0x8 "IsoExtendClr,Isolation Extension CLEAR Register"
group.long 0x40++0x83
line.long 0x0 "LogicPDPwrStat0,Logic Power Domain Power Status"
line.long 0x4 "LogicPDPwrStat1,Logic Power Domain Power Status"
line.long 0x8 "LogicPDPwrStat2,Logic Power Domain Power Status"
line.long 0xC "LogicPDPwrStat3,Logic Power Domain Power Status"
line.long 0x10 "LogicPDPwrStat4,Logic Power Domain Power Status"
line.long 0x14 "LogicPDPwrStat5,Logic Power Domain Power Status"
line.long 0x18 "LogicPDPwrStat6,Logic Power Domain Power Status"
line.long 0x1C "LogicPDPwrStat7,Logic Power Domain Power Status"
line.long 0x20 "LogicPDPwrStat8,Logic Power Domain Power Status"
line.long 0x24 "LogicPDPwrStat9,Logic Power Domain Power Status"
line.long 0x28 "LogicPDPwrStat10,Logic Power Domain Power Status"
line.long 0x2C "LogicPDPwrStat11,Logic Power Domain Power Status"
line.long 0x30 "LogicPDPwrStat12,Logic Power Domain Power Status"
line.long 0x34 "LogicPDPwrStat13,Logic Power Domain Power Status"
line.long 0x38 "LogicPDPwrStat14,Logic Power Domain Power Status"
line.long 0x3C "LogicPDPwrStat15,Logic Power Domain Power Status"
line.long 0x40 "MemPwrStat0,Memory Power Domain Power Status"
line.long 0x44 "MemPwrStat1,Memory Power Domain Power Status"
line.long 0x48 "MemPwrStat2,Memory Power Domain Power Status"
line.long 0x4C "MemPwrStat3,Memory Power Domain Power Status"
line.long 0x50 "MemPwrStat4,Memory Power Domain Power Status"
line.long 0x54 "MemPwrStat5,Memory Power Domain Power Status"
line.long 0x58 "MemPwrStat6,Memory Power Domain Power Status"
line.long 0x5C "MemPwrStat7,Memory Power Domain Power Status"
line.long 0x60 "GlobalCtrl1,Global Control Register1"
line.long 0x64 "GlobalCtrl2,Global Control Register2"
line.long 0x68 "GlobalStatus,Global Status Register"
line.long 0x6C "PsconDiagCompKey,PSCON Diagnostic Compare Key Register"
line.long 0x70 "PsconDiagCompStat1,LogicPD PSCON Diagnostic Compare Status Register1"
line.long 0x74 "PsconDiagCompStat2,LogicPD PSCON Diagnostic Compare Status Register2"
line.long 0x78 "MPDDiaCompStat1,Memory PD PSCON Diagnostic Compare Status Register1"
line.long 0x7C "MPDDiaCompStat2,Memory PD PSCON Diagnostic Compare Status Register2"
line.long 0x80 "IsoDiaStat,Isolation Diagnostic Status"
tree.end
tree "POM"
base ad:0xFFA04000
group.long 0x0++0xF
line.long 0x0 "GlbCtrl,Global Control Register"
line.long 0x4 "Rev,Revision Id"
line.long 0x8 "ClkCtrl,Clock Gate Control Register"
line.long 0xC "Flg,POM Flag Register"
group.long 0x200++0xB
line.long 0x0 "ProgStart0,Program Region Start Address Register 0"
line.long 0x4 "OvlStart0,Overlay Region Start Address Register 0"
line.long 0x8 "RegSize0,Region Size Register 0"
group.long 0x210++0xB
line.long 0x0 "ProgStart1,Program Region Start Address Register 1"
line.long 0x4 "OvlStart1,Overlay Region Start Address Register 1"
line.long 0x8 "RegSize1,Region Size Register 1"
group.long 0x220++0xB
line.long 0x0 "ProgStart2,Program Region Start Address Register 2"
line.long 0x4 "OvlStart2,Overlay Region Start Address Register 2"
line.long 0x8 "RegSize2,Region Size Register 2"
group.long 0x230++0xB
line.long 0x0 "ProgStart3,Program Region Start Address Register 3"
line.long 0x4 "OvlStart3,Overlay Region Start Address Register 3"
line.long 0x8 "RegSize3,Region Size Register 3"
group.long 0x240++0xB
line.long 0x0 "ProgStart4,Program Region Start Address Register 4"
line.long 0x4 "OvlStart4,Overlay Region Start Address Register 4"
line.long 0x8 "RegSize4,Region Size Register 4"
group.long 0x250++0xB
line.long 0x0 "ProgStart5,Program Region Start Address Register 5"
line.long 0x4 "OvlStart5,Overlay Region Start Address Register 5"
line.long 0x8 "RegSize5,Region Size Register 5"
group.long 0x260++0xB
line.long 0x0 "ProgStart6,Program Region Start Address Register 6"
line.long 0x4 "OvlStart6,Overlay Region Start Address Register 6"
line.long 0x8 "RegSize6,Region Size Register 6"
group.long 0x270++0xB
line.long 0x0 "ProgStart7,Program Region Start Address Register 7"
line.long 0x4 "OvlStart7,Overlay Region Start Address Register 7"
line.long 0x8 "RegSize7,Region Size Register 7"
group.long 0x280++0xB
line.long 0x0 "ProgStart8,Program Region Start Address Register 8"
line.long 0x4 "OvlStart8,Overlay Region Start Address Register 8"
line.long 0x8 "RegSize8,Region Size Register 8"
group.long 0x290++0xB
line.long 0x0 "ProgStart9,Program Region Start Address Register 9"
line.long 0x4 "OvlStart9,Overlay Region Start Address Register 9"
line.long 0x8 "RegSize9,Region Size Register 9"
group.long 0x2A0++0xB
line.long 0x0 "ProgStart10,Program Region Start Address Register 10"
line.long 0x4 "OvlStart10,Overlay Region Start Address Register 10"
line.long 0x8 "RegSize10,Region Size Register 10"
group.long 0x2B0++0xB
line.long 0x0 "ProgStart11,Program Region Start Address Register 11"
line.long 0x4 "OvlStart11,Overlay Region Start Address Register 11"
line.long 0x8 "RegSize11,Region Size Register 11"
group.long 0x2C0++0xB
line.long 0x0 "ProgStart12,Program Region Start Address Register 12"
line.long 0x4 "OvlStart12,Overlay Region Start Address Register 12"
line.long 0x8 "RegSize12,Region Size Register 12"
group.long 0x2D0++0xB
line.long 0x0 "ProgStart13,Program Region Start Address Register 13"
line.long 0x4 "OvlStart13,Overlay Region Start Address Register 13"
line.long 0x8 "RegSize13,Region Size Register 13"
group.long 0x2E0++0xB
line.long 0x0 "ProgStart14,Program Region Start Address Register 14"
line.long 0x4 "OvlStart14,Overlay Region Start Address Register 14"
line.long 0x8 "RegSize14,Region Size Register 14"
group.long 0x2F0++0xB
line.long 0x0 "ProgStart15,Program Region Start Address Register 15"
line.long 0x4 "OvlStart15,Overlay Region Start Address Register 15"
line.long 0x8 "RegSize15,Region Size Register 15"
group.long 0x300++0xB
line.long 0x0 "ProgStart16,Program Region Start Address Register 16"
line.long 0x4 "OvlStart16,Overlay Region Start Address Register 16"
line.long 0x8 "RegSize16,Region Size Register 16"
group.long 0x310++0xB
line.long 0x0 "ProgStart17,Program Region Start Address Register 17"
line.long 0x4 "OvlStart17,Overlay Region Start Address Register 17"
line.long 0x8 "RegSize17,Region Size Register 17"
group.long 0x320++0xB
line.long 0x0 "ProgStart18,Program Region Start Address Register 18"
line.long 0x4 "OvlStart18,Overlay Region Start Address Register 18"
line.long 0x8 "RegSize18,Region Size Register 18"
group.long 0x330++0xB
line.long 0x0 "ProgStart19,Program Region Start Address Register 19"
line.long 0x4 "OvlStart19,Overlay Region Start Address Register 19"
line.long 0x8 "RegSize19,Region Size Register 19"
group.long 0x340++0xB
line.long 0x0 "ProgStart20,Program Region Start Address Register 20"
line.long 0x4 "OvlStart20,Overlay Region Start Address Register 20"
line.long 0x8 "RegSize20,Region Size Register 20"
group.long 0x350++0xB
line.long 0x0 "ProgStart21,Program Region Start Address Register 21"
line.long 0x4 "OvlStart21,Overlay Region Start Address Register 21"
line.long 0x8 "RegSize21,Region Size Register 21"
group.long 0x360++0xB
line.long 0x0 "ProgStart22,Program Region Start Address Register 22"
line.long 0x4 "OvlStart22,Overlay Region Start Address Register 22"
line.long 0x8 "RegSize22,Region Size Register 22"
group.long 0x370++0xB
line.long 0x0 "ProgStart23,Program Region Start Address Register 23"
line.long 0x4 "OvlStart23,Overlay Region Start Address Register 23"
line.long 0x8 "RegSize23,Region Size Register 23"
group.long 0x380++0xB
line.long 0x0 "ProgStart24,Program Region Start Address Register 24"
line.long 0x4 "OvlStart24,Overlay Region Start Address Register 24"
line.long 0x8 "RegSize24,Region Size Register 24"
group.long 0x390++0xB
line.long 0x0 "ProgStart25,Program Region Start Address Register 25"
line.long 0x4 "OvlStart25,Overlay Region Start Address Register 25"
line.long 0x8 "RegSize25,Region Size Register 25"
group.long 0x3A0++0xB
line.long 0x0 "ProgStart26,Program Region Start Address Register 26"
line.long 0x4 "OvlStart26,Overlay Region Start Address Register 26"
line.long 0x8 "RegSize26,Region Size Register 26"
group.long 0x3B0++0xB
line.long 0x0 "ProgStart27,Program Region Start Address Register 27"
line.long 0x4 "OvlStart27,Overlay Region Start Address Register 27"
line.long 0x8 "RegSize27,Region Size Register 27"
group.long 0x3C0++0xB
line.long 0x0 "ProgStart28,Program Region Start Address Register 28"
line.long 0x4 "OvlStart28,Overlay Region Start Address Register 28"
line.long 0x8 "RegSize28,Region Size Register 28"
group.long 0x3D0++0xB
line.long 0x0 "ProgStart29,Program Region Start Address Register 29"
line.long 0x4 "OvlStart29,Overlay Region Start Address Register 29"
line.long 0x8 "RegSize29,Region Size Register 29"
group.long 0x3E0++0xB
line.long 0x0 "ProgStart30,Program Region Start Address Register 30"
line.long 0x4 "OvlStart30,Overlay Region Start Address Register 30"
line.long 0x8 "RegSize30,Region Size Register 30"
group.long 0x3F0++0xB
line.long 0x0 "ProgStart31,Program Region Start Address Register 31"
line.long 0x4 "OvlStart31,Overlay Region Start Address Register 31"
line.long 0x8 "RegSize31,Region Size Register 31"
group.long 0xF00++0x3
line.long 0x0 "ItCtrl,Integration Control Register"
group.long 0xFA0++0x7
line.long 0x0 "ClaimSet,Claim Set Register"
line.long 0x4 "ClaimClr,Claim Clear Register"
group.long 0xFB0++0xB
line.long 0x0 "LockAccess,Lock Access Register"
line.long 0x4 "LockStatus,Lock Status Register"
line.long 0x8 "AuthStatus,Authentication Status Register"
group.long 0xFC8++0x37
line.long 0x0 "DevId,Device Id Register"
line.long 0x4 "DevType,Device Type Register"
line.long 0x8 "PeripheralId4,Peripheral Id 4 Register"
line.long 0xC "PeripheralId5,Peripheral Id 5 Register"
line.long 0x10 "PeripheralId6,Peripheral Id 6 Register"
line.long 0x14 "PeripheralId7,Peripheral Id 7 Register"
line.long 0x18 "PeripheralId0,Peripheral Id 0 Register"
line.long 0x1C "PeripheralId1,Peripheral Id 1 Register"
line.long 0x20 "PeripheralId2,Peripheral Id 2 Register"
line.long 0x24 "PeripheralId3,Peripheral Id 3 Register"
line.long 0x28 "ComponentId0,Component Id 0 Register"
line.long 0x2C "ComponentId1,Component Id 1 Register"
line.long 0x30 "ComponentId2,Component Id 2 Register"
line.long 0x34 "ComponentId3,Component Id 3 Register"
tree.end
tree "RTI (Real-Time Interrupt)"
base ad:0xFFFFFC00
group.long 0x0++0x1B
line.long 0x0 "RTIGCTRL,RTI Global Control Register"
hexmask.long.word 0x0 20.--31. 1. "Rsv1,Reserved"
hexmask.long.byte 0x0 16.--19. 1. "NTUSEL,Select NTU Timebase: 0x0=NTU0 0x5=NTU1 0xA=NTU2 0xF=NTU3 Others=Disabled"
newline
bitfld.long 0x0 15. "COS,1 = Counters Run while CPU Is Halted in Debug Mode" "?,1: Counters Run while CPU Is Halted in Debug Mode"
hexmask.long.word 0x0 2.--14. 1. "Rsv2,Reserved"
newline
bitfld.long 0x0 1. "CNT1EN,1 = Counter Block 1 is Running" "?,1: Counter Block 1 is Running"
bitfld.long 0x0 0. "CNT0EN,1 = Counter Block 0 is Running" "?,1: Counter Block 0 is Running"
line.long 0x4 "RTITBCTRL,RTI Timebase Control Register"
hexmask.long 0x4 2.--31. 1. "Rsv1,Reserved"
bitfld.long 0x4 1. "INC,1 = RTIFRC0 will be incremented on a failing external clock." "?,1: RTIFRC0 will be incremented on a failing.."
newline
bitfld.long 0x4 0. "TBEXT,Select Clock for RTIFRC0 0=RTIUC0 1=NTU" "0: RTIUC0,1: NTU"
line.long 0x8 "RTICAPCTRL,RTI Capture Control Register"
hexmask.long 0x8 2.--31. 1. "Rsv1,Reserved"
bitfld.long 0x8 1. "CAPCNTR1,Capture of RTIUC1/ RTIFRC1 is triggered by capture event 0=source 0 1=source 1" "0: source 0,1: source 1"
newline
bitfld.long 0x8 0. "CAPCNTR0,Capture of RTIUC0/ RTIFRC0 is triggered by capture event 0=source 0 1=source 1" "0: source 0,1: source 1"
line.long 0xC "RTICOMPCTRL,RTI Compare Control Register"
hexmask.long.tbyte 0xC 13.--31. 1. "Rsv1,Reserved"
bitfld.long 0xC 12. "COMPSEL3,RTICOMP3 Compared against 0=RTIFRC0 1=RTIFRC1" "0: RTIFRC0,1: RTIFRC1"
newline
rbitfld.long 0xC 9.--11. "Rsv2,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 8. "COMPSEL2,RTICOMP2 Compared against 0=RTIFRC0 1=RTIFRC1" "0: RTIFRC0,1: RTIFRC1"
newline
rbitfld.long 0xC 5.--7. "Rsv3,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 4. "COMPSEL1,RTICOMP1 Compared against 0=RTIFRC0 1=RTIFRC1" "0: RTIFRC0,1: RTIFRC1"
newline
rbitfld.long 0xC 1.--3. "Rsv4,Reserved" "0,1,2,3,4,5,6,7"
bitfld.long 0xC 0. "COMPSEL0,RTICOMP0 Compared against 0=RTIFRC0 1=RTIFRC1" "0: RTIFRC0,1: RTIFRC1"
line.long 0x10 "RTIFRC0,RTI Free Running Counter 0 Register"
hexmask.long 0x10 0.--31. 1. "FRC0,Free Running Counter 0"
line.long 0x14 "RTIUC0,RTI Up Counter 0 Register"
hexmask.long 0x14 0.--31. 1. "UC0,Up Counter 0"
line.long 0x18 "RTICPUC0,RTI Compare Up Counter 0 Register"
hexmask.long 0x18 0.--31. 1. "CPUC0,Compare up counter 0."
rgroup.long 0x20++0x7
line.long 0x0 "RTICAFRC0,RTI Capture Free Running Counter 0 Register"
hexmask.long 0x0 0.--31. 1. "CAFRC0,Capture free running counter 0."
line.long 0x4 "RTICAUC0,RTI Capture Up Counter 0 Register"
hexmask.long 0x4 0.--31. 1. "CAUC0,Capture up counter 0."
group.long 0x30++0xB
line.long 0x0 "RTIFRC1,RTI Free Running Counter 1 Register"
hexmask.long 0x0 0.--31. 1. "FRC1,Free Running Counter 1"
line.long 0x4 "RTIUC1,RTI Up Counter 1 Register"
hexmask.long 0x4 0.--31. 1. "UC1,Up Counter 1"
line.long 0x8 "RTICPUC1,RTI Compare Up Counter 1 Register"
hexmask.long 0x8 0.--31. 1. "CPUC1,Compare up counter 1."
rgroup.long 0x40++0x7
line.long 0x0 "RTICAFRC1,RTI Capture Free Running Counter 1 Register"
hexmask.long 0x0 0.--31. 1. "CAFRC1,Capture free running counter 1."
line.long 0x4 "RTICAUC1,RTI Capture Up Counter 1 Register"
hexmask.long 0x4 0.--31. 1. "CAUC1,Capture up counter 1."
group.long 0x50++0x27
line.long 0x0 "RTICOMP0,RTI Compare 0 Register"
hexmask.long 0x0 0.--31. 1. "COMP0,Compare 0."
line.long 0x4 "RTIUDCP0,RTI Update Compare 0 Register"
hexmask.long 0x4 0.--31. 1. "UDCP0,Update Compare 0."
line.long 0x8 "RTICOMP1,RTI Compare 1 Register"
hexmask.long 0x8 0.--31. 1. "COMP1,Compare 1."
line.long 0xC "RTIUDCP1,RTI Update Compare 1 Register"
hexmask.long 0xC 0.--31. 1. "UDCP1,Update Compare 1."
line.long 0x10 "RTICOMP2,RTI Compare 2 Register"
hexmask.long 0x10 0.--31. 1. "COMP2,Compare 2."
line.long 0x14 "RTIUDCP2,RTI Update Compare 2 Register"
hexmask.long 0x14 0.--31. 1. "UDCP2,Update Compare 2."
line.long 0x18 "RTICOMP3,RTI Compare 3 Register"
hexmask.long 0x18 0.--31. 1. "COMP3,Compare 3."
line.long 0x1C "RTIUDCP3,RTI Update Compare 2 Register"
hexmask.long 0x1C 0.--31. 1. "UDCP3,Update Compare 3."
line.long 0x20 "RTITBLCOMP,RTI Timebase Low Compare Register"
hexmask.long 0x20 0.--31. 1. "TBLCOMP,Timebase low compare value. Determines when edge detection circuit begins monitoring NTU Compared against RTIUC0."
line.long 0x24 "RTITBHCOMP,RTI Timebase High Compare Register"
hexmask.long 0x24 0.--31. 1. "TBHCOMP,Timebase high compare value. Determines when edge detection circuit stops monitoring NTU Compared against RTIUC0."
group.long 0x80++0xB
line.long 0x0 "RTISETINTENA,RTI Set Interrupt Register"
hexmask.long.word 0x0 19.--31. 1. "Rsv1,Reserved"
bitfld.long 0x0 18. "SETOVL1INT,Set RTIFRC1 Overflow Interrupt Enable W12S" "0,1"
newline
bitfld.long 0x0 17. "SETOVL0INT,Set RTIFRC0 Overflow Interrupt Enable W12S" "0,1"
bitfld.long 0x0 16. "SETTBINT,Set Timebase Interrupt Enable W12S" "0,1"
newline
hexmask.long.byte 0x0 12.--15. 1. "Rsv2,Reserved"
bitfld.long 0x0 11. "SETDMA3,Set Compare DMA Request 3 Enable W12S" "0,1"
newline
bitfld.long 0x0 11. "SETINT3,Set Compare Interrupt Request 3 Enable W12S" "0,1"
bitfld.long 0x0 10. "SETDMA2,Set Compare DMA Request 2 Enable W12S" "0,1"
newline
bitfld.long 0x0 10. "SETINT2,Set Compare Interrupt Request 2 Enable W12S" "0,1"
bitfld.long 0x0 9. "SETDMA1,Set Compare DMA Request 1 Enable W12S" "0,1"
newline
bitfld.long 0x0 9. "SETINT1,Set Compare Interrupt Request 1 Enable W12S" "0,1"
bitfld.long 0x0 8. "SETDMA0,Set Compare DMA Request 0 Enable W12S" "0,1"
newline
bitfld.long 0x0 8. "SETINT0,Set Compare Interrupt Request 0 Enable W12S" "0,1"
hexmask.long.byte 0x0 4.--7. 1. "Rsv3,Reserved"
line.long 0x4 "RTICLEARINTENA,RTI Clear Interrupt Enable Register"
hexmask.long.word 0x4 19.--31. 1. "Rsv1,Reserved"
bitfld.long 0x4 18. "CLEAROVL1INT,CLEAR RTIFRC1 Overflow Interrupt Enable W12C" "0,1"
newline
bitfld.long 0x4 17. "CLEAROVL0INT,CLEAR RTIFRC0 Overflow Interrupt Enable W12C" "0,1"
bitfld.long 0x4 16. "CLEARTBINT,CLEAR Timebase Interrupt Enable W12C" "0,1"
newline
hexmask.long.byte 0x4 12.--15. 1. "Rsv2,Reserved"
bitfld.long 0x4 11. "CLEARDMA3,CLEAR Compare DMA Request 3 Enable W12C" "0,1"
newline
bitfld.long 0x4 11. "CLEARINT3,CLEAR Compare Interrupt Request 3 Enable W12C" "0,1"
bitfld.long 0x4 10. "CLEARDMA2,CLEAR Compare DMA Request 2 Enable W12C" "0,1"
newline
bitfld.long 0x4 10. "CLEARINT2,CLEAR Compare Interrupt Request 2 Enable W12C" "0,1"
bitfld.long 0x4 9. "CLEARDMA1,CLEAR Compare DMA Request 1 Enable W12C" "0,1"
newline
bitfld.long 0x4 9. "CLEARINT1,CLEAR Compare Interrupt Request 1 Enable W12C" "0,1"
bitfld.long 0x4 8. "CLEARDMA0,CLEAR Compare DMA Request 0 Enable W12C" "0,1"
newline
bitfld.long 0x4 8. "CLEARINT0,CLEAR Compare Interrupt Request 0 Enable W12C" "0,1"
hexmask.long.byte 0x4 4.--7. 1. "Rsv3,Reserved"
line.long 0x8 "RTIINTFLAG,RTI Interrupt Flag Register"
hexmask.long.word 0x8 19.--31. 1. "Rsv1,Reserved"
bitfld.long 0x8 18. "OVL1INT,RTIFRC1 Overflow Interrupt Flag W12C" "0,1"
newline
bitfld.long 0x8 17. "OVL0INT,RTIFRC0 Overflow Interrupt Flag W12C" "0,1"
bitfld.long 0x8 16. "TBINT,Timebase Interrupt Flag W12C" "0,1"
newline
hexmask.long.word 0x8 4.--15. 1. "Rsv2,Reserved"
bitfld.long 0x8 3. "INT3,Compare Interrupt Flag 3 W12C" "0,1"
newline
bitfld.long 0x8 2. "INT2,Compare Interrupt Flag 2 W12C" "0,1"
bitfld.long 0x8 1. "INT1,Compare Interrupt Flag 1 W12C" "0,1"
newline
bitfld.long 0x8 0. "INT0,Compare Interrupt Flag 0 W12C" "0,1"
group.long 0x90++0xF
line.long 0x0 "RTIDWDCTRL,Digital Watchdog Control Register"
hexmask.long 0x0 0.--31. 1. "DWDCTRL,0x5312ACED = Disabled 0xA98559DA = Enabled Others - Unchanged."
line.long 0x4 "RTIDWDPRLD,Digital Watchdog Preload Register"
hexmask.long.tbyte 0x4 12.--31. 1. "Rsv1,Reserved"
hexmask.long.word 0x4 0.--11. 1. "DWDPRLD,Preload: texp = (DWDPRLD+1) x 2 13 / RTICLK1"
line.long 0x8 "RTIWDSTATUS,Watchdog Status Register"
hexmask.long 0x8 6.--31. 1. "Rsv1,Reserved"
bitfld.long 0x8 5. "DWWD_ST,Windowed Watchdog Status 1=Time Window Violation W12C" "?,1: Time Window Violation"
newline
bitfld.long 0x8 4. "END_TIME_VIOL,Windowed Watchdog Status 1=End Time Window Violation W12C" "?,1: End Time Window Violation"
bitfld.long 0x8 3. "START_TIME_VIOL,Windowed Watchdog Status 1=Starr Time Window Violation W12C" "?,1: Starr Time Window Violation"
newline
bitfld.long 0x8 2. "KEY_ST,Windowed Watchdog Status 1=Wrong Key Violation W12C W12C" "?,1: Wrong Key Violation"
bitfld.long 0x8 1. "DWD_ST,Same as END_TIME_VIOL W12C" "0,1"
newline
bitfld.long 0x8 0. "Rsv2,Reserved" "0,1"
line.long 0xC "RTIWDKEY,RTI Watchdog Key Register"
hexmask.long.word 0xC 16.--31. 1. "Rsv1,Reserved"
hexmask.long.word 0xC 0.--15. 1. "WDKEY,Key Sequence: Write 0xE51A followed by 0xA35C to Reset DWD"
rgroup.long 0xA0++0x7
line.long 0x0 "RTIDWDCNTR,RTI Digital Watchdog Down Counter"
hexmask.long.byte 0x0 25.--31. 1. "Rsv1,Reserved"
hexmask.long 0x0 0.--24. 1. "DWDCNTR,DWD down counter"
line.long 0x4 "RTIWWDRXNCTRL,Digital Windowed Watchdog Reaction Control"
hexmask.long 0x4 4.--31. 1. "Rsv1,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "WWDRXN,DWD reaction: 0xA -> NMI 0x5 others->Reset"
group.long 0xA8++0x17
line.long 0x0 "RTIWWDSIZECTRL,Digital Windowed Watchdog Window Size Control"
hexmask.long 0x0 0.--31. 1. "WWDSIZE,DWWD Window Size 0x5=100% 0x50=50% 0x500=25% 0x5000=12.5% 0x50000=6.25% Others =3.125%"
line.long 0x4 "RTIINTCLRENABLE,RTI Compare Interrupt Clear Enable Register"
hexmask.long.byte 0x4 28.--31. 1. "Rsv1,Reserved"
hexmask.long.byte 0x4 24.--27. 1. "INTCLRENABLE3,0x5 = Auto-Clear for RTICOMP3 Interrupt Disabled Others=Enabled"
newline
hexmask.long.byte 0x4 20.--23. 1. "Rsv2,Reserved"
hexmask.long.byte 0x4 16.--19. 1. "INTCLRENABLE2,0x5 = Auto-Clear for RTICOMP2 Interrupt Disabled Others=Enabled"
newline
hexmask.long.byte 0x4 12.--15. 1. "Rsv3,Reserved"
hexmask.long.byte 0x4 8.--11. 1. "INTCLRENABLE1,0x5 = Auto-Clear for RTICOMP1 Interrupt Disabled Others=Enabled"
newline
hexmask.long.byte 0x4 4.--7. 1. "Rsv4,Reserved"
hexmask.long.byte 0x4 0.--3. 1. "INTCLRENABLE0,0x5 = Auto-Clear for RTICOMP0 Interrupt Disabled Others=Enabled"
line.long 0x8 "RTICOMP0CLR,RTI Compare 0 Clear Register"
hexmask.long 0x8 0.--31. 1. "CMP0CLR,Compare 0 clear. Interrupt Flag Cleared on Compare Match"
line.long 0xC "RTICOMP1CLR,RTI Compare 1 Clear Register"
hexmask.long 0xC 0.--31. 1. "CMP1CLR,Compare 1 clear. Interrupt Flag Cleared on Compare Match"
line.long 0x10 "RTICOMP2CLR,RTI Compare 2 Clear Register"
hexmask.long 0x10 0.--31. 1. "CMP2CLR,Compare 2 clear. Interrupt Flag Cleared on Compare Match"
line.long 0x14 "RTICOMP3CLR,RTI Compare 3 Clear Register"
hexmask.long 0x14 0.--31. 1. "CMP3CLR,Compare 3 clear. Interrupt Flag Cleared on Compare Match"
tree.end
tree "RWE (RAM Wrapper Even)"
base ad:0xFFFFF800
group.long 0x0++0x17
line.long 0x0 "Ctrl,Ram Control Register 1"
line.long 0x4 "Threshold,Threshold Register"
line.long 0x8 "Occur,Occurrence Register"
line.long 0xC "IntCtrl,Interrupt Control Register"
line.long 0x10 "ErrStatus,Memory Fault Detect Status Register"
line.long 0x14 "SErrAddr,Single Error Address Register"
group.long 0x1C++0x3
line.long 0x0 "UErrAddr,Uncorrectable Error Address Register"
group.long 0x30++0x3
line.long 0x0 "RamTest,RAMTEST Register"
group.long 0x38++0x13
line.long 0x0 "RamAddrDec,RAM Address Decode TEST Register"
line.long 0x4 "RamPErrAddr,Address Parity Error Address Register"
line.long 0x8 "InitDomain,Init Domain Bitmapped Space Register"
line.long 0xC "BankDomainMap0,The Lower Half of the Bank_Domain_Mapping"
line.long 0x10 "BankDomainMap1,The Upper Half of the Bank_Domain_Mapping"
tree.end
tree "RWO (RAM Wrapper Odd)"
base ad:0xFFFFF900
group.long 0x0++0x17
line.long 0x0 "Ctrl,Ram Control Register 1"
line.long 0x4 "Threshold,Threshold Register"
line.long 0x8 "Occur,Occurrence Register"
line.long 0xC "IntCtrl,Interrupt Control Register"
line.long 0x10 "ErrStatus,Memory Fault Detect Status Register"
line.long 0x14 "SErrAddr,Single Error Address Register"
group.long 0x1C++0x3
line.long 0x0 "UErrAddr,Uncorrectable Error Address Register"
group.long 0x30++0x3
line.long 0x0 "RamTest,RAMTEST Register"
group.long 0x38++0x13
line.long 0x0 "RamAddrDec,RAM Address Decode TEST Register"
line.long 0x4 "RamPErrAddr,Address Parity Error Address Register"
line.long 0x8 "InitDomain,Init Domain Bitmapped Space Register"
line.long 0xC "BankDomainMap0,The Lower Half of the Bank_Domain_Mapping"
line.long 0x10 "BankDomainMap1,The Upper Half of the Bank_Domain_Mapping"
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x0
tree "SPI2"
base ad:0xFFF7F600
group.long 0x0++0x87
line.long 0x0 "GlbCtrl0,Global control register 0"
line.long 0x4 "GlbCtrl1,Global control register 1"
line.long 0x8 "Int0,Interrupt Register"
line.long 0xC "IntLvl,Interrupt Level Register"
line.long 0x10 "IntFlg,Flag Register"
line.long 0x14 "Fun,Pin Control 0"
line.long 0x18 "Dir,Pin Control 1"
line.long 0x1C "DIn,Pin Control 2"
line.long 0x20 "DOut,Pin Control 3"
line.long 0x24 "DSet,Pin Control 4"
line.long 0x28 "DClr,Pin Control 5"
line.long 0x2C "PDr,Pin Control 6"
line.long 0x30 "PDis,Pin Control 7"
line.long 0x34 "PSel,Pin Control 8"
line.long 0x38 "TxDat0,Transmit Data Register 0"
line.long 0x3C "TxDat1,Transmit Data Register 1"
line.long 0x40 "RxBuf,Receive Buffer Register"
line.long 0x44 "Emu,Emulation Register"
line.long 0x48 "Delay,Delay Register"
line.long 0x4C "DefCs,Default Chip select Register"
line.long 0x50 "DatFmt0,Data Format Register 0"
line.long 0x54 "DatFmt1,Data Format Register 1"
line.long 0x58 "DatFmt2,Data Format Register 2"
line.long 0x5C "DatFmt3,Data Format Register 3"
line.long 0x60 "TgIntVec0,Transfer Group Interrupt Vector Register 0"
line.long 0x64 "TgIntVec1,Transfer Group Interrupt Vector Register 1"
line.long 0x68 "SrSel,Pin Control Register 9"
line.long 0x6C "PmCtrl,Parallel/Modulo Mode Control Register"
line.long 0x70 "MibSpiEna,MibSPI Enable Register"
line.long 0x74 "TgIntEnaSet,MibSPI Transfer Group Interrupt Enable Set Register"
line.long 0x78 "TgIntEnaClr,MibSPI Transfer Group Interrupt Enable Clear Register"
line.long 0x7C "TgIntLvlSet,MibSPI Transfer Group Interrupt Level Set Register"
line.long 0x80 "TgIntLvlClr,MibSPI Transfer Group Interrupt Level Clear Register"
line.long 0x84 "TgIntFlg,Transfer Group Interrupt Flag Register"
group.long 0x90++0x8B
line.long 0x0 "TickCnt,Tick Cnt Register"
line.long 0x4 "LTgPend,Last Transfer Group End Pointer"
line.long 0x8 "Tg0Ctrl,MibSPI Transfer Group Control Register 0"
line.long 0xC "Tg1Ctrl,MibSPI Transfer Group Control Register 1"
line.long 0x10 "Tg2Ctrl,MibSPI Transfer Group Control Register 2"
line.long 0x14 "Tg3Ctrl,MibSPI Transfer Group Control Register 3"
line.long 0x18 "Tg4Ctrl,MibSPI Transfer Group Control Register 4"
line.long 0x1C "Tg5Ctrl,MibSPI Transfer Group Control Register 5"
line.long 0x20 "Tg6Ctrl,MibSPI Transfer Group Control Register 6"
line.long 0x24 "Tg7Ctrl,MibSPI Transfer Group Control Register 7"
line.long 0x28 "Tg8Ctrl,MibSPI Transfer Group Control Register 8"
line.long 0x2C "Tg9Ctrl,MibSPI Transfer Group Control Register 9"
line.long 0x30 "Tg10Ctrl,MibSPI Transfer Group Control Register 10"
line.long 0x34 "Tg11Ctrl,MibSPI Transfer Group Control Register 11"
line.long 0x38 "Tg12Ctrl,MibSPI Transfer Group Control Register 12"
line.long 0x3C "Tg13Ctrl,MibSPI Transfer Group Control Register 13"
line.long 0x40 "Tg14Ctrl,MibSPI Transfer Group Control Register 14"
line.long 0x44 "Tg15Ctrl,MibSPI Transfer Group Control Register 15"
line.long 0x48 "Dma0Ctrl,MibSPI Dma Channel Control Register 0"
line.long 0x4C "Dma1Ctrl,MibSPI Dma Channel Control Register 1"
line.long 0x50 "Dma2Ctrl,MibSPI Dma Channel Control Register 2"
line.long 0x54 "Dma3Ctrl,MibSPI Dma Channel Control Register 3"
line.long 0x58 "Dma4Ctrl,MibSPI Dma Channel Control Register 4"
line.long 0x5C "Dma5Ctrl,MibSPI Dma Channel Control Register 5"
line.long 0x60 "Dma6Ctrl,MibSPI Dma Channel Control Register 6"
line.long 0x64 "Dma7Ctrl,MibSPI Dma Channel Control Register 7"
line.long 0x68 "Dma0Cnt,ICnt Register 0"
line.long 0x6C "Dma1Cnt,ICnt Register 1"
line.long 0x70 "Dma2Cnt,ICnt Register 2"
line.long 0x74 "Dma3Cnt,ICnt Register 3"
line.long 0x78 "Dma4Cnt,ICnt Register 4"
line.long 0x7C "Dma5Cnt,ICnt Register 5"
line.long 0x80 "Dma6Cnt,ICnt Register 6"
line.long 0x84 "Dma7Cnt,ICnt Register 7"
line.long 0x88 "DmaCntLen,Dma LARGE Cnt register"
group.long 0x120++0x27
line.long 0x0 "UErrCtrl,Uncorrectable Parity Error Control Register"
line.long 0x4 "UErrStat,Uncorrectable Parity Error Status Register"
line.long 0x8 "UErrAddr1,Uncorrectable Parity Error Address Register"
line.long 0xC "UErrAddr0,Uncorrectable Parity Error Address Register"
line.long 0x10 "RxOvrNBufAddr,Receive RAM Overrun Buffer Address Register"
line.long 0x14 "IoLpbkTstCtrl,IO Loopback Test Control Register"
line.long 0x18 "EXTENDED_PRESCALE1,Extended Prescale Register 1"
line.long 0x1C "EXTENDED_PRESCALE2,Extended Prescale Register 2"
line.long 0x20 "ECCDIAG_CTRL,ECC Control register"
line.long 0x24 "ECCDIAG_STAT,ECC Diagnostic Status register"
group.long 0x1FC++0x3
line.long 0x0 "SPIREV,Revision ID Register"
tree.end
tree "SPI4"
base ad:0xFFF7FA00
group.long 0x0++0x87
line.long 0x0 "GlbCtrl0,Global control register 0"
line.long 0x4 "GlbCtrl1,Global control register 1"
line.long 0x8 "Int0,Interrupt Register"
line.long 0xC "IntLvl,Interrupt Level Register"
line.long 0x10 "IntFlg,Flag Register"
line.long 0x14 "Fun,Pin Control 0"
line.long 0x18 "Dir,Pin Control 1"
line.long 0x1C "DIn,Pin Control 2"
line.long 0x20 "DOut,Pin Control 3"
line.long 0x24 "DSet,Pin Control 4"
line.long 0x28 "DClr,Pin Control 5"
line.long 0x2C "PDr,Pin Control 6"
line.long 0x30 "PDis,Pin Control 7"
line.long 0x34 "PSel,Pin Control 8"
line.long 0x38 "TxDat0,Transmit Data Register 0"
line.long 0x3C "TxDat1,Transmit Data Register 1"
line.long 0x40 "RxBuf,Receive Buffer Register"
line.long 0x44 "Emu,Emulation Register"
line.long 0x48 "Delay,Delay Register"
line.long 0x4C "DefCs,Default Chip select Register"
line.long 0x50 "DatFmt0,Data Format Register 0"
line.long 0x54 "DatFmt1,Data Format Register 1"
line.long 0x58 "DatFmt2,Data Format Register 2"
line.long 0x5C "DatFmt3,Data Format Register 3"
line.long 0x60 "TgIntVec0,Transfer Group Interrupt Vector Register 0"
line.long 0x64 "TgIntVec1,Transfer Group Interrupt Vector Register 1"
line.long 0x68 "SrSel,Pin Control Register 9"
line.long 0x6C "PmCtrl,Parallel/Modulo Mode Control Register"
line.long 0x70 "MibSpiEna,MibSPI Enable Register"
line.long 0x74 "TgIntEnaSet,MibSPI Transfer Group Interrupt Enable Set Register"
line.long 0x78 "TgIntEnaClr,MibSPI Transfer Group Interrupt Enable Clear Register"
line.long 0x7C "TgIntLvlSet,MibSPI Transfer Group Interrupt Level Set Register"
line.long 0x80 "TgIntLvlClr,MibSPI Transfer Group Interrupt Level Clear Register"
line.long 0x84 "TgIntFlg,Transfer Group Interrupt Flag Register"
group.long 0x90++0x8B
line.long 0x0 "TickCnt,Tick Cnt Register"
line.long 0x4 "LTgPend,Last Transfer Group End Pointer"
line.long 0x8 "Tg0Ctrl,MibSPI Transfer Group Control Register 0"
line.long 0xC "Tg1Ctrl,MibSPI Transfer Group Control Register 1"
line.long 0x10 "Tg2Ctrl,MibSPI Transfer Group Control Register 2"
line.long 0x14 "Tg3Ctrl,MibSPI Transfer Group Control Register 3"
line.long 0x18 "Tg4Ctrl,MibSPI Transfer Group Control Register 4"
line.long 0x1C "Tg5Ctrl,MibSPI Transfer Group Control Register 5"
line.long 0x20 "Tg6Ctrl,MibSPI Transfer Group Control Register 6"
line.long 0x24 "Tg7Ctrl,MibSPI Transfer Group Control Register 7"
line.long 0x28 "Tg8Ctrl,MibSPI Transfer Group Control Register 8"
line.long 0x2C "Tg9Ctrl,MibSPI Transfer Group Control Register 9"
line.long 0x30 "Tg10Ctrl,MibSPI Transfer Group Control Register 10"
line.long 0x34 "Tg11Ctrl,MibSPI Transfer Group Control Register 11"
line.long 0x38 "Tg12Ctrl,MibSPI Transfer Group Control Register 12"
line.long 0x3C "Tg13Ctrl,MibSPI Transfer Group Control Register 13"
line.long 0x40 "Tg14Ctrl,MibSPI Transfer Group Control Register 14"
line.long 0x44 "Tg15Ctrl,MibSPI Transfer Group Control Register 15"
line.long 0x48 "Dma0Ctrl,MibSPI Dma Channel Control Register 0"
line.long 0x4C "Dma1Ctrl,MibSPI Dma Channel Control Register 1"
line.long 0x50 "Dma2Ctrl,MibSPI Dma Channel Control Register 2"
line.long 0x54 "Dma3Ctrl,MibSPI Dma Channel Control Register 3"
line.long 0x58 "Dma4Ctrl,MibSPI Dma Channel Control Register 4"
line.long 0x5C "Dma5Ctrl,MibSPI Dma Channel Control Register 5"
line.long 0x60 "Dma6Ctrl,MibSPI Dma Channel Control Register 6"
line.long 0x64 "Dma7Ctrl,MibSPI Dma Channel Control Register 7"
line.long 0x68 "Dma0Cnt,ICnt Register 0"
line.long 0x6C "Dma1Cnt,ICnt Register 1"
line.long 0x70 "Dma2Cnt,ICnt Register 2"
line.long 0x74 "Dma3Cnt,ICnt Register 3"
line.long 0x78 "Dma4Cnt,ICnt Register 4"
line.long 0x7C "Dma5Cnt,ICnt Register 5"
line.long 0x80 "Dma6Cnt,ICnt Register 6"
line.long 0x84 "Dma7Cnt,ICnt Register 7"
line.long 0x88 "DmaCntLen,Dma LARGE Cnt register"
group.long 0x120++0x27
line.long 0x0 "UErrCtrl,Uncorrectable Parity Error Control Register"
line.long 0x4 "UErrStat,Uncorrectable Parity Error Status Register"
line.long 0x8 "UErrAddr1,Uncorrectable Parity Error Address Register"
line.long 0xC "UErrAddr0,Uncorrectable Parity Error Address Register"
line.long 0x10 "RxOvrNBufAddr,Receive RAM Overrun Buffer Address Register"
line.long 0x14 "IoLpbkTstCtrl,IO Loopback Test Control Register"
line.long 0x18 "EXTENDED_PRESCALE1,Extended Prescale Register 1"
line.long 0x1C "EXTENDED_PRESCALE2,Extended Prescale Register 2"
line.long 0x20 "ECCDIAG_CTRL,ECC Control register"
line.long 0x24 "ECCDIAG_STAT,ECC Diagnostic Status register"
group.long 0x1FC++0x3
line.long 0x0 "SPIREV,Revision ID Register"
tree.end
tree.end
tree "STC (CPU Self-Test Controller)"
base ad:0xFFFFE600
group.long 0x0++0x3F
line.long 0x0 "GlbCtrl0,Global Control Register 0"
line.long 0x4 "GlbCtrl1,Global Control Register 1"
line.long 0x8 "Tpr,Run TimeOut Counter Preload Register"
line.long 0xC "CAddr,Current ROM Address Register"
line.long 0x10 "CICnt,Current Interval Count Register"
line.long 0x14 "GStat,SelfTest Global Status Register"
line.long 0x18 "FStat,Fail Status Register"
line.long 0x1C "Cpu1CurMisr3,Cpu 1 Current Misr Register"
line.long 0x20 "Cpu1CurMisr2,Cpu 1 Current Misr Register"
line.long 0x24 "Cpu1CurMisr1,Cpu 1 Current Misr Register"
line.long 0x28 "Cpu1CurMisr0,Cpu 1 Current Misr Register"
line.long 0x2C "Cpu2CurMisr3,Cpu 2 Current Misr Register"
line.long 0x30 "Cpu2CurMisr2,Cpu 2 Current Misr Register"
line.long 0x34 "Cpu2CurMisr1,Cpu 2 Current Misr Register"
line.long 0x38 "Cpu2CurMisr0,Cpu 2 Current Misr Register"
line.long 0x3C "Stcscscr,Signature Compare Self Check Register"
tree.end
tree "SYS (System and Peripheral Control)"
base ad:0x0
tree "SYS"
base ad:0xFFFFFF00
group.long 0x0++0x23
line.long 0x0 "SysPc1,Sys Pin Control Register 1"
line.long 0x4 "SysPc2,Sys Pin Control Register 2"
line.long 0x8 "SysPc3,Sys Pin Control Register 3"
line.long 0xC "SysPc4,Sys Pin Control Register 4"
line.long 0x10 "SysPc5,Sys Pin Control Register 5"
line.long 0x14 "SysPc6,Sys Pin Control Register 6"
line.long 0x18 "SysPc7,Sys Pin Control Register 7"
line.long 0x1C "SysPc8,Sys Pin Control Register 8"
line.long 0x20 "SysPc9,Sys Pin Control Register 9"
group.long 0x30++0x53
line.long 0x0 "CsDis,Clock Source Disable Register"
line.long 0x4 "CsDisSet,Clock Source Disable Set Register"
line.long 0x8 "CsDisClr,Clock Source Disable Clear Register"
line.long 0xC "CdDis,Clock Domain Disable Register"
line.long 0x10 "CdDisSet,Clock Domain Disable Set Register"
line.long 0x14 "CdDisClr,Clock Domain Disable Clear Register"
line.long 0x18 "GhvSrc,GClk. HClk. VClk. and VClk2 Source Register"
line.long 0x1C "VlckASrc,Peripheral Asynchronous Clock Source Register"
line.long 0x20 "RclkSrc,RTI Clock Source Register"
line.long 0x24 "CsVStat,Clock Source Valid Status Register"
line.long 0x28 "MstGlbCtrl,Memory Self-Test Global Control Register"
line.long 0x2C "MinitGlbCtrl,Memory Hardware Initialization Global Control Register"
line.long 0x30 "MsInEna,MBIST Controller/Memory Initialization Enable Register"
line.long 0x34 "MstFail,Memory Self-Test Fail Status Register"
line.long 0x38 "MstCgStat,MstC Global Status Register"
line.long 0x3C "MIniStat,Memory Hardware Initialization Status Register"
line.long 0x40 "PllCtl1,Pll Control Register 1"
line.long 0x44 "PllCtl2,Pll Control Register 2"
line.long 0x48 "SysPc10,Sys Pin Control Register 10"
line.long 0x4C "DieIdL,Die Identification Register. Lower Word"
line.long 0x50 "DieIdH,Die Identification Register Upper Word"
group.long 0x88++0xF
line.long 0x0 "LpoMonCtl,Lpo/Clock Monitor Control Register"
line.long 0x4 "ClkTest,Clock Test Register"
line.long 0x8 "DftCtrlReg,DFT Control Register"
line.long 0xC "DftCtrlReg2,DFT Control Register 2"
group.long 0xA0++0x3
line.long 0x0 "GPREG1,General Purpose Register"
group.long 0xA8++0x2F
line.long 0x0 "ImpFaSts,Imprecise Fault Status Register"
line.long 0x4 "ImpFtAdd,Imprecise Fault Write Address Register"
line.long 0x8 "SSIr1,System Software Interrupt Request 1 Register"
line.long 0xC "SSIr2,System Software Interrupt Request 2 Register"
line.long 0x10 "SSIr3,System Software Interrupt Request 3 Register"
line.long 0x14 "SSIr4,System Software Interrupt Request 4 Register"
line.long 0x18 "RamGlbCtrl,Ram Control Register"
line.long 0x1C "BmmCr1,Bus Matrix Module Control Register1"
line.long 0x20 "BmmCr2,Bus Matrix Module Control Register2"
line.long 0x24 "MmuGlbCtrl,Mmu Global Control Register"
line.long 0x28 "ClkCntl,Clock Control Register"
line.long 0x2C "EcpCntl,ECP Control Register"
group.long 0xDC++0x1F
line.long 0x0 "DevCr1,DEV Parity Control Register1"
line.long 0x4 "SysEcr,System Exception Control Register"
line.long 0x8 "SysEsr,System Exception Status Register"
line.long 0xC "SysTasr,System Test Abort Status Register"
line.long 0x10 "GlbStat,Global Status Register"
line.long 0x14 "DevId,Device Identification Register"
line.long 0x18 "SSiVec,Software Interrupt Vector Register"
line.long 0x1C "SSIf,System Software Interrupt Flag Register"
tree.end
tree "SYS2"
base ad:0xFFFFE100
group.long 0x0++0x3
line.long 0x0 "PLLCTL3,PLL Control Register 3"
group.long 0x8++0xF
line.long 0x0 "STCCLKDIV,CPU Logic BIST Clock Divider"
line.long 0x4 "CLKHB_GLBREG,Clock Hibernate Mode Global Enable Register"
line.long 0x8 "CLKHB_RTIDREG,Clocked Hibernate RTI Domain Control Register"
line.long 0xC "HBCD_STAT,Hibernate Clock Domain Status Register"
group.long 0x20++0x3
line.long 0x0 "CLKTRMI1,Clock Trim 1 Register"
group.long 0x3C++0x7
line.long 0x0 "CLK2CNTRL,Clock 2 Control Register"
line.long 0x4 "VCLKACON1,Peripheral Asynchronous Clock Configuration 1 Register"
group.long 0x70++0x3
line.long 0x0 "CLKSLIP,Clock Slip Register"
group.long 0xEC++0x13
line.long 0x0 "EFC_CTLREG,EFUSE Controller Control Register"
line.long 0x4 "DIEIDL_REG0,Die Identification Register Lower Word"
line.long 0x8 "DIEIDH_REG1,Die Identification Register Upper Word"
line.long 0xC "DIEIDH_REG2,Die Identification Register Lower Word"
line.long 0x10 "DIEIDH_REG3,Die Identification Register Upper Word"
tree.end
tree.end
tree "VFP"
base ad:0xFFF7C000
group.long 0x0++0x3
line.long 0x0 "VFP_SYSTEM_FPSID,"
group.long 0x0++0x3
line.long 0x0 "VFP_SYSTEM_FPSCR,"
group.long 0x0++0x3
line.long 0x0 "VFP_SYSTEM_FPEXC,"
group.long 0x0++0x3
line.long 0x0 "VFP_SYSTEM_MVFR0,"
group.long 0x0++0x3
line.long 0x0 "VFP_SYSTEM_MVFR1,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S0,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S1,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S2,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S3,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S4,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S5,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S6,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S7,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S8,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S9,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S10,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S11,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S12,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S13,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S14,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S15,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S16,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S17,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S18,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S19,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S20,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S21,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S22,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S23,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S24,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S25,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S26,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S27,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S28,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S29,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S30,"
group.long 0x0++0x3
line.long 0x0 "VFP_SP_S31,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D0_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D0_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D1_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D1_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D2_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D2_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D3_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D3_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D4_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D4_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D5_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D5_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D6_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D6_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D7_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D7_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D8_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D8_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D9_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D9_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D10_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D10_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D11_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D11_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D12_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D12_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D13_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D13_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D14_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D14_H,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D15_L,"
group.long 0x0++0x3
line.long 0x0 "VFP_DP_D15_H,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D0,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D1,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D2,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D3,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D4,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D5,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D6,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D7,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D8,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D9,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D10,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D11,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D12,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D13,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D14,"
group.quad 0x0++0x7
line.quad 0x0 "VFP_DP_D15,"
tree.end
tree "VIM (Vectored Interrupt Manager)"
base ad:0xFFFFFE00
group.long 0x0++0x7
line.long 0x0 "IrqIVec,Index Offset Vector Register"
line.long 0x4 "FiqIVec,Index Offset Vector Register"
group.long 0x10++0xB
line.long 0x0 "FIrqPr0,Program Control Register"
line.long 0x4 "FIrqPr1,Program Control Register"
line.long 0x8 "FIrqPr2,Program Control Register"
group.long 0x20++0xB
line.long 0x0 "IntReq0,Pending Interrupt Read Location"
line.long 0x4 "IntReq1,Pending Interrupt Read Location"
line.long 0x8 "IntReq2,Pending Interrupt Read Location"
group.long 0x30++0xB
line.long 0x0 "ReqMaskSet0,Interrupt Mask Set Register"
line.long 0x4 "ReqMaskSet1,Interrupt Mask Set Register"
line.long 0x8 "ReqMaskSet2,Interrupt Mask Set Register"
group.long 0x40++0xB
line.long 0x0 "ReqMaskClr0,Interrupt Mask Clear Register"
line.long 0x4 "ReqMaskClr1,Interrupt Mask Clear Register"
line.long 0x8 "ReqMaskClr2,Interrupt Mask Clear Register"
group.long 0x50++0xB
line.long 0x0 "WakeMaskSet0,Wake-up Mask Set Register"
line.long 0x4 "WakeMaskSet1,Wake-up Mask Set Register"
line.long 0x8 "WakeMaskSet2,Wake-up Mask Set Register"
group.long 0x60++0xB
line.long 0x0 "WakeMaskClr0,Wake-up Mask Clear Register"
line.long 0x4 "WakeMaskClr1,Wake-up Mask Clear Register"
line.long 0x8 "WakeMaskClr2,Wake-up Mask Clear Register"
group.long 0x70++0xB
line.long 0x0 "IrqVecReg,Irq Interrupt Vector Register"
line.long 0x4 "FiqVecReg,Fiq Interrupt Vector Register"
line.long 0x8 "CapEvtSrc,Capture Event register"
group.long 0x80++0x5F
line.long 0x0 "ChanCtrl0,Channel Mapping Register"
line.long 0x4 "ChanCtrl1,Channel Mapping Register"
line.long 0x8 "ChanCtrl2,Channel Mapping Register"
line.long 0xC "ChanCtrl3,Channel Mapping Register"
line.long 0x10 "ChanCtrl4,Channel Mapping Register"
line.long 0x14 "ChanCtrl5,Channel Mapping Register"
line.long 0x18 "ChanCtrl6,Channel Mapping Register"
line.long 0x1C "ChanCtrl7,Channel Mapping Register"
line.long 0x20 "ChanCtrl8,Channel Mapping Register"
line.long 0x24 "ChanCtrl9,Channel Mapping Register"
line.long 0x28 "ChanCtrl10,Channel Mapping Register"
line.long 0x2C "ChanCtrl11,Channel Mapping Register"
line.long 0x30 "ChanCtrl12,Channel Mapping Register"
line.long 0x34 "ChanCtrl13,Channel Mapping Register"
line.long 0x38 "ChanCtrl14,Channel Mapping Register"
line.long 0x3C "ChanCtrl15,Channel Mapping Register"
line.long 0x40 "ChanCtrl16,Channel Mapping Register"
line.long 0x44 "ChanCtrl17,Channel Mapping Register"
line.long 0x48 "ChanCtrl18,Channel Mapping Register"
line.long 0x4C "ChanCtrl19,Channel Mapping Register"
line.long 0x50 "ChanCtrl20,Channel Mapping Register"
line.long 0x54 "ChanCtrl21,Channel Mapping Register"
line.long 0x58 "ChanCtrl22,Channel Mapping Register"
line.long 0x5C "ChanCtrl23,Channel Mapping Register"
tree.end
tree "VIMPAR (Vectored Interrupt Manager Parity)"
base ad:0xFFFFFD00
group.long 0xEC++0xF
line.long 0x0 "ParFlg,VIM RAM parity Flag register"
line.long 0x4 "ParCtl,VIM RAM parity control register"
line.long 0x8 "AddErr,Address Parity Error Register"
line.long 0xC "FbParErr,Fall back Address Parity Error Register"
tree.end
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